07 GPIO - Atomic Rhubarb
Contents
1. rocca SimpleBlinky3 Configuration Debug E Dan Projects ZNEO_programs example_SimpleBlinky sleeps c E Dan Projects ZNEO_programs example_SimpleBlinky leds c E Dan Projects ZNEO_programs example_SimpleBlinky main3 c E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 68 18 ERROR 100 Syntax error E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYMMAIN3 C 69 13 ERROR 121 Illegal declaration sp E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 71 16 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 73 4 ERROR 100 Syntax error E DAN PROJECTS ZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYMMAIN3 C 74 7 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 76 15 ERROR 125 Identifier i already declared within current scope E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 76 15 ERROR 193 Missing 62 detected E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_ SIMPLEBLINKY MAIN3 C 76 18 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 78 18 ERROR 100 Syntax error E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYMMAIN3 C 79 10 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 81 26 ERROR 100 Syntax error E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEB2. ne Output Pins INSULIN PUMP SYSTEM Real Time Embedded Systems www atomi crhubarb cony embedded Lecture 9 J anuary 31 2012 General Purpose IO Section Topic Where in the books Catsoulis chapter 1 pg 28 Simon chapter 4 Zilog UM197 neo zier series Flash Microcontroller Contest Kit User Manual Zilog UMI 71 ios Developer studio i ZNEO User Manual Zilog PS220 neo zier series Product Specification Zilog UM188 neo cpu core User Manual Assorted datasheets Oscillators On Chip XTAL IPO Debugger POR VBO ZNEO CPU Interrupt ha WDT with System Controller DURO RC Oscillator Memory Buses ms uc E Analog DMA Flash RAM Controller Controller PWM I 1 DA Flash Memory RAM GPIO with External Interface GPIO with External interface Address and Data Bus and Data Bus Address Memory Type 1 1 I Internal 1 0 and SFRs e PE External Memory or 1 0 r S S FF C000H optional 16 Bit Addressabl Internal Random Access Memory Data e Space E 4K RAM Part Special Function Registers External Memory or I O Not to Scale optional 01 font Internal RAM I 00 FFF 128KB Internal FLASH memor gt 64KB 00 8000H Internal Flash 00 7rFFR 64K Flash Bart 16 Bit Addressable Data Table 6 Register File Address Map Address Hex Register Description Mnemonic Reset Hex Page No ZNEO
3. Bus System Clock BDP oli o o Port Data Direction BE Output Register Bits A Register or Byte e SET a bit X turn it on or 1 Bit 0 LSB e CLEAR a bit turn it off or 0 Bit 7 MSB Some folks say they RESET a bit to turn it off Port Configuration PxDD Data Direction Is the port we are interested in an input port or output port e PXAFH Alternate Function GPIO or something else e PxOC Output Control Standard logic or open drain PXHDE High Drive Increased drive current on outputs Port Configuration PxSMRE Stop Mode Recovery Wake up processor on signal change PxIN Data Input PxOUT Data Output PxPUE Pull Up enable PxIN Table 25 Port A K Input Data Registers 65 7 RESET x ADDR FF_E100 FF_E110 FF_E120 FF_E130 FF_E140 FF_E150 FF_E160 FF_E170 FF_E180 FF_E190 PIN 7 0 Port Input Data Sampled data from the corresponding port pin input 0 Input data is logical 0 Low 1 Input data 15 logical 1 High PxDD Table 27 Port A K Data Direction Registers PxDD FF_E192 ADDR FF E102 FF E112 FF_E122 FF_E132 FF_E142 FF_E152 FF_E162 FF_E172 FF_E182 DD 7 0 Data Direction These bits control the direction of the associated port pin Port alternate function operation overrides the data direction register setting 0 Output Data in the Port A K output data register 15 driven ont
4. Whats wrong with this define byte unsigned char example_SimpleBlinky Configuration Debug NDanNProjectsNZNEO programsNexample SimpleBlinkyNmain2 DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN2 RROR 100 Syntax error RROR 100 Syntax error ERROR 128 Identifier i DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN2 DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN2 not defined within current scope Linking VARNING 731 gt File main2 obj is not found Build completed 00 A pH Whats wrong with this uration Debug e C 72 31 ERROR E SIMPLEBLINKYNMMAIN2 C 73 33 ERROR 8 80 22 ERROR VARNING 731 lt File main2 obj is not found Config Blinky ROGRAMSNEXAMPLE SIMPLEBLINKYMMAIN2 not defined within current scope mplel Dan Projects ZNEO_programs example_SimpleBlinky main2 ROGRAMS EXAMPLE_SIMPLEBLINKY MAIN2 DANNPROJECTSNZNEO PROGRAMSNEXAMPL EO Pl EO Pl define byte unsigned cha sees example 51 E N E DAN PROJECTS ZN E N E N DAN PROJECTS ZN Linking Build completed Whats wrong with this 45 ifndef SLEEP H define SLEEP H void sleep int ms Fendi
5. CPU Base Address FF_E000 FF_E004 FF_E007 Program Counter Overflow PCOV OOFFFFFF Refer to FF EO0C FF Stack Pointer Overflow SPOV 00000000 the ANNEO 0 Flags FLAGS XX CPU FF_E012 CPU Control CPUCTL 00 User Manual ZNEO Trace Address FF_E014 FF E013 Trace Control TRACECTL 00 321 FF E014 FF E017 Trace Address TRACEADDR xxxxxxxx 322 Interrupt Controller Base Address FF E020 020 System Exception Status High SYSEXCPH 0000 84 FF E021 System Exception Status Low SYSEXCPL 0000 84 FF E022 FF_E02F Reserved XX 030 Interrupt Request 0 IRQO 00 85 FF E031 Interrupt Request 0 Set IRQOSET xx 85 FF E032 IRQO Enable High Bit IRQOENH 00 89 FF E033 XIRQOEnableLowBit IRQOENL o 89 FF E034 Interrupt Request 1 IRQ1 00 87 FF E035 Interrupt Request 1Set IRQ1SET XX 87 FF_E036 IRQ1 Enable High Bit IRQ1ENH 00 91 FF_E037 IRQ1 Enable Low Bit IRQ1ENL 00 91 FF_E038 Interrupt Request 2 IRQ2 00 88 FF_E039 Interrupt Request 2 Set IRQ2SET xx 88 FF_E03A IRQ2 Enable High Bit IRQ2ENH 00 92 FF E03B IRQ2 Enable Low Bit IRQ2ENL 00 02 203 0 Reserved XX fo Ge hy Go ta GPIO Port A GPIO Base Address FF_E100 GPIO Port A Base Address FF_E100 PAIN PAOUT PADD PAHDE PAAFH PAAFL PAOC PAPUE PASMRE PAIMUX1 PAIMUX PAIEDGE Port A Input Data Port A Output Data Port A Data Direction Port A High Drive Enable Port A Alternate Function High Port A Alte
6. Read from IN int i PDIN Write to OUT PDOUT i And reading from OUT and writing to IN i PDOUT what we put there PDIN 4 ys 2 For every port define PAIN define PAOUT define PADD define PAHDE unsigned char volatile near 0xE103 unsigned char volatile near 0xE100 y x o define PAAF unsigned short volatile near OxE104 SA 54 o unsigned char volatile near 0xE101 unsigned char volatile near 0xE102 define PAAFH define PAAFL define PAOC unsigned char volatile near 0xE104 unsigned char volatile near 0xE105 unsigned char volatile near 0xE106 Example Set port Bit 0 2 4 6 as INPUTS Bit O as TimerO input Bit 1 3 5 7 as OUTPUTS Bit 1 as open drain Bit 3 as high drive Example GRG 0x01 035023 0x04 PADD PAAF PAOC PAHDE Another Example Set port 8 bit 3 for ANALOG input But leave other bits alone as they are already set for something else Example PRAF 0x04 Set bres 00001000 The magic of amp and PDOUT OxOF set the lower 4 bits PADD 0x10 set bit 4 PDOUT amp OxFO0 clear the lower 4 bits PADD amp OxEF clear bit 4 PADD 0x10 clear bit 4 Output Direction Vould it ever make sense to read from an OUTPUT port or write to an INPUT port E Open Drain Output Set port to OUTPUT as OPEN DRAIN Write a 1 but external d
7. 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 80 pin Z16F6411 100 pin 80 pin Z16F3211 100 pin 80 pin Z16F2810 80 pin 68 pin 64 pin 5 32 jt 1188 5 55 55 ARE oa 32 oio na Ed ontonsno8955958 P p 2 LHRH 9 8 9 8 P 8 8 8 TOS 9Vd SSAV 00161 SVd JIYA 0QX3 dNId2 L L VNYV Hd SSA OLYNY Hd adn 04 WNW gd ISOIN 3d LNOdO VNV edd LOXL Sad NNIdO ZVNY gd LOXH tad NNIO dNIdO 9VNY 98d 130 dd SVNV 584 OSIN SOd UNV rad 444 LNIOL LYNY 184 ad ONIOL 0VNV 08d SSA LHd 01701973 OSLO OHd ALINWI 030 Vd 00 17 4 001 I Vd g 3 SSA NIM O EON NONE Zz EO TEE EU 2 5 Es A E RE eo Alternate Function Alternate Function 2 Alternate External Function 3 interface DMAOREQ TOINPB DMAOACK FAULTY FAULTO CS1 CS2 CS3 094 Alternate Function 1 TOIN TOOUT TOOUT DEO CTSO RXDO TXDO SCL SDA Pin PAO PA1 PA2 PA3 PA4 PAS PA6 PAT Port Port A GPIO Input Register VDD lof fof oi o Pull up Enable 0 Port Input Schmitt Trigger Data Register i System Clock Port Output Control Port Output Tila Data Register Data s
8. 3 C 76 15 ERROR 193 Missing 62 detected E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 76 18 ERROR 100 Syntax error E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYNMMAINS3 C 78 18 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_ SIMPLEBLINKY MAIN3 C 79 10 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 81 26 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 82 14 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 84 6 ERROR 100 Syntax error Linking WARNING 731 lt File main3 obj is not found Build completed What does the 216 see when you press a button VDD R7 R8 R9 10K 10K SW PUSHBUTTON SW2 SW PUSHBUTTON SW3 Leo D SW PUSHBUTTON Exa m D ButtonCounter e Show how to count on 4 bits on modem status lights Count button presses Debug le ButtonCounter sleeps c le ButtonCounter leds c e_ButtonCounter main c Configuration Whats wrong with this CO PFDD e ButtonCounter Dan Projects ZNEO_programs examp Dan Projects ZNEO_programs examp Dan Projects ZNEO_programs examp Linking Build completed Whats wrong with this PFDD OXCO ButtonCounter Con
9. LINKYMMAIN3 C 82 14 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 84 6 ERROR 100 Syntax error Linking WARNING 731 File main3 obj is not found Build completed Whats wrong with this 6 ifndef SLEEP H define SLEEP H void sleep int ms endi e SimpleBlinky3 Configuration Debug E Dan Projects ZNEO_programs example_SimpleBlinky sleeps c E Dan Projects ZNEO programs example SimpleBlinky leds c E Dan Projects ZNEO programs example SimpleBlinky main3 c E DAN PROJECTS ZNEO PROGRAMS EXAMPLE SIMPLEBLINKY MAIN3 C 68 18 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_ SIMPLEBLINKY MAIN3 C 69 13 ERROR 121 Illegal declaration sp E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYNMMAINS3 C 71 16 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 73 4 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 74 7 ERROR 100 Syntax error E DAN PROJECTS ZNEO_PROGRAMS EXAMPLE_SIMPLEBLINKY MAIN3 C 76 15 ERROR 125 Identifier i already declared within current scope E NDANNPROJECTSNZNEO PROGRAMSNEXAMPLE SIMPLEBLINKYNMMAINS
10. evice is writing a O We can test for a collision by reading from the output port and comparing that to the input port Write a 1 read a 0 Input Register VDD Loto ox Tos o Pull up Enable d Port Input Schmitt Trigger Data Register i D lt System Clock VDD Port Output Control Port Output N Data Register Mar m Data SO don Ren Bus System Clock 1 1 oli Top Port Data Direction sa Output Register GPIO Recipe 1 Determine which bits need to get set and how 2 Set port data direction 3 Set port alternate function 4 Set port output control 5 Set port drive 6 Set port stop mode recovery Port A D and 0 are special have some additional configuration PAIMUXI Configures port A or D for use as comparator input or debug interrupt PAIMUX Configure port A or D for interrupt source PAIEDGE Selected port A or D interrupt as negative or positive edge PCIMUX Selects if port C is interrupt source or DMA interrupt source Exa m D 3 SimpleBlinky e Show how to count on 4 bits with silly delay 3 Versions 5 f HEADER9 HEADER 32 MODEM CONNECTORS POWER amp RS232 MRESET 4 mm R20 0 R210 R22 9 D7 DCD KK 3 Versions e Vl Basic code It works V2 Better More comments Functions Function prototypes Proper datatype V3 Modular use of h and c files
11. figuration Debug Dan Projects ZNEO_programs example_ButtonCounter sleeps c Dan Projects ZNEO programs example ButtonCounter leds c Dan Projects ZNEO programs example ButtonCounter main c Linking Build completed Whats wrong with this to test for button presses if PDIN amp 0x08 PFIN OxCO 0xC8 ButtonCounter Config tio Debug eo p mple_ nbus en rNsleeps E Dan Projects ZNEO programs mpl tto xl De E Dan Projects ZNEO_programs exampl _Butto ni nter mai inking Build co Whats wrong with this to test for button presses if PDIN amp 0x08 PFIN OxCO 0xC8 has higher precedence than Isthat what we wanted PDIN amp 0x08 PFIN amp 0xC0 0xC8 Will only succeed when SWI1 or SWZ SW 3 are pressed What if we didn t sleep void main void byte i 1 0 status init buttons_init while 4 1 if buttons_pressed i status_set 1 if 1 i 00 sleep 250 End of Section Reminder
12. o the port pin 1 Input The port pin is sampled and the value written into the Port A K input data register The output driver is high impedance Dan s Helpful Hint 1 looks like I input O looks like O output PxAFH PxAFL Table 29 Port A K Alternate Function High Registers PXAFH am 7 es 5 4 5 lele me fe mw mmm pue ee meme 5 4 5 2 mae 5 5 fe fe fe fe fe ew mm e ew FF E105 FF E115 FF E125 FF E135 FF E155 FF E165 FF E175 FF E195 PxAFH PxAFL Port A K Alternate Function High and Low Registers The Port A K alternate function high and low registers see Table 29 and Table 30 on page 74 select the alternate functions for the selected pins To determine the alternate function associated with each port pin see GPIO Alternate Functions on page 68 When changing alternate functions it is recommended to use word data mode instructions to perform simultaneous Writes to the port alternate function high and low registers Do not enable alternate function for GPIO port pins which do not have an associ ated alternate function Failure to follow this guideline will result in undefined op eration AFH x AFL x Priority 0 0 No Alternate Function enabled 0 1 Alternate Function 1 Enabled 1 0 Alternate Function 2 Enabled 1 1 Alternate Function 3 Enabled Note x indicates the register bits from 0 through 7 IN OUT
13. rnate Function Low Port A Output Control Port A Pull Up Enable Port A Stop Mode Recovery Enable Port A Reserved Port A Irq Mux1 Port A Reserved Port A Irq Mux Port A Edge p1 ta FF E100 Peripheral Address Map e Manv bades of this in the manual Address Hex Register Description Mnemonic Reset Hex Page No GPIO Port F Base Address FF_E150 FF_E150 Port F Input Data PFIN XX 72 FF E151 Port F Output Data PFOUT 00 72 FF_E152 Port F Data Direction PFDD 00 fa FF_E153 Port F High Drive Enable PFHDE 00 4 354 Reserved FF_E155 Port F Alternate Function Low PFAFL 00 75 FF E156 Port F Output Control PFOC 00 15 FF E157 Port F Pull Up Enable PFPUE 00 76 FF E15 Port F Stop Mode Recovery PFSMRE 00 76 Enable FF E159 FF E15F Port F Reserved GPIO General Purpose Input Output ports Maximum of 10 ports 8 bit ports A K Less available on physically smaller parts not enough pins Some not accessible or partially accessible Pin Count Port A PortB PortC PortD PortE PortF PortG PortH Port J Port K 7 0 7 0 3 0 Table 23 GPIO Port Availability by Device 7 0 Device Z16F2811 100 pin 7 0 7 0 7 0 7 0 3 0 3 0 3 0 3 0 3 0 3 0 3 0 3 0 7 0 7 0 7 0 7 0 7 0 7 0 3 3 7 0 7 0 7 0 7 0 7 0 7 0 7 7 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7
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