PCI-D64HU
Contents
1. e DN 37 DIN Rail Mounting 37 pin Connector Pitch 5 08mm e DN 37 381 DIN Rail Mounting 37 pin Connector Pitch 3 81mm e DB 37 Directly connect signal to D Sub 37 pin connector Attention lf any of these items are missing or damaged please contact your local field agent Save the shipping materials and carton in case you want to ship or store the product in the future PCI D64HU User s Manual Ver 1 0 Dec 2009 2 Hardware Configuration 2 1 Board Layout MOT U4 105 im Description hem Description ________ I O connector 37 pin D Sub female CON2 I O connector 40 pin Box Header Card ID switch Factory reserved PCI D64HU User s Manual Ver 1 0 Dec 2009 2 2 Card ID Switch Setting SW1 Card ID Switch The SW1 switch is used to set the card ID The value is from 0 to 15 Please refer to table below for details Switch Setting Card ID On 1 ON 1 2 3 4 lt 0 Default 0 O O O 1 1101 0 0 1 2 3 4 Default 13 1 0 1 1 1 a oa MENE PCI D64HU User s Manual Ver 1 0 Dec 2009 2 3 Pin Assignment The PCI D64HU has one 37 pin D Sub connector CON1 and one 40 pin pin header CON2 Please refer figure below for the pin assignment of CON1 and CON2 N C 40 N C TRG 37 A sio aie E ee pove 36 18 ACK O_TRG F O_ACK ere 35 iw 5V GND gt 5V EG 34 16 DI15 DO31 a DI31 hora 33 15 DI14 DO30 E DI30 DOS 32 14 DI13 DO29 K DI29 Bon 3 13 Dl12 DO28 7 DI28 navi2. 0 55 V Source 32 mA 2 0 V O REQ output O ACK input O TRG output 40 MB sec for DI and DO simultaneously max All input signals including 32 DI signals REQ TRG and O ACK 1 127 x 25 ns O REQ 2 256 x 25 ns 3 16 bit 2 5 20 MHz Clock source of DI Clock source of DO Base clock of Timer 0 and Timer 1 O ACK REQ Timer 0 Timer 1 and Timer 2 1 k DWORD 32 bit 2 k DWORD 32 bit 2 2 k DWORD 32 bit DO only Universal PCI 32 bit 33 MHz Yes 4 bit Female DB37 x 1 40 pin Box header x 1 120 mm x 105 mm x 22 mm 200 mA 5 V typical output no load 0 60 C 20 70 C 5 85 RH non condensing PCI D64HU User s Manual Ver 1 0 Dec 2009 1 6 Product Check List In addition to this manual the package includes the following items e One PCI D64HU card e One ICP DAS software CD ROM e One Quick Start Guide It is recommended to read the Quick Start Guide first The following important information will be given in the Quick Start Guide 1 Where you can find the software driver amp utility 2 How to install software amp utility 3 Location of the diagnostic program 1 7 Ordering Information Ordering Information e PCI D64HU 40 MB s High speed 32 CH DI and 32 CH DO Universal PCI DIO Card ROHS Includes one CA 4037W cable and two CA 4002 D Sub connectors Accessories e CA 3710 DB 37 Male Male D sub cable 1M 45 e CA3710DM DB 37 Male Male D sub cable 1M 180
3. 30 12 DI11 DO27 DI27 pe JO 11 DI10 DO26 22 DI26 EGG S 10 DI9 DO25 20 DI25 SE E 9 DI8 DO24 18 DI24 Eo E 8 DI7 DO23 16 DI23 SG e 7 DI6 DO22 14 DI22 Do mn 6 DI5 DO21 12 DI21 pa pa 5 DI4 DO20 10 DI20 SG pa 4 DI3 DO19 8 DI19 EGE E 3 DI2 DO18 6 DI18 POD 20 2 DI DO17 4 DI17 1 DIO DO16 2 DI16 PCI D64HU User s Manual Ver 1 0 Dec 2009 10 2 4 Operation Theory The PCI D64HU support 4 data transfer modes they are direct programmed I O control timer pacer control external clock mode and handshaking mode This chapter descript the detailed operation of these 4 data transfer modes Direct Program Control Mode The status of digital inputs and digital outputs can be directly accessed by I O port access The I O port address is assigned by system BIOS please refer to the function reference manual for more detailed description Internal Timer Pacer Mode There are three 16 bit timers on board Timer 0 is for DI update and Timer 1 is for DO update Both Timer 0 and Timer 1 can be optionally cascaded with Timer 2 for slower timer pacer generation The base clock of all timers can be programmed from 20 MHz to 2 5 MHz 40 MHz n where n 2 16 L Input Timer Pacer CLKO Timer 0 OUTO e 4OMHz input Clock N Divider T Output Timer Pacer CLK1 Timer 1 OUT1 e CLK2 Timer 2 OUT2 For digital input the input data will
4. 32 CH Digital Output PCI D64HU is a high speed digital I O card consisting of 32 digital input channels and 32 digital output channels High performance designs make this card perfect for high speed data transfer and pattern generation applications The PCI D64HU has the Card ID switch on board Users can set Card ID ona board and recognize the board by the ID via software when using two or more PCI D64HU cards in one computer The PCI D64HU performs high speed data transfer by bus mastering DMA via 32 bit PCI bus The maximum data transfer rate can be up to 40 MB per second Several digital I O transfer modes are supported such as direct programmed I O control timer pacer control external clock mode and handshaking mode It is a reliable and cost effective connection interface that works on your computer system to control high speed peripherals PCI D64HU User s Manual Ver 1 0 Dec 2009 1 2 Features The following is a list of general features for the PCI D64HU Check section 1 5 for more details Support 32 bit 33 MHz Universal PCI bus 32 CH 5V TTL Digital Inputs and 32 CH 5V TTL Digital Outputs 2 CH Bus Mastering Scatter Gather DMA Data Transfer Rate up to 40 MB s for Each Channel Support 4 Data Transfer Modes m Direct Program Control Mode NM Internal Timer Pacer Mode m External Clock Mode DI Only NM Handshaking Mode On Board 1 k 2 k DWORD FIFO for DI DO Respectively DO FIFO Support Ring Buffer Mode No Bus
5. Loading in Repetitive Pattern Card ID function 1 3 Generation Application Programmable Input Digital Filter for All Input Signals Including Handshaking and Trigger Signals PCI D64HU User s Manual Ver 1 0 Dec 2009 1 4 Block Diagram DB 37 Female Connector 2 Q O E w Ne Address U 5 O ade decoder zi amp Trigger TI O O Pacer 3 Control FPGA I Sz G O L ia O W v gt S G A s nint PCI 9054 nReady sng ldd PCI Bus PCI D64HU User s Manual Ver 1 0 Dec 2009 1 5 Specifications Model Name PCI D64HU Digital Input Channels 32 Input Voltage Logic 0 0 8 V max Handshaking Signals Digital Output Channels Compatibility Output Voltage Output Capability Handshaking Signals Transfer Speed Programmable Digital Filter Applicable Signals Max removable noise width Programmable Pulse Extender Applicable Signals Pulse width Timer Counter Channels Resolution Input Frequency Timer 0 Timer 1 Timer 2 Interrupt Sources On Board FIFO DI DO Size in Ring Buffer Mode General Bus Type Card ID I O Connector Dimensions L x W x D Power Consumption Operating Temperature Storage Temperature Humidity Logic 1 2 0 V min REQ input ACK output TRG input 32 5 V TTL Logic 0 0 55 V max Logic 1 2 0 V min Sink 64 mA
6. PCI D64HU User s Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assume no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use nor for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 2009 by ICP DAS All rights are reserved Trademark The names used for identification only may be registered trademarks of their respective companies PCI D64HU User s Manual Ver 1 0 Dec 2009 Table of Contents Is TOC OT Ne o o o dl aa 3 1 1 General DESCTIDUONI aii e E le a o na 3 1 2 FCANIFES AAA NAL la d 1 3 Block Dia T sne gas ea SE a ae en 5 1 4 SPECHICANONS aaa 6 1 5 Product CHECK AAA do kada do kia iska 7 2 Hardware Configuratio a ne UN ENA EE EL A 8 2 1 Board ay OU HHT 8 2 2 SWEN SEU A E E ER A 9 29 Pin ASSIPNNICNE e aan ia e ei NIN al dadas 10 2 4 Operation NT Vian 11 Zed Timing Characters te ana indians nia Nk ee 14 PCI D64HU User s Manual Ver 1 0 Dec 2009 1 Introduction 1 1 General Description The PCI D64HU card provides 40 MB s High Speed 32 CH Digital Input and
7. be saved into DI FIFO after a timer pacer pulse is generated When the DI FIFO is not empty the saved data will be automatically transferred to the main memory of computer system by the bus mastering DMA controller For digital output the state of output pins will be updated by the data in DO FIFO after a timer pacer pulse is generated When the DO FIFO is not full data in the main memory will be automatically transferred to the DO FIFO by the bus mastering DMA controller External Clock Mode DI Only The digital input is clocked by external strobe which is from Pin 19 REQ of CON1 PCI D64HU User s Manual Ver 1 0 Dec 2009 11 The input data will be saved into DI FIFO after a strobe is generated When the DI FIFO is not empty the saved data will be automatically transferred to the main memory of computer system by the bus mastering DMA controller Digital Input Data To Digital Pin 19 of CON1 Input Trigger Latch Digital I REQ 1 Input Data 2 aram lt D Digital Input Memory FIFO Bus mastering DMA data Transfer 1 Digital Input data is ready and an REG signal is generated by external device 2 Digital input data is saved to FIFO 3 If the FIFO is not empty and PCI bus is not occupied the data will be transferred to main memory Handshaking Mode The PCI D64HU also supports handshaking data transfer mode The data tra
8. is moved form PC s main memory to FIFO automatically DO Ring Buffer Mode The ring buffer is managed in hardware level and the size of the ring buffer can be set by user When the DO FIFO is set as ring buffer mode the last buffer of the DO buffer will be chained with the first buffer No bus loading is required which makes PCI D64HU perfect for repetitive pattern generation application PCI D64HU User s Manual Ver 1 0 Dec 2009 13 2 5 Timing Characteristic Characteristic of Input Digital Filter The digital filter is applicable for all DI signals IREQ ITRG and OACK The maximum removable noise width can be programmed from 1 127 x 25ns System CLK 40MHz I REQ tHOLD a tDelay a FLT REQ B gt tLatch rat DIO DBI x Valid data X A n 25ns lt tDelay lt n 1 25ns tHold gt n 1 25ns tLatch 25ns Where n 1 127 Characteristic of Output Pulse Extender in Timer Pacer Mode System CLK 40MHz O_REQ ju gt Output Signal tL a DOO DO31 Output Signal Valid Data ar tH at Pois e 25ns lt tS lt 2 n 1 29ns tH 24 n 1 25ns tL gt 2 n 1 25ns N
9. nsfer rate is controlled by REQ and ACK signals to guarantee no data loss The operation of DI Handshaking Digital Input Data REQ 2 Y zal pu Input Signal Latch Digital 4 ACK Input Data Output Signal 3 PC s Main Digital Input Memory FIFO Bus mastering DMA data Transfer 1 Digital Input data is ready 2 An REQ signal is generated by external device 3 Digital input data is saved to FIFO 4 An _ACK signal is generated and sent to the external device 5 If the FIFO is not empty and PCI bus is not occupied the data will be transferred to main memory The operation of DO Handshaking PCI D64HU User s Manual Ver 1 0 Dec 2009 12 Digital Output Data 4 O REG 3 ui Output signal Move Data to 5 O ACK Digital Output Input signal a PC s Main Digital Memory Output FIFO 1 Bus mastering DMA data Transfer 1 Digital output data is moved from PC s memory to DO FIFO by bus mastering DMA data transfer 2 Move output data from FIFO to digital output circuit 3 Output data is ready 4 An O REQ signal is generated and sent to the external device 5 After an O ACK is captured steps 2 5 will be repeated If the FIFO is not full the output data
10. otes n 0 7 PCI D64HU User s Manual Ver 1 0 Dec 2009 14 Characteristic of IREQ in External Clock Mode IREQ Rising Edge Trigger REQ mr AE Input Signal gt tH gt a tCYC gt DIO DI31 Valid Data Input Signal q HOLD P tS a tH gt 25ns tL gt 25ns tCYC gt 100ns tS gt 1ns tHOLD gt 25ns IREQ Falling Edge Trigger REQ m A e Input Signal a tH a tCYC gt DIO DI31 l Valid Data Input Signal a tHOLD gt tH gt 25ns tL gt 25ns tCYC gt 100ns tS gt 1ns tHOLD gt 25ns PCI D64HU User s Manual Ver 1 0 Dec 2009 Characteristic of DI Handshaking Mode REQ Input Signal 2 ia Na ACK Output Signal DIO DI31 Input Signal Valid Data Valid Data PO TE pita t1 gt 1ns Ons lt t2 lt 29ns t3 gt Ons t4 gt Ons Ons lt t5 lt 29ns tH gt 25ns tL gt 25ns tCYC gt 100ns Characteristic of DO Handshaking Mode a tCYC gt O REQ Output Signal 12 t3 t O ACK Input Signal tH p SU gt Hoda DOO DO31 l Vaild Dat Output Signal mo t1 gt Ons Ons lt t2 lt 36ns Ons lt t3 l
11. t 36ns tH gt 25ns tSU 25ns 25ns lt tHold lt 61ns tCYC gt 100ns PCI D64HU User s Manual Ver 1 0 Dec 2009 16
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