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1 FM07I4A

1. Scale 10ns Display Pos Ons A Pos 150ns 7 A T 150ns 7 A B 300ns 7 Total 81 92us Display Range 250ns 280ns B Pos 150ns 7 B T 150ns 7 Compr Rate No Bus Signal Trigger Filter 62587 303 63447 552 64307 8 65168 049 60h 239 66888 547 67748 796 68609 045 69469 294 7032 A0 SYNC amp amp eee ee ee a hi 490 490 489 490 489 491 460 516 978 980 981 980 9 F A2 02 z 262144 U A3 A3 l 262144 E M4 a4 a 262144 a5 45 in amp 262144 PRTI Z amp i 262144 PA ar z j 262144 B0 50 Z amp ih 262144 Bi Bi EA amp 262144 B2 62 Z amp ji 262144 B3 B3 262144 B4 B4 X amp 262144 doi eai H ia f gt i STEP 4 Display the function of Multi stacked Logic Analyzer in the Channel Stack Tip There are two Logic Analyzers for Channel Stack the Synchronous Channel is AO the Synchronous Trigger Condition is the Rising Edge the former 32 channels AO A7 BO B7 CO C7 DO D7 change into the 64 channels AO A7 BO B7 CO C7 DO D7 EO E7 FO F7 HO H7 O I7 channels 188 FM0714A Be 32S BPR Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 We ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 E Oj x File Bus Signal Trigger Run Stop Data Tools Window Help e x joe ar ooe SF El BB gt dd 128K z sie i 200MHZz v 50 4 Page fi Cou
2. Filter Delay Setup Activate Filter Delay Select Filter Delay Mode Select Delay Start Point m Delay Time According to Filter Condition start Edge 10us End Edge Min 10us Opposite of Filter Condition Period Delay Max 655 35ms Display Bar Setup Show Bar Bar Style for iginal E Bar Width 10us i Cancel Restore Defaults Help Fig 3 22 Signal Filter Setup Dialog Box The function of Signal Filter is to use an alterable judgment circuit which can filter undesired signals in order to capture and store valuable data in the memory When the combination of input signals from each channel meets the filter conditions the section of acquired data will be gathered by the Logic Analyzer and stored in the memory After storing the data it will return to the Logic Analyzer s system and be displayed as a waveform If the combination does not meet the filter conditions it won t gather and store data 1 S Don t Care means that the Logic Analyzer captures all signals from sampling Filter Condition _ delay time start edge d LY Filter Condition delay time re o start edge Fig 3 23 High and Low Levels It is the system default and displays the input signals satisfying the high level 3 Low Level means that the Logic Analyzer captures and displays the input signals satisfying the low level FM0714A Phe AIR AR ARAE
3. Mins 7 Max 1676157 Fig 6 2 Delay Time and Clock SWO09 How do know the version number of my software interface program A Click Help from the menu See Fig 6 3 and then select About ZEROPLUS Logic Analyzer See Figs 6 3 and 6 4 205 FM0714A O PRE AR hh ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Logic Analyzer Help Fi keyboard Map Problem Feedback kd About ZEROPLUS Logic Analyzer About ZEROPLUS More Protocol Analyzer Fig 6 3 About ZEROPLUS Logic Analyzer About ZEROPLUS Logic Analyser O ZURREOAM2A The Information of the Version ZEROPLUS LAP C Senes Standard V3 1 LAPSA amp LAPS Seres version Standard Y3 12CN01 ZM piii Welcome to we ZEROPLUS Logic Analyzer The document includes the version information of the sofhware a atalksd desoiption imbes referenos company webste Copyright C 1957 2012 ZEROPLUS TECHNOLOGY LTD Webstee hitpe esa roms com be Fig 6 4 The circled information is the version number SW10 How may I upgrade my software interface program A Visit our website at http www zeroplus com tw and follow the instructions for the English version You may also use the following address for English updates http www zeroplus com tw logic analyzer en technical_support php SW11 Can I save my signal data to a separate pure text file txt A This fe
4. BE Te Fale i Bar Bart Ar Ctrl F Fil Fl Alka AIL B E H ESCAPE FQ F F10 Ctrl z Square Waveform Sawtooth Waveform Fig 3 69 Sawtooth Waveform FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 List Data Mode gt Tip Select an Analytic Range M 1 200MHz wu 502 gt Noise Filter Bo Te L The data for list mode are so Bus Width Filter et ee os 178 7 A T Data Contrast x B T many to be convenient for users that 4 Find Data Value Ctrl F there is adding a List Data Mode E esa tm i function The formats for the List Data an ar Add Bar Alt 4 Mode are All Data Sampling Changed z Delete Bar Alt B Tolololololololo Dot Compression and Data Changed B fee ni oa en wa ta de eee pegs eonings nslagsaaal eg Dot Compression glia Rn aoa onelan ens ester id All Data It is the present display a R l NUEN SA O R E E a mode kK Previous zoom GFZ mA m A Data Format eee Sampling Changed Dot Tie wenger Se List Data Mode div AllData Compression Take the sampling EETNEE 55r changed Dot Compression changed dot as the compression dates DEE ee reference dot Fig 3 70 List Data Mode All Data Sampling Changed Data Changed Dot Compression Dot Compression and Data Changed Dot Take the present data change dot as Compre
5. Fig 4 164 Complete Mode 2 Buttons lt lt It is used to find the first packet E It is used to find the previous packet gt It is used to find the next packet gt It is used to find the last packet Option tion It is used to set the relative parameters for the List Window of the Memory Analyzer see the following Option dialog box Bar 4ssignment Reaction Bar Active Display Assignment Display Width Datatyy Alteration og Cancel Default Fig4 166 Option Dialog Box Reaction Bar The default is the A Bar the added Bar can be displayed and selected in the pull down 184 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 menu if users have added a new Bar The data position of the Reaction Bar will be displayed in the List Window of the Memory Analyzer Note The Ds Dp Bar and T Bar can t be displayed in the pull down menu Display Width It is used to set the display width of the List Window of the Memory Analyzer the default is 16 Users can select the 4 8 16 and 32 from the pull down menu and they also can input a value between 1 and 100 Color Users can vary the color of Addr Data R Data W and Alteration as their requirements The default color of the Addr is black the default color of the Data R is blue the default color of the Data W is red and the default color of the Alteration is gray Imp
6. l Packet Length Fig4 44 Protocol Analyzer I2C Packet Length Tip Because I2C has started as the Packet TimeStamp it does not need to use Unknow_Start_Flag as the start 4 Bus Setting Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 1 Busi us 1023s o 1 2 3 4 5 6 7 o 1 j 100m Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data 2 3 4 s5 e6t7f ot yidt2 3 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data i a a ee acket Name TimeStamp Data Data Data Data Data Data Data Data Data I T aos OE Name TimeStamp Jata Data Data Data Data Data Data Data Data Length SC 100ms Packet Name TimeStamp Length 6 Busi us 973s A de eede oaee 100ms Packet Name TimeStamp Jata Length 7 Busi us 9 63s 100ms Packet Name TimeStamp Data Data Data Data Date ta Dat ata Data Eeng l Fig4 45 Bus Packet List Packet Length and Packet Idle Length Packet s TimeStamp is the start of Bus Data the default length is controlled by the setting dialog box If the input packet length isn t the end of data The software will prolong the length of Packet to end the data automatically as the figure below Height Bus oo H j Fig4 46 Auto Prolong Packet The Fig4 46 is a Bus its first data is
7. HADA rT aliyi a Ee er on Bagg oo y bis ij DARASSA AFA D alfe eh jo m p jer ea CE EIEI E E fare lt a Bk ek si Thea E E lrig oey LEE bema oi iii ra Ceipiay Pen 1 TANA ieee Pee etd T Birri Dipin Miga 1 APATA rh ace iso iB Te tithe Beirne batias tao tow at 9 Ti H r i T a x T aa a an PURSUE RAR EMAAR HUN ARNE rrr PT ATE E TAE T kup ETa gup Fogn Euu i F det F MIOR a A in 4 IA LA ana Bih bih i a 37 emia eu h eh m ol rin i rl T FE it 1 F fr l i mpm FT ein ra ee F 13 oe rc r iiim baa aa a j fal Fig 3 83 Mixed Analog Display Decode the data of Protocol Analyzer and show it in image the Protocol Analyzer shall support this function x Channel Diy Setting DSO_CH2 VJDiv J2vjpiv X D50_CH1 Div D50_CH3 V Div 2v Div DSO_CH4 ViDiv 2v Div Channel Setting F Only display DSO MV DSO_CHI MV DSO_CH2 M DSO_CH3 M DSO_CH4 Channel Height Setting DSO_CHI Height so DSO_CH3 Height an Master DSO_CH2 Height 80 DSO_CH Height feo Logic Analyzer C DSO DSO Settings Cancel Default Help Channel V Div Setting Users can select the Options 3V Div 2V Div 1V Div 500mV Div 200mV Div 100mV Div 50mV Div 20mV Div omvV Div and 2mV Div Channel Setting Users can set the DSO_CH1 DSO CH2 DSO _CH3 DSO CH4 the captured waveform will be displayed on the LA Softwar
8. A B 300us 7 Total 20 48ms Display Range 3 317391ms A Pos 150u6 Y B Ta150us Y CompeRste No v Bus Siga Tagger Fare J pii 15 10 5 i 10 15 a a5 YV ws KS Yoxa ox foxx oxg oxi oxi E ox OX X Oxi Xox OKA ox Te OX ox ox toxx Ei ox ox tfoxat axe on Beer UO AN ANA AN ARAN AN on i ems LS Li TLELS LETS LES LES LN eas es j Jmn N _ PE eM A a go te 8 oh g5 g oa ea 124 gt is oils J 4 Endi DEMO Fig4 64 The Latch Function Displayed on the Waveform Area Illustration The selected channel is AO the analysis mode is Rising Edge it indicates that the data of the AO is read at the Rising Edge See the T Bar in the above figure the data of Bus1 is 0X3 125 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 2 12C Analysis I2C Introduction The I2C which stands for Inter Integrated Circuits is a serial synchronous half duplex communication protocol The 2C was first proposed by Philips Semiconductor Netherlands This I2C protocol consists of a very simple physical interface which has only two signal channels SDA Serial Data and SCL Serial Clock Most I2C devices consist of an independently sealed I2C chip and this I2C chip has direct connection to both SDA and SCL The data transmission is a byte base 8 bit base for every segment Since many oscilloscopes do not allow engineers to observe timing
9. Fig 4 74 Protocol Analyzer UART Configuration dialog box Step4 Set the UART Configuration dialog box Pin Assignment UART only needs one channel to decode the signals the default is AO Protocol Analyzer Property Parity Check There are three options on the dropdown menu None Parity Odd Parity and Even Parity and the default is None Parity Data Length Set the Data Length in the range from 1 to 56 Stop Bit Select the Stop Bit from the three options 1 1 5 and 2 and it is stopped in the High Level Percentage Sample Users can select the Percentage from the options 50 60 70 80 and 90 on the dropdown menu and the default is 70 Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB Buss Signal Y Busi UART a40 40 Al l 42 Az Buse Sigral j a Busi UART PEL EFCIS L ean an TETAS Faal ES E B 82 Az o L a Fig 4 75 Data Waveforms MSB gt LSB and LSB gt MSB Baud Rate The dropdown menu has options as below 110 300 600 1200 2400 4800 9600 19200 133 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 38400 57600 115200 230400 460800 and 921600 Users can select the desired value from the menu At the same time The Auto can be selected to calculate the Baud Rate automatically If the Auto is selected the Baud Rate will be calculated and displayed on the
10. il 131 747ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 4 hal A El 4 alls Fig4 114 HDQ Waveform 155 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Arrange the signal channels into Bus P ZEROPLUS LAP C 321000 Standard 3 12 CNO1 S N 000000 0000 HDQ Ds a s ee lp gt o fal Gal amp o all Be 1 143223m eR ne Ay Be Je e Bb le 91 Scale 1 143223ms Display Pos 20 440296ms APos 16 77014m A T 16 77014ms 7 A B 150ns 7 Total 167 674075ms Display Range 8 140281ms B Pos 16 76999m4 v B T 16 76999ms 7 Compr Rate 255 850 Bus Signal 2 424165ms 3 29195ms 9 008065ms 14 72418ms 20 440296ms 26 156411ms 31 872526ms 37 588641ms 43 304757ms 49 020872ms gaoa hll 16 775ms A aT AN TS A TN 131 747ms ie Sampling Setup g Ai fay Channels Sonim a 167 674ms A2 BUS Bus Property i 167 674ms cM Analog Waveform 167 674m5 Image Encode was Group into Bus Ctrl G O 167 674ms g as Ungroup from Bus Ctri U mz 167 674ms d a7 Add Channel 167 674ms gso Copy Channel 167 674ms Delete Channel g BI Delete All Channels z 167 674ms B2 Restore Default Channels mm 167 674ms C B3 Format Row
11. a EHE 3 soo fmn nnm Fa ELIS sa g il i im Foii E ll 3 Pal She 227i Ceni EET e fee tke fime a me m Fe Jee vel Comet al E er eee ee ee LEE aj Teete ieee Geet 2 eer Pert Disi Pen 3 eee AP Sa ibiai uniin a B Pere Tea 3i ciee oc hema Deipeay irae a daeed Pes iwa r k i siti e T Pag ARAIN AP CCPL alin Spr ed Set Mee Gee ee gee ON ai a Fe oe Bah Fe tH a Sa Jen E EN CTENI E _ renaras x a SEEDS Mi si o Hey fe Topp tem ime Fa eha CEL DI paii i Tene 0 oieri 12m Diap Raap haini pi TA B Telit F Cee ee ta a 4 t i ere in aja HEE 7 w pe ak thus Tou gs ka i FE f w vic aoi Fmi 1 we K ima E E J Tii i a 3 ee i h h f e 1214 7 13 941m E i 1391m aE 13 dima s v EENE 43 Sima J Pa it ami Fig3 117 Add a Bar on the Waveform Area FM0714A PRE AR th ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 2 Find Data Value Find Data Value is a very useful tool to help the user to find data on the received signals T Step1 Click the find data value pi icon the dialog box of Waveform Find will appear Step2 Using the pull down menu select the Bus Signal Name The Bus Signals listed on the pull down menu represent the status of the Bus Signal column as shown in Fig 3 118 Fig 3 118 Step3 Choos
12. Bus1 UART 81164 Data Parity B6 Even Parity Data Parity DESCRIBE Parity Error should Low Packet Name TimeStamp Data Par ity 3_ BusiaRT 184247 D9 EvenParity Packet Name TimeStamp Data Parity 4 Busi UaRT 307617 Fig4 79 UART Packet List Packett It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity Packetz2 It is the state of Parity Error the DESCRIBE is Parity Error should Low Note Because the Even Parity and the Odd are impossible to present to the same Bus so we only take the Even Parity for an example here Packets3 It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity FM0714A 7P RE TFS AR 1 BBR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Packet4 It is commonly normal Data which includes 1 Data and 1 Parity its parity is Even Parity Packet Length When judging to the start of UART it is the packet TimeStamp State 1 Having Stop The data start is regarded az The Unknow Register is Unknow_End Flag Packet Timestamp Packet Lenath Fig4 80 Packet Length State 2 No Stop This Unknow Register is general Bus Unknow Te E his Unknow Register The data start is regarded as iia Unknow End Flag Tinestanp Packet f l RX TX ol Facket Le
13. Copyright 1997 2012 ZEROPLUS TECHNOLOGY CO LTD Contact Us Taiwan Chung Ho City Instrument Division Business Department Taiwan Hsinchu City Taiwan Chung Ho City Other Service Departments China Beiing 216 ZEROPLUS TECHNOLOGY CO LTD 3F No 121 Jian Ba Rd Chung Ho City Taipei County R O C Tel 886 2 6620 2225 Fax 886 2 6620 2226 ZIP Code 23585 ZEROPLUS TECHNOLOGY CO LTD 2F No 242 1 Nanya St North Dist Hsinchu City 30052 Taiwan R O C Tel 886 3 542 6637 Ex 87 Fax 886 3 542 4917 ZIP Code 30052 E Mail hunter zeroplus com tw EROPLUS TECHNOLOGY CO LTD Address 2F NO 123 Jian Ba Rd Chung Ho City Taipei Hsian R O C el 886 2 6620 2225 Fax 886 2 2223 4362 E mail service_2 zeroplus com tw ZEROPLUS TECHNOLOGY DONG GUAN CO LTD Room 402 Block D Building 13 Courtyard 9 Dangdai Chengshi Jiayuan Anningzhuang West Road Haidian District Beijing Tel 86 10 51159268 Fax 86 10 51159278 ZIP Code 100085 FM0714A 7p Re EL ea ie BPR A The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 E Mail adam1833 zeroplus com tw kan zeroplus com tw ZEROPLUS TECHNOLOGY DONG GUAN CO LTD Room 605 Building C Area A Huameiju Commercial Center Xinhu Road Bao an 82 District Shenzhen China Shenzhen Tel 86 755 2955 6305 Fax 86 755 2955 6306 613 ZIP Code 518000 E Mail jesse_cn zeroplus com tw ka
14. Zeroplus Technology Co Ltd Users Manual V3 12 Objective In this chapter common problems and questions are roughly classified into five categories Hardware Software Registration Technical Information and Others This is a backup resource for users especially those without Internet access Most references refer to English web links 6 1 Hardware H01 Is it ok to substitute stock items for bundled cables and connectors A Yes users may use any compatible connectors and cables However to ensure consistency and accuracy in measurements and data we strongly recommend using the bundled connectors and cables Each of the Logic Analyzer s is calibrated with the bundled cables and connectors before packing H02 Does Zeroplus manufacture grippers How may purchase grippers A Yes we have a production line dedicated to grippers Contact our sales department and a sales representative will be happy to assist you H03 Is the memory size fixed If I just use one of the ports can expand the memory size A The Logic Analyzer s memory is fixed at 4 megabits Due to current hardware limitations the memory size cannot be modified even as the number of ports used changes H04 Are different external sampling frequencies for different channels possible A No there is only one external sampling frequency available H05 Can I disable or set a certain port to don t care while during compression A No during compression
15. ee EE Fig4 120 Basic Data Frame Start of Frame Every Start of Frame must be 0 which means asking far data to come back Arbitration Field Identifier is 11bits its function is the sequence when transmitting signal numerical value is lower the priority is higher and the array is from ID 10 to ID 0 and the numerical value is not all from ID 10 to ID 4 finally RTR Remote Transmit Request is the judgment bit of transmission or Remote Transmit Request When RTR 0 it denotes that the data goes out when RTR 1 it means asking far data to come back Control Field Control Field consists of 6 bytes including Data Length Code and two Reserved Bits as Peli frame for future expansion The transmission reserved bit must be 0 Receiver receives all bits combining 1 with 0 As the below figure IDE and RBO of Control Field are Reserved Bits which must be 0 and the latter 4bits are only 0 8 which denotes the data behind will transmit several bytes data Fig4 121 Control Field Data Field The Data Field consists of the data to be transferred within a Data Frame It can contain from 0 to 8 bytes and each contains 8 bits which are transferred MSB first CRC Field 16bits CRC the last is a delimiter and the default is 1 160 FM0714A J 7 he AR AR i PR Se The Zeroplus Logic Analyzer f Zeroplus Technology Co Ltd User s Manual V3 12 Fig4 122 CRC Field Ack Field That is the return signal of Receiver
16. 000U A ma A Logic Analyzer 16 Pin Testing Cable 8 Pin Testing Probe 2 2 2 36 3 3 USB Cable Testing Cable Testing Cable LAP C LAP C LAP C LAP C LAP C LAP C LAP C 16032 16064 6128 lt 62000 BEN 28 000 MAESEN Analyzer 16 Pin Testing Cable 8 Pin Testing Cable Probe Cable Start Guide E E E E E CD 6 FM0714A The Zeroplus Logic Analyzer User s Manual V3 12 Phe AIR AR ARAE lt eroplus Technology Co Ltd 1 Pin Testing Cable White 2 Pin Testing Cable Black This Driver CD contains multilingual software interface program as well as multilingual User Manual The following are accessories of LAP C Series which are the same with that of LAP A 2 FEROPLUS as 16 Pin x 1 8 Pin x 2 Fig 1 2 Testing Cable Fig 1 1 Logic Analyzer gan _ A AEROPLLS _ _ cr 4 Fig 1 3 Probe l varied depending on models Fig 1 4 USB Cable ss Er ay Se Mania j H ON a H C i i we E A i j pane ee Fig 1 6 Driver CD Fig 1 8 2 Pin Ground Cable Fig 1 7 1 Pin External Clock Cable Black White FM0714A PRET RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 1 2 Introduction 1 Zeroplus Logic Analyzer models LAP 16032U LAP 16064U LAP 16128U LAP 32128U A LAP 321000U A and LAP 322000U A all share the same external features
17. Bus SignalName AAEE v Next Previous Close v Next Previous Close Min value Max Value ind Min Value Max Value oR is Foo when Found Statistics Start At al Statistics la Statistics Ds i Statistics fo fo Fig 3 124 Waveform Find Dialog Box of the UART Signal TT x Activate the Function of Chain Data Find I Activate the Function of Chain Data Find as Siora t ame ignal Name Bust X Next Previous Close a Next Previous Close JSL C d Min Yalue Max Value Bus Item Find Min Value Max value oooco000000 F A3 When Found Statistics d At When Found Statistics 44 ae pi la Statistics la 7 Statistics 46 o fo a Waveform Find Edf aveform Find xi Activate the Function of Chain Data Find I Activate the Function of Chain Data Find ei j ame Next Previous Close Next Previous Close niini ame Min Value Max Value Bus Item Max Value oooo0000000 F J z when Found Statistics Start At nd Statistics 0 Fig 3 126 Waveform Find Dialog Box of the SPI Signal FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Waveform Find JX ENS xi Activate the function of Chain Data Find Activate the function of Chain Data Find Bus Signal Name ional Name r Next Previous Close Next Previous
18. Cancel Default Help Fig4 103 Protocol Analyzer 1 WIRE Connect Speed Setup STEP 3 Set the Transmission Direction Set the Transmission Direction as either MSB gt LSB or LSB gt MSB PROTOCOL ANALYZER 1 WIRE Configuration Packet Data Format Register Pin Assignment Protocol Analyzer Color Reset Pulse Presence Pulse Protocol 4nalyzer Property Data Connect Speed ranamission MSE gt LSE Direction Data Length fe bit blin 1 Bit M ae 32bit Min 1 Mae 120 Cancel Default Help Fig4 104 Protocol Analyzer 1 WIRE Transmission Direction Setup STEP 4 Set the Sampling Position Users can slightly adjust the sampling position of 1 WIRE This feature is applicable when the signal cannot be decoded The default value is 30us 149 FM0714A He AR AR BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 PROTOCOL ANALYZER 1 WIRE MSB gt LSB 7 Fig4 105 Protocol Analyzer 1 WIRE Sampling Position Setup STEP 5 Set the Data Length This function decides how many bits of data can be combined as one set of figures The default is 8 bits and the maximum is 32bits PROTOCOL ANALYZER 1 WIRE ee a me a Fig4 106 Protocol Analyzer 1 WIRE Data Length Setup 150 FM0714A 4 5 5 2 PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Pro
19. D 7 Busse i Trigger Filter Ea 71 833 E 667 CENIE _ _ 5687 es 10 667 13 167 on 667 Ti A0 4 sZ CES il eis lt _ A3 A Ee a cae A4 Ad SZ Fig 4 20 Bus Trigger Mark 2 Protocol Analyzer 12C The trigger condition is Data 0 the red T Bar displays the trigger condition in order Filter eee Tueee ot i i i ls i i Ph i 14850 s i 140 i i i M Y soBus1 12c 40 4 l 4 g A2 2 g A3 A3 44 A4 Fig 4 21 Protocol Analyzer Trigger Mark Tip The Trigger Mark function is available for the LAP 322000U A LAP C 162000 LAP C 322000 Modules and it is not available for the LAP 16032U LAP 16064U LAP 16128U LAP 32128U A LAP 321000U A LAP C 16032 LAP C 16064 LAP C 16128 LAP C 32128 and LAP C 321000 Modules Task 4 Bus Signal Trigger Condition Setup Highlight a designated signal and then set its required trigger condition 1 Left click to set the signal trigger condition as shown in Fig 4 22 2 Right click f to set the signal trigger condition as shown in Fig 4 23 3 Click Trigger on the Menu Bar and choose a trigger condition from the list of triggers as shown in Fig 4 24 Filter Pus Signal 200us ETE _ 5 a Bus Trigger Setup Al Ai Channel Trigger Setup if Tri
20. E CaP ella fd 7 03 Scale tr ota gt Bagus z lt R ae Be Be He te e oO Heig Display Bange 747 406103us 8 Pos 150us 7 B T 150us 7 Bus Signal o a ee Ai Ai 7 82 4 ow A3 A3 A4 Ad 45 45 6 46 PA 47 1 27ms 1 87 67 19 2ms ga d c2 c2 19 2ms gaa N 19 2ms T 0 J r eady 9 End DEMO Ui Ig 3 1 ooftWare Intemace 1 Menu Bar All operations are performed directly from the menu bar including configure label rename execute and stop Pull down menus allow easy navigation through the measurement panel 2 Tool Bar The tool bar is the graphical user interface which can make you work with some of the more common applications From these icons you can change settings and operate the Logic Analyzer easily Note The prompting information of the shortcut keys has been added in the tooltips of the Tool Bar that is to say when users place the cursor on the icons the corresponding shortcut key information will appear For example the prompting information of the New button is New Ctrl N Ctrl N is the Shortcut Key of the function of New 3 Information Bar The Information Bar displays information about the grids in the
21. The Zeroplus Logic Analyzer User s Manual V3 12 ir CCULaa S ani TELAT eee i Ti a Mid See SAS Go pe ee oe i i m DARA SAN EAD kojm o djs m m p aa en G a EN CA e O S EEE Hes fe Toppe Ceiny Bema bhri Drapia Pon tea a Pont ans Foti Ads hie Tear i0 chr Dann Age HA iiaa Erm i B Te lite F ba ye F a Fij Fi amp a ai hi F a i a a fe F re a Fj FHH Jm a ie wot Toate Pomp ine bia Fig 3 92 Navigator Window under the waveform display area DA CERF Pa Maraid 1 ad ch ited Ser AADS bu pA woe Go __ OF Se BBR FAD ee m ao nom Boe le eee le fo See 8 om lm fie rs FEELS Mw si o Hee fe Tepper tiny ims fe ee bs Chapter Pout Fiia s Oris r kpa jiha Tetai 0 iera one 1 PS etree nimai a id aa 3 Pung HELA P e a a aa aa a a ea an a ae ar a an a ae ee aT E T T rr Tre aan ET An J ial cours zka dii ET Bius a i loot 1era F J ek E E ET n F oF re a js EEJ Fm f re es i 19 amp 19 F h i w P y 4 ky i Fig3 93 Blue Frame in the Navigator Window There is a blue frame in the above Navigator Window Users can click the Left Key of the mouse to select the waveform randomly ce te hated wer Sage fas ink yee pe ail Of 2 Bah Fee A faerie jm Fo zj Pepe ft jo ts BOT onm he Vet eohei be Bie D Hepe e aji C r ma tiwa Deia Pee Pree A Pie kad a To1San F i Tenet i oiri Digia Merge
22. i s Bry Big id ioe ba Iden wa lon toa Ie Tan i ta iia Fig3 97 Display Packet List FM0714A Re AR AR BRAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 a i id Statistics Window SIT TTTTTTe GERE OERE EOE F piy p D o o D FREEEPEREER L E E E E E E E cro 88 fo a eo S980 E Fig3 98 Statistics Window See Section 3 3 for detailed instructions Cascade i EDES EE e wE wa ENEE EDEA ENEE ESEE EA fa aia M O O a Horizontal Ta Euy EEEE ENEH in a nak Ae i a a jin a il HES a Bi ee 1 loz 160 Vertical l 7 mi l SOOSCEECEECRSCOSOOEG EE CA EE EE z LE LE EE OR LE E E aulai elles falls a Fig 3 101 Align Workspace s Vertically FM0714A 7P RE PF AR 1 ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Screen Display When there are two displayers connecting users can select Screen Display oe Double Screen Display to display waveforms on both Me Double Screen Display Se First Screen Display MF Second Screen Display waveforms a First Screen Display or a Second two displayers it is convenient for displaying more Screen Display can also be selected to display waveforms on the first displayer or the second displayer 8 Help Logic Analyzer Help Fl
23. icien a eiiean a snik Ranra aE anie RARI does dhanadeatdnndstbedaans tems 201 S E AIEE I EAEE E EE EE P E E E I css ces E E E A E S EEE TE 202 6 1 FNE serach eee are N E E E E 203 6 2 OONO a E E E E E 205 6 3 EE ENEE p E EE E ENA E E A Geet A E A EA E T 209 6 4 Technical NATO RMAC execatccesueetacinaiasteccasncsancaaigencd tenstnciedienmbncaietianudneecneniaeiiateddenciteivooasmipamnateedod 210 Oo OS a E N eqsantmnussdaanesacannabasieaneeid E 211 ATDOT arae E T E eee eee eee ee eee eee 212 7 1 POY Sarr ec a sete ed care sete carton ann soda eas aaee sande esa eee ve ec ean ve he meant E veatanenndaneaea vem 213 7 2 Serce de setae tsb E aera A A E E E es Ue as duive naa E OT 216 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Preface This Quick Start Guide is designed to help new and intermediate users navigate and perform common tasks with the Zeroplus Logic Analyzer Despite its simple packaging and interface the Logic Analyzer is a sophisticated measurement and analysis tool It is also a highly sensitive electrical current sensing device Users must carefully read instructions and procedures pertaining to installation and operation Any instrument connected to the unit should be properly grounded A pair of anti static gloves is strongly recommended when performing a task with the device To ensure accuracy and consistency of output data use of the bundled components is strongly recommende
24. Bus Hame Operator Bus1 Data Format C Binary Decimal C Decimal Signed f Hexadecimal ASCII C Gray Code Complement Cancel Default Help Fig 4 30 Bus Trigger Setup Tip Left click on Trigger column of the Bus as shown in Fig 4 31 Bus Signal Trigger Single Click on the Left Key Y Busi SA0 40 eal l a2 Az was A3 Fig 4 31 Trigger Column 2 Set Binary Hexadecimal Decimal Decimal signed ASCII Gray Code or Complement as the Data Format of the Bus to represent the value see Fig 4 30 3 Set and Don t Care and type the value of the Bus into Value column to set the trigger condition 111 FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 of the Bus 4 Click OK to confirm the settings Step4 Click Run and activate the signal from the tested board to the system to get the result as shown in Fig 112 4 32 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Set Value is 2 as Hexadecimal and set Operator equals to then click OK Click Run and activate the signal from the tested board to the system to get the result as the trigger happens on OX2 File Bus Signs rigger RunfStop Data Tools Window Help TOL ec gc z TN C iid 10ns R ae fx Be Te de l o1 28 Height 30 Trigger Delay 1
25. Click on External Clock and then select Rising Edge or Falling Edge as the trigger condition of the DUT In the Frequency column type the frequency of the oscillator on the DUT Tip The External Clock is applied when the frequency of the oscillator on the tested board is exceeds the range of the internal clock of the Logic Analyzer Connect the output pin of the oscillator on the tested board to the CLK pin of the Logic Analyzer Step 3 RAM Size Setup Click the RAM Size 12 4 or from the pull down menu in the Sampling Setup dialog box as shown in Fig 4 3 x Exter Er p You have selected the Double Mode Port C Port D and Cr the Functions of Compression Signal Filter Delay and Signal Filter Display Bar are not available under this Note mode IT Don t show me this warning again Sampling RAM Size RAM Size 256K he Channel number will be limited to 16 Fig 4 3 RAM Size Tips 1 The Double Mode is available for the Modules in Table 4 1 except for the LAP C 16032 LAP C 16064 Modules 2 The relationship between RAM Size Signal Filter Mode Compression Mode and Channels as shown in Table 4 1 and Fig 4 3 Table 4 1 RAM Size vs Signal Filter Mode and RAM Size vs Compression Mode and Channels Normal Mode Double Mode RAM Compression RAN Compression A Channels i Size Channels y Model No Size l Mode amp Signal i Mode amp Signal Channels Available
26. Master data output Slave data input MOSI stands for Master Out Slave In MISO Master data input Slave data output MISO stands for Master In Slave Oult SS SS stands for Signal Selector of the master device which is to select signals for the Slave devices CPHA The clock phase CPHA control bit selects one of the two fundamentally different transfer formats CPOL The clock polarity is specified by the CPOL control bit which selects an active high or active low clock Dor rere el ieee l eg ema Fhe ht Faba D shere hang colo hc em Chak Pine Oe epe ae yes e art fhe dba mo ghlae T aHa g ag ag Giggi Folarity 1 where Hng edgen ha ey Clink PRraee Q where wee osteo estore cl uu ce T amela F gt i Tp al 7 TUF er We io Sigaek kiiri SU ara ringing edga Happ ert Gieck Frame whitia wave 2 yecle ri Mi duha ame ee ml s argie LE 4 ee Dig Zk Peder j wiere Halny Sa gies aia Gieck Frage 1 where wore Cycle end Fig 4 82 Clock Polarity and Clock Phases FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 4 1 Software Basic Setup of Protocol Analyzer SPI Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the Falling Edge on the signal of SS which connected to the Signal Selector SS pin of the SPI tested board Step3 Set up the Protocol Analyzer SPI dialog
27. Oe BS BB a El DB dD pb 128K z sie i 100MHz v Ay 10 vie ps Pace fi v Count 5 sae Cal SRR cy f2 t51904u mw R oe Be Be Te le o A o eieh 30 v trigger Delay 10ns Scale 464 TOSKHz Display Pos 17 98377us Pos 120 98us v A T 8 266KHz v A B 3 333MHz v Total 1 310T2ms Display Range 35 813833us E Pos 120 68us v B T 8 286KHz M Compr Rate Ho Bus Signal Filter 25 05431 3um 14 294792us 3 5352flus 7 22425us 17 9837Tus 28 743291us 39 502812us 50 262333us 61 021853us T1 781374us PE 1 1 et ee 1 1 prey fet EN ay Te 1 1 ye Weal 1 1 e E 1 1 1 E 1 1 1 ae fea gaoa Fa x e PA Al sa A2 a2 Be A3 A3 Sg At as Sz as As Sd 46 46 SZ A7 47 SS 80 50 SZ Bi 61 Sz B2 E2 Se Fig 4 14 Trigger Position 10 We ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 LaDoci lI x o File Bus Signal Trigger Run Stop Data Tools Window Help 18 x pemi a K e BB gt po o fi2sk z vie h oom mw a 70 he s Pase fi z comt 5 z AmS amp l 2 151904u a R ae Ay Be Te d Ble ol o Heient 30 v Trieger Delay 10ns Scale 464 TOSKHz Display Pos Ons A Pos 907 41us A T 1 102KHz v A B 3 333MHz v Total 1 31072ms Display Range 53 797604us B Pos 907 11us x B T 1 102KHz v Compr Rate Ho Bus Signal Trigger Filter w 743 038083us 32 278562us 21 519041us 10 759
28. PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 time eo Filter Condition delay time start sl L Fig 4 142 Start Edge 4 144 and 4 145 Filter Condition Filter Condition delay time Filter Condition delay time Fig 4 143 End Edge Filter Condition period delay time Jo EL Filter Condition period delay time Lod L Fig 4 144 Period Delay 173 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Brak Fue 20 395us hs 46us _ J20 355 E f Filter Condition Trigger Condition Pi Porta i m We x Z E i E EK B Baars Trigger Condition 2 lt ee a Pont poe Filter Delay Setup W Activate Filter Delay Select Filter Delay Mode Select Delay Start Point Delay Time According to Filter Condition Start Edge ps o End Edge Min 100ns Opposite of Filter Condition Period Delay Max 6 553ms Display Bar Setup Bar Style original Bar Width 1000s OK Cancel Restore Defaults e Fig 4 145 Filter Delay Setup The delay time of signal AO is 1 us which is the condition of the Filter Delay Setup Step 7 Signal Filter Time Interval 1 Click Show Bar to know the length of the tested and deleted signal as shown in Fig4 146 below Display Bar Setup I Show Bar Bar Style Original Bar
29. Ready End DEMO 7 Fig4 136 CAN 2 0B Packet List Displayed with the Waveform 168 FM0714A PREP ip BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 6 Compression The compression function enables the system to compress the received signal and has more data stored in per channel 4 6 1 Software Basic Setup of Compression Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the trigger edge on the signal or the Bus to be triggered Step3 Click i icon or click the compression function from the Sampling Setup dialog box then click Apply and OK to run Sampling Setup q x Clock Source pelle le clinics een LOMHz Synchronous Clock External Clack f Rising Edge Frequency 100KHz SSS SS Falling Edge in Se File Bus Signal Trigger RunsStop Data almag cug Min 0 001Hz Max 100MHz 7 Mote The external clock voltage level is the same as the port 4 trigger level joe ce it Sampling Setup Fi We Channels Setup ay Signal Filter Setup Sampling Scale N RAM Size Compression Mode Signal Filter Total Group into Bus Ctrl G aay See Data Compression Ungroup from Bus br a m j Signal Filter Setup 3 Channel number will be Expand limited to 32 Collapse Oo B Format Row d Apply Cancel Restore Defaults Help Rename Fig 4 137 Compression Mode Step4 Clic
30. Te i b Amaya ZEROPLUS LAP C Series Standard Vi 12 Fig3 107 Software Version Information Display Window FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Right Key Menu Item Detail Menu amp Dialog Box i Sampling Setup iy Channels Setup Right Key Menu on the Bus Signal Column EUS Bus Property Analog Waveform d Image Encode Tip Reverse The Right Key menu is added on the basis r Group into Bus Ghrl of the Bus Signal menu So the function o oven sass Chel Sampling Setup Channels Setup Bus Property 4dd Channel Group into Bus Ungroup from Bus Format Row Cane Chena and Rename are the same as those in the Delete Channel Bus Signal menu And the function of the Analog Delete All Channels Restore Default Channels Waveform is the same as that in the Tools menu Format Fo d Rename Fig 3 108 Right Key Menu on the Bus Signal Column FI oh Image Encode ee0606666606066666 E Its EEEE SEEEEESEESEEE eeeeeeee ee eee 6 e eoeoeeeeeeeeeeee 6 ee6e 666666060666666 6 eee0e060606660666666 6005 eee0e066606060666666 005 e 666666666666 6 E Jis ee6666666066666 625 e 6666666666666 6 5 ee6e 66666606066666 JES IW Repeat Play Decode the data of Protocol Analyzer and show it in image the Protocol Analyzer shall support this function T3 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus
31. Transmission MSB gt LSB Direction Data Length E bit hie 7 bit Mas 32bit Sampling Position hire 1 hax 120 Cancel Default Help Fig4 101 Protocol Analyzer 1 WIRE Configuration dialog box STEP 1 Select Channel 1 WIRE has only one OWIO Select the channel that it is to link the OWIO PROTOCOL ANALYZER 1 WIRE Configuration Packet Data Format Register Pin Assignmen Protocol Analyzer Color Presence Pulse a B Data Protocol Analyzer Property Connect Speed Standard t us oF Transmission MSB gt LSB Direction Data Length E bit Min 7 bit Mas 32bit Sampling Position Min 1 Max 120 Cancel Default Help Fig4 102 Protocol Analyzer 1 WIRE Channel Setup 148 FM0714A O PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 2 Set the Connect Speed 1 WIRE has two modes Standard 1 us and High 0 2 us The speed setup according to the specifications of the object to be tested and the default mode is standard PROTOCOL ANALYZER 1 WIRE Configuration Packet Data Format Register Pin Assignment Protocol Analyzer Color Ow Reset Pulse Presence Pulse Protocol Analyzer Property onnect Speed Standard us Transmission MSE gt LSE Direction Data Length fe bit Min 1 bit has 32bit Data Minc1 Mae 120
32. Trigger Daley Tus A D Mibu Scale d505bus Display Po APoe 150ua ie T iue 7 Total jima Dis lay Rango 10 23am 10 D Poss Ste O T 140ue Compr Rate ho a a a a a a an wd A Duit Tegger Fite wan a mF ap wal rauu E EE ee om z E E ATT om MMMM LAAN wn x TULA UUUNUUUUUUUUUUUUUUUI r O UUU SEN IPL fcrirloirce eat w Bo mi El re en y H FE g ii a iT a co wen cl ee g g H j m Lred W Fig 4 25 Click Icon to View All the Data ice cs H z OCS A OOO ai 3 Stop to end Run Click the Stop icon to end the Run If the status is Waiting with no signal outputting as shown in Fig 4 26 click the Stop icon to end the Run check the setup again and try the run process again E waiting i Connected Zz Fig 4 26 Waiting Status FM0714A 7P RE PF AR 1 BPR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 2 Bus Logic Analysis Section 4 2 presents detailed instructions about logic analysis with a set of grouped signals which is known as Bus Logic Analysis Basic Software Setup of the Bus Logic Analysis Step1 Set up the RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Group signals into a Bus Click Channels Setup on Bus Signal of the menu bar or click i icon The dialog box shown in Fig 4 27 will appear Group int Exped Co
33. _ An unknown signal waveform is displayed in gray between the high and low levels as There are sixteen channels in LAP 16032U LAP 16064U LAP 16128U LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 162000 and thirty two channels in LAP 32128U A LAP 321000U A LAP 322000U A LAP C 32128 LAP C 321000 and LAP C 322000 Listing Display This interface shows the digital signals as 1 and 0 Logic 1 is displayed as 1 and logic 0 is displayed as 0 Status Area Display Logic Analyzer status The function name is also indicated here FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 1 Menu amp Tool Bars Section 3 1 presents detailed information on the eight menu and thirteen tool items shown in the menu bar The eight menu items are File Bus Signal Trigger Run Stop Data Tools Window and Help The thirteen tool items are Standard Trigger Run Stop Sampling Trigger Content Set Display Mode Windows Mouse Pattern Zoom Data Show Time Height Trigger Delay and Font Size 1 File Mew Ctrl hy t Open Chrl 0 fa ee Ctrl F Close Close the file being worked on Save Ctrl 5 Save As AUG Save Auto Save Save the required file automatically See ee te Section 3 5 for detailed instructions fan Export Waveform Ctrl Shift E Export Waveform Export files into Text txt and CSV F Export Packet List Files csv ia Capture Window C
34. kel Select an Analytic Range rr Noise Filter SSE Bus Width Filter Data Contrast BA Find Data Value Ctrl F E1 Find Pulse width l To the Previous Edge Fil f To the Next Edge Flz Ie GoToTBar T Fi Add Bar Alt 4 Ae GoTo Bar i ag Bar s Delete Bar Alt E B Go To B Bar E i zoom E 60 To More enh Hand H k Mormal ESCAFE E zoom In F3 Mf zoom Cut Fe Show all Data Fig w Previous zoom Chrl F Data Format waveform Mode b List Data Mode Fig 3 54 The selected bar will be shifted to the center of the waveform area addear x Setting Bar Mame C Bar Color a Bar Pos lo Bar Kew fo Fig3 55 Add Bar Amor ae 1 D 7 Baw 4 iif FEL EL Bee G N Baga tt a egmay ties eae 2 Si Cea Pea d ee ne tes fait fh i Te ji Cone Barge Tee P Fes art ats Pike Comes Pm tee Ban a lie a wa aul fi 5 g 4 H 4 a a z a il sssr cirina Pee eee ee Cee ee ee ee ee ee tiii Eaa T ka jaa a i aoi cae i oe en 7 rt eos Soe maa loo De O 1 Than m m a o a at a au 1 a i CEN Fa lt _ 2 j Fe E Fn aaae JE x B eo rer z i ra If re ll ld weer ro wer wo i m fines wu a f HoU hel al a j H b Fig3 56 Add a Bar with the number between 0 and 9 FM0714A 50 O PENRO BRA lt eroplus Technology Co Ltd mh Delete Bar Alt 6 aF Delete a user defined bar 1 Click the above menu item from Da
35. keyboard Map Problem Feedback P About ZEROPLUS Logic Analyzer About ZEROPLUS More Protocol Analyzer Fig 3 102 Help Menu Menu Bar Help Menu Item Detail Menu amp Dialog Box Logic Analyzer Help Fi E Hi fH User Maniis file Keyboard Map Fig 3 104 The Table of Keyboard Map 71 FM0714A 72 Fe RAR 7 BPR S lt eroplus Technology Co Ltd Problem Feedback About EROPLUS Logic Analyzer About ZEROPLUS More Protocol Analyzer Tip The function of Software Version Information Display for ZEROPLUS LA means that the software will open a small window which displays the software version new functions and bug modifications when activating the software It is convenient for users to know the information of the present software version The Zeroplus Logic Analyzer User s Manual V3 12 Abouk ZEROPLUS Logic Analyzer LAPsA amp LAP Series O SPULPLES A ARB version Standard 3 120CN01 favo ples THH Co Lil S N 000000 Tern The Information of thes wersion ZEROPLUS LAP C Senes Standard V3 1 Welcome to we ZEROPLUS Logic Analyzer The document includes the version information of the sofware a Dataiad desorption imbes referenos company webste Copyrighb c 1997 2012 ZEROPLUS TECHNOL Gar O0 LTD Webe hitpcilwew rerom oom be Fig 3 106 Copyright About ZEROPLUS Logic Analyzer Open the website of Zeroplus Technology to know more modules
36. which has 2 bits and the final is a delimiter whose default is 1 If receiving success Ack will send back 0 then the transmitter knows the Receiver has received the data End of Frame 1111111 denotes en Peli Data Frame In the Peli Data frame Data Frame as follows the frame of message is separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field Ack Field End of Frame However the parts of Arbitration Field have much more than 18bits and the SRR and IDE are 1 Fig4 123 Peli Data Frame Remote Transmit Request Frame When RTR 1 it denotes Remote Transmit Request Frame at this time DLC3 DLCO are the Data bytes of return data And the frame doesn t have Data Field Fig4 124 Remote Transmit Request Frame 161 FM0714A o PRENAR ie BPR ol The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Error Frame The Active Error Flag consists of six consecutive Data Field dominant bits Dominant bits violate the law of bit stuffing All bits can produce Error Frame after recognizing bit stuffing wrong the Error Frame called Error Corresponding Error Flag Field includes sequence bits from 6 to 12 which produces by 1 or more nodes Error Frame ends in Error Delimiter field After Error Flag sends out Bus actively to get the right state and the interrupted node tries its best to send abeyant message Error Delimiter Error Delimiter consists of eight recess
37. which is convenient for users to know the current data status of each channel There are two display mode see as below Logic Mode x Fort 4 Af Low Level High Level Logic Mode Display xi Port amp Port B Port C Port D 40 8 833KH2 BO 31 218MHz CO 29 689MHz DO 6 259MHz Al 20 44KH2 B1 2 569KH2 cl 23 841KH2 D1 22 499KHz 2 20 171MHz B2 12 162MHz C2 24 305KHz D2 27 139KHz 43 5 066KH2 B3 2 844MHz c3 10 879KHz D3 11 849KHz At 30 558KH2 B4 29 986KH2 C4 23 587MHz D4 21 341KHz 45 31 622MHz B5 26 229MHz cs 2 598KH2 DS 3 451MHz 46 24 848KH2 B6 3 785KHz C6 28 136KHz D6 25 722KHz A 13 492MHz B7 10 727KHz ery 9 039KH2 D7 32 608KHz Frequency Mode Display Fig 3 91 Navigator Window FM0714A PRE IZA RS Zeroplus Technology Co Ltd Logic Analyzer The Navigator displays the waveform length of all the captured data it only can display the waveform of the data of four channels In the Navigator Window users can click the Left Key of the mouse to select the waveform randomly The selected waveform keeps pace with the waveform in the waveform display area The size of the selection frame is in inverse proportion to the Zoom Rate the larger the Zoom Rate is the smaller the size of the selection frame is Users can also click the Right Key of the mouse to select the displayed channel
38. 0x00 and its length is 1023 If users input 20 as the Bus length But 20xaddress is not the end of this data so the software will prolong the length of the Packet to 1023 automatically 118 FM0714A Be t 42 A 13 BPR Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Bus Fig4 47 Packet End The Fig4 47 is a Bus If the Start of the packet is T bar and the set Bus length is 20 but the data 0x02 isn t the end at that time the Packet will be prolonged to the end dot automatically that is to say the Address 27 B bar is the End of the packet The above two data are made consecutively as the figure below 96 R ae Be Be Ey dy Ba le m Eee A Pos 1023 T 1023 E Fos 27 B T 27 Fig4 48 Auto Prolong Packet The Packet List is displayed as the figure below Setting Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length El o 1 2 3 4 s5 6 o j Packet Name Timestamp Data Data Data Data Data Data Data Data Data Data Length 2 3 4 5 6s t7 ofitste2z 3 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 4 5 6 7 o 2 3 4 5 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length A J ed a te Packet Name TimeStamp Data Data Data Da
39. 266KHz v A B 3 333MHz v Total 1 31072ms Display Range 22 239786us B Pos 120 68us ly B T 8 286KHz M Compr Rate No A Bus Signal Trigger Filter 18 567805us10 895824us 5 223843 faase 84ns6 120118us_ 11 792093us 17 46408us 23 136061us 28 808042us 34 480023us Fig 4 8 Trigger Count Screen Shot 2 Step4 Trigger Page Delay Time and Clock The Trigger Page and the Delay Time and Clock can t be applied at the same time 1 Trigger Page Click Trigger Page then type the numbers or select the numbers from the pull down menu of the Page Page 1 gt on the Tool Bar or click the pull down menu of the Trigger Page on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 9 4 10 and 4 11 The selected page numbers will be displayed on the screen Tip The Trigger Bar T Bar will not be displayed when the setup of the Trigger Page is more than 1 Trigger Property cf Trigger Content Trigger Delay Trigger Range Trigger Page Delay Time and Clock Trigger Delay Time 200ns Min 200ns Max 3 355238s Trigger Delay Clock _ Min 1 Max 16776191 T Pos Ons Start Pos 204 6us End Pos 205us Note When more than one trigger pages are selected the trigger bar disappears from the view Cancel Default Help ng 4 9 ee Page L l0j x a Ein eea Trigger Flunf
40. AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 6 1 Software Basic Setup of Protocol Analyzer HDQ xl Configuration Packet Data Format Register Pin Assignment Channel Time Settings us Break iso 1000000 Recover jo foon Host 1 booo pii Device 1 jo fo Host 0 so 18 Device D feo hea Host Bit 130 260 Device Bit 190 2000 I Response 799 Remark 1000000 iz infinite Protocol Analyzer Color Break Recovery Address Read Wa ibe Data Cancel Default Help Fig4 112 Protocol Analyzer HDQ Configuration dialog box Set the HDQ Configuration dialog box Pin Assignment HDQ has only one signal channel therefore it only specifies the name of the channel and marks the selected channel Protocol Analyzer Name Display the name of the selected Bus Channel Preset as AO Timing Settings us Set the time for Break Address Read Write Data and Recovery Protocol Analyzer Color Users can vary the colors of the decoded packet 154 FM0714A 7P Re RAR ARAN The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Operating Instructions Open the LA operation interface F ZEROPLUS LAP C 321000 Standard 3 12 CNO1 S N 000000 0000 LaDoc2 Fig4 113 Operation Interface Sample the HDQ signal or open the sampled waveform E ZEROPLUS LAP C 321000 Standard 3 12 CNO1 S N 000000 0000 HDQ
41. Bar in the middle area ff Show Tooltip IY Open Close Double Warning mi When the roller i moved toward back the Time Axis in the waveform area will move toward right Data Process What do you want to show when you press the Stop during the running Keep the Present Data Read the Captured Data lw Check for Update Restore Defaults Fig 3 140 Customize the Display Mode by Using the Tool Bar fut Sampling Site Display 4 Time Display 5 fay Sampling Site Display i Time Display Frequency Display Hide time oF waveform Fen Frequency Display Hide time of waveform Fig 3 141 Tool Bar Waveform Display Mode There are four display modes to determine the method of capturing data from sampling Sampling Site Display Time Display Frequency Display and Hide time of waveform 85 FM0714A Zeroplus Technology Co Ltd User s Manual V3 12 O PRE AR th ARAS The Zeroplus Logic Analyzer 3 4 2 Modify Ruler Mode Use the menu to modify the Ruler Mode Go to Tools and click Customize See Fig 3 142 x Common setup Toolbars Shortcut Key Auto Save Waveform Display Mode Sampling Site Display Frequency Display Time Display Waveform Setting Waveform Height 22 C Regular Ruler f Time Sampling Site Ruler Font Size 12 E Fig 3 142 Ruler Mode Regular Ruler Fig 3 143 Scales in Regular Ruler Time Sampling Site Ruler Oris hs ang 20ng H Zong ar
42. CYCH as shown by the dotted line in the following figure Conversely if it is the write 1 status after t HW1 period of time the signal will convert to High and last throughout the period of t CYCH which is of 1 bit and no less than 190 us The t HW1 range is from 0 5us to 17us and no more than 50us The t HWO0 range is from 86us to 100us and no more than 145us Read Write Read Write is 1 bit 0 and 1 are displayed in the same way as the above description T RSPS The High signal lasts a period of 190us 320us The following 8 bit data is Send Host to BQ HDQ or Receive from BQ HDQ Data Data Made up by 8 bits and it is Send Host to BQ HDQ or Receive from BQ HDQ Data It operates in the same way as in 2 2 and the data is from LSB to MSB BQ HDQ To Host If the data transmission is read by BQ HDQ To Host the initial Low signal lasts a period of t DW1 and if the write 0 status continues through to the end of the t DW1 period the signal will convert to high and last throughout the period of t CYCD as shown by the dotted line in the following figure Conversely if it is the write 1 status after t DW1 period of time the signal will rise and last throughout the period of t CYCD which is of 1 bit and ranges from 190us to 260us The t DW1 ranges from 32us to 50us and no more than 50us The t DW0O ranges from 80us to 145us j lapi ni E T T Eoad a rc Fig4 111 Signal from BQ HDQ to Host 153 FM0714A PRE R
43. Close Bus Item Find Min value Max Value Bus Item Find Min Value Max Value CIEE j 00000000000 fF inRange o0000000000 fF when Found Statistics en Found Statistics la x Statistics my Statistics o fo Fig 3 127 Waveform Find Dialog Box of the Bus Item of the SPI Signal Step4 Choose the position to start the search by selecting one of the following Start At Ds T A B C etc End At Dp A B C etc Then click Next or Previous to search it When Found Choose a Bar to mark the result A B C etc Step5 Click Statistics to show the number of instances of the search results Note Itis available only when searching through a Bus Scale 3 04126ns Display Pos 10 15us Pos 10 15us v iA oe Sh ISi v Total 20 48us Display Range 10 226032us B Pos 150ns v B T 150ns v aea T 710 210826u 10 19561 3ur10 18041 3us 10 165206us Leos 20 134734us 10 113 as eens ns nes ono ne np noo na OX Bus Signal Tave vefer FAN xjhs Activate the function of Chain Data Find DIJ lial Name Previous Close was As Max Value A A Start At en Found Statistics 60 B0 bs x Statistics g 61 61 Address 1015 lea B2 2 DCi afm na KA sa Fig 3 128 The A Bar is placed at the 0X08 of Bus1 where the condition of the Waveform Find is set The Statistic of Waveform Find shows a 64 Scale 2 3576ns Displa
44. Co Ltd User s Manual V3 12 4 9 Data Contrast In order to make users analyze the Data and contrast the difference of Data easily there are adding the function of Data Contrast The function of Data Contrast is used to compare the difference of two signal files of the same type One is the Basic File and the other is the Contrast File It can line out the different waveform segments of the basic file in the contrast file Meanwhile it can count the number of the difference 4 9 1 Basic Software Setup of Data Contrast STEP 1 Click Data on the Menu Bar then select y to open the Data Contrast Settings dialog box Data Tools Window Help Pii Select an Analytic Range rr Moise Filter S82 Bus Width Filter Data Contrast HA Find Data value Ctrl F Fo Find Pulse Width 178 IV Activate Data Contrast m Contrast Files Files Display Mode Basic File LaDoct zl V Display files horizontal Contrast File fLaDoc2 z K Roll the contrast waveforms synchronization Contrast Beginning Point q r Contrast End Point Error Tolerance iii I Display files the contrast differences Ds id Dp None ka lt lt Hide Result Pin Assignment Perform Contrast Provious Next Close Contrast Statistics Fig4 153 Data Contrast Interface Activate Data Contrast Click the checkbox to activate the function of Data Contrast Basic File It is the standard contrast file Cont
45. Configuration dialog box automatically Data Reverse Decoding When the option is selected the data will be decoded in reverse Bus Signal Busi UART ag 40 Bus Signal YV Busi UART aA0 40 Using the reverse data level to decode Fig 4 76 Without With the Reverse Data Level for Decoding Protocol Analyzer Color Users can vary the colors of the decoded packet Step5 Press OK to exit the dialog box of Protocol Analyzer UART Step6 Click Run to acquire the UART signal from the tested UART circuit Refer to Fig 4 77 Tip Click EJ icon to view all data and then select the waveform analysis tools to analyze the waveforms E ZEROPLUS LAP C 32128 Standard 3 12 CNO1 5 N 000000 0000 UART ol xj So File Bus Signal Trigger Run Stop Data Tools Window Help 18 x De am gap gT m gt Db 128K vile 100MHz nu mw 50 Ke Page fi Count fi RE gt all faaaoga me R a Bx By Te ke 25 4 Height 26 Trigger Delay Scale 40 480984us Display Pos 27 080556ms A Pos 167 75851ms A T 167 75851ms M A B 300ns 7 Total 335 18149ms Display Range 26 068531ms B Pos 167 75821m 7 B T 167 75821ms Compr Rate 255 723 YV Busi UART er v0 a g LP Lf Li SL g A2 42 g A3 A3 A4 i4 gas a5 6 A6 47 47 80 50 81 Bl g B2 2 w B3 B3 B4 B4 B5 65 B6 B6 B7 57 g co co g ci ci c2 c2 z Co g x amp 4 MAK sial
46. Ctrl 2 Return to the last zoom Binary Decimal Decimal Signed iw Hexadecimal ASCII Gray Code Complement Fig3 67 Data Format Show numerical information in Binary Decimal Decimal signed Hexadecimal ASCII Gray Code or Complement FM0714A 54 Phe AIR AR ARAE lt eroplus Technology Co Ltd Waveform Mode iw Square Waveform Sawtooth Waveform Pii Select an nalytic Range ert Noise Filter S02 Bus Width Filter Data Contrast BA Find Data value EA Find Pulse Width l To the Previous Edge Tio the Next Edge 30 To Add Bar W Delete Bar Bar be zoom dmh Hand Normal TL K zoom In Zoom Gut Show all Data we Previous zoom Data Format Waveform Mode List Data Mode Fig 3 68 k l Select an 4nalytic Range nati Noise Filter zz Bus Width Filter x Data Contrast BA Find Data Value EA Find Pulse Width l To the Previous Edge f To the Next Edge 0 To Add Bar ar Delete Bar Bar Fe Zoom any Hand R Mormal mmu g zoom In Zoom Cut aa Show all Data T Previous zoom Data Format waveform Mode List Data Mode The Zeroplus Logic Analyzer User s Manual V3 12 tl hi 200MHz Bo Te 2 Ba Bar Bar Bar ns 179 Ctrl F Fil Fle F Alki AlL B CLL UU UU UU PULL pagpa ESCAPE F3 Fa _ Ctrl 2 diy Square Waveform b Sawtooth Waveform
47. D Port will be set to be disabled H06 Why does the Logic Analyzer feature negative voltage calibration A This allows users to analyze any given signal H07 How do l adjust the Trigger Level A The adjustment of the trigger level is done with a port which consists of 8 channels The trigger lever can only be adjusted for an entire port H08 Does the Logic Analyzer use hardware or software compression technology A For time efficiency the Logic Analyzer uses hardware compression H09 Is planning an Analyzer that can handle more channels A Yes we are working in this direction H10 Does the memory page vary when the depth of the memory changes A Yes the depth of memory changes the memory page H11 Is the Logic Analyzer expandable How may I expand it A Yes the Logic Analyzer is expandable At this stage you can expand it with external module devices H12 Why must reinstall the driver every time use a different Logic Analyzer A Since each Logic Analyzer has unique serial numbers you must reinstall the driver every time you change the Logic Analyzer H13 Why is there no data Why does data sampling seem inconsistent A The reasons are varied but you may follow this checklist for troubleshooting 1 Always check the USB connection between the Logic Analyzer and your PC 2 We strongly recommend using USB ports in the rear panel of a PC these ports usually have better voltage stabilities than front panel p
48. Dialog Box Check the box to enable the Analytic Range to be changed by dragging the Ds and Dp bars with the left mouse button Noise Filter It can filter 0 10 Clock s positive pulse width or negative pulse width signal Noise Filter x Fig3 43 Noise Filter See Section 4 8 for detailed instructions Bus Width Filter x cne Fig3 44 Bus Width Filter Select the check box to activate the function of the Bus Width Filter in the dialog box and then users can input the corresponding value of the width to be filtered in the right edit box Input the time value of the width when the display is in the Time Display or the Frequency Display and the unit is based on time such as s ms us etc if the inputted value is out of the range it will switch to the best time value in range Input the clock value of the width when the display is in the Sampling Site Display and the range of the input is from 1 to 65535 For example after activating this function and then input the value 5ns The Bus Data which is less than or equal to 5ns will be filtered as the figure below FM0714A 45 7P RE FR AR i ARA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Fig3 45 Before and After Filtering IV Activate Data Contrast Contrast Files Files Display Mode Basic File Laboct z J Display files horizontal Contrast File JLaDoct z E Roll the contrast waveforms synchron
49. Filter Mode ug Available Filter Mode 16 16 16 LAP 16064U 2K 64K danek Available 128K hannes Disable 2K 16 16 l LAP 16128U 128K channel Available 256K dareE Disable 99 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 2K 32 16 128K channels Available 256K channels 3 16 LAP 322000U A 2K 2M 32 Available 4 16 Disable channels channels 1 K 2K 1 16 LAP C 16128 tak channels Available 256K na els Disable 1 16 LAP C 162000 2K 2M paS Available Pace Disable 2K 32 16 LAP C 32128 tak channels Available 256K na els Disable 32 16 LAP C 321000 2K Available 2M Disable channels channels LAP C 322000 2K 2M 97 Available 4M o Disable channels channels Task 2 Trigger Property Step1 Click i icon or click Trigger Property from the Trigger on the Menu Bar The dialog box will appear as shown in Fig 4 4 LAP 32128U A Disable M M 1M 2 6 6 LAP C 16064 2K 64K oraes Available 6 6 1M Trigger Property X E Bus Trigger Setup YT gg P Trigger Content Trigger Delay Trigger Range 4 Channel Trigger Setup 2 Trigger Property j Trigger Mark m Trigger Level Trigger Count ra l i z Min 1 Max 65535 ei Dont Gare eee Hight fet Cow we Rising Edge i Falling Edge esa Either Edge Cancel Default Help Fig 4 4 Trigger Proper
50. Height Scale 9 331053us Display Pos 3 084115ms APos 150us A ae 150us 7 A B 300us e Total 20 48ms Display Range 3 317391mMs B Pos 150us 7 B T 150us 7 Compr Rate No Bus Signal ee pais oa rae aa ae aie eras ar a ay ar ib a _ 20 aa ae Y a JUUA O0 Ao eW U U UU UU UU UU UU UU UL L one O LE LET LEL LEE LEE LE Oaz az x OUT LOUT 0T LUT L f TI a a Pat 4 x S rT 4 g A5 45 S 16 46 A 47 60 50 Bi Bi B2 62 B3 B 4 IF gt Setting et Export Synch Parameter zi Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data a o 1 2 3 4 s 7 o Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length __2__ pusi us 1013ms 2 3 4 s 6 7 o 1 2 3 105 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 3 Busi us 10 08ms 4 5 6 7 o 1 2 3 4 5 imus Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length Bus1 Bus 6 ej A fe ee 8 ee wf E a a a I I O T Ready End DEMO a Fig4 39 Bus Packet List Packet List has a setup window users can set up the Packet List according to their requirements Setting Bus Packet Length in dialog box is only used for doing Bus Statistic Users can define how long the time is as a 115 FM0714A 7P Re TA FRA i BRAJ The Zeroplus Logic Analyzer Zeroplus Techno
51. LAP C Series FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Table 1 2A List of Functional Pins in Each Model LAP LAP LAP LAP LAP LAP Models 16032u 16064U 16128U 32128U A 32100U A 322000U A Port A AO A7 Port B BO B7 Port C Table 1 2B List of Functional Pins in Each Model LAP C LAP C LAP C LAP C LAP C LAP C LAP C 16032 16064 16128 162000 32128 321000 322000 Port A aa Port B ao Port C x CO C7 Port D DO D7 L L 2 O es lt o A O O Table1 3 Definitions and Functions of Pins for All Models Connect a given external module to be analyzed Two pins used for grounding the Logic Analyzer with a given Ground external module to be analyzed Table1 4 Definitions and Functions of Pins for Advanced Models 1 When the Logic Analyzer is about to upload data from the Read Out memory to the PC the R_O will send a Rising Edge signal of DC3 3V When the upload is finished a Falling Edge signal is sent When a user initiates a sampling task by clicking the RUN Start Out icon in the window or clicking the START button on the device the S_O will send a Rising Edge signal of DC3 3V When a trigger condition is established the T_O will send a T_O Trigger Out Rising Edge signal of DC3 3V When the memory is full a Falling Edge signal is sent 10 FM0714A PRE RRD ARAS The Z
52. LAP CJZ Standard W312 C01 She La lo Saw Elle Balya Trigger PuanfSheg kto Josi yireker bii all Oe el wm n l e be IESE ia onene ov Se lt 4 Page 1 Count fi l Mus E E ji rllig g i ae 4 __ Mi Ae _ a a Mai rigger oiny Tee Teter 20 sems p Display Range 260us 280us A Pos 150us B T 150us Compe Raie Ni o Ruttas Tagger ree E m 4 00 5 bd 5 m 4 ka m H Faa gt AL Al k4 waza g ak a g id ii ga a P wear ay a eDi D BE E om F aa zi ann a ells J j ba be Fig 3 139 The Interface Layout Shown in Default Settings 84 FM0714A Zeroplus Technology Co Ltd User s Manual V3 12 O PRE RRD ARAS The Zeroplus Logic Analyzer 3 4 1 Modify Waveform Display Mode To modify the display mode users can use icons on the tool bar box or menu For the menu go to Tools and click Customize See Fig 3 140 Customize Color Setting GUS Bus Property ae Refresh Protocol Analyzer me Multi stacked Logic Analyzer Settings Analog waveform i Waveform Display Mode Sampling Site Display Frequency Display Hide time of waveform Image Encode Ruler Mode Regular Ruler Waveform Setting Waveform Height 26 O50 stacked Settings f Time Sampling Site Ruler Font Size le Correlated Setting W Auto Close IY Open Close Compression Warning Show Gridline W Show the T
53. Mode the system doesn t support the function of Filter Delay How do update software The software will automatically check for and download updates This function deletes old software first and then downloads and installs the latest version FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 6 5 Others OT01 How was the Logic Analyzer developed A It took us more than two years to develop this product We envision Everyone carrying the Logic Analyzer and we would like to make some contributions to the electronics industry in return We also wish to transform the stereotypical OEM factory into a world class R amp D center OT02 Why is there a rich information database for game chips rather than the Logic Analyzer A First of all we apologize for any inconvenience caused by the lack of information pertaining to Logic Analyzers We are currently working very hard on multilingual information and documentations pertaining to the Logic Analyzer Visit our website for the latest drivers software and manuals http www zeroplus com tw logic analyzer en technical_support php In the meantime we will have updates ready when verified error free OT03 What was the original intention of developing this item A Originally the Logic Analyzer was just for use by our engineering department Later on we saw the greater need for this kind of device We made numerous enhancemen
54. N code of them The M1 indicates the first Logic Analyzer and the M2 indicates the second Logic Analyzer M3 and M4 are similar to the previous Users should select two or more Logic Analyzers but the most analyzers users can select is four Synchronous Channel Select the synchronous channel form the pull down menu The default synchronous channel is AO Synchronous Trigger Condition Select the synchronous trigger condition Users can select the Rising Edge Falling Edge High and Low from the pull down menu The default is the Rising Edge The function of the Synchronous Trigger Condition can only be used in the Channel Stack that is to say it is disabled in the Memory Stack STEP 3 Display the function of Multi stacked Logic Analyzer in the Memory Stack Tip There are two Logic Analyzers to do the Memory Stack the Synchronous Channel is AO the data on the left of A Bar is captured by the first Logic Analyzer the data on the right of A Bar is captured by the second Logic Analyzer P ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 j Oj x File Bus Signal Trigger Run Stop Data Tools Window Help 18 x Dg aai Aole e lR p o i28kK z oie i 200mhz ou 50 ie Page f 7 Count fi zil Gal a R Ri amp iid 0 5812272 AS oe fe Bo Te t BA le Sl Ne Height 28 Trigger Delay
55. Pon A I 9 Fon E 1 5907 Port E 1 504 Trigger cound i Trigger page l YY Data Lesnegi in BARA es Teal Length 404 burn f Chane mame AAD AP AS Ad AS AB AP ABAD AIG AL ALZATI ATA ADS BOB B BS HA BS EGE ERRIBIORID RIZBISRIABIS Fig 3 12 Pure Data Form 7 Capture Tindor l Mote 21x Capture to i File clipboard i MsPaint Capture Region Full Screen Select Region E Select Line Color z Color of the Wote gt V Opposite of Color Cancel Fig 3 13 Capture Window This feature is equivalent to Alt Print Screen or Print Screen Capture to File Save the captured image as either a jpeg or bmp Clipboard Copy the captured image to the clipboard for use in other applications MsPaint Directly start MsPaint to view the captured image Capture Region Full Screen Capture everything on the screen Select Region After pressing the capture button a cross hair will appear on the screen Left click the mouse button to drag an area to capture Select Line Color Click the color box to change the color Opposite of Color Click this check box to ensure that the note text will be the opposite of the line color Color of the Note Choose the color of the note text Note Type in a note to attach to the captured image Capture Click the button to capture the image FM0714A 7P RE t 32 21 PRD S The Zeroplus Logic Analyzer Zeroplus Techno
56. STEP 3 Display the contrast results in the waveform windows See the figure below Tip It contrasts the two data files in the waveform area The contrast waveform and the basic waveform are displayed horizontally we can roll the mouse to contrast the waveform files the difference of the waveforms will be lined out with the red wave line in the contrast files 179 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 E gt ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 LaDoc 2 File Bus Signal Trigger Run Stop Data Tools Window Help iit ia BE oh eT OB DDD ite 1 v nme a 150 vhi He Page 1 lk gt i 2 682784m 4 R zy Ay Be Te to BB le 2 QD PS i Height 30 Trigger Delay 20ns Font Scale 2 662T64ms Display Pos 5 24266ms A Pos 140 000111ns A T 140 00011ins A B 140 000408ns v Total 10 48576ms Display Range 5 24286ms 5 B Pos 0 000297ns v B T 0 000297ns v Compr Rate Ho 58 8985dms 45 48462ms 32 0707ms 18 65678ms 5 2428 8 17106ms 21 58498ms 34 9989ms 48 41282ms 61 8267 SS e 16 775ms 167 674ms 167 674ms 167 674ms SSE Se Fig4 155 Display the Contrast Results in the Waveform Windows Tip The Data Contrast function is available for the LAP 321000U A LAP 322000U A LAP C 162000 LAP C 321000 and LAP C 322000 Modules and it is not available for the LA
57. Width 1 ns OK Cancel Restore Defaults Fig4 146 Display Bar Setup 2 The bar has two styles which are Original and Bar the default is Original style which denotes the bar function cannot be used When selecting Bar style the bar function can be activated 3 Bar Width when Bar style is selected the bar width can be set by users Tip The minimum bar width is 1 the maximum bar width is 65535 If the value exceeds the range or the font is not according to the requirement a tip window will appear Signal Filter Time Interval is denoted by Bar Fig4 147 Signal Filter Time Interval 174 FM0714A 2p Re et Fe he ie B PR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Tip The Signal Filter Time Interval is limited under the following situations A The Filter Delay and Display Bar of Signal Filter are not available under the compression mode B The Filter Delay and Display Bar of Signal Filter are not available under the double mode C The final two data are NULL D Logic Analyzer supports the Signal Filter Time Interval function on condition that the time interval between signal filter must be more than two clocks 175 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 8 Noise Filter The Noise Filter function enables the system to filter the waveform that doesn t meet users requirements 4 8 1 Basic So
58. a z aj et a ot as 4 tim b Fig 3 52 Pulse Width Find on the Waveform Window Go to the previous edge sweep of the indicated signal Go to the next edge sweep of the indicated signal Go To T A B or Go To More T O AS O EONI OHE Hig JUMI AOD I Fig 3 53 Go To T Bar T Bar will be displayed in the center of the waveform area FM0714A lt eroplus Technology Co Ltd O PP BBA 5 AS 1 5 BRA The Zeroplus Logic Analyzer User s Manual V3 12 Tip T Go To T Bar T gt 1 A GoTo 4 Bar i 2 B Go To B Bar B gt 3 G0 To More 1 Press T go to T Bar 2 Press A go to A Bar 3 Press B go to B Bar Add Bar Alt A Bar Add user defined bars 1 Click the above menu item from Data menu or click Add Bar icon from Tool Bar 2 Give a Bar Name define a Bar Color and set a Bar Position 3 Define the Bar Key with the number between 0 and 9 Tip The number shortcut is set in the Add Bar dialog box Every new bar can be filled in one number which is used to find the required bar faster the default number of the new bar is 0 It is noticed that once the number key is set it can t be modified and each new bar can named with the same number that is to say one number can name many bars For example users can set the number 3 as the shortcut key When users press the number 3 key the C Bar will be displayed in the centre position of the screen 49
59. adding and deleting channels the software reserves the original waveform not select this function the waveforms in channel are cleaned up Signals can be grouped into Buses by pressing Ctrl G Signals can be added deleted copied and grouped into Bus using the mouse or the keyboard or right click and select the desired operations from the pull down menu The movement of a signal channel are Auto Size not available in waveform display Move Left Up Move Right Down Hide Show All and Color Ungroup signals from Buses by pressing Ctrl U A Bus contains at least 1 channel In order to see these channels click the symbol before the Bus name Bus Signal gt Bus1 g a2 42 w A3 A3 a4 a4 g a5 45 46 46 FM0714A 38 Tip Phe AIR AR BPR lt eroplus Technology Co Ltd Collapse Format Row d Format Row Auto Size it is not available in Waveform Display mode Move Left Up change to Move Left in Listing Display Move Right Down change to Move Right in Listing Display Hide Show All Color Rename The Zeroplus Logic Analyzer User s Manual V3 12 Fig 3 26 Expand If the Bus has been expanded click the symbol before the Bus name to Collapse the Bus Y Busi ve A0 40 Ai Al a2 az w A3 43 g Ad a4 was 45 g 46 AG Fig 3 27 Collapse uto Size Move Left Up Move Right Down Hide Shaw All Color Fig 3 28 Click to change the Bus or signal displa
60. alteration status of each cell If the same Address has been written or read repetitively the background of the cell will be gray and the list window will display the Data of the last packet If the Address doesn t have any alteration the Address Data will display the data of the Address without the background color If it is the first time that the Address has been read we confirm that the data of the packet has been altered Al When users input the Address in this Edit Box and click the Find icon it will go to the corresponding position which is highlighted by the Blue frame STEP 3 Display the Memory Analyzer function in the waveform window Tip The Packet is read the Address is 0X50 the Data are 0X00 0X75 etc in sequence P ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 12C f mi fel x a File Bus Signal Trigger RunjStop Data Tools Window Help 18 x D eS fa S gk ge off esl gt DD 2K 11 MHz an mu 5096 Page fi Count fi ele TOs Ri cy iil 5 800865u 7 GE Qe Be Te te Bb le IE JE ss Height 26 7 Trigger Delay B 6 Scale 5 800865us Display Pos 46 406923us APos 52 0884ms Y A T 52 0884ms 7 A B pa Total 78 6034ms Display Range 98 614711us B Pos 52 0824ms B T 52 0824ms 7 Compr Rate 191 903 Bus Signal Trigger Filter 89 610884us 40 6
61. and out is 100 The time of Zoom In and Out will be presented by the clock of each grid X 1 sample frequency 2 Each grid stands for the clock of 100 pieces the zoom in and out is 1 and the time of Zoom In and Out will be displayed by the cycle of each grid X 1 sample frequency 10 Display Pos 0 Display Range 250 2 200 150 n mnnn ULL Display Pos 0 Display Range 25 25 l To TE ola LPL Lt LPL LPP ee ee Fig 3 64 Result from Normal to Zoom In IE T isplay Fos 1000 isplay Range 1023 102 AA Fig 3 65 Result from Normal to Zoom Out FM0714A 53 Phe AR AR BR lt eroplus Technology Co Ltd Show all Data we Previous zoom Data Format Fill The Zeroplus Logic Analyzer User s Manual V3 12 FELL a alH ra i it al at Dee eB FAD kH frome je eee eee ft t ey OM foes oe te ot eg fs 2 i tiggeretey rane Gaon fa Hha Geapiay Poe Gre AP bie Tajm a Hapa Tota i dire apir Prange bi i D Pes tava Ts ites Come Fade has ime Me j rm 4 Ep Fii i ex i a R f F i Sq UU UU UU UU Fi SH SE E ET ET eS a Sd aS war B Fim ia i Shes Sire 2 A Tini ai TAa diei ira ina Sinn aea Siri Fm igi m Fn Tanp TiS re Serer iri anm Sere lovee Fin E im Irri FE an lamm Fi Eri inns er 7 re 7 Fa Thh ra Jon eo E Se l 1 Sem eo E I Sere nh ones compe fa Besi irt nS Fig 3 66 Show all Data
62. automotive electronics correlation systems connection 2 Protocol Analyzer Signal Specifications 100MHz S Appropriate Sampling Rate 100MHz Same Data Time Per Bit Name of Syn Signals CAN 2 0B Data Verification Point ileal 190us converts to High signals gt 3 Protocol Analyzer IO Description CANL The main signal source of transmission data CANH Signal is opposite to the signal source of transmission data 4 Protocol Analyzer Electrical Specifications Parameter Min Logic Input High Logic Input Low CAN 2 0B Frame Specification CAN 2 0B can separate into frames as follows Data Frame Remote Transmit Request Frame Error Frame Overload Frame Because CAN2 0B is transmitted by the format of different signals the signal can separate into CANL and CANH and the signal direction of CANH is opposite to that of CANL Next we analyze CAN 2 0B signal with the standard of CANL Basic Data Frame Data frame can be divided into Basic CAN and Peli CAN Data Frame of Basic CAN transmission As follows 159 FM0714A 7P RE PF AR 1 ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 message data can be separated into Start of Frame SOB Arbitration Field Control Field Data Field CRC Field Ack Field End of Frame EN 0 A 8 Data Field fad i ERa aa Bere aaa eae Sennen A EHH He a Re T e eee in MEA A E AEA a ET Pcl Ka Aaa L A E a Pe S Er ale Fe iad Sy ost ive be
63. foe Bits ten boned ium he SPSS Sih SPORE SOOO PO ee NO WL T au me TERED IT EET EET ELIT s i way iz T jia a O res T krapa erm y hiari i EET ki i Seige i aa Ce a oe a dai Pee e cote of daaa y peg m gari oem hoe n nepe IU A DUTE j ommi ia piinu piai same m Ea Eiai Did SCL ra j i scuianmem a e pam al P sa aeae at Fig3 50 Function of Chain Data Find Displayed on the Waveform Window Pulse Width Find x Signal Name ee Previous cose Find Min Pulse Width Max Pulse Width Statistics in Range 1 65535 Statistics Start At End t When Found fo 0 bs H be x Fig3 51 Pulse Width Find Dialog Box Signal Name It can select the single channel for Find Find It can select the Find conditions which are In Range Min Value gt lt and When users select the option of In Range they can input the value of the Min Pulse Width and Max Pulse Width between 1 and 65535 and find the Pulse Width in range When users select the Min Value they can find the Min Pulse Width for the present single channel When users select the options gt lt and they can input FM0714A 48 PRE IZA RS Zeroplus Technology Co Ltd the pulse width in a single channel and the single channel of a Bus It improves the efficiency of finding the Pulse Width for engineers and strengthens the Find function o
64. gt 167 674ms g e S 167 674ms DAE g 6 B6 Oooo 167 674ms 87 87 167 674ms goo 167 674ms gad et 167 674ms 2 i 167 674ms 633 167 674ms Pca C4 167 674ms TT Ready End DEMO A Fig4 115 Group into Bus Select Bus Property F gt ZEROPLUS LAP C 321000 Standard 3 12 CNO1 S N 000000 0000 HDQ a File Bus Signal Trigger Run Stop Data Tools Window Help Demam Ho ot Elp D gt DDO Am P o a Bl f1 143223m gt a ae Oe Ee eS EF e te Scale 1 143223ms Display Pos 20 440296ms A Pos 16 77014md Y A T 16 77014ms Y A B 150ns 7 Total 167 674075ms Display Range 8 140281ms B Pos 16 76999md gt B T 16 76999ms 7 Compr Rate 255 850 Bus Signal 2 424165ms 3 29195ms 9 008065ms 14 72418ms 20 440296ms 26 156411ms 31 872526ms 37 588641ms 43 304757ms 49 020872ms Sorel H E T r NNT U VHF v WRR ji m 5 lii Set 0x1 f i oa an a 0x1 m ampling Setup ae aye ats 16 7 75ms NT a aT a TM Ti 131 747mM5 g sE mim 167 674ms Analog Waveform a7 G74 r Image Encode mim 167 ms amp Reverse 167 674ms g Group into Bus GhI G 167 674ms g Ungroup from Bus Ctrl U mm 167 674ms Add Channel ln 167 674ms Gopy Ghannel o r Delete Channel Ja Eram Delete Al Channels en 167 674ms g Restore Default Channels m7 167 674ms g Format Row iil 167 674ms Rename 7 a 167 674ms g Ba B4 Z i 167 674ms 85 65 re 167 674ms g 86 B6 a 167 674ms 87 87 167 674ms g
65. ila T gt Ready End DEMO 7 Fig 4 77 Waveform Analysis 134 FM0714A PRE AR AR DARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 3 2 Protocol Analyzer UART Packet Analysis 135 PROTOCOL ANALYZER UART Configuration Packet Data Format Register ltem Color ltem Color Hms Min 10ns Wlas 10 UNENOW aep E a Cancel Default Help Fig4 78 Protocol Analyzer UART Packet dialog box Data List Data field captured by Bus in the packet display Parity Display parity check in packet Describe Error description to any field format or data bit Packet Idle Time When the check box is selected the default value is 5ms Specifically when the Packet Idle Time is activated the packet will be divided again according to the Packet Idle Time If the Time Length between the previous packet and the next packet is more than 5ms the two packets will still be divided or the two packets will be merged into one packet It is a Bus Packet List view which includes 4 formats which UART happens below PARITY clews whether users start PARITY or not BUS Packet List S x Setting Refresh Export Synch Parameter Packet Name TimeStamp Busl UART 21927 Packet Name TimeStamp
66. ol E az0 13045 2 Zee Lia Heig 26 Tapiee Daley 2000s EErEE Dishi Pasig 41867 dus APs ta 088400 A T 20gm f Total 7s Gains Dismay Aan ngm 21521 Sus D Posar hiini B T 42 0020me 7 ien Rati 403 5 A L OP E PLILSILILILILILILILI F BL F Be be F E7 e ci wc cl fo ar rrm tod oll j 7 Fig 4 68 Raveionn Analysis 128 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 2 2 Protocol Analyzer I2C Timing Analysis PROTOCOL ANALYZER ZC xl Configuration Timing Packet Data Format Register Waveform Image e ee gt Leu pat Csu stos E Koo J i i tho sta oe F tho pat tuosta Time Format Settings Cancel Default Help Fig 4 69 Protocol Analyzer I2C Timing dialog box Waveform Image Describe the position of the set time Time Format Settings When the Time Settings is activated the set time will become the condition of judging decoding For example when you want to decode START you should judge whether the conditions of START are satisfied firstly and then judge whether the set time of tHD STA is coincident with the factual waveform If the two conditions are satisfied the START can be decoded Other segments decoding of the packet is the same with that of the START 129 FM0714A O PRE AR AR DARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Us
67. on the Filter Condition of the signal A1 Only the waveform with the high status of A1 is displayed Step5 Filter Delay Setup 1 Click on the Activate Filter Delay as shown in Fig 4 141 2 Click on the According to Filter Condition or the Opposite of Filter Condition to select the waveforms to be kept 3 Click on the Start Edge End Edge or Period Delay to set the Start Point of Filter Delay 4 Type the value of the Delay Time into the column of the Delay Time 5 Click OK then click Run to activate the signal from the tested circuit to the Logic Analyzer 6 The result will be displayed in the waveform display area as shown in Fig 4 140 Step6 Stop Signal Filter Filter Delay Click Stop then click Signal Filter Setup and select Cancel from the Signal Filter Setup dialog box to stop the Signal Filter or the Filter Delay Setup Tip Click Stop to check the conditions of the Signal Filter or the Filter Delay Setup if there aren t any results Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms Filter tee Setup Select Filter Delay Mode Select Delay Stark Point Delay Time According to Filter Condition f Start Edge l ns End Edge Min 100ns Opposite of Filter Condition Period Delay Max 6 553ms Fig 4 141 Filter Delay Setup Tip Definitions of the Start Edge and the End Edge and the Period Delay are listed as Figs 4 142 4 143 172 FM0714A
68. running the program in demo mode What s wrong with it Your machine may have a memory management problem with either your physical RAM onboard or the RAM on your video card Turn off any other multimedia of graphic programs and then re run the software If this does not work restart your system This should temporarily fix the problem However we highly recommend terminating all irrelevant programs while working with the Logic Analyzer Try not to burn DVDs not listen to music or watch movies while working with the Logic Analyzer The default color setting of the Waveform Display Area is very cool but don t see anything when print my work out with my black and white laser printer What can I do Refer to Section 3 6 it should have clear understandable instructions about changing the color of the user interface See Fig 3 153 this color setting should give a clear view of the Waveform Display Area even with an old black and white laser printer FM0714A 5 3 PRAH RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Hardware Troubleshooting Q1 Why are no lights on when I hook the USB cable to the Logic Analyzer A Double check whether the other end is properly connected to your PC There may also be a defect in your USB cable Try another cable Q2 Why can t I read any signals from my Logic Analyzer A Check whether you have correctly connected the signal cables to the activated pin
69. same time in the Relating column then the selected items will be changed into the same color So it is convenient for users to change many items into the same color once After the background is altered corresponding color automatically changes according to the contrast ratio When users set the color for the workaround and select the option the system will switch other colors automatically to become the contrast color 91 FM0714A PRET AR th ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 When being printed the background is white When being printed the background color is white Waveform Change the color of the Buses or signals on the waveform area Color Setting 7 x Workaround Waveform Name Relating Color Linewidth AN HEELE T F T r F F F r r T r T r T Cancel Default Help Fig 3 155 Waveform Color Interface Waveform The channel color can be varied by users Linewidth The linewidth can be adjusted by the users requirements there are three options which are 1pixel 2 pixel and 3 pixel 92 FM0714A PRE AR th ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 6 1 Modify Workaround Color To modify the workaround color click the color block shown in Fig 3 154 A Color panel shown in Fig 3 156 will appear Select a color shown on the panel or click on Define Custom Colors to create the desi
70. selected the Protocol Analyzer Trigger function is activated And then users can set Protocol Analyzer Protocol Packet Value and Data Format Protocol Analyzer It only displays the name of Protocol Analyzer and only one name can be selected Protocol Packet It is displayed according to the packet in every protocol analyzer Value The value needs to be entered in the frame and the data mode can be selected by users according to their requirements the default is Hexadecimal When a value can be input in the selected protocol analyzer data the frame can be enabled Or the frame will be disabled For example Protocol Analyzer I2C when the protocol packet is DATA the frame can be used to the contrary when the protocol packet is START the frame is disabled Data Format The displayed value mode can be selected There are five options Binary Decimal Decimal signed Hexadecimal ASCII Gray Code and Complement Step3 Trigger Mark Setup To find the item in the Bus better users can activate the Trigger Mark function after starting Bus Trigger the trigger mark is shown with T bar According to the number of the trigger position the T bar is displayed in order TO T1 T2 T3 T4 and the color is red as the image below 1 Bus The trigger condition is 0 the red T bar displays the trigger condition in order 107 FM0714A Phe AR AR ih BR lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12
71. so the display must refer to the defined pulse width Protocol Analyzer HDQ is made up of 16 bits signals Firstly after the period of status signals a device will be installed for the 7 bits address through the Host so that 1 bit signals can be read or written After a response time of high signals data will be exported in 8 bits format with the data and location content from LSB to MSB The following is the Host to BQ HDQ analysis 152 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Send Host to BQ HDQ Send Host to BQ HDQ or Receive from BQ HDQ i i CDMR Data gt 4 tRR O LP LE LLL Lo Leer Le Le Lo Lee ae al Address ee Aw LSB MSE Break i Bito Bit7 ET eye ee E eee 1 er i Ee ee K tRSPS Start bit Address BiV Stop Bit 777 j _ Fig4 109 Host to BQ HDQ Analysis Protocol Analyzer Format Break This is the initial bit for the Protocol Analyzer HDQ after Low signal lasting a period of t B it is then converted to a High signal lasting a period of t BR The length of Low signal is no less than 190us whereas the High signal is no less than 40us kea _ tem Fig4 110 Pulse from Low to High Address The Address comprises 7 bits The initial Low signal lasts a period of t HW1 and if the write 0 status continues through the end of the t HWO period the signal will convert to High and last throughout the period of t
72. the Menu Bar The menu is shown as Fig 4 17 4E Bus Trigger Setup Channel Trigger Setup Trigger Property Trigger Mark JA Pulse Width Trigger Module ption a Dont Gare erat High eit LOW He Rising Edge eee Falling Edge Wd Either Edge Reset Fig 4 17 Trigger Menu Step2 Bus Trigger Setup 1 Bus Trigger Setup 105 FM0714A PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Bus Trigger x Bus Trigger Protocol Analyzer Trigger Bus Name Operator Data Format C Binary Decimal Decimal Signed f Hexadecimal ASCII C Gray Code i Complement Cancel Default Help Fig 4 18 Bus Trigger Dialog Box Tip The Bus Name item can be selected from the pull down menu It only displays the Bus name and also the Decimal signed Gray Code and Complement Modes are added 2 Protocol Analyzer Trigger Setup Tip This function can be used in the Modules LAP 16032U LAP 16064U LAP 16128U LAP 32128U A LAP 321000U A_ LAP C 16032 LAP C 16064 LAP C 16128 LAP C 162000 LAP C 32128 and LAP C 321000 after registering And for the LAP 322000U A and LAP C 322000 it is not necessary to register as they can be used for free Before registering the button OK in the Protocol Analyzer Trigger dialog box is the button Register when users press this button Register a Register dialog box will pop up Then users need to enter the corr
73. the Waveform Find dialog box again for the system has saved the last set conditions 46 The Zeroplus Logic Analyzer User s Manual V3 12 Range enter the value for Min Value and Max Value Signal Choose among Rising Edge Falling Edge Either Edge High and Low Start At Choose the position to start our search by selecting one of the following Ds T A B etc select from the pull down menu When Found Choose A B or other bars to mark the position where it is coincident with the set conditions Statistics Show the number of instances of the search results Note It is available only when searching through a Bus Waveform Find g xj W Activate the Function of Chain Data Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them For example OX32 0 45 0 50 0 66 It needs to add the packet name in the Protocol Analyzer for example 4ODRESS 0 24 D4TA 0 20 Start At End At When Found Statistics bs Dp a Statistics T Fig3 48 Waveform Find Dialog Box with Activate the Function of Chain Data Find Tip The function of Chain Data Find is mainly for finding the data in the packets of Bus and Protocol Analyzer which have some serial data For example it can start finding with the serial packet segments there are 0X01 0X02 and 0X03 in the Bus It improves the efficiency of Data Find See the following process x Bus Sign
74. the single connecting cables to put one end on the testing board and the other in the LA as shown in the diagram opposite Check the box to compress all the data Compression is used to compress acquired data through a lossless compressor The purpose of this compression is to place more data in a limited memory than in an actual memory The compression rate of the Logic Analyzer can be up to 255 times This means that the maximum acquisition can be 32M Bits 128Kx255 32M Bits for each channel The chosen capacity of the memory 1MB means that the maximum data being sieved out arrives at 1MB 255 255M Bits Per Channel Note The rate will change depending on the data being analyzed FM0714A O PRR ISAS OBER Sl lt eroplus Technology Co Ltd Tip uy Signal Filter Setup Tip Select the Signal Filter Setup from the pull down menu of the Bus Signal or click the Gi Sampling Setup dialog box to open the icon or the Button on the Signal Filter Setup dialog box Tip There are three modes of Signal Filter configuration for each channel 36 The Zeroplus Logic Analyzer User s Manual V3 12 Signal Filter Setup x m Filter Condition Porta Trigger Condition Filter Condition CEN Trigger Condition PortB T we Filter Condition ix Trigger Condition Pote _ 7 Filter Condition Trigger Condition PonD gt Filter Condition
75. waveform such as Address Time Frequency Trigger Bar A Bar B Bar and other Bar Details of the labels are below Scale Define the acquisition clock that controls the data sampling Total The period of time when Logic Analyzer captures data Display Pos The middle tip means the middle position of the waveform Display Range SP ay the waveform time range of the current waveform display area A Pos The main function is to set A Bar or the other Bar B Pos The main function is to set B Bar or the other Bar Press the under arrow to exchange and become the other Bar ee Moreover you also can execute this function from the other Bar 4 Ruler Waveform Display Listing Display Ruler shows the time position of the waveform shown in the waveform display area or the listing display area 25 FM0714A 26 PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Bus Signal Waveform Display Listing Display Edit names of the measured channels color shown matches the trace color Trigger Column Trigger Column allows users to adjust signal trigger conditions Filter Column Filter Column allows users to set Bus or signal filter conditions Display Area Acquired data is displayed as a waveform or in a list format Waveform Display This interface shows the digital signals When the signal is logic 0 the waveform will be displayed as i If the signal is logic 1 the waveform is as
76. website for the latest updated or debugged software If you are running this program on a virtual machine the virtual machine may not support the amount of hardware addressing In this case try it with a machine that is physically running a Windows system FM0714A PRE AR BPR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 5 2 Software Troubleshooting Q1 A Q2 Q3 Q4 200 Can I run the program even if I don t have the Logic Analyzer hardware Yes you can You can run the program under the demo mode See Fig5 1 T gt ZEROPLUS Logic Analyzer xj Hardware Searching Failed ev C Fig 5 1 Select Run Demo if you do not have the actual hardware I am running a graphing program and software at the same time Whenever I try to make a screenshot of my work it keeps telling me that I have insufficient memory space what is wrong A few users have reported similar problems We are not certain what causes it or how to fix it However we have found that if there is a defective address within 128 MB to 512 MB in your physical memory your software might signal End of memory Thus the program will warn you about insufficient memory Test your memory with a varied memory testing program Or take a screenshot close the program paste it to the graphing program and re open the program A part of the background picture remains within the Waveform Display Area especially when
77. with any channel of LA users can define which occupies one channel When DSO has been triggered it will inform LA to capture signal LAP C series V3 10 higher version support TELT Oscilloscope Computer Device Under Test ZEROPLUS Logic Analyzer Operating Instructions STEP 1 Confirm the DSO is connected correctly STEP 2 Click the Tool on the Menu Bar than select DSO stacked Settings to open the dialogue box Customize Color Setting GUS Bus Property ae Refresh Protocol Analyzer ey Multi stacked Logic Analyzer Settings Analog Waveform d Image Encode DSO stacked Settings 191 FM0714A O PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 3 Set the Channel V Div in the dialogue box DS0 stacked Settings l x DSO CH1 ViDiv 2v Div DSO _CHZ viv 2 Div DSO CHA WDiv loyipiy DSO CH4 WDiv ayibi Channel Setting only display O50 ipsa CH1 M O50 cH M p50 cH M DSO _CH4 Channel Height Setting DSO _CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height feo DSO CH4 Height feo Master Logic Analyzer DSO settings DK Cancel STEP 4 Set the Channel Waveform Color and select the DSO Channel to be displayed on LA software DS0 stacked Settings x Channel ViDiv Setting DSO CH1 ViDiv 2v Div DSO _CHZ viv 2 Div D50 CHA ViDiv 2v Div DSO C
78. 06057us 11 60173Tus 17 402596us 46 406923us 75 41125us 104 415576us 133 419903us 1624242348 191 4205570 V Busi 20 gt SS n0 Ao a LIU eal Al 52 289ms iL 50 8us 9 6 A j 254us 9 6 9 4 9 68 p45 P 82 z 78 603ms g A3 43 78 603ms a4 a4 78 603ms a5 as 78 603ms g 46 46 78 603ms P AT a7 SM R 78 603ms g 80 so x il 78 603ms 4 gt mila otis T E E Option Import Export Merge Refresh Reset Display alteration pooo l Bus1 I2C Unused 0X00 0X4F oxso oxoo ox79 oxeo oxas oxcdD oer Unused 0X60 0X7F Ready End DEMO Ui Fig4 16 7 Memory Analyzer Display 186 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 4 12 Multi stacked Logic Analyzer Settings The function of the Multi stacked Logic Analyzer Settings is mainly for connecting the hardware of many Logic Analyzers which are the same type and then use the software to stack the Logic Analyzers which are working independently It can improve the functions of the Logic Analyzer which are mainly manifested in two aspects expanding the RAM Size and adding the number of the test channels Tip 1 The max number of the Multi stacked Logic Analyzers is four The RAM Size of the four Logic Analyzers can reach to 128K 4 and the test channels of the four Logic Analyzers can reach to 32 4 2 The function of the Multi stacked L
79. 322000 Modules and it is not available for the LAP 16032U LAP 16064U LAP 16128U LAP 32128U A LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 32128 Modules Set the Latch function for one Bus The setting of the Latch channel is AO the analysis function adopts Rising Edge Bus Property x Bus Setting f Bus Color Config IM Activate the Latch Function Protocol Analyzer Setting i Protocol Analyzer Parameters Gontig C ZEROPLUS LA 1 WIRE MODULE 1 10 000CN01 C ZEROPLUS LA 3 WIRE MODULE 1 04 000CN01 C ZEROPLUS LA ACSF MODULE 1 02 000CNO1 ZEROPLUS LA SRITHMETICAL LOSIC MODULE 1 51 000CNO1 C ZEROPLUS LA BUS MODULE 1 00 00 CN01 C ZEROPLUS LA CAN 2 06 MODULE 1 32 00 CN01 C ZEROPLUS LA CCIR656 MODULE 1 31 00 CNO1 C ZEROPLUS LA Compact Flash 4 1 MODULE 1 01 000CNO1 C ZEROPLUS LA CMOS IMAGE MODULE 1 00 00 CN01 lS ee ee OT Teba eae BASS I M oad md Fon Ton Pelt ceed et S Find I Use the Dsbp More Protocol Analyzer Fig4 63 Activate the Latch Function The picture of the waveform analysis De ZFROPLUS LAP C 371 28 Standard 3 12 0N01 S NO00000 0000 Laect p J9j xj a Fle apika Trigger Ruo Qta Toots Window tep l j x Dema im ee Ht A b a zx wir SKHe v as l 50 vie s Page fi Coum fi eaa rOn pose R a Bt A e al oles Hoigm fee Trigger Deloy _T0us Scale 9 331053us Display Pos 3 084115ms APos 150us A T 150us
80. 521us i 1 U 10 759521us 21 519041us 32 278562us 43 038083us 53 79760du PA m f UU UU UU UU UU 2 22 BZ o A3 A3 Sg At 44 EJ g 45 45 SZ 6 as SZ A A S 80 50 De Bi Bi X Bz B2 B2 s SZ Fig 4 15 Trigger Position 70 Step6 Trigger Range Setup Click if icon or click Trigger Property from the Trigger on the Menu Bar Then Click the Trigger pies Range the dialog box will appear as shown in Fig4 16 Tip This function is mainly for the range control for the saved files after triggering According to the procedures of the range control users can start the save of data according to the requirement of its time and times to get the standard of data statistic status 104 FM0714A 7P RE FR AR 1 ARA The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 xi Trigger Content Trigger Delay Trigger Range Time Sample i minute Cancel Default Help Fig 4 16 Trigger Range 1 Trigger Range The default is not activated 2 There are Time Sample and Frequency Sample in the part of Range Setting the default is Time Sample The units of Time Sample are second minute hour and day The unit of Frequency Sample is times Users can set the value by themselves in the editor box Task 3 Bus Trigger and Trigger Mark Setup Step1 Click icon or click Bus Trigger Setup and Trigger Mark from the Trigger on
81. 79ms Display Range 1 729766ms B Pos 104 033724u Y B T 104 033724us 7 Compr Rate 255 883 22s 1 395883 981 399676uf 608 116513up 234 23905us 13564981 Pus 513532975u 897 416137 us 1 261280ns 1 5635182 2009066 y 3 ee TTAN Wa v m vl h 0X1 ALI IA ARR AAO i mpling Setup ig Channels Setup Merea L TALENI 150 266ms nang vraverorm 167 695ms A Ooo y y oL crpio bus Grp T G oan nS BECO Delete Ghannel Delete All Channels 16 775ms LLT 150 288ms im se a tee et 7E ft 85 ZE a e s a a E 87 67 167 695ms g co co 167 695ms gcc S85 ZE ee a ac ee a E BO Tooo Ready End DEMO Z Fig4 131 Bus Property FM0714A PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Select the decoding function of the protocol analyzer CAN 2 0B and select OK to confirm O x l x fi0 z ie 4 Page fi Count fi cll BH ey Gh 7477563317 we oe Oe Be Te be Be o gt Height 26 TriggerDetay _Sns_ Scale 74 776633us Display Pos 139 64981 2us A Pos 87 851299us gt A T 87 851299us 7 A B 16 192424us v Total 167 69579ms Display Range 1 729766ms B Pos 104 033724u 7 B T 104 033724us 7 Compr Rate 255 883 Bus Signal i 1 AARAA Ams GAT IAIAFA ANA 1481 Is 23 733s T RAIAT Ais 61369797F A97 416137us 1 261299ms 1 635182ms 2 009066ms x v Bust Bus P
82. Bus Signal The Zeroplus Logic Analyzer User s Manual V3 12 Menu Item im Sampling Setup Tip Icon Description Decrease RAM Size Increase RAM Size Decrease Internal Clock Frequency Increase Internal Clock Frequency RAM Size Tip Clock Source Asynchronous Clock 34 Detail Menu amp Dialog Box x Clock Source Asynchronous Clock Frequency S5MHz ka Synchronous Clock f External Clock f Rising Edge Frequency t00KHe Falling Edge Min 0 001Hz Max 100MHz Note The external clock voltage level is the same as the port A trigger level Compression Mode Signal Filter RAM Size lay W Data Compression Signal Filter Setup Channel number will be limited bo 24 Apply iL Cancel Restore Defaults Help Fig 3 20 Sampling Setup See Section 4 1 for detailed instructions 2K ole ae 50MHz nn mu Fig3 21 RAM Size Choose the RAM Size and the internal clock frequency from the pull down menus The amount of the acquired data that can be stored by the Logic Analyzer depends on the amount of the allocated RAM The total depth of the memory for the LAP A C is 128K Bits in each probe If the Logic Analyzer starts gathering data with a 128K memory range it will take a long time to find the required information In order to avoid spending a lot of time gathering data select a smaller RAM Size The RAM Size options are 2K 16K 32K 64K 128K and 256K So if gathering d
83. C ZEROPLUS L Compact Flash 4 1 MODULE 1 01 000CNO1 T ZEROPLUS L4 CMOS IMAGE MODULE 1 00 000CNO1 gt Se bm SET Te bee ee RAAMI ea a teed Find Cancel Help Use the Dsbp More Protocol Analyzer Fig4 57 Bus Setting STEP 2 Click Color Configuration to set Bus Data Color Bus Property a x Bus Setting f Bus Color Config a Activate the Latch Function rising Edge Protocol Analyzer Setting i Protocol Analyzer Parameters Contig C ZEROPLUS LA 1 WIRE MODULE 1 10 000CNO01 C ZEROPLUS LA 3 WIRE MODULE 1 04 000CNO1 C ZEROPLUS LA Aco MODULE 1 02 000CNO1 C ZEROPLUS LA SRITHMETICAL LOGIC MODULE 1 51 000CNO1 C ZEROPLUS LA BUS MODULE 1 00 000CNO1 C ZEROPLUS LA CAN 2 06 MODULE 1 32 000CNO1 C ZEROPLUS LA CCIR656 MODULE 1 31 000CN01 C ZEROPLUS LA Compact Flash 4 1 MODULE 1 01 000CNO1 7 ZEROPLUS LA CMOS IMAGE MODULE 1 00 000CH01 m orm Pood A AAL T Te bee ee BAA Oa ma aOR Find Cancel Help Use the Dsop More Protocol Analyzer Fig4 58 Color Configuration 123 FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer lt eroplus Technology Co Ltd Bus Data Color Bus Mame Busi Data Condition Data Min Data Max User s Manual V3 12 Sl Cancel Default Help Fig4 59 Bus Data Color Bus Name Display the selected Bus name Data Condition Select the Data Condition to change th
84. CNO1 ICO AOL LIL A PA ALT Te be nC ee RAS a Od ODIAD N IV Use the DsDp Find More Protocol Analyzer Fig 3 79 Find Editor Box When you input I in the Find editor box the Protocol Analyzer list displays all Protocol Analyzers with the initial character of I see the below picture Bus Property xj Golor Config Activate the Latch Function 40 X Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Config ZEROPLUS LA I2C EEPROM 24LC561 24LC562 MODULE 1 00 00 CNO01 ZEROPLUS LA I2C EEPROM 24L MODULE 1 31 00 CNO1 ZEROPLUS LA I2C MODULE 2 02 00 CNO1 ZEROPLUS LA 125 MODULE 1 13 00 CNO1 C ZEROPLUS LA 1507816 UART MODULE 1 02 00 CNO1 V Use the DsDp More Protocol Analyzer cancel Hep Fig 3 80 Find Result dy Refresh Protocol Analyzer Refresh Protocol Analyzer data See Section 4 10 for detailed instructions FM0714A Phe AR AR ih BPR lt eroplus Technology Co Ltd me Multi stacked Logic Analyzer Settings Analog Waveform a Single Analog Display Mixed Analog Display Tip When the function of Analog Waveform is activated the Analog Waveform will be displayed in the waveform area of the Bus s sub channel and take the space of four channels And four sub channels won t draw the waveform It notes that the sub channel of the Bus must be more than four channels 61 The Zeroplus Logic Analyzer U
85. Data Process The Zeroplus Logic Analyzer User s Manual V3 12 Open Close Compression Warning MW Show the T Bar in the middle area i Open Close Double Warning What do vou want to show when you press the Stop during the running Keep the Present Data Read the Captured Data Restore Defaults M Check for Update Bus g an g Ai g az A3 ad i was g 46 a7 60 g Bi 40 g Ai P Az A3 g 44 45 g A6 P ar g 50 g El Cancel Help Fig 3 147 Correlated Setting ignal al 40 Al Ae Trigger Fig 3 148 An Example for Auto Close Auto Close With the cursor in the channel when users try to drag a Bar the Bar will stop at the approaching edge of the channel Rising Edge or Falling Edge Tip In the above example when dragging the C Bar the A Bar will stop at the Raising Edge of A1 88 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 G e Fig 3 149 Gridlines Show Gridline The gridlines will be displayed on the waveform area tI LJ Jf Lj A O 42 Time SOMHz Fig 3 150 Tooltips Show Tooltip Leave the mouse over a waveform and the description will be shown Show the T Bar in the middle area Show the T Bar in the middle of the Waveform Display Area after triggering When the roller is moved toward back the Time Axis in the waveform area will move toward righ
86. El Find Pulse Width 60 To Place Add Bar bee Zoom oy Hand k Normal al Show all Data ke Previous soom Data Format Waveform Mode Color Bus Data olor Bus Single Gate calar The Zeroplus Logic Analyzer User s Manual V3 12 Ctrl F E H ESCAPE F10 Gtr Hz iv Square waveform Sawtooth Waveform Fig 6 8 Waveform Mode SW15 Can I change the Signal Display Mode into the Timing Mode A Yes you Can SW16 Why does not Filter Delay work when the Double Mode is enabled To optimize signal output quality and maximize memory efficiency the Signal Filter Setup function may work under the Double Mode However the Filter Delay function doesn t work under the Double Mode at A 208 this stage FM0714A 6 3 RGO1 A RG02 RGO3 RG04 RGO5 RGO6 RGO07 RGO8 209 PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Registration What is the significance of the hardware serial number Every product is assigned and engraved with a unique serial number which allows us to trace the original manufacturing date of a specific product How do register online Visit our homepage at http www zeroplus com tw Choose the Instrument Department and click on English Once you finish membership registration proceeding with product registration After finishing product registration you will receive an emai
87. End Pos 205 2us An one trigger pages are selected the trigger bar disappears from Cancel Default Help Fig 4 12 Trigger Position Pull down Menu FM0714A 7P RE t 32 AR 1 PRD The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 We ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 LaDoci 2 5 x o File Bus Signal Trigger Run Stop Data Tools Window Help x Dee S at 8 Bl p 120K sie Bi 100MHz x alfo v Se Page 1 Comt 5 gt A Ree v 2 151904u R z Oe Be Te d Ea e of Be eight 30 Trigger Delay 10ns Scale 464 TOSKHz Display Pos Ons A Pos 10 08us v A T 99 206KHz v A B 3 333MHz v Total 1 31072ms Display Range Ons 53 827604us B Pos 10 38us v B T 96 339KHz v Compr Rate Ho ji Bus Si gnal Trigger Filter 43 038083ur 32 278562ur 21 519041ur10 759521us ore 10 S952ius 21 519041us 32 278562us 43 038083us 53 797604u e N es ee 1 i ii 1 files peg fee MY 1 1 TS e 1 1 eal rm 1 1 1 1 1 1 r ESS 1 1 gaoa Sole beamagalnhadehgeaay 82 a Bz A3 A3 S4 A4 ht SU P a7 A S4 B0 B0 SG Bi Bi Sz B2 62 De De Fig 4 13 Trigger Position 0 W ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 LaDoci 2 0 x So File Bus Signal Trigger Run Stop Data Tools Window Help x
88. FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 3 UART Analysis UART Introduction The UART which stands for Universal Asynchronous Receiver Transmitter is a serial asynchronous protocol The UART is often time integrated into PC communication devices and it usually equips an EEPROM Electronic Erasable Programmable Read Only Memory for error checking proposes with other chips There are two concepts about UART which must be understood before performing any further tasks The UART protocol will first translate a parallel data into serial data for the UART requiring only one wire to transmit signals The transmission starts at a triggered Low position and there are 7 or 8 bits of data following afterwards To halt a transmission it requires a signal or multiple bits of logic 1 Odd number bit transmission requires odd parity error checking and even number bit transmission requires even number error checking Following the parity check is another data translation from serial data to parallel data UART also generates an extra signal to indicate receiving and transmitting conditions Furthermore since UART is an asynchronous communication protocol and data transmission may not be in bytes a complete UART signal Packet must consist of Start Data Parity Stop Baud and TXD segments They are as following Start When TXD is changing from HIGH to LOW voltage 1 bit Data Us
89. Found statistics 3 W Address 0 The Zeroplus Logic Analyzer User s Manual V3 12 A T 104 it 2 il 28 2T 56 54 4 309 13 0 l Po oo rid EAE A YUU FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 3 Statistics Feature Section 3 3 presents detailed information on the Statistics feature in the software interface The Statistics feature presents user information pertaining to nine periodicities Full Period Positive Period Negative Period Conditional Full Period Conditional Positive Period Conditional Negative Period Start Pos End Pos and Selected Data Click on the Statistics icon fg and an interface like Fig 3 131 or Fig 3 132 will appear x Column Selection Condition Parameter Warning Parameter Refresh J Statistics Filter CHANNEL Full Period Positive Per Negative P Conditional Conditional Conditional StartPos EndPos SelectedData l AD 211 212 211 0 0 0 Ds Dp Al 52 53 52 0 0 0 Ds Dp A2 0 0 1 0 0 0 Ds Dp A3 0 0 1 0 0 0 Ds Dp A4 0 0 1 0 0 0 Ds Dp AS 0 0 1 0 0 0 Ds Dp A6 0 0 1 0 0 0 Ds Dp A 0 0 1 0 0 0 Ds Dp BO 0 0 1 0 0 0 Ds Dp B1 0 0 1 0 0 0 Ds Dp gt Fig 3 131 Statistics table De ZFROPLUS LAP C 37178 Standard 3 12 0N01 S5 000000 0000 170 15 xj a Fle apika Trigger Runo Qsta Toots Windew tep x e Ged fim aA ot gt bb lfr jo i Ste vja ow 50 de te
90. H4 WiDiv 2 Div Channel Setting only display D50 M 50H M os0 cH M p50 cH M DSO _CH4 Channel Height Setting DSO CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height a0 DSO CH4 Height feo Master Logic Analyzer DSO Settings DK Cancel 192 FM0714A O PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 5 Select the Only display DSO according to users requirements DS0 stacked Settings x Channel ViDiv Setting DSO CH1 ViDiv 2v Div DSO _CHZ viDiv 2 Div DSO CH3 ViDiv 2 Div DSO CH4 iDiv 2 Div Channel Setting Only display D50 DSO CH2 M DSO CHS M DSO CH4 Channel Height Setting DSO CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height feo DSO CH4 Height feo Master Logic Analyzer DSO settings DK Cancel STEP 6 Set the Channel Height DS0 stacked Settings E x Channel ViDiv Setting DSO CH1 ViDiv 2v Div DSO _CHZ viv 2 Div DSO CH3 ViDiv 2v Div DSO CH4 viDiv 2 Div Channel Setting only display O50 M 50H M O50 CHR M p50 cH M DSO _CH4 Channel Height Setting DSO CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height feo DSO CH4 Height feo Master Logic Analyzer DSO Settings DK Cancel 193 FM0714A O PRET AR th ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Lt
91. Hess il i _2 2 EEE Reeser f Pa A zl tri er A Fig 4 11 Trigger Page and Screen 2 2 Delay Time and Clock Click the Delay Time and Clock then type the numbers into the column of the Trigger Delay Time or type numbers into the Trigger Delay Clock at the Trigger Delay page of the Trigger Property dialog box as shown in Fig 4 11 Or type the numbers into the column of Trigger Delay Trigger Delay on the Tool Bar The system will display the Start of the waveform The formula of Delay Time and Clock is Trigger Delay Time Trigger Delay Clock 1 Frequency To use the compression mode the lt Delay Time and Clock gt will be unavailable Step5 Trigger Position Setup Type the percentages or select the percentages from the pull down menu of the 158 on the Tool Bar or click the pull down menu of the Trigger Position on the Trigger Delay page of the Trigger Property dialog box as shown in Figs 4 12 4 13 4 14 and 4 15 The selected Trigger Position percentages will be displayed on the right side of the screen of the system Trigger Property i x Trigger Content Trigger Delay Trigger Range Trigger Page Delay Time and Clock Trigger Page Trigger Delay Time a r 200ns Min 1 Max 8192 Min 200ns Max 3 355238s Trigger Position Trigger Delay Clock r Min 1 Max 16776191 os 204 4us
92. Hz Display Pos Ons A Pos 16 dus v A T 59 524KHz v A B 25 62KHz v Total 204 Bus Display Range 60us 60 2us B Pos 22 2315T9us v B T 44 981KHz v Compr Rate No i i i i a Bus Signal Trigger Filter a A asus A 36us 2dus a i2us Nap H TEER 12us TE 36us ae 48us eae 60us B av av DSO_CH1 ov 41 av av ay DSO_CH2 ov 41 g 40 Ao x gaa o s o o Rs D0 0 2 0 a e Unknown g A3 d Unknown a 4 Unknown gas a Unknown a ie Unknown ware Unk a g o Unknown Bi Bi Unknown B2 B2 Unknown or B3 B3 Unknown d B4 Unknown f ro EREC ECE a _ se _ C HN E Ready End Connected 197 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 5 Troubleshooting 5 1 Installation Troubleshooting 5 2 Software Troubleshooting 5 3 Hardware Troubleshooting 198 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Objective In this chapter troubleshooting is divided into installation software and hardware issues These troubleshooting questions and answers depend not only on our engineers but also on end users such as students engineers technical manual writers and others 5 1 Q1 Q2 Q3 Q4 Q5 199 Installation Troubleshooting Why it is not prompt when insert the driver CD into my CD ROM At this stage the dri
93. K DATA DRACK DATA FDAK See ea ee f so write aac oo o a 75 D ACK aketa Name TimeStamp F DDRESS Read A ACK IDATA DDIR DESCRIBE 3 Busid2c 10 2982ms T s0 Read A ACK D NACK DATA NACK DDRESS Read A4 ACK DATA DRACK DATA PODACI DATA DANACK DESCRIBE f so Read a ack 23 oac 45 o ck 67 D NACK DATA NACK E Name TimeStamp 4 _ Busi 2c _ 10 3554ms_ Packet Name TimeStamp 4DDRESS Write A ACK DATA RRR DATA EES EES o DATA ERAGE P 5 eusiqecy 20477ms so write aa oo oax 79 oac a9 oac aB oac CD D ACK DATA D ACK a Fig4 43 TimeStamp Tip When the Display Bar of Signal Filter is activated the Bar should be displayed in the Bus Packet List and also the TimeStamp ADDRESS and length of the Bar will be displayed 3 Packet Idle and Packet Length Packet Idle Packet interval time Packet Length Packet time length When those above two items are to be displayed it only chooses one of them to display which is controlled by Plug Because it is impossible that every Protocol Analyzer packet has registered timestamp and end we add two special Unknow_Flag to judge the timestamp and end of the packet which are Unknow _ Start_Flag and Unknow_End_Flag 117 FM0714A PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 This Data Start is regarded f as Packet Timestamp This Unknow register is Unknow_End Flag
94. Key Menu on the Waveform Area Tip The functions of the right key menu on the waveform area are similar to those of the Data menu The menu adds the functions such as Place Ds and Dp Add Bar in the waveform display area 19 The Zeroplus Logic Analyzer User s Manual V3 12 7EROPLUS Logic Analyzer x A Do you want to delete the channel Cancel Fig3 112 Delete the selected channel in Bus Signal column ZEROPLUS Logic Analyzer S BN All the Buses and channels will be deleted Do you want bo continue i Cancel Fig 3 113 Delete all Buses and channels in Bus Signal column ZEROPLUS Logic Analyzer x A All the Buses and channels will restore to the default Do you want to continue Cancel Fig3 114 Restore the deleted Buses and channels in Bus Signal Column BA Find Data Value Ctrl F ESI Find Pulse Width fs0 To b Place Add Bar al le m E amy Hand H Normal ESCAPE Show all Data F10 es Previous Zoom Ctrl 2 Data Format Waveform Mode Color Bus Data Golat Bus Single Data Golar Fig3 115 Right Key Menu on the Waveform Area FM0714A Fe FR AR 17 BPR S lt eroplus Technology Co Ltd Place d Place 4 Bar ti Add Bar Place E Bar S TR E Place Ds Bar ay ene H Place Dip Bar R Normal ESC CAFE Flace More Tip The right key menu on the waveform area adds the function of Place Ds and Place Dp However the funct
95. Ltd User s Manual V3 12 STEP 1 Put the CAN 2 0B Plug in the Plugins as the Fig4 35 ED Shiri NRE Fegan Pug dl Fu gibc cl Fig4 35 PlugiInsA STEP 2 Select CAN 2 0B in the Protocol Analyzer list e Solor Gonfig Activate the Latch Function OF ZEROPLUS LA CAN 2 06 MODULE 1 32 00 CN01 ZEROPLUS LA I2C EEPROM 24LC561 24LC562 MODULE 1 00 00 CNO1 ZEROPLUS LA I2C MODULE 2 01 03 ZEROPLUS LA LG4572 MODULE 1 00 00 CN03 ZEROPLUS L PECI MODULE 1 11 00 CNO1 ZEROPLUS L PT2262 PT2272 MODULE 1 00 00 CNO1 C ZEROPLUS LA S2Cwire AS2Cwire MODULE 1 00 00 CNO01 ZEROPLUS LA SPI MODULE 1 11 03 ZEROPLUS L UART MODULE 2 13 00 CNO1 ares a A a ZA OOS ORI Fig4 36 Bus Property STEP 3 Click Parameters Configuration button select Register and enter the Serial Key PROTOCOL ANALYZER CAN 2 08 Fig4 37 Protocol Analyzer CAN 2 0B Register dialog box 114 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 4 Bus Packet List Bus Packet List is a graphics list which is used for doing Statistics and showing Bus Packet List It is visual and direct especially for 12C USB 1 1 and CAN 2 0B When there is a packet list it gets twice the result with half the effort to check the data Packet List has its startup button in Toolbar After starting it it will show a small window under the waveform window
96. Ltd User s Manual V3 12 Lt ST tt a UF ENO Looo0000 UNE WOM ce A AA i Tn n CHOLLO IUT Fig4 159 Analyze the Data Between Ds and Dp 5 STEP 5 Click Sl again the waveform return the original state Ma z Filter 10 I Pussi gnal Trigger Bus 1 UAE A UAE A TOO0000OO OME MO AAN n OO A n STS CHOLLO T T Fig4 160 Restore the Original State eal il Az Tip The Refresh Protocol Analyzer function can come into effect while the Ds and Dp are activated 182 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 11 Memory Analyzer Memory Analyzer enables the system to divide the packet format in the Protocol Analyzer and display the Address and Data in an independent list It is better for understanding the relative relationship and status of the Address and Data in the operating process of the Protocol Analyzer Users will know the operation when they use this function It improves the efficiency of knowing the conditions 4 11 1 Basic Software Setup of Memory Analyzer STEP 1 Click Tools on the Menu Bar then select m to activate the Memory Analyzer function Waveform Display Listing Display Hot Mews Window d Real time Monitoring Navigator m Memory analyzer DA Bus Packet List Statistics Window Cascade Horizontal Vertical Screen Display d w 1 LaDoci Fig4 161 Memory Analyzer In
97. P 16032U LAP 16064U LAP 16128U LAP 32128U A LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 32128 Modules 180 FM0714A O PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 10 Refresh Protocol Analyzer The Refresh Protocol Analyzer function enables the system to analyze the data between Ds and Dp again 4 10 1 Basic Software Setup of Refresh Protocol Analyzer STEP 1 Click Tools on the Menu Bar then select Sl or click on the Tool Bar directly to refresh Protocol Analyzer Customize Color Setting GUS Bus Property A ee Multi stacked Logic Analyzer Settings Analog Wayerorrn i Refresh Protocol 4nalyzer Image Encode O50 stacked Settings Fig4 156 Refresh Protocol Analyzer STEP 2 Transmit the tested Protocol Analyzer signal to the Logic Analyzer for example Protocol Analyzer SPI Buss Signal Filter H Ms I I I I I I I I I kd Eusi p l i UNKAOW 2000000 UNENOW 0 TT TOO00D000 UNE MOr N A a M on oe ee a Fig4 157 Waveform before Refreshing Trigger 10 a 10 eal Al O42 STEP 3 Choose Select an Analytic Range to select the analysis range and drag Ds Bar to B Bar Mnn O O a i OE n LLL Fig4 158 Drag Ds Bar to B Bar STEP 4 Clic lite the Logic Analyzer will analyze the data between Ds and Dp 181 FM0714A Phe PR ip BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co
98. Page fi coua fi Baari oam fesoreze a Rl eR eM olm l Hoigm 26 Trager Deloy Scale 2 591 224us Display Pos 142 149615us APos 52 0884ms 7 A T 520884ms 7 A B 6us 7 Total 78 6034ms Display Range 77 36901 ius B Pos 52 0874me Y B Te S20874m6 Y Compe Rate t 91 903 Y 45 10 10 15 Bus Signal Tagger YV wano pk om ao UUA UA A A A A A ALU on L SLUNJ LNS LI L SULT i FA M A FAA eM A F A i g ti te amp WT CD CT a CD ET J P hannel Selection coha Selection Conden Parameter Warring Parameter Refresh F statatxs Piter _ Ei a r r A2 0 0 1 0 9 0 Os Do a3 0 0 1 0 0 0 Ds Do AA 0 0 i 0 Q Q Ds Do as 0 0 1 o o 0 Ds Dp aM 0 0 1 a 0 Ds op a 0 0 1 0 5 Q Ds lp BO 0 0 1 0 o 0 Ds Do mjs 0 0 1 0 o o Ds Do Rewty End DEMO P Fig 3 132 Logic Analyzer with Statistics Enabled There are four options for adjusting how statistical information may be presented These four options are Channel Selection Column Selection Condition Parameter and Warning Parameter Channel Selection z T bo gh 1 0 Pra VM vM VM VM Ww Ww Mw Pte M VW Vv Vv Vv vw Ww Ww Ptc VM VM WM VM VM Ww WM Ww Paton Te ie ie fey iis fe is Pote dfa aa a a ee a a Gea sim is ffm a Pome Ges Pes fees fees anes es e feed Pos jee ts ale she ee ie late Port el Renee es a S es a ce ae laa Sli lh dat lS ila al Pothole fo Se ee ie ae rt ee ge Na Us es Ps ois a rat
99. R SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Customize Export Waveform F2 F Customize Fig 3 76 Auto Save Setting See Section 3 5 for detailed instructions 58 FM0714A Phe AR AR ih BPR lt eroplus Technology Co Ltd Color Setting BUS Bus Property See Section 4 5 for detailed instructions 59 The Zeroplus Logic Analyzer User s Manual V3 12 Color Setting xX Workaround Wi aveform C Relating LEEEHLELL After the background iz altered comesponding color fo Jal automatically changes according to the contrast ratio When being printed the a background is white Cancel Default Help Fig 3 77 Color Setting See Section 3 6 for detailed instructions Bus Property x Bus Setting Bus Color Config P Activate the Latch Function 40 X Rising Edge Protocol Analyzer Setting Parameters Configs ZEROPLUS LA 1 WIRE MODULE 1 10 00 CNO1 ZEROPLUS LA 3 WIRE MODULE 1 04 00 CNO1 ZEROPLUS LA 4C97 MODULE 1 02 00 CN01 ZEROPLUS LA 4RITHMETICAL LOGIC MODULE 1 51 00 CNO1 ZEROPLUS LA BUS MODULE 1 00 00 CN01 ZEROPLUS LA CAN 2 08 MODULE 1 32 00 CNO1 ZEROPLUS LA CCIR656 MODULE 1 31 00 CNO1 ZEROPLUS LA Compact Flash 4 1 MODULE 1 01 00 CN01 ZEROPLUS LA CMOS IMAGE MODULE 1 00 00 CNO1 x SIEM AOI A DALT Teh Ce ne BASDI Id id AO O
100. RI V Use the DsDp More Protocol Analyzer cmi Hb Fig 3 78 Bus Property Bus Activate the function of analyzing the Bus Color Configuration Open the Color Configuration dialog box to set the conditions for the Bus Activate the Latch Function Activate the latch function Protocol Analyzer Activate the function of analyzing the Protocol Analyzer Use the DsDp Use the Ds and Dp to help analyze the Protocol Analyzer Find Find the desired Protocol Analyzer module Users can input the Protocol Analyzer name to quickly find the Protocol Analyzer module from many Protocol Analyzers After inputting the first character of the name in the Find box of Bus Property dialog box the corresponding module will be displayed in the Protocol Analyzer list box according to the input character See the figure below FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Bus Property E x Golor Gonfig A0 v Rising Edge Parameters Gonfig ZEROPLUS LA 1 WIRE MODULE 1 10 00 CNO1 ZEROPLUS LA 3 WIRE MODULE 1 04 00 CNO1 ZEROPLUS LA AC97 MODULE 1 02 00 CNO1 ZEROPLUS L ARITHMETICAL LOGIC MODULE 1 51 00 CNO1 ZEROPLUS LA BUS MODULE 1 00 00 CNO1 ZEROPLUS LA CAN 2 08 MODULE 1 32 00 CNO1 ZEROPLUS LA CCIR656 MODULE 1 31 00 CN01 ZEROPLUS LA Compact Flash 4 1 MODULE 1 01 00 CNO1 C ZEROPLUS LA CMOS IMAGE MODULE 1 00 00
101. S cies satiate E E vedio airncua e as uncer mnnnientscs basednaaniotencesemmeuTh bees 98 4 2 US ECG ANY SIG a serene adascatsiasweneietogserreisines E A E OE 110 4 3 I PVN SIS ert nt caeetewaanachnarsutenevoeiesh E E 113 4 4 BUS TU a I rc csp cc cia ik ea et pee cca E ean ee ree eae 115 4 5 5S Pay Sls a E dewoseresruaateuneccnveis mums adaeaserer E 122 4 5 1 EUS PAIN Sis aeons accnea acataabeniaaeuan cusanbasna E anni deaan eaanabuashnesesanseeinauiaranacts 123 4 5 2 VG PINAY SIS seeps es esse E Seca Soc cee EE sie doce Src eevee ears nde A nose faced E E E E 126 4 5 3 UART Analysis cece cect eee nae ede nc tn ence cee dae dee tee 132 Aod oa BP 062 re oO cre Aa eC Cr NC eee ee ree eee eee 137 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 499 TWIREANANSIS viiese E Ee anai aai in arna 142 4560 HDOANANYSIS eee E EE a RE eee ere ee eee 152 45 7 CAN20BA alysiS een eno a SEEE EOE 159 4 6 COPES IO a A E A 169 4 6 1 Software Basic Setup of COMPIeSSION ccccecccceeccceececeeececeecececeeseeeeseeceseueesseesseeeeseeeessesetsaeees 169 4 7 Signal Filter and Filter Delay osecccccecicsapiacteacncesetna ses dabendedtenateecdeecsdaak neeudaddeidaghastseasebentdeiesdaesslendedteand ees 171 4 7 1 Basic Setup of Signal Filter and Filter Delay c ccccecccccseeeeeeeeeeeeseeeeeeseeeeeeeeeeeeseeeeesseeeeeseaaenees 171 4 8 PONS FION se E S E E 176 4 8 1 Basic Software Setup of Noise Filt
102. Scale 27 5301532 Display Pos 343 APos 64527 7 A T 64527 v A B 30 v Total 131072 Display Range 345 1034 B Pos 64497 B T 64497 7 Compr Rate No Bus Signal eee iene 207 465 f 63 815 i 67 836 205 487 343 138 r 430 738 618 439 i 756 0 03 893 74 _ 1031 391 f Y as aad a0 40 x galal Bus Trigger Protocol Analyzer Trigger A2 A2 Bus Name Operator Value fica fruit E sf a4 A4 Data Format g A5 A5 C Binary C Decimal C Decimal Gigned g 86 A6 Hexadecimal ASCII C Gray Code PA 87 Complement B0 B0 Bi B1 B2 E2 Cancel Defaut Help Fig 4 32 Bus Trigger Setup FM0714A 7P RE TFS AR 1 BBR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 3 Plug Analysis Plug Introduction Protocol Analyzer operates in the form of Plug every Protocol Analyzer has a plug per plug is independence modularization One Protocol Analyzer plug can analyze many Buses at the same time however because the independence of every plug the Protocol Analyzer plug only supports I2C UART SPI HDQ 1 WIRE CAN 2 0B at present In the future it will support more Buses and when the Protocol Analyzer renews it only needs to download the new Protocol Analyzer plug to cover the old Protocol Analyzer plug the speed is very fast Operating Instructions There are Plugins data file in the position of installing LA sof
103. Snop Daa Donk Window Heip igl x realm eae fet ae Ta Km FOF ef Ten aa ES ed a F Trigger Delay Scale 1 Qus Displar Pas Ones A Pog 1 Slug 150m A B 30lus Tatal D0 Airie 1 ConiprRaie ho Digplay Range 20us 200u A PosiSius Trigger Delay Time ius Mine Vues Mane VF P11 sh Tempest Dirly Chak T Pot Ont Sted Pot 2 Oiri End Pot 18 45mi Se oe ce es Eee ae the bigger bar disappears irom van TTT es 102 FM0714A D 103 Tip PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Fig 4 ia Trigger Page and Screen 1 To ZEROPLUS LAF a tel Standard ar st _ POGUE Lathoet I ty E File Bjs Trigg Fumiop Data Tonks H isl x Osa amp Ban zal LIL bb TIE wj ih SOKHz x nm l 50 4 Page i ein z al J us E ge ge Be Te to Bole l gt Disli Poe Ores APos 1S0ug A Ts tue n ABs 300us cae Display Range 25 Dus 206 A Pas 1Slun A T 145lus Seale 10u Total J0 Aurie 10 a ee er Batt ant a l a UEA Minc Oe Ma 167 261918 Tigges Positnn Teper Daley Block _ a ef Ee Hee IMr Mar 16776151 BrE E a T Pos Ot Sine Pins 78 a End Pen 100 37 Se Ene eee dapas from hm _2 2 fe LS OK Canel Del ul
104. Technology Co Ltd User s Manual V3 12 DNS RAR E fk s a one ss Bow e a e Pop 1 CE EEEE E E S L EEE Hege Pe z oel hatha Capim Poe 101 2840ree A Por 4 99 etim A TeGSeletera Tee 20 Shere Crepi Henge ORUET Deve Shee itu S Telttn i ye CHEC e SR E S ee Jeet A ome BL d i 0s ou 2u 205 Oust ae wu ene Ett om om F da i va Jo EI f A en d Je j E m dm r ga Reverse ga ca nr Tip DNS RAR E fzx E S ieo s m SO s 4 Pop 1 SRS coe S rrew e ee cee bt Mies o Hoge Pe o Tapper Oetmy ims Dwel tatha Capim Poe 101 2840ree A Pos dattie A TeGSeletewa d Tee 20 Stee Coaptan Henge ORRET deve Shee itu S Tetttn This function of Reverse is used to reverse the collected signal Change the High Level into the Low Level change the Low Level into the High Level The Reverse of Waveform Mode displays with the dashed so it is easy to distinguish f CICE oe R et ei en ae ee Re EN at Fig3 109 Reverse Function Displayed in the Waveform Window Add Channel x Channel fao dd Channel EE Fig 3 110 Add the required channel in the Bus Signal column 7EROPLUS Logic Analyzer AN Do you want to copy the channel Copy Channel Cancel Fig 3 111 Copy the selected channel in Bus Signal column 74 FM0714A Pe AR AR ih BR eroplus Technology Co Ltd Delete Channel Delete All Channels Restore Default Channels Right
105. Trigger Position fo Mo Trigger Channel External gt fico Y Trigger Type Activate f Trigger Edge Rising Edge Video fall Lines f pulse lt fio ns Polarity neq Upper Lint za HE Tig when outside lawer Linit 2 o E STEP 9 Set the Connection Mode to USB or TCP IP according to the connection mode of DSO If selecting TCP IP it is necessary to key in the IP Address of current computer Users also can select AUTO to auto recognize the Online Mode Tektronix 1000 2000 series adopt the USB Interface to connect DSO Settings Ed Oscilloscope Brand Tektronix Connect Mode Stack Parameters Current Connect Model esimse ooo Sampling Frequency fioo Hz Stacking Delay fo Ps Trigger Position fo Mo Trigger Channel External fico Y Trigger Type Activate i Trigger Edge Rising Edge z viden fall Lines Pulse lt fino ns Polarity neq Upper Onit fa PE Tig when outside lower Linit 2 o E 195 FM0714A 7P Re FR AR i BRAJ The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 10 It will display the currently connected DSO Model after pressing the Online button DSO Settings Ea Oscilloscope Brand Tektronix Connect Mode ff LSB f TRIIP f AUTO Use the Sqilenb GPIb bo WSb Switching Gard Stack Parameters Current Connect Model ns 1007p Stacking Delay J Ps i Trigge
106. Users can alter its size to find more data Notice If you want to learn more about the Bus Packet List please refer to the Specification of the Protocol Analyzer gt ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 oj x o File Bus Signal Trigger RunjStop Data Tools Window Help la x jae cmt i ot Fe EB pb O aK z a h 50KHz e m aa He Page I J Count fi RR 0 fj GB 9 331053u a Rl oe Be Be Te k Bb Scale 9 331053us Display Pos 3 084115ms APos 150us A 150us 7 A B 300us 7 Total 20 48ms Display Range 3 317391mMs B Pos 150us Y B T 150us 7 Compr Rate No Bus Signal Trigger 20 1 5 1 0 1 5 20 25 z YV as x feCUeUCeRCUCCUCECCRCECCECEECECCNCECCECERCRCERCECE Omo 0 Per EL LE LE Le ee eee el A2 A2 aa ae TI o TTO E a ae 65 45 o 46 46 A 47 60 B0 B1 Bl B2 E2 B3 B B B4 g bs 65 B6 56 B 67 g co o c ci g c2 c2 ga c3 C 1 4 J Ready FO End DEMO tC iCGY Fig 4 38 Packet Icon W ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 5 x o File Bus Signal Trigger Run Stop Data Tools Window Help laj xj OSHS 48 ee Epp p o f2k_ z 50KHz JNE 4 Page fi Coun fi all AASR R e 9 331053u wt R a ae Be Te le 9
107. a Fajen agg e i E I i yai mr Fig 3 158 An Altered Interface Sample to Be Used in Subsequent Chapters 95 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 The Flow of Software Operation T oo Delay TimeClock Tig Cia ea a i _ ft wo om Trigger Page hg I talec Analysis Finictioti Trigger Postion 50 Hip ih Trigger Count Activate Signal from Testing Baxar UART Bus Analysis Acquire Wavefa SPI Bus Analysis Tools to Annalee Data ay Be Je ye BA te 90 P r Ber Th Bus Analysis UART Bus Analysis ES Min goog SPI Bus Analysis H Sns E k Height 22 Fig 3 159 Software Flow Diagram Conclusion Information demonstrated in this chapter is only for entrance level There are more advanced approaches which may require fewer steps than those shown in this chapter This chapter is meant to equip users with sufficient grounding of the Logic Analyzer s software interface 96 FM0714A 97 PRAH RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 4 Introduction to Logic Analysis 4 1 4 2 4 3 4 4 4 5 4 6 4 1 4 8 4 9 4 10 4 11 4 12 4 13 Logic Analysis Bus Logic Analysis Plug Analysis Bus Packet List Bus Analysis Compression Signal Filter and Filter Delay Noise Filter Data Contrast Refresh Protocol Analyzer M
108. a Pee ite oe Fig3 94 Select Channel button After clicking the Right Key of the mouse the Select Channel dialog box will pop up as below FM0714A 69 Phe AR AR ih BPR lt eroplus Technology Co Ltd wwe Memory Analyzer OF Bus Packet List Tip Setting Set up the packet list Refresh Click it the content in the packet list will be refreshed Export Users can use the fragment to work record and analyze the packet list data As Export according to the packet list arrangement it exports the text file and csv file Synch Parameter Open the Synch Parameter Setting dialog box The Zeroplus Logic Analyzer User s Manual V3 12 Select Channel x Fig3 95 Select Channel dialog box In the Select Channel dialog box users can select the channel which users want to display users can select four channels at most the defaulted channels are AO A1 A2 and A3 there are four channels in total Fig 3 96 Memory Analyzer Interface See Section 4 11 for detailed instructions vere Oe Asg ARAD ee je jool os a Boe a a coe ft a Emoji Ool fae See eee Be AO 56 He fe a Tappe Oaie ewt j ihar Deap Poet A piiirea A Po hiia Toi hFa iia Tene J oieri OE CETA E BP oe laai G Te lite F Cee ae ih f z Ps I f a isa hed s i Pe eae fe ei es a ee ee ee ba PEE bas ea ai T hui a Daa l gai GHz ie Ph as Gels a Ft Tees Cee CRAB Geb pein Thos r 1 a
109. agram 1 trpical 1 Wice coena sequence Fig4 99 A Typical 1 WIRE Conversion 1 Master keeps Protocol Analyzer at low signal standard speed 480us high speed 48us as the Reset Pulse 2 Then Master releases Protocol Analyzer and locates a Presence Pulse responded by any online Slave 3 The above two points are Reset Pulse and Presence Pulse which can be put together as a Reset Sequence 4 If Presence Pulse is detected the slave location will enable Master to access Slave using the Write 0 or Write 1 Sequence 145 FM0714A 5 146 PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 1 WIRE Serial Number 1 Every 1 WIRE Slave has a unique laser memory 2 The serial number is 64bits 3 The serial numbers are 8bytes in total located in three individual which are illustrated as below 64 bit Registration ROM number B hit CRC 48 bit Serial Number 8 bit Family Code MSB LSB VISE LSB 4 Starting from LSB the first byte is for family code which is used to identify product categories 5 Next the 48bits is the only address for storage 6 The last byte MSB is used to store CRC FM0714A O PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 5 1 Software Basic Setup of Protocol Analyzer 1 WIRE PROTOCOL ANALYZER 1 WIRE x Configuration Packet Data Format Fiegister Pin Assignment P
110. al Name Bus1 X Next Previous Close Bus Item Find Min Yalue Max Value Start v 0 F Start At End At When Found Statistics Ds v Dp v a X Statistics 0 j FM0714A 47 Phe AR AR ih BPR lt eroplus Technology Co Ltd ol Find Pulse Width Tip This function is mainly used for finding The Zeroplus Logic Analyzer User s Manual V3 12 Waveform Find x JV Activate the function of Chain Data Find Bus Signal Name Bust Next Previous Close Please key in a chain of data with a comma to compart them for example 0 32 0 45 0 50 0 66 It needs to add the packet name in the Protocol Analyzer for example ADDRESS 0 24 DATA 0X20 Start At End At When Found Statistics ps x Dp x la x Statistics o Waveform Find x JV Activate the function of Chain Data Find Bus Signal Name Bust Previous Close Please key in a chain of data with a comma to compart them for example 0 32 0 45 0X50 0 66 It needs to add the packet name in the Protocol Analyzer for example ADDRESS 0 24 DATA 0X20 01 02 03 Start At End At When Found Statistics ps Dp la Statistics fo Fig 3 49 Process of Activating the Function of Chain Data Find a aiia a 3 ax s abin ACE i e r n fee oe CA Wee Sal Re ee L ee kaija lima Paa ti pjm apaa spe n Li G partii Ta i eee E M T Tse
111. ancel Default Help Fig 3 31 Set Bus Trigger See Section 4 1 for detailed instructions Channel Trigger Setup x Filter Condition mom Trigger Condition Ponp Elter Condition X 2 RRAK Trigger Condition lt SC Ne y4 RA me Me a Fiter Condition X X X X X X X X Pote EF Trigger Condition 2 lt x ne RA RA i KA Filter Condition po PotD 7 a OF OF xe OF F Trigger Condition gt lt x xX x x OG PE DG Fig 3 32 The trigger action tells the Logic Analyzer when to send data to the PC The trigger conditions determine when the trigger point starts to record the information Open the Trigger Mark function See Section 4 1 for detailed instructions Pulse Width Trigger Module Set a trigger condition for a single channel and the signal in this channel can be triggered in the predetermined range However this function is required to use with the hardware of the Pulse Width Trigger Module If you want to learn the detail please refer to the Specification of the Pulse Width Trigger Module Set the trigger condition as Don t Care See Section 4 1 for detailed instructions Set the trigger condition as High See Section 4 1 for detailed instructions Set the trigger condition as Low See Section 4 1 for detailed instructions Set the trigger condition as Rising Edge See Section 4 1 for detailed instructions Set
112. and H 51 The Zeroplus Logic Analyzer User s Manual V3 12 i 69 7 195 569 4194 269 aaa i 32973 2B175 23378 18 58 UUUUU UU UU UU 1 Fig 3 60 To Zoom Out left click and drag the mouse point from right to left Dos E Te 8h G2 4 Jace See TR RES tiated a wf e ie tea Fig 3 61 To display the Tooltip left click and drag the mouse point from right to left or from left to right 1045 Z2OUS Fig 3 62 Click Hand and then press and hold the left key to drag FM0714A Phe AIR AR i PRE lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12 R Mormal ESCAPE Reset the mouse function to the system default gq 2oom In Fg zoom Gut Fa Tip Zoom In and Out can be switched by changing the percentage value in the pull down list 1 The system can set the value of Zoom In and Out The default unit is ws When zooming in it will be automatically changed to ns When zooming out it will be changed to ms s or ks 2 Pull down Menu There are thirty scales The maximum zoom in and out is the cycle of each grid 0 0001piece The minimum zoom in and out is the cycle of each grid 1 000 000 000 Zoom in and out the proportion with each grid being the cycle the zoom in and out is 100 The time of Zoom In and Out counts by the clock of each grid sample frequency For example 1 Each grid is being a cycle the zoom in
113. art Point Delay Time According to Filter Condition Start Edge 100ns End Edge Min 100ns Opposite of Filter Condition Period Delay Max 6 553ms Display Bar Setup Bar Style Original Bar Width 100ns OK Cancel Restore Defaults e O Fig 4 139 Signal Filter Setup Set the high level as Filter Condition on the signal A1 Step4 Signal Filter Setup 1 Setup the Filter Condition as or on the signal to be analyzed 2 Click OK then click Run to activate the signal from the tested circuit to the Logic Analyzer 3 The system will display only the waveforms of the signals which are qualified by the Filter Condition 171 FM0714A Be 32S BPR Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Bus Signal Trigger Filter sae a ee mer ae g 40 an ka a 311 795us G8 Sue teu 20 4us g Al Al E mf 309 055us il g A2 A2 i _ 655 36us g A3 A3 _ 659 36us At 44 655 36us 45 45 655 36us 46 65a SOUS __ Busine Troa Fao ee ee ee eee eee e 2 T ea T OUT OT gaa mp 388 33us Eaa 388 33us A3 A3 388 33us a4 As amp 388 33us WS As a 388 33us Fig 4 140 Without With Signal Filter Setup The first picture shows the result without any signal filter setup The second picture shows the result which has set the high level
114. as illustrated in the following figures Adjustable Base Stand Fig 1 9 A view of the Zeroplus Logic Analyzer LAP A Series See Fig 1 12 for detailed information on the Signal Connectors Fig 1 10 Side view of Zeroplus Logic Analyzer which draws its power from the USB connection Port A AO A7 Port B BO B7 Port C CO C7 Port D DO D7 For extended modules or For signal transmission to active other instruments For the External Clock connection devices not designated to be analyzed For grounding test circuits Fig 1 11 Rear view of Zeroplus Logic Analyzer LAP A Series 8 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 2 Zeroplus Logic Analyzer LAP C Series share the same external features as illustrated in the following figures Semel LEI N RUN READ TRIGGER POWER Siul Connec bos NS iy Fig 1 12 A View of the Zeroplus Logic Analyzer LAP C Series See Fig 1 11 for detailed information on the Signal Connectors Fig 1 13 Side View of the Zeroplus Logic Analyzer the power of the Logic Analyzer is drawn from the USB connection PortA AO A7 __ Port B BO B7 Port C CO C7 Port D DO D7 lt 4 For external modules or devices not designated to be analyzed For transmitting signals ta_ activate other instruments For connecting the External Clock Fig 1 14 Side View of the Zeroplus Logic Analyzer
115. ata Data Data Data Data Data Data Data Data Length 6 Bust usy 373s 2 3 4 5 6 7 otite2a 3 l Fig 4 50 Synch Parameter on the BUS Packet List At the same time a Synch Parameter Setting dialog box is added Synch Parameter Setting 7 xX Synch Point of Packet List Synch Point of Waveform Area Top C Left Middle Middle Fig 4 51 Synch Parameter Setting Dialog Box Activate Packet and Waveform Synch The default is not activated Top When the Packet and Waveform Synch is activated the synch point in Packet List is the top packet segment which is displayed by list Middle When the Packet and Waveform Synch is activated the synch point in Packet List is the middle packet segment which is displayed by list Left When the Packet and Waveform Synch is activated the synch point in the waveform area is the left packet segment which is displayed by waveform Middle When the Packet and Waveform Synch is activated the synch point in the waveform area is the middle packet segment which is displayed by waveform Activate Packet and Waveform Synch select Top and Left Synch Parameter Setting x W Activate Packet and Waveform Synch Synch Point of Packet List Synch Point of Waveform Area Middle Fig 4 52 Synch Parameter Setting Dialog Box 120 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Display the corr
116. ata with 128K takes a long time why does 256K make sense The reason for this extra RAM Size is to cope with the fact that a few of the 1 16 channels may have a large data input Use the pull down menu to choose the speed of the clock on the board being tested The sampling frequency should be more than 4 times higher than the signal to be measured so that the waveform duty cycle depiction will be accurate FM0714A Phe AR AR i PRE lt eroplus Technology Co Ltd Sampling Setup Clock Source Asynchronous Clock f Internal Clock Frequency S00H Synchronous Clor a External Clack SKHz E 25kHz f Rising Eddcreys C Falling EqpUM aa Mote The exti 400KHz Sampling RAM Size RAM Size 16K Synchronous Clock of LAP A C LULA f ry INTISARI TITTI j j At A TANNA ANNALAN iy Tip ng Compression 35 The Zeroplus Logic Analyzer User s Manual V3 12 Choose the frequency of the clock on the board of the Logic Analyzer Select External Clock to acquire data through external sampling Choose either Rising Edge or Falling Edge to execute the analysis process According to the users input the value of external frequency in software the software can count the relevant value about signal mode and frequency For example the value of the message the time scale and the zoom in and out will be the value of time mode Connecting the Synchronous Clock Use one of
117. ature is available in this version SW12 Why is the text display covered by other text or outside the display width A At this stage our software interface program has missing code for multilingual support You will have to ensure your system default encoding is one of the following languages 1 any English Encoding en en XX 2 Traditional Chinese zh zh XX 3 Simplified Chinese zh zh CN in HZ GB2312 GB18030 Double check the language configuration in Regional and Language Options 64 txt Outlook VisualBoy i QuickTime S 4 Documents gt i Regional and Language Options a System ei Taskbar and Start Menu s Windows Firewall ey E control Panel 2 gt ee Customize settings for the display of languages JA san rE Windows security 2 senedaumbers tes ard dates YA z Help and Support a LRO Connections Sounds and Audio Devices L Printers and Faxes SY Speech E Bun ei Taskbar and Start Menu FR Stored User Names and Passwords Log off King Symantec LiveUpdate Fig 6 5 Windows Regional and Language Options SW13 Is there a Reset that restores the default color settings for signal output waveforms in the Position Signal Display Area A Yes there is Click Tools from the menu bar and select Color Setting click Defaults However this restores everything in this window You must make a further adjustment if the color setting is the only thing you want t
118. box the Protocol Analyzer SPI dialog box is set as the steps of I2C PROTOCOL ANALYZER SPI xX Configuration Facket Data Format Register 55 Pin Assignment f SS Channel Pin Assignment SECLE 55 Channel DATA Protocol Analyzer Property 55 setting Mode CPHA 0 CPOL 0 Transmission MSB LSE Direction Data Length fe bit E FIIO at the LSB when the bit count is Mot enough Protocol Analyzer Color Cancel Default Help Fig 4 83 Protocol Analyzer SPI Configuration dialog box Virtual SS Idling Time 20ns Mining Masi 31 1 mel I Don t care data bit Step4 Set the SPI Configuration dialog box Pin Assignment SCLK It is the Clock channel and the default is AO DATA It is the Data channel and the default is A2 Protocol Analyzer Property Mode There are six modes for selecting which are CPHA 0 CPOL 0 CPHA 1 CPOL 1 CPHA 1 CPOL 0 CPHA 0 CPOL 1 Rising and Falling Transmission Direction Set the Transmission Direction to MSB gt LSB or LSB gt MSB Data Length Set the Data Length in the range from 1 to 56 and the default is 8 Fill 0 at the LSB when the bit count is not enough For example the value of Data is 1001111 there is only 7 Bits When the value of Data is set to 8 Bits the displayed value should be 10011110 SS Pin Assignment SS Channel Select the channel for the SS the default i
119. d Users opinions are very important to Zeroplus Please contact our engineering team by telephone fax or email with your questions or feedback Thank you for choosing the Zeroplus Logic Analyzer Notice We will not have additional notice for you when there is any modification to the User Manual If there is any unconformity caused by software upgrade users should take the software as the standard 4 FM0714A Phe AIR AR ARAE lt eroplus Technology Co Ltd 1 Features of Zeroplus Logic Analyzer The Zeroplus Logic Analyzer User s Manual V3 12 1 1 Package Contents 1 2 Introduction 1 3 Hardware Specifications 1 4 System Requirements 1 5 Device Maintenance and Safety FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Objective In this chapter users will learn about the package contents description hardware specifications system requirements and safety issues of the Zeroplus Logic Analyzer Although this chapter is purely informative we highly recommend reading this carefully to ensure safety and accuracy when performing any operation with the Zeroplus Logic Analyzer 1 1 Package Contents Verify the package contents before discarding packing materials The following components should be included with your product For assistance please contact our nearest distributor Table 1 1 Accessories List LAP LAP LAP LAP LAP LAP 1 E 1 a 1 Eri 28U a 28U A ss
120. d User s Manual V3 12 STEP 7 Set the Master to be LA or Oscilloscope according to the hardware usage mode DS0 stacked Settings x Channel ViDiv Setting DSO CH1 ViDiv 2 iv DSO _CHZ viv 2 Div DSO CH3 ViDiv 2 iv DSO CH4 iDiv 2 Div Channel Setting only display O50 oso CH1 M O50 cH M DSO_CH3 M DSO _CH4 Channel Height Setting DSO _CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height feo DSO CH4 Height feo Master Logic Analyzer DSO Settings DK Cancel STEP 8 Press the DSO Settings button to open the dialogue box DS0 stacked Settings l x Channel ViDiv Setting DSO CH1 ViDiv 2 iv DSO _CHZ viv 2 Div DSO CH3 ViDiv 2 iv DSO CH4 WiDiv 2 Div Channel Setting only display O50 M oso CH1 M O50 cH M pS5o_ cH M DSO _CH4 Channel Height Setting O50 CH1 Height feo O50 _CH2 Height feo D50 _CH3 Height feo DSO CH4 Height feo Master Logic Analyzer DSO Settings DK Cancel 194 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 8 Select the connected DSO Manufacturer DSO Settings Ea Oscilloscope Brand Connect Mode ff LSB f TGIF f AUTO Use the Sqilenb GPIB to WSb Switching Gard Stack Parameters Current Connect Model esimse ooo Sampling Frequency fioo Hz Stacking Delay f Ps i
121. de DS0 stacked Settings Heig f2 Fig4 54 Bus Property on Menu Bar Fig4 55 Bus Property on Tool Bar STEP 2 Click the Right Key on the Bus Signal column and then select Bus Property Tip The signals must be grouped into Bus or the Bus Property can not have effect oui Filter Bu Y Bus1 i Sampling Setup wW Channels Setup BUS Bus Property Analog waveform j Image Encode Reverse Group into Bus tbr t Ungroup From Bus Ctrl U 4dd Channel Topy Ghannel Pelete channel Delete All Channels Restore Default Channels Format Row Rename Fig4 56 Right Key to Set Bus Property 122 FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 1 Bus Analysis The Bus Analysis function enables the system to analyze the Bus Basic Software Setup for the Bus STEP 1 Click Bus Property the following dialog box will appear Bus Property xj Bus Setting Activate the Latch Function 40 Rising Edge Protocol Analyzer Setting Protocol Analyzer Parameters Gonfig M ZEROPLUS LA 1 WIRE MODULE 1 10 000CNO1 C ZEROPLUS LA 3 WIRE MODULE 1 04 000CN01 C ZEROPLUS L Aco MODULE 1 02 006CN014 C ZEROPLUS L 4RITHMETICAL LOGIC MODULE 1 51 000CN01 T ZEROPLUS LA BUS MODULE 1 00 000CNO1 4 ZEROPLUS LA CAN 2 06 MODULE 1 32 000CM014 ZEROPLUS L CCIR656 MODULE 1 31 000CNO1
122. e After End Packet happens just begin to analyze If it is selected the signal will be decoded when the End Packet appears When CAN Data for expansion combine Basic ID and ID If the option is selected the Basic ID and ID will be combined The Del is displayed in CRC Field If it is selected the Del will be displayed in the CRC Field Protocol Analyzer Color The protocol analyzer colors can be varied by users FM0714A Re AR AR BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Operating Instructions Open the user interface of the Logic Analyzer P ZEROPLUS LAP C 321000 Standard 3 12 CNO1 5 N 000000 0000 LaDoc5 Eh A g 87 67 EZEIN I Km gt Fig4 128 User Interface Sample the CAN 2 0B signal or open the sampled waveform P ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 CAN2 0B y Pe i a E G o T 6 G a 6 G a E G E E G srs astra ozeano a 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms a A 167 695ms Kil f f Fig4 129 CAN 2 0B Waveform 164 FM0714A PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Group the signal channels into Bus 165 W ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 CAN2 0B Sa File Bus Signal Trigger Run Stop Data Tools Window H
123. e meanwhile the color of CH can be changed When selecting the item Only display DSO only the activated DSO CH can be displayed on the waveform The AO A7 can t be displayed see as below figure FM0714A 63 D Phe AR AR ih BPR lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12 Hiis LAP IiE aed E LAG h g a Lie alki H Sa Ee hara e Aaa Gii jek yie tele PIE DARA RANo FAM rear e hi j mj d Pag I cam I aa os D hanm HEF H T Hepi 26 Trigai Deiy 1a De Wan Gate 10 TWIT aa Dipin Pow TS AFM Soe A T tii E Total J0 lins Crumlin Misg 1 AMTET B Pec ilin B Tabine Ciera ata Ha batya lie The a 3 9 a x ti t a a f rmz wo oa 4 a a fy doll fi l S Channel Height Setting Set it from 30 to 400 DSO Settings when the button is pressed the below box will be displayed Master Set the Master to be LA or Oscilloscope according to the hardware usage mode DSO Settings x Oscilloscope Brand Tektronix Connect Mode fe LSE f TEPIP f Alia Wse the alent GPIB to USe Switching Gard Stack Parameters Current Connect Model tos 10025 57 F Sampling Frequency fioooo0 o0 Hz Stacking Delay fo Ps E Trigger Position oo ho E Trigger Channel External 1 00 Trigger Type Activate Trigger Edge Rising Edge Video ail Lines z Pulse r fino ae Polarity Meg F Upper Limit fo ne Trig Wh
124. e HU prevents high pattern ane YUU means bow pater i VR meam Rising Bdge Fi preian Falling Badge E stands for Either ji The dipli and trigger sebup of Bun According the character of the original file bo prevent The daply of message Total 2048 Seale jus Keeping he serii nh een to reproduce channe amd fines Cigar namit Aah Al Kr AJ Ag AS AG Af BO E1 Bi Bs bt i E LE Lah Cl EE ca C4 ch Cb ci oo LEL Dz D3 Di D3 D oF 3j Fig 3 8 Export File FM0714A 30 Phe AR AR ih BPR lt eroplus Technology Co Ltd E Export Packet List The Zeroplus Logic Analyzer User s Manual V3 12 Export Packet List 2 x REED 3 RHED e 0E LAD JEzbhss G Bom IER ot HSH Administrator HITES mez y RTO RERED Tert Files t z mil Export Format Report Form Data Format i Hexadecimal r Bus Output Parameter Yes C No Output Range From First Packet 7 fi The allowable max number of packets of each exported file 100 5000 To Final Packet x 20s 5000 V Pop up an export file automatically Fig 3 9 Export Packet List Dialog Box Users can use paperwork register and analyze packet list data The allowable max number of packets of each exported file 1000 5000 After activated users can self define the display packet number of exported file 1000 5000 Pop up an export file automatically The function of popping up an export
125. e case lemma Note Fig 3 6 Save As Dialog Box Save Save the current file FM0714A The Zeroplus Logic Analyzer User s Manual V3 12 PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Save As Specify the name of the file to be saved Auto Save Save the required file automatically 2x Reo onr HA engm A E zeroplus_la_news_en LBA E zeroplus_la_news_si E E zeroplus_la_news_tr 38 Hees SE Ae 7 o PERE THES W k txt 7 BFE S RPM Text Files txt ARIK mBus Output Parameter gt Data Information Bus Item Yes C No Data Style ALL V Busi spr Perform Model Data Model aota vertical k Data Format Hexadecimal Horizontal fen Export Waveform Ctrl Shift E a 3 Output Range From Beginning of Data 7 10 23ms To End of Data 7 10 25ms The allowable max number of lines of each exported file 1000 60000 feooo0 IV Pop up an export file automatically Fig 3 7 Export Waveform Dialog Box Export Waveform Export a file into text txt or CSV csv formats Bus Output Parameter Decide whether or not to display the parameters of the file to be exported Perform Model Choose whether to export the data either vertical or horizontal Data Style Include ALL ALL BUS PROTOCOL HAS CHANNELS PROTOCOL NO CHANNELS Data Model Export data chang
126. e l Real time Monitoring Navigator wwe Memory Analyzer DS Bus Packet List Statistics Window PUL UL Lil l oOo Cascade Horizontal Vertical Screen Display e 1 LaDoc5 l 2 LaDochi z Fig 3 88 Hot News Window and the Pull down Menu AROR LAP CTED Gariad VAi i i p Ce ee Lee mt Gl E a fie Baliga e ga fark Ja i tee ml DARS a ee ee m ee a Sen x se Page com fl st SOE Yon wf le Ae A Le Hagu 7e 1 Tomer nig oe foe bes Carim Pee i ATs ie oa TD oer a ites Tite a ia T Tei fae Baa lge s Fa ay aes AANA eglsag aiguadsuugaiaytiageaiga Fa pieni E n N A T EE ET A T ee aes re a a s 40 Hkn T PIL avr eis 4i AT Flat Ais i a wr ua T F eau S A me F rE E fin eu iE FH er fe fo wl we P oa a i F ie i F CES OF RCS 3 BC Oe J i bnat ir bima Fig 3 89 Display Hot News Window on the Software Interface e F Edi tO yd Od or Pe en ee ee Brotocal Analizer MWB Y1 017 00 Publish Fig 3 90 Running Text Ads Interface FM0714A Phe AR AR ih BPR lt eroplus Technology Co Ltd Real time Monitoring C Navigator Tip The Navigator Window is displayed under the waveform display area when activating the 67 The Zeroplus Logic Analyzer User s Manual V3 12 Real time Monitoring The Level and the Frequency of all the channels can be monitored according to the Real time Monitoring function of software
127. e Bus data color There are four options which are In Range and Not In Range Data Min Enter the min data that is required by users Data Max Enter the max data that is required by users The max data can be used only when the set is In Range or Not In Range Select Color Select the changed color according to the Bus condition set by users the default is Green STEP 3 Click Color Configuration to open the Bus Data Color dialog box and set the Data Condition 0 and Select Color is Orange Bus Data Color Bus Mame Busi Data Condition Data Min Data Max x mo te Cancel Default Help Bus Signal i ol 0 Y Bus1 40 40 4i Ail Fig4 61 Before the Bus Data Color Setting Buss Signal Y busi ls Com y m y ma y oa y s Y me Y o e10 40 a4l l Fig4 62 After the Bus Data Color Setting Tip Reserve the original state by the above steps STEP4 Activate the Latch Function 124 FM0714A a 0 10 PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Activate the Latch Function The default is not activated When the Latch function is activated the default channel is AO and there are three conditions for selecting Rising Edge Falling Edge and Either Edge the default is Rising Edge Tip The Latch function is available for the LAP 321000U A LAP 322000U A LAP C 162000 LAP C 321000 and LAP C
128. e is used for stacking please download the Windows USB Driver from the Gwinstek Website www gwinstek com a If Agilent oscilloscope is used for stacking please download the Windows USB Driver from the Agilent Website www chem agilent com a If BK Precision oscilloscope is used for stacking please download the Windows USB Driver from the BK Precision Website www bkprecision com 189 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Supported DSO Models Oscilloscope Models On line Mode Manufacturer Tektronix TDS3000 Series USB TC IP GPIB TDS5000 Series GPIB TDS6000 Series In built GPIB PicoScope 3206B Series USB Gwlnstek Agilent 5805000 Series 2540B 2542B 2540B GEN BK Precision USB 2542B GEN Operating Mode 1 Host Slave LA is the Host DSO is the Slave Connect the Trigger Out of LA with the Trigger In of DSO when LA has been triggered it will inform DSO to capture signal fai in m Computer l Device Under lest ZEROPLUS Logic Analyzer 190 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 2 Slave Host a DSO is the Host LA is the Slave Connect the Trigger Out of DSO with the Trigger In of LA and the LA uses external trigger When DSO has been triggered it will inform LA to capture signal LAP B Series support b DSO is the Host LA is the Slave Connect the Trigger Out of DSO
129. e the character for Find The list of characters depends on whether it is a Bus Signal or the protocol analyzer such as I2C UART SPI etc which is being searched See Figs 3 119 3 120 3 121 3 122 3 123 3 124 3 125 3 126 and 3 127 Bus Choose among In Range and Not In Range Enter the Min Value or Max Value Protocol Analyzer Choose the segments bits of the protocol analyzer Select the protocol analyzer item and enter the value for Min Value or Max Value Signal Choose among Rising Edge Falling Edge Either Edge High or Low Waveform Find Edi Waveform Find x Activate the Function of Ghain Data Find Activate the Function of Ghain Data Find Bus Signal Name Fist Gigi pal Pda Next Previous Close 7 v Next Previous Close Min value Max value Bus Item Find Min Value Max Value 4 Falling Edge x 0 F Rising Edge i Falling Edae Statistics Statistics Waveform Find x Waveform Find x P Activate the function of Chain Data Find Activate the function of Chain Data Find Bus Signal Name oS Siqrrarwame f2 Next Previous Close Previous Close Min Value Max Value Min Value Max Value When Found Statistics Statistics A Statistics Statistics o Fig 3 120 Waveform Find Dialog Box of the Logic Bus Waveform Find Ed wWaveform Find x Activate the function of Chain Data Find Tl Activate the functio
130. ect Register Code so that they can use this function Protocol Analyzer Trigger Bus Trigger j x Allow Protocol 4nalvzer Trigger Protocol Analyzer Protocol Packet Value an Data Format E Binary Decimal 0 DecimallSigned f Hexadecimal ASC f Gray Code f Complement Cancel Default Help Fig 4 19 1 Before Registering 106 FM0714A PRE AR i ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Register Dialog Box x The Function is an optional purchased item Welcome to purchase its serial key to activate this Function for your necessary Enter serial key IF you ordered software or have questions about ordering software please Follow the appropriate instructions below Our sales team will respond to your enquiry as soon as possible gt gt By phone bo6 2 bb202225 gt gt Applications through Email service_2 zeroplus com tw gt gt Website http jiva Zeroplus conn Ew Copyright C 1997 2012 ZEROPLUS TECHNOLOGY CO LTD cna _ Bus Trigger X Bus Trigger Protocol Analyzer Trigger Protocol Analyzer Protocol Packet Buel l2C ADDRESS Read Data Format r write f Binary F AACE Decimal 7 4 NACK C DecimallSigned 5 DATA f Hesadecimal 7m D ACK AS D NACK Gray Code Stop REG ADDA Cancel Default Help Fig 4 19 2 After Registering Complement Allow Protocol Analyzer Trigger When it is
131. ed function the selected items inc lude ALL Data Sampling Changed Dot Compression Data Cha nged Dot Compression Some of the data value for the signal c hannels of sampling position are the same for example view the data changed and decrease export capacity this function will be good for users Output Range Choose the range of the data to export from the pull down menus The allowable max number of lines of each exported file 1000 60000 After activated users can self define the display row number of exported file 1000 60000 Pop up an export file automatically The export file can be popped up automatically Users can decide whether to activate the function the default is selected See the export file below B ai sepa p pi sa yee iet Thanta fer uwing FERORLUS Logic Anal per hWormnwn W211 l iFilename 1 owe Fie wire Os KE i Fie cheated on SOLE OSs 24 Legic Anahgor setup information Sampling mode 4 ancdard jr inher sampling frequency DOC He RAM sipe JRE ji None Wrs Data Comprarion The number of Bus 0 The number of channel 37 Trigger Properties Trigger porion 17 Tniggerbewel A Fort 0 W IE Por 1 530 IE Port ei 10 Fon 1 50 Tigger coum j Tigger page I Signal Piiber eebup Filter Condition lengthens or shortens mo j Deliy lime Dabbe iH aada for the segnal of high patem TLI presents the segnal of low plein aid UKA meena chee cone H Semnal Tripper setup Osha for dont can
132. edammacndsuavinacnaiasanousadh ambit 24 3 1 PTS TANT se VO ES A So ioe sess sgt se ee cre cei ied eae tsetse ca net eta eee a cane ee oe re dectns 27 3 2 PA LAist ace a te ec neste cau nein sate aes vrece cee pone Gia cain hietiss oa scien nate eve sane icieacessanepeedseneneascearee nae Tf 3 3 E Cc ea E E E 81 3 4 Customize Mea O recie a dancin 84 3 4 1 Modify Waveform Display MOde cccccceecccceeeeeeeeeeeeseeeeeaeeeeeseeeeeeseeeeesseeeeeseeeeeesaeeeeseeeeeeaeaeeeeeas 85 3 4 2 Modify Ruler Mode ccccccccccssscecceseecceeececceeeecseuseeceuueeeseaseessegeeesseeeeseusessegeeessseeeesssgesesseneeseas 86 3 4 3 Modify Waveform Height amp Correlated Setting ccccceccccsseeeeeseeeeeeeeeeeeseeeeeeseeeessaeeeeseeeesseeeeeeaeas 87 3 5 PUNO AV Ca atunactrncestnebas E E E E 90 3 6 RS NOT IN Ga ee nt cee wns he ect E ne cae ete cles ne als dn ete tne E eee eee 91 3 6 1 Modify Workaround Color ccccccseecceeeeeeceeeeeeeeeeeeeeeeeeeseeeeeseeeeeeseeeeeeseeeeesseeeeeseaeeessaueeesasaeeeesneeesaees 93 3 0 2 Modily Waveform COlOR s sicasecececacac snccasmioecdanasdacatentesgansceaescauatescacseseavesantosdaceccanctanpeecs cuusiesesdecaeieasenanbe ds 94 3 7 The Flow of Software Operation ccccccccccsccccsececeeeeceeeeseeeeceececeaceseaeeeseeceseeessaeesseeeeseecessaaeeeseeeessaeessneeess 96 IMO GUCTION TOL OIC AnAlySIS vance tics daicestantanateadai ue EAn tinue alanteua ES ES ERA raided R 97 4 1 OJCA RAN SI
133. elp lel x Demali a se amp lB A le 9 Scale 74 776633us Display Pos 139 64981 2us A Pos 87 851299us Y Total 167 69579ms Display Range 1 729766ms B Pos 104 033724u A T 87 851299us 7 A B 16 182424us v B T 104 033724us 7 Compr Rate 255 883 Bus Signal gaoa i 3 in Sampling Setup 150 266ms g Ai Al GA Channels Setup 167 695ms A2 42 BUS Bus Property 167 695ms a3 a3 Analog Waveform 167 695ms Image Encode a4 a4 Reverse 167 695ms gas 167 695ms Group into Bus Ctrl G O g A6 46 Ungroup from Bus Geri Po 167 695ms P A7 87 Add channel 167 695ms yo owas un 028 his Delete Channel Bi Bi a 167 695ms B2 52 Restore Default Channels Ree 167 695ms B3 B3 Format Row Ree 167 695ms FE n a TE OO O a ee 87 67 167 695ms ga ee E TE oo i vac i e eac ee a 4 EO O To o SoSo O Ready P d oo Fig4 130 Group into Bus Select the Bus Property to set up the Bus Property dialog box gt ZEROPLUS LAP C 32128 Standard 3 12 CNO1 5 N 000000 0000 CAN2 0B pe File Bus Signal Trigger RunjStop Data Tools Window Help lel x De S Boo oe et IDB gt gt oO fal al Rf e i l 74 776633 Ax Be Te te r a Bar Bar Bar Bar Bar Scale 74 776633us Display Pos 139 64981 2us A Pos 87 951299us Y A T 87 851299us v A B 16 192424us v Total 167 695
134. emory Analyzer Multi stacked Logic Analyzer Settings DSO stacked Settings FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Objective Chapter 4 gives detailed instructions on performing two basic analysis operations and other advanced analysis applications with the Logic Analyzer These two basic analysis operations are the Logic Analysis and the Bus Logic Analysis which are fundamental to all further applications The other advanced analysis applications are the I2C Inter Integrated Circuit Analysis the UART Universal Asynchronous Receiver Transmitter Analysis the SPI Synchronous Peripheral Interface Analysis Compression Signal Filter Setup Filter Delay Setup etc 4 1 Logic Analysis Logic Analysis is meant for a single signal analysis Section 4 1 gives detailed instructions on the software s basic setup Basic Software Setup of the Logic Analysis Task 1 Clock Source Frequency and RAM Size Setup Fig 4 1 will appear Sampling Setup X iy Channels Setup ae ae l Signal Filter Setup internal Clock ET n Frequency ES Group into Bus Ctrl G Syerechromous Chock Ungroup from Bus atri HI I Extena Glock e p Expand E Min 0 0010Hz Mace 100MHz Collapse Nate The external clock voltage lewel is the same as the port A bigger level Format Row b Sarpin _ RAM Sine Compe epemn Mace Saya Filter name RAM Sine zx Datat ee Signal P
135. en outside awer Linit 2 o IE OK Cancel Oscilloscope Brand User can select the oscilloscope brand to stack such as Tektronix Then click the Connect button to show the oscilloscope model None will be displayed if no oscilloscope is connected Connect Mode Users can select USB TCP IP or Auto If selecting the USB the oscilloscope will FM0714A Phe AIR AR a ARAE lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12 connect with the PC by USB If selecting the TCP IP the oscilloscope will connect the PC by TCP IP and the IP needs to be set the same as the IP of current PC If selecting the Auto users can connect without any setting Current Connect Model Display the oscilloscope s name Sampling Frequency It matches with the sec case spin button of oscilloscope Its value is the reciprocal of horizontal scale the range is 1 5ns 1 50s Stacking Delay It is used to align the T Bar and the T Bar of LA when users use the main program to show the oscilloscope s waveform The range is 1000000ps 1000000ps Trigger Position It matches the horizontal spin button of oscilloscope the range is 0 100 Trigger Channel It matches the trigger level spin button of oscilloscope the lever range is 16V 16V Trigger Type The other options is available only after the active option is selected A Trigger Edge Users can select Rising Edge or Falling Edge B Pulse Users can select
136. er ceccccccccceeeeceeeececeseeeeeseeceseceseaeessaeeeseeeeseneessuseesaaees 176 4 9 DA glr E a eens ie a een a Settee ees taal ecg ly ater a ences cade ae E E E E Ga es hae 178 4 9 1 Basic Software Setup of Data Contrast ccc cece cccccceececeecececeeeeeeesecessecesseeeeseeeeseeseseueessueeeananees 178 4 10 Refresh Protocol Analy ZN ssssacdacizieccceinhorad cnescavesantdadacecaanedaasencscaaeeiacaasebedeuasnensnesasssddaeeeaseasseacaceearactees 181 4 10 1 Basic Software Setup of Refresh Protocol AnalyZer ccccccsecceceeeeeeeeeeeeseeeeeeaeeeeesaeeeeesaaeees 181 4 11 ISTO PANY ZOU sesi aE E SR a E aR EAER EAEE eademesntenaann ee 183 4 11 1 Basic Software Setup of Memory AnalyZetl cccccceececceeeeeeeeeeeeeeeeeeseeeeeeaeeeesseeeeesseeeesaeeeeeas 183 4 12 Multi stacked Logic Analyzer SettingS c cccccccssseeccesececceusecceeneecceececseueeesseeeeseeeessegeeessuseressaaeees 187 4 12 1 Basic Software Setup of Multi stacked Logic Analyzer Settings ccccccssseeeeeeeeeeeeeeeeesaeeees 187 4 13 DSO stacked SS UMN S acces sascha dinacaies Sethe etlnn eect dcte Ried arae diene edd Seran AE EAN RESE ean tie ra n iaaa E nAn 189 TROURICSMOOUIMG eirean E E E 198 5 1 Installation Troubleshooting sssrinin annia nEaN AAEE AARSE AE AEE 199 5 2 Software Troubleshooting 2 2cccencacsicescnccedarsnetadesadideonndindvenes sececdueeredestanensducedixdestiaesdnededandiadeessbddwersnenseeees 200 5 3 Para Ware TroubleshootiMg
137. er s Manual V3 12 4 5 2 3 Protocol Analyzer I2C Packet Analysis xl Configuration Timing Facket Data Format Register ltem Color ltem Color m isid DH ANACK ox lv Read o B 7 D ACK so write a B D NACK o lv Data o B M Describe o E M AACK o B Reg Addr a Cancel Default Help Fig4 70 Protocol Analyzer I2C Packet dialog box In the Packet dialog box users can select the set item to be displayed and the color of item It is a Bus Packet List view which includes 4 formats which I2C happens as follows c setting esfre Export Synch Parameter Packet Narre Timestamp ADDRESS Write A ACK DATA a CATA a DATA GRACE DATA lt 4 DATA i es s Pes ae Prax oo fou e oa To oa 2s Tonk a3 7 OAc DATA ea Packet Nare TimeStamp ADDRESS virite SACK DATA PEMERN CATA DENE z bes wrae AACE Leck D ACE Packet Hane Laie mo ADDRESS Raad AACE DATA Dea UESLRIBE Packet Name Timestamp pine Read max DATA DER AA E TA RE et Pos warty inama so read rack zs pace a o r pwack oatanack DORESS write AJE IDATA DAE DATA DE DATA Oe o ATA EEN DATA DAR o Tam Pear oo fos Tou e Loa Toa eo osc oo Mere Timestamp cot T Ua Pres Fig4 71 Protocol Analyzer I2C Packet List Packett It is commonly normal data which includes 1 Address and 6 Data Packetz2 It is commonly normal data w
138. eroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 1 WIRE Free Analyzer Keep CAN 2 0B Free 7 SEGMEN Free T LED Operating Increasing Interface Chinese Si Chinese Tr English Language Time Base 5ps 10M Sizing Compression Max Max Max Max Max Max Max P 8Mbits 16Mbits 32Mbits 512Mbits 32Mbits 255Mbits 512Mbits Waveform Width Yes Display Trigger Page Pulse Width Trigger Double Mode Yes Latch Dala Option Free Option Free Contrast P p Multi stacked Bge No Yes Analyzer Settings Protocol Trigger 1 8192Page Free Software O Function Free Safety Certification FCC CE WEEE RoHS 14 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 1 4 System Requirements This section discusses basic operating system and hardware requirements for the Logic Analyzer Software and hardware capability may vary along with PC configuration This manual assumes that one of supported operating systems listed below is properly installed 1 4 1 Operating System Requirements Windows 2000 Windows NT 4 0 Workstation amp Server Professional Server Family Service Pack 6 Windows XP Windows Server 2003 Operating System Home Professional Editions 32 Bit version Name Windows VISTA 32 Bit and 64 Bit version Windows 7 32 Bit and 64 Bit version 1 4 2 Hardware System Requirements Hardware Name Lo
139. eroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 When the Logic Analyzer finishes uploading a Falling Edge signal is sent Table1 5 Definitions and Functions of Pins for Advanced Models 2 VDD Voltage Drain Provide 3 3 V for external modules by draining Semiconductor voltage from the Logic Analyzer Ext I O Module A wean signals between an external model or device and the Logic Analyzer Ext I O Module B Same as IOA Ext I O Module C Same as IOA GND Ground Ground external devices in sequence 11 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 1 3 Hardware Specifications Table 1 6A Hardware Specifications of LAP A Series LAP LAP LAP LAP LAP E 16032U 16064U 16128U 32128U A 321000U A LAP 322000U A USB 2 0 a System Windows 2000 Windows XP Windows Vista Windows 7 Power Supply USB 1 1 USB 2 0 Recommended a a E Internal Clock Rate 100Hz 100MHz 100Hz 200MHz asynchronous Sampling Max Rate mema Max 75MHz Max 100MHz Clock sz Bandwidth TM TM Memory 512K Bits 1M Bits 4M Bits 4M Bits 32M Bits Bits BAM Bits Bits Memory Memory 128K Depth Per 32K Bits 64K Bits Bits 128K Bits 1M Bits 2M Bits Channel Trigger 16 Channels 32 Channels Channel Trigger Pattern Edge Condition Trigger Pre Trigger Post aed Trigger Level Level a a Trigger Count 17659535 Threshold _ Wor
140. ers must decide the size of signal Packet segment from 4 to 8bits Parity This performs three types of parity checks odd parity even parity and none parity Stop This occurs when TXD is at high voltage This is adjustable this is commonly set to 1 or 2 Baud This is the data transmission speed according to the initial condition of START TXD This is the transmission direction It is MSB LSB by default 132 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 4 5 3 1 Software Basic Setup of Protocol Analyzer UART Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Tip The Setup of the Frequency should be higher but not too far away from the Baud Rate of the test board Step2 Set up Either Edge as the trigger condition on the signals which are connected to the Tx pin or the Rx pin of the tested UART board Step3 Set up the Protocol Analyzer UART dialog box The Protocol Analyzer UART dialog box is set as the steps of I2C PROTOCOL ANALTZER UART x Configuration Facket Data Format Register Pin Assignment Channel Protocol Analyzer Property Parity Check Mone Parity Data E Baud Rate 9600 C e Length Stop Bit fi Percentage ox Min 1 bps Max 10Mbps Sample Transmission LSB gt MSB Data Reverse Decoding Direction Protocol Analyzer Color Cancel Default Help
141. esponding waveform and packet as below image We ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoci n File Bus Signal Trigger Run Stop Data Tools Window Help l x fi o ola FF ER D gt DD oa ae Ae BY Je BB le 91 Scale 689 552KHz Display Pos 32 654543us A Pos 52 0884ms A T 19 198Hz 7 A B 166 667KHz 7 Total 79 6034ms Display Range 3 600865us B Pos 52 0824m 4 B T 19 2Hz M Compr Rate 191 903 20 15 10 5 0 5 1 i YV Busi I20 f osa mo og y gg NANANA 5DA Al oe L Fan g 43 P a4 ga 46 da g Bo ge g B2 C B3 P B4 55 g B6 it a Packet Name TimeStamp DDRESS Write 4 ACK DATA a DATA DRACK DATA DRACK DATA o DATA DSACK DATA DFACK Packet Name TimeStamp ADDRESS Write A ACK DATA DSACK DATA DEACK 50 Write A ACK oo D ACK 75 D ack Packet Name TimeStamp ADDRESS Read A ACK DATA D NACK DESCRIBE Fig 4 53 Waveform and Packet Synchronization Interface 121 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 Bus Analysis The setup is correlated to the Bus which needs to be made up for example Bus Protocol Analyzer Open the dialog box BUS I STEP 1 Click Tools on the Menu Bar and then select Bus Property or select to set up Bus Property Customize Color Setting SAEI Bus Property Refresh Protocol Gnalyv2er Analog waveform d Image Enco
142. ete understanding of the section Device Maintenance and Safety is a critical prerequisite of any further operation as presented in the User Manual 17 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 2 Installation 2 1 Software Installation 2 2 Hardware Installation 2 3 Tips and Advice 18 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer lt eroplus Technology Co Ltd Users Manual V3 12 Objective This chapter describes the installation of the Logic Analyzer hardware and software Software installation steps must be followed precisely to ensure successful installation 2 1 Software installation In this section users will learn how to install the software and drivers As with proper installation of many USB devices the Logic Analyzer application and driver software must be installed prior to the connection of the hardware The following steps illustrate an installation of a Zeroplus LAP C V3 11 Logic Analyzer The other twelve models mentioned in Chapter 1 would follow identical procedures Step 1 Insert the driver CD ROM in the PC CD drive Step 2 Execute the installation program Go to the START menu click START Run Browse in sequence select Setup exe file in the appropriate model folder and then click OK It is recommended that all other programs are closed while the installation proceeds Step 3 Choose the Application Setup Step 4 Click Next to proceed with the I
143. f 7PRERL SSA iS BPR al The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 High Quality Professional Instruments ZEROPLUS FM0714A 1 Phe AIR AR ARAE lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12 Features of Zeroplus LOGIC Analyzer c cccccccsescccceeeccceececcauscecseueeeceuueecseueeesseueeessasseeseueeessansueeessuseessaneeesas 5 1 1 Package 9 0 eee ene ee re a E a e a 6 1 2 HU NS UO cette E ote aaesieee ane seo aeeonestsecacsene beeranborteds 8 1 3 Hardware Specifications ea ctese gece tetenccess ieecctaceaateantececutacwenncieteacesiceeaceanbeeecessuescesitescasostecestandeeanncen ties 12 1 4 Systemi FROQUING MCI csirek e aiaia Eariri n EEDE iaa aeaii 15 1 4 1 Operating System Requirements cccccssccccceseecceeseecceuseeceuececsuececseueeecsueeesseeeessseeessueeessenseeeeeas 15 1 4 2 Hardware System Requirements cccccccccssecceceeeeeeeeeeeeeseeeeeeeeeeeeeeeeeeseeeeesseeeeesseeeeseeeeesseeeeesssaeees 15 1 5 Device Maintenance and Safety ccccccsccccssscecceseeecceneeeceeeeeecsececseeeessegeeessaseeeseueeesseueeessusseeessaaeees 16 PVE SE AUN E ia a EEE E E A E ene cies apt a ar E N E EE E E E EE EE E E EE ET 18 2 1 ONL US MENAN ees E ER 19 2 2 Hardware IS Ve ATION oeiee E E e E E E E E 21 Ao OS A E eee e A E E EE A EER 23 SG RS ACS itu dusarhomesineipnjeuassnariaaen sa guiasbaaiadpabinduenbsdastheden
144. f the Logic Analyzer l To the Previous Edge Fil To the Next Edge Fi a0 To b The Zeroplus Logic Analyzer User s Manual V3 12 the value of the Pulse Width between 1 and 65535 and find the Pulse Width in range Start At Select the Start point of Find The selectable items are all Bars the default is the Ds Bar End At Select the End point of Find The selectable items are all Bars the default is the Dp Bar When Found Select a Bar to mark the found Pulse Width The selectable items are all Bars the default is A Bar Statistics It can count the number of Pulse Width in the present range Next It can find the next Pulse Width Previous It can find the previous Pulse Width For example Find in the A1 channel the Pulse Width is equal to 20us take the A Bar as the mark See the below figure F area Like y par Pa Sees VE BT aia a S _ ail 8 ith amp A Fe lb mw s hhm l ee fm ee a ge cma fi E isane G Parr DES ELE Mis Ww be a ms Tappei Diny ka liT iha inih m i ofwp tries r Ts in a s ht DEDS Se en Wee aay fee Arama te Sse 1am P is a a a i r 7 m 7 a a i foo oa con Doc OC oon oe SSS SSS ee eee ee ee zi rn i et i Wnt ia j en te toe amp eee a eet a aaa a in EiT CET P aa ri LS ra T Bpa OOOO OoOO ex ne wa Pma ces E Pia m tamm Fn Ha ET Fi a Sie raid 5 Li un kite a Fh FE es eu wa a Pa Pa
145. file automatically in the Export Packet List dialog box is the same with that of the Export Waveform dialog box Export Format The Export Format is convenient for users to use the captured data in the following process There are two formats for selecting Report Form and Pure Data Form See the following picture mBus Output Parameter Data Format Export Format Yes C No Hexadecimal Zz Data Form Option Pure Data Form l Final Packet v r Output Range From First Packet x 1 To Fig 3 10 Export Format Pull down Menu In the part of the Export Format when the users select the Report Form the Option button can t be used when users select the Pure Data Form the Option button can be used The Option pops up the Option dialog box as follows where users can customize the export data items in the dialog box which are Packet Name TimeStamp Length and DESCRIBE tik Options IY Packet M Length IY Name M DESCRIBE wt Timestamp Cancel FM0714A 31 Phe AIR AR ARAE lt eroplus Technology Co Ltd D Fe Capture Window Chrl c The Zeroplus Logic Analyzer User s Manual V3 12 Fig 3 11 Option Dialog Box For instance all the export options are selected entirely See the below picture Sar lig mothe AH ji intemal sampling frequency POM Hz RAM sire ZKE j Triper Properties Trigger positip 52 08t4ms Trigger leel
146. ftware Setup of Noise Filter STEP1 Click Data on the Menu Bar then select Noise Filter to activate the noise filter function as the figure below Data Tools Window Help Select an Analytic Range k i Noise Filter xj Moise Filter Fee Bus Width Filter Moise Filter Data Contrast ees None P Find Data value Ctrl F FA Find Pulse Width Cancel Fig4 148 Noise Filter STEP 2 Transmit the tested signal to the Logic Analyzer as the figure below BusSignal Trigger Filter a0 40 Al l 42 42 as A3 Fig4 149 Tested Signal STEP 3 Filter waveforms that are not bigger than 5 clocks Noise Filter x Moise Filter Mone Noise Filter x Moise Filter cnal Fig4 150 The condition of Noise Filter is 5clock 176 FM0714A PRE AR hh ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 4 After filtering the waveforms that are not bigger than 5 clocks are deleted Bus Signal Trigger sa 4 10 z g 5 10 15 20 i i t i i i i i i I I 1 i i I i i i i i i I i i i i 1 I I I I Fig4 151 Waveforms after Filtering STEP 5 Reserve the original waveform open the Noise Filter window and then select None the waveform will be restored Noise Filter x Moise Filter None Fig4 152 Restore the Waveform 177 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology
147. g a l l l l l l l l l l l l l l l l l l l l l l l l l l Fig 3 144 Scales in Time Sampling Site Ruler Ruler Mode There are two styles of Ruler Regular Ruler Time Sampling Site Ruler Regular Ruler Presented in increments of 5 Time Sampling Site Ruler default Presented in increments of 25ns 86 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 4 3 Modify Waveform Height amp Correlated Setting 87 Waveform Height To modify Waveform Height click Tools gt Customize Set the height of waveform 18 100 in chosen items at toolbar that will show the amplitude of the waveform xl Common Setup Toolbars Shortcut Key Auto Save Waveform Display Mode C Sampling Site Display Frequency Display Time Display Ruler Mode Waveform Setting Regular Ruler Waveform Height 22 Time Sampling Site Ruler Font Size 12 Fig 3 145 Waveform Height Waveform Height 18 Waveform Height 40 Ruia La a m tee j Eca unfbignal Tie Fia F w o FA g ig wo Fig 3 146 1 Fig 3 146 2 Fig 3 146 Examples of Waveform Height FM0714A O SPREE HSA Aa PRA lt eroplus Technology Co Ltd Correlated Setting Select Auto Close in the following figure W Auto Close Show Gridline fi Show Tooltip iv When the roller ig moved toward back the Time Asis in the waveform area will move toward right
148. gger Property Az Az nee cel gge S Don t Care Wsy o1 gi g a A3 o 40 0 Left Click ee Ad Ad aye ff Rising Edge a2 AZ was A5 i Falling Edge Gf 03h Fa a i W Either Edge Color i es ar a7 Fig 4 22 Left Click on Trigger 108 Fig 4 23 Right Click on Trigger FM0714A Be t 42 A 13 BPR Bl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 SE Bus Trigger Setup Channel Trigger Setup Trigger Property os Don t Care High niu Low f Rising Edge Falling Edge WG Either Edge Color Fig 4 24 Trigger Menu Task 5 Run to Acquire Data 1 Single Run Click the Single Run icon from the Tool Bar or press START button on the top of the Logic Analyzer or press F5 then activate the signal from the DUT to the Logic Analyzer to acquire the data shown in the waveform display area 2 Repetitive Run Click the Repetitive Run icon from the Tool Bar then activate continuous signal to the Logic Analyzer to acquire the repetitive data and then click the Stop icon to end the repetitive run Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms Tip 109 Ts ZEROPLUS LAP COSI 28 Standard VERA O01 5 000 Laer 1 g Sy Ble baya Trigger Auniste ata Jock irde Hii 8 x Oe ee e fee ne pien nw om fsa 4b Page fi Coun fi BEES k Ri i IE U R r E Hoigh 76
149. gic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 4 2 Protocol Analyzer SPI Packet Analysis PROTOCOL ANALYZER SPI g xj Configuration Facket Data Format Register Cancel Default Help Fig4 86 Protocol Analyzer SPI Packet dialog box DATA List Data field captured by Bus in the packet display BUS Packet List BUS Packet List zi Setting Refresh Export Synch Parameter Packet Name TimeStamp Data Data Data Data Data Data Data Data Bus SPI Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Bus1 SPI i2 23 34 45 56 67 78 59 9 Packet Name TimeStamp Data Data Data Data Data Data Bus1 SPI E Fig4 87 Protocol Analyzer SPI Packet List Packet Length and Packet Idling Length 1 SS channel is activated SS Rising Edze iz the start of the packet Unknow End Falg SS Falling Edea is start of the packet Unknow Stat ray a SPI SCK oS DATA Packet Length Fig4 88 Packet Length Packet Length From Unknow_Start_Flag TimeStamp to Unknow_ End Flag TimeStamp Packet Idling Length From Unknow_End Flag TimeStamp to Unknow_ Start_Flag TimeStamp 2 SS channel is not activated 140 FM0714A PRE HRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Virtual SS is activated 1 Data needs 8 bit t
150. h E FEE EEE et Pants Me ee ee es Potopa os Pia i E Fote fe We ee oe is te E Fall Clear all OK Cancel Fig 3 133 Channel Selection Allow the choice of pins in which port will be included in the statistical analysis of a test run 81 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Column Selection Column Selection i x fw Full Period Jw Positive Period Jw Negative Period J Conditional Full Period MW Conditional Positive Period W Conditional Negative Period Jw Start Pos Jw End Fos J Selected Data cancel Fig 3 134 Column Selection Allow the choice of items which will be considered in the statistical results Condition Parameter Condition Parameter xX Conditional Full Period 400ns Jime Conditional Positive Period g ns lt Jime lt Conditional Negative Period 700ns l E Fig 3 135 Condition Parameter Allow the setting of time intervals for Conditional Full Period Conditional Positive Period and Conditional Negative Period Channel Selection Column Selection Condition Parameter Warning Parameter Refresh J Statistics Filter CHANNEL Full Period Positive Per Negative P Conditional Conditional Conditional StartPos EndPos SelectedData al Ad 211 212 211 0 0 0 Ds Dp Al 52 53 52 0 0 0 Ds Dp A2 0 0 1 0 0 0 Ds Dp A3 0 0 1 0 0 0 D
151. he Idling Time is set as 3us f 2 355us is less than Unknow registers h gt s nl Es an tan packet idling time so the Unknow _ End Flag i information after 2 355us isn t data SPI SCK JN DATA N m y aia Lus 3 05u sts V Packet T ensth If the time length of SCK low Level is bigger than idling time it is the timestamp of data and the timestamp of next data Idling Time so it is data s timestamp 3 S7Sus is bigger than Fig4 89 Packet Length Packet Length From Unknow_Start_Flag TimeStamp to Unknow_ End Flag TimeStamp Packet Idling Length From Unknow_End Flag TimeStamp to Unknow_ Start_Flag TimeStamp Virtual SS is activated 2 Data needs 8 bit the Idling Time is set as 3us Don t care data bit is not activated Although 3 155us is bigger The Unknow than Idling time data s g DATA OX56 M U see Packet Length r 3 155wus L j noe y T A t ju L A N 1 60 L THIN Because the low level f only has 196ns less ttt ates ias x than Idling time _ er E packet ends when the Low level ends 35w Bias saps Fig4 90 Packet Length Packet Length From Unknow_ Start_Flag TimeStamp to Unknow _End Flag TimeStamp Packet Idling Length From Unknow_End Flag TimeStamp to Unknow_ Start_Flag TimeStamp Virtual SS is activated 3 Data needs 8 bit the Idling Time
152. he Logic Analyzer and finalize the installation for hardware connection For further information refer to the Troubleshooting and Frequently Asked Questions FAQ chapters in the User Manual i ZEROPLUS Loge baki Fig 2 7 An Assembly of Laptop Logic Analyzer and Testing Board of LAP A Series 22 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 2 3 Tips and Advice 1 When testing a circuit board make sure that the internal sampling frequency within the Logic Analyzer is at least four times higher than the external board frequency 2 Ifthe signal connector does not work well with the pins on the test board try to use the supplied probes ZEROPLUS o 3 Usages of probes _ 3 1 Take the loose end of the cable and rae insert it into the clip Fig 2 9 Ee N i u I co Se O E Fig 2 9 af n cy 7 AAT wi J 3 2 Compress the probe as shown to A aa ea reveal two metal prongs Fig 2 9 A ye 3 3 Place the metal prongs on a metal E F connector on the testing board and me e release the fingers so that the prongs Eile can grip the metal connector Fig y EN ara 2 10 PN E Fig 2 10 4 The Logic Analyzer will connect to the Zeroplus server for software updating automatically if internet is available 5 Unwanted signals can be filtered out by using the Signal Filter or Filter Delay function During long time measuring Comp
153. he Trigger Count xl Trigger Content Trigger Delay Trigger Range C Delay Time and Clock m Trigger Delay Time m Trigger Page 10us M inc Max 81 92 Min 1 Dus Max 167 76191 s Trigger Position Trigger Delay Clock fi 50 ee Min 1 Max 16776191 T Pos Ons Start Pos 10 23ms End Pos 10 25ms Note When more than one trigger pages are selected the trigger bar disappears from the view Cancel Default Help Fig 3 35 Set Trigger Delay See Section 4 1 for detailed instructions FM0714A PRE AR DARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Trigger Delay Fig 3 36 Set up Trigger Delay clock under time display Trigger Delay Fig 3 37 Set up Trigger Delay clock under sampling site display The Trigger Delay setting in Tool Box equals to that in the above dialog box Tip xi Trigger Content Trigger Delay Trigger Range Trigger Range prreeeesesesessessesseseeseesessessessessessessesesseesy Icon Description EN N A Trigger Range Time Sample fi minute Cancel Default Help Fig 3 38 Set Trigger Range 4 Run Stop gt Single Run F5 Pp Repetitive Run Fe Stop F7 Fig 3 39 Run Stop Menu b DD Fig 3 40 Run Stop Tool Box Menu Bar Run Stop Menu Item Detail Menu amp Dialog Box I Click to run once phere a See Section 4 1 for detai
154. he Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Protocol Analyzer 1 WIRE Format Description Two speed types of 1 WIRE Standard 1MHz 1us High 5MHz 0 2us Four types of 1 WIRE Signals 1 Reset Every communications period starts with Reset signal Master will send a Reset Pulse so that all the Slave devices on the 1 WIRE Protocol Analyzer enter into recognition status When one or many Slaves receive Reset Pulse a Presence Pulse signal will be sent back from Slave indicating receipt of the signal 2 Write 0 Send a 0 bit to Slave Write 1 time slot Write 1 Send a 1 bit to Slave Write 1 time slot 4 Read Data Read data sequences resembles Write time slot However when Master releases BUS and reads data from Slave devices Master creates samples from BUS status In this way Master can read any 0 or 1 bit from Slave devices oa Four signal types are described respectively in the following 1 Reset 1 When Master starts communicating with Slave Master first sends a low count Reset Pulse TX t of STL Standard speed 480us High Speed 48us for a period of time MASTER TX RESET PULSE MASTER RX PRESENCE PULSE i b V PULLUP Vu LLUF MIN Vin MIN V L MAX OV eee RESISTOR ame VAS TER DS2432 Fig4 94 Master TX Reset Pulse and Master RX Presence Pulse 2 Then Master releases Protocol Analyzer and enters the RX mode Through high pull
155. hich includes 1 Address and 6 Data Packets It is commonly normal data which includes 1 Address and 14 Data Packet4 It is commonly normal data which includes 1 Address and 6 Data Packet Length When judging the start of I2C it is the Packet TimeStamp This Data Start is regarded aS Packet Timestamp This Unknow register is Unknow_End Flag 12C a oe UU A SCL Packet Length Fig4 72 Packet Length Packet Length From START Start s TimeStamp to STOP Unknow_End Flag TimeStamp 130 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Packet Idling Length From Unknow_End Flag TimeStamp to Starts TimeStamp This Unknow register is Unknow _End Flag 4 5 2 4 Protocol Analyzer I2C Data Format Analysis xl Configuration Timing Facket Data Format Register M Activate Data Binary Decimal Hexadecimal ASCII slave Addr Binary Decimal Hexadecimal ASCII Reg Addr Binay Decimal Hexadecimal ASCII Cancel Default Help Fig4 73 Protocol Analyzer 12C Data Format dialog box Users can set the Data Format of the Data Slave Addr and Reg Addr as their requirements When selecting the option Activate the data formats are decided by the settings in the Protocol Analyzer when not selecting the option Activate the data formats are decided by the settings in the main program 131
156. i BPR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 6 2 Protocol Analyzer HDQ Packet Analysis PROTOCOL ANALYZER HDQ Fig4 119 Protocol Analyzer HDQ Packet dialog box Item Select the content which needs to display in the Packet List which includes Break Recovery Address Data Read Write and Describe Color Set color for items which needs to display in the packet list 158 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 4 5 7 CAN 2 0B Analysis Preface Add Protocol Analyzer function to analyze CAN 2 0B transport protocols data CAN 2 0B serial transmission there are two signal channels CANH and CANL which match with baud ratio judge serial data If you want to change serial data into Bus format you need to analyze this function with LA a dialog box needs to be added you should set up a Protocol Analyzer CAN 2 0B dialog box CAN 2 0B Introduction 1 Brief Introduction Features CAN 2 0B Controller Area Network is an Asynchronous Transmission Protocol It costs low sky high use rate far data transmission distance 10KM very high data transmission bit 1M bit s sending information without appointed devices according to message frame dependable error disposal and detection error rule message automatism renewal after damage and node can exit Bus function on the serious error Applications CAN 2 0B is used for
157. ield Wizard Ready to Install the Program The wizard is ready to begin installation Installshield 2 2 Installshield 20 L amp P C_Standard InstallShield Wizard Customer Information Please enter your information Installshield LAP C_Standard InstallShield Wizard Setup Type Select the setup type to install installshield FM0714A 7P RE TFS AR 1 BBR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 2 2 Hardware Installation Hardware installation simply involves in connecting the Logic Analyzer to your computer with the included USB Cable as shown in Figures 2 4 and 2 5 1 Plug the fixed end of the cables into the LA Fig 2 1 2 Plug the loose ends into the connectors on the circuit board to be analyzed Fig 2 2 Note The following sequence must be observed when connecting the connectors into the circuit board AO 4 Brown A1 Red A2 Orange A3 Yellow A4 Green A5 Blue A6 Purple and A7 Gray Fig 2 2 3 The circuit board must be grounded to the Logic Analyzer with the black Ground Cable Fig 2 3 4 Plug the square end of the USB cable into the Logic Analyzer Fig 2 4 5 Plug the thin end into the computer Fig 2 5 Fig 2 5 21 FM0714A PRE t F221 PR SI The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 At this point the computer should be able to detect t
158. ig4 96 Write zero Time Slot B Write 1 If the sampling is high 1 is generated Note Read 1 is of a similar waveform pattern as in Fig4 99 Write one Time Slot Vuur V PULLUP MIN Vig MIN Vie MAX 0V meee RESISTOR mmm ASTER Fig4 97 Wrote one Time Slot 144 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 Read Data 1 When Slave reads data Master will generate a Read time slot 2 To initialize Read Data Master has to convert Data line from the high logic to the low 3 Data line must be kept as low as us 4 The Output Data of Slave must be 14us at most 5 To read from 15us where Read slot starts Master must stop driving I O Read data Time Slot V PULLUP PULLUP MIN V IH MIN MASTER lt 4 SAMPLING WINDOW a RDV gt RESISTOR ASTER DS2432 VIL MAX OV Fig4 98 Read data Time Slot 6 When Read Time Slot ends I O Pin will be pulled back to the high count through the external resistor 7 During a write cycle all Write time slots must have duration of at least 6Ous and a recovery period of 1us 4 Typical 1 WIRE Conversation model can be summarized as below A typical 1 Wire conversation Ritel PN Presence Puks Moat Meit Piki N READ OF WRITE DATA 2 Paat Sequence LET ROS PUR VOR Ais o MEMORY Command Code Unique FUNCTION Gevice E selecied Command Code Di
159. ing signals and puts them into the internal memory The software of the Logic Analyzer will read out the value from the memory and switch it to the waveform or status shown for users analysis What is the asynchronous Timing Mode Since the sampling clock and tested objects are not directly related to each other and the former won t be controlled by the latter the sampling clock and the tested signals will not be done at the same time We call this Timing Mode which means that in the same time interval you can get sampling data from the test equipment at one time such as every 10 seconds The internal clock the Logic Analyzer s inner confirmed one is often for sampling in Timing Mode as is the logic waveform What is the synchronous State Mode Because the sampling clock and measured object can be directly related and are controlled by the latter signals of the former and the latter can proceed simultaneously We call this State Mode In this mode the measured object provides the sampling clock State Mode is when the Logic Analyzer can obtain sampling data from the test equipment synchronously In other words when the test equipment has a signal or signal group this is the time to get the signal For example while the test equipment is sending out one rising edge the Logic Analyzer can start to obtain one signal What are A bar B bar and T bar The T bar A bar and B bar are labels T is the trigger label which can
160. ions are only used after the Ds and Dp bars are activated otherwise they will be disable These functions are the same as that of A Bar When the mouse is stopped at a special position click the right key on the mouse select the Place Ds or Place Dp the Ds or Dp bar will move to the special position For example Open Select an Analytic Range select the special position is 10 and then select Place Ds See the figure in the right column i Add Bar Tip When the mouse is located at a special position on the waveform area click the right key to select the Add Bar function a bar will be added automatically in the special position according to the sequence of the word and color See the C Bar in the position 5 in the right column 76 The Zeroplus Logic Analyzer User s Manual V3 12 AB ii Hjt 2 LHC BEL LEIT d a Ds oe a oe olf Du aga FAB bo lax Pn Le oe ee ia e Cound fr sll lems sic E pamedal RE LE Mae o here Fes a tenger ow ima ea ok Diy Pee 281 biaia he bYi Pate A De tTa abimi Tiat JO airi i Duper Pangea N Peu tite OTs ite Carre F ae Fags S oa onu s ko a e Pei oar E EN Cr IU AE a a ZEEE Akajo ee repe aiey eo fire Pe A Paes a a z Tena aira 1i tapi Hage hime lt Mpya BiTTa lige F Coma Same has eera ie ea S ce dmo a Fa aw a a F i Fi Jwa F iF i Fi it H Fmi i rE mm 3 8 so enh OE E rE wiin J em f P E EREL noS
161. is set as 3us Don t care data bit is activated 3 155us is bigger than Idling That is the tine however the data s end of the inforaation only capture to the sisth bit so the data is not packet accord with the virtual condition ofSPI ss the packet 3 6 75us is bigger than idling tine so the nest rising edge is the tinestaap of data Data s Timestamp is packet s Tiaest aap ep oo O OoOO O AOOO O O O O C UO T m UASS a OATA O16 f mm mmm m p Packet Length Fig4 91 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is O The End dot is Unknown Unknow is registered Data s Timestamp Unknow_End_Flag is Packet s Timestamp DATA 0X56 Packet Length i Fig4 92 Packet Length Packet Length From Packet s TimeStamp Data to next Packet s TimeStamp Data Packet Idling Length It is 0 141 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 5 1 WIRE Analysis Preface To increase the Protocol Analyzer feature in order to analyze the Protocol Analyzer 1 WIRE transmission protocol data Using LA analysis function the required serial data can be converted and presented in the form of Bus Therefore the software needs to add a dialog box so as to set up a Protocol Analyzer 1 WIRE dialog box 1 WIRE Int
162. istration form Call us and mail both picture and registration to us A customer representative will be happy to assist you How do register the protocol analyzer and buy protocols Every product is assigned and engraved with a unique serial number please print your S N number window as an example attachment and send it to our distributor or ZEROPLUS head office According to your S N we will provide passwords for your protocol registration FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 6 4 Technical Information T101 A T102 TI03 T104 TI05 TI06 TI07 T108 TIO9 7110 TI11 210 What is the Logic Analyzer The Logic Analyzer is a tool that sieves out and shows the digital signal from test equipment by using a clock pulse The Logic Analyzer is like a digital oscilloscope However it only shows two voltage states the logic status 1 and 0 differing from many voltage levels of an oscilloscope The Analyzer has more channels than an oscilloscope to analyze the waveform Since the Logic Analyzers obtains only signals 1 and 0 its sampling frequency is slower than an oscilloscope which needs many voltage ranks Moreover the Logic Analyzer can receive many signals during a test How does the Logic Analyzer operate The Logic Analyzer reserves trigger requirement setting for users and uses them on the test equipment for the value of the sampl
163. iter Setup hanee rugir vell be lmited to 3 orr OO o O o estore touts o Fig 4 1 Clock Source Step 2 Clock Source Frequency Setup Internal Clock Asynchronous Clock Click on Internal Clock and then select the Frequency from the pull down menu to set up the frequency of the device under test DUT The frequency of the Internal Clock must be at least four times higher than the frequency of the Oscillator on the DUT Or select the frequency z00mHz zj from the pull down menu on Tool Bar as Fig 4 2 shows Tip Connect the output pin of the oscillator from the tested board to the signal connector of the Logic Analyzer to measure it by using the internal clock of the Logic Analyzer 98 FM0714A Be 32S BPR Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 oo POI o 2 B Te J100Hz a m Clock Source 105 7505 A 7T 173 933h Asynchronous Clock Internal Clock 205 75ns B T 13 333h Frequency lllilars Me 25M 500H m Synchronous Cloc Ke 25KH2 Rising E sake ncy 100KHz Min 0 001Hz Max 100MHz evel is the same as the port 4 trigger level ession Mode Signal Filter a Compression Signal Filter Setup Sampling RAM Size RAM Size gt ee Channel number 150MHz limited to 32 Fig 4 2 Clock Source Pull down Menu External Clock Synchronous Clock
164. ive bits and allows Bus node to restart Bus transmission after Error happens Fig4 125 Error Frame Overload Frame There are two kinds of Overload conditions which both lead to the transmission of an Overload Flag The internal conditions of a node which require a delay of the next Data Frame start during the first bit of Intermission Overload Flag can send six 0 which may damage Intermission format so that it makes the other nodes know node sending Overload Flag at this time When Overload Flag is sent out Overload Delimiter can send eight 1 others send seven 1 after finishing either Fig4 126 Overload Frame Interframe Space Interframe Space is divided into Intermission and Bus Idle Intermission is three 1 It is impossible to send any message during this time except Overload Frame The Bus is recognized to be free the period of BUS IDLE may be of arbitrary length And any station having something to transmit can access the Bus When a node is at the state of error passive the node will send eight O after INTERMISSION and other node have the chance to retransmit themselves information 162 FM0714A 4 5 7 1 PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Software Basic Setup of Protocol Analyzer CAN 2 0B xi Configuration Facket Data Format Register Pin Assignment Start Packet Format Protocol Analyzer Name Bu
165. ization Error Tolerance I Display files the contrast differences None Apply lt lt Hide Result Pin Assignment Perform Contrast Next Close Contrast Statistics Contrast Result Error Stat Ds Dp hg Contrast Beginning Point m Contrast End Point w Data Contrast Fig3 46 Data Contrast Data Contrast It is used to contrast the difference for the two files of the same style One is the Basic File and the other is the Contrast File The contrast can display the difference between the Basic File and the Contrast File x ae Find Data value Ctrl F Activate the Function of Chain Data Find Bus Signal Name TN e reviews close Bus Item Find Min Value Max Value Skart ka oF 0 F Stark At End t when Found Statistics Ds Dp a Statistics Fig 3 47 Waveform Find Dialog Box without Activate the Function of Chain Data Find Use the pull down menu to select the Bus Signal Tip Name Remember the final conditions The list of Find depends on whether it is a Bus or When the find function is used the Signal that is being searched in function of displaying the final Bus Choose among In Range and Not In FM0714A 7P RE PR AR i BPR Zeroplus Technology Co Ltd conditions is added When you have closed the Waveform Find dialog box and you want to find the set conditions you can open
166. k Run and then activate the signal from the tested circuit to acquire the result on the waveform display area Fig 4 138 shows the result before and after compression has been applied We ZEROPLVS LAP C 321000 Standard 3 12 2901 S H 000000 0000 LaDoci 0 x o File Bus Signal Trigger fs Data Tools Window Help x i emsa i HW ELD gt p 2K z o i fooMmHz am m 50 ie s Page m Count p SV an fions Ray Oe BY De le or Height zer Dela Display Pos Ons A Pos 150ns Y A T 150ns v Display Range 250ns 2T0ns B Pos 150ns B T 150ns v S No Bus Signal Trigger Filter aeons p loo a LJ eed aaa 100ns M 200s mms gaoa E O nom n cs ce a aad aN g A3 A3 i nknown re O w wie E A A7 DENOWTI PERT o w B 57 RENOWN tna ga ic alts dan ala KNOWN Fa End Connected 169 FM0714A Phe AIR AR 1 BPR lt eroplus Technology Co Ltd The Zeroplus Logic Analyzer User s Manual V3 12 W ZEROPLUS LAP C 321000 Standard 3 12 CH01 S 000000 0000 LaDoci ae siof o Eile Bus Signal Trigger Run Stop D ta Tool Window Help 18 x Dema Bo ifjak z i froomMtz an mw 509 vie s Pase fi Count fi EL ei 8 ow BIL R Be BY le ee Mile oi Height 30 T
167. king 6V 6V Ee Voltage Accuracy ee ADA ee ADA a Keep Free Increasing e Ooo o oe T LED Operating Interface Chinese Si Chinese Tr English Language Time Base 5ps 10M Software Sizing Function kea ce one ine a MAR S KAND 12 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Waveform Width Yes Display Trigger Page 1 8192Page Pulse Width Trigger Double Mode Yes Free Trigger Mark Option Free Latch l Data l Multi stacked Logic Analyzer Settings Protocol Analyzer Trigger Safety Certification FCC CE WEEE RoHS Table 1 6B Hardware Specifications of LAP C Series mnao LAP C LAP C LAP C LAP C LAP C LAP C LAP C yP 16032 16064 16128 162000 32128 321000 322000 Operating System Windows 2000 Windows XP Windows Vista Windows 7 Power Supply USB 1 1 USB 2 0 Recommended Internal Clock Rate 100Hz 100MHz 100Hz 200MHz asynchronous Sampling Max Rate ema Max 75MHz Max 100MHz Clock synchronous Bandwidth 75MHz Memory 512K Bits 1M Bits 4M Bits 64M Bits 4M Bits 32M Bits 64M Bits Memory Memory Depth Per 32K Bits 64K Bits 128K Bits 2M Bits 128K Bits 1M Bits 2M Bits Channel Arigger 16 Channels 32 Channels Channel ngger Pattern Edge Condition Trigger Pre Trigger Ves Post Trigger Trigger Count 1 65535 Threshold Working _6V 6V Voltage 13 FM0714A PRE RRD ARAS The Z
168. l R 2 Fannnnrnnna Iv NACK W Describe Cancel Default Help Fig4 135 Protocol Analyzer CAN 2 0B Packet dialog box Packet color can be varied by users The Packet displays with the waveform as below E ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 CAN2 0B i Ioj x o File Bus Signal Trigger Run Stop Data Tools Window Help 8 x Denai a se Elp p rzek z ie e f200MHz zje 10 vie 4 Page fi Count fi Sill fl Gl R Ri C 9 736541u R oe Ax Be IA ps as Height v Trigger Delay Scale 9 736541us Display Pos Ons A Pos 87 851299us Y A T 87 951299us 7 A B 16 182424us v Total 167 69579ms Display Range 243 413617us B Pos 104 033724us B T 104 033724us Compr Rate 255 883 us Signal 194 73081 4us 146 04811us 97 365407us 48 682703us 48 682703us 97 365407us 146 04811us 194 73081 4us 243 41351 fus B 75 l Trigger ee i i 1 i i i i i i i 1 i i i i 1 i i i i E i i i i i i asor i i i i i ri i i i i i A V Busi CAN T E ao A0 Li 16 775ms 40 075up 015u6 40 016 up 40 O005us 40 Otus 40 015up 40 0 40 0 a6 Ab 167 690ms 695ms P A A7 E 695ms B0 B0 _ 77oms 40 01us 40 015u6 40 025u8 40 015up 40 O1ug 4 Bi Bi 167 695ms TE e es er 9510s 4 4 k rii Ti Setting a Export Synch Parameter af SI EX RE OV PR p lt
169. l consisting of your product registration information A password may be required for further customer services and other inquiries What should I do if online registration fails Do a screen grab of the window including the error message and email our customer service dept A customer service representative will be glad to assist you as soon as possible once the email is correctly received How may register if the purchasing date was more than one month ago In this case fill in the registration card and send it via post fax or email to our customer service dept and a representative will process the registration for you What is the warranty length for my product A two year FACTORY WARRANTY is offered in which you will have to send the defective product to the closest branch an authorized service site or our headquarters The in store warranty may vary and many require extra charges for various extended warranty policies The company is not being responsible for an in store warranty that exceeds our factory warranty Why should I register this product If you do not register this product the warranty will be counted from the manufacturing date indicated by the serial number of your product Thus we strongly recommend registering your product for your own benefit What should I do if the hardware serial number is previously registered In this case take a picture of the decal on the rear side of the product and fill in the reg
170. lapse Format R Bj Ri Pa ba bha ba bp fa d Ead Eg ha BABE M M Fig 4 27 Channels Setup Rename the Bus and set up the channels of the Bus as shown in Fig 4 28 A A DDE A Fig 4 28 Rename Bus 1 Click the column then type the given name of the Bus and then press Enter to confirm it 2 Go to the relative channels as shown in the example and go to numbers O 1 2 3 which are located on column A and row Bus1 Click them to become purple then set these segments of channels 3 Click OK to get the result as shown in area 1 110 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Channels Setup Fig 4 29 Channels Setup Window Tip Channels Setup In the dialog box of Channels Setup there isn t only Add Bus Signal but also Delete Bus Signal Delete All Restore Defaults provided 1 Delete Bus Signal Firstly highlight the Bus or channels on area 6 of Fig 4 29 then click Delete Bus Signal to delete them 2 Delete All Click Delete All to delete all Bus signals on area 6 of Fig 4 29 3 Restore Defaults Click Restore Defaults to restore the dialog box of Channels Setup as shown in Fig 4 27 Step3 Trigger Condition Setup 1 Highlight the Bus which will be triggered then click icon or select Bus Trigger Setup from the Trigger of the Menu Bar the dialog box as shown in Fig 4 30 will appear Bus Trigger x Bus Trigger Protocol Analyzer Trigger
171. led instructions Click to run continuously until the Stop button is Pf Repetitive Run F clicked See Section 4 1 for detailed instructions Click to stop the repetitive run SE Fe a Stop See Section 4 1 for detailed instructions 42 FM0714A 5 Data 43 r fi i Phe AR AR ih ARAS lt eroplus Technology Co Ltd id Select an 4nalytic Range nati Moise Filter Sez Bus Width Filter Data Contrast P Find Data Value Ctrl F The Zeroplus Logic Analyzer User s Manual V3 12 Aw Go To 4 Bar fay Bs Go To B Bar E Bar 50 To More Binary Decimal Decimal Signed Hexadecimal ASCII Fo Find Pulse Width l Tio the Previous Edge Fil j othe Wext Edge Fiz Te GoTo Tbe 1 Add Bar A A Delete Bar Alk B be Zoom E amp Hand H R Normal ESCAPE nE Zoom In Fo a Zorn Gut Fe aa Showy all Data Fid ey Previous soom Cobre Data Format Waverorm Mode Gray Code Complement Square Waveform Sawtooth Waveform All Data Sampling Changed DotiCompression Data Changed Doti Compression Fig 3 41 Data Menu a 100 mU m Ae Be Te Bat Bar Bart Bart Bar Ba le l Fig 3 42 Data Tool Box FM0714A Phe AIR AR i BPR lt eroplus Technology Co Ltd Menu Bar Data Menu Item Select an Analytic Range aii Noise Filter pas Bus Width Filter 44 The Zeroplus Logic Analyzer User s Manual V3 12 Detail Menu amp
172. logy Co Ltd User s Manual V3 12 Language g Print Ctrl F Tip This function has been enhanced now users can select the pages which they want to print or only the Current Page Print Freien Recent File Exit 32 Cancel Click Cancel to end the capture Chineset Si Chinese Tr i English Fig 3 14 Choose among Chinese Simplified Si Chinese Traditional Tr and English EROPLUS Logic Analyzer The program needs to restart Do vou want bo save the current document Fig 3 15 When changing languages the above screen will be displayed and the program will need to be restarted Status Type hp LaserJet 1000 Where USBOO1 Comment All Number of copies fi a C Pages from fi to 272 F Collate C Current Page bl el ls di mes Fig 3 16 Click to enter the Print dialog box pi EF Ees Fig 3 17 Click to show a Preview of the Print Show the recently opened file Exit the program FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 2 Bus Signal OS Eee My Sampling Setup ff Signal Filter Setup opens ak onous Clock 7 ir m i CR oo ingroup From Bus chin Frequency 200KHe Expand Collapse aeons S Clock e SS _ _______ e 2 Buto Size Fig 3 19 Trigger Tool Box 33 FM0714A Phe AIR AR ARAE lt eroplus Technology Co Ltd Menu Bar
173. logy Co Ltd User s Manual V3 12 data packet to add the export function See the following figure Data Format Binary Decimal ASCII Gray Code C Complement Bus Packet Length Min 10ms Louris Max 20 485 Packet Item W Packet MW Name Timestamp Length Data Text i 2 Text Color Auto Cancel Default Help Fig4 40 Packet List Setting Packet Name TimeStamp jatz jats jatz jatz jatz jatz jatz jata jatz Jata eS Packet Name TimeStamp Packet Name TimeStamp Bus1 Bus 10 03s Packet Name TimeStamp Bus1 Bus Packet Name TimeStamp jats jats jatz jatz jatz jatz jatz jata jatz jatz Fig4 41 Bus Packet List 1 View Specifications Packet Name and TimeStamp can be selected to display from the Packet List Setting dialog box Packet List the order of Packet Name Display the name of Packet or the Filter Display Bar TimeStamp It is the starting point of the Packet Tip The rest name and content are supplied by Plug 116 FM0714A 7P RE t F221 PR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Setting aa Export Synch Parameter gl acke acket Name TimeStamp ADDRESS Write 4 ACK DATA PDRACK DATA DRACK DATA DRACK DATA o DATA y Be 50 Write aack oo D ack 75 D AcK or D ACK 23 DACK 45 D ACK DATA D amp ACK Packet Name TimeStamp Packet Name TimeStamp Packet Name Times
174. lt gt the range is 33ns 10s C Video Users can select Line All Lines Odd Field Even Field and All Field Connect Click the Connect to link with the oscilloscope and the Online button will change into Disconnect button Users can set the oscilloscope by selecting the options and inputting values then pressing OK Note the Stacking Delay is set into the main program If no oscilloscope is connected or the oscilloscope disconnects the whole options under the Stack Parameters are unable For the above details please refer to the 4 13 FM0714A Zeroplus Technology Co Ltd User s Manual V3 12 O PRE RRD ARAS The Zeroplus Logic Analyzer 7 Window waveform Display Listing Display Hot Wews Window d Real time Monitoring Navigator we Memory Analyzer OF Bus Packet List Statistics Window Cascade Horizontal Vertical Screen Display w 1 LaDoch Fig 3 84 Window Menu E Fig 3 85 Window Tool Box Menu Bar Windows Menu Item Detail Menu amp Dialog Box a File Bus Signal Trigger Run Stop Data Tools Window Help O Ma 3 ia ey My S Frim ge Jl Waveform Display 14i 200k ERIS 5ns Bil Ustna Display Te te 8 Scale 200MHz Display Pos Hot News Window gt b75ns Total 10 24us Display Ran _ Real time Monitoring Preng es Navigator Bus Signal s Memory Analyzer 5Ons r 1 i Li I waveform Displa
175. lt eroplus Technology Co Ltd iy Channels Setup Tip ity Channels Setup Tip Add Bus Signal Delete Bus Signal Delete All Restore Defaults Group into Bus Ctrl 6 Reserve waveform data and show them Ungroup From Bus Ctrl U Expand 37 The Zeroplus Logic Analyzer User s Manual V3 12 Filter Condition delay time EF end edge J a Filter Condition end edge delay time Fig 3 24 High and Low Levels Signal Filter Delay Setup Filter Delay According to the filter condition Start Edge Show the waveform from the start edge to the delay time interval See details in Section 4 1 nor monn on j Be kj bb Bi ba ECCE EE PAPA PAPA E 4 cs T OER COE b 4 Ee Ph B ag A ho Bal d J CEET E0 EE E p mn o n de al ECEE ew Ee ee we CCEA wh al wa SPSS se i aie Sao co aa o o ma a oe ma ee dL dd ee Ms es n nn m n a ICIC o CET Balbo _ au ae I SGS aca ija eke weenie lata ia does rrn ar a Fig 3 25 Channels Setup See details in Section 4 2 Click the Add Bus Signal button to add a channel This will appear as New0 Click the Bus or channel you want to delete and press the Delete Bus Signal button Press the Delete All button to delete all the Buses and channels Press Restore Defaults to return all channels and Buses to the system defaults Select this function when
176. lt is not activated after activating it keeps working and users also can choose Cancel to close it Activate The default is not activated after activating it keeps active and users also can choose Cancel to close it File Name Before users name the file the file name is defaulted as LA In fact the saved file name can add a serial number for the file automatically Save Path Name Users can enter the path directly or choose the path from the selected path button ii Time Interval When the auto save function is activated the time interval from one finished sampling to the next activated sampling can be set according to users requirements the default is 1s and the unit can be selected from s second m minute and hr hour Every Renewal When the repetitive run is activated the waveform image or the state image will renew again and again Open the first file after stopping the Run When the repetitive run function is activated the waveform only displays the first file and it isn t renewed when the repetitive run is stopped the waveform still displays the first file CO 12 x W b we Poia Ta tt tt u Owm Sten Jes s x 1 aiiai janes Ser z Fig3 152 Auto Save 90 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 3 6 Color Setting To modify Color click Tools gt Color Setting x Workaround Waveform Relating aveform Background List Backgrou
177. m Go to previous page of the data or the waveform Go to the beginning of the data or the waveform Go to the end of the data or the waveform Move the cursor up a grid Move the cursor down a grid Move the selected Bar or display left to prior the waveform or data Move the selected Bar or display right to posterior the waveform or data Release all selected bars and change Mouse mode to Normal Change trigger conditions FM0714A 215 Phe TR AR ARAE lt eroplus Technology Co Ltd Hot Key F1 F2 F3 F5 F6 F7 F8 F9 F11 F12 The Zeroplus Logic Analyzer User s Manual V3 12 Table 7 4 Hot Keys 4 Equivalent Orders Help gt Logic Analyzer Help Decrease the sampling rate Increase the sampling rate Run Stop gt Single Run Run Stop gt Repetitive Run Run Stop gt Stop Data gt Zoom Out Data gt Zoom In Data gt To the Previous Edge Data gt To the Next Edge Statement Logic Analyzer Help Decrease the sampling rate Increase sampling rate Execute the acquirement once Execute the acquirement continuously Stop acquiring data Zoom out the waveform Zoom in the waveform Move forward to the prior variation waveform and center that location Move forward to the next variation waveform and center that location FM0714A PRET AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 7 2 Contact Us Table 7 5 Contact Us
178. meters Contig Tm ZEROPLUS LA 1 WIRE MODULE 1 10 000CN01 Tm ZEROPLUS L 3 WIRE MODULE 1 04 000CN01 Analog Waveform Image Encode Reverse i ZEROPLUS L ACS MODULE 1 02 000CN01 Saree Ae i ZEROPLUS LA ARITHMETICAL LOGIC MODULE 1 51 00 CNO01 ES ae ae 7 ZEROPLUS LA BUS MODULE 1 00 00 CNO1 Ungroup From Bus Ctrl U ZEROPLUS L CAN 2 06 MODULE 1 32 00fCNOL i ZEROPLUS L CCIR656 MODULE 1 31 00 CNO1 Add Channel i ZEROPLUS L Compact Flash 4 1 MODULE 1 01 00 CNO1 Copy Channel C ZEROPLUS LA CMOS IMAGE MODULE 1 00 000CNO1 SSC be eT Tbe BAA md Aa AORA Find Cancel Help Delete hannel Delete All Channels Restore Default Channels M Use the Dsop More Protocol 4nalyzer Format Row d Rename Fig4 66 Bus Property Step5 For Protocol Analyzer Setting select Protocol Analyzer Then choose ZEROPLUS LA I2C MODULE V2 02 00 CNO1 Next click Parameters Configuration The following image will appear 127 FM0714A O PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 x Configuration Timing Packet Data Format Register m Pin Assignment Data Mode ltem Name Data Length i 2 Slave Add Address 7 bit sc at T Reg Addr Reg Addr 8 bit Data Data 8 bit Protocol Analyzer Property Write Bit Low Level Don t stop analyzing when NACK appears ACK v Lo
179. n zeroplus com tw ZEROPLUS TECHNOLOGY DONG GUAN CO LTD Room 101 8 Building Lane 825 Chenghui Road Zhangjiang District Pudong New Area Shanghai City China Shanghai Tel 86 21 50155235 6 Fax 86 21 50155235 607 ZIP Code 201203 E Mail adam1833 zeroplus com tw kan zeroplus com tw Users can download the latest Software and User Manual ZEROPLUS is the brand of ZEROPLUS TECHNOLOGY CO LTD The other brands and products are the brand or registered trade mark of individual company or organization Conclusion The demonstrations in this User Manual will enhance users understanding on our products in future issues even though the manual ends here Thank you for choosing our Logic Analyzer Please contact us if you find anything that could be done better about either software or hardware We appreciate your feedback 217 FM0714A
180. n of Chain Data Find Bus Signal Name Bus Signal Name Next Previous Close X Next Previous Close Min Value Max value Min Value Max value When Found Statistics ADDRESS d When Found Statistics I A X Statistics Read R A X Statistics ACK Fig 3 121 Waveform Find Dialog Box of the Protocol Analyzer 12C FM0714A 78 PRN he i BPR S The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Waveform Find xj Waveform Find Activate the function of Chain Data Find Next Previous Close Next Previous Close Min Value Max Yalue Min Value Max value fo F r Faling Edge Rising Edge Start At napaea Edae g Either Edge E Low when Found Statistics la Statistics o Fig 3 122 Waveform Find Dialog Box of the I2C Signal Waveform Find x Waveform Find l x P Activate the function of Chain Data Find Activate the function of Chain Data Find BustSiaral Name p ignalName ray z Next Previous close Busz X Next Previous Close Min Value Max Value Bus Item Find Min Yalue Max Value Sa Co fr When Found Uninow When Found Start Data Ja b Odd Part y Statistics Statistics Statistics Statistics bo fo Fig 3 123 Waveform Find Dialog Box of the Protocol Analyzer UART x x 7 Activate the function of Chain Data Find I Activate the function of Chain Data Find
181. nd 1 List Background 2 Cursor Grd OOOO After the background i altered corresponding color mrm automatically changes according to the contrast ratio When being printed the iv background is white Cancel Default Help Fig 3 153 Workaround and Waveform Color Setting Workaround Set the workaround color of the Logic Analyzer and the text Color Setting xX workaround waveform avehorm Background List Background 1 List Background 2 Cursor r M M M M M M M r M M M r Fig 3 154 Workaround Color Interface Waveform Background The Logic Analyzer s Waveform Viewer Background Color List Background 1 The Logic Analyzer s First Listing Viewer Background Color List Background 2 The Logic Analyzer s Second Listing Viewer Background Color All optional items include the current color of Cursors Grid Unknown Line Default Bus Bus Text List Text and Time Text users can scroll the vertical wheel to view the selectable items Bus Error Users can configure the color of Bus Error Data from the Color Setting dialog box Bus Error Text Users can configure the color of Bus Error Text from the Color Setting dialog box Signal Filter Bar Users can configure the color of Signal Filter Bar from the Color Setting dialog box Relating When users select one item to change the color of the item and users want to change other items into the same color they can select other items at the
182. ngth Ro s Data Length 1 1 5 2bit Fig4 81 Packet Length If the STOP falls short of condition it isn t noted down in UART Packet Length From START Start s TimeStamp to STOP Unknow_End Flag TimeStamp Packet Idling Length Unknow_ End Flag TimeStamp to START TimeStamp 136 FM0714A 4 5 Re tt Ae 19 PRD lt eroplus Technology Co Ltd 4 SPI Analysis SPI Introduction The Zeroplus Logic Analyzer User s Manual V3 12 SPI Synchronous Peripheral Interface is a parallel synchronous full duplex protocol with a Bus like physical interface This protocol was first developed by Motorola and was generally used for EEPROM ADC FRAM and display device drivers which are equipped with low data transmission speed The SPI data transmission is synchronous in both receiving and transmitting directions Although Motorola initially did not define the clocking impulse it is commonly seen that the clocking impulse is according to the master processor In practice there are two clocking impulses CPOL Clock Polarity and CPHA Clock Phase The configuration of both CPOL and CPHA decides the sampling rate When the SPI must transmit serial data it initiates the highest bit 137 Since SPI is a synchronous communication protocol and data transmission may not be in bytes a complete SPI signal Packet must consist of SCK MOSI MISO and SS segments with CPHA and CPOL They are as following SCK Serial Clock Line SCL MOSI
183. not be removed when the waveform or the state is displayed which marks a pod When searching for or obtaining data the A and B labels can be set in any location Using the order of these markings you can return quickly to the desired position to analyze data This can also be a point to measure the interval between A B A T or B T What is a Trigger Gripper A gripper is the gathering point to collect the Logic Analyzer channels When a cable connector is not suitable for the test device a trigger gripper may be an alternative for connection What is a Channel The channel is the collection line of the input signal Each channel is responsible for linking the pin of the measured device Every channel is used to collect signals from the test equipment How can I display acquisition in the waveform captured by external sampling signal Select Waveform Display from the Window list What is an External Trigger An external trigger is a signal outside the Logic Analyzer It is used for the simultaneous test of 2 test tools For example one Logic Analyzer can be started by one signal from another test tool Or when it is triggered it can output one signal to another test tool The Logic Analyzer is often used for triggering an oscilloscope Why does Double Mode not coincide with Filter Delay In order to set out the perfect waveform from the Logic Analyzer and achieve optimal memory efficiency you can use the Signal Filter when using Double
184. nstall Wizard Step 5 Select I accept the terms of the license agreement and click Next Step 6 Enter User and Company names Step 7 Choose the setup type We recommend Complete for most users Step 8 Click Install to confirm settings and begin the actual installation Step 9 Click Finish to complete the installation 19 FM0714A Pe PRA BRD Zeroplus Technology Co Ltd Locic Application Setup Driver Setup LAP C_Standard InstallShield Wizard Welcome to the InstallShield Wizard for LAP C_Standard The InstallShield Wizard will install LAP C_Standard on your computer To continue click Next The Zeroplus Logic Analyzer User s Manual V3 12 LAP C_Standard InstallShield Wizard InstallShield Wizard Complete Setup has finished installing LAP C_Standard on your computer Yes want to restart my computer now Remove any disks from their drives and then click Finish to complete setup LAP C_Standard InstallShield Wizard License Agreement Please read the following license agreement carefully LICENSE AGREEMENT IMPORTANT READ CAREFULLY This LICENSE AGREEMENT is entered into effect between ZEROPLUS Technology Co Ltd hereinafter ZEROPLUS and Customer Individual or Registered Company Whereas Z2EROPLUS owns a software product including computer software as a package product for certain computer products relevant LAP C_Standard InstallSh
185. nt ft mma E gt ih l p serz272 Rae Be B Te h le 9 Height 28 Trigger Delay Scale 10ns Display Pos Ons A Pos 150ns 7 A T 150ns 7 A B 300ns 7 Total 81 92us Display Range 250ns 280ns B Pos 150ns B T 150ns 7 Compr Rate No Bus Signal Trigger Filter 77599 088 5214 318 2829 548 444 78 1939 991 4324 761 6709 531 9094 301 11479 071 gumo 54658 POL PLP PLL g At A Fg 56129 1960 1959 1962 1957 1963 1957 Mis E A2 a2 Z a S 120195 C A3 AS 120195 A4 A4 120195 g 45 45 120195 46 120195 P A A 120195 B0 B0 120195 g Bi B 120195 B2 B2 120195 B3 B3 120195 lates x e 120195 fe es a CS B rf 4 13 DSO stacked Settings To use the DSO stacked function between Logic Analyzer and DSO it is necessary to install specialized software to connect if using the DSOs produced by other manufactures except our company if Tektronix oscilloscope is used for stacking please download the TEKVISA CONNECTIVITY SOFTWARE V3 3 4 version or higher from the Tektronix Website a If OWON oscilloscope is used for stacking please download the Windows USB Driver from the OWON Website http www owon com cn a If PICO oscilloscope is used for stacking please download the Windows USB Driver from the PicoScope Website http Awww picotech com a If Gwinstek oscilloscop
186. o restore See Fig 6 6 206 FM0714A 7P RE TFS AR 1 BBR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Color Setting X Workaround Waveform Name D Relating avetorm Background List Background 1 List Background 2 ma mmama After the background is altered corresponding color o Joj ojla automatically changes according to the contrast ratia When being printed the v background is white Cancel Dett Hee C Fig 6 6 Restore Color Defaults SW14 Can I change the displayed waveform mode A Yes you can There are two ways to do this First go through Data gt Waveform Mode and choose a waveform See Fig 6 7 I Select an Analytic Range i E Moise Filter E22 Bus Width Filter Data Contrast P Find Data value Ctrl F Fol Find Pulse Width l To the Previous Edge Fli j To the Next Edge Flt 0 To Add Bar lt A zE Delete Bar Alt E i Zoom E amp Hand H ke Mormal ESCAPE a Zoom In Fg 4 zoom Out Fa Show all Data F10 wy Previous Zoom Cr Data Format d diy Square waveform Sawtooth Waveform List Data Mode b Fig 6 7 Waveform Mode The second alternative is to right click any place in the Waveform Display Area Then a menu will pop up Click Waveform Mode and choose a waveform See Fig 6 8 207 FM0714A Phe AIR AR ARAE lt eroplus Technology Co Ltd HA Find Data Value
187. ogic Analyzer Settings is available for the LAP 32128U A LAP 321000U A LAP 322000U A LAP C 32128 LAP C 321000 and LAP C 322000 Modules and it is not available for the LAP 16032U LAP 16064U LAP 16128U LAP C 16032 LAP C 16064 LAP C 16128 and LAP C 162000 Modules 4 12 1 Basic Software Setup of Multi stacked Logic Analyzer Settings STEP 1 Click Tools on the Menu Bar then select E to activate the function of Multi stacked Logic Analyzer Settings Customize Color Setting GUS Bus Property aa Refresh Protocol 4nalyzer E Multi stacked Logic Analwzer Settings Analog Waveform Image Encode DS0 stacked Settings Fig4 168 Multi stacked Logic Analyzer Settings Interface STEP 2 Click E to open Multi stacked Logic Analyzer Settings dialog box x f Memory Stack Channel Stack L M4 S N 000000 0000 Synchronous Channel AQ Kr Synchronous Trigger Condition Rising Edge Cancel Help 187 FM0714A 2p Re et Fe he ie B PR The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Fig4 169 Multi stacked Logic Analyzer Settings Dialog Box Activate Stack Click the checkbox to activate the function of the Multi stacked Logic Analyzer the default is non activated Stack Type Users can select the Memory Stack and Channel Stack the default is the Channel Stack Please select the Logic Analyzer for stacking It can display all the connected Logic Analyzers and the S
188. ol Error CHC End ID Data Overload Cancel Default Help Fig4 133 Protocol Analyzer CAN 2 0B Setup 166 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Click OK in the Protocol Analyzer CAN 2 0B dialog box to complete the CAN 2 0B Setting E ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 CAN2 0B laix Demali Boe Elp o S Ga RE cy fi Gal 1046872917 a R a Oy BY TY ke Ble Scale 10 468729us Display Pos 236 791197us A Pos 87 851299us A B 16 182424us v Total 167 69579ms Display Range 25 92701 7us B Pos 104 033724us Compr Rate 255 883 Bus Signal YV Busi CAN 2 08 gai 8 167 695ms az Sd 167 695ms P A3 5g 167 695ms P a4 Sz 167 695ms g 65 45 pO 167 695ms g 86 46 po 167 695ms d a7 167 695ms g eo 40 0251 f8 40 015y 5 40 01ug 40 015us ef40 02ug Jele lief lief 24 08 g Bi 167 695ms 62 167 695ms o B3 167 695ms B B 167 695ms g5 167 695ms 56 B 87 E go ga d 2 ga 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms 167 695ms Ready End DEMO Fig4 134 CAN 2 0B Decoding 167 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 7 2 Protocol Analyzer CAN 2 0B Packet Analysis PROTOCOL ANALYZER CAN 2 06 x Configuration Facket Data Format Register ltem I ID xl C o 3 a x ci ma t
189. on your test board and check the power supply of your test board The Logic Analyzer does not supply any electricity to a test board via signal lines Q3 I get a signal from only one Logic Analyzer when I have two connected what is wrong A Currently only the LAP 32128U A LAP 321000U A LAP 322000U A LAP C 32128 LAP C 321000 and LAP C 322000 support many Logic Analyzers working in series Also make sure that the signal lines power lines and ground line are properly connected Refer to Fig 1 11 Table 1 2 Table 1 3 Table 1 4 and Table 1 5 Q4 Why should bother grounding Where can ground A Grounding will protect the Logic Analyzer and the test board A proper ground may improve the quality and accuracy of your data Since it is impossible to avoid unwanted interference you may ground the Logic Analyzer with the test board to ensure that unwanted interference will equally disturb both the testing and tested devices ensuring a set of data that is still accurate Conclusion Every user of a product is a potential writer for Chapters 5 7 in this User Manual In fact this chapter is a composition of many unnamed electronic professionals especially experts 201 FM0714A 202 PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 6 FAQ 6 1 6 2 6 3 6 4 6 5 Hardware Software Registration Technical Information Others FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer
190. oo 167 674ms gac i 167 674ms 2c id 167 674ms ooo EE 167 674ms 4 ofa gt Ready End DEMO A Fig4 116 Bus Property 156 FM0714A Re RAR BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 157 ns mmm en a ee Select the decoding function of the protocol analyzer HDQ and select OK to confirm E 1 143223m z R 131 747mMS OoOO gR ja Activate the Latch Function C A3 A3 P A4 i4 gasas Bus Property a0 40 ZEROPLUS LA I2C MODULE 2 03 01 CNO1 ZEROPLUS LA LED Pitch Array MODULE 1 00 00 CN01 ZEROPLUS L SPI MODULE 1 13 01 CNO1 ZEROPLUS L UART MODULE 2 14 00 CNO1 Bi Bl B2 62 ges B MEZE 167 674ms i mia KREIK z gt Fig4 117 Protocol Analyzer HDQ Setup oe 167 674ms Complete the protocol analyzer HDQ decoding ra P P ZEROPLUS LAP C 321000 Standard 3 12 CNO1 S N 000000 0000 HDQ E es r209221 i 218 66u9 118 2478 42 162 2up 162 185 i718 4p fi62 184s i718 4p 490 85us 118 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms 167 674ms PS Meche 167 674ms z 4 5 r r h r SB ite a BLN Cal u t ign Fig4 118 Protocol Analyzer HDQ Decoding FM0714A PRET RAR
191. ort Export and The Export function can select the TXT or EXCEL format to store the Data of the List Window of the Memory Analyzer the Import function also can select the TXT or EXCEL formats to analyze the former export data Merge _ Merges It can merge with the different export files See the Merge dialog box below TM i x 1 2 4 Object File Ey _f 10 bet Open File bo merge ov 111 bat Open Cancel Fig4 165 Merge Dialog Box Object File 1 It is the covered file that is to say it is a new file 2 It can display the path of the Object File and the file name 3 It can open the Object File by clicking the Open option File to merge 1 It can create the new file with the object file 2 It can display the path of the File to merge and the file name 3 It can open the File to merge by clicking the Open option Refresh Bfresh Pressing this button can refresh the data status of each Address data when there are some alterations in the Bus Data Reset Ress The data status of each Address will be cleaned out and returned to the original status by pressing the button 185 FM0714A O PRET AR th ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Display Alteration l l l l l l The Data in the List Window of the Memory Analyzer will be cleared by pressing this button and the List Window will display the
192. orts However if front panel USB ports are directly soldered to the main board you can use them 3 Make sure the Logic Analyzer is directly connected with the PC without a USB hub 4 Inconsistent data display may indicate voltage irregularities in the main board examine capacitors on your main board or power supply 203 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 5 If the problem is the power supply we strongly recommend purchasing a power supply with a hardwired voltage transformer rather than a voltage regulator For power supplies with the same output power those built with hardwired voltage transformers are usually much heavier than those relying on voltage regulators H14 What are the time settings for Setup and Hold A Setup Time 0 05ns 0 25ns Hold Time 0 02ns 0 08ns Clock High requires a minimum of 0 31ns Clock Low requires at least 0 47ns 204 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 6 2 Software SW01 Why is the compression function not enabled by default A Mostly to avoid significant errors when testing signals with high variability or measuring a certain channel for a long time period SW02 What is the purpose of the compression function A The compression function measures signals that vary slightly over a long period SW03 Can I enable Trigger Page and Compression F
193. own in Figs 4 6 4 7 and Fig 4 8 Trigger Count Fig 4 6 Trigger Count Pull down Menu We ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 to File Bus Signal Trigger Run Stop Data Tools Window Help O28 S 44 amp 2 dD pp 128K sie Bi 00MH mw ww 109 v ie e Page 1 x Cou Bee veo te o KEO GEA Ax Be Tx i Bile gt Height 30 v Trigger De ay Ons Scale 226 1 splay Pos 8 728003us A Pos 120 98us v T 8 266KHz v A B 3 333MHz v Total 1 ech splay Range 101 797465us B Pos 120 68us 7 T 8 286KHz v Compr Rate No LaDoci 773 amp 9237lus 5T S8727 Tur 35 48218dus 13 rn See 728003us 30 83309Tus 52 9381 Sus i 04328dus T 14837Tus 113 sari 2 Bus Signal gaoa g Ai Ai Fig 4 7 Trigger Count Screen Shot 1 101 FM0714A 7P RE t 32 AR 1 PRD The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 fe ZEROPLUS LAP C 321000 Standard 3 12 CHO1 S H 000000 0000 LaDoci to File Bus Signal Trigger Run Stop Data Tools Window Help 5 x OSH S at amp EB gt pb o 128K sie h 100MHZ mm mw 1096 vie HH Page fi fe F z kL Gi t 134396u we ae Be Be Te amp Mle lE Heient 30 trigger roir Scale 861 S26KHz Display Pos 6 120118us A amp A Pos 120 98us lv A T 8
194. r Position fo Mo Trigger Channel External gt 1 00 Y Trigger Type Activate t Trigger Edge Ring Edge E Video All Lines E Pulse ko f fioo Polarity neq Upper Lint za HE Tig when outside lawer Linit 2 o EE OK Cancel STEP 11 Set the relevant parameter and click the OK button DSO Settings x Oscilloscope Brand Tektronix Connect Mode fe LSB f TEPIP Ah Use the SqilenbGPIb to WSb Switching Gard Stack Parameters Current Connect Model fips 10026 57 Sampling Frequency fi00000 00 Hz Stacking Delay fo Ps L Trigger Position Trigger Channel External fico Y Trigger Type Activate f Trigger Edge Rising Edge viden fall Lines Pulse lt z fio ns Polarity neq Upper Lint fzo HE Tig when outside Later liniby 2 0 EE Cancel 196 FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 STEP 12 Select DSO_CH1 and DSO CH2 channels to analyzer AO A1 channels of LA Below is the waveform it captured E gt ZEROPLUS LAP C 321000 Standard 3 12 CHO01 S H 000000 0000 LaDoci i 7 10 x File Bus Signal Trigger Run Stop Data Tools Window Help 16 xj De i S aK EB gt p f2K z o i floMtz a f50 w e ss Pace 1 v Count 1 gt E l R hi amp 2 4us as of Ax Bo Ik fa le 9 X Height 28 Trigger De 100ns Font Siz fi2 Scale 416 B67K
195. rast File It is used to compare with the Basic File Contrast Beginning Point Select the point to begin the contrast based on the basic file Contrast End Point Select the point to end the contrast based on the basic file Error Tolerance It is the allowable time error when setting data contrast Display files horizontal Display the two files horizontally to see the contrast more clear It is not selected by default Roll the contrast waveforms synchronization Roll the two horizontal files synchronously It can be selected after Display files horizontal is selected Pin Assignment Users can select the contrastive channel Perform Contrast It can activate the Contrast at once Contrast Result It displays the same contrasted result and the different contrasted result with PASS and FAIL respectively Error Stat It displays the number of discrepant parts Tip For this function Data Contrast we provide the SDK Development Tool for users Users can customize the Data Contrast Interface according to their requirements We has packed the Data Contrast UI as the GUI DLL and designed an interface which is used for the communication between the GUI DLL and Main FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Program The GUI adopts the Non modal Interface design which can make the GUI Interface and Main Program Interface switch freely When users activate the Data Contrast function the sof
196. red color Color Basic colors 7 DEHN ll REREH ll 88887 ll IHR S88 S888 ll EREN OELE Lt Custom colors 4 EE EE EE Hue f BU Red lo Sat E Green E Define Custam Eolas gt gt Colors olid Lum lo Blue lo OF Cancel Add to Custom Colors Fig 3 156 Color Panel with Its Advanced View 93 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 3 6 2 Modify Waveform Color Foreground color refers to the color of the output signal lines in the Waveform Display Area Fig3 157 presents how to change colors of a signal or some signals Repeat the following procedures if users need to change colors of many signals Step 2 Step 3 Step 1 Color Setting Workaround Waveform EN Name Relat Cow N Linewidh al s cH WIAA AAAAA AAA al 4 Fig 3 157 Stepwise Illustration of Changing Waveform Colors Step 1 Select several Optional Items Step 2 Select the corresponding items in the relating Step 3 Choose a color by following the method shown in Fig 3 157 Step 4 Click OK to change their colors into the same for example A1 A2 A3 and A4 Here is a sample of an altered Logic Analyzer software interface which will be used for further demonstrations in subsequent chapters See Fig 3 158 94 FM0714A He AR AR BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Wn
197. resistor 1 WIRE Protocol Analyzer is pulled back to the high status 3 Then Master detects a rising edge from the Data Line when every slave will wait for a period of time PDH standard speed 15 60us high speed 2 6us and send back a Presence Pulse to Master PDL standard speed 60 240us high speed 8 24us 4 Finally the 1 WIRE Protocol Analyzer will be pulled back to the high status through the resistor G Meanwhile Master can detect any online Slave O lt From Fig4 95 the low count Reset Pulse and Presence Pulse signals can be clearly seen 143 FM0714A Be 32S BPR Sl The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 SS ee ee ee ee i a 2 ih 1 Lm Nighy iul l n iil im 1 00 Y A Tous ChiX 4 52 Figure 2a You can clearly see the negative poing reset and the presence pulse Fig4 95 Reset Presence Detect Sequence 2 Write Data 1 To initialize Write Data Master will convert the Data Line from the high logic to the low 2 There are two types of Write time slot Write 1 time slot and Write O time slot 3 During a write cycle all Write time slots must have duration of at least 6Ous and a recovery period of ius 4 When the I O line goes down Slave devices create samples from 15 60 us A Write 0 If the sampling is low 0 is generated as in Fig4 98 Write zero Time Slot Veuttur Veuwup MIN Vig MIN RES ISTOR MASTER F
198. ression would make memory work more efficient Trigger condition depends on the testing board If triggering does not work well try to narrow the trigger conditions and optimize them repeatedly 8 If testing board s frequency is lower than that of Logic Analyzer users shall sample signals according to the external clock 9 When external clock is used for sampling users could filter extra signals with the Signal Filter function 10 Unused channels could be removed from the Bus Signal column in the dialog box of Channels Setup on the popup menu of Bus Signal column 23 FM0714A 24 PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 3 User Interface 3 1 3 2 3 3 3 4 3 5 3 6 3 7 Menu amp Tool Bars Find Data Value Statistics Feature Customize Interface Auto Save Color Setting The Flow of Software Operation FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Objective Chapter 3 presents detailed information on the Logic Analyzer software interface in four sections Menu Bar Tool Bar Statistical Function and Interface Customization Basic Layout The layout of the Logic Analyzer software interface can be divided into nine sections as shown in the following figure fe ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 s file Bus Signal Trigg g Run Stop Data Tools Window Help D F
199. rigger Delay _i0ns_ Display Pos Ons A Pos 150ns gt A T 150ns v 5 Total 205 23us Display Range 250ns 270ns B Pos 150ns B T 150ns v Compr Rate 10 021 Bus Si gnal Trigger Filter 200ns DE 100ns 50ns s 50ns 100ns i 0 i i l i i i i i i i i i 1 i i i i i 1 i i i i 1 i i i i i 1 i i gaoa s ahb mknm e Ree a i ewe etn J in m ee ee wien ee eee Fis te ttc Sas enc nF o ttn E O DM i i gt m a G Fig 4 138 Before and After Compression Using 2K memory depth before Compression has been applied the total of the data was 20 48us after the Compression had been applied the total of the data was 205 23us therefore the compression rate is 10 021 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms Step5 Click the compression icon again or click off the compression function to stop compression Tip Compression cannot be applied with the signal filter function at the same time 170 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer lt eroplus Technology Co Ltd User s Manual V3 12 4 7 Signal Filter and Filter Delay The function of the Signal Filter and Filter Delay allow the system to keep the required waveform and filter out the waveforms that aren t required 4 7 1 Basic Se
200. roduction 1 Brief Introduction Features 1 WIRE is a non synchronic half duplex serial transmission which requires only one OWIO to transmit data The typical 1 WIRE transmission structure is illustrated in Figure 4 95 During the 1 WIRE transmission the OWIO can be used to transmit data and supply power to all devices connected to the 1 WIRE OWIO will link to a 4 7K Ohm Pull High electric resistance which is linked to the power supply 3V 5 5V The transmission speed for 1 WIRE can be divided into two types standard and high speed Every 1 WIRE has a unique 64 bit code for the device to recognize Therefore the maximum number of link devices is 1 8 almost unlimited J oe 5 54 Toast Micro Controller Fig4 93 Applications Applications 1 WIRE is commonly applied to the EEPROM and to certain sensor interfaces 2 Protocol Analyzer Signal Specifications Name of Protocol Analyzer 1 WIRE Required No of Channels Signal Frequency Not fixed around 10K Appropriate Sampling 1MHz Rate e Name of Syn Signals OW O Data Verification Point 90 US after the falling edge signals 3 Protocol Analyzer IO Description OWIO The only I O transmits Reset signals and data 4 Protocol Analyzer Electrical Specifications Parameter Min Typ Max Unit Note Every IC varies High count Voltage 2 8 5 2 V according to the Pull High voltage Low count Voltage 0 Vv 142 FM0714A PRE RRD ARAS T
201. roperty xj eao ao piesen 150 288ms GA A Bus Golor Config s ia e F Activate the Latch Function AO P a3 A3 Rising Edge z A4 i4 r Protocol Analyzer Setting g a5 45 Protocol Analyzer Parameters Config g A6 j6 ZEROPLUS LA 1 WIRE MODULE 1 11 00 CNO1 ZEROPLUS LA CAN 2 08 MODULE 1 32 01 CNO1 Faa ZEROPLUS LA HDQ MODULE 2 08 00 CNO1 g eo 50 ZEROPLUS LA I2C MODULE 2 03 01 CNO1 150 288ms ZEROPLUS LA LED Pitch Array MODULE 1 00 00 CN01 Bi Bi ZEROPLUS LA SPI MODULE 1 13 01 CN01 d 2 82 ZEROPLUS LA UART MODULE 2 14 00 CNO1 B3 B3 54 4 JV Use the DsDp Find g 8S B5 More Protocol Analyzer g 86 B6 Cancel Help 57 57 O go co T 167 695ms gc a i 4 gt 4 a gt Ready End DEMO Fig4 132 CAN 2 0B Bus Property Setup Double click the ZEROPLUS LA CAN 2 0B MODULE V1 32 00 CN01 to set the Protocol Analyzer CAN 2 0B dialog box PROTOCOL ANALYZER CAN 2 06 Configuration Packet Data Format Register Pin Assignment Start Packet Format Protocol Analyzer Name Bus 111Bit Start Grewal oon OBit Start Protocol Analyzer Property Data Reverse Decoding Percentage Sample BOR E After End Facket happens just begin to analyze Baud Fate 125000 T Auto E When CAN Data for espansion combine Basic ID and ID Min 1bps Max 10Mb one l Mir 1 bps Max Ps If The Del is displayd in the CRC Field Protocol Analyzer Color Stark Contr
202. rotocol Analyzer Color Owl Reset Pulse Presence Pulse Protocol Analyzer Property Connect Speed Standard 1 us Transmission MSB gt LSE Direction Data Length E bit hin 1 bit blas 32bit Data Mire 1 Mae 120 Cancel Default Help Fig4 100 Protocol Analyzer 1 WIRE Configuration dialog box Set the 1 WIRE Configuration dialog box Pin Assignment 1 WIRE only needs one channel to decode the signals and the default is AO Connect Speed The Connect Speed can be set to Standard 1 us or High 0 2 us Transmission Direction The Transmission Direction can be set to MSB gt LSB or LSB gt MSB MSB gt LSB From High Level to Low Level LSB gt MSB From Low Level to High Level Data Length The Data Length can be set in the range from 1 to 32 bit and the default is 8 bit Sampling Position The Sampling Position can be set in the range from 1 to 120us and the default is 30us Protocol Analyzer Color Users can vary the colors of the decoded packet 147 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 User Interface Instructions Set up the Protocol Analyzer 1 WIRE dialog box which is set as the steps of I2C PROTOCOL ANALYZER 1 WIRE X Fin Assignment Protocol Analyzer Color Owl Reset Pulse o D Presence Pulse a Protocol Analyzer Property Data a Connect Speed Standard t us
203. s 111Bit Start Channel C OBit Start Protocol Analyzer Property Data Reverse Decoding Percentage Sample BOF After End Packet happens just begin to analyze Baud Fate 125000 Auto C When CAN Data for expansion combine Basic ID and ID Min 1bps ae 101b SE l Min 1bps Max ps If The Del is displayd in the CRC Field Fig4 127 Protocol Analyzer CAN 2 0B Configuration dialog box Set the CAN 2 0B Configuration dialog box 163 Pin Assignment Protocol Analyzer CAN 2 0B only needs one channel to decoding signals the default channel is AO Start Packet Format The Start Position can be divided into two formats 111 Bit Start the Start Position is that three bits are High and O Bit Start the Start Position is that one bit is Low Protocol Analyzer Property Percentage Sample The Percentage Sample should be entered in the position of the Baud Rate which is selected from the range between 25 and 75 and the default of the Baud Rate is 60 The resolution can be adjusted to 1 Baud Rate The Baud Rate can be set to Integer or selected from the pull down menu 10000 20000 40000 50000 80000 100000 125000 200000 250000 400000 500000 660000 800000 and 1000000 manually and the default is 125000 If the Auto is selected the Baud Rate can be calculated by the main program automatically and displayed on the CAN 2 0B dialog box Data Reverse Decoding If it is selected the data can be decoded in revers
204. s A1 SS Setting Set the Judgment Level of the SS Channel to Low or High Virtual SS When the SS Channel is not activated the Virtual SS will be activated The Idling Time of the Virtual SS should be set as an auxiliary condition to decode Type the idling time of the SCLK signal on the tested SPI circuit The idling time is defined as the idling time as shown in Fig 4 86 138 FM0714A 7P RE t 332 B21 PRD S The Zeroplus Logic Analyzer User s Manual V3 12 Zeroplus Technology Co Ltd begin en 3 N W NT Eg sc M bel EE jdling time idling lime Fig 4 84 Idling Time Protocol Analyzer Color Users can vary the colors of the decoded packet Step5 Click OK to exit the dialog box of Protocol Analyzer SPI Step6 Click Run to acquire the SPI signal from the tested SPI circuit Refer to the Fig 4 87 Tip Click icon to view all the data and then select the waveform analysis tools to analyze the waveforms We ZEROPLUS LAP C 32128 Standard 3 12 CNO1 S N 000000 0000 LaDoc1 t Ele Bus Signal Trigger Run Stop Data Tools Window Help Oe S i oe tl gt Dp ENDERNE Scale S0KHz Display Pos Ons Total 81 92ms Display Range 500us 580us A B 833 333Hz Compr Rate No A T 1 667KHz B T 1 667KHz v APos 600us v B Pos 600us Y a UCU A n n A N n a NNN NNN Fig 4 85 SPI Signal 139 FM0714A O PRE AR th BPR SS The Zeroplus Lo
205. s Dp A4 0 0 1 0 0 0 Ds Dp AS 0 0 1 0 0 0 Ds Dp A6 0 0 1 0 0 0 Ds Dp A7 0 0 1 0 0 0 Ds Dp BO 0 0 1 0 0 0 Ds Dp B1 0 0 1 0 0 0 Ds Dp d Fig 3 136 The Numbers of Data Qualified by Condition Parameter 82 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Warning Parameter Min M ax i Period wt 10us a 100us C Frequency J 10kHz B 100KHz Fig 3 137 Warning Parameter Set the conditions which will be marked to call users attention Channel Selection Column Selection Condition Parameter Warning Parameter Refresh I Statistics Filter CHANNEL Full Period Conditional Conditional Conditional StartPos EndPos s SelectedData ee O O al AO 211 212 211 oO oO Oo Oo wi Oo pm Al 52 53 52 0 0 0 Ds Dp A2 0 0 1 0 0 0 Ds Dp A3 0 0 1 0 0 0 Ds Dp A4 0 0 1 0 0 0 Ds Dp AS 0 0 1 0 0 0 Ds Dp A6 0 0 1 0 0 0 Ds Dp A 0 0 1 0 0 0 Ds Dp BO 0 0 1 0 0 0 Ds Dp Bi 0 0 1 0 0 0 Ds Dp Ad Fig 3 138 The numbers of data qualified by warning conditions are printed in black otherwise in red 83 FM0714A O PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 4 Customize Interface Section 3 4 presents detailed instructions pertaining to how to modify the Waveform Display Mode how to modify the Ruler Mode how to modify the Waveform Height and how to modify the Correlated Setting b ZEROPLUS
206. s TimeStamp is Reset 151 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 4 5 6 HDQ Analysis Preface Increase the Protocol Analyzer feature to analyze the Protocol Analyzer HDQ transmission protocol data Using LA analysis function the required serial data can be converted and presented in the form of Protocol Analyzer Therefore the software needs to add a dialog box so as to set up a Protocol Analyzer HDQ dialog box HDQ Introduction 1 Brief Introduction Features Protocol Analyzer HDQ is a non synchronic half duplex serial transmission which requires only one HDQ and uses a quasi PWM Pulse Width Modulation to verify the serial data Applications HDQ is commonly applied to the display interface for battery management 2 Protocol Analyzer Signal Specifications Parameter Value Name of Protocol Analyzer HDQ Signal Frequency Not fixed around 12MHz 13MHz and 19 2MHz Appropriate Sampling Rate 100MHz Same Data Time Per Bit Yes aNo Name of Syn Signals HDQ Data Verification Point P 190us converts to High signals gt 3 Protocol Analyzer IO Description oe The sole I O transmits Host and BQ HDQ status and data 4 Protocol Analyzer Electrical Specifications Parameter Min Type Max Unit Note V Logic Input High Logic Input Low Protocol Analyzer HDQ Format Description The format changes according to the pulse width
207. sequence information directly from the screens of oscilloscopes this Logic Analyzer was created to help engineers resolve timing sequence issues during their circuit development I2C has a multi control Bus as its physical and firmware interfaces This protocol analyzer is basically a signal network that may connect to one or several control units The intention of inventing this protocol was in the application of designing television sets which allowed the central processing unit to quicken data communications with peripheral chips and devices The I2C interface is initiated with a SDA triggered High and SCL triggered Falling Edge Following the initiation there will be a set of 7 bits or 10 bits address space Beyond this point there will be Read Write ACK Acknowledgement and STOP or HALT HLT The signal information packet is transmitted in bytes If there are two or more devices trying to access the I2C protocol whichever device has SCL at logic high will gain access priority Furthermore since I2C is a synchronous communication protocol and data transmission must be in bytes a complete I2C signal packet must consist of Start Address Read Write Data ACK NACK and Stop segments They are as following Start This is the initiation of SCL and SDA 1 bit only Address This identifies the device address 7 bits Read Write This is a data direction bit 0 Write 1 Read ACK NACK This is a confirmation bit following every data
208. ser s Manual V3 12 Multi stacked Logic Analyzer Settings x f Memon Stack C Channel Stack Please select the Logic Analyzer for stacking M1 S N 00000 0000 jM2 S N 000000 0000 CM3 3M O00000 0000 CM4 S N 000000 0000 Synchronous Channel AD Y Synchronous Trigger Condition Rising Edge Cancel Help Fig 3 81 Multi stacked Logic Analyzer Settings Dialog Box See Section 4 12 for detailed instructions Analog Waveform The function of Analog Waveform means that the Display Mode of Bus Data is not the Pure Data Mode while it displays data change with the curve which looks like a waveform which in fact is a curve to describe the data change So it is called the Analog Waveform The Analog Waveform can be divided into two kinds namely Single Analog Display and Mixed Analog Display see the figures as below ARG Lee ip ied WLC fe a almi Hi saie hapa e hapo Gaa fa prde pO iaia DERS eee a H fre dh iois frw e ae ge i corn fi ajl E OCE E e eke bt E al tagger Dein Te Gena ri Tries Caipiay Poa 1 14 ee A Piri 1i A D Mee Was A Tm i BPun ite B Tal Crem i 4 Tikal T Berri Diigiwy Miya 1 ADOTT rri tefat AlI elai j any fal G Besi Fig 3 82 Single Analog Display FM0714A O ABATE AS HIRD lt eroplus Technology Co Ltd Image Encode D50 stacked Settings 62 The Zeroplus Logic Analyzer User s Manual V3 12
209. ssion the compression data reference dot FM0714A 7P RET IRAR I BPR SS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Image Encode u Fig 3 71 Tools Menu ShowTime Height 5 30 gt Fig 3 72 Tool Tool Box 56 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Menu Bar Tools Menu Item Detail Menu amp Dialog Box x Common Setup Toolbars Shortcut Key Auto Save Waveform Display Mode E Customize Sampling Site Display Frequency Display Time Display Ruler Mode Regular Ruler Waveform Setting Wavetorm Height 22 T f Time Sampling Site Ruler Font Size ie 7 Correlated Setting M Auto Close Open Close Compression arming Show Gridline W Show the T Bar in the middle area Show Tooltip i Open Close Double Warning lw when the roller is moved toward back the Time Axis in the waveform area will move toward right Data Process What do you want toa show when vou press the Stop during the running Keepthe Present Data Pead the Captured Data M Check for Update Restore Defaults Cancel Help Fig 3 73 Customize Dialog box See Section 3 4 for detailed instructions Customize O x Common Setup Toolbars Shortcut Key Auto Save Data Contrast Screen Display Cancel Help Fig 3 74 Toolbars Setting FM0714A PRET RAR BP
210. t When the option is selected and users move the roller in the middle of Mouse directly toward back the scrollbar will move toward right correspondingly Check for Update The Logic Analyzer software will automatically check for updates when being started Restore Defaults The Waveform Display Mode Ruler Mode Waveform Setting Correlated Setting and Data Process will return to the default setting 89 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 3 5 Auto Save To save the captured data for a long time users can use icons on the tool bar box or menu For the dialog box go to File menu to click Auto Save or go to Tools menu to select Customize and select Auto Save See Fig 3 151 x Common Setup Toolbars Shortcut Key Auto Save Eecooosoococsoscocososoo O New Ctri N File Name LA a Open Ctrl O Seve Path Close Ctri F4 C Documents and Settings Administrator My Save Ctrl 5 Save As Repetitive Run f Data Display Menu Renewal Mode Auto Save Time Interval Every Renewal fee Export Waveform Ctrl Shift E fi s i Open the first file after E Export Packet List stopping the Run ij Capture Window Ctrl C Language gt E Print Ctrl P __Default Print Preview Recent File Exit Fig 3 151 1 Auto Save on File Menu Fig 3 151 2 Auto Save Item of Customize Fig 3 151 Auto Save Auto Save The defau
211. ta menu or click Delete Bar icon from Tool Bar 2 Select a user defined bar and click on Delete 3 Delete the selected Bar with the Delete key on the Keyboard Use the mouse to select the added bar and press the Delete key on the keyboard to delete the bar ts Zoom E hi Tip A Zoom In or a Zoom Out view will be centered in the Waveform Display Area and the new zoomed view will be sized according to the available space on the display The Zeroplus Logic Analyzer User s Manual V3 12 Delete Bar x Clase Fig3 57 Delete Bar Dialog Box Fig 3 58 Delete a selected Bar 40 35 5 AN d UEL CL lees mL Fig 3 59 To Zoom In left click and drag the mouse point from left to right FM0714A He 43 Ae 1 PRD lt eroplus Technology Co Ltd When users activate the Zoom to zoom in zoom out the selected area the Tooltip on the right corner of the bottom will display the Time Clock or Address of the selected area When selecting the Zoom function and users are pressing and dragging the left key the information on the right corner of the bottom will be changed and updated with the width of the selected area And the information is displayed on the right corner of the bottom in the way of Tooltip When users loosen the mouse the information will disappear Tooltip Time Frequency Sample xxx time ns unit Address xxx There is no unit with the address amy H
212. ta Data Data Data Data Data Length Poa tes fs ts fe 7 ofa Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 6 Busi us 973s 2 3 4 5 6 7 o i 2 3 J 100ms __ Fig4 49 Bus Packet List Tip The Protocol Analyzer Packet will be explained in the following plug 5 Packet and Waveform Synchronization For the convenience of fast corresponding between packet data and waveform data and what is more in order to make it easier for users to look up data we add the Packet and Waveform Synchronization function In order to operate conveniently we add a Synch Parameter button on the BUS Packet List as the image below 119 FM0714A O PRET AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 S Setting Refresh Export Synch Parameter LLL Packet Name TiMbotanp k_m e l Esai e Elan Sian Bears E o 2 3 4 5 6 o Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 2 3 4 5 6 7t o i Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 4 5 6 7f otifte 3 4 s_ Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length 6 7 o 1 2 3 4 5 6 7 Packet Name TimeStamp Data Data Data Data Data Data Data Data Data Data Length Oo 1 2 3 4 5 6 7 o 1 Packet Name TimeStamp Data D
213. tamp a Busi 2c 10 3554ms ADDRESS Write 4 ACK DATA DRACK DATA DeACK 50 Write A ACK oo D ACK 75 D ACK ADDRESS Read 4 ACK DATA D NACK DESCRIBE 50 Read A ACK O1 D NACK DATA NACK ADDRESS Read A4 ACK DATA DEACK DATA PORGE 58 DATA D NACK DESCRIBE 50 Read a ack 23 D ack 45 D ACK 67 D NACK DATA NACK acket Name TimeStamp ADDRESS Write 4 ACK DATA a DATA e DATA O DATA E DATA DEACK ee eusi ec 20 4778 50 Write aack o0 D Ack 79 D ack 89 D ack AB D Ack CD D ACK DATA D amp ACK al Fig4 42 Protocol Analyzer I2C Packet List Setting It is used to open Packet List Setting dialog box Refresh Press this button the list view can renew automatically Export Export the workspace into Text txt and CSV Files csv Synch Parameter Open the synch parameter setting dialog box and activate the packet and waveform synch function 2 Display Protocol Analyzer Packet in Order Tip The below view are Protocol Analyzer 12C the packet is determined by the position of the TimeStamp Setting l Refresh Exp ameter T ck Name TimeStamp 4DDRESS Write 4 ACK DATA DACKE DATA DACKE DATA DFACK DATA DPACK DATA D ACK Bee EE s so write aa o oac 75 o ack or o ack 23 Dack 45 Dack DATA 67 D ACK Packet Name TimeStamp DDRESS Write 4 AC
214. terface STEP 2 Open the Memory Analyzer dialog box lt lt lt gt gt L option Import Export Merge Refresh Reset oisplay Alteration Ba Bus1 I2C Address Write data Read data id pedia peac ee a a Unused 0X00 0X4F ox50 0x00 oxcn NXFF OOo es es o S S S o v Compact Mode Unused 0X60 0X7F Complete Mode v 4 b Fig4 162 Memory Analyzer Dialog Box 1 Compact Mode and Complete Mode Click the Right Key in the memory analyzer dialog box there are two modes for selecting which are the Compact Mode and the Complete Mode See the two different figures 183 FM0714A PRE AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 z lt lt lt gt gt gt _ option Import Export Merge Refresh Reset Display Alteration Ba Bus1 I2C Address write data Read data Adress vie data Peada ae aI Unused 0X00 0X4F oxso oxoo 0x79 oxs9 oxaB oxen E ae es ee ee es ee v Compact Mode Unused 0X60 0X7F Complete Mode wf Fig 4 163 Compact Mode lt gt gt gt Option Import Export Merge Refresh Reset Display Alteration Ba Bus1 I2C write data Read data A o Unused 0X00 0X4F 0x50 OX00 0x51 Og 0x52 0k89 0x53 Compact Mode oxss OMEF ox56 oxs7 0x58 iv Complete Mode Unused 0X60 0X7F
215. the trigger condition as Falling Edge See Section 4 1 for detailed instructions FM0714A Phe AIR AR i PRE lt eroplus Technology Co Ltd Reset wl Trigger Property Tip Trigger Content Setup Icon Description ve Decrease a trigger position is Increase trigger position N A Trigger Page N A Trigger Count Tip Trigger Delay Icon Description N A Trigger Delay 41 The Zeroplus Logic Analyzer User s Manual V3 12 Set the trigger condition as Either Edge See Section 4 1 for detailed instructions Reset the trigger condition x Trigger Content Trigger Delay Trigger Range m Trigger Level Trigger Count Port O mL MIE v Port B Min 1 Max 65535 TTL fis Port C TTL f 5 Port D TTL jf 5 M Cancel Default Help Fig 3 33 Set Trigger Content See Section 4 1 for detailed instructions Trigger Level The voltage level that a trigger source signal must reach before the trigger circuit initiates a sweep There are 4 ports available each port has the ability to assign different voltages to meet the users requirements Use the pull down menu to choose between TTL default TTL CMOS 5V CMOS 3 3V ECL and User Defined choose the value of the Trigger Level 6 0V to 6 0 V Fig 3 34 Trigger Position Trigger Page Trigger Count 1 Represents the Trigger Position of a memory page 2 Represents the Trigger Page 3 Represents t
216. tocol Analyzer 1 WIRE Packet Analysis PROTOCOL ANALYZER 1 WIRE X Configuration Facket Data Format Register Item Color W Describe O E Cancel Default Help Fig4 107 Protocol Analyzer 1 WIRE Packet dialog box That is the new View the below View includes several formats that 1 WIRE can happen it describes Data number and their positions BUS Packet List xj Setting Refresh Export Synch Parameter Data A 33 96 30 96 03 90 02 48 B7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Bus1 1 WIRE 4032363 Packet Name TimeStamp Data 2 Bus1 1 WIRE 8065053 33 96 30 96 07 90 00 48 F7 FF FF FF FF FF FF 04 00 Packet Name TimeStamp Data f 3 Busi WIRE 12096936 33 96 30 96 03 90 02 48 SF FF FF FF FF FF FF 04 00 Packet Name TimeStamp Busi 1 WIRE 16129232 Packet Name TimeStamp Busi 1 WIRE 20161527 Data 33 96 30 96 03 90 02 48 SF FF FF FF FF FF FF 04 00 Data 33 96 30 96 OF 90 01 48 2F FF FF FF FF FF FF 04 00 Fig4 108 Protocol Analyzer 1 WIRE Packet List Packet 1 It is commonly normal Data which includes 1 Data Packet 2 It is commonly normal Data which includes 1 Data Packet 3 It is commonly normal Data which includes 1 Data Packet 4 It is commonly normal Data which includes 1 Data Packet 5 It is commonly normal Data which includes 1 Data Packet and Idling Length Packet
217. transmission segment Data The actual signal data transmitted by byte Stop This appears when SCL High and SDA Low bit only 126 FM0714A PREP ip BPRS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 4 5 2 1 Software Basic Setup of Protocol Analyzer I2C Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the Falling Edge as the trigger condition on the signal which connects to the tested I2C data pin SDA Step3 Group the analytic channels into Bus1 aon an ee W Sampling Setup ify Channels Setup EUS Bus Property Analog Waveform Image Encode Bus Signal Reverse Group into Bus Ctrl G Ungroup from Bus Etri eao 40 4i l Add hannel w 43 A3 Copy Channel Delete Channel a2 a2 Delete All Ghannels g a4 44 Restore Default Ghannels was as Format Row 46 46 Rename ay A7 Fig4 65 Group into Bus Step4 Select Bus 1 then press Right Kev on the mouse to list the menu Next click Bus Property or click Tools and the select Bus Property or click to open Bus Property dialog box Bus Property Ea Bus Setting f Bus Color Config Activate the Latch Function AD m Trigger m Rising Edge Bus Signal F Busi ii Sampling Setup Wwa Channels Setup file Bus Property Protocol Analyzer Setting f Protocol Analyzer Para
218. trl C Export Packet List Export the active packet list Language Language Allow users to change the language interface of menus tool boxes etc Print Ctrl F Print Preview Show three options Bus Signal amp Trigger amp Filter Position Display Area and Waveform Recent File Display Area See Fig 3 17 Print Preview Exit Exit Exit the program Fig 3 2 File menu DAS Fig 3 3 File Tool Box 2 FM0714A Phe AR AR i BRD Bl Zeroplus Technology Co Ltd Menu Bar File Menu Item Li Mew t Open Close E Save Save Os Suto Save 28 Detail Menu amp Dialog Box CErl h Open a New file 2 x Look in B11004 LAP BDM c EJ Fe B11004 L4P BDM M CHM_SI_ 1 00_20110520 j te BDM My Recent Documents Desktop My Documents r My Computer Cerl O a RESME File name 7 Places Files of type Logic Analyzer LAP C File alc 7 Cancel File Preview Project Author Title Note V3 Fig 3 4 Open an existing file Ctrl F4 p T a mm Fig 3 5 Close the active workspace Save As Egi x Save in B11004 LAP BDM J ek Be Fe B11004 L4P BDM M CHM_SI_V1 00_20110520 te BDM My Recent Documents Desktop i My Documents Chrl 5 Pr ar My Computer K a My Network Places File name Save as type Logic Analyzer LAP C File alc 7 Cancel File Note Project LaProject Author SUNSHINE Titl
219. ts and made it available to the public Conclusion This chapter is full of hard facts for engineers The contents of this version of the User Manual may look more different than the one on the web Every engineer finds new problems new solutions or other issues during real life applications Though there are dozens of questions here we look forward to your feedback which is important for future versions It may help us produce more efficient and accurate devices so that we will offer you much better service 211 FM0714A Phe AIR AR ARAE lt eroplus Technology Co Ltd 7 Appendix 7 1 Hot Keys 7 2 Contact Us 212 The Zeroplus Logic Analyzer User s Manual V3 12 FM0714A Phe AIR AR 1 BPR lt eroplus Technology Co Ltd Objective The Zeroplus Logic Analyzer User s Manual V3 12 In this chapter users will learn the functions of all defined hot keys in the software interface of the Logic Analyzer 7 1 Hot Keys Table 7 1 Hot Keys 1 Statement Move the A bar to the center of the waveform area select A bar by the cursor Move the B bar to the center of the waveform area select B bar by the cursor Move the T bar to the center of the waveform area select T bar by the cursor Change the mouse mode to Zoom Change the mouse mode to Hand Table 7 2 Hot Keys 2 Hot Key Equivalent Orders A Go to A Bar B Go to B Bar T Go to T Bar E Change to Zoom mode H Change to Hand mode Hot Key Eq
220. tup of Signal Filter and Filter Delay Software Basic Setup of Signal Filter and Filter Delay Step1 Set up RAM Size Frequency Trigger Level and Trigger Position as described in Section 4 1 Step2 Set up the trigger edge on the signal or the Bus to be triggered Step3 Click icon or click the Signal Filter Setup button on the Sampling Setup dialog box or select the item form the pull down menu of the Bus Signal and then the Signal Filter Setup dialog box will appear Bus Signal Trigger RunjStop Da x EA Sampling Setup Apmehrorean Cock Bus Signal Trigger Run Stop Data rte internal Chocks Baca Wt Stop D id Channels Setup SS iM Sampling Setup MQ Signal Filter Setup iy Channels Setup a irinae ity k Group into Bus Ctrl G E teen oe fi Signal Filter Setup Prenat Soe hit Re rn ee ith r PariC Plax SOME Group into Bus Chrl G Robe The ander dedi volage krel i thee taima i taa prt A regen lava Ungroup From Bus e ERA om Comprecuon Mode Tyaka Espanie Format Row bo Baise ix I Sata Conen Spal Mier Setup oollapse Rename Charred number n te i Format Row F Renie e I cece aal vo Signal Filter Setup i x Filter Condition Trigger condition Porta a Filter Condition Trigger Condition Filter Condition Trigger Condition Part Filter Condition Trigger Condition ilter Condition Filter Delay Setup MW Activate Filter Delay Select Filter Delay Mode Select Delay St
221. tware All Protocol Analyzer plugs which are used at present are put in the data file the DLL file can be added or deleted in the content and in the Bus property all Protocol Analyzer plugs that can be used at present can be seen as the figure below mis ert Vie Peete Teli He Emt e ee Dyeech redone itey fe 4 OX re ch Webs Pugiros l amp ag s A A amp l e PITRE CPM maHa Fu Pe PT Fig4 33 PluginsA Bus Property d xX Color Gonfig AD rising Edge Parameters Contig ZEROPLUS LA 1 VIRE MODULE 1 10 000CM014 ZEROPLUS LA 3 WIRE MODULE 1 04 000CNO1 ZEROPLUS L 4C9 MODULE 1 02 000CN01 ZEROPLUS L 4RITHMETICAL LOGIC MODULE 1 51 000CMO14 ZEROPLUS LA BUS MODULE 1 00 000CNO1 4 ZEROPLUS LA CAN 2 06 MODULE 1 52 000CN01 4 ZEROPLUS LA CCIRG56 MODULE 1 31 000CNO1 ZEROPLUS LA Compact Flash 4 1 MODULE 1 01 000CNO1 5 ZEROPLUS LA CMOS IMAGE MODULE 1 00 000CN014 FC ao A AAL T Teh en BAGAL O a a eo V Use the Dsp Find More Protocol Analyzer cns e Fig4 34 Bus Property Every Logic Analyzer Module can provide some basic Protocol Analyzer plugs When users need to use the analysis which is not provided by the basic Protocol Analyzer plugs you can purchase from our company and then you can get this Protocol Analyzer plug and the register code 113 FM0714A 7P RE TER AR 1 BPR BS The Zeroplus Logic Analyzer Zeroplus Technology Co
222. tware will search whether there is a GUI DLL or not then it can judge whether there is a user defined Interface If there is a user defined Interface the GUI DLL will take effect if there isn t the embedded Data Contrast Interface will be activated STEP 2 Display the contrast results in the Data Contrast dialog box Tip After pressing Perform Contrast it will display the contrast information in the contrast result The below contents of the box are the contrast information The information is relative simpleness if users don t want to understand more details you can know whether the signals of the two contrast files are completely the same or not Data Contrast Settings 2 xi IV Activate Data Contrast Contrast Files Files Display Mode Basic File LaDoc1 v Contrast File LaDoc2 m Contrast Beginning Point Contrast End Point p Error Tolerance IV Display files horizontal Roll the contrast waveforms M synchronization V Display files the contrast differences None i i lt lt Hide Result Pin Assignment Perform Contrast Provious Next Close Contrast Statistics Ds nd Dp z Fig4 154 Display the Contrast Results in the Data Contrast Settings Dialog Box AO AO FAIL It indicates that there are differences in the channels of the two files BO BO PASS It indicates that there is no difference in the channels of the two files
223. ty Reset Step2 Trigger Level Setup Click the pull down menu of Trigger Level on Port A B C and D to select the Trigger Level as the voltage level that a trigger source signal must reach before the trigger circuit initiates a sweep Tip There are four commonly used preset voltages for Trigger Level TTL CMOS 5V CMOS 3 3V and ECL Users also can define their own voltage from 6 0V to 6 0V to fit with their DUT if the number users define is not in the range the Fig 4 5 dialogue box will appear Port A represents the pins from AO A7 on the signal connector of the Logic Analyzer and so do Port B C and D The voltage of each port can be configured independently 100 FM0714A PRE R AR ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Trigger Property l X Trigger Content Trigger Delay Trigger Range Trigger Count Fort 4 Moo EMOSIE 25 e Fort B kdi d hd ae CERTIFI m ZEROPLUS Logic Analyzer x Port C A Please enter a number between 6 0 and 6 0 TTL Fort D User Defi Trigger Level OK Cancel Default Help Fig 4 5 Trigger Level Error Step3 Trigger Count Type the numbers or select the number from the pull down menu of the Count Count zlon the Tool Bar or click the pull down menu of the Trigger Count on the Trigger Property dialog box as shown in Fig 4 6 The system will be triggered at the position where the Trigger Count is set as sh
224. uivalent Orders Ctrl A Go to A Bar Ctrl B Go to B Bar Ctrl C File gt Capture Window Ctrl E Data gt Zoom Ctrl F Data gt Find Data Value Bus Signal gt ALEG Group into Bus Ctrl N File gt New Ctrl O File gt Open Ctrl P File gt Print Ctrl S File gt Save Bus Signal gt ws Ungroup from Bus Ctrl Z Data gt Previous Zoom Ctrl Shift E File gt Export Waveform Statement Center A bar Center B bar Open Capture Graph dialog box Change Mouse mode to Zoom mode Search specific data with predetermined conditions Group selected signals into a Bus Create a new file Open a saved file Print an active file Save an active file with its current name location and file format Ungroup signals Pins from a Bus Reverse the last Zoom Open Export Waveform dialog box FM0714A 214 Phe AIR AR i PRE lt eroplus Technology Co Ltd Hot Key Page Down Page Up Home End Up Down Left Right ESC Space The Zeroplus Logic Analyzer User s Manual V3 12 Table 7 3 Hot Keys 3 Equivalent Orders Operate the position shown Operate the position shown Operate the position shown Operate the position shown Operate the position shown Operate the position shown Operate the position shown Operate the position shown Operate the position shown Change the trigger conditions Statement Go to next page of the data or the wavefor
225. ulation 16 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 Table1 9 Operating Environment Avoid direct sunlight Use in a dust free non conductive environment see Note Relative Humidity lt 80 Altitude lt 2000m Temperature 0 40 Degrees C This is a Class A product which may cause radio interference in a domestic environment Note EN 61010 1 2001 specify degrees of pollution and their requirements Logic Analyzer falls under Level 2 Pollution refers to addition of foreign matter solid liquid or gaseous ionized gases which may produce a reduction of dielectric strength WARNING or surface resistivity Pollution Degree 1 No pollution or only dry non conductive pollution occurs This pollution has no effect Pollution Degree 2 Normally only non conductive pollution occurs Occasionally however temporary conductivity caused by the condensation must be expected Pollution Degree 3 Conductive pollution occurs or dry non conductive pollution which becomes conductive due to the condensation occurs In such conditions the equipment is normally protected against exposure to direct sunlight precipitation and wind but neither temperature nor humidity is controlled Storage Relative Humidity lt 80 Environment Temperature 0 50 Degrees C Conclusion After reading this section users should have a basic grasp of the Logic Analyzer A compl
226. unction simultaneously A Yes you Can SW04 When should I use the Bar function A This function allows you to highlight a segment of a waveform so that you can have a closer view Depending on the configuration of Waveform Display Mode under Tools Customize a more accurate numeric value of sampling site time or frequency difference will be calculated and displayed as shown in Fig 6 7 4 Pos O7Ous 4 T 69 s46us 4 amp B 19846u2 E Pos O060us B T 50uz Compr Rate 1 000 Fig 6 1 Bar Function SW05 Can triggers be differentiated in Pre Trigger and Post Trigger A Yes they can SWO6 Are all setup parameters and configurations saved as save my work A Yes everything in your work space except signal graph will be saved SW07 If have the wheel feature with my mouse or other pointing devices may adjust the waveform display zoom in the Waveform Display Mode by scrolling A This feature has been enhanced since V1 03 If your program version is prior to this version visit our website for the latest update at http www zeroplus com tw logic analyzer en technical_ support php SW08 What are the extremes for Delay Time and Clock amp Trigger Delay Clock A The interface will inform you of the interval you may use However it varies from case to case depending on your test devices See Fig 6 2 Trigger Delay Time Ans blin 5ns Wlas 83 860955ms Trigger Delay Clock
227. ver CD is not auto executable The primary issue here is a chipset problem Though these six Logic Analyzer models seem only different in model number they are quite different in firmware and chipsets Due to installation procedures see Chapter 2 we are unable to compile a driver program that auto detects the chipset at the beginning of the installation Why does the installation software keep giving an error message saying that don t have enough memory This kind of problem happens in many hardware installations Turn off multimedia programs such as Media Player media decoders media encoders and so on If there are any multimedia icons in the system tray see the far right end of the START menu taskbar remove them The Logic Analyzer software will run better in memory locations from 64 to 512 MB What should do if want to share this software interface with all users of my computer after installing it The shortcut is removing the software interface and then reinstalling it By default the program is available for all users My HDD is modest which software components are absolutely necessary Choose Custom as your setup type Next unselect items such as examples and tutorials You must install at least the Main App application My MS Windows system will not accept the driver what should I do Double check that you run the correct Setup exe from the folder that corresponds to your hardware and MS Windows version Visit our
228. w Level Add the Read Write Bit for Slave Address m Protocol Analyzer Color Start Data Slave Addr Read Write Reg Addr ACK A NACK D ACK D NACK Stop Cancel Default Help Fig 4 67 Protocol Analyzer I2C Configuration dialog box Step6 Set the I2C Configuration dialog box Pin Assignment SDA Channel It is the Data channel and the default is AO SCL Channel It is the Clock channel and the default is A1 Data Mode Set the Data Length used by the Slave Addr and the Data Protocol Analyzer Property Set the Write Bit or Read Bit to Low Level Set the ACK or NACK to Low Level Don t stop analyzing when NACK appears When the option is selected the data will be analyzed continuously when the NACK appears Add the Read Write Bit for Slave Address When the option is selected the decoding will be displayed by way of the added Read Write Bit for Slave Address Protocol Analyzer Color Users can vary the colors of the decoded packet Step7 Press OK to exit the dialog box of Protocol Analyzer 12C Steps Click Run to acquire I2C signal from the tested I2C circuit Refer to Fig 4 68 Tip Click icon to view all data and then select the waveform analysis tools to analyze the waveforms T ALROPLUS LAP C IZ 120 Standard YL IANO 5 ho0O0000 D000 2C lol xj ue De DESA Tagger Bunfatop Daa Took Wd kiep alaj x oe amp oa el OE e loK E ih iMm mu om 0 Je aral Count 1 f ml
229. west Configuration Recommended Configuration CPU 166 MHz 900 MHz VGA Display Capability with VGA Display Capability with 1024x768 resolution or higher 1024x768 resolution or higher Display Device At least 100MB available space At least 100MB available space USB USB1 1 supported USB2 0 recommended 15 FM0714A PRE RRD ARAS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd Users Manual V3 12 1 5 Device Maintenance and Safety Follow these instructions for proper operation and storage of the Logic Analyzer Table1 7 General Advice Do not place heavy objects on the Zeroplus Logic Analyzer Avoid hard impacts and rough handling Cautions Protect the Logic Analyzer from static discharge Do not disassemble the Zeroplus Logic Analyzer this will void the warranty and could affect its operation Use a soft damp cloth with a mild detergent to clean Do not spray any liquid on the Zeroplus Logic Analyzer or Cleaning immerse it in any liquid Do not use harsh chemicals or cleaners containing substances such as benzene toluene xylene or acetone Table1 8 Electrical Specifications LAP A Series amp LAP C Series items Minimum Typical Maximum Current at Rest CurrentatWork Powerat Rest J o PoweratWork J o DC 30V__ Error in Phase Off DC 30V Input Resistance 500K _ 10pF Working Temperature 5C Storage Temperature 40 C Refer to the User Manual for error analysis calc
230. y 0 40 Bus Packet List r g Al Al gt ii Statistics window g A2 42 Cascade g A3 A3 Horizontal m P ai a4 Vertical Screen Display gt g 45 45 g 26 v LLaDocS A A7 60 B50 ge ei P Fig 3 86 Display Signals in Waveform 65 FM0714A O PP BEA 5 AS 1 5 BRAS lt eroplus Technology Co Ltd Listing Display Hot Mews Window Tip To let online users learn the latest news we add the Running Text Ads Function Turn On Start the Running Text Ads function News Activity Let users learn the activities of our company Production News Let users learn the latest products of our company Note If both News Activity and Production News are turned on The Running Text Ads will play News Activity prior to Production News and play the news in order the whole process plays repetitively The Zeroplus Logic Analyzer User s Manual V3 12 Bus Signal Trigger RunjStop Data Tools Windows Help 2 00MHz Display Pos Hot News Window 10 2408 Real time Monitoring E ge Memory Analyzer ES Bus Packet List ii Statistics Window Cascade Horizontal Vertical Screen Display MOC A N Doo 0051 w 2 Labochiz M ae dV ee a e a a i Fig 3 87 Display Signals in Listing Window Help Waveform Display Listing Display Hot News Window Te i Bar Har Turn On ra Mews Activity i Production News BA l
231. y Change the display of a Bus or a signal Size the signal columns automatically Highlight a signal or Bus and click Move Left Up to move the signal or Bus up left through the list of the Bus signal Highlight a signal or Bus and click Move Right Down to move the signal or Bus down right through the list of the Bus signal Highlight a signal or Bus and click Hide to hide it Click to show all signals and Buses that have been hidden Highlight a signal or Bus and click Color to change the color Highlight a signal or Bus and click Rename to rename the Bus or signal FM0714A 3 7P RE TER AR 1 BPR BS The Zeroplus Logic Analyzer Zeroplus Technology Co Ltd User s Manual V3 12 Bus Trigger mu TT TAS Fig 3 29 Trigger Menu Fig 3 30 Trigger Tool Box 39 FM0714A Re tt Ae 19 PRD lt eroplus Technology Co Ltd Menu Bar Tri The Zeroplus Logic Analyzer User s Manual V3 12 Menu Item E Bus Trigger Setup Channel Trigger Setup Trigger Mark Ir JA Pulse Width Trigger Module Option Tip It is not necessary to register as it can be used for free os Don t Care f Rising Edge Falling Edge 40 Detail Menu amp Dialog Box x Bus Trigger Protocol Analyzer Trigger Bus Marne Operator Bust Data Format Binary JE C Decimal C DecimallSigned Hexadecimal ASCII Gray Code C Complement C
232. y Pos 9 9Tus A amp A Pos 9 9Tus v A T 9 9Tus v Total 20 48us Display Range 10 02894us B Pos 150ns v B T 150ns v ee mer re Bus Si gnal 710 017152us 10 005364us 9 9335 76us 73 981 T68us set Ta 35821 2us 9 346424u lns 10ns 10ns 10ns 10ns 10ns a 10ns ims 20 Taveform Find q Exi 20r E I Activate the function of Chain Data Find 43 A3 iar h sT A4 A4 X Previous Close 45 45 Bus Item Find Min Value Max Value P A7 47 Start At End at when Found Statistics g eo B0 Ds Top F m Statistics Bi B1 Address 997 lea B2 62 20 48us f AA RA Fig 3 129 The A Bar is placed at the 0X1A of Bus1 where the condition of the Waveform Find is set FM0714A 80 Phe AR AR BPR lt eroplus Technology Co Ltd Scale 5 6559625 Total 32765 Y e0 40 Bus Al Al BAZ az BA a3 aq a4 was a5 46 46 a ar e E0 60 Bi El g 62 BZ g BS B3 g 64 E4 T Display Fas 0 Display Range 141 143 Fig 3 130 The B Bar is placed at the 0X12 of Data of Protocol Analyzer SPI where the condition of the Waveform Find is set A Fos 104 E Pos 0 113 079 84 509 56 54 28 2T l Doo i LIII Di fo io oo Lt oe as Taveftors Find Activate the Function of Chain Data Find E ie Next Previous Close a ofm e eae JE J Fe if 7 Stark At End at when

1 FM07I4A

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