PCIe® x8
Contents
1. TECHNICAL INFORMATION o Connector Pin Assignment A1 B1 Latch Side A34 B34 1 4 A7 A10 A13 A16 A22 25 GND Ground reference for PCI Express transmitter Lanes A28 A31 A34 A2 PETpO Differential PCI Express transmitter Lane 0 A3 PETnO Differential PCI Express transmitter Lane 0 5 1 Differential PCI Express transmitter Lane 1 A6 PETn1 Differential PCI Express transmitter Lane 1 A8 PETp2 Differential PCI Express transmitter Lane 2 A9 PETn2 Differential PCI Express transmitter Lane 2 PETp3 Differential PCI Express transmitter Lane 3 PETn3 Differential PCI Express transmitter Lane 3 CREFCLK Differential 100 MHz cable reference clock CREFCLK Differential 100 MHz cable reference clock NC NC SB RTN Signal return for single ended sideband signals CPRSNT cable is installed and the downstream CPWRON Turns power off to slave type downstream subsystems PETp4 Differential PCI Express transmitter Lane 4 PETn4 Differential PCI Express transmitter Lane 4 PETp5 Differential PCI Express transmitter Lane 5 PETn5 Differential PCI Express transmitter Lane 5 PETp6 Differential PCI Express transmitter Lane 6 PETn6 Differential PCI Express transmitter Lane 6 PETp7 Differential PCI Express transmitter Lane 7 PETn7 Differential PCI Express transmitter Lane 7 Cabl2. into the connector housing at each end of the assembly and the opti cal signal is transmitted over a small diameter optical fiber The cable auxiliary signals CPWRON CPERST CPRSNT and CWAKE are also transmitted over the optical link Fiber Cable used in the PCle x8 AOC is a nonconductive plenum rated cable with a 3mm cable diameter and 30mm bend radius Cable Connector attached at each end of the fiber cable is a metalized housing that contains the electrical to optical components and mates to a standard x8 PCle electrical port Note Unlike traditional copper cable active optical PCle cables are directional One end must be connected to the host system upstream direction and the other to the target system downstream direction The ends of the cable are labeled with Host and Target direction and are not interchangeable Samlec SYSTEM REQUIREMENTS Power The PCle x8 AOC requires the host and target systems to provide 3 3 volts to connector pins B14 B15 and B16 at both ends of the cable assembly as described in the PCle cabling specification optional feature See the Connector Pin Assignment on page 10 Note The PCle cabling specification specifies power as an option and therefore not all PCle systems provide power to the connector ports Active Optical Cable Assemblies cannot be used with systems that do not provide power to the cable ports In systems that use the sideband signal CWAKE
3. both ends of the Active Optical Cable Assembly must be powered at all times and therefore they must be powered by Vaux In systems that do not use CWAKE the cable ends may be powered by Vmain Clock Constant Clock CC Active Optical Cables require the use of a con stant clocking scheme The PCle Active Optical Cable Assembly uses a constant clock frequency of 100 MHz as specified PCle standard If a clock frequency other than 100 MHz is required it must be specified at the time of purchasing the assembly Spread Spectrum Clock SSC is used in many systems running PCle However due to signaling technology limitations the PCle standard cannot support SSC beyond 7m of link length As noted in Clock Constant above Active Optical Cables require the use of a constant clocking scheme In order to use a PCle Active Optical Cable Assembly in a system that uses SSC clocking the SSC must be com pletely disabled at the host If disabling the SSC is not possible then a clock isolation adapter card will be required to isolate the SSC clock Note Some motherboards allow SSC to be disabled however in some cases the disable function has a delay that allows the SSC to run for a period of time Motherboards that delay the SSC disable function cannot be used with optical cable assemblies Ensure that the mother board you are using completely disables SSC or uses a clock isolation adapter card SYSTEM REQUIREMENTS EN o Adapter Card
4. YOUR ACCESS USE OR INABILITY TO ACCESS OR USE THIS PUBLICATION OR ANY ERRORS OR OMISSIONS IN ITS CONTENT Copyright 2012 Samtec Inc TABLE OF CONTENTS DESCRIPTION DESCRIPTION PCle x8 Active Optical Cable Assembly eene 4 Fiber Gable me iaiana 4 Cable 22 2 4 4 SYSTEM REQUIREMENTS POW ON cuni cae ee aces WIN IE EET END E 5 dn ETE 5 Constant Clock CC Spread Spectrum Clock SSC Adapter 5 6 Auxiliary Sideband Signals 222222 4 2 4 6 Connecting 00 7 80 7 Equivalent Sideband 10 22222 222 8 Specifications 0 8 Connector Pin Assignment 10 PCle CABLE ASSEMBLY PART NUMBERING PCle Active Optical 22 2 22 11 PCle is a registered trademark of PCI SIG DESCRIPTION PCle x8 Active Optical Cable Assembly is an 8 lane full duplex exter nal cable assembly that is a direct replacement for copper or active copper cable assemblies Each lane is capable of transmitting PCle signaling at Gen 1 2 5 GT s Gen 2 5 GT s and Gen 3 8 GT s The cable can drive Gen 1 or Gen 2 signaling up to a distance of 300m and is also capable of supporting the emerging Gen 3 data rate at 100m distances The electrical to optical conversion circuitry is fully integrated
5. e propagation of these signals is directional Connect Host side to upstream system Target side to downstream system 2 Constant 100 MHz Clocking only For Spread Spectrum Clocking SSC support use our clock isolation adapter card Available Q1 2012 3 Must be connected to 3 3V 5 Vaux or Vmain Must be connected to Power Ground 10 Samlec TECHNICAL INFORMATION B1 B4 B7 B10 B13 B22 B25 GND Ground reference for PCI Express receiver Lanes B28 B31 B34 B2 PERpO Differential PCI Express receiver Lane 0 B3 Differential PCI Express receiver Lane 0 B5 PERp1 Differential PCI Express receiver Lane 1 B6 PERn1 Differential PCI Express receiver Lane 1 B8 PERp2 Differential PCI Express receiver Lane 2 9 PERn2 Differential PCI Express receiver Lane 2 PERp3 Differential PCI Express receiver Lane 3 PERn3 Differential PCI Express receiver Lane 3 PWR 3 3V Cable power PWR 3 3V Cable power PWR 3 3V Cable power PWR RTN Cable power return PWR RTN Cable power return PWR RTN Cable power return CWAKE Z Power management signal for wakeup events CPERST Cable PERST PERp4 Differential PCI Express receiver Lane 4 PERn4 Differential PCI Express receiver Lane 4 PERp5 Differential PCI Express receiver Lane 5 PERn5 Differential PCI Express receiver Lane 5 PERp6 Differential PCI Express receiver Lane 6 PERn6 Differe
6. ntial PCI Express receiver Lane 6 PERp7 Differential PCI Express receiver Lane 7 PERn7 Differential PCI Express receiver Lane 7 e Co jo Cable propagation of these signals is directional Connect Host side to upstream system Target side to downstream system 2 Constant 100 MHz Clocking only For Spread Spectrum Clocking SSC support use our clock isolation adapter card Available Q1 2012 3 Must be connected to 3 3V 5 Vaux or Vmain Must be connected to Power Ground PCle CABLE ASSEMBLY PART NUMBERING SS PCle Active Optical Cable 462 005 0 Product Category Speed x4 Gen2 001 x8 Gen2 Fiber Length 5m 10m 100m Specific Product Variant Clock Frequency Sideband 001 100 standard 002 100 Forced RF 003 100 3 standard 004 100 3 Forced RF 005 No CK standard 006 No CK Forced RF 11 SAMTEC INC Box 1147 New Albany IN 47151 1147 USA Tel 1 800 SAMTEC 9 or 812 944 6733 Fax 812 948 5047 Internet www samtec com E mail optics 9 samtec com
7. s A Host adapter card and a Target adapter card that are compatible with Active Optical Cables should be installed at each end of the link Adapter cards that have been qualified with the PCle x8 AOC are listed in Table 1 below Table 1 Compatible Adapter Cards EUM Samtec Optical PCIEA H 8G2 01 Host PCIEA T 8G2 01 Target One Stop Systems OSS PCle HIB25 x8 H Host OSS PCle HIB25 x8 T Target Dolphin IXH610 x8 Host IXH610 x8 Target Spread Spectrum Clocking Constant Clocking EN Auxiliary Sideband Signals CPWRON CPERST CPRSNT and CWAKE are also transmit ted over the optical link The link will be properly established if OSS or Samtec adapter cards are installed If custom adapter cards are used the PCI Express External Cabling Specification 2 0 should be followed Note Auxiliary sideband signal usage and implementation over cop per cable varies widely between systems For Active Optical Cable Assemblies sideband signals should preferably be implemented following the PCle 2 0 standard At a minimum the sideband signals CPERST and CPRSNT need to be connected and their final state must conform to Table 2 below for the link to exchange data CPWRON and CWAKE do not need to be connected but if they are their final state must be HIGH If sidebands are to be ignored entirely a special no sideband cable can be purchased Table 2 below summarizes the minimum sideband implementation req
8. samle PCle xg Active Optical Cable Assembly User Manual JANUARY 2012 Covering PCIEO Series COPYRIGHTS TRADEMARKS and PATENTS Product names used herein are trademarks of their respective owners All information and material in this publication are property of Samtec Inc All related rights are reserved Samtec Inc does not authorize customers to make copies of the content for any use Terms of Use Use of this publication is limited to viewing the pages for evaluation or purchase No permission is granted to the user to copy print distrib ute transmit display in public or modify the contents of this document in any way EN Disclaimer The information in this publication may change without notice All materials published here are As Is and without implied or express warranties Samtec Inc does not warrant that this publication will be without error or that defects will be corrected Samtec Inc makes every effort to present our customers an excellent and useful publica tion but we do not warrant or represent the use of the materials here in terms of their accuracy reliability or otherwise Therefore you agree that all access and use of this publication s content is at your own risk NEITHER SAMTEC INC NOR ANY PARTY INVOLVED IN CREATING PRODUCING OR DELIVERING THIS PUBLICATION SHALL BE LIABLE FOR ANY DIRECT INCIDENTAL CONSEQUENTIAL INDIRECT OR PUNITIVE DAMAGES ARISING OUT OF
9. uirements Table 2 Minimum Sideband Implementation Requirements CPERST Reset CPRSNT Cable Present CPWRON Power On CWAKE Host Wakeup 1 A no sideband cable is available as an option for applications where sidebands are ignored Samlec INSTALLATION Connecting AOC Power to either the adapter card or motherboard should be in the off state prior to installing the cable assembly Refer to the label on the connector ends to identify the host end of the cable assembly and the target end of the assembly Insert the host end of the assembly into the host card and the target end into the target card ensuring the connector is fully seated and the latching mechanism is fully engaged with host connector Apply power after the cable has been installed Power Sequence PCle Active Optical Cables do not require a special powering sequence But whether using an Active Optical Cable or a passive copper cable it is critical that the target be powered prior to the PCle controller on the motherboard enumerates searches and detects all the PCle devices There is a short delay from when the host is powered and then starts to enumerate but to ensure that the target is powered prior to the host beginning its search it is good practice to apply power to the target side and then to the host side TECHNICAL INFORMATION o Equivalent Sideband IO Circuit The sideband input signals are pulled high using an internal p
10. ull up resistor Rpu of 20 50 kohms as shown in the equivalent IO circuit diagram below Figure 1 Refer to Table 3 to determine which sideband signals are inputs to the host end of the cable and which signals are inputs to the target end of the link Figure 1 Equivalent Sideband 10 Circuit Table 3 Sideband Signal Input Output Reference CPWRON Input CPERST Input CPRSNT Output CWAKE Output EN o Specifications General Characteristics Operating Case Temperature Case Temperature Operating Humidity Noncondensing Storage Temperature Range Link Distance 100m max at Gen 3 rate Samlec TECHNICAL INFORMATION Electrical Characteristics Data Rate channel 2 5 5 0 8 0 Gen 1 Gen 2 Gen 3 Differential Input Amplitude Peak to peak differential Differential Output Amplitude 700 Peak to peak differential Power Supply Voltage 3 3 Supplied through pins B14 and B15 Power Supply Current 460 Per connector end Power Consumption Per connector end Bit Error Rate Nominal supply voltage room temperature Maximum supply voltage 75 C Mechanical Dimensions
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