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Wi.232EUR User`s Manual

1. Name Address Description reg IT XCHANNEL 0x4B Transmit channel setting regRXCHANNEL 0x4C Receive channel setting regPWRMODE 0x4D Operating mode settings regDATARATE Ox4E UART data rate regNETMODE Ox4F Network mode Normal or Slave reg iXTO 0x50 Transmit wait timeout regNETGRP 0x51 Network group ID regUSECRC 0x53 Enable Disable CRC regUARTMTU 0x54 Minimum transmission unit regSHOWVER 0x55 Enable disable start up message regCSMAMODE 0x56 Enable disable CSMA regSLPMODE 0x58 Power state of module Non volatile Read Only Registers Name Address Description regMACOo 0x22 These registers form the unique 48 bit MAC address regMAC1 0x23 regMAC2 0x24 regOUIO 0x25 regOUl1 0x26 regOUl2 0x27 Non volatile Registers Name Address Description Default regNVTXCHANNEL 0x00 Transmit channel setting 16 regNVRXCHANNEL 0x01 Receive channel setting 16 regNVPWRMODE 0x02 Operating mode settings 13 dBm wideband mode regNVDATARATE 0x03 UART data rate 2400bps regNVNETMODE 0x04 Network mode Normal Slave Normal regNVTXTO 0x05 Transmit wait timeout 16ms regNVNETGRP 0x06 Network group ID 0x00 regNVUSECRCG 0x08 Enable Disable CRC Enabled regNVUARTMTU 0x09 Minimum transmission unit 64 bytes regNVSHOWVER Ox0A Enable Disable start up message Enabled regNVCSMAMODE 0x0B Enable Disable CSMA Enabled regNVSLPMODE 0x0D Power state of module Awake Table 8 Regist
2. Min Max Units Parameter VCC Power Supply 0 3 5 0 VDC Voltage on any pin 0 3 5 2 VDC Input RF Level 15 dBm Storage Temperature 40 85 C Table 13 Absolute Maximum Ratings 10 2 Detailed Electrical Specifications 10 2 1 AC Specifications RX Parameter Min Typ Max Units Notes Receive frequency EUR 868 225 869 885 MHz At antenna pin Channels wideband 2 Channels narrowband Mode 6 Channel spacing wideband Mode 650 kHz Channel spacing narrowband Mode Variable kHz Receiver sensitivity wideband MODE 102 dBm 152 34 kbit sec Receiver sensitivity wideband MODE 104 dBm 38 4 kbit sec Receiver sensitivity wideband MODE 107 dBm 9 6 kbit sec Receiver sensitivity narrowband 106 dBm 38 4 kbit sec MODE Receiver sensitivity narrowband 107 dBm 9 6 kbit sec MODE Input IP3 40 dBm Flo 1MHz and Flo 1 945MHz Input Impedance 50 Ohms No matching required LO Leakage 65 dBm 50 ohm termination at ANT Adjacent channel rejection 48 dBc Fc 650kHz dBc IF Bandwidth wideband Mode 600 KHz IF Bandwidth narrowband Mode 200 KHz Table 14 AC Specifications Rx Wi 232wideband Preliminary Preliminary 2003 2004 Radiotronix Inc 25 Preliminary 10 2 2 AC Specifications TX Parameter Min Typ Max Units Notes Transmit Frequency EUR 868 225 869 885 MHz Center
3. Wi 232EUR User s Manual European 868 870MHz Band Version Rev 1 5 0 preliminary readiotronix Embedding the wireless future 207 Industrial Blvd Moore OK 73170 405 794 7730 Preliminary 2003 2004 Radiotronix Inc all rights reserved 1 Document Control Created By Tom Marks 12 15 04 Engineering Review Marketing Review Approved Engineering Approved Marketing Revision Author Description 12 9 2003 Document Created Preliminar 3 12 2005 Document modified to match initial release Channel tables changed substantially to match regulatory requirements ji Preliminary 2 Introduction 2 1 Module Overview TRANSMITTER amp P ON N ANTENNA SWITCH vco q oS y RECEIVER BASEBAND DSP CONTROL DATA PROTOCOL CONTROLLER LEGEND HARDWARE IN WISE SOFTWARE IN WISE SERIAL INTERFACE 1 O INTERFACE Figure 1 Wi 232EUR Block Diagram 2 2 Features Wi 232 APPLICATION WISE MAC WiSE PACKET HAL e True UART to antenna solution e 8modes allow user to optimize e 16 bit CRC error checking power range e 152 34kbit sec maximum RF data rate e Command mode for volatile and non e 2channels in Wideband mode volatile configuration e 6channels in Narrowband mode e 48 bit unique MAC address e Small
4. Figure 12 Command Conversion Code 9 3 Writing To Registers Writing to a volatile register is nearly instantaneous Writing to a non volatile register however takes typically 16 ms Because the packet size can vary based on the need for encoding there are two possible packet structures The following tables show the byte sequences for writing a register in each case WARNING Be sure that the module is properly powered and remains powered for the duration of the register write Loss of important configuration information could occur if the unit loses power during a non volatile write cycle Byte 0 Byte 1 Byte 2 Byte 3 Header Size Register Value 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 OxFF 0x02 0 Register 0 Value Table 9 Write Register Command value to be written is less than 128 0x80 Wi 232wideband 2003 2004 Radiotronix Inc 23 Preliminary Preliminary Preliminary Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Header Size Register Escape Value 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 a Lower 7 bits OxFF 0x03 D Register OxFE ON oi Value Table 10 Write Register Command value to be written is greater than or equal to 128 0x80 The module will respond to this command with an ACK 0x06 If an ACK i
5. cccccccceseeeseeeeeeeceeeeeaaeseeeeeceaeeseaaesdeneeseeeesaeeeeaaeenanees 17 Table 8y Register SUMM aly alas enti tel aa bled Alanna ed 21 Table 9 Write Register Command value to be written is less than 128 0x80 n 23 Table 10 Write Register Command value to be written is greater than or equal to 128 0x80 24 Table 11 Read Register Commande 24 Table 12 Read Register Module Response For A Valid Hegtsier AA 24 Table 13 Absolute Maximum Hatings 25 Table 14 AC Specifications Hn tnnt tn annt rannetta nnan rnanan nnmnnn nEn 25 Table 15 AC Specifications In 26 RETTEN Kee e EE 26 Table 17 Flash Specifications Non Volatile Registers 0 cccceesceeeeeeeceeeeeeeeeeeeeeseaeeeeaeeeenees 27 Wi 232wideband 2003 2004 Radiotronix Inc 4 Preliminary Preliminary Preliminary 6 Theory of Operation 6 1 General The Wi 232 module is one of a family of WiSE Wireless Serial Engine modules A WiSE module combines a state of the art wideband FSK data transceiver and a high performance protocol controller to create a complete embedded wireless communications link in a tiny IC style package Wireless Serial Engine ViSE TRANSMITTER EEN ANTENNA SVITCH COMBINER voo BASEBANO DSP PROTOCOL CONTROLLER RECEIVER LEGEND HARDWARE IN WISE CUSTOMER APPLICATION OPTIONAL SOFTWARE IN VASE WISE PROTOCOL CUSTOMER SUPPLIED SOFTWARE Figure 2 WiSE Block Diagram The Wi 232EUR module has a UAR
6. Ground 13 Antenna port 50 ohm 14 Ground 15 Ground 16 Ground 17 Ground 18 Ground 19 VCC 2 7 to 3 6 VDC Table 1 Module Pin Descriptions Legend Signals that are used in this implementation Signals not used in this implementation do not connect Signals used for in system programming Wi 232wideband 2003 2004 Radiotronix Inc 10 Preliminary Preliminary Preliminary 7 3 Mechanical Drawings j 0 93in 2 Lin Lt LU o E o 3 53 Hom p U 46in ooo al 3 keng 0 07in 0 54in z CH mmm im g gn 9 SC a A a gt hy Si a Sg e mag He D af a t 1 Wp D d r ll IM lt An Figure 8 Module Mechanical Drawings Wi 232wideband 2003 2004 Radiotronix Inc 11 Preliminary Preliminary Preliminary Copyright 2003 4 All rights reserved ALL DIMENSIONS IN MILS Wi 232DTS 730 170 Radiotronix Inc 260 me titi i fe 770 Figure 9 Wi 232EUR Wi 232DTS Suggested Footprint Wi 232wideband 2003 2004 Radiotronix Inc Preliminary Preliminary 12 Preliminary 7 4 Example Circuit UE EEN D MODI WI232DTS E 6 GND GND Z bd z zZ 5 x C CH CA T47U6 01 CAPO803 4 TUF ZZ FS el GND GND GND Li o o o o o o oe 10 JO jlo J Figure 10 Evaluation Module Circuit 7 5 Power Supply Although the Wi 232EUR module is very easy to use
7. care must be given to the design of the power supply circuit It is important for the power supply to be free of digital noise generated by other parts of the application circuit such as the RS 232 converter Figure 4 shows the schematic for our evaluation module circuit for the Wi 232EUR module It includes an on board power supply and antenna connector This evaluation circuit was used to measure the performance of the Wi 232EUR module and should be used as a reference for Wi 232EUR based designs If noise is a problem it can usually be eliminated by using a dedicated LDO regulator for the module and or by separating the grounds for the module and the other circuits 7 6 UART Interface The UART interface is very simple it is comprised of four CMOS compatible digital lines Wi 232wideband 2003 2004 Radiotronix Inc 13 Preliminary Preliminary Preliminary Direction Description CTS Out Clear to send this pin indicates to the host micro when it is ok to send data When CTS is high the host micro should stop sending data to the module until CTS returns to the low state CMD In Command the host micro will bring this pin low to put the module in command mode Command mode is used to set and read the internal registers that control the operation of the module When CMD is high the module will transparently transfer data to and from other modules on the same channel NOTE If this pin is low when the module comes out
8. in narrowband mode Wi 232wideband 2003 2004 Radiotronix Inc 15 Preliminary Preliminary Preliminary Wideband Channels Channel Number Frequency 0 868 300 MHz 1 868 95 MHz Narrowband Channels Channel Number Frequency 0 868 225 MHz 1 868 375 MHz 2 868 850 MHz 3 869 050 MHz 4 869 525 MHz 5 869 850 MHz Table 3 Channel Table Transmit and receive channels are set in reg7TXCHAN addr 0x4B and regRXCHAN addr Ox4C respectively All modules in a network must be in the same mode narrowband or wideband and must have the same transmit and receive channels programmed in order to communicate properly 8 2 Power Mode The transmission and reception modes of the module are determined by the settings of the regPWRMODE register It is important to note that a module configured to operate in narrowband mode cannot hear another module transmitting in wideband mode or vice versa However a module configured to operate in any of the four wideband modes can hear any other module transmitting in any of the wideband modes provided that they are within range of one another regNVPWRMODE 0x02 regPWRMODE 0x4D R W R W R W R W R W R W R W R W NA NA NA NA NA PM2 PMI PMO 7 6 5 4 3 2 1 0 Narrowband Mode 2dBm power setting typical Wideband Mode 2dBm power setting typical Wideband Mode 13dBm power setting typical
9. 6 5 4 3 2 1 0 This register determines the UART buffer level that will trigger the transmission of a packet The minimum value is 1 and the maximum value is 128 The default value for this register is 64 which provides a good mix of throughput and latency 8 9 Verbose mode regNVSHOWVER 0x0A regSHOWVER 0x55 R W HAN HAN HAN R W R W R W R W B7 B6 B5 B4 B3 B2 B1 BO 7 6 5 4 3 2 1 0 Setting this register to 0x00 will suppress the start up message including firmware version that is sent to the UART when the module is reset A value of 0x01 will cause the message to be displayed after reset By default the module start up message will be displayed 8 10 CSMA enable regNVCSMAMODE 0x0B regCSMAMODE 0x56 R W HAN HAN HAN HAN HAN HAN R W B7 B6 B5 B4 B3 B2 B1 BO 7 6 5 4 3 2 1 0 Carrier sense multiple access CSMA is a best effort delivery system that listens to the channel before transmitting a message If another Wi 232 module is already transmitting when a message is queued the module will wait before sending its payload This helps to eliminate RF message corruption at the expense of additional latency Setting this register to 0x01 will enable CSMA Setting this register to 0x00 will disable CSMA By default CSMA is enabled 8 11 Sleep control regNVSLPMODE 0x0D regSLPMODE 0x58 R W HAN R W R W R W R W R W R W B7 B6 B5 B4
10. B3 B2 B1 BO 7 6 5 4 3 2 1 0 Setting this register to 0x01 will place the module into sleep mode 0x02 will place the module in standby mode Sleep mode places the module in the lowest power inactive state 100uA and requires approximately 7 8ms to resume transmission or reception once awakened Standby draws 850uA and requires approximately 1 2ms to awaken To wake up the module send four OxFF bytes to the UART in a row or perform a hard reset If four OxFF bytes are used to wake the module the fifth character sent to the UART will be transmitted over the RF link Upon Wi 232wideband Preliminary 2003 2004 Radiotronix Inc 19 Preliminary Preliminary awakening the module will clear the volatile register to 0x00 The default value for this register is 0x00 awake 8 12 MAC Address regOUl2 regOUIO 0x22 0x24 N A R R R R R R R R D7 D6 D5 D4 D3 D Di DO 7 6 5 4 3 2 1 0 regMAC2 regMACO 0x25 0x27 N A R W R W R W R W R W R W R W R W RES D6 D5 D4 D3 D2 D1 DO 7 6 5 4 3 2 1 0 These registers make a unique 48 bit MAC address These values are factory preset and cannot be altered These address bytes are not used by the module They are provided for customer applications as a unique address 20 Wi 232wideband 2003 2004 Radiotronix Inc Preliminary Preliminary Preliminary 8 13 Register Summary Volatile Read Write Registers
11. es eh Le ee ee 10 7 3 Mechanical Drawing uean ernia ie i aa A n EANES aE i SL AAE NA 11 Z Example CHE ege EEN ENEE EE 13 7203 Ge Oe e ET 13 1 6 UART Interateneo ark Ie Aha aA ieee 13 tae AMONN EE 14 7 8 Link budget transmit power and range performance c cceeeeeeeeeeeneeteeeeeeeaeeeeeeeees 14 8 Module Configuration cccsecceseceseeeeesneeeneeeeeeeeeescaeseseeeenseeeseaesesaaesaseeeeeseeeescaesaaeeeenseeeeeas 15 8 1 Charnel Settings stan accede getest EE eebe ed tlt eene MAG Sc 15 Sde Eeauer MOG veces cn series i E Sr e Deet edeshsenhdeh iscideuPantee deus reehneaaeteesianteeegeai rs 16 8 21 Wideband Modes nienti gett det eet din tie ie delhi ake 16 8 2 2 Narrowband Mode decke adil de han ade 17 8 3 UART Data Rates tinct Bieser e hdais gen ian tien Eech Ee 17 8 4 Network Modes sta ects tides cesdeshe dtr deeg EE geseet ech epes tea fing 18 8 5 Transmit Wait TimeOOutireccsesndcecscccceeheentdenviscidevivantteedacqcdes T E Dedede getrei 18 8 6 NetWork GrP dek deene ee ERER ENEE SEAN AER 18 8 7 eet TEE edie ha E teat el aed oi 18 8 8 UART minimum transmission unt 19 8 9 Verbose Mode x atest dee act rte ieee Mite teat aie laine icine 19 8 10 GSMA enable 0 dees eet dg deed 19 BCL Sleep Controleert steed tetas AE e EREN ris eaten deed eeepc a 19 8 12 MAG ele EE 20 8 13 Register Gummar ceccceecceceecceeeseeeeaceeeeececaeeseaaessaaaesaeeseaaeseaaaesaaeeea
12. from the UART the module begin transmitting the data in the buffer Normally this timeout value should be greater than 0x01 and greater than one byte time at the current UART data rate If the timeout value is set to 0x00 the transmit wait timeout will not operate and a full buffer will be required for transmission When setup this way the data will be sent only when a full MTU has been received through the UART The default setting for this register is 0x10 16ms delay 8 6 Network Group regNVNETGRP 0x06 regNETGRP 0x51 R W HAN R W R W R W R W R W R W N A B6 B5 B4 B3 B2 B1 BO 7 6 5 4 3 2 1 0 Modules can be grouped into networks Although only modules with the group ID will be able to talk to each other modules in different groups but on the same channel will still coordinate transmissions through the CDMA mechanism Valid values for this register are 0 to 127 The default group setting is 0 8 7 CRC Control regNVUSECRC 0x08 regUSECRC 0x53 R W HAN HAN HAN HAN HAN HAN HAN B7 B6 B5 B4 B3 B2 B1 BO 7 6 5 4 3 2 1 0 Wi 232wideband Preliminary 2003 2004 Radiotronix Inc Preliminary Preliminary Set to 0x01 to enable CRC mode or 0x00 to disable CRC mode The default CRC mode setting is enabled 8 8 UART minimum transmission unit regNVUARTMTU 0x09 reguUARTMTU 0x54 R W R W R W R W R W R W R W R W B7 B6 B5 B4 B3 B2 Bi BO 7
13. of reset the registers will be reset to their factory programmed defaults It is important to ensure that CMD is held high during power up under normal conditions RXD In Receive data input TXD Out Transmit data output Table 2 Wi 232EUR UART Interface Lines 7 7 Antenna The module is designed to work with any 50 ohm antenna including PCB trace antennas We are often asked What is the best antenna to use with your module Actually the selection of an antenna is based on a particular application not the module used As a rule a wave whip antenna with a good solid ground plane is the best choice However many embedded applications cannot support an externally mounted antenna If this is the case a PCB antenna must be used The designer can either use an off of the shelf PCB antenna such as the Splatch from Linx Technologies or design a trace antenna There are several good antenna tutorials and references on the Internet and we encourage the designer to use these resources Note Antenna design is difficult and can be impossible without the proper test equipment As such we strongly encourage all of our customers to use off of the shelf antennas whenever possible 7 8 Link budget transmit power and range performance A link budget is the best figure of merit for comparing wireless solutions and determining how they will perform in the field In general the solution with the best link budget wil
14. postfixes the data with a 16 bit CRC The 16 bit CRC error checking can be disabled to allow the application to do its own error checking Data is encoded using a proprietary algorithm DirectSPREAD to spread the RF energy equally within the transmission bandwidth Wi 232wideband 2003 2004 Radiotronix Inc 6 Preliminary Preliminary Preliminary Modules can operate in groups Each module can be assigned a 7 bit group ID which is used to logically link it to other modules on the same channel All modules on a channel will interoperate regardless of their respective group Ids In other words the CSMA mechanism will prevent collisions of modules on the same channel but belonging to different groups Modules can also operate in two network modes Master Slave and Peer to Peer These modes define a set of communication rules that identifies which modules can talk to any given module In Master Slave mode masters can talk to slaves and other masters slaves can talk to masters but slaves cannot talk to other slaves This mode is sometimes required for applications that are replacing legacy RS 485 networks In peer to peer mode any module can hear any other module In both modes group integrity is enforced When a module transmits a packet all other modules on the same channel will receive the packet check the packet for errors and determine whether the received group ID matches the local group ID If the packet is error free and the gro
15. registers allow the designer to optimize performance of the module for fixed length and variable length data The module will support streaming data as well To optimize the module for streaming data regUARTMTU should be set to 144 and regTXTO should be set to a value equal to 1 byte time at the current UART data rate If the buffer is full or the timer set by regTXTO expires and the module is in the process of sending the previous packet over the RF link the module will assert CTS high indicating that the host should not send any more data Data sent by the host while CTS is high will be lost When the MAC layer has a packet to send it will use a carrier sense multiple access CSMA protocol to determine if another module is already transmitting If another module is transmitting the module will receive that data before attempting to transmit its data again If during this process the UART receive buffer gets full the CTS line will go high to prevent the host UART from over running the receive buffer The CSMA mechanism introduces a variable delay to the transmission channel This delay is the sum of a random period and a weighted period that is dependent on the number of times that the module has tried and failed to acquire the channel For applications that guarantee that only one module will be transmitting at any given time the CSMA mechanism can be turned off to avoid this delay The MAC layer prefixes the data with a packet header and
16. size 8 x 935 08 e 5volt tolerant I O e Low power standby and sleep modes e Under 20 in production quantities e PHY and MAC layer protocol built in e 915MHz U S version available e CSMA medium access control e 115dB link budget in Wideband mode 2 3 Applications e Direct RS 232 422 485 wire e _Industrial Home Automation replacement requires external RS 232 e RFID to 3V CMOS conversion circuitry e Wireless Sensors e Asset Tracking e Remote Data Logging e Automated Meter Reading Wi 232wideband 2003 2004 Radiotronix Inc 2 Preliminary Preliminary Preliminary 3 Table of Contents 1 Document Control ege ENEE EES AEN 2 2 Ipttog UEHOt ees 2 2 1 Module Ovenlew 0 cece cceccceeteeceeeee cee eeeaaeeeeaaeeaeee seas eeeaaesaaaeesaeeecaaeseegeeeseaeeesaeseeaaeeteneeea 2 Se Ee r sde aula ee EE Reeder ie ed 2 2 3 siAPPIICAtONS EE 2 3 Table of Contents in ege 3 4 Table Of Flore iera aT N NEA ONAE EO AA R 4 5 index of TableS srseeiriisiinririenreinadnnedn ne inneinni dane dana enned u neira e anran anaana annia neinna aiaiai 4 6 Theory Of Operation tee EENS 5 bits e EE 5 6 2 Operating States EE 8 6 3 Resetting Module to Factory Defaults eseeseeseeeieeeinssiresrrssinssirssrnssrnnsrnnsrnnsrnnsrnnnnnnne 9 7 Application Information ccceecceceeeeeeeeeeeeeeeeeeeeseeenneeseseeneeeeseeneeeeseeeeeseseeneeeseseeneeenseenenes 10 fale SIE UL Diagram EE 10 Te Pin DESGCriPtlOn 2 204 ee tin Re
17. T type serial interface and contains special application software to create a transparent UART to antenna wireless solution capable of direct wire replacement in most embedded RS 232 422 485 applications NOTE Although the module is capable of supporting the typical serial communications required by RS 232 RS 422 and RS 485 networks it is not compatible with the electrical interfaces for these types of networks The module has CMOS inputs and outputs and would require an appropriate converter for the particular type of network it is connected to Wi 232wideband 2003 2004 Radiotronix Inc 5 Preliminary Preliminary Preliminary Figure 3 Wi 232EUR Networking Concept The module is designed to interface directly to a host UART Three signals are used to transfer data between the module and the host UART TXD RXD and CTS TXD is the data output from the module RXD is the data input to the module CTS is an output that indicates the status of the module s data interface If CTS is low the module is ready to accept data If CTS is high the module is busy and the host UART should not send any further data Internally the module has a 192 byte buffer for incoming characters from the host UART The module can be programmed to automatically transmit when the buffer reaches a programmed limit set by regUARTMTU The module can also be programmed to transmit based on a delay between characters set by regTXTO set in 1mSec increments These
18. Wi 282EUR Block Diagram esris ninaa a EAE TATER OEA EATER 2 Figure 2 WISE Block Diagram 5 Figure 3 Wi 232EUR Networking Concept 6 Figure 4 RX State Machine A 8 Fig re 5 TX State Machine iz 1 deccaeni etic avanti deceived aiara idana dd daii iava 9 Figure 7 elt e Ee CT 10 Figure 8 Module Mechanical Drawings ssssssseessiesrresirssrssrrssirssiinssrnnsrnnsrnssrnssrnssrnnsrensrnnsnnnt 11 Figure 9 Wi 232EUR Wi 232DTS Suggested Footprint cccccceeececeeeeeeeeeeeeeeseeeeesenaeeseeeesees 12 Figure 10 Evaluation Module Circuit seseeseeeeeeresiresrrssiresrrsssrnssinssinssrrnsrnssrnnsrnnsrnsnrnnsrnnnnnnt 13 Figure 11 Command and CMD Pin Timing esseseseeeesresrssrresrssirssrissrrsssrrssrnssrnssrnssrrssrnssrnnsrnnt 22 Figure 12 Command Conversion Code 23 5 Index of Tables Table 1 Module Pin DeSCriptions eeeeeceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeaaeeeseeaaeeeeeeaaeeeseeseneeeeenenaeees 10 Table 2 Wi 282EUR UART Interface Lines ccceeeceeeeeeeeteeeeeaeeeeeeeseeeeeeeaaeeseneeseeeesaeeseaaeeeenees 14 Table 3 Channel Tablets ich eked heel ee nih DEE ee Eed GEET 16 Table 4 Power Mode Register Settings c ccccceceeseeceeeeeeeneeeeaeeeeeeeecaeeesaaeeneaeeseeeesiaeeseaeenenees 16 Table 5 Wideband Mode Parameters cccccccceeeceeseeceeeeeceeeeeaaeeeeneeecaeeesaaeseeaeeseeeesaeeseaeenenees 17 Table 6 narrowband Mode Parameters AA 17 Table 7 Data Rate Register Settings
19. Wideband Mode 2dBm power setting typical Narrowband Mode 2dBm power setting typical Narrowband Mode 7dBm power setting typical 1 1 Narrowband Mode 13dBm power setting typical able 4 Power Mode Register Settings P P 0 0 0 1 1 0 Wideband Mode 7dBm power setting typical 1 1 0 0 0 1 1 0 0 0 0 0 1 1 1 1 T 8 2 1 Wideband Mode In wideband mode the module is configured as follows Wi 232wideband 2003 2004 Radiotronix Inc 16 Preliminary Preliminary Preliminary wideband Mode Parameters TX Power 2 2 7 13 dBm Deviation 150kHz TX Current 32 to 59mA RX Current 20mA RX Bandwidth 600kHz Table 5 Wideband Mode Parameters 8 2 2 Narrowband Mode In low power mode the module is configured as follows narrowband Mode Parameters TX Power 2 2 7 13 dBm Deviation 75kHz TX Current 26 to 59mA RX Current 16 to 24mA RX Bandwidth 200kHz Table 6 narrowband Mode Parameters 8 3 UART Data Rate regNVDATARATE 0x03 regDATARATE 0x4E R W HAN R W R W R W R W R W R W RES RES RES RES RES BR2 BR1 BRO 7 6 5 4 3 2 1 0 By default the UART data rate is set to 2 4 kbit second at the factory This data rate can be changed by setting the regDATARATE register Valid settings are Baud Ra
20. aeseeaaeseeaaeneaas 21 9 Using Configuration Register csssccscccesscesseeseseeeeneeeeeseeeeseaesesneeeeeeeeseneseseaeeneeeeeseas 21 Qos GMD Passi ees E can east tana teats fu ph ce cevas te den tapeen tectaas S 21 9 2 Command Formatting 0 cccceesceceeceeceee cess eeeeeeseeeeeeaaeeeeeeeseeeeesaaeseeaaeseeeeeseaeeeeaeeneneeees 22 9 3 Writing To ROISTO S noriai era a EE T E e ee a E 23 9 4 Reading From Registers ccccscccceseecceceseeeceeeseeeceeeesneeeeeeseeeceeeseeeeeeeseeneeeessenseeesnanees 24 10 Electrical Specifications ccccccescceseeeeeeeeeeeeeeeseeeeseeeenseeeeeeeeesnaesaseeeeeseeesenesseneeeenseeeeenees 25 10 1 Absolute Maximum Hatmngs AA 25 10 2 Detailed Electrical Specifications ccccecececeeeeeeeeeeeeeeeeeeeeeceaeeeeeaaeseeeeeeneeesnaeeseeeeeaes 25 10 2 1 AC Specifications HX 25 10 2 2 AC Specifications TN 26 10 2 3 Ree e le NEE 26 10 3 Flash Specifications Non Volatile Registers 0 ccccceccceeseeeeseeeeeeneeseeeeesecaeeeeaeeeeaes 27 11 CUSTOM Applications cccecccscteseteeeeteeeeseeeeeeeeeseaeseseeeenseeeeeeeesaeseseeeenseeeeseaesaseeeenseeeeeaees 28 12 Ordering Information cccsecceseceeeteeeeneeeneeeeeeeeeencaeseseeeenseeeesseeesaesaseeeeneeeeeseaeseneaeenseeeeeaees 28 kt DE eu Cl TE 28 EC Nk e lte Ee 28 E Sales e ee 28 Wi 232wideband 2003 2004 Radiotronix Inc 3 Preliminary Preliminary Preliminary 4 Table of Figures Figure 1
21. ally chosen because higher output powers are allowed from a transmitter employing these techniques To calculate the link budget for a wireless link simply add the transmit power the antenna gains and the receiver sensitivity LB Ptx Gtxa SENSrx Grxa For example the link budget for a pair of Wi 232 modules in wideband mode at the maximum data rate and using 3dBi whips antennas would be 11dBm 3dB 100dBm 3dB 117dB A link budget of 117dB should easily yield a range of 1 4 mile or more outdoors If the environment is open and the antennas are 8 to 10 feet off of the ground the range could be a mile Indoors this link budget should yield a range of several hundred feet This is a well balanced link budget More than 10cB of the budget is achieved through transmit power which will allow good performance indoors in the presence of multi path while keeping the overall operating current low making the module suitable for primary battery powered applications such as RFID and automated meter reading 8 Module Configuration 8 1 Channel settings regNVTXCHAN 0x00 reg SCHAN 0x4B R W R W R W R W R W R W R W R W RES D6 D5 D4 D3 D2 D1 DO 7 6 5 4 3 2 1 0 regNVRXCHAN 0x01 regRXCHAN 0x4C R W R W R W R W R W R W R W R W RES D6 D5 D4 D3 D2 D1 DO 7 6 5 4 3 2 1 0 The Wi 232EUR supports 2 channels 0 1 in wideband mode and 6 channels 0 5
22. and mode allows these registers to be programmed Byte values in excess of 127 0x80 or greater must be changed into a two byte escape sequence of the format OxFE value 128 For example the value 0x83 becomes OxFE 0x03 The following function will prepend a OxFF header and size specifier to a command sequence and create escape sequences as needed It is assumed that src is populated with either the register number to read one byte pass 1 into src_len or the register number and value to write two bytes pass 2 into src_len It is also assumed that the dest buffer has enough space for the two header characters plus the encoded command and the null terminator Wi 232wideband 2003 2004 Radiotronix Inc 22 Preliminary Preliminary Preliminary int EscapeString char src char ero Len char dest The following function copies and encodes the first src_len characters from src into dest This encoding is necessary for Wi 232 command formats The resulting string is null terminated The size of this string is the function return value char src_idx dest idx Save space for the command header and size bytes for src_idx 0 src_idx lt src_len src_idx if srce src_idx gt 127 dest dest idx OxFE it dest dest _idx srce src_idx amp Ox7F for Add null terminator dest 0 OxFF dest 1 dest idx 2 Return escape string size ze return dest idx
23. e is continuously listening for incoming data If the module detects a pre amble and valid start code it will enter the RX_HEADER state D ERT SE e IDLE MODE gt ax TIMEOUT lt GT RX HEADER Figure 4 RX State Machine If the module is in the IDLE state and a byte is received by the UART it will enter the TX_WAIT state Wi 232wideband 2003 2004 Radiotronix Inc 8 Preliminary Preliminary Preliminary ae HEAD Fe Le SS Ba a Figure 5 TX State Machine 6 3 Resetting Module to Factory Defaults It may be necessary to reset the non volatile registers to their factory defaults To reset the module to factory defaults hold the command line low and cycle power to the module The command line must remain low for a minimum of 600ms after the resetting the module Once the command line is released the module will be operating at factory defaults Wi 232wideband 2003 2004 Radiotronix Inc 9 Preliminary Preliminary Preliminary 7 Application Information 7 1 Pin out Diagram Figure 7 Pin out diagram 7 2 Pin Description Ground No connect reserved No connect reserved UART receive input UART transmit output 1 2 3 4 Command input active low 5 6 7 UART clear to send output active low 8 No connect reserved 9 No connect reserved 10 Reserved ISP pin 11 1 Active low Reset Reserved ISP pin 12
24. ed Wi 232wideband 2003 2004 Radiotronix Inc 7 Preliminary Preliminary Preliminary Note When in sleep mode the module will not be able to receive data from other modules Any data sent to the module while it is in sleep mode will be lost If the current draw in sleep mode is too high for a particular application the designer can switch power to the module through a FET to turn off the module when it is not needed If this technique is used the volatile registers will reset to the values in their non volatile mirrors so any changes from the default will have to be reloaded The Wi 232EUR is a very flexible module because of all of the configurable parameters it supports However modules that are not configured in the same way will not be able to communicate reliably causing poor performance or outright failure of the wireless link All modules in a network must have the same mode configuration to ensure interoperability Every Wi 232 module has read only internal registers that contain factory programmed information that includes calibration data and a 48 bit MAC address that can be used by the host application for higher level connection oriented protocols This MAC address can be read through the command interface 6 2 Operating States The primary active state is the IDLE state When the module is not actively transmitting or receiving data it is in this state While in this state the receiver is enabled and the modul
25. er Summary 9 Using Configuration Registers 9 1 CMD Pin The CMD pin is used to inform the module where incoming UART information should be routed When the CMD pin is high or left floating all incoming UART information is treated as payload data and transferred over the wireless interface If the CMD pin is low the incoming UART data is routed to the command parser for processing Since the module s processor looks at UART data one byte at a time the CMD line must be held low for the entire duration of the command plus a 20us margin for processing Leaving the CMD pin low for additional time for example until the ACK byte is received by your application will not adversely affect the module If RF Wi 232wideband 2003 2004 Radiotronix Inc 21 Preliminary Preliminary Preliminary packets are received while the CMD line is active they are still processed and presented to the module s UART for transmission CMD HA AT 20p5 RxD 5 __ i Command Header xF F A o o DIXDA AT Figure 11 Command and CMD Pin Timing 9 2 Command Formatting The Wi 232EUR module contains several volatile and non volatile registers that control its configuration and operation The volatile registers all have a non volatile mirror register that is used to determine the default configuration when power is applied to the module During normal operation the volatile registers are used to control the module Placing the module in the comm
26. frequency error 2 3 ppm 869 05 MHz 25 C Frequency Deviation wideband 150 kHz Mode Frequency Deviation narrowband 75 kHz Mode Maximum Output Power 13 15 dBm 869 05 MHz narrowband Mode Into 50 ohm load Maximum Output Power 13 15 dBm 869 05 MHz wideband Mode Into 50 ohm load Output Impedance 50 Ohms Carrier phase noise TBD dBc Into 50 ohm load Harmonic Output 50 dBc Into 50 ohm load Table 15 AC Specifications Tx 10 2 3 DC Specifications Parameter Min Typ Max Unit Notes s Operating Temperature 20 70 C Supply voltage 2 7 3 0 3 6 VDC Operating limits Receive current consumption 16 24 mA Continuous operation Vdd 3 3VDC depends on data rate selected Transmit current consumption Output into 50 ohm load 2 dBm 24 32 mA Vdd 3 3VDC depends 2 dBm 28 36 mA on data rate selected 7 dBm 35 43 mA 13 dBm 50 58 mA Standby current consumption 850 pA Vdd 3 3VDC Sleep current consumption Vdd 3 3VDC Vih Logic high level input 0 7 Vcc 5 2 VDC Vil Logic low level input 0 0 3 Vcc VDC Voh Logic high level output 2 5 Vcc VDC Vol Logic low level output 0 A VDC Table 16 DC Specifications Wi 232wideband 2003 2004 Radiotronix Inc 26 Preliminary Preliminary Preliminary 10 3 Flash Specifications Non Volatile Registers Parameter Min Typ Max Units Notes Flash Write Duration 16 21 m
27. l bandwidth is set to 600kHz and the transmit power is set to 13dBm In this mode the module can operate on 32 channels and support a maximum RF data rate of 152 34kbit second The receiver sensitivity at the max data rate is 102dBm typical yielding a link budget of 115dB This mode is an excellent alternative to frequency hopping spread spectrum It has very fast synchronization allowing it to operate in a duty cycle mode for extended battery life In narrowband mode the modules channel bandwidth is set to 200kHz and the transmit power is set to 2dBm In this mode the module can operate on 6 channels and support a maximum data rate of 19 2 kbit second The receiver sensitivity at the maximum data rate is 108 typical yielding a link budget of 106dB This mode reduces transmit current consumption allowing use with batteries than cannot supply the pulse currents required for wideband mode The range in this mode will be a little more than half of the range in wideband mode The module can be placed into sleep mode through the command mode In sleep mode the RF section is completely shutdown and the protocol processor is in an idle state Once the module has been placed in the sleep mode it can be awaken by either cycling power which will loose all volatile settings or by sending a power up sequence through the serial port The power up sequence is 0x00 OxFF OxFF OxFF sent back to back at the data rate for which the module is configur
28. l deliver the best line of sight range performance Improving the link budget by increasing the receiver sensitivity will result in lower power consumption while improving the link budget by increasing the transmit power will result in more robust performance in the presence of an on channel interferer or multi path interference Wireless Fact You will never reduce the performance of a wireless link by increasing the sensitivity It has been proposed that less sensitive receivers will perform better in a noisy environment That simply is not true It is the equivalent of saying that someone who is hard of hearing can hear better in a noisy room than in a quiet room The real solution is to make the talker speak louder to get over the noise in the room The same is true for a wireless link In real world noisy environments increased output power is generally the best way to improve range performance Wireless Fact Frequency hopping spread spectrum does not effectively combat multipath in the 868 870 MHz band It does combat in channel interference but at the expense of bandwidth Wi 232wideband 2003 2004 Radiotronix Inc 14 Preliminary Preliminary Preliminary power consumption and latency Direct sequence spread spectrum like FHSS does not combat multipath It does do a better job than FHSS at combating in channel interference but at the expensive of occupied bandwidth and power consumption These spread spectrum techniques are gener
29. ndle them more efficiently that phone support requests For customers that would prefer to talk directly to a support engineer we do offer phone support free of charge All support requests are placed in a queue and returned in the order that they are received 13 2 Sales Support Our sales department can be reached via e mail at sales radiotronix com or by phone at 405 794 7730 Our sales department is available Mon Fri between 8 30 am and 5 00 pm You may also contact our distributors for pre sales support Future Electronics at http www future active com or Mouser Electronics at http www mouser com radiotronix Wi 232wideband 2003 2004 Radiotronix Inc 28 Preliminary Preliminary Preliminary
30. s Module stalled during write operation Flash Write Cycles 20k 100k Cycles Table 17 Flash Specifications Non Volatile Registers Wi 232wideband 2003 2004 Radiotronix Inc 27 Preliminary Preliminary Preliminary 11 Custom Applications For cost sensitive applications such as wireless sensors and AMR Radiotronix can embed the application software directly into the microcontroller built into the module For more information on this service please contact Radiotronix 12 Ordering Information Wi 232EUR modules can be ordered on line 24 7 from our distributors Future Electronics at http www future active com or Mouser Electronics at http www mouser com radiotronix 13 Contact Us 13 1 Technical Support Radiotronix has built a solid technical support infrastructure so that you can get answers to your questions when you need them Our primary technical support tools are the support forum and knowledge base found on our website We are continuously updating these tools To find the latest information about these technical support tools please visit http www radiotronix com support Our technical support engineers are available Mon Fri between 9 30 am and 4 30 pm central standard time The best way to reach a technical support engineer is to send an email by visiting the Support page at http www radiotronix com support E mail support requests are given priority because we can ha
31. s not received the command should be resent If a write is attempted to a read only or invalid register the module will respond with a NAK 0x15 9 4 Reading From Registers A register read command is constructed by placing an escape character before the register number The following table shows the byte sequence for reading a register Byte 0 Byte 1 Byte 2 Byte 3 Header Size Escape Register 716 5 4 3 2 1 0 7 6 5 4 3 2 1 017 6 5 4 3 2 1 0 7 6 5 14 3 2 1410 OxFF 0x02 OxFE D Register Table 11 Read Register Command The module will respond to this command by sending an ACK 0x06 followed by the register number and register value The register value is sent unmodified For example if the register value is 0x83 0x83 is returned after the ACK 0x06 See table below for the format of the response If the register number is invalid it will respond with a NACK 0x15 Byte 0 Byte 1 Byte 2 ACK Register Value 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 0x06 D Register Value Table 12 Read Register Module Response For A Valid Register Wi 232wideband 2003 2004 Radiotronix Inc 24 Preliminary Preliminary Preliminary 10 Electrical Specifications 10 1 Absolute Maximum Ratings
32. te BR2 B zech CH 2400 9600 19200 38400 57600 115200 10400 R 0 0 0 0 1 1 1 o o o jo y 31250 1 Table 7 Data Rate Register Settings TROUBLESHOOTING HINT Baud Rate Problems f you lose track of the baud rate setting of the module it will be impossible to program the module You can either try every possible baud rate to discover the setting or force a power on reset with CMD held low to set the baud rate to its default 2 4kbit second Wi 232wideband Preliminary 2003 2004 Radiotronix Inc Preliminary Preliminary 8 4 Network Mode regNVNETMODE 0x04 regNETMODE 0x4F R W R W R W R W R W R W R W R W D7 D6 D5 D4 D3 D2 D1 DO 7 6 5 4 3 2 1 0 The module supports two networking modes Normal and Slave In normal mode the module can talk to any other module In slave mode the module can talk to normal mode modules but cannot transmit to or receive from other slaves Slave mode is selected by writing 0x00 to this register The default network mode is 0x01 Normal Mode 8 5 Transmit Wait Timeout regNVTXTO 0x05 regTXTO 0x50 R W R W R W R W R W R W R W a a EE When a byte is received by the UART the module will start a timer that will countdown every millisecond The timer is restarted when each byte is received If the timer reaches zero before the next byte is received
33. up Ids match the module will decrypt the data if necessary and send the error free data to its host UART for processing The modules only implement the ISO reference network stack up to the MAC layer so they are transparent to link layer addressing schemes Therefore the modules can work with any link layer and higher protocols in existing today Certain features of the module are controlled through programmable registers Registers are access by bringing CMD low When CMD is low all data transfers from the host UART are considered to be register access commands When CMD is high all data transfers from the host UART are considered to be raw data that needs to be transparently transmitted across the wireless link The module maintains two copies of each register one in flash and one in RAM On reset the module loads the RAM registers from the values in the flash registers The module is operated out of the RAM registers Applications that need to change parameters of the module often would simply modify the RAM register By putting default settings in the flash registers the module will always come up in a preconfigured state which is useful for applications that do not have external microcontrollers such as RS 232 adapters The UART interface is capable of operating in full duplex at baud rates from 2 4 to 115 2 kbps The module has 10 power modes 4 wideband modes 4 narrowband modes standby and sleep In wideband mode the modules channe

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