Line-&Y-Line Resident Assemhler For "SC/MP" Development System
Contents
1. x 60 50 40 30 28 10 0 ee eee i o 18 20 33 4 0 52 69 t 7 a 3 18 20 38 4 53 60 t 4 torr CL 0081 Programming Tidbit When using the PACE or IMP 16 you may use a version of the following assembly instruction to load an ASCII character into one of the Accumulators LI 9 256 an ASCII instruction will result in object code that will result in an ASCII 9 or X 39 to be loaded left justified in ACO when executed SM PL TIMER PROGRAM by Bob Edwards LECO Corporation 616 983 5531 This isaSM PL program that works with a 1200 baud CRT This program prints the time from 0 to 99 hrs 59 mins and 2 59 secs It was developed using an IMP 16P with 16K and the IMP 16 Disc system TIMEP PROGRAM FOR UF TO 99HRS 59MIN 59SEC DECLAFE As Bs Cs Ds Es Fs I WORDS DECLARE AAs ABs ACs ADs AEs AF WORD DECLARE SP LITERALLY 217 DECLARE CR LITERALLY DH DECLARE LF LITERALLY OAH PUTC ASMPROCC 1s 7ES9H ST DO 128 TO 253 10 CALL PUTCCLF 11 END ST 12 FL DO F TO 9 13 AF F 36H OQ OOM aA MN 14 EL2. 11 the Bro Buda Dear Georgia recently noticed that you are providing a list of micro processor consultants for your readers in each issue of COMPUTE Newsletter Please consider our corporation as a possible addition to that list Texas Microsystems Inc is a Houston Texas based consulting firm started several years ago In November of 1976 left National to open the West Coast Office of TMI TMI has the capability to provide complete microcomputer system design and development including hardware and software design We can handle the client s entire needs from evaluation and specification to system prototype and debug Our experience ranges from IMP 16 PACE and SC MP systems to systems involving the 8080A 8085 and 8048 as well as other microprocessors Before November 1976 spent three years as a microprocessor systems design engineer with National working on such projects as the PACE 16 P interface card PACE application cards PACE LCDS and custom SCMP microcomputer sys tems am currently a member of COMPUTE Thanks for considering Texas Microsystems Inc Sincerely TEXAS MICROSYSTEMS INC GARY A MILLER Regional Director West Coast Office 1530 The Alameda Suite 200 San Jose CA 95126 408 292 4004 Sir My SC MP based microcomputer is up and running I built it for under 100 with 1K of RAM 2102 s yet On page 5 3 of the technical description read of a user group and imagine you have
3. 4 Partners The NCU can extend processing power of a general purpose microprocessor by taking instructions and data from the processor s bus and executing the instructions at its own pace Flow chart shows software for microprocessor control of interface except that digit output data is supplied on the data output DO lines and the read write line is pulsed to write each digit into the RAM After putting out 3 to 12 digits the 57109 enters a fetch cycle to obtain the next instruction Extending a processor Software overhead can be staggering for micropro cessor applications requiring mathematical functions or BCD operations Sophisticated subroutines must be written for multiply divide square root log exponen tial and trigonometric functions The data must be scaled to fix the decimal point position and to assure there will be no register overflow as a result of an operation Further conversion is necessary if the result is to be given in floating point or scientific notation However the Number Cruncher provides a micropro cessor with a convenient peripheral unit for performing these specialized calculations The microprocessor controls the NCU simply by supplying it with valid instructions directly or through a buffer memory Over lapping execution in the two devices gives much greater throughput than when the microprocessor performs the calculations itself A straightforward processor NCU interface can be built with a p
4. DO E TO 93 15 A E E 38H3 16 DL DO D TO 53 17 AD D 30H 18 CL DO C G TO 93 19 AC C 30H 20 BL DO B TO 5 21 AB B 30H3 22 AL DO A TO 93 23 AA A 3011 24 CALL TIME 65C0 25 SL DO I TO 303 26 CALL PUTC SP 27 END SL 28 CALL PUTCCAF 7 29 CALL PUTCCAE 7 39 CALL PUTCC SP 31 CALL PUTC SP 32 CALL PUTCC AD 33 CALL PUTCCAC 3 34 CALL PUTC SP 35 CALL PUTC SP 36 CALL PUTCCAB 37 CALL PUTCCAA 38 CALL PUTC CR 7 39 CALL PUTCCLF 3 A0 END AL 41 END BL 42 END CLs 43 END DL 44 END EL 45 END FL 46 EOF ST SM PL A High Level Language For IMP 16 A few words on the SM PL Compiler for IMP 16 e SM PL Smart or Simple Programming Language is a high level language compiler for the IMP 16 only e Tocompile aSM PL program and accommodate the compiler 16K of R W memory is necessary e It is not a supported product and is only available through the Microprocessor Users Group at a cost of 100 00 e The 100 00 price tag includes the source listing SM PL Programming Manual and the object machine language tape e Ordering SM PL is done by sending a check or Purchase Order to Compute 208 National Semi conductor 2900 Semiconductor Dr Santa Clara Ca 95051 see the library order form on page 15 e The August 1976 issue of the COMPUTE Vol 2 8 newsletter contains a description of the language features COMPUTE Newsletter Vol 3 No 6 O NF NA
5. F1 P3 PRINT L VECTOR F1 H VECTOR F1 1 P1 F1 F1 1 H DATEND FETCH P1 Fi L DIATENC FETCH 61 L MCOATA Fi 1 F1 1 F2 L VECTOR F1 H VECTOR F1 1 F 1 F1 1 FZ FOINT RSTCYL MINAS OVER L MSFAGCE 1 H MSPACE Fi F PRINT RSTCYL MINONE FOINT SPACE 1 F7Z 1 FZ Fz 1 FZ F3 1 F2 1 F1 ENT EXIT l PUT 1 FS OBTAIN C1 F2 PS 1 FZ 1 Pz 1 F2 LF CR EOT LF CR EQT DATA FETCH i AND TEST ROUTINE DATA TO EXT MESSAGE FRINT ROUTINE INDEXED EY POINTER 1 i CALL IN iL CC DO S MONITOR iTO OUTPLT CHARACTER OR OPTIONS 191 192 174 195 197 198 199 Z00 203 0109 0108 010D O10F 0111 0113 0115 0117 0119 011P 0110 O11F 0121 01223 0125 0127 0129 012E 0120 012F 0121 0133 01325 0137 01239 0311 0130 01 3F 0141 0142 0145 0147 0149 0146 0140 014E O14F 0150 0151 0152 0153 0154 0155 O01 4 0157 0158 0159 O1 TA 015R 01D O01 DF 0141 0143 O14 0147 0149 016B 0140 OL4F 0171 0172 0175 0174 0178 017A 017 017E 0120 0182 0184 0184 0188 OIZA 0180 O18E O18F 0190 0191 01923 0195 0197 01990 0 019F 0 01AZ 01A4 01AG 01A8 O1AA O1AC O1AE 010 02 0164 O1R4 O1BS O1BA 01BC O1BE 0 0 0 02 0104 2
6. troller and bus driver circuits that generate all needed read write ER control signals provide drive and Ra isolation for the 8080 bidirec eS a tional data bus and a user selected single level interrupt vector DP8304 is an 8 bit bidirectional bus transceiver with high active outputs to both ports a Tri State chip enable control and transmit receive control e 8251 is a universal communi cations interface USART for data communication in 8080A and other bus structured systems e DP8216 8226 are I O buffer drivers 4 bit parallel trans ceivers suited to both 8080A and general MPU applications COMPUTE Newsletter Vol 3 No 6 Line By Line Resident Assembler For SC MP MPU Enhances Development System National is now offering a line by line resident assembler firmware kit designed for use with its SC MP LCDS Low Cost Development System Known as SUPAK the 300 assembler is contained in eight PROM ROM devices that can be plugged into a blank ROM PROM card ISP 8B 004B which is available from National The entire assembled card is then inserted into the LCDS teletype system SUPAK is the only firmware kit of its kind It greatly enhances the flexibility and capability of the SC MP LCDS making it both the most inexpensive and effective SC MP development tool SUPAK is a 4K byte package that con sists of three programs a line by line asse
7. An AIN instruction suspends the Number Cruncher until the microprocessor requests a calculation At that time the processor sets the asynchronous data ready ADR to 0 and supplies a 4 bit starting address code The ncu decodes the starting address branches to that address in the ROM and executes the calculation routine there As in the FIFO setup an interrupt notifies the microprocessor when the 57109 has completed its task In this setup the microprocessor does not have to load FIRST IN FIRST OUT BUFFER MEMORY INSTRUCTION 57109 NUMBER CRUNCHER NUMBER CRUNCHER QUT ee yl INSTRUCTIONS READ RDY CLOCK WRITE 0 WRITE CLOCK DIGIT OUTPUT DATA OUTPUT 5 FIFO interface A microprocessor can control the Number Cruncher through first in first out memories The microprocessor enters data and instructions into the instruction FIFO and the Number Cruncher extracts them asynchronously 10 COMPUTE Newsletter Vol 3 No 6 PROM INSTRUCTION STORE PROGRAM BITS P EOC 3 BCD CHIP SELECT ANALOG QUAD DIGITAL 3 1 DIGIT aaa CONVERTER mers MULTIPLEXER ee DIGIT OUT A CLOCK A gt SELECT A3 8 INPUT 3 A4 ANALOG Ac MUX A LATCHED N CHANNEL SELECT Ag INSTRUCTION FORMAT OUT instruction AIN instruction Select analog channel Analog to digital input RAM I O IN OUT instructions for first word Second word Po 3 are high order RAM addre
8. chosen device s instruction set and unique input output transfer characteristics Then they have had to sweat out the development of complex software to perform the desired mathematical operations or algorithms A few hardy designers have put up with these chores in order to gain the benefits of large scale integrated technology but even they would prefer a special purpose microprocessor designed specifically for complex cal culations A new microprocessor the 57109 or Number Crunching Unit does this The NCU presently being built with p channel metal Al Weissberger is now with Signetics Corp Sunnyvale Calif 1 Digit handler Major functional blocks of the Number Cruncher are the control logic and arithmetic units and the program storage ROM which holds about 1 500 8 bit microinstruction words The device handles OSCILLATOR 4 bit binary coded decimal digits directly They enter the control logic block through 9 3 the lines and the results go out through SYNCHRO the digit data out block The digit address NIZATION counter block sequences each digit during input output operations Programmed in INITIAL structions 6 bits long enter through the POR g g 6 lines and are converted to sequences of RESET microinstructions JUMP CONDITION Ig Vss i Voo gt oxide semiconductor technology can serve in machine process controllers navigation systems and meas
9. i THEN RUIN i THIS PROGRAM WILL RUN WITTHIN AN COS CONTAINING 2K BYTES OF RAM ISP 80 002 gt DATA FOR PLOTTING IS FETCHED FROM LOCATION i MDATA UPWARDS AND LOOPS AROUND AT LOCATION i DATENG F1 1 F Z F3 3 VECTOR X O7FO COUNT X O7FF ZERO EUT 4 STACK X O7FR PUTT X 7AEZ CR OL LF _ OA ES Xog MINONE 1 MINTEN 10 MINGS 65 3F ZO EEL X07 RSTCYL X7 3F X 0001 BEGIN LEI L STALE Fz LEI H STACK F2 LEI l VECTOR Fi LET H VECTOR LOT H MDATA ST 1 F1 LEI L MDATA ST F1 LOT L MIAXIS LOY H MIAXIS XF AH Fi JZ Pia PRINT LOI L MCRLF XFAL Fi LOI H MCRL F XFAH Fi JS Fs FRINT CLEAR LOI L COUNT XPAL Fi LOI H COUNT XFAH Fil LCI ZERO ST F1 LDI L MCURSR XFAL Fi LDI H MCLIRSR XPAH Fi _IMP PRICY NOISAX INZ CLEAR LOY H MAXIS XPAH Fi LOI L MAXIS XFAL 1 IMF FRICYC OVER LOI L MOVER XFAL Fi LOI H MOVER XFAH F1 JMF PRIRET POINT LOY L MPOINT XPAL Fi LEI H MPOINT XFAH P1 PRIRET JS F2 PRINT RETURN LDI H COUNT XFAH Fi LOJ L CONT XFAL Fi ILD F1 ST F1 ADI MINTEN JF NOSAX LDI H MSAXIS XFAH F1 LDI L MSAXIS COMPUTE Newsletter Vol 3 No 6 97 98 100 101 102 103 104 105 104 107 108 109 110 111 112 113 114 115 116 117 118 11 120 123 122 123 124 125 124 127 128 129 130 131 132 123 134 135 1
10. information to share about using this CPU chip Please add me to the club My particular interest is circuits showing how to expand my unit to TV keyboard and cassette Any help at all is OK and let me know how can aid you too Sincerely Bob Weir 318 N 7th Canon City CO 81212 12 Dear COMPUTE The next time you list microprocessor consultants please add us to your list We are presently working with several of the popular 8 bit processors as well as with IMP Thank you Ron Tipton President TDL Electronics Route 7 Fayetteville Arkansas 72701 501 643 2191 Done Dear Ms Marszalek Since wrote you last week about the problems with the SC MP Cassette system discovered a potential problem with the software in the SC MP keyboard kit SKMPKB It contains a re executable subroutine KYBD at location 0185 which can be used by other software for display and keyboard input It should be pointed out to users of this subroutine that the Carry Link CY L flag must be reset cleared CCL instruction prior to calling KYBD If CY L is set the number returned in the E register will be incorrect for keyboard keys 8 thru F Is it possible to obtain a corrected copy of the SC MP Key board Kit Schematic Diagram Drawing NS10634 which is in the Keyboard Kit User s Manual The one in my manual contains a large number of errors The SC MP Cassette continues to work well zero errors after many 1k byte r
11. will accept a single digit when a data ready signal indicates valid data Error detection is facilitated by an error flag set by an arithmetic or output error The TERR instruction tests the flag or can clear the external program counter resulting in a hardware jump to memory location 0 the error recovery location In either case an ECLR instruction must be executed to clear the error flag The basic setup The basic Number Cruncher system in Fig 3 includes a programmable ROM for instructions an external program counter and a RAM for memory expansion To fetch an instruction from the PROM the NCU raises its ready line after it has executed the previous instruction This signal is used as a clock to advance the program counter The PROM then accepts the new 8 bit address supplied by the PC executes a read cycle and supplies the instruction to the NCU To facilitate entry of asynch ronous instructions the 57109 does not lower RDY and begin execution until its HOLD input is low When the incoming instruction is a test and skip the chip activates RDY to advance the PC and obtain the next word on the PROM output lines This word is actually a branch address If the branch condition is true the NCU s branch signal gates this address back to the program counter by parallel loading it on the leading edge of the next RDY signal When the Pc is loaded the PROM outputs will be the contents of the instruction at the branch addr
12. 0 0231 0232 0232232 0234 0235 0234 0237 0238 0239 023 023E 003 0230 023E 2530 2020 2020 2020 2020 3430 on 20 20 20 20 04 2020 202D 2620 281 2020 27020 2020 2020 2020 27028 2D2N 2D2D 20210 2D2N 2020D 200 2020 220 2020 2020 2020D 202D 20210 2020 2020 2D2D 200 2020 2 0 2 20 200 2020 281 2020 202 OD 20 20 Z020 26 OD 20 20 20 20 04 0000 0001 002F OO7B OOF 1 0191 022F FFFF 0103 0041 0001 OOS3 0059 OO3F O7FC 60 BYTE CR SP SF SP SF ENT MCURSR ASCII ASCII ASCII 747 ASCII 7 ASCII ASCII i ASCII BYTE CR SF SP SP SP EOT MSAXIS ASCII BYTE CR SF SP SP SF EOT i SINE WAVE Z Z NI N i TEST PATTERN FOR PLOTTER PROGRAM MDATA BYTE 30 38 44 42 50 48 44 38 BYTE 30 22 14 12 10 12 14 22 DATEND EQ TO PGM CNTR END BEL 0007 BS 0008 COUNT O7FF CR OOOD DATEND EAT 0004 FETCH OO9D LF OOOA MCRLF 0100 MCURSR 01D8 MIAXIS 0154 MINGS FFEF MINTEN FFF MOVER 0107 MSAXIS 0224 MSPACE OOFE ABTAIN OVER DOAR P2 0002 F3 0003 PRICYC 0074 PRINT PUTE 7 2 RETURN 0040 SF 000 SFACF VECTOR O7FD ZERO 0000 CAIE COMPUTE Newsletter Vol 3 No 6 NEW CE BOOK A new booklet describing electronic components designed for use in citizen s band radio manufacture is now available from
13. 021 2020 20270 2D20 200 2020 202m 2021 2070 2020 2020 208 2020 20210 20210 2021 2020 200 2 2021 27021 20270 200 205 414C 39545 2004F S5445 52 5241 4E47 4520 200 203E 07 07 op OA 07 07 04 00 OA OA 07 07 OA OA 2020 2020 475Z 4150 42270 SO4C 4F S4 5445 5220 4652 4F 40 2057 4140 20 4170 4A45 524D 594E 270565 5449 40 49 S459 2050 5 24F 4752 4140 OA on OA 2020 2020 3020 ZOZO 2020 2020 201 320 20020 Z020 2020 2020 22730 2020 2020 2020 2020 2330 2020 2020 2020 2020 3420 2020 2020 2020 2020 MIAXIS MAXI SCT BYTE BYTE ASCII BYTE ASCII ee ee ee n l am VALUIE OVER RANGE gt EEL BEL CR LF BEL REL EOT CR LF LF BEL BEL LF LF GRAFH FLOTTER FROM RAM A JERMYN UTILITY PROGRAM LF CR LF g 0 10 j 70 207 7 40 7 507 203 204 207 209 210 pb NO ERROR LINES SOURCE CHECKSLIM DICE DICES DICA 01CC O1CE 0100 01D2 000102 01p4 o1ins 0o1D4 01D7 0 0 O1DA OIDE O01 DE O1E0 01E2 01E4 0 O1E8 O1EA OLEC O1FE O1FO O1F2 O1F4 O1F4 O1F8 O1FA QO1FC O1FE 0200 0202 0204 0204 0208 020A 020C OZOE 0210 0212 0214 0214 0218 021A 0 021E 0021F 0220 0221 0222 0223 0224 0224 0228 0229 022 A 022E O22C 022D 022E 0022F 023
14. 34 137 138 139 140 141 142 140 1463 144 145 144 167 148 149 170 171 172 173 174 175 174 177 178 179 180 181 182 183 184 125 184 187 188 189 190 0073 0074 OO7 4 0078 007A 007B 0070 007E 0060 0081 ODRZ 00 4 DORG 0087 OORE 0 OORA OORC OORE NOBF 0090 0091 0092 0093 0095 0097 OOYY OOYA OOS 90 0 OO9F OOA1 OOAS OOA4 OOAS OOA7 OOAS QOAA OOAB OQALI OOAF 00B1 OOB2 OOB3 OOBS 00 07 OORS QOBB OOBD DOBE OOTO 3 00 OOCR 3 5 00 OOCT7 OOCR 000 OOCE OOCC OOCD OOCF 00001 0 2 0 00 5 0OOD7 OODE OODA lt OODB OODD 3 OODE OOEO OOEZ OOE 3 OOES OOE4 ONDER DOEA OEC OOED OOEE 3 OOEF OOF 1 OOF 3 OOF 4 OOF 4 OOF 7 OOF OOFA OOFC OOFD 3 OOFE OOFF 0100 0101 0102 01023 0104 0105 0106 0107 31 C400 3704 0322 CAFD 1 7407 a5 C501 0i 7100 21 40 25 40 E402 SCOF 21 Di 40 21 40 E43F CO C402 25 C42F 31 reo CEFF C4FD 31 01 C407 a cpo1 01 4O00 CEO1 QAZ O04 2020 PRICY CYCLE FETCH SPACE PRINT 0 0 EXIT MSPACE MCRLF MPOINT MOVER ZZA ANI CAS LIE ADI d 7 IMF XAE ST CSA XFAH XPAL ST LD XAE DY XRE AZ LDI 1 XFAH LDE X PRPC IMF LE XFAL L XF AH LO CAS LD XAE 66 BYTE BYTE ASCII BYTE ASCII
15. 40 Line charges to the customer will be from the originating country to Stamford Conn All TELEX users should type LTRS NCSS after the connect light illuminates Any prob lem during login should be reported to NCSS at 203 327 9100 extension 381 NATIONAL CSS INC 542 Westport Avenue Norwalk Connecticut 06851 203 853 7200 13 UNDERGROUND BUYING GUIDE TELLS ELECTRONIC HOBBYISTS WHERE TO GET IT A new directory has just been published that helps amateurs CBers experimenters and computer hobbyists locate equip ment parts supplies and services Over 600 sources of standard and hard to find gear are listed in the handy guide Many of the 600 sources are mail order firms and discounters All are firms that do business with electronic hobbyists The Underground Buying Guide 7 h CHEFS The Underground Buying Guide is available direct mail from for Hams PMS Publishing 12625 Lido Way Saratoga CA 95070 The price is 5 95 plus 55 postage and handling Californians add 39 sales tax and Computer Hobbyists For further information contact Dennis A King PMS Publishing 12625 Lido Way Saratoga CA 95070 408 996 0471 Expenmenters MICROPROCESSOR USER S GROUP The following programs are available from the COMPUTE User SLO042A SM PL Group Library Copies can be ordered from COMPUTE 208 IMP 16 National Semiconductor 2900 Semiconductor Drive Santa Clara Ca 95051 These pro
16. AST SIG EXPONENT POINT NIFICANT _ NIFICANT BIT 4 SIGN OF MANTISSA POSITION MANTISSA MANTISSA 3 lt N lt 10 ONE TO EIGHT MANTISSA DIGITS SCIENTIFIC NOTATION 1 2 MOST SIG LEAST SIG 8 T 1 SIGN OF NIFICANT NIFICANT EXPONENT BIT 4 SIGN OF EXPONENT EXPONENT MANTISSA 5 lt N lt 12 ONE TO EIGHT MANTISSA DIGITS 2 Two formats The NCU can operate on data in floating point or scientific notation formats with one to eight mantissa digits depending on the setting of the digit count It takes only one instruction to input or output a string of digits BRANCH 256 BY 8 BIT PROM ADDRESS DATA COUNTER 5203 1702 256 BY 4 BIT RAM 4 740157 QUAD 2 1 MULTI PLEXER SELECT 7 7 QUAD 2 1 MUX INPUTS OUTPUTS 3 Stand alone The Number Cruncher can be used by itself in many control applications Here a programmable ROM stores instructions controlled by an external program counter and a 256 by 4 bit RAM extends the internal memory Multiplexers enter data or instructions memory register can store constants or temporary results or can serve as a loop counter for data transfer or program control Additional data storage may be provided by external 256 word by 4 bit random access memories The two data formats are shown in Fig 2 No reformatting is necessary when data is extracted from the 57109 or reentered from an external RAM An asynchronous digit input AIN instruction
17. COMBUME the Club Of Microprocessor Programmers Users and Technical Experts Georgia Marszalek Editor e David Graves Editor e Doug Hall Hardware Consultant Sponsored by National Semiconductor Corp Santa Clara CA 95051 Vol 3 No 6 June 1977 SUPPORT CIRCUITS FASTER 8BO8ORA S ADDED Less than one year ago we entered the 8080A marketplace with our INS8080A a pin for pin function for function replacement for you know who s MPU But that was only the start Since then we ve added two more versions of that microprocessor as well as a complete family of sup port circuits The new versions of our original 2 us cycle time INS8080A are the INS8080A 1 which has a 1 3 us cycle time and the INS8080A 2 with a 1 5 us cycle time In addition to the faster 8080A s we now offer ten types of interface circuits to support 8080A system design e DP 8212 is a 8 bit I O port that you can use to imple ment all major peripheral and MPU system functions e 8255 is a programmable peripheral I O interface that features direct bit set reset capability e DP8301 is a microprocessor interface latch element MILE with on chip status flags for handshake control and interrupt generation It drives TTL NMOS PMOS and CMOS circuitry e DP8224 is acrystal controlled clock generator and driver which also provides a status strobe and oscillator outputs for external circuits e DP8228 8238 are system con
18. IN instruction waits for the end of convert signal before reading one of the three digits through the 3 1 digital multiplexer The second and third AIN instruc tions read the second and third BCD digits with the results stored internally COMPUTE Newsletter Vol 3 No 6 The PROM program updates the analog address and tests to see if all analog channels have been interrogated If so the program will output the digitized data to the RAM or will process the data as required If not all analog channels have been interrogated the PROM program scans the next one This system uses internal NCU storage for simulta neous calculations on four three digit numbers Addi tional storage is provided by the 256 by 4 RAM so that the 57109 can operate on an array of data Addressing the data in the RAM is facilitated by the IN and OUT instructions The first instruction word is either IN or OUT and the second supplies a 5 bit address to select one of 32 numbers in the RAM This address is stable on the instruction input lines I and is valid throughout the data transfer cycle The Number Cruncher generates a 4 bit address DA to select a digit each time it is ready to input or output 4 bit data For an OUT instruction digit data is output on DO and clocked into the RAM by the R W strobe For an IN instruction the high level on R W Causes the RAM to go into a read cycle and supply digit data to the NCU through the quad 2 1 multiplexers J
19. National The products described in the booklet include synthesizer systems 5 pin audio amplifiers microprocessor controlled tuning systems linear IC s light emitting diodes LED s clock modules RF output discretes and regulators Titled National Semiconductor Personal Communications CB Radio the booklet is available without charge from National Semiconductor Corp 2900 Semiconductor Drive Santa Clara Calif 95051 How To Build A Digital Thermometer Analog electronic thermometers have been available for some time but they are generally difficult to read and besides are relatively fragile Digital thermometers on the other hand are both easy to read and rugged 1 A RA08 470N NETWORKS 2 MATCH TEMPCO 3 ALL DIODES ARE 1N914 4 TIE THE A AND 0 GROUNDS TOGETHER AT ONE POINT ONLY 12V IN OUT Vcc 5V LM340T 5 0 GND hee vec 15y 100k 10T M SENSOR ORANGE Re E 100 uF 0 R3 GREEN BLU 220 19 5 H T uF 8 100k 68 uA 2 COMPUTE Newsletter Vol 3 No 6 ADD2500 SENSE RESISTOR Besides a 5 V input the ADD2500 draws 18 mA from a negative supply This comes from the dc dc converter at 15 V as a regulated current via the 2N5457 FET the LED and the 2N3904 The negative supply of the ADD2500 is internally Zener regulated it together with the two diodes and the resistor string between ground and lpg establish a low drift offset voltage for the LM134 s sense re
20. R 100 00 for SM PL and DLR 15 00 for NIBL Please make sure the programs you select are for the microprocessor you have Notes 1 There is no charge for program listings but the number of listings per order is limited to three 3 2 NA indicates not available NAME Fill out the form completely make your check payable to COMPUTE and mail to TITLE UNITED STATES AUSTRALIA COMPUTE 208 National Semiconductor GmBH NS Electronics Pty Ltd COMPANY National Semiconductor 808 Fuerstenfeldbruck Cnr Stud Road amp Mtn Highway ADDRESS 2900 Semiconductor Drive Industriestrasse 10 Bayswater Victoria 3153 Santa Clara CA 95051 Tel 08141 1371 Tel 03 729 6333 CITY 408 247 7924 Telex 05 27649 Telex 32096 COMPUTE Newsletter Vol 3 No 6 15 BULK RATE U S POSTAGE PAID PERMIT NO 317 SUNNYVALE CALIF CALL FOR PAPERS IECI 78 CONFERENCE INDUSTRIAL APPLICATIONS OF MICROPROCESSORS SHERATON HOTEL e Philadelphia Pennsylvania e MARCH 20 22 1978 Papers on the Following Subjects are Invited Intelligent Test Instrumentation Transducers Textile Manufacturing Food Processing Petroleum Refining Geophysics Metal Fabrication Power Generation Education The State of the Art in Microprocessor Standards Industrial Uses of Microprocessors Microprocessor System Hardware Architecture Microprocessor Software and Standardization Microprocessor in Thyristor Controls Computerized Data Acquisition Systems Programma
21. WN N NN N Y N ano NN No ANN D0 WWD DH fH FO Se 1 N A Wh 92 26 0000 0001 000 DOHA OONA ODOC 00 10 00 001 1 0013 0015 0017 OO 1 DOLA 001 E 0010 OO1F 0021 O02 2 00274 0025 0027 0 2 DOZA 0 002E OO2F 0031 00 34 00 34 0035 0037 0039 OO3B AXO HC 003E OO3F 0041 004 0001 OOO 0003 O7FTI O7FF 0000 0004 O7FC 7 2 DONLI OOOA 0008 FFFF FFFA FFEF 0020 0007 OO SF 04 C 2 C407 6 CAFE 21 407 23 C4027 CHO C4ZF C700 C454 21 Z401 400 74 D323 SF C400 31 C401 5 400 27104 D233 sF C4FF 21 C407 35 C400 ON 002 31 C401 25 2023 LEL C401 004S 3 0044 0048 0049 004B 0040 OO4E OOSO 0051 0053 00 0034 C4971 33 9029 C407 31 7401 35 FOOL 7403 31 C401 OLSE 3 0059 OOSB COSD OOF 00460 0042 002 0065 004646 00468 DOLA 7 00 00 0070 0071 25 2400 3704 0333 2F 7407 C4FF 21 A 00 L900 FAFA 7403 C402 a5 424 TITLE PLOT SC MP PLOTTER FROM RAM i LIBRARY PROGRAM SLON47A THIS PROGRAM FETCHES DATA STORED IN RAM gt AND DISPLAYS THE CONTENT IN GRAPHICAL FORM ON THE TELETYPE CCINSOLE gt AFTER LOADING SET THE TARGET PROGRAM COUNTER TO HEX 0001 INITIALISE AND
22. accept a sequence of binary coded decimal digits with a single input instruction an asynchronous digit input or single bit inputs for control purposes In contrast microprocessors work only on data bytes Unlike calculators the Number Cruncher is con trolled by a program stored in an external read only memory and can perform conditional and unconditional program branches As in processors a HOLD input allows handling asynchronous instructions and single stepping while test and branch instructions facilitate decision making within programs The NCU s major functional blocks Fig 1 are the control logic and arithmetic units and the program storage ROM which holds about 1 500 8 bit microin struction words Programmed instructions 6 bits long enter through the I lines and are converted to sequences of microinstructions Binary coded decimal 4 bit data words enter the control logic block through the I lines Output data passes through the digit data out block while the digit address counter block sequences each digit during operations Logic levels are compatible with low power logic families and the device has on chip generation of input output strobes and timing signals Examples of the 6 bit operation codes are given in Table 2 If 8 bit instruction memories are used external hardware can use the additional 2 bits for device addresses Instruction executions vary in time from 1 to 500 milliseconds although m
23. ailable FORTRAN cross assembler with modified mnemonics Reference BYTE May 1976 Simplifying Your Home made Assembler by Greg Jewell Cross assembler written in BASIC for PDP 8E with disc operating system Listing only available Contributed by R Gitzel University of Alberta Edmonton Canada COMPUTE Newsletter Vol 3 No 6 USERS LIBRARY ORDER FORM NUMBER SOURCE PAPER PROGRAM OF TAPES TOTAL NUMBER NAME PROGRAM UNIT COST LISTINGS IMP PROGRAMS SLOO1A SLOO2A SLOO3A SLOO4A SLOO5A SLOO6A 006 SLOO8A SLO10A SLO11A SLO12B SLO13A SLO14A SLO16A SLO17A SLO19A SLO20A SLO21A SLO23A BINBCD MEMORY DUMP GALPAT RAMDUMP TAPE TITLER GRAY CODE PRTPLT TSTPLT MESGH CHARST CONTAP DISC RLM PROMSFT B SLO24A DISC RLM PROMSFT C SLO26A SLO28A SLO30A SLO31A SLO38A SLO40A SLO42A SLO44A TABTAP SORT TITLER DORG TAPE 8080 X SM PL DECIM8 PACE PROGRAMS SLO15A SLO18A SLO22A SLO25A SLO26A SLO29A SLO32A SLO33A SLO35A SLO36A SLO37A PACRAM CALCULATOR NUMPRG PALM TABTAP BINBCD DIVIDE DELSEM PRNTLM BASCII JITTER SC MP PROGRAMS SLO27B SLO39A SLO41A 50 SLO47A SC MP MATH TAPEI O SCSORT NIBL PLOT NOVA PROGRAMS SLO34A PACE X PDP 15 PROGRAMS SLO45A PACE X PDP 8 PROGRAMS SLO46A Price includes the manual program listing and paper tape load module SC MP X tAvailable from the Melbourne Training Centre in Australia for DL
24. air of latches Fig 4 one for instructions and input data the other for output data The processor suspends the NCU s operation through the latter s HOLD signal When the microprocessor is ready it loads the COMPUTE Newsletter Vol 3 No 6 instruction latch with a 6 bit instruction code and sets HOLD low The Number Cruncher executes the 6 bit code The microprocessor senses succeeding RDY signals from the 57109 as an interrupt or jump condition input and then loads the latch with the next instruction It supplies input data to the Number Cruncher on a digit by digit basis in the same manner as it does 6 bit instructions When the NCU has data to send back it uses a 4 bit latch The microprocessor reads and stores this data as it is loaded into the latch Using a FIFO In another method for extending a microprocessor system with the Number Cruncher a first in first out buffer memory is a dynamic instruction store Fig 5 The microprocessor loads the FIFO and the NCU draws instructions from it Another FIFO is used for output data from the 57109 Since these memories are totally asynchronous with separate input and output controls the processor and the Number Cruncher can run at full speed in parallel for maximum system throughput This setup is useful in applications where the sequence of instructions executed by the NCU may change Since the FIFO is a dynamic memory it permits easy alteration of the sequence Be
25. ble Controllers MSI and LSI in Process Control Automotive Diagnosis and Operation Vehicle Control Automatic Inspection PAPER REQUIREMENTS Ten copies of the paper in summary form no longer than 600 words and an abstract of no more than 60 words describing work not generally published or previously presented The copies should be mailed by August 25 1977 to H W MERGLER Leonard Case Professor of Electrical Engineering CASE WESTERN RESERVE UNIVERSITY CLEVELAND OHIO 44106 216 368 4574 The paper summary will be used for paper selection and session assignment and thus shouid clearly define the salient concepts and NOVEL features of the work described Notification of acceptance and format required for publication in the IECI 77 Proceedings will be sent to you by Sep tember 25 1977 Final manuscripts of papers accepted for publication in the IECI proceedings must be received by November 25 1977 UNITED STATES GERMANY AUSTRALIA COMPUTE 208 National Semiconductor Corp Gmbh NS Electronics Pty Ltd National Semiconductor 808 Fuerstenfeldbruck Cnr Stud Road amp Mtn Highway 2900 Semiconductor Dr Industriestrasse 10 Bayswater Victoria 3153 Santa Clara CA 95051 Tel 08141 1371 Tel 03 729 6333 Tel 408 247 7924 Telex 05 27649 Telex 32096 TWX 910 338 0537 16 COMPUTE Newsletter Vol 3 No 6
26. cause instructions are stored only until the 57109 removes them it is possible to load a very large sequence in a very small space When the microprocessor has a job for the NCU it 9 loads a linear sequence of instructions no branches into the instruction FIFO which was initially cleared Once loading has been completed the processor is free to process data or control devices The FIFO can be used as the storage medium for many different instruction sequences with only minimum microprocessor software required for loading The FIFO stacks the instruction words in the same order as they are entered and makes them available at the output in the same sequence The processor treats instructions to the 57109 as output data as if they were to be written into a RAM or loaded into a register But it selects the FIFO as an 1 O device by putting that memory s address on its address bus Next it puts the NCU instruction data on the data bus followed by a write strobe which the FIFO uses as an input data clock This sequence is repeated each time a word is loaded into the FIFO Before transmitting each instruction word the processor checks the FIFO s status indicator flag If the FIFO is full the microprocessor waits until it is ready before resuming data transfer While the processor is loading data into the FIFO the NCU is fetching instructions from the FIFO output ports at its own speed executing them one by one An output indicat
27. eads and writes Sincerely Ronald G Parsons 9001 Laurel Grove Drive Austin Texas 78758 Drawing NS10634 is replaced by NS10586 shown on page 13 this issue in revision B of SC MP Keyboard Kit User s Manual Dear Georgia have built a Homebrew SC MP with 1K of 1702A 1K of 2102LI ASCII Keyboard and selectric printing unit I ve implemented the hold and continue control lines and have a full front panel LED display of addresses data read or write and all flags and status indicators need some programming hints on subroutine linkage etc Thanks Olin R Boyer P O Box 3000 Tulsa OK 74102 See the SC MP Programming and Assembler Manual Chap 6 for some programming details Also the SC MP Applications Handbook has many programming examples COMPUTE Newsletter Vol 3 No 6 SC MP KIT SC MP INTROKIT 20 OM74L86N x RESPECTIVELY SC MP KEYBOARD KIT REPAIR POLICY Kits may be returned to the Microcomputer Service Center for repair on a consignment basis only NO DEBIT MEMO S The customer should return the kit not the distributor The follow ing information MUST be supplied or kit will be returned 1 Name of customer contact 2 Telephone number of contact 3 Data purchased 4 Purchased from 5 Symptom of problem Upon receipt of the unit in the service center the technician will determine if the kit will be repaired under warranty or if the customer is respo
28. ess If the branch condition is not true RDY is raised to step the PC so that it will point to the next sequential instruction at the time of the next instruction fetch The instruction select signal ISEL selects which type of input will be used instructions or data The 2 1 multiplexers supply the Number Cruncher with data signals or instructions on the six input lines This multi plexing saves pins so that the NCU can fit into a 28 pin package For a data input instruction IN the Number Crun cher again raises RDY to advance the Pc to the next instruction word which contains a 4 bit high order RAM address The NCU supplies a 4 bit low order digit address to the RAM from the digit address DA lines and reads the RAM digit data on its input lines having set ISEL low to select data instead of instructions On a single IN instruc tion 3 to 12 digits are input The OUT instruction procedure is similar to that for IN COMPUTE Newsletter Vol 3 No 6 HOLD FLAG WRITE DATA SIGNAL lt BUS STEM DATA BUS PROCESSOR SYSTEM DATA BU CONTROL ADDRESS wosevectaus 4 4p SUSPEND NCU AFTER HOLO 1 INSTRUCTION IS EXECUTED READY PERFORM TO TRANSFER ON OTHER INSTRUCTION PROCESSING YES YES OUTPUT INSTRUCTION TO 6 BIT LATCH HOLO 0 READY 0 HEX IN LATCH OUT INSTRUCTIONS QUAD LATCH DIGIT DATA 4 OUT TRI IN STATE CLOCK CHIP SELECT CHIP SELECT
29. grams are versions of assemblers interpreters or compilers available for IMP PACE and SC MP Included in this list is also a listing of modifications for the NOVA assembler that will allow it to produce PACE object code and a PACE assembler written in FORTRAN with modified assembly mnemonics SLO043A NIBL Note As part of the User Library these programs are not SC MP supported as National products Program Program Number Name Description SLO034A Instructions and listing for NOVA conversion of DATA GENERAL s Nova Assembler to a PACE cross assembler SLO045A PACE Limited copies available PDP 15 X Assembler SLO040A 8080X 8080 Cross Assembler for IMP 16 IMP 16 Object Module and source listing only available 15 00 Uses assembly directives similar to other SLO46A SC MP Basic National assemblers PDP 8 X Assembler Requires the following defini tions B 0 C 1 D 2 E 3 H 4 L 5 A 7 memory 6 PSW 6 Stack Pointer 7 14 SM PL is a high level pro gramming language compiler for the IMP 16 See Compute Vol 2 8 for language fea tures It requires 16K of R W memory and can be used with the IMP 16 disc system Cost is 100 00 for the manual object module paper tape and source listing NIBL is aversion of Tiny Basic for SC MP It requires 4K of memory for the interpreter and an additional 2 4K for the NIBL source program Cost is 15 00 for the paper tape load module and source listing Both p and n channel versions are av
30. mbler a paper tape line editor and a PROM tape punch program The line by line assembler accepts a program in limited assembly language from a keyboard or paper reader and then assembles it directly into RAM The paper tape line editor which allows insertion deletion or replacement of lines of program source code punches either leader or trailer The PROM tape punch program punches the contents of a specified memory range in BPNF or complemented binary format onto paper tape This tape could be used to program memories using a standard commercially available PROM programmer such as the DATA 1 0 SUPAK requires the LCDS firmware but will run on either a SC MP or aSC MP II n channel LCDS It comes as a set of eight MM5204 MM5214 ROM IC s designated ISP 8F 111 NEW LIBRARY PROGRAM SC MP Program SLO047A PLOT from Jermyn MicroComputer Center Kent England Program Listing see page 3 Source paper tape 5 00 each A sample plot of a SINE wave drawn on a Teletype by the PLOT routine is shown below GRAPH PLOTTER FROM RAM A JERMYN UTILITY PROGRAM 68 58 48 38 20 18 9 4 nee t t ee x 16 20 308 40 S 68 t 22 5 68 43 38 20 18 9 t
31. nge sign of mantissa or exponent nm X register Number entry terminated and stack is pushed IX Y 2 gt T Roli stack X T 7Z X Pop stack X Y Z T 0 Exchange X and Y X Y Exchange X with memory X M Memory store X gt M Memory recall X M Math Ae VR XY X Xe V X X V X X Y M M X M M X MeM X MeM X 1X yK X107 e In x X Result in X stack popped Y 2 T 0 Result in memory Result in X previous X lost stack unchanged SIN X COS X TAN X SIN X COS HX TANX RTD OTR Result in X previous X lost stack unchanged Convert X from radians to degrees or vise versa Previous X lost stack unchanged Branch JMP Unconditional jump On call branch instructions second word of instruction is the branch address which is loaded into an external program counter by a load pulse from the NCU Test external jump condition branch if true Japut output IN Multidigit synchronous input from RAM or peripheral into X register Multidigit synchronous output to RAM or peripheral from X register OUT AIN Single digit asynchronous input Wait for asynchronous data ready ADR to go low then read data and pulse acknowledge flag F gt Mode control 600 Set mantissa digit count from one to eight digits FLOATING POINT NOTATION 1 2 BIT 1 SIGN OF DECIMAL MOST SIG LE
32. nsible for its repair If the customer is found to be responsible a charge of 35 00 per hour plus parts will be charged A purchase order or check for the amount of the repairs must be sent to the service center prior to the return of the repaired kit Kits must be returned to NATIONAL SEMICONDUCTOR CORP 2921 COPPER RD SANTA CLARA CA 95051 ATTN MICROCOMPUTER SERVICE CENTER COMPUTE Newsletter Vol 3 No 6 P33 SEG F 8 D P27 SEG G of 5 16 17 10 S1K TYP 8 9 3 FF P45 COL 8 tLe BSB i 2 sg Oleg st ina P35 SEGA Jo 1 2 st ct ct ct ot Sk DISPLAY De Se eA ae eae Gee ert a eS ae ae 8 P57 DIG INIT NOTE Daa tags ae SWITCH Poin RESET P67 OFF os a or 1 RESET EN P66 2 FIGURE 2 2 2 GNO 16 5 1K The following spare parts are also available from the service center A check payable to National Semiconductor must accompany all orders P N482305235 001 KEYBOARD KIT ROM 25 00 P N980305232 001 KEYBOARD amp CABLE 35 00 NCSS Expands lis Service National CSS has extended its telephone access and service through the world wide TELEX network This enables cus tomers to access any of our host machines by dialing the NCSS TELEX rotor 965806 International users may also access TWX by dialing 710 474 35
33. or flag signals the 57109 when the ports are ready FIFO not empty or not ready FIFO empty When the processor has loaded the first instruction word the FIFO is ready and may be interrogated The Number Crunch er s ready line is used as a FIFO output clock to extract DATA SYSTEM DATA BUS BUS CONTROLLER FIFO FULL FIFO EMPTY nt OUTPUT DATA READY aE JUMP CONDITIONS OR INPUTS MICRO PROCESSOR 8080 ADDRESS FIFO READ STROBE CONTROL FIFO WRITE COSMAC STROBE READ CLOCK data and gate it onto its instruction input lines The last instruction executed empties the FIFO which forces its output indicator to not ready This flag is the hold input for the NCU and an interrupt input for the microprocessor which senses that the Number Cruncher has completed its instructions The 57109 continues to execute instructions until it has completed its specialized calculations It sends its results to the output FIFO using an OUT instruction If Output data is present in the FIFO the processor senses this via an interrupt or jump condition It obtains the results if needed or sends them on to an output device Control by a ROM To transfer instructions where only a few sequences are necessary a ROM can be programmed to contain the sequence of instructions for the NCU This setup is similar to the stand alone system in Fig 3 It permits conditional test instructions not possible with the FIFO interface
34. ost require 5 to 10 ms Although these speeds may seem rather slow they compare favorably with similar functions implemented as subroutines in low cost microprocessors Conditional test and skip branch instructions permit decision making within the user s program The condi tional test instructions operate on the results of compu tations or from an external jump condition sense input on line Is The two flag outputs F and F gt may be used to activate external devices A four register stack X Y Z T holds operands and temporary results and a TABLE 1 COMPARISON OF LARGE SCALE INTEGRATED PROCESSING CHIPS input output keyboard and multidigit data bytes display asynchronous digit single bit 4 single bit Data format 0 or floating point or binary scientific notation scientific notation variable 1 to 8 digits for mantissa Data length or first in first out Program key sequence external ROM program external ROM counter microprocessor internal PC buffer memory Speed mathor 14 400 ms 0 5 400 ms VO operatians EK Minimum 1 external PC number of chips for CPU and RAM COMPUTE Newsletter e Vol 3 No 6 TABLE 2 NCU INSTRUCTION CLASSES Digit entry 0 9 Each digit is entered into the X register mantissa or exponent if in enter exponent mode Fixes decimal point of mantissa of number being entered Set enter exponent mode Cha
35. sistor The finished thermometer requires only a single unregulated 12 V supply and operates from 29 C to 60 C 20 F to 140 F The digital thermometer described here uses a ADD2500 2 digit DPM chip for A D conversion and display decoding The LM134 programmable current source operates here as the temperature sensor and the LM555 timer as a dc dc converter The DS8866 and the pnp transistors drive the NSB3882 display The LM134 makes an excellent temperature sensor it has a constant temperature coefficient of 0 30 C 0 167 F and its noise immunity and current programmability make it ideal for remote sensing use Output current flow through a sense resistor scales the LM134 s output voltage in this case to 10mV F which is one count of the DPM or 1 F displayed NSB3882 2N5457 NSL5053 2 4 THERM ZERO 10T 3 3k Tough mathematical tasks are child s play for Number Cruncher New special purpose microprocessor combines best features of general purpose and calculator chips by Alan J Weissberger and Ted Toal National Semiconductor Corp Santa Clara Calif Reprinted from Electronics February 17 1977 Copyright McGraw Hill Inc 1977 There is one hurdle that the general purpose micro processor clears awkwardly complex mathematical computations For such applications designers have had to spend considerable time learning to use efficiently the
36. ss Others other instructions OUTPUTS CODING Pl Pe __ 4 number of channels to be input store in M mantissa digit count 1 retr eve channel number select analog channel start A D converter push stack read A D converter digits 1 to 3 when EOC 0 update channel number and check JMP LOOP if O 1 1 1 1 1 1 1 0 1 1 6 Data acquisition The Number Cruncher can handle complex data in an analog system by controlling the analog multiplexer which sends analog data to an analog to digital converter The program listing shows how single instructions from the NCU handle complex operations a buffer memory to provide the NCU with instructions but merely switches it on by supplying a single input ADR The result is very high system throughput and parallel processing In the analog data acquisition system in Fig 6 the PROM program controls the Number Cruncher It makes the NCU measure analog variables perform some digital transformation on them compare the results to certain specified limits and send out control information on the DO lines Acquiring analog data An eight input analog multiplexer selects the desired analog input channel based on a 3 bit address supplied by the Ncu on DO This address is latched by the multiplexer and will not change during the conversion time of the three BcD digit analog to digital converter via Flag 1 After starting the conversion via Flag 1 the NCU s A
37. ure ment and test equipment It can also extend a mini or microcomputer s processing power when connected as a peripheral device on the host processor s bus In such processing applications software development time can drop significantly with the NCU Its instruction set is like those of scientific calculators which means that the Number Cruncher already has most of the required calculation software Trigonometric logarith mic and exponential functions for example are performed directly Data formats at the input or the output may be in floating point or scientific notation Digit lengths may range up to an eight digit mantissa with one or two digits for the exponent The 57109 combines the best features of calculator HOLD RDY ISEL INSTRUCTION SELECT R W DAS DIGIT ADORESS STROBE INTERNAL BR BRANCH CLOCKS Fi USER FLAGS ERROR STORAGE ROM 8 ASYNCHRONOUS DATA READY 5 04 13 03 ARITHMETIC UNIT CONTROL MEMORY DA LEAST SIGNIFICANT DA DA3 DAg MOST SIGNIFICANT DO LEAST SIGNIFICANT DO2 00 4 4 DIGIT DATA DO MOST SIGNIFICANT COMPUTE Newsletter Vol 3 No 6 chips and general purpose microprocessors Table 1 For example its functions are more flexible than those of the calculator which is limited to inputs from a keyboard and outputs to a display But it is more directly useful for calculations than microprocessors The NCU can
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