FS4439 DPv1.2 State Analysis Probe User Manual
Contents
1. Field Bits Definition Probe Channel Command 4 Command Field B1 3 0 ADDR 11 0 12 Address Field B1 15 4 ADDR 19 12 8 Address Field B2 7 0 Aux CLK 1 B1 16 DATA 7 0 8 Data field B2 15 8 SYNC 1 Sync Bit B3 0 First part of the transfer CMD ADDR and DATA are all updated if SYNC is O then only DATA is updated STOP 1 Stop last byte of the transfer B3 1 Spare 1 B3 2 Spare 1 B3 3 Request 1 High when transaction is request B3 4 Response 1 High when transaction is response B3 5 Timeout 1 Response Timer timeout period 300us B3 6 HPD event 2 Bit1 Bito B3 8 7 o Unplugged HPD Low level p ke pulsed low 25ms to 1 50ms Interrupt event event signaled on rising edge of HPD E ees In HPD High level HPD Valid 1 Indicates a valid HPD event B3 9 Storage 1 Indicates Valid states B3 15 Byte Count 5 Number of valid bytes received inclusive of current B4 10 6 state The Storage bit should be used as a qualifier for storing AUX data The rate at which Storage is pulsed depends on the packet type AUX transfers begin with a four bit CMD a 20 bit address and 8 bits of data Some packet types contain additional data which will be presented 8 bits at a time For the additional bytes the Storage bit will be pulsed as each byte is ready the Command and ADDR Fields will be unchanged Triggering The configuration files provide some logic analyzer based trigger set ups that utilize t2. teos 45 Standards Supported eie ca ce eese cose sed ente Hak ests AN em te etsi stets BU sheet E IE HE eta 45 Power Reguireme ts ii hc eee a ope en reta bte me ea 45 Logic An lyzer Required en e e enti ege e tre teet tete t er d e Eget 45 Environmental Temperature esses eerie tenete enne nn entrent enne REE EA aaor EEan nennen 45 AME A n 45 E ree RN GRON p WURST SINIT GER 45 Testing and Troublesh otihg erns eee enne nenne nennen nnne ker A innen nnne ns 45 How to reach us For Technical Support FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL 603 471 2734 FAX 603 471 2738 On the web http www futureplus com For Sales and Marketing Support FuturePlus Systems Corporation TEL 603 472 5095 On the web http www futureplus com FuturePlus Systems has technical sales representatives in several major countries For an up to date listing please see http www futureplus com contact html This product is covered in the EC under the WEEE Directive Please go to www futureplus com for recycling information O Limitation of Warranty Exclusive Remedies Assistance Product Warranty This FuturePlus Systems product has a warranty against defects in material and workmanship for a period of 1 year from the date of shipment During the warranty period FuturePlus Systems will at its option either replace or repair products proven to be defect
3. 6 Ifthe FS4439 preprocessor Lane LEDs are all Green and the first trace file captured on the logic analyzer has no error messages then it is a good indication that all initial settings are correct 7 Alink showing any orange on an LED needs settings for link width lane reverse or lane inversion adjusted in the Probe Config window Depending on the DP target system s data lane signal characteristics such as jitter tolerance jitter spectrum and BER the user may always see some level of orange LED activity and see the corresponding error counts recorded on the analyzer and in the Probe Error Log Front Panel The connections and features of the FS4439 preprocessor include DC input for provided external AC to DC power supply please note that the use of any other power supply voids the warranty on the FS4439 and USB connections to the Windows PC 169xx analyzer where the Probe Manager software will be loaded Link Probe cable connection for 1 of the probing cables interposer or FL Logic Analyzer 90 pin pod connections P1 P4 are connections for HS Link and P5 P8 are for AUX link Cables for connection to AUX and HPD READY LED indicates that the FS4439 Probe firmware is loaded and the probe is ready to capture DP traffic LED indication of Lane status Lane Status Meaning LED color Green Lane OK Dark Lane not active or Probe stopped Orange Data Invalid 8b10b error Red RX Error loss of
4. When the software has been licensed you should be ready to load a configuration file You can access the configuration files by clicking on the folder that was placed on the desktop When you click on the folder it should open up to display all the configuration files to choose from If you put your mouse cursor on the name of the file a description will appear telling you what the setup consists of once you choose the configuration file that is appropriate for your configuration the 16900 operating system should execute The protocol decoder automatically loads when the configuration file is loaded If the decoder does not load you may load it by selecting tools from the menu bar at the top of the screen and select the decoder from the list Offline Analysis Data that is saved on a logic analyzer data as an ala file can be imported back into the Keysight Logic Analysis environment for review You can do offline analysis on a PC if you have the Keysight Windows based Logic Analyzer software installed on the PC if you need this software please contact Keysight Offline analysis allows a user to be able to analyze a trace offline at a PC so it frees up the analyzer for another person to use the analyzer to capture data If you have already used the license that was included with your package on a logic analyzer and would like to have the offline analysis feature on a PC you may get additional licenses at no charge please contact FuturePlus
5. m Im E o 004 Dic od m 2 H o ooo o J J J J J J J J J J J J an n o a sj ES ES o o Estatus IF KEJ e Inbox y catboc GyeaMen oprcie esso amp Rescue Filon BO 3 01 PM Probe Manager Application The USBXpress drivers must be installed before the probe manager GUI program can be installed The drivers can be installed by running the USBXpresslnstaller exe program that is located on the CD provided in the Documentation packet The USBXpress drivers installation software can be found as the USBXpressInstaller exe file on the CD provided in the Documentation package Insert the CD into the computer that will be used to control the FS4439 probe This computer must have a USB connection Using Windows File Manager Run the USBXpressInstaller exe by double clicking it and following the subsequent directions that follow Similarly the DisplayPort12 probe manager 7 exe if you are running Windows XP then select the DisplayPort12 probe manager XP exe file can be installed by double clicking the appropriate program on the CD which initiates the installation software on the computer and places an icon on the desktop Follow the directions that follow including agreeing to the license terms once the software installation is complete click on finish To start the program manager simply double click its desktop icon The Probe Manager
6. q EEE gt amp to MZ 44127542101 s m Address AUX Protocol Decode Command Data HPD Event ility 1 buffer ability ACK WRITE RITE Overview AUX Listing 40 Pin For Help press F1 E start Beebe amp 43 The following shows the Logic Analyzer Overview screen for MST operation with 4 Virtual Streams defined 4 Stream is the maximum of streams that can defined There are 5 State Listings defined 1 MST Listing This shows an integrated view of all streams on the HS links Each state is labeled by it s Stream and has it s own Event and Error codes This view is not completely time correlated with the sequence of events on the probed link because of the processing skews associated with the of Time Slots defined for each stream 2 Probe Stream Listings 1 4 These listings display only the information associated with a particular Virtual Stream There are Filter and Inverse Assembly functions associated with this State display Probes Modules Tools Windows Slots D E E E Enhanced E Proe DP12MST Turbo Trigger 1 StreamFilter1 Probe Stream 1 Y Properties X Properties Y Show b E Y Ad Hl General M Probe 4 JNsrF amp RG JN DisplayPort 5 E op12u8T Purpose Probe StreamFilter2 Filter 2 y 4 2 Inverse Asse Probe Stream 2 Y Properties Y Y Properties V v Properties Y so
7. BEBE E a oj o The Filter Function has the following changes for v1 2 MST which extends the SST Filtering functions to include a separate Filter function for each Stream defined in the Configuration form and adds the ability to filter within each stream based on it s VC Payload fill or Stream Symbol z x EE E E Be E BEE al al MI a al a a a a a a a a E KU KU SU i Si Ii Ml BH mEEEEEEE EEE SE LETT TL EBBE E Ml LET M EE BEER Mi Ml Ml El NAAA LEE M EE Probe Manager control of FS1041 Repeater If the user selects the Cable Type of FS1041 Repeater there are additional electrical parameters of the DP High Speed link going to BOTH the DP Sink and the FS4439 probe that can be adjusted 110mv 70mv y 110mv 70mv v In general the user wants to use these controls to insure that there are Green LED Lane status indications on the FS4439 probe and that the Target Sink display is operating properly The default settings should be OK for RBR and HBR Link speeds NOTE For the DP Link to work with the FS1041 Repeater it has to be connected to the FS4439 probe the FS4439 needs to be powered on and the Probe Manager Software needs to be open De emphasis and VOD are output signal controls are applied across all 4 DP lanes in the Link and are independent for the Sink and the Probe The default value for De emphasis is O DB Use of De emphasis is not recommended at VOD lt 1000mV VOD is
8. In order to view decoded data offline after installing the Keysight Windows based Logic Analyzer software on a PC you must install the FuturePlus software Please follow the installation instructions for Setting up the logic analyzer Once the FuturePlus software has been installed and licensed follow these steps to import the data and view it From the desktop double click on the Keysight logic analyzer icon When the application comes up there will be a series of questions answer the first question asking which startup option to use select Continue Offline On the analyzer type question select Cancel When the application comes all the way up you should have a blank screen with a menu bar and tool bar at the top For data from a 1680 90 900 analyzer open the ala file using the File Open menu selections and browse to the desired ala file Offline Aadent Logic Analyzer ES Edit View Setup Tools Markers Run Stop No Active Window Window Help pensje Taa s rrym J Welcome to the 16700 Fast Binary Data Import Wizard This wizard will guide you through the steps of importing 16700 Fast Binary format dala into the system Is the system already set up correctly for the 16700 data you wish to import 6 Yes C No For Help press F1 Status I offline Aste 43 DAI A PRWO Bree ercrxv Mesto 2 Mestiza 1 eamicrosote Fetomine PE 301m After clicking next you must
9. 0 Invalid 1 1 8b10b error 6 Lane 0 Command 1 1 Control symbol 0 Data symbol 5 Lane 0 Data 7 3 5 8b decoded value 4 0 Lane 0 Data 2 0 3 8b decoded value A2 16 14 Lane 1 Invalid 1 17 8b10b error 13 Lane 1 Command 1 1 Control symbol 0 Data symbol 12 Lane 1 Data 7 0 8 8b decoded value 11 4 Lane 2 Invalid 1 17 8b10b error 3 Lane 2 Command 1 1 Control symbol 0 Data symbol 2 Lane 2 Data 7 6 2 8b decoded value 1 0 Lane 2 Data 5 0 6 8b decoded value A1 15 10 Lane 3 Invalid 1 17 8b10b error 9 Lane 3 Command 1 1 Control symbol 0 Data symbol 8 Lane 3 Data 7 0 8 8b decoded value 7 0 The Clock is on A1 bit 16 The SST Mode Logic Analyzer bit assignments duplicate the MST Mode bit assignments Event Codes for SST and MST modes Main Link Event Code Bit 7 Bit 6 Bit Bit Bit Bit Bit Bit VC 5 4 3 2 1 0 Tag Vid 1 Field Blnk 0 or Vert 1 Hor 0 Pixel 1 F 0 0 1 0 0 0 Stuff including FS FE not in MST 1 F 0 1 0 0 0 0 Content Protection BS 0 VH 1 0 1 0 0 0 Content Protection SR 0 VH 1 1 0 0 0 0 BS 0 VH 0 0 1 0 1 0 SR 0 VH 0 0 1 0 1 1 BE 0 VH 0 1 0 1 0 1 Training 0 0 0 0 0 T2 T1 TO VBID 0 VH 0 0 1 0 0 1 MVID 0 VH 0 0 1 1 0 mike MAUD 0 VH o l1 lololol 1 ln Dummy does not exist in MST mode 0 VH 0 1 1 0 0 1 MoT MSA 0 VH 0 1 1 1 0 0 2 SDP 0x02 Audio Stream 0 VH 1 0 0 0 0 0 3 SDP 0x01 Audio TS 0 VH 1 0
10. PR ea oe Pese kv ded iaa klaka 8 Front Panel vccsccsscsosssesvessscsacsosatetnosesestsconsaaseonseseassosssedeesscctissosvensecassceuseesutsSeovescsseseesenssonsncseasosssaiessonss 10 FS4439 A NN 11 Installing your Software for the First Time sss esssscesescesescssescsssssscsescessescesssssesescesesccs 15 Connecting the Keysight logic analyzer to the FS4439 sss esssscccescesesesesessesescecos 16 Logic Analyzer configuration files cscesesccssescesssscssescesesceseseesssssessescseseessessesescesesscs 17 Setting up the 1690x or Axie Analyzer s sescsesccssescessssccsescesesecesessesssseeseseesseseesssseseescccs 17 INEA M 18 Probe Manager Application s seseesssscesssscssescsescssssssesesceeescseseesssseesescesescceseseessssecsescvo 20 Mode Selection citer OR EU I P QUE RO RE e en ede OI ntque i iiS 22 DP a GE 22 DP 1 2 Mode SST amp MST Probe Manager functions coooooccoonnonononononccononnnonnnonnnnn nono no eene enne 25 Probe Manager control of FS1041 Repeater sssssesesseseeeeeeeeeneeee non rn eene nnne nnne nnns 28 Event Codes for SST and MST modes ereis e nennen nennen ener enne enne nnns 34 dburragli to S 39 The Inverse Assembler gm n 41 General Inf OVBIUllOH EEE TT NOT o eo tkM poe vb te voe vY Vb e Vo ei 45 AO
11. application detects all F54439 probes that are connected to the USB bus and allows the user to select which preprocessor will be controlled by the current instance of the Probe Manager application from the initial screen as seen below HE Display Port 1 1 File Edit Run Stop Help wu d Run Stop Probe Config Non Uniform Pixel Filters Log Select Probe The user configures and controls the preprocessor from the main form which is composed of a menu bar a tool bar and a status message bar The menu bar provides options that allow the user to configure and run the probe The tool bar provides options to configure the preprocessor and the status bar displays the probes current status and or any errors that may have been encountered Error messages displayed in the status bar are also logged in the Log Form if logging is enabled The mode selection drop down box gives the user the choice of one of three modes to choose for the probe to run in e DP version 1 1a protocol at either 1 67 or 2 7Gbps link rate e DP version 1 2 Single Stream SST at either 1 67 2 7 or 5 4 Gbps e DP version 1 2 Multi Stream MST at either 1 67 2 7 or 5 4 Gbps HEJ Display Port 1 1 File Edit Run Stop Help E Run Stop Probe Config Non Uniform Pixel Filters Log Select Probe The menu bar contains the following options File ME Display Port 1 1 Edit Run Stop Help Load File ce m Non Uniform Pixel Filter
12. browse for the fast binary data file you want to import Once you have located the file and clicked start import the data should appear in the listing After the data has been imported you must load the protocol decoder before you will see any decoding To load the decoder select Tools from the menu bar when the drop down menu appears select Inverse Assembler then choose the name of the decoder for your particular product The figure below is a general picture please choose the appropriate decoder for the trace you are working with Offline Agilent Logic Analyzer Unnamed Configuration Slot B Analyzer lt B gt Listing n BP xj B rie Edit View Setup Tools Markers Run Stop Listing Window Help ineusua A H F54300 Fibre Channel Decoder El New Bus Analysis F51116 F52337 SODDR2 Protocol Decoder se one Ing al New Filter Colorize FBDIMM Protocol Decoder Mew Packet Decoder Ml to MZ 4 95 ns New SerialToParallel E Overview Re order Delete etc Alt o Demod4 Inverse Assembler MegaCorp 999 Inverse Assembler PSS DS Error Sample Number Lane3 Event Code Pat Rec Al Pat Rec A2 d Find Ctrl F Macro Run Macro m m o ooo ooo 039 1FD 006 um tn n mn mn o tn POO00O eo n m E n n n m in in in m o oo or ooor m Im a BN oo oo m o m ooo
13. m AUX Waveform For Help press F1 d Start DEGES NJ i Se ar offline EZ 2 Mir The FS4439 Inverse Assemblers will perform the following functions e Decode all DP or AUX protocol data e Color code the transaction type The colors used by the software are as follows o Main Stream Attributes Blue o Secondary Data Packets Orange o Allother states Green Preferences DisplayPort 1 2 Inverse Assembler DisplayP Pixel Format RGB O YCbCr 4 4 4 2 YCbCr 4 2 2 Probe Stream Pizel widths 16 bpp YCbCr 4 2 2 5 18 bpp RGB 20 bpp YCbCr 4 2 2 24 bpp RGB 24 bpp YCbCr 4 2 2 5 30 bpp RGB 32 bpp YCbCr 4 2 2 C 36 bpp RGB 48 bpp RGB 1 Decode Pixel States The preference settings for the decoder must be set properly to decode the traffic correctly When decoding MST traffic you must be sure to select the correct probe stream If the wrong probe stream value is chosen the decoder will not output anything the column for the decoder will be blank When chosen for SST the probe stream selection has not effect Note Setting Decode Pixel States in the Protocol Decoder Preferences will result in longer processing time for the State Listing An example of the AUX State Listing Protocol Decode is shown below Reads and Writes are highlighted in Green gic Analyzer E3 rie Edit Yiew Setup Tools Markers Run Stop Listing Window Help x Due d ma T ESAS
14. output differential amplitude A Target Sink VOD that is too low Will cause the monitor to turn off The Equalization and Idle Threshold controls operate on the input signals from the DP Source and they allow for individual Lane control The EQ Controls have a drop down that allow each lane to be set up with either no EQ bypass or a 9 or 14 6 db boost at 3Ghz The Idle Threshold control allows for 4 different Idle assertion deassertion levels with a fixed 40 mV threshold between them State Analysis This chapter explains how to use the FS4439 to perform state analysis The configuration file sets up the format specification menu of the logic analyzer for compatibility with the output of the FS4439 In order to get both the DP and AUX analyzers into the same Logic analyzer workspace as represented in the Overview screen below first load the appropriate DP configuration file depending on your analyzer card Then manually select the appropriate AUX configuration file using the load command for the additional card that will show in the workspace Agilent Logic Analyzer XuxPort1 23AX430 2 xml Overview EI File Edit View Setup Tools Markers Run Stop Overview Window Help sa AA 4 Tm Q Ql Mom Probes Modules Tools Windows MI ust Listing 1 1 ES DP1 2 MST Probe Str ES DP1 2 MS
15. s board and then retransmits 2 copies of the DP link One copy goes to the DP Sink and one copy goes the FS4439 probe The cable from the DP Source is connected to the receptacle labeled IN and a second cable goes to the DP Sink from the receptacle labeled OUT The FS4439 probe cables for AUX and HPD connect to their labeled headers on the FS1041 Repeater There is a green LED on the FS1041 repeater board that indicates it has power from the FS4439 probe The repeater nature of this test probe may interfere with the DP Source s ability to respond to the Sink s requests on some commands There are a number of electrical attributes that are adjustable from the Probe Manager see that section ALWAYS POWER OFF THE FS4439 BOX BEFORE CONNECTING OR DISCONNECTING PROBES Note the IN connector is for the cable from the DP Source and the OUT connector is for the cable to the DP Sink Note the pin 1 positions for the AUX and HPD headers AUX and Hot Plug Detect HPD signals The AUX and HPD signals for DP need to be connected to the FS4439 preprocessor separately from the data link probing cables There are uniquely identified and labeled cables for doing this These must be properly oriented for polarity The DP AUX channel requires a high speed differential connection using a Samtec 050 header where pins 1 and 3 are AUXp and AUXn The HPD signal has its own cable that also connects to a 050 header pin 1 is the signal and pin 2
16. sync or PLL lock FS4439 Probing Cables Target DP Link requirements The eye requirements are measured by eye height and eye width forming a diamond shape These requirements are listed below and described pictorially The shape of the eye as seen by the FS4439 must closely resemble the wave shape shown below Specifically the eye opening must not show a decrease in amplitude prior to reaching the center of the unit interval l unit inter Description Specification for Specification for 2 7Gbps 5 4Gbps Min Eye height at footprint pad 175mV Vdiff p p 90mV Vdiff p p Min Eye Width at 45 UI Jitter 45 UI Jitter x tolerance of tolerance of preso sej 0 55UI 0 55UI Length Matching Requirements 5mil 5mil Differential Pair Skew tolerated between lanes of 24 ns a link e In order for the FS4439 to achieve a low error rate for the acquired data on the DisplayPort Main Link the Jitter Spectrum for the target must be within the jitter tolerance shown below Users not adhering to this specification do so with the knowledge that errors may be seen on the FS4439 and incorrect protocol decode could result 5 sweep THBR2 10 00 5 1 00 0 10 0 01 1 405 LE 06 1 E407 1 08 Frequency Hz FS1041 Repeater The FS1041 Repeater is designed as a DP link endpoint and fanout buffer The FS1041 Repeater terminates the line on it
17. your logic analyzer to insure all modules are working properly Logic Analyzer configuration files High Speed The logic analyzer configuration files are installed in the FS4439 desktop folder when FS1195 exe is run The configuration files are organized by DP protocol V1 1a V1 2 SST and V1 2 MST Within each of these 3 categories the configuration files are further broken down by bit rate 2 7 vs 5 4 and by type of logic analyzer card being used AUX There is just 1 Aux Port configuration file in it s desktop folder AX439 1 xml Setting up the 1690x or Axie Analyzer The Logic Analyzer is a PC based application that requires a PC running Windows OS with the Keysight logic analyzer software installed or a 169xx frame Before installing the protocol decoder for the FS4439 on a PC you must install the Keysight logic analyzer software first Once the Keysight logic analyzer software is installed you can install the FS4439 protocol decoder by placing the CD ROM disk into the CD ROM drive of the target computer or Analyzer and executing the exe setup program that is contained on the disk The exe setup file can be executed from within the File Explorer PC Utility You must navigate to the FS1195 exe file on the CD ROM disk and then double click the FS1195 exe file from within the File Explorer navigation panel The installation procedure does not need to be repeated It only needs to be done the first time the Analysis Probe is used
18. 0 1 0 0 i SDP 0x05 Audio Copy Mgmt Pkt 0 VH 1 0 1 0 1 1 A o SDP 0x06 ISRC Packet 0 VH 1 1 0 0 1 0 5 SDP 0x07 VSC Packet 0 VH 0 1 0 0 1 0 SDP 0x04 Extension Packet 0 VH 1 1 1 1 0 0 SDP 0x80 Info Frame 0 VH 0 1 0 1 0 0 SDP 0x00 03 70 7F Reserved 0 VH 1 0 0 0 1 1 SST Mode Event Decode occurs when VC Tag 0 The SST Mode Event Decode table otherwise duplicates the MST Mode table The Training Type bits are encoded T 1 0 0 indicates symbol error rate measurement pattern T 1 0 1 indicates TP1 T 1 0 2 indicates TP2 T 1 0 3 indicates TP3 T 2 is a spare Event Code symbol definitions mode SST Event Code Symbol Bit 7 Bit 6 et et Bit 1 Bit 0 FO Pixel F1 Pixel FO Stuff Data Sym FS FE F1 Stuff Data Sym FS FE Hor Content Prot BS Vert Content Prot BS Hor Content Prot SR Ver Content Prot SR Horizontal BS Vertical BS Horizontal SR Vertical SR Horizontal BE Unknown Training TP1 Training TP2 Training TP3 Horizontal VBID Vertical VBID Horizontal MVID Vertical MVID Horizontal MAUD Vertical MAUD Horizontal Dummy Vertical Dummy Vertical MSA Horizontal Audio Stream Vertical Audio Stream Horizontal Audio TS Vertical Audio TS Horizontal Audio Copy Mgmt Pkt ojojojojojo oJo oOJoO OJO
19. FS4439 snoops a link without significantly degrading its signal integrity The high speed serial signal is deserialized and processed for packet identification by the FS4439 before being sent to the logic analyzer connections Additionally the preprocessor provides trigger and filtering functions The dis assembler software running on the logic analyzer provides information regarding the transactions within the captured traffic The FS4439 product consists of the following accessories e The FS4439 preprocessor power supply and cable e Protocol Disassemblers FS1195 and AuxPort1 2 for DP FS4439 Probe Manager application and USB driver application on a CD for either Windows XP or 7 e A USB cable is provided for connecting the FS4439 preprocessor to the Windows machine that the Probe Manager is loaded on e 1 DisplayPort cable 2m M M to be used between the DP source or FS1041 interposer and the DP sink We STRONGLY recommend the use of this cable as it has been carefully tested to insure it will not disturb signal integrity at HBR2 data rates e This User Manual and Quick Start sheet The minimum equipment required for analysis of a DP consists of the following equipment e Keysight logic analysis frame with logic analysis modules e ADPI target bus Probing System Overview The architecture of the FS4439 preprocessor and the design of the DP link to be probed should both be thoroughly understood before attempting to use t
20. FuturePlus Systems Corporation FS4439 DPv1 2 State Analysis Probe User Manual For use with Keysight Logic Analyzers Revision 1 5 Copyright 2012 FuturePlus Systems Corporation FuturePlus is a registered trademark of FuturePlus Systems Corporation How to PEACH sisse stono bol EEE SOVETA eV ea ve PAKAS sos serei otia S va bo dE OE VAR USE Po boo s Hd S Ve a beUa 3 TrOUHCI VOEON suoi eds eoo OVO ve deve E EON eJ 4 Limitation Of Ecl TT ces 4 Exclusive Remedies eee E RR sr aaa TRIN ER ettet 4 ASSISTANCE M M 4 HOw to Use AAA usss ss ouesse oon soens b seess estoe o oes outs oe oo bo enses Ssa v osovi esan 5 TIPO DAI A A TTTEJO 5 Defi ILT R M eS 5 Probe Function OvervieW M M seso so 6 FS4439 Input Output and Communication in all modes essere 6 INDIAS 6 Hi speed Link Processing similar functions in all modes sess 6 Functions unique to DP1 2 SST mode sienne eee Seen Tree ee 6 Functions unique to DP1 2 MST mode enne nennen enne nnne nnne trennen enr enne nns 6 Analyzing the DP BN KVEK KAE KERA KONKIRIS ORA VAKI 7 Accessories SUP PILE A NO 7 Minimum Equipment Required sscesescesssssessscesescesesccssessesssseseescesesssesescesesscsseseessssecces 7 Probing System OVeFVIEW es sve kr eV Ee po bs PPP See DV setes
21. O O O O O O O JOJO OJO OOOO 2 2 OJO O a Oo 2O 2O a2 O O0 2 O O JO OJO OJO 2 O 2 O 2 O 2 O 2 O X x X 0O e ol 5o0o a 5 oo lo52aj olo x xx x aoloo o oo olool olslo oo o w Y fojojojojo oOJo oOJoO OJO O JO 2 2 O OJO 2 a aA A O O JO OJOJOJO 2 2 O O O0jo ojo oOjO 2 a O O a 2 A O A O A2 A3 A O O OJO JOJO JOJO 2 A OJO O Vertical Audio Copy Mgmt Pkt Horizontal ISRC Packet Vertical ISRC Packet Horizontal VSC Packet Vertical VSC Packet Horizontal Ext Packet Vertical Ext Packet Horizontal Info Frame Vertical Info Frame Horizontal Reserved Vertical Reserved O Oj o ojoj ooj joiojoio a O O 2 O 2 O 2 O A A O O aA A O O aA A O oO A gt 43 4 3 4 32 3 3 0 ojojojo a OJO OJO Oojo ja 2 O O OJO O alzlojolojola 2 2 a2 Oolojo ooocoojo Event Code symbol definitions mode MST Event Code Symbol Bit 7 Bit 6 et et et Bit 1 Bit 0 Horizontal MAUD Vertical MAUD Vertical MSA Horizontal Audio Stream Vertical Audio Stream Horizontal Audio TS Vertical Audio TS FO Pixel 1 0 0 0 F1 Pixel 1 1 0 0 BS 0 X 1 0 SR 0 x 1 1 Horizontal SR 0 0 1 1 Vertical SR 0 1 1 1 Horizontal BE 0 0 0 1 Unknown 0 0 0 0 Training TP1 0 0 0 1 Training TP2 0 0 1 0 Training TP3 0 0 1 1 Hori
22. O Pixel 1 x FO Stuff Data Sym including FS FE ojojo 1 O O X O x ojo ojo BS SR Content Protection BS BF F1 Pixel F1 Stuff Data Sym including FS FE ojojojojolo 1 1 1 1 1 1 X XX Xx OlOl al 3 0O ajO jajoOjo O 2jO ajO Xx Dx gt X lt lt X lt ojojojojolo ojojojojolo Blanking Horizontal Missed SR Hor Blank BE Horizontal Blanking BE Horizontal Blanking VBID Horizontal Blanking MVID V_err Hor Blank MVID Horizontal Blanking MAUD A_err Hor Blank MAUD SR Horizontal Blanking Dummy Horizontal Blanking Audio Stream ojojojojojo ojo ojo ojojojoj ojo ojojojo ojo x ojojojojojojo jojojojojo ojo ojo O 2 ja O O O JO O o gt 2jo OjOoO O O ojO ajoOjOoO a a O ojojo O OJO O ojojo x oO x OJO O x Horizontal Blanking Audio TS Horizontal Blanking Reserved Horizontal Blanking Extension Horizontal Blanking Info Frame ojojolo ojojolo ojojolo jojojo o o Ol O ojojolo ojojolo Blanking Vertical Vertical Blanking BE BE Missed SR Ver Blank BE Vertical Blanking VBID Vertical Blanking MVID V_err Vert Blank MVID MVID Vertical Blanking MAUD MAUD A_err Ver Blank MAUD Vertical Blanking Dummy Dummy Vert
23. Show ME Probe 5 Nsrano 3 S DisplayPort DP1 2MST Stream Filter 3 Filter 3 A 1 2 Inverse Asse Probe Stream 3 X Properties y Properties Preferences INEN Show k j ME Probe SF amp RG DisplayPort E op12sT refi Filter 4 sae 4 1 2 Inverse Asse Probe Stream 4 x Propeties js Prope es X Y Preferences Show MST Listing i Y Show Waveform 1 Y 1 AUX E E mpo 2 AUX Listing General Purpose Probe Analyzer 90 Pin pene Assembl po Properties Y E afal x see el e j Y Show L EB MST Listing EB Wavefom 1 BS DP12 MST Probe Str ES DP1 2 MST Probe Str ES DP1 2 MST Probe Str ES DP1 2 MST Probe Str BB AUX Listing General Information Characteristics Standards Supported Power Requirements Logic Analyzer Required Environmental Temperature Altitude Humidity Testing and Troubleshooting Servicing This chapter provides additional reference information including the characteristics and signal connections for the FS4439 probe The following operating characteristics are not specifications but are typical operating characteristics for the FS4439 probe If the product is used in a manner not specified by manufacturer then the protection provided by the equipment may become impaired DisplayPort version 1 1a v1 2 100 240VAC 2 amps Keysight 1690x frame and 2 of
24. T Probe Str ES DP1 2 MST Probe Str EE DP1 2 MST Probe Str E Ennanced Ill Prove FeR DisplayPort E oP12 ust Turbo Trigger 1 Stream Filter1 Filter 1 p 1 2 Inverse Asse Probe Stream 1 C ME c e dnce LE MEME l cenera JA Probe 3 MISFERG THER DisplayPont E DP12MST Purpose Probe Stream Filter2 Filter 2 a 1 2 Inverse Asse Probe Stream 2 s reete EC EF EG LI E Prope 5 israrc 3 DisplayPort E DP1 2 MST StreamFilter3 Filter 3 4 1 2 Inverse Asse Probe Stream 3 oo Og tm BI ses Probe Misrere JE DisplayPort BB DP121M8T Stream Filter4 i Filter 4 1 2 Inverse Asse Probe Stream 4 lm 1 Properties fy Properties Preferences ify Show e Reverie ones teen E j EE Listing 1 e Show E Genera BE aux B Pont 3 E Listing 1 Purpose Probe Analyzer 90 Pin Inverse Assembl po y Properties X y E l z Show LI For Help press F1 Agilent Logic Analyze Local DisplayPort High Speed Groups Besides de serializing the data stream for the logic analyzer the FS4439 generates a number of identification and control bits that are used by the Inverse Assembler and logic analyzer These are also available to the user and are described below AUX port is defined separately v1 1a mode Logic analyzer si
25. either 40 or 90 pins modules Operating 20 to 30 degrees C 68 86 degrees F Operating 4 6000m 15 000 ft Non operating 15 3000m 50 000 ft Up to 8096 relative humidity Avoid sudden extreme temperature changes which would cause condensation on the FS4439 module There are no automatic performance tests or adjustments for the FS4439 module If a failure is suspected in the FS4439 module contact the factory or your FuturePlus Systems authorized distributor The repair strategy for the FS4439 is module replacement However if parts of the FS4439 module are damaged or lost contact the factory for a list of replacement parts
26. ftware On Windows XP PCS Run the DisplayPort12 probe manager xp exe program that is located on the CDROM to install the DP 1 2 Probe Manager GUI software NOTE The Microsoft NET Framework must be on the system for the Probe Manager application to load properly FS4439 probe This preprocessor requires its own DC power supply which is provided Additionally this preprocessor is completely initialized set up and controlled by the Probe Manager software that resides on a Windows based system either stand alone PC or logic analyzer All communication to the FS4439 preprocessor is by means of the USB port on the PC or logic analyzer Improper or incomplete installation of either the correct USB driver or the Probe Manager software will prevent operation of the FS4439 3 Keysight Logic Analyzer The configuration files for the logic analyzer are on a CD FS1195 and AuxPort1 2 Install these files either for Windows XP or 7 as required and follow the instructions for logic analyzer module card interconnections and logic analyzer connections to the FS4439 probe 4 Target platform There are several requirements of the DP platform in order to assure that the FS4439 can successfully probe the target s DP link with minimal impact to the link and errors seen at the probe These requirements are discussed in the Probe Cables section There are two probing cables FS1041 interposer or flying lead There are link attributes such as lane invers
27. gnals per pod Field Bits Definition Pod Bits Storage 1 1 store A4 16 Data Error 1 1 error 15 Train1 1 1 1 DP1 1a training 14 spare 1 13 Probe DP1 1a Mode 1 0 Probe is in DP1 1a mode 12 Pixel Not Recognizer 1 1 Pixel is detected with wrong color 11 Event Code 8 Describes packet type signal event or 10 3 error event spare 3 2 0 spare 2 A3 16 15 Data Present 3 2 1 0 4 1 lane data byte is present 14 11 LOS 3 2 1 0 4 1 lane loss of signal 10 7 Lane 0 Invalid 1 17 8b10b error 6 Lane 0 Command 1 1 Control symbol 0 Data symbol 5 Lane 0 Data 7 3 5 8b decoded value 4 0 Lane 0 Data 2 0 3 8b decoded value A2 16 14 Lane 1 Invalid 1 1 8b10b error 13 Lane 1 Command 1 1 Control symbol 0 Data symbol 12 Lane 1 Data 7 0 8 8b decoded value 11 4 Lane 2 Invalid 1 1 8b10b error 3 Lane 2 Command 1 1 Control symbol 0 Data symbol 2 Lane 2 Data 7 6 2 8b decoded value 1 0 Lane 2 Data 5 0 6 8b decoded value A1 15 10 Lane 3 Invalid 1 17 8b10b error 9 Lane 3 Command 1 1 Control symbol 0 Data symbol 8 Lane 3 Data 7 0 8 8b decoded value 7 0 Clock is on A1 bit 16 Event Code symbol definitions mode v1 1a Event Code Symbol Bit 8 Bit 7 Bit 6 Bit Bit Bit Bit Bit 1 Bit 0 Err bits Err bits Video Field Mismatch 0 F
28. he pre defined symbols described earlier There are Triggers for both the DisplayPort analyzer and the AUX channel analyzer Offline Agilent Logic Analyzer Agilent AUX_4 ala Overview OB SS File Edit View Setup Tools Markers Run Stop Overview Window Help 8 x iD a E S th uM TQ jH Ta ita T EVA AER Milito MZ 4 475 ns DisplayPort 4 Inverse Assembler B Preferences DisplayPort BI DisplayPort i p Analyz Probes Modules Tools Windows Default Storage B DisplayPort 5 Listing GI s Overridden by store actions in individual trigger steps 5 store BusfSignal Default Store High Stepi Y Findpattern n times Serien If s BusiSignal wj Event Code Albts v TH occurs 1 c time Then Trigger and fill memory with Default Storage Bebe O Peachtr Inbox A Adobe fim2Win Offline EJ 2 micr noreM e Remember to always use conditional storage for either DisplayPort or AUX This is because the probe s clock is free running and the Storage bit is used to qualify what is sent to the logic analyzer modules e The Event Code field makes it easy to trigger on particular packet types To capture specific traffic use the channel signals that can assist in identifying the activity that you want to capture For example to capture training use the signal TRAIN which goes high during training activity Turning off descrambli
29. he probe The following is a general outline of the steps to be taken when probing a new link Read the following pages for more specific information The FS4439 preprocessor requires the understanding and correct set up of 4 different systems before a trace should be taken These systems are 1 Probe Manager software The software has two installation exe programs associated with it one to load the USB drivers needed to establish USB connections between the probe HW and the Probe Manager program and the other is to install the Display Port 1 2 Probe Manager GUI program The USB driver should be installed first All installation programs are located on the CD that comes with the FS4439 The USBXpress software is identified as USBXpresslnstaller exe and the Probe Manager software is identified as DisplayPort12 probe XXX exe where XXX indicates the PC s OS The Probe Manager GUI program is supported on the Windows XP or Windows 7 OS and has a separate installation program for each OS The appropriate installation program must be executed for the OS on which the program will be loaded onto Install SiLabs Driver Run the USBXpresslnstaller exe program that is located on the CDROM disk to install the USBXpress driver that provides the USB connection to the probe HW Install Probe Manager Software On Windows 7 PCs Run the DisplayPort12 probe manager 7 exe program that is located on the CDROM to install the DP 1 2 Probe Manager GUI so
30. ical Blanking MSA MSA Vertical Blanking Audio Stream O O O O O OO OoO odococ ooco oo ojojo o o O O OJ O OJO O O O JO l o o o o ojo ojo olo OOOO OC A A A A A ef o o Oo Coo o Ol 2 a2 2 O O Ol a a2 a O O O Ol 2 O O O O Ol2 ala Ola ax ojojojojo ojojo jojo x x o o o oO OX OO OX DOK x X Audio Stream Vertical Blanking Audio TS Vertical Blanking Reserved Reserved Audio TS Vertical Blanking Extension ojojojojolo ojojojojojo A 32 WEN O ojojoiloj o lo ol o O O O ojojojojojo ojojojojojo Extension 0 0 X 1 0 1 1 0 0 Vertical Blanking Info Frame 0 0 1 1 1 0 0 0 0 Info Frame 0 0 X 1 1 0 0 0 0 Training 1 X X X X X X X X v1 2 SST mode Logic analyzer signals per pod Field Bits Definition Pod Bits Storage 1 17 store A4 16 Error bits 2 0 3 Error bits 15 13 Probe Mode 1 1 Probe is in DP1 2 mode 12 VC Tag 2 0 3 Virtual Channel tag bits 11 9 000 Probe is in SST Mode Pixel Not Recognizer 1 1 Pixel is detected with wrong color 8 Event Code 8 Describes current state or packet type 7 0 not applicable 6 not applicable bits are driven low A3 16 11 LOS 3 2 1 0 4 1 lane loss of signal 10 7 Lane
31. improper site preparation or maintenance NO OTHER WARRANTY IS EXPRESSED OR IMPLIED FUTUREPLUS SYSTEMS SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE THE REMEDIES PROVIDED HEREIN ARE BUYER S SOLE AND EXCLUSIVE REMEDIES FUTUREPLUS SYSTEMS SHALL NOT BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY Product maintenance agreements and other customer assistance agreements are available for FuturePlus Systems products For assistance contact Technical Support How to Use This Manual Definitions Introduction This manual is organized to help you quickly find the information you need e Analyzing the DP Bus chapter introduces you to the FS4439 and lists the minimum equipment required and accessories supplied for DP bus analysis e The State Analysis chapter explains how to configure the FS4439 to perform state analysis on your bus e The General Information chapter provides information on the operating characteristics and cable header pinout for the FS4439 probe The following terms are used to describe aspects of the DP bus e Lane One differential signal 2 wires e Link One set of up to 4 DP lanes The FS4439 handles 1 DP and 1 Aux link e SST Single Stream Traffic MST Multi Stream Traffic Probe Function Overview The FS4439 probe is capable of connecting to DisplayPort l
32. inks running in any of three modes v1 1a v1 2 SST v1 2 MST at 3 link speeds 1 62 2 7 and 5 4 Gbps FS4439 Input Output and Communication in all modes 8b10b Decode amp serial to parallel conversion of serial links 1 2 and 4 lane to 5 4 Gbps Support of two probe cable types interposer and flying lead No Reference Clock from Target required Serial link input polarity controllable for each lane lane inversion 8b10b Error Counting indicates signal quality in each lane and is displayed in the log file DDR State processing on 1 10 recovered link clock to logic analyzer 4 Bi color LED Display shows status of each lane Field upgradeable Flash Memory Aux Port Processing in all modes Delivery of probed Aux data to Logic Analyzer Pod connectors with single SDR state clock Probing of Hot Plug Detect HPD and display status to Logic Analyzer Hi speed Link Processing similar functions in all modes Lane Deskew with ability to tailor the individual DP1 1a SST and MST deskew functions Training Detect status to Probe Manager and Logic Analyzer Pods different patterns for DP1 1a amp 1 2 Modes Data Descrambling which may be enabled disabled Nibble swapping on all secondary packets excluding unprocessed MST streams Event Decode different code tables for 1 1a amp 1 2 Modes excluding unprocessed MST streams Pixel Not Recognizer 1 recognizer in DP1 1a or SST Mode 4 Recognizers in MST Mode Filter 1 Filte
33. ion data scrambling and lane reversal which need to be defined in the Probe Manager in order for the preprocessor to capture data properly It is strongly recommended that the user methodically proceed in the following manner when setting up the probe There is more detail on each step on page 17 1 Load the USB driver Installation software into the system that the Probe Manager software will run on 2 Load the Probe Manager software USBXpressInstaller exe and FS1195 AUX exe files on the PC and or logic analyzer 3 Configure merge the logic analyzer modules as required and run the Keysight Logic analyzer s internal diagnostics If the analyzer passes then make the appropriate target probe connections to the FS4439 probe and from the probe to the Keysight logic analyzer Use the Properties button on the probes shown in the Overview screen of the Keysight application for guidance on connecting the cables 4 Connect the appropriate probing cable s to the target system power up the probe Wait until the Green ready light appears on the FS4439 This can take up to 20 seconds after power has been applied to the probe 5 Open up the Probe Manager application and select the appropriate settings for the probe cable being used and the target link Check that the expected Pad assignments for the probed link show green For the first capture turn off all the filters It is recommended that the first capture be run at HBR rate 2 7Gbps
34. is the ground connection NOTE These signals cannot see voltages higher than 4 VDC or there is a risk of damaging the preprocessor The KOV for these cable headers is shown below The mating 3 pin header is part number Through hole Samtec TMS 103 02 S S Surface mount Samtec FTR 103 02 S S DisplayPort Auxiliary Channel MUST be plugged in correct orientation Pin 1 Pin2 Pin 3 DP AUX P NC DP AUXN DisplayPort Hot Plug Detect Pin 1 Pin2 Pin 3 DP HPD GND NC Installing your The following outlines the software installation procedure when using the preprocessor for the first time Please do not attach the preprocessor to the analyzer or computer that will dd for the First be controlling the preprocessor until told to do so ime 1 Place the software CD that came with the product into the logic analyzer or computer that you will be installing the software on In the case of a machine that does not have a CD drive the machine will either have to be put on a network and the files loaded remotely or the CD files can be transferred from a USB drive 2 Navigate to the installation CD using Windows explorer and install the following files in this order a Silabs USB driver installation software folder USBXpressInstaller exe b DisplayPort12 probe manager 7 exe Win7 version vs XP version c FS1195 and AuxPort1 2 exe Protocol Dis assembler Win version vs XP version 3 O
35. ive For warranty service or repair this product must be returned to the factory Due to the complex nature of the FS4439 and the wide variety of customer target implementations the FS4439 has a 30 day acceptance period by the customer from the date of receipt If the customer does not contact FuturePlus Systems within 30 days of the receipt of the product it will be said that the product has been accepted by the customer If the customer is not satisfied with the FS4439 they may return the FS4439 within 30 days for a refund For products returned to FuturePlus Systems for warranty service the Buyer shall prepay shipping charges to FuturePlus Systems and FuturePlus Systems shall pay shipping charges to return the product to the Buyer However the Buyer shall pay all shipping charges duties and taxes for products returned to FuturePlus Systems from another country FuturePlus Systems warrants that its software and hardware designated by FuturePlus Systems for use with an instrument will execute its programming instructions when properly installed on that instrument FuturePlus Systems does not warrant that the operation of the hardware or software will be uninterrupted or error free The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer Buyer supplied software or interfacing unauthorized modification or misuse operation outside of the environmental specifications for the product or
36. ks are made on all KChars and the VBID MVID and MAUD fields V err MVID Check This error is detected when the no video bit is set in the VBID and the MVID field is not 0 A err MAUD check This error is detected when the audio mute bit is set in the VBID and the MVAUD field is not O Missed SR In 1 1a or SST mode There is a BE counter on each of the four lanes If 512 BEs are received without receiving an SR on any lane the Missed SR error is asserted In MST mode SR Control Symbol inserted in MTP Header time slot every 1024 MTP as a Link Frame boundary marker resulting in SR insertion interval of 2 16 time slots So every 1024 multi stream transport packet header is replaced with an SR or every 65536 time slot This SR is for a link frame boundary marker Aux Group Aux Port is a half duplex bi directional channel between DisplayPort transmitter source and DisplayPort receiver sink It consists of 1 differential pair transporting self clocked data The AUX CH supports a bandwidth of 1Mbps The DisplayPort Source Device is the master also referred to as AUX CH requester that initiates an AUX CH transaction DisplayPort Sink Device is the slave also referred to as the replier is the device that responds to the transaction Aux channel has its own clock 67KHz so that it can be clocked into separate modules in the LA on a separate clock domain It also has its own Inverse Assembler that has to be loaded separately
37. nce all the above files have been installed connect the FS4439 to the analyzer computer via the USB port Power on the FS4439 probe Once all the previous steps have completed all necessary software as well as USB drivers will be installed This procedure only needs to be done on initial install You may now go to the desktop and click on the DisplayPort 1 2 icon to start the probe manager f you are installing on a PC to only control the FS4439 then you can omit the installation of the FS1195 and AUX exe but you must follow the rest of the steps For instructions on loading system files please refer to the section on loading system files later in this manual Connecting the Keysight logic analyzer to the FS4439 The FuturePlus Systems FS4439 connectors are designed to connect directly to the 90 pin header cables on the appropriate Keysight logic analyzer cards as shown below DP 1 2 Main Link DP 1 2 Aux X1 X2 X4 Channel 5 4 GB s Probe Clock Max 540 MHz 67 KHz Frequency 16753 756 P 4 pods 16950 4 pods 16962A 4 pods 4 pods U4154A 4 pods 4 pods Transitional timing Logic Analyzer FS4439 Comment High Speed Card 1 Pod 1 P1 Clock 2 P2 3 P3 4 P4 AUX Card 2 Pod 1 P5 Clock 2 P6 3 P7 4 P8 When probing a single direction of an x1 x2 or x4 link the FS4439 drives 4 pods of signals to the logic analyzer It is important that before you load a system file you initiate a self test on all your modules installed in
38. ng when looking at training will properly display the K characters Acquiring Data First insure that the FS4439 is attached to its external power supply and configured which would be indicated by a green Ready LED Open up the Probe Manager software and insure the appropriate selections are made and applied finally make sure that the preprocessor is connected via the appropriate cable s to the target system Once connected with the link active open up the Probe Config window and select cable type lane width and reference clock options Verify that lane activity indicators show activity at the correct lanes Run the probe and observe the LEDs Link Status Meaning LED color Green Lane OK Dark Lane not active or Probe stopped Orange Data Invalid 8b10b error Red RX Error loss of sync or PLL lock If a lane s LED is red then there may be a need to select different options for lane width lane reverse or lane inversion in the Probe Config window If a Lane s LED is Orange that indicates some level of Data errors on the link Check Log file for a count of the errors BER for a DP link is specified as 10E 9 which at HBR2 5 4Gbps allows more than 5 errors every second All transient events such as a single bit error or a packet clocked into the analyzer are stretched to short visible pulses on the LEDs We have seen significant sensitivity on HBR2 links to Source settings and the cable used between the S
39. ource and Sink We recommend the following steps if Lane LEDs are Orange 1 Use the 2m DP DP cable provided by FuturePlus with the FS4439 2 Increase the HS lane signal swing from the DP source 3 Adjust the Serdes settings in the Probe configuration form of the Probe Manager The FS4439 should show a green Signal LED of any Link being probed Configure the analyzer trigger menu to acquire data Select RUN and as soon as there is activity on the bus the logic analyzer will begin to acquire data The analyzer will continue to acquire data and will display the data when the analyzer memory is full the trigger specification is TRUE or when you select STOP The Inverse Captured DP data is as shown in the following figure which displays the decoded protocol Assembler using the Inverse Assembler Offline Agilent Logic Analyzer MgilentUPOneLaneFillteredBlankingAndPixelData ala DisplayPort Listing BA EE rie Edit View Setup Tools Markers Run Stop Listing Window Help E x Dc Ee Aaa HTA SS ined lra d e EVV AS e MI to M2 19 868 us Sample Number Protocol Decode Event Code Lane Lane1 Lane2 Lane3 LOSK y Vertical Blanking MSA__ v v v s hi 1BC ooo E O11 ooo T Blanking MVID C noo f Blanking M ooo H nt Pro nt Pro um Elankir VB a Doo li lanking MVID 0 4 000 1 Los oP 2 000 B lt gt Overview E DisplayPort Listing E DisplayPort Waveform E AUX Listing
40. peration of the FS4439 in this mode will match the VESA Protocol specs for v1 1a on links of x1 x2 or x4 at either 1 62 or 2 7 Gbps The Configuration selections are shown below Note there is no Config required for Aux signals The functions provided on this screen include e Selection of the Probing Cable type and Lane Width e While the preprocessor is stopped signal activity indicators are provided on each channel Signal presence is indicated by an up down arrow symbol and a lack of signal presence is indicated by a flat horizontal line symbol When the probe is in Run mode signal activity is indicated by green or red no activity e Selection of Lane Reversal on each link e Link Lane Descramble On or Off e Hot Plug Cable HPD Connection If Connected is selected then Aux decode requires the HPD signal for operation e Selection of Link rate either 1 62 or 2 7 Gbps e Selection of Toggle mode When activated the preprocessor output signals to the logic analyzer pods and the link status LEDs are toggled Mode 1 1a Filter functions are provides the user with a comprehensive suite of predefined filter functions to apply to the high speed Link These filters are state based which means that the event has to occur on all active lanes for it to be filtered Display Port 1 1 Filters Filtering out unwanted traffic such as dummy data symbols can extend the storage capabilities of the logic analyzer Filtering out ir
41. r in 1 1a or SST Mode 4 Filters in MST Mode excluding unprocessed MST streams Error Detection DP1 1a Mode 4 sources 1 LAI bit DP1 2 Mode 6 sources 3 LAI bits Restart Logic allows probe to operate and continue capture through target reboots Functions unique to DP1 2 SST mode Additional Training Patterns Additional Secondary Packets Functions unique to DP1 2 MST mode Control Symbol Descrambling Time Slot Counter 6 bits to Logic Analyzer Pod Connectors Processes any set of 4 Virtual Channels remaining VCs are flagged as un processed MST Mode VC Tagging 4 Selected VCs with 3 bit tag to Logic Analyzer 4 Probe Stream Processors to handle any 4 user selected Streams Virtual Channels o Event Decode o SDP nibble swap o Pixel not recognizer o Filter MTP Header processing and checking MST Mode VC Payload Demux and VC Payload Re mux functions Accessories Supplied Minimum Equipment Required Analyzing the DP Bus This chapter introduces you to the FuturePlus Systems FS4439 preprocessor and lists the minimum equipment required for analysis The FS4439 is a DP State Analysis preprocessor The preprocessor can connect to the target by either a cabled interposer or flying leads The sideband signals such as AUX and HPD connect to the probe using separate cables The preprocessor itself is controlled by the Probe Manager software which runs under Windows and communicates with the preprocessor via a USB cable The
42. relevant bus traffic can help users focus on specific packets of interest To filter out any particular traffic type click on the appropriate box so a Y appears and click apply You must restart the preprocessor by pressing the green run button so the new values will be written to the preprocessor hardware When Decode Pixel States is selected in the Protocol Decoder Preferences then you cannot filter Control Symbols Non Uniform Pixel Identifier The purpose of this tool is that it is to be used when the pixel values are all expected to be a single value which the user sets in the form shown below The FS4439 will produce a Trigger if it sees any Pixel value that is NOT Equal to the set value Display Port 1 1 Non Uniform Pixel Identifier Log File Once started logging continues even if the preprocessor is stopped and started or if the log window is closed and re opened The log file will not repeat an error that repeats itself constantly Once a preprocessor has been stopped the log entries can be written to a file of the user s choice by clicking the Write Log File button ca r _ DP 1 2 Mode SST amp MST Probe Manager functions There are several changes to the Probe Manager Screens when DPv1 2 mode is selected The Probe Configuration screen has the following changes Display Port 1 2 MST Probe Configuration I Probe SERDES adjustments are used to tune out Receive errors shown as Orange LEDs on
43. s Log Save As Save Exit e Load File Displays an open file dialog in which the user may navigate to and open the file contains a previous session s saved probed settings e Save As Displays a save file dialog in which the user may specify where a preprocessor settings system file may be saved e Exit Shut down the application Edit Al Display Port 1 1 Pixel Filters Log e Modify Title String Allows the user to specify the title string that appears in all sub dialog s title bar This is helpful when running multiple probes Run Stop El Display Port 1 1 File Edit Help gt E Run Probe Mgr Run Stop Stop Probe Mgr e Run Probe Mgr Running the preprocessor with the current settings This is an alternative to clicking the tool bar Run button e Stop Probe Mgr Stop the probe This is an alternative to clicking the tool bar Stop button Help El About Probe Mgr Gen 2 FuturePlus Systems Corporation Probe Mar Gen M sisi TOT OUO DLL Version 1 00 0000 FPGA Version 0 Copyright FuturePlus Systems 2012 e About DisplayS version numbers for the Probe Manager application and FPGA configuration The Probe Manager application provides different selections to the user based on the Mode Selection Mode that the FS4439 Probe is set to run The sections of the User manual that describe the configuration and use of the probe Manager are organized by Mode DP 1 1a Mode O
44. the front panel of the FS4439 These adjustments are for use at HBR2 only The DFE setting may provide the most effect If the default settings do not work we would recommend adjusting DFE up to about 0A as a Stating point e Receive EQ is set at 2 hex the range for the setting is from 0 7 e DFE is set at 07 hex the range of values 0 1F This adjustable on a per lane basis to allow for SI variation between lanes ASSR Alternate Scrambler Seed Reset Enabling this function changes the LFSR reset value used on an SR from FFFF to FFFE This is a function that is optional in eDP VC Virtual Channel Payload Time slots In MST mode only the v1 2 spec allows for video display information to be broken up into 64 Payload Time Slots that are assigned to the individual video streams VCs that are being carried on the DP link This dialog allows the user to assign each possible Time Slot to any of the up to 4 video streams that the FS4439 probe will capture and decode The information relating the VCs to each Time slot can be determined from the AUX channel State listing for registers at addresses 001C0 2h and 002C0 FFh Tag Only Mode This disables the VC Stream processors and applies VC Tags 1 4 The Filter Function has the following changes for v1 2 SST mode based on additional secondary data packet types and Training patterns that were added to the DP specification Display Port 1 2 SST Filters BEES BEE Lal
45. zontal VBID 0 0 0 1 Vertical VBID 0 1 0 1 Horizontal MVID 0 0 0 0 Vertical MVID 0 1 0 0 0 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 Horizontal Audio Copy Mgmt Pkt o l5 3loloa loloa5 oloxxxixaloioo oo oiN Y Vertical Audio Copy Mgmt Pkt Horizontal ISRC Packet Vertical ISRC Packet Horizontal VSC Packet Vertical VSC Packet Horizontal Ext Packet Vertical Ext Packet Horizontal Info Frame Vertical Info Frame Horizontal Reserved Vertical Reserved SF VCPF RG MTP Header 0 MTP Header not SR 0 or ACT ojo x xjojojojojojojojojojojo aluialaiaialOlOlaiaiOlO a a aluialaziOlOlalalajajaoia alalO O a O O O JOJO 2 OjO O JO afajojojojo 2f a OjO JO JO O Olalolu i alaxjolojolOj l 2 2 O l ajO a O OjO OJO OJO O MTP Header ACT o o o o Unprocessed VC ojo Ol Error detection Error Type DP1 1a Mode SST Mode MST Mode Analyzer Interface Analyzer Interface Analyzer Interface Data Error ErrorBit 2 0 ErrorBit 2 0 No Error 0 000 000 Mismatch 1 001 001 V err MVID Check 1 010 010 A err MAUD check 1 011 011 Missed SR 1 100 100 Any Invalid NA 101 101 Loss of Sync NA 110 110 Mismatch This error occurs when there when the KChar or configuration fields of the active lanes don t match Chec
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