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1. 00100 98 V793x MUTx 00 V793_REV0 DOC 19 2 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 LIST OF FIGURES FIG 1 1 BLOCK DIAGRAM OF THE MODEL VI 5 E1G 2 1 MODEL V793 FRONT PANEL ne nt ere EE ee HARE HUE EE Ue eek epe R dees oleate 9 FIG 2 2 PIN CONFIGURATION OF MODEL V793 BACKPLANE CONNECTORS essent nnne entrent 11 BIG 2 3 2 JUMPERS LOCATION itte e e ee vedete dien e y et n RR Een 13 FIG 2 4 RS232 PORT CONFIGURATION ss 14 FIG 3 1 DACS VALUES AND LINES STATUS WITH RS232 0 15 FIG 3 2 V793 SETTING MENU WITH RS232 EEN 16 FIG 4 1 V793 CARNET CONTROLLER USER INTERFACE ee 18 LIST OF TABLES TABLE D POWERREQUIREMENTIS 5er entire e Re ee ehe ERR QURE E Eeer 8 TABLE 3 1 RS232 PORT SETTINGS c eR e ERREUR e EF on weed oes CARTER ee De esa 15 NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793 REVO DOC 19 3 E Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 1 General description 1 1 Overview The CAEN Model V793 board has been designed for the slow control via either RS232 or CAENET communication path of the analog crates into the ICARUS experiment acquisition chain Each ICARUS analog crate can be equipped with a Mod V793 and up to 19 Mod V791 boards The Mod V793 main functions are Generate the EN BRD logic signals to en
2. B4 EN B5 EN B6 LJ e EN B7 EN B8 e EN B9 EN B10 EN B11 X EN B12 EN B13 EN B14 EN B15 EN B16 EN B17 S EN B18 e EN B19 C TEST e HV1 N HV3 mm e gt o a e a L e L L e L L AGND AGND e ENA E T PLS E ENA O r pis Fig 2 2 Pin configuration of Model V793 backplane connectors NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 11 CAEN Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 2 4 2 Front panel connectors SERIAL IN OUT Mechanical specifications two bridged LEMO 00 type connectors for daisy chaining Electrical specifications CAENET signals see 4 for further details CLK I O Mechanical specifications RJ45 type connector Electrical specifications LVDS 40 MHz clock signal RS232 Mechanical specifications 9 pin D type connector Electrical specifications RS232 signals see 3 for further details PULSE IN Mechanical specifications LEMO EPG OB type connector Electrical specifications differential test pulse 2 5 V range 2 5 Displays and switches STATION NUMBER 2 digit thumble switch Function it allows to select the CAENET station number CE red LED Function it lights up if the CALIB EVEN line is active CO red LED Function it lights up if the CALIB ODD line is active EE red LED Function it lights up if the ENAB
3. CAL E DRV 4 DAC 1 8 DAC1 4 DAC2_8 DAC2 4 m EN B4 EN B12 C TEST CNT 1 DAC1 3 CNT 1 DAC2 3 p EN B3 EN B11 EN B19 CNT_O DAC1_2 CNT D DAC2 2 EN B2 EN B10 EN B18 DAC1 1 DAC2 1 LSB EN B1 EN B9 EN B17 DAC1_0 DAC2 0 fx if EN_BRD bits are active low SCH 75 J ECKCKCKCKCk kk Ck Ck Ck Ck Ck Kk Ck Ck kk Ck Ck kk CK Ck kk KK kk CK Sk Sk Ak kk kk Ck kk ck k ck ck ck ck ck kck ck kokokok ck ck kx x f KK KR kk Ck Ck Ck KK kk Ck kk Ck kk CK Ck kk Kk Ck CK kk I kk CK kk Ck kCkok kc kc kc kck ck kckokck ck ck ck ck ck ko ko kk f The message sent from the CAENET Controller has the format iu fe ere MASTER IDENT 1 XL CRATE NUMBER XX X OPERATION CODE Wi L byte high byte low y jp 0 0 module identification TAA 0 1 gt set V793 status XI 0 2 gt get V793 status Ex fe A Code 0 1 is followed by these bytes EJ fx ADC O status 0 en brd 8 1 A f ADC 1 status 1 en brd 16 9 y p ADC 2 status 2 A764 O E V791 O E C en brd 19 17 fe ADC 3 status 3 gt DRV_1 4 X X X X ADC 4 status 4 gt DAC1_11 8 CNT1 CNTO X X X T ADC 5 status 5 DAC1_7 0 p ADC 6 status 6 gt DAC2 11 8 CNT1 CNTO X X XL ki ADC 7 status 7 DAC2 7 0 SE X ANSWER CODE 0 gt OK aA pe FF00 module busy EA FF01 wrong code or incorrect message XI ZS S fe y Code 0 2 gives back
4. OFF DRV 3 OFF DRV 4 OFF Dacl 300 DACZ b 00 Backplane C TEST Disabled CAENET Station Number 31 Press Enter for new display 8 for Setting Menu Fig 3 1 DACS values and lines status with RS232 NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 15 CAEN Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 To modify any parameter press the S key the following Setting Menu will be displayed V793 Setting Menu Set Enable Board 1 19 hex lt 0 7FFFF gt Set V791 Test Lines O E hex lt 0 3 gt Set A764 Test Lines O E hex lt 0 3 gt Set DRV Outputs 4 1 hex lt O F gt Set DAC1 Output hex lt FFF gt Set DACZ Output hex FFF Enable C TEST Line 0 1 Test Enable Lines Test DAC1 amp DACZ Lines 1 2 3 4 5 6 3 T D Fig 3 2 V793 Setting Menu with RS232 Press 1 to set the EN BOARD lines status write the pattern of inhibit 0 7FFFF hexadecimal then press CR the LSB corresponds to the EN BRD1 line status Press lt 2 gt to set the V791 test lines status write the pattern of inhibit 0 3 hexadecimal then press CR the LSB corresponds to the CALIB EVEN line status Press lt 3 gt to set the A764 test lines status write the pattern of inhibit 0 3 hexadecimal then press CR the LSB corresponds to the ENABLE EVEN line status Press 4 to set the detect
5. the bytes sequence indicated above TUE preceded by the answer cod XL CNT1 enables test pulsing on the V791 NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 19 CAEN Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 CNTO enables test pulsing on the A764 J RCKCKCKCKCK Ck kk KKK kk Ck KK Ek Ak KK CK KK Kk Sk kk kk kk Kk kk ck ok ck ck ck kckckckokokokckck ck ck ck ko k kk x NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 20
6. 01 0 TRANSMIT RECEIVE Fig 2 4 RS232 port configuration NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 14 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 3 RS232 Interface The Mod V793 can be remotely controlled by a standard PC running a terminal emulator program via the RS232 port The default settings of the RS232 interface are as listed in Table 3 1 while the RS232 pin assignment is given in Fig 2 2 Table 3 1 RS232 Port Settings Baud rate 9600 Parity Character length Number of stop bits Flow control XonXof Connect the V793 to the PC RS232 serial port please refer to 8 2 6 for TX RX pin assignments and then run the terminal emulator program By sending a CR from the terminal the V793 DACs values the voltage measured by the ADCs on the CON HVT A DGND 5VA 5VD and 5VA lines the CAENET station number and the Enable Test and DRV lines status will be displayed on the screen as illustrated in the figure below V793 Version 2 0 CON HVi DGND 1 44V CON HV2 1 50V CON HV3 0 96V CON_HV4 D 18v 5VA 5 18v 5VD 5 19v 5V Enable board Status 19 318 17 16 i5 14 13 12 AL 10 9 8 7 6 5 4 3 2 OFF OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF OFF OFF Test Lines Status V791 E ON Vv 91 o OFF A764 E OFF A764 O OFF DRV Lines Status DRV 1 OFF DRV 2
7. 1 boards the DC levels can be remotely programmed with 12 bit resolution on the 0242 5 V range either via RS232 or CAENET interface For each V791 board it is possible to select the baseline DAC1 or DAC2 according to the type of signal to be converted by acting on a backplane jumper 1 3 2 EN BHRD signals generation The Mod V793 is able to generate the EN BOARDJ 1 19 TTL signals which allow to enable disable each of the V791 boards within an analog crate If the EN BOARD n signal is active the n th V791 board is forced into reset state and signal digitisation is stopped The EN BOARD signals can be remotely programmed either via RS232 or CAENET interface 1 3 3 Clock signal generation The Mod V793 houses a 40 MHz quartz oscillator producing an LVDS differential clock signal CLOCK CLOCK this signal is employed to synchronise data acquisition on all the V791 modules in a crate The clock signal can be also externally supplied via the front panel CLK I O connector The internal external clock selection is performed through the JP8 jumpers see 2 6 for further details 1 3 4 Detector and crate power supply voltages measurement The Mod V793 houses eight 8 bit ADCs dedicated to detector and crate power supply voltages measurement on the relevant backplane lines see table below The ADCs can be read out either via RS232 or CAENET interface conii s25v eno sosv 5d CON HV3 5 V ANALOG CON DN 5 V ANALOG Fil
8. 6 01 01 0 793 CAENET Controller V793 CARNET EJN CONTROLLER cann E Station Number Ack v EN BRD1 EN BRD2 FEE AC 2 50 CON HV1 v EN BRD3 EN BRD4 2 50 CON HM 4 Cm EN BRD6 V EN PED 2 30 CON HV3 EN BRD8 TEST 791_E v EN_BRDS FF TEST V781 O 2 24 CON HV4 TC EN BRD10 v EN BRD11 TEST A764 E EN BRD12 TEST A764 O 4 86 5VA v EN BRD13 EN BRD14 TEST C 4 86 5VD v EN BRD15 EN BRD185 v DRY 1 V EN BRD17 Iv DRV 2 5 52 SV EN BRD18 v DRV 3 E V EN BRD19 v DRV 4 0 12 DGND Fig 4 1 V793 CAENET Controller User Interface NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 18 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 APPENDIX A Here follows a short description of the V793 status array bits and of the CAENET communication data packet exchanged with the Controller J ECKCKCKCKCkCkCkCk Ck Ck Ck kk kk Ck kk Ck Ck CkCK CK Sk Sk Sk KK kk KC Ak Ee AAA ee ck ck ck ck ck kokokok ck ck kx x f UA Meaning of the V793 STATUS array bits X f xy MSB st 0 st 1 st 2 st 3 st 4 st 5 st 6 st 7 pE EN B8 EN B16 ENA_O DRV 1 DAC1_11 DAC1_7 DAC2 11 DAC2 7 y EN B7 EN B15 EMA E DRV 2 DAC1_10 DAC1_6 DAC2 10 DAC2 6 EN BG EN B14 CALO DRV 3 DAC 1 9 DAC1 5 DAC2 9 DAC2 5 TE EN B5 EN B13
9. C type A B C lines DIN41612 standard connector Electrical specifications EN_BRD1 EN_BRD19 ENABLE EVEN enable signals for the V791 boards TTL level ENABLE ODD test pulse enable signals for even odd A764 channels TTL level s CALIB EVEN CALIB ODD test pulse enable signals for even odd V791 CLOCK CLOCK TEST_PULSE channels TTL level differential clock signal LVDS level TEST_PULSE differential test pulse to A764 s T_PULSE T_PULSE differential test pulse to V791 e AGND analog ground DGND digital ground e 5VD 5V for the digital section e 5V A 5V for the analog section e DV A 5V for the analog section BACKPLANE CONNECTOR P1 CON HV1 CON HV4 TEST C DAC1 DAC2 Mechanical specifications 32x2 pin C type A C lines DIN41612 standard connector Electrical specifications NPO 00100 98 V793x MUTx 00 AGND DRV 1 DRV 4 Filename V793 REVO DOC monitor lines for detector HV power supply 2 5 V range TEST C signal TTL level programmable baseline for the V791 boards analog ground detector test pulses Number of Page pages 19 10 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 1C 1B 1A CK 5V 5V CK DGND DGND e amp DC1 e LJ AGND A D IN F M N DC2 H CAL O 5VA a CAL E l 5VA e AGND AGND Lj IST P A IST P 5VA e EN B1 EN B2 e EN_B3 EN
10. LE EVEN line is active EO red LED Function it lights up if the ENABLE ODD line is active DRV1 4 four red LEDs Function they light up if the relevant DRV line is active NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 12 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 2 6 Jumpers Please refer to Fig 2 3 for jumpers location J8 CLK input termination e Jumper between pin 2 and 3 termination ON e Jumper between pin 1 and 2 termination OFF JP3 clock configuration e Jumper between pin 3 and 4 the internal oscillator drives the CK CK backplane lines e Jumper between pin 5 and 6 the external clock signal is sent to the CK CK backplane lines These two settings are mutually exclusive e Jumper between pin 1 and 2 the internal oscillator drives the front panel CLK output e Jumper between pin 2 and 4 the clock signal on the CK CK backplane lines is sent to the front panel CLK output These two settings are mutually exclusive JP1 RS232 port configuration Two jumpers allow to exchange the TX and RX pins see Fig 2 4 according to the cable to be used Fig 2 3 Jumpers location NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 13 CAEN Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01
11. MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 2 Technical Specifications 2 1 Packaging 2 2 NPO The board is housed in a 1 unit wide 6 unit high Eurocard standard mechanics The front panel of the Model V791 is shown in Fig 2 1 Power Requirements The power requirements of the board are Table 2 1 Power requirements Power Supply Absorption max 5 V digital 300 mA 5 V analog 150 mA 5 V analog 150 mA The crate must have a low noise linear power supply with separate analog and digital supply sections It is suggested the use of a z filter regulator for the analog section Filename Number of Page pages 00100 98 V793x MUTx 00 V793 REVO DOC 19 8 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 2 3 Front panel CLK 1 0 ICARUS SLOW CONTROL MODULE Fig 2 1 Model V793 front panel NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 9 CAEN Document type Title User s Manual MUT Mod V793 ICARUS Slow Control Module Revision date Revision 16 01 01 0 2 4 External connections 2 4 1 Backplane connectors The backplane connection pin configurations of the V793 module are shown in Fig 2 2 while their function and electro mechanical specifications are listed in the following sections BACKPLANE CONNECTOR P3 Mechanical specifications 96 pin
12. T echnical Information M anual Revision n O 16 January 2001 MOD V 793 ICARUS SLOW CONTROL MODULE NPO 00100 98 V 793x MUT X 00 LASER Document type Title Revision date Revision Users Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 TABLE OF CONTENTS Ts SGENERAE DESCRIPTION ee 4 1 1 OVERVIEW EE Sou e EE EE Ee A 1 2 BEOGK BI EE EE 5 1 3 FUNCTIONAL DESCRIPTION eoe te erre REPRE RENE AEN EE ERREUR AE e E EE EEE TENENTE 6 1 3 1 Baseline generation c o RE OUTRE TD RR a a dis 6 1 3 2 ENBRD signals generatioh x eee e tet e e c e ederet eee te decet 6 1 3 3 Clock signal SENET ALON se a e HR RERO FUR Id rre e IUE ea ee iren 6 1 3 4 Detector and crate power supply voltages miedgeuremtent eese eterne tntntntntntntntntnetes 6 1 3 5 Test EE 7 2 TECHNICAL SPECIFICATIONS 0m i en dd 8 2 1 PACKAGING eo ee 8 2 2 POWER REQUIREMENTS i cre css i FR GEO FO OU UR cas D E EURO OUR a UO RERO e 8 2 3 FRONTPANEL AS end ere rU nOn RII RGB 9 2 4 EXTERNAL CONNECTIONS nnn e eerte Eee REC ee RC 10 2 4 1 Backplane T ge eere ne 10 2 4 2 Front panel CONNE CONS eves a t tete eade did ei tended 12 2 5 DISPLAYS AND SWITCHES nn 12 2 6 JUMPERS e a 13 3 SS NTER 5 6 retis SEESE SEES beg etes OSO tee baie HUM REI O de Urbe De TU N O EDD Mee e n TE SESS 15 4 CAENET INTERFACE ee 17 41 FHEV79SCAENEETGONTROLLER rone nn bee OE Re HN A ore ter rite oci retia 17 NPO Filename Number of Page pages
13. able disable the Mod V791 boards Set the acquisition baseline for the V791 boards Generate a clock signal to synchronise all the Mod V791 boards in a crate Measure detector and crate power supply voltages Forward test pulses to the V791 boards to the decoupling boards Mod A764 or to the detector during functional tests Fig 1 1 shows a detailed block diagram of the V793 module The Mod V793 is housed in a 1 unit wide 6 unit high Eurocard mechanics please note that although the module fits in a VME like crate the rear connectors are not VME standard connectors NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 4 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 1 2 Block diagram sem 31 CONTROLLER e gt TESTC gt CAENET Line TEST C ENABLE EVEN CLA to A764 e Ww CAENET ENABLE ODD OUT REG to V791 19 gr EN BRD 1 19 to A764 PULSE IN CLK UO Fig 1 1 Block diagram of the Model V793 NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 5 E Document type Title Revision date Revision Users Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 1 3 Functional description NPO 1 3 1 Baseline generation The Mod V793 generates two DC voltage levels DAC1 and DAC2 which allows to set the baseline acquisition for the V79
14. ename Number of Page pages 00100 98 V793x MUTx 00 V793 REVO DOC 19 6 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 1 3 5 Test pulses distribution During functional tests a differential test pulse 2 5 V range can be injected into the V793 through the front panel PULSE IN connector see block diagram at page 5 the pulse is splitted and then forwarded to the V791 modules or to the decoupling boards depending on the status of the CALIB EVEN CALIB ODD ENABLE EVEN ENABLE ODD lines TTL levels as explained in the table below The lines status is remotely programmable by RS232 or CAENET interface four front panel LED CE CO EE and EO display the lines status At module power on test pulsing is disabled on all channels SIGNAL ENABLE CALIB EVEN z1 Test pulse through T PULSE lines to V791 even channels CALIB ODD z1 Test pulse through T PULSE lines to V791 odd channels z1 Test pulse through TEST PULSE lines on A764 even channels z1 Test pulse through TEST PULSE lines on A764 odd channels Besides this four remotely programmable lines DRV 1 DRV 4 are available to send test pulses directly to the detector The status of these lines is indicated by four front panel LEDs DRV1 4 NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 7 CAER Document type Title Revision date Revision User s Manual
15. or test lines status write the pattern of inhibit 0 F hexadecimal then press CR the LSB corresponds to the DRV 1 line status Press 5 to set DAC1 write the DAC value 0 FFF hexadecimal then press CR FFF corresponds to 2 5 V Press 6 to set DAC2 write the DAC value 0 FFF hexadecimal then press CR FFF corresponds to 2 5 V Press 7 to enable disable the TEST C line write 1 0 then press CR Press T to test all the enable lines front panel LEDs will light up sequentially press CR to exit from the test Pres D to test DACs operation the DACs will generate a saw tooth output between 0 and 2 5 V press CR to exit from the test The DACs values and EN BRD lines status set by the User are stored in memory after module power OFF NPO Filename Number of Page pages 00100 98 V793x MUTx 00 V793_REV0 DOC 19 16 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 16 01 01 0 4 CAENET Interface 4 1 NPO Besides the RS232 interface the V793 can be remotely controlled by a standard PC with an A303A board installed via CAENET interface For details on the A303 board installation and operation please refer to the Mod A303A High Speed CAENET PC Controller User s Manual The V793 CAENET Controller An example program v793caenetexe is available from CAEN FTP site ftp ftp caen it pub DocCaen icarus
16. to control the V793 via CAENET on Win platform The v793caenet exe program requires the A303A to be installed at I O space address hex H280 The full v793caenet exe source code is available from ftp ftp caen it pub DocCaen icarus v793caenet zip For details on the CAENET commands format please refer to APPENDIX A Connect the V793 to the A303A on the PC via a 50 Ohm coaxial cable the CAENET line needs to be terminated on the last board and then run v793caenet exe Insert the CAENET station number according to the thumble switches setting on the module s front panel and then press OK the V793 DACs values the voltage measured by the ADCs on the CON_HV1 4 DGND 5VA 5VD and 5VA lines the CAENET station number and the Enable Test and DRV lines status will be displayed on the screen as illustrated in Fig 4 1 To set any EN BRD line status simply click on the relevant box and then press the Set button to set the DACs value click on the relevant box and insert the desired value hex then press the Set button FFF corresponds to 2 5 V The DACs values and the EN BHD lines status set by the User are stored in memory after module power OFF The voltage measured by the ADCs on the CON HV1 4 DGND 5VA 5VD and 5VA are displayed on the screen Filename Number of Page pages 00100 98 V793x MUTx 00 V793 REVO DOC 19 17 CAER Document type Title Revision date Revision User s Manual MUT Mod V793 ICARUS Slow Control Module 1

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