User Manual for Digital Logic Trainer Kit
Contents
1. 0 High Voltage Low Voltage LED LED Voltage Difference No Voltage Difference Current Flows No Current Flows LED turns on LED does NOT turn on GND _L GND Vss Vss Figure 5 LED Output Configurations Logic 1 Output LED ON Logic 0 Output LED OFF G Row Connectors Each pair row of 2 wire connectors are internally wired together Thus whatever voltage value is seen at one connector hole is present at the other Pair of connectors WITHIN a row are wired shorted together B A C a Desired Circuit b Trainer Board Layout c Necessary implementation connections Figure 6 Wiring Connectors for the Digital Trainer Board H Prototype area breadboard This area provides space for addition of new IC s and allows generic wire connections to be made Each half row of 6 wire connections are internally connected shorted together This means if you wire the output of a gate to ANY connector in the half row all five remaining connection points will see the same output logic value and can be used to connect to inputs of other gates This is necessary when a desired circuit has an output connected to more than two other gates To gate D To gate B Connectors WITHIN a row To gate C are wired shorted together From gate A B A C Each row on each side independent unconne D a Desired b Necessary implementation using the prototyping area Circuit Figure 7 Use of Pr2. F 2 F s y Ff s Pg iF mga P Ja Fj Fip ir c Output connected to b Direct connection input of same gate between Vdd and Vss Figure 4 Improper Board Circuit Connections 5 Exercise 1 Use the board to wire up the following circuit which implements a function F x y z Use the toggle switches to derive the truth table for the output Remember the switch in the off position actually represents logic 1 Looking at the truth table can you figure out what function this circuit is performing Last updated 9 8 2009
3. Pe Mee PS is S Pi s ea ux E 9900000000000000000000000000 s F AT E te i ft w T BF e ERE 1 ie r L L i i T met E 090000000 000000000 p o o HE MM E a CMOCDPPPPDPPDPPPDPPPPLCPPEPCPELCLULDCLLLL ALIA i nO0 o0oh000000000020O0000000020000o0U0 n 1 poris ue ee G Row Conncetors F LED s C Vdd amp Vss Figure 1 Digital Trainer Board PCB 2 Board Components The board components indicated on the figure are described below A DC adapter The adapter is used to provide the power supply to the board Each gate of each chip needs to be supplied with power logic 1 voltage and ground logic O voltage to be able to correctly operate B Logic IC s These chips contain the actual gates circuitry The inputs and outputs of the gates are then wired via the PCB printed circuit board to the connectors Ai B1 Yi Ag B 2 GAD a Logic IC A small notch on the package b Schematic diagram of a 74LSOO quad indicates the top and pin 1 will be to its left NAND gate IC Figure 2 Logic IC s and Schematics C Vdd and Vss Vdd is the name given to the high voltage Vdd 5 or 3 3V value representing logic 1 You may use these Vdd connections as constant 1 inputs to a gate if needed Vss is the name given to the low voltage value representing logic 0 You may use these Vss connections as constant 0 inputs to a gate Logic 1
4. Digital Trainer a oo E E 3 B JS e recu i a i 71 i 1 1 I ooocoono0Do0OcGoOoOoononoouoO ibas p era abDanonnoonooog O 40O0OUQuux dt daig H ideii 2000 04 r j i LL CIPIT TEST TTE TS ET OcO000000000000 z oe o E Em a E T T I Bg i a H esl rl mm mi ooaooooooorooc DARDEEREEDUIJiGentMUE j E lag ta Ore cre ooonoooooonno Goor P T2 FT Fe T TI PE 00000 7Co0000500000000000 5442 51 7 oo Nc Loa Ml s oo ooooOQ0coOoraoooooooooooocoooO od pito paa OO0000 000 J000000000000 o sis E E i l o 60000000000000000000000000000000 4 as Pe Mr qu rece TIE puer T l t pt eae IX p J 1 i ooooooooO0o0o000000000000000000000 oc00000000000000000 a PB Figure 3 Wiring Connections for the Example Circuit in Figure 2 4 Gate Wiring Rules In order to prevent damaging the board and IC s and for failure free operation be sure to follow these rules which are illustrated in Figure 4 a Never connect the outputs of two or more gates together An output of a gate should ONLY be connected to input s of another gate Never try to drive a single input with two outputs This gate may output 1 Same as connecting multiple outputs together Output X This gate may output 0 b Ensure that Vss and Vdd are never connected Vdd 5V directly or i
5. Range Undefined Note 1 If Vss OV then it is the same as Ground or GND Ogee ange Note 2 Logic gates will optimally output Vdd for 1 and Vss GND 0V GND for O but often output a lower voltage than Vdd or higher voltage than GND anything within the allowed ranges of logic 1 or O D Toggle Switches These four switches can be used as inputs to gates However the polarity of the switches is reverse from normal intuition A switch in the on position yields a logic O and the switch in the off position yields a logic 1 Vdd Vdd Vdd SW SW off SW on Logic 1 Logic 0 produced r4 produced Li D x GND GND i GND Vss Vss Vss Figure 3 Toggle Switch Configuration Switch open off Logic 1 Switch closed on Logic 0 E Pushbuttons These 4 pushbuttons can be connected to gate inputs Like the toggle switches their default position produces a 1 and when pushed will produce a 0 PB i default PB X ee d Logic 1 pun Logic 0 produced 4 produced gt GND Vss Figure 4 Pushbutton Configurations Default value Logic 1 Pressed value Logic 0 F LED s Light Emitting Diodes These can be connected to outputs to view whether an output is 1 or O A 1 connected to the LED will cause it to glow Output 1 Output
6. User Manual for Digital Logic Trainer Kit 1 Introduction Figure 1 shows a close up of the logic trainer PCB printed circuit board you will use as an introduction to designing combinational and sequential logic circuits The training board has a variety of basic gates and larger devices built on and pre wired to the connectors of the board To indicate pre wired devices schematic symbols have been silk screened onto the board and show which connectors serve as the inputs and outputs These devices can be wired together to create a custom circuit H Prototyping B IC s Area A DC power adapter Parallax Digital Trainer s oo oo oO 9 s E bu gt o o o o o OOoODOOOOO o9000000 iM ooo oon COOGoCo0000000000 AIL LIO o amp a amp 5 o T E TIL S ase es es x la nn FII r2 amp X ea ME o E ff ort tok e we e Pi se oooooon0ooOoOQoooooooooon0 o ooo oerreee h amp 8B5b 4 Ll D Toggle Switches it amp o m om T s s s m pr re 1 eee eee ke ee eo L st t ee EH E Push Buttons o00000000000000000 900000000 hr E x zie e I eee eee M T of B B Fc Fe PF ee s B B B B B X 8 B B B B M FPEFFEPPPPPPTE l 6 Lite Tas hm Tacs Cer p ig vaoo poo AND E uB cod oor EE ono oo00cOocOcOOOODOOOOOcOODOOODOOOOO0O0O0n p PI mm x amp Ps ert
7. ndirectly This is a short circuit scenario Short Circuit and might end up damaging the power supply and Current circuits GND 0V c Never connect the output of a gate back to its input i e avoid feedback This may cause logic errors and even damage the IC Feedback in a combinational circuit causes unstable unpredictable behavior a1 2 outputs a2 LED input driven by connected together two outputs gate amp switch LIN D i fil 13 ii A il ii LI TET LINT I oj il i Parallax Digital Trainer s 686 oo oo on oo bol oO a oo v oOo os 003 o0 nuo no Lon oo i gt ae oo Do oo D 0 an J AEN Coo 60 loo oo 100 Loo oo 7 oo oo oo oo 0 0 X 1 66 _ oo oo Loo ool oo Loo Loo oo loo oo oo oo a5 O0 on oo oo TE Ee A eo oo oo Oo oo oo oon oo oo oo oo oo oo DIM oo b oo oo oo oo Loo oo o0 oo oo oo ELI ool j oo oo oo 00 oo 00 oo oo TA AY oo oo BOO US JST T LU s eol oo ox eon 2c oa oo joo oo oo oo oo aow ia T oo wh oo LT 1 oo lon T Loo 00 PT Poo ph Loon REE L Bi o amp o0 E eda Odin g L8 vs 2 ia LII oo i OO Fhpricp SLO 0 ood T ut ki Do oo La E u ral og OO e Al oo oo DOL 3 00 oo0 E i on oo oo o0 o0 T a 6G oc g o0 oo L LT oo oo LI i Ll og oo IT i 0045 AP L 7 oo oe oo oo x o O patr 06 c 42 D oo l j oo 9 CY oooooooooooo0n000000600005 M EAS Resol ul
8. ototyping Area 3 An Illustration We now present an implementation of the digital circuit shown in Figure 2 The wiring required to implement this digital circuit on the logical trainer kit has been illustrated in Figure 3 In order to map the components in Figure 2 to the wiring represented by the lines in Figure 3 we have used the same labels that are present on the logic trainer kit In other words the AND gate labeled A in Figure 2 maps to the AND gate A in Figure 3 In order to clarify the connection let us trace out the connections for AND gate A in Figure 2 One input of AND gate A is connected to a toggle switch while the other input is connected to Vdd logic 1 The o p output of AND gate A is connected to the i p input of OR gate C Similarly connections of components AND gate B and OR gate C can be traced out by comparing the connections show in Figure 2 and the actual wiring show in Figure 3 The gray boxes indicate pre wired circuit connections made for you For example one side of SWI is already connected to GND Vss logic 0 the other end has a pullup resistor which defaults it to 0 When the switch is closed on the 0 goes through to the input of the gate When the switch is open the I from the pullup resistor goes to the input of the gate SW GND Vss Figure 2 An Example Circuit LENT Bi ll TNT LTAT Parallax
Download Pdf Manuals
Related Search