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1. notation in a sub expression e g 10 top signalA The hasX attribute lets you search for signals nets or registers that contains an X unknown value See Examples CR 21 below for further details on delayed and hasX ModelSim Command Reference Syntax and conventions Operators Operator Description Operator Description amp E amp boolean and sl SLL shift left logical II boolean or sla SLA shift left arithmetic boolean not srl SRL shift right logical equal sra SRA shift right arithmetic l not equal ror ROR rotate right exact equal rol ROL rotate left exact not equal arithmetic add lt less than arithmetic subtract lt less than or equal arithmetic multiply gt greater than arithmetic divide gt greater than or equal mod MOD arithmetic modulus not NOT or unary bitwise rem REM arithmetic inversion remainder and AND amp bitwise and l lt vector_expr gt OR reduction nand NAND bitwise nand A lt vector_expr gt XOR reduction or OR bitwise or nor NOR bitwise nor xor XOR bitwise xor xnor XKNOR bitwise xnor gt Note Arithmetic operators use the std_logic_arith package ModelSim Command Reference GUI_expression_ format CR 21 Casting Casting Description bool convert to boolean boolean convert to boolean int convert to integer integer convert to
2. Arguments help Displays the command s options and arguments Optional 1 Prints the version of vcom or vlog that each design unit was compiled under Also prints the object code version number that indicates which versions of vcom vlog and ModelSim are compatible This example was printed by vdir l for the counter module in the work library MODULE counter Verilog Version 0z0O ZAV1R1j0 gt KYTg2kY2 Source directory examples projects mixed Source modified time 944001078 Source file examples projects verilog counter v Opcode format 5 4 Beta 4 VLOG EE Object version 17 Version number e VQh7zF_VJYN9MbEXUG_3 Optimized Verilog design root 1 SE 3 SE OE ORE E HE HE Language standard 1 F Prints architecture information for each entity in the output lib lt library_name gt Specifies the logical name or the pathname of the library to be listed Optional By default the contents of the work library are listed lt design_unit gt Indicates the design unit to search for within the specified library If the design unit is a VHDL entity its architectures are listed Optional By default all entities configurations modules and packages in the specified library are listed Example vdir lib design my_asic Lists the architectures associated with the entity named my_asic that reside in the HDL design library called design ModelSim Command Reference verror Syntax Arguments Example ver
3. amp mybusbasename Gathers all signals in the current context whose names begin with mybusbasename sorts those names in descending order and creates a bus with index range n 1 downto 0 where n is the number of matching signals found Note that it currently does not derive the index name from the tail of the one bit signal name concat_range 13 4 amp mybusbasename Specifies the index range to be 13 downto 4 with the signals gathered by name in descending order concat_ascending amp mybusbasename Specifies an ascending range of 0 to n 1 with the signals gathered by name in descending order concat_ascending concat_sort_wild_ascending amp mybusbasename Specifies an ascending range of 0 to n 1 with the signals gathered by name in ascending order VHDL record field support Arbitrarily nested arrays and records are supported but operators will only operate on one field at a time That is the expression a b where a and b are records with multiple fields is not supported This would have to be expressed as a f1 b f1 amp amp a f2 b f2 Examples vhdlsig fieldl vhdlsig fieldl subfieldl vhdlsig 5 field3 vhdlsig field4 3 downto 0 Grouping and precedence Operator precedence generally follows that of the C language but we recommend liberal use of parentheses ModelSim Command Reference CR 18 Syntax and conventions Expression synt
4. lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd if ved file was not invoked See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference vcd dumpports CR 131 vcd dumpports Syntax Arguments The ved dumpports command creates a VCD file that includes port driver data By default all port driver changes and internal variable changes are captured in the file You can filter the output using arguments detailed below Related Verilog task dumpports vcd dumpports direction file lt filename gt in inout out unique lt item_name gt direction Affects both VHDL and Verilog ports Optional Specifies that the port variable type recorded in the VCD header for VHDL and Verilog ports shall be one of the following in out inout internal ports includes in out and inout the default is all ports gt Note The direction argument is obsolete in ModelSim versions 5 5c and later It is supported only for backwards compatibility with an NEC flow See http www model com products documentation resim_ved pdf for information regarding its use in earlier versions file lt filename gt Specifies the path and name of a VCD file to create Optional Defaults to the current working directory and the filename dumpports vcd Multiple
5. vcom explicit example vhd Although it is not obvious the operator is overloaded in the std_logic_1164 package All enumeration data types in VHDL get an implicit definition for the operator So while there is no explicit operator there is an implicit one This implicit declaration can be hidden by an explicit declaration of in the same package LRM Section 10 3 However if another version of the operator is declared in a different package than that containing the enumeration declaration and both operators become visible through use clauses neither can be used without explicit naming ARITHMETIC left right To eliminate that inconvenience the VCOM command has the explicit option that allows the explicit operator to hide the implicit one Allowing the explicit declaration to hide the implicit declaration is what most VHDL users expect vcom work mylib refresh The work option specifies mylib as the library to regenerate refresh rebuilds the library image without using source code allowing models delivered as compiled libraries without source code to be rebuilt for a specific release of ModelSim 4 6 and later only ModelSim Command Reference vdel Syntax Arguments Examples vdel CR 153 The vdel command deletes a design unit from a specified library vdel help verbose lib lt library_name gt all lt design_unit gt lt arch_name gt help Displays the command s opti
6. Multiple levels of a pathname must be separated by the character specified in the PathSeparator UM 355 A single path separator character can be entered to indicate the top level Two dots can be entered to move up one level env Displays the pathname of the current region signal environment env dataset test Changes all unlocked windows to the context of the test dataset env test top foo Changes all unlocked windows to the context test top foo env blk1 u2 Moves down two levels in the design hierarchy env Moves to the top level of the design hierarchy ModelSim Command Reference examine Syntax examine CR 75 The examine or exa command examines one or more HDL items and displays current values or the values at a specified previous time in the Main window UM 145 The following items can be examined VHDL signals shared variables process variables constants and generics e Verilog nets registers and variables To display a previous value specify the desired time using the time option Virtual signals and functions may also be examined within the GUI actual signals are examined in the kernel The following rules are used by the examine command to locate an HDL item If the name does not include a dataset name then the current dataset is used e If the name does not start with a path separator then the current context is used e If the name is a path separator followed b
7. UM 147 file or redirect std out Syntax write transcript lt filename gt Arguments lt filename gt Specifies the name of the output file where the data is to be written Optional If the lt filename gt is omitted the transcript is written to a file named transcript See also do CR 68 ModelSim Command Reference write tssi Syntax Arguments Description write tssi CR 225 The write tssi command records the contents of the List window in a TSSI format file The file contains simulation data for all HDL items displayed in the List window that can be converted to TSSI format VHDL signals and Verilog nets A signal definition file is also generated The List window needs to be using symbolic radix in order for write tssi to produce useful output write tssi lt filename gt lt filename gt Specifies the name of the output file where the data is to be written Required TSSI format is documented in the Fluence TDS Software System Chapter 2 of Volume I Getting Started R11 1 dated November 15 1999 In that document TSSI format is called Standard Events Format SEF If the lt filename gt has a file extension e g listfile lst then the definition file is given the same file name with the extension def e g listfile def The values in the listfile are produced in the same order that they appear in the List window The directionality is determined from the port type if the item is a port ot
8. Use the run command CR 114 with the continue option to continue the simulation run or the resume command CR 113 to continue macro execution If you want macro execution to resume automatically put the resume command at the top of your macro file onbreak resume gt Note If you want to stop the simulation using a when command CR 208 you must use a stop command within your when statement DO NOT use an exit command CR 78 or a quit command CR 107 The stop command acts like a breakpoint at the time it is evaluated bp CR 46 resume CR 113 run CR 114 when CR 208 ModelSim Command Reference CR 124 Commands tb The tb traceback command displays a stack trace for the current process in the Main window This lists the sequence of HDL function calls that have been entered to arrive at the current state for the active process Syntax th ModelSim Command Reference transcript Syntax Arguments Examples See also transcript CR 125 The transcript command controls echoing of commands executed in a macro file it also works at top level in batch mode If no option is specified the current setting is reported transcript lt filename gt off q quietly on Specifies that commands in a macro file will be echoed to the Main window as they are executed Optional off Specifies that commands in a macro file will not be echoed to the Main window as they are executed Optional q Retu
9. lt filename gt Arguments 93 Specifies that the VHDL interface to Verilog modules use VHDL 1076 1993 extended identifiers to preserve case in Verilog identifiers that contain uppercase letters help Displays the command s options and arguments Optional compat Disables optimizations that result in different event ordering than Verilog XL Optional ModelSim Verilog generally duplicates Verilog XL event ordering but there are cases where it is inefficient to do so Using this option does not help you find event order dependencies but it allows you to ignore them Keep in mind that this option does not account for all event order discrepancies and that using this option may degrade performance See Event ordering in Verilog designs UM 80 for additional information compile_uselibs lt directory_name gt Locates source files specified in a uselib directive see Verilog XL uselib compiler directive UM 75 compiles those files into automatically created libraries and updates the modelsim ini file with the logical mappings to the new libraries Optional If a directory_name is not specified ModelSim uses the name specified in the MTI_USELIB_DIR environment variable If that variable is not set ModelSim creates the directory mti_uselibs in the current working directory t define lt macro_name gt lt macro_text gt Allows you to define a macro from the command line that is equivalent to the following compi
10. multisource_int_delays no_notifier no_tchk_msg notimingchecks quiet sdfmin sdftyp sdfmax lt delayScale gt lt instance gt lt sdf_filename gt sdfmaxerrors lt n gt sdfnoerror sdfnowarn sdf_verbose t lt multiplier gt lt time_unit gt tag lt string gt title lt title gt trace_foreign lt int gt vcdstim lt filename gt version view lt dataset_name gt lt WLF_filename gt wlf lt filename gt wlfcompress wlfnocompress wlfslim lt size gt wlftlim lt duration gt absentisempty nocollapse nofileshare noglitch no_glitch_msg std_input lt filename gt std_output lt filename gt strictvital vital2 2b t talt_path_delays extend_tcheck_data_limit lt percent gt extend_tcheck_ref_limit lt percent gt hazards int_delays L lt library_name gt Lf lt library_name gt maxdelays mindelays no_cancelled_e_msg no_neg_tchk no_notifier tno_path_edge no_pulse_msg no_show_cancelled_e no_tchk_msg t nosdferror nosdfwarn nospecify nowarn lt CODE gt tnte warn pli lt object list gt lt plusarg gt pulse_e lt percent gt tpulse_e_style_ondetect pulse_e_style_onevent pulse_int_e lt percent gt pulse_int_r lt percent gt pulse_r lt percent gt sdf_nocheck_celltype show_cancelled_e transport_int_delays transport_path_delays typdelays v2k_int_dela
11. Optional show_cancelled_e Drives a pulse error state X for the duration of a negative pulse on a specify path delay Optional By default ModelSim filters negative pulses transport_int_delays Selects transport mode with pulse control for single source nets one interconnect path Optional By default interconnect delays operate in inertial mode pulses smaller than the delay are filtered In transport mode narrow pulses are propagated through interconnect delays This option works independently from multisource_int_delays transport_path_delays Selects transport mode for path delays Optional By default path delays operate in inertial mode pulses smaller than the delay are filtered In transport mode narrow pulses are propagated through path delays Note that this option affects path delays only and not primitives Primitives always operate in inertial delay mode typdelays Selects the typical value in min typ max expressions Default Has no effect if you specified the min typ max selection at compile time v2k_int_delays Causes interconnect delay to be visible at the load module port per the IEEE 1364 2001 spec Optional By default ModelSim annotates INTERCONNECT delays in a manner compatible with Verilog XL If you have sdf_annotate calls in your design that are not getting executed add the Verilog task sdf_done after your last sdf_annotate to remove any zero delay MIPDs that may have been created see Mod
12. Syntax notation Description angled brackets surrounding a syntax item indicate a user defined argument do not enter the brackets in commands square brackets generally indicate an optional item if the brackets surround several words all must be entered as a group the brackets are not entered braces indicate that the enclosed expression contains one or more spaces yet should be treated as a single argument or that the expression contains square brackets for an index for either situation the braces are entered an ellipsis indicates items that may appear more than once the ellipsis itself does not appear in commands the vertical bar indicates a choice between items on either side of it do not include the bar in the command monospaced type monospaced type is used in command examples comments included with commands are preceded by the number sign or by two hyphens useful for adding comments to DO files macros a One exception to this rule is when you are using Verilog syntax to designate an array slice For example add wave vector1 4 0 The square brackets in this case denote an index The braces prevent the Tcl interpreter from treating the text within the square brackets as a Tcl command gt Note Neither the prompt at the beginning of a line nor the lt Enter gt key that ends a line is shown in the command examples ModelSim Command Reference Command return val
13. lt color gt Specifies the background grid color the default is grey50 Optional griddelta lt pixels gt Specifies the closest in pixels two grid lines can be drawn before intermediate lines will be removed Optional Default is 40 gridoffset lt time gt Specifies the time in user time units of the first grid line Optional Default is 0 gridperiod lt time gt Specifies the time in user time units between subsequent grid lines Optional Default is 1 namecolwidth lt width gt Specifies in pixels the width of the name column Optional rowmargin lt pixels gt Specifies the distance in pixels between top level signals signalnamewidth lt value gt Controls the number of hierarchical regions displayed as part of a signal name shown in the pathname pane Optional Default of 0 displays the full path 1 displays only the leaf path element 2 displays the last two path elements and so on timecolor lt color gt Specifies the time axis color the default is green Optional timeline lt value gt Specifies whether the horizontal axis displays simulation time default or grid period count Default is zero When set to 1 the grid period count is displayed valuecolwidth lt width gt Specifies in pixels the width of the value column vectorcolor lt color gt Specifies the vector waveform color the default is b3ffb3 Optional waveselectcolor lt color gt Specifies the
14. transcript file transcript run 1 ms This series of commands results in the transcript containing only data from the second millisecond of the simulation The first transcript file command closes the transcript so no data is being written to it The second transcript file command opens a new transcript and records data from 1 ms to 2 ms See also Transcript UM 147 ModelSim Command Reference tssi2mti Syntax Arguments Examples See also tssi2mti CR 127 The tssi2mti command is used to convert a vector file in Fluence Technology formerly TSSD Standard Events Format into a sequence of force CR 82 and run CR 114 commands The stimulus is written to the standard output The source code for tssi2mti is provided in the file tssi2mti c in the examples directory tssi2mti lt signal_definition_file gt lt sef_vector_file gt lt signal_definition_file gt Specifies the name of the Fluence Technology signal definition file describing the format and content of the vectors Required lt sef_vector_file gt Specifies the name of the file containing vectors to be converted If none is specified standard input is used Optional tssi2mti trigger def trigger sef gt trigger do The command will produce a do file named trigger do from the signal definition file trigger def and the vector file trigger sef tssi2mti trigger def lt trigger sef gt trigger do This example is exactly the same as the previous one but
15. Disables the optimization of internal port map connections Optional nofileshare By default ModelSim shares a file descriptor for all VHDL files opened for write or append that have identical names The nofileshare switch turns off file descriptor sharing Optional noglitch Disables VITAL glitch generation Optional See Chapter 4 VHDL simulation for additional discussion of VITAL t no_glitch_msg Disable VITAL glitch error messages Optional std_input lt filename gt Specifies the file to use for the VHDL TextIO STD_INPUT file Optional std_output lt filename gt Specifies the file to use for the VHDL TextIO STD_OUTPUT file Optional strictvital Exactly match the VITAL package ordering for messages and delta cycles Optional Useful for eliminating delta cycle differences caused by optimizations not addressed in the VITAL LRM Using this argument negatively impacts simulator performance vital2 2b Selects SDF mapping for VITAL 2 2b default is VITAL 2000 Optional ModelSim Command Reference CR 200 Commands Arguments Verilog talt_path_delays Configures path delays to operate in inertial mode by default Optional In inertial mode a pending output transition is cancelled when a new output transition is scheduled The result is that an output may have no more than one pending transition at a time and that pulses narrower than the delay are filtered The delay is selected based on the transition fr
16. Macro startup do at line 34 command executing run 1000 processing BREAKPOINT is Interrupted SE 4b SE Sk SE FE te ONBREAK commands resume VSIM pause 5 gt resume Resuming execution of macro resume_test do at line 4 abort CR 30 do CR 68 pause CR 101 resume CR 113 CR 121 ModelSim Command Reference CR 122 Commands step Syntax Arguments See also The step command steps to the next HDL statement Current values of local HDL variables may be observed at this time using the Variables window VHDL procedures and functions and Verilog tasks and functions can optionally be skipped over When a wait statement or end of process is encountered time advances to the next scheduled activity The Process and Source windows will then be updated to reflect the next activity step over lt n gt over Specifies that VHDL procedures and functions and Verilog tasks and functions should be executed but treated as simple statements instead of entered and traced line by line Optional lt n gt Any integer Optional Will execute n steps before returning run CR 114 ModelSim Command Reference stop Syntax Arguments See also stop CR 123 The stop command is used with the when command CR 208 to stop simulation in batch files The stop command has the same effect as hitting a breakpoint The stop command may be placed anywhere within the body of the when command stop None
17. ModelSim Command Reference CR 94 Commands lt item_name gt Specifies the item name which you want to unlog Required Multiple item names may be specified Wildcard characters are allowed Examples nolog r Unlogs all items in the design nolog out Unlogs all output ports in the current design unit See also add list CR 32 add wave CR 35 log CR 87 ModelSim Command Reference notepad Syntax Arguments notepad CR 95 The notepad command opens a simple text editor It may be used to view and edit ASCII files or create new files This mode can be changed from the Notepad Edit menu See Mouse and keyboard shortcuts UM 156 for a list of editing shortcuts Returns nothing notepad lt filename gt r edit lt filename gt Name of the file to be displayed Optional r edit Selects the notepad editing mode r for read only and edit for edit mode Optional Edit mode is the default ModelSim Command Reference CR 96 Commands noview Syntax Arguments Examples See also The noview command closes a window in the ModelSim GUI To open a window use the view command noview lt window_name gt Wildcards can be used for example 1 List window s Signal Source and Structure windows even alone all windows Optional lt window_name gt Specifies the ModelSim window type to close Multiple window types may be used at least one type or wildcard is
18. ModelSim Command Reference dataset rename CR 61 dataset rename Syntax Arguments Examples See also The dataset rename command changes the logical name of a dataset to the new name you specify dataset rename lt logicalname gt lt newlogicalname gt lt logicalname gt Specifies the existing logical name of the dataset Required lt newlogicalname gt Specifies the new logical name for the dataset Required dataset rename test test2 Renames the dataset file test to test2 dataset alias CR 55 dataset list CR 59 dataset open CR 60 ModelSim Command Reference CR 62 Commands dataset save The dataset save command writes data from the current simulation to the specified file This lets you save simulation data while the simulation is still in progress Syntax dataset save lt logicalname gt lt newlogicalname gt Arguments lt datasetname gt Specifies the name of the dataset you want to save Required lt filename gt Specifies the name of the file to save Required Examples dataset save sim gold wlf Saves all current log data in the sim dataset to the file gold wlf See also dataset snapshot CR 63 ModelSim Command Reference dataset snapshot CR 63 dataset snapshot Syntax Arguments The dataset snapshot command saves data from the current WLF file vsim wif by default at a specified interval This lets you take sequential or cumulative snapshots of your simulation dat
19. Saves the current data in the List window in a file named alu_list do write format wave alu_wave do Saves the current data in the Wave window in a file named alu_wave do Below is an example of a saved Wave window format file onerror resume quietly WaveActivateNextPane 0 add wave noupdate format Logic cntr_struct ld add wave noupdate format Logic cntr_struct rst add wave noupdate format Logic cntr_struct clk add wave noupdate format Literal cntr_struct d add wave noupdate format Literal cntr_struct q TreeUpdate SetDefaultTree quietly WaveActivateNextPane add wave noupdate format Logic cntr_struct pl add wave noupdate format Logic cntr_struct p2 add wave noupdate format Logic cntr_struct p3 TreeUpdate SetDefaultTree ModelSim Command Reference CR 220 Commands WaveRestoreCursors 0 ns WaveRestoreZoom 0 ns 1 us configure configure configure configure In the example above five signals are added with the noupdate argument to the default window pane The TreeUpdate command then refreshes all five waveforms The second WaveActivateNextPane command creates a second pane which contains three signals The WaveRestoreCursors command restores any cursors you set during the original simulation and the WaveRestoreZoom command restores the Zoom range you set These four commands are used only in saved Wave format files therefore they are not wave namecolwidth 150 wave valuecolwi
20. See also The add dataflow command adds the specified process signal net or register to the Dataflow window Wildcards are allowed add dataflow lt item gt window lt wname gt lt item gt Specifies a process signal net or register that you want to add to the Dataflow window Required Multiple items separated by spaces may be specified Wildcards are allowed Note that the WildcardFilter Tcl preference variable identifies types to ignore when matching items with wildcard patterns window lt wname gt Adds the items to the specified Dataflow window lt wname gt e g dataflow2 Optional Used to specify a particular window when multiple instances of that window type exist Selects an existing window does not create a new window Use the view command CR 158 with the new option to create a new window Dataflow window UM 158 ModelSim Command Reference CR 32 Commands add list Syntax Arguments The add list command lists VHDL signals and variables and Verilog nets and registers in the List window along with their associated values User defined buses may also be added for either language If no port mode is specified add list will display all items in the selected region with names matching the item name specification Limitations VHDL variables and Verilog memories can be listed using the variable s full name only no wildcards add list allowconstants in inout internal lt i
21. Specifies that the WLF file is to include data for ports of mode OUT whose names match the specification Optional ports Specifies that the scope of the search is to include all ports Optional CR 87 ModelSim Command Reference CR 88 Commands recursive Specifies that the scope of the search is to descend recursively into subregions Optional if omitted the search is limited to the selected region lt item_name gt Specifies the item name which you want to log Required Multiple item names may be specified Wildcard characters are allowed Note that the WildcardFilter Tcl preference variable identifies types to ignore when matching items with wildcard patterns Examples log r Logs all items in the design log out Logs all output ports in the current design unit See also add list CR 32 add wave CR 35 nolog CR 93 and Wildcard characters CR 13 gt Note The log command is also known as the add log command ModelSim Command Reference Ishift Syntax Arguments Examples See also Ishift CR 89 The Ishift command takes a Tcl list as an argument and shifts it in place one place to the left eliminating the Oth element The number of shift places may also be specified Returns nothing lshift lt list gt lt amount gt lt list gt Specifies the Tcl list to target with Ishift Required lt amount gt Specifies the number of places to shift Optional Default is 1 proc
22. The condition is evaluated in the simulator kernal and can be an item name in which case the curly braces can be omitted The command will be executed when the item changes value The condition can be an expression with these operators Name Operator equals not equal greater than gt ModelSim Command Reference when CR 209 Name Operator less than lt greater than or equal less than or equal AND OR The operands may be item names signame event or constants Subexpressions in parentheses are permitted The command will be executed when the expression is evaluated as TRUE or 1 The formal BNF syntax is condition Name expression expression expression AND relation expression OR relation relation relation Name Literal Name Literal Name EVENT expression Literal lt char gt lt bitstring gt lt bitstring gt The operator can occur only between a Name and a Literal This means that you cannot compare the value of two signals i e Name Name is not possible Tcl variables can be used in the condition expression but you must replace the curly braces with double quotes This works like a macro substitution where the Tcl variables are evaluated once and the result is then evaluated as the when condition Condition_expressions are evaluated in the vsim kernel which knows nothing about Tcl variable
23. Verilog system tasks are documented in the IEEE 1364 standard ModelSim Command Reference CR 146 Commands vcd2wif Syntax Arguments ved2wilf is a utility that translates a VCD Value Change Dump file into a WLF file that can be displayed in ModelSim using the vsim view argument ved2wlf splitio splitio_in_ext lt extension gt splitio_out_ext lt extension gt lt vcd filename gt lt wlf filename gt splitio Specifies extended VCD port values be split into their corresponding input and output components by creating 2 signals instead of just in the resulting wlf file Optional By default the new input component signal keeps the same name as the original port name while the output component name is the original name with a __o appended to it splitio_in_ext lt extension gt Specifies an extension to add to input component signal names created by using splitio Optional splitio_out_ext lt extension gt Specifies an extension to add to output component signal names created by using splitio Optional lt vcd filename gt Specifies the name of the VCD file you want to translate into a WLF file Required lt wlf filename gt Specifies the name of the output WLF file Required ModelSim Command Reference vcom CR 147 vcom The vcom command is used to invoke VCOM the Model Technology VHDL compiler Use VCOM to compile VHDL source code into a specified working library or to the work libra
24. dependencies checking CR 154 dependent design units UM 50 describe command CR 66 descriptions of HDL items UM 206 design hierarchy viewing in Structure window UM 208 design library creating UM 40 logical name assigning UM 43 mapping search rules UM 44 resource type UM 38 VHDL design units UM 50 working type UM 38 design units UM 38 hierarchy of viewing UM 143 report of units simulated CR 223 Verilog adding to a library CR 183 directories mapping libraries CR 191 moving libraries UM 44 disablebp command CR 67 distributed delay mode UM 89 dividers adding from command line CR 35 Wave window UM 224 DLL files loading UM 105 UM 106 CR 233 ABCDEFGHIJKLMNOPORSTUVWAYZ do command CR 68 DO files macros CR 68 error handling UM 341 executing at startup UM 345 UM 355 parameters passing to UM 339 Tcl source command UM 342 DOPATH environment variable UM 345 drivers Dataflow Window UM 165 show in Dataflow window UM 227 Wave window UM 227 drivers command CR 69 drivers multiple on unresolved signal UM 250 dump files viewing in ModelSim CR 146 dumplog64 command CR 70 dumpports tasks VCD files UM 312 E echo command CR 71 edit command CR 72 Editing in notepad windows UM 156 UM 369 in the Main window UM 156 UM 369 in the Source window UM 156 UM 369 EDITOR environment variable UM 345 editor default changing UM 345 elaboration interrupting CR 192 embedded wave viewer UM 166 enablebp command CR 73 ENDFILE function U
25. it is provided to ease the transition to ModelSim refresh Regenerates a library image Optional By default the work library is updated use work lt library_name gt to update a different library See vlog examples for more information source Displays the associated line of source code before each error message that is generated during compilation Optional by default only the error message is displayed time Reports the wall clock time vlog takes to compile the design Optional Note that if many processes are running on the same system wall clock time may differ greatly from the actual cpu time spent on vlog typdelays Selects typical delays from the min typ max expressions Default If preferred you can defer delay selection until simulation time by specifying the same option to the simulator U Converts regular Verilog identifiers to uppercase Allows case insensitivity for module names Optional v lt library_file gt Specifies a source library file containing module and UDP definitions Optional See Verilog XL compatible compiler arguments UM 74 for more information After all explicit filenames on the vlog command line have been processed the compiler uses the v option to find and compile any modules that were referenced but not yet defined Modules and UDPs within the file are compiled only if they match previously unresolved references Multiple v options are allowed See additional discussion in t
26. of an alias file Returns the name of the WLF file associated with the dataset exists Returns 1 if the dataset exists 0 if it doesn t lt dataset_name gt Specifies the name of the dataset or alias for which you want information Required See also dataset alias CR 55 dataset list CR 59 dataset open CR 60 ModelSim Command Reference dataset list CR 59 dataset list The dataset list command lists all active datasets Syntax dataset list long Arguments long Lists the filename corresponding to each dataset s or alias logical name Optional See also dataset alias CR 55 dataset save CR 62 ModelSim Command Reference CR 60 Commands dataset open The dataset open command opens a WLF file representing a prior simulation and assigns it the logical name that you specify To close a dataset use dataset close Syntax dataset open lt filename gt lt logicalname gt Arguments lt filename gt Specifies the WLF file to open as a view mode dataset Required lt logicalname gt Specifies the logical name for the dataset Optional This is a prefix that will identify the dataset in the current session By default the dataset prefix will be the name of the specified WLF file Examples dataset open last wlf test Opens the dataset file last wlf and assigns it the logical name test See also dataset alias CR 55 dataset list CR 59 dataset save CR 62 vsim CR 192 view option
27. saving simulations UM 125 resume command CR 113 RTL level design busses reconstructing UM 134 run command CR 114 RunLength ini file variable UM 355 S saving simulation options in a project UM 30 waveforms UM 125 scope setting region environment CR 74 SDF controlling missing instance messages CR 196 disabling timing checks UM 308 errors and warnings UM 299 ModelSim Command Reference instance specification UM 298 interconnect delays UM 308 mixed VHDL and Verilog designs UM 308 specification with the GUI UM 299 troubleshooting UM 309 Verilog sdf_annotate system task UM 302 optional conditions UM 307 optional edge specifications UM 306 rounded timing values UM 307 SDF to Verilog construct matching UM 303 VHDL resolving errors UM 301 SDF to VHDL generic matching UM 300 sdf_done UM 95 search libraries CR 200 UM 259 searching in the source window UM 206 in the Structure window UM 211 List window signal values transitions and names UM 186 values and names UM 141 Verilog libraries UM 72 Wave window signal values edges and names UM 234 searchlog command CR 116 setuphold UM 93 shared objects loading FLI applications see ModelSim FLI Reference manual loading PLI VPI C applications UM 105 loading PLI VPI C applications UM 106 shift command CR 118 Shortcuts text editing UM 156 UM 369 shortcuts command history CR 7 UM 368 command line caveat CR 7 UM 368 List window UM 189 UM 367 Main window UM 369 Main window
28. HDL instance path within the design hierarchy Optional lower Shows all logged signals in the hierarchy Optional When invoked without the lower switch only the top level signals are displayed o lt outfile gt Directs the output to be written to the file specified by lt outfile gt Optional The default destination for the logfile is standard out output Lists only the output ports Optional This may be combined with the input inout or internal switches ModelSim Command Reference wif2log CR 215 quiet Disables error message reporting Optional lt wlffile gt Specifies the ModelSim WLF file that you are converting Required ModelSim Command Reference CR 216 Commands wifman The wlfman command allows you to get information about and manipulate WLF files The command performs three functions depending on which mode you use e wlfman info generates file information resolution versions etc e wifman items generates a list of HDL items i e signals from the source WLF file and outputs it to stdout When redirected to a file the output is called an item list file and it can be read in by wlfman filter The item_list_file is a list of items one per line Comments start with a and continue to the end of the line Wildcards are legal in the leaf portion of the name Here is an example top foo signal foo top ul all signals under ul top ul same as line above r top u2 recursively
29. Note that when specifying an item that contains an extended identifier as the last part of the name there must be a space after the closing V and before the closing See also HDL item names CR 10 Wildcard characters CR 13 ModelSim Command Reference CR 78 Commands exit The exit command exits the simulator and the ModelSim application Syntax exit terce Argument LOres Quits without asking for confirmation Optional if this argument is omitted ModelSim asks you for confirmation before exiting gt Note If you want to stop the simulation using a when command CR 208 you must use a stop command CR 123 within your when statement DO NOT use an exit command or a quit command CR 107 The stop command acts like a breakpoint at the time it is evaluated ModelSim Command Reference find Syntax find The find command locates items in the design whose names match the name specification you provide You must specify the type of item you want to find When searching for nets and signals the find command returns the full pathname of all nets signals registers variables and named events that match the name specification When searching for nets and signals the order in which arguments are specified is unimportant When searching for virtuals however all optional arguments must be specified before any item names The following rules are used by the find command to locate an item If the name does
30. Specifies an item list file created by wlfman items to include in the output WLF file Optional r lt item gt Specifies an item region to recursively include in the output If lt item gt is a signal the output would be the same as using s Optional s lt symbol gt Specifies an item to include in the output Optional By default all items are output t lt resolution gt Specifies the time resolution of the new WLF file Optional By default the resolution is the same as the source WLF file lt sourcewlffile gt Specifies the source WLF file from which you want items Required lt outwlffile gt Specifies the name of the output WLF file Required The output WLF file will contain all items specified by f lt item list file gt r lt item gt and s lt item gt Output WLF files are always written in the latest WLF version regardless of the source WLF file version Chapter 7 WLF files datasets and virtuals ModelSim Command Reference CR 218 Commands wlfrecover The wlfrecover tool attempts to repair WLF files that are incomplete due to a crash or the file being copied prior to completion of the simulation The tool works only on WLF files created by ModelSim versions 5 6 or later You can run the tool from the VSIM prompt or from a shell Syntax wlfrecover lt filename gt force q Arguments lt filename gt Specifies the WLF file to repair Required force Disregards file locking and atte
31. UM 323 Running command line and batch mode simulations UM 388 Using a startup file UM 358 DOPATH UM 345 ModelSim Command Reference drivers Syntax Arguments drivers CR 69 The drivers command displays in the Main window the current value and scheduled future values for all the drivers of a specified VHDL signal or Verilog net The driver list is expressed relative to the top most design signal net connected to the specified signal net If the signal net is a record or array each subelement is displayed individually This command reveals the operation of transport and inertial delays and assists in debugging models drivers lt item_name gt lt item_name gt Specifies the name of the signal or net whose values are to be shown Required All signal or net types are valid Multiple names and wildcards are accepted ModelSim Command Reference CR 70 Commands dumplog64 The dumplog64 command dumps the contents of the specified WLF file in a readable format to stdout The WLF file cannot be opened for writing in a simulation when you use this command The dumplog64 command cannot be used in a DO file Syntax dumplog64 lt filename gt Arguments lt filename gt The name of the WLF file to be read Required ModelSim Command Reference echo Syntax Arguments Examples echo CR 71 The echo command displays a specified message in the Main window echo lt text_string gt lt text_strin
32. Windows Main window text editing UM 156 UM 369 Source window text editing UM 156 UM 369 windows Dataflow window UM 158 toolbar UM 162 zooming UM 167 finding HDL item names in UM 141 List window UM 177 adding HDL items UM 178 adding signals with a WLF file UM 196 display properties of UM 184 formatting HDL items UM 181 output file CR 221 saving data to a file UM 188 saving the format of CR 219 setting triggers UM 185 UM 392 time markers UM 141 Main window UM 145 status bar UM 156 time and delta display UM 156 toolbar UM 154 opening from command line CR 158 with the GUI UM 149 Process window UM 190 displaying active processes UM 190 specifying next process to be executed UM 190 viewing processing in the region UM 190 saving position and size UM 142 searching for HDL item values in UM 141 Signals window UM 192 VHDL and Verilog items viewed in UM 192 Source window setting tab stops UM 207 Structure window UM 208 selecting items to view in Signals window UM 192 VHDL and Verilog items viewed in UM 208 viewing design hierarchy UM 208 Variables window UM 212 VHDL and Verilog items viewed in UM 212 ModelSim Command Reference Wave window UM 215 adding HDL items to UM 217 adding signals with a WLF file UM 196 cursor measurements UM 236 display properties UM 231 display range zoom changing UM 237 format file saving UM 217 path elements changing CR 53 UM 356 time cursors UM 235 zooming UM 237 WLF files adding items to
33. apply stimulus interactively to VHDL signals and Verilog nets Since force commands like all commands can be included in a macro file it is possible to create complex sequences of stimuli You can force Virtual signals UM 133 if the number of bits corresponds to the signal value You cannot force virtual functions In VHDL and mixed models you cannot force an input port that is mapped at a higher level or that has a conversion function on the input You cannot force Verilog registers or variables reg integer time real or realtime These must be changed See the change command CR 50 force freeze drive deposit cancel lt time gt repeat lt time gt lt item_name gt lt value gt lt time gt lt value gt lt time gt freeze Freezes the item at the specified value until it is forced again or until it is unforced with a noforce command CR 92 Optional drive Attaches a driver to the item and drives the specified value until the item is forced again or until it is unforced with a noforce command CR 92 Optional This option is illegal for unresolved signals deposit Sets the item to the specified value The value remains until there is a subsequent driver transaction or until the item is forced again or until it is unforced with a noforce command CR 92 Optional If one of the freeze drive or deposit options is not used then freeze is the default for unresolved items and drive
34. background highlight color of a selected waveform Default is gray30 waveselectenable lt value gt Specifies whether the waveform background highlights when an item is selected The default of 1 enables highlighting 0 disables highlighting ModelSim Command Reference CR 54 Commands Examples config list strobeperiod Displays the current value of the strobeperiod attribute config list strobeperiod 50 ns strobestart 0 usestrobe 1 Sets the strobe waveform and turns it on config wave vectorcolor blue Sets the wave vector color to blue config wave signalnamewidth 1 Sets the display in the current Wave window to show only the leaf path of each signal See also view CR 158 Preference variables located in Tcl files UM 360 ModelSim Command Reference dataset alias CR 55 dataset alias Syntax Arguments See also The dataset alias command assigns an additional name alias to a dataset The dataset can then be referenced by that alias A dataset can have any number of aliases but all dataset names and aliases must be unique dataset alias lt dataset_name gt lt alias_name gt lt dataset_name gt Specifies the name of the dataset to which to assign the alias Required lt alias_name gt Specifies the alias name to assign to the dataset Optional If you don t specify an alias_name ModelSim lists current aliases for the specified dataset_name dataset list CR 59 dataset open CR 60 dataset
35. be specified as the dataset separator via the DatasetSeparator UM 353 variable in the modelsim ini file The default is This character must be different than the pathSeparator character pathSeparator is the character used to separate hierarchical item names Normally is used for VHDL and is used for Verilog although other characters except may be specified via the PathSeparator UM 355 variable in the modelsim ini file This character must be different than the datasetSeparator hierarchicalPath is a set of instance names each separated by a path separator itemName is the name of an object in a design elementSelection indicates some combination of the following Array indexing Single array elements are specified using either parentheses or square brackets around a single number Array slicing Slices or part selects of arrays are specified using either parentheses or square brackets around a range specification A range is two numbers separated woman by one of the following to downto Record field selection A record field is specified using a period followed by the name of the field ModelSim Command Reference HDL item names CR 11 Specifying names We distinguish between four types of item names simple relative fully rooted and absolute A simple name does not contain any hierarchy It is simply the name of an item e g clk or data 3 0 in the c
36. bookmark delete wave command CR 43 bookmark goto wave command CR 44 bookmark list wave command CR 45 bookmarks UM 238 bp breakpoint command CR 46 break on assertion UM 264 on signal value CR 208 stop simulation run UM 155 UM 205 BreakOnAssertion ini file variable UM 353 breakpoints conditional CR 208 UM 198 continuing simulation after CR 114 deleting CR 41 UM 206 UM 267 listing CR 46 setting CR 46 UM 206 signal breakpoints when statements CR 208 UM 198 Source window viewing in UM 200 time based UM 198 in when statements CR 212 bsm file UM 174 buffered unbuffered output UM 356 busses RTL level reconstructing UM 134 user defined CR 36 UM 183 UM 226 ModelSim Command Reference CR 230 Index ABCDEFPGHIJKLMNOPORSTUVWAYZ C C applications compiling and linking UM 105 C applications compiling and linking UM 106 case choice must be locally static CR 149 case sensitivity VHDL vs Verilog CR 12 causality tracing in Dataflow window UM 168 cd change directory command CR 49 cell libraries UM 88 cells hiding in Dataflow window UM 175 UM 176 change command CR 50 chasing X UM 169 check_synthesis argument CR 147 CheckpointCompressMode ini file variable UM 353 CheckSynthesis ini file variable UM 350 clock change sampling signals at UM 391 combining signals busses CR 36 UM 183 UM 226 command history UM 151 CommandHistory ini file variable UM 353 command line mode UM 388 commands abort CR 30 ad
37. can be used as an argument to onbreak If you want to use more than one command use a semicolon to separate the commands or place them on multiple lines The entire command string must be placed in curly braces It is an error to execute any commands within an onbreak command string following a run CR 114 run continue or step CR 122 command This restriction applies to any macros or Tcl procedures used in the onbreak command string Optional Examples onbreak exa data cont Examine the value of the HDL item data when a breakpoint is encountered Then continue the run command CR 114 onbreak resume Resume execution of the macro file on encountering a breakpoint See also abort CR 30 bd CR 41 bp CR 46 do CR 68 onerror CR 100 resume CR 113 status CR 121 ModelSim Command Reference onElabError CR 99 onElabError Syntax Arguments See also The onElabError command specifies one or more commands to be executed when an error is encountered during elaboration The command is used by placing it within the modelsim tcl file or a macro During initial design load onElabError may be invoked from within the modelsim tcl file during a simulation restart onElabError may be invoked from a macro Use the onElabError command without arguments to return to a prompt onElabError lt command gt lt command gt lt command gt Any command can be used as an argument to onElabError If you want
38. clear CR 56 dataset close CR 57 dataset info CR 58 dataset list CR 59 dataset open CR 60 dataset rename CR 61 dataset save CR 62 dataset snapshot CR 63 delete CR 65 describe CR 66 disablebp CR 67 do CR 68 drivers CR 69 dumplog64 CR 70 echo CR 71 edit CR 72 enablebp CR 73 environment CR 74 examine CR 75 exit CR 78 find CR 79 force CR 82 help CR 85 history CR 86 log CR 87 Ishift CR 89 Isublist CR 90 modelsim CR 91 noforce CR 92 nolog CR 93 notepad CR 95 noview CR 96 nowhen CR 97 onbreak CR 98 onElabError CR 99 onerror CR 100 pause CR 101 precision CR 102 printenv CR 103 project CR 104 pwd CR 105 ModelSim Command Reference Table of Contents quietly CR 106 quit CR 107 radix CR 108 report CR 109 restart CR 111 resume CR 113 run CR 114 searchlog CR 116 shift CR 118 show CR 119 simstats CR 120 status CR 121 step CR 122 stop CR 123 tb CR 124 transcript CR 125 transcript file CR 126 tssi2mti CR 127 ved add CR 128 ved checkpoint CR 129 vcd comment CR 130 ved dumpports CR 131 ved dumpportsall CR 133 vcd dumpportsflush CR 134 ved dumpportslimit CR 135 ved dumpportsoff CR 136 vcd dumpportson CR 137 ved file CR 138 ved files CR 140 ved flush CR 142 ved limit CR 143 ved off CR 144 ved on CR 145 ved2wlf CR 146 vcom CR 147 vdel CR 153 vdir CR 154 verror CR 155 ModelSim Command Reference vgencomp CR 156 view CR 158 virtual count CR 160 virtual define CR 161
39. does not occur in f files g lt Name gt lt Value gt Assigns a value to all specified VHDL generics and Verilog parameters that have not received explicit values in generic maps instantiations or via defparams such as top level generics parameters and generics parameters that would otherwise receive their default values Optional Note there is no space between g and lt Name gt lt Value gt Name is the name of the generic parameter exactly as it appears in the VHDL source case is ignored Value is an appropriate value for the declared data type of a VHDL generic or any legal value for a Verilog parameter Make sure the Value you specify for a VHDL generic is appropriate for VHDL declared data types VHDL type mismatches will cause the specification to be ignored including no error messages No spaces are allowed anywhere in the specification except within quotes when specifying a string value Multiple g options are allowed one for each generic parameter Name may be prefixed with a relative or absolute hierarchical path to select generics in an instance specific manner For example Specifying g top ul tpd 20ns on the command line would affect only the pd generic on the top u instance assigning it a value of 20ns ModelSim Command Reference CR 194 Commands Specifying gu1 tpd 20ns affects the tpd generic on all instances named u 1 Specifying gtpd 20ns affects all generics named tpd If more than one g
40. expression AND relation expression OR relation relation relation Name Literal Name Literal Name EVENT expression Literal lt char gt lt bitstring gt lt bitstring gt The operator can occur only between a Name and a Literal This means that you cannot compare the value of two signals i e Name Name is not possible lt command gt Specifies one or more commands that are to be executed at the breakpoint Optional Multiple commands must be separated by semicolons or placed on multiple lines The entire command must be placed in curly braces Any commands that follow a run CR 114 or step CR 122 command will be ignored A run or step command terminates the breakpoint sequence This applies if macros are used within the bp command string as well A resume CR 113 command should not be used If many commands are needed after the breakpoint they can be placed in a macro file query lt filename gt lt line_number gt line_number Returns information about the breakpoints set in the specified file The information returned varies depending on which arguments you specify See the examples below for details ModelSim Command Reference CR 48 Commands Examples See also bp Lists all existing breakpoints in the design including the source file names line numbers breakpoint id s and any commands that have been assigned to breakpoints bp alu vhd 147 Sets a
41. file UM 174 dataset alias command CR 55 Dataset Browser UM 129 dataset clear command CR 56 dataset close command CR 57 dataset info command CR 58 dataset list command CR 59 dataset open command CR 60 dataset rename command CR 61 CR 62 Dataset Snapshot UM 131 dataset snapshot command CR 63 datasets UM 125 environment command specifying with CR 74 managing UM 129 restrict dataset prefix display UM 130 simulator resolution UM 126 DatasetSeparator ini file variable UM 353 declarations hiding implicit with explicit CR 152 default binding rules UM 45 default compile options UM 249 default editor changing UM 345 DefaultForceKind ini file variable UM 353 DefaultRadix ini file variable UM 353 DefaultRestartOptions variable UM 354 UM 359 defaults ModelSim Command Reference restoring UM 345 window arrangement UM 142 define CR 183 delay delta delays UM 53 infinite zero delay loops detecting UM 396 interconnect CR 195 modes for Verilog models UM 88 SDF files UM 297 stimulus delay specifying UM 196 delay_mode_distributed CR 184 delay_mode_path CR 184 delay_mode_unit CR 184 delay_mode_zero CR 184 delayed CR 19 DelayFileOpen ini file variable UM 354 delete command CR 65 deleting library contents UM 41 delta simulator state variable UM 362 deltas collapsing in the List window UM 185 hiding in the List window CR 52 UM 185 infinite zero delay loops UM 396 referencing simulator iteration as a simulator state variable UM 362
42. files with modules with the same name as primitives referenced but undefined in top v The use of libext v u implies filenames with a v or u suffix any combination of suffixes may be used Only referenced definitions will be compiled ModelSim Command Reference CR 188 Commands vlog work mylib refresh The work option specifies mylib as the library to regenerate refresh rebuilds the library image without using source code allowing models delivered as compiled libraries without source code to be rebuilt for a specific release of ModelSim 4 6 and later only If your library contains VHDL design units be sure to regenerate the library with the vcom command CR 147 using the refresh option as well See Regenerating your design libraries UM 47 for more information vlog modulel v u 00 incr The incr option determines whether or not the module source or compile options have changed as module1 is parsed If no change is found the code generation phase is skipped Differences in compile options are determined by comparing the compiler options stored in the _info file with the compiler options given They must match exactly ModelSim Command Reference vmake Syntax Arguments vmake CR 189 The vmake utility allows you to use a Windows MAKE program to maintain libraries You run vmake on a compiled design library and the utility outputs a makefile You can then run the makefile with a version of MAKE not supplied wi
43. from your module names See additional discussion in the examples A Important Any y arguments that follow a refresh argument on a vlog command line are ignored Any y arguments that come before the refresh argument on a vlog command line are processed lt filename gt Specifies the name of the Verilog source code file to compile One filename is required Multiple filenames can be entered separated by spaces Wildcards can be used vlog example vlg Compiles the Verilog source code contained in the file example vig vlog L work L libA L 1ibB top v This command demonstrates how to compile hierarchical modules organized into separate libraries that have sub module names that overlap among the libraries Assume you have a top level module top that instantiates module modA from library libA and module modB from library libB Furthermore modA and modB both instantiate modules named cellA but the definition of cellA compiled into libA is different from that compiled into ibB In this case you can t just specify L libA L libB because instantiations of cellA from modB resolve to the libA version of cellA See Library usage UM 72 for further information vlog top v v undl After compiling top v vlog will scan the file und for modules or primitives referenced but undefined in top v Only referenced definitions will be compiled vlog top v libextt vt u y vlog_lib After compiling top v vlog will scan the vlog_lib library for
44. implement VHDL foreign architectures only are reloaded at each restart when the architecture is elaborated unless the keeploaded option to the vsim command CR 192 is used e Shared libraries loaded from the command line foreign and pli options and from the Veriuser entry in the modelsim ini file are reloaded e Shared libraries that implement VHDL foreign subprograms remain loaded they are not reloaded even if they also contain code for a foreign architecture To handle restarts with Verilog PLI applications you need to define a Verilog user defined task or function and register a misctf class of callback See Chapter 6 Verilog PLI VPI for more information on the Verilog PLI restart force nobreakpoint nolist nolog nowave Eorce Specifies that the simulation will be restarted without requiring confirmation in a popup window Optional nobreakpoint Specifies that all breakpoints will be removed when the simulation is restarted Optional The default is for all breakpoints to be reinstalled after the simulation is restarted nolist Specifies that the current List window environment will not be maintained after the simulation is restarted Optional The default is for all currently listed HDL items and their formats to be maintained nolog Specifies that the current logging environment will not be maintained after the simulation is restarted Optional The default is for all currently logged items to con
45. in decimal See also add wave CR 35 log CR 87 Extended identifiers CR 12 ModelSim Command Reference add wave Syntax Arguments add wave CR 35 The add wave command adds VHDL signals and variables and Verilog nets and registers to the Wave window It also allows specification of user defined buses If no port mode is specified add wave will display all items in the selected region with names matching the item name specification Limitations VHDL variables and Verilog memories can be listed using the variable s full name only no wildcards add wave allowconstants color lt standard_color_name gt expand lt signal_name gt lt format gt height lt pixels gt in inout internal divider lt divider_name gt lt item_name gt lt item_name gt sigl sig2 sig3 label lt name gt noupdate offset lt offset gt out ports lt radix gt recursive scale lt scale gt allowconstants For use with wildcard searches Specifies that constants matching the wildcard search should be added to the Wave window Optional By default constants are ignored because they do not change color lt standard_color_name gt Specifies the color used to display a waveform Optional These are the standard X Window color names or rgb value e g 357177 enclose 2 word names light blue in quotes divider lt divider_name gt Adds a divider with the sp
46. ini file variable UM 350 notepad command CR 95 Notepad windows text editing UM 156 UM 369 notrigger argument UM 391 noview command CR 96 NoVital ini file variable UM 350 NoVitalCheck ini file variable UM 350 Now simulator state variable UM 362 now simulator state variable UM 362 nowarn lt CODE gt CR 185 nowhen command CR 97 numeric_bit package UM 47 numeric_std package UM 47 disabling warning messages UM 358 NumericStdNoWarnings ini file variable UM 355 O onbreak command CR 98 onElabError command CR 99 onerror command CR 100 optimize for std_logic_1164 UM 251 Optimize_1164 ini file variable UM 350 OptionFile entry in project files UM 253 order of events changing in Verilog CR 183 ordering files for compile UM 28 organizing projects with folders UM 32 others ini file variable UM 350 P packages standard UM 46 textio UM 46 util UM 62 CR 237 ABCDEFPGHIJKLMNOPORSTUVWAYZ VITAL 1995 UM 60 VITAL 2000 UM 60 page setup Dataflow window UM 173 Wave window UM 245 pan Dataflow window UM 167 parameters making optional UM 340 using with macros CR 68 UM 339 path delay mode UM 89 pathnames in VSIM commands CR 10 spaces in CR 9 PathSeparator ini file variable UM 355 pause command CR 101 PedanticErrors ini file variable UM 350 PLI specifying which apps to load UM 102 Veriuser entry UM 102 PLI VPI UM 100 tracing UM 121 PLIOBJS environment variable UM 102 UM 346 popup toggling waveform popup on o
47. initialization file ModelSim is using All library mappings are taken from here Window positions and other parameters are taken from the modelsim tcl file ModelSim Command Reference CR 214 Commands wlf2log Syntax Arguments The wlf2log command translates a ModelSim WLF file vsim wif to a QuickSim II logfile The command reads the vsim wlf WLF file generated by the add list add wave or log commands in the simulator and converts it to the QuickSim II logfile format A Important This command should be invoked only after you have stopped the simulation using quit sim or dataset close sim wlf2log bits fullname help inout input internal l lt instance_path gt lower o lt outfile gt output quiet lt wlffile gt bits Forces vector nets to be split into 1 bit wide nets in the log file Optional fullname Shows the full hierarchical pathname when displaying signal names Optional help Displays a list of command options with a brief description for each Optional inout Lists only the inout ports Optional This may be combined with the input output or internal switches input Lists only the input ports Optional This may be combined with the output inout or internal switches internal Lists only the internal signals Optional This may be combined with the input output or inout switches 1l lt instance_path gt Lists the signals at or below the specified
48. integer real convert to real time convert to 64 bit integer std_logic convert to 9 state signal value signed convert to signed vector unsigned convert to unsigned vector std_logic_vector convert to unsigned vector Examples top bus amp bit_mask This expression takes the bitwise AND function of signal op bus and the array constant contained in the global Tcl variable bit_mask clk event amp amp top xyz 16 hffae This expression evaluates to a boolean true when signal clk changes and signal top xyz is equal to hex ffae otherwise is false clk rising amp amp mystate reading amp amp top u3 addr 32 habcd1234 Evaluates to a boolean true when signal clk just changed from low to high and signal mystate is the enumeration reading and signal top u3 addr is equal to the specified 32 bit hex constant otherwise is false top u3 addr and 32 hff000000 32 hac000000 Evaluates to a boolean true when the upper 8 bits of the 32 bit signal top u3 adder equals hex ac top signalA delayed 10ns This expression returns top signalA delayed by 10 ns top signalA delayed 10 ns amp amp top signalB This expression takes the logical AND of a delayed top signalA with the undelayed top signalB virtual function 10 top signalA amp amp top signalB mySignalB_AND_DelayedSignalA This evaluates top signalA at 10 simulation time steps before the current time and takes the logical AN
49. is the default for resolved items If you prefer freeze as the default for resolved and unresolved VHDL signals change the default force kind in the DefaultForceKind UM 353 preference variable cancel lt time gt Cancels the force command at the specified lt time gt The time is relative to the current time unless an absolute time is specified by preceding the value with the character Cancellation occurs at the last simulation delta cycle of a time unit A value of zero cancels the force at the end of the current time period Optional repeat lt time gt Repeats the force command where lt time gt is the time at which to start repeating the cycle The time is relative to the current time A repeating force command will force a value before other non repeating force commands that occur in the same time step Optional ModelSim Command Reference force CR 83 lt item_name gt Specifies the name of the HDL item to be forced Required A wildcard is permitted only if it matches one item See HDL item names CR 10 for the full syntax of an item name The item name must specify a scalar type or a one dimensional array of character enumeration You may also specify a record subelement an indexed array or a sliced array as long as the type is one of the above Required lt value gt Specifies the value to which the item is to be forced The specified value must be appropriate for the type Required A VHDL one dimensional
50. mc_scan_plusargs PLI routine CR 202 memory modeling in VHDL UM 400 menus Dataflow window UM 159 List window UM 179 Main window UM 148 Process window UM 191 Signals window UM 193 Source window UM 201 Structure window UM 209 tearing off or pinning menus UM 142 Variables window UM 213 Wave window UM 218 messages bad magic number UM 127 echoing CR 71 getting more information CR 155 loading disbling with quiet CR 150 CR 185 redirecting UM 356 suppressing warnings from arithmetic packages UM 358 turning off assertion messages UM 358 MGC_LOCATION_MAP variable UM 345 mindelays CR 185 mnemonics assigning to signal values CR 180 MODEL_TECH environment variable UM 345 MODEL_TECH_TCL environment variable UM 345 modeling memory in VHDL UM 400 ModelSim commands CR 23 CR 215 modelsim command CR 91 MODELSIM environment variable UM 346 modelsim ini default to VHDL93 UM 359 delay file opening with UM 359 environment variables in UM 357 ModelSim Command Reference CR 236 Index ABCDEFPGHIJKLMNOPORSTUVWAYZ force command default setting UM 359 hierarchical library mapping UM 357 opening VHDL files UM 359 restart command defaults setting UM 359 startup file specifying with UM 358 transcript file created from UM 357 turning off arithmetic package warnings UM 358 turning off assertion messages UM 358 modelsim tcl file UM 360 modelsim_lib UM 62 path to UM 349 MODELSIM_TCL environment variable UM 346 Modified field Project ta
51. not include a dataset name then the current dataset is used If the name does not start with a path separator then the current context is used If the name is a path separator followed by a name that is not the name of a top level design unit then the first top level design unit in the design is used For a relative name containing a hierarchical path if the first item name cannot be found in the current context then an upward search is done up to the top of the design hierarchy to look for a matching item name If no items of the specified name can be found in the specified context then an upward search is done to look for a matching item in any visible enclosing scope up to an instance boundary If at least one match is found within a given context no more upward searching is done therefore some items that may be visible from a given context will not be found when wildcards are used if they are within a higher enclosing scope The wildcards and can be used at any level of a name except in the dataset name and inside of a slice specification Square bracket wildcards can also be used A wildcard character will never match a path separator For example dut will match dut siga and dut clk However dut won t match either of those Because square brackets are wildcards in the find command only parentheses can be used to index or slice arrays The WildcardFilter Tcl preference variable is used by th
52. of kind to specify a region of design space in which to look for signals to unlog Optional recursive Specifies that the scope of the search is to descend recursively into subregions Optional If omitted the search is limited to the selected region only Can be used with a wildcard to specify that only virtual signals as opposed to all signals found by the wildcard should be unlogged Optional in Specifies that the kernel exclude data for ports of mode IN whose names match the specification Optional out Specifies that the kernel exclude data for ports of mode OUT whose names match the specification Optional inout Specifies that the kernel exclude data for ports of mode INOUT whose names match the specification Optional internal Specifies that the kernel exclude data for internal items whose names match the specification Optional ports Specifies that the kernel exclude data for all ports Optional lt pattern gt Indicates which signal names or wildcard pattern should be used in finding the signals to unlog Required Any number of names or wildcard patterns may be used ModelSim Command Reference virtual nolog CR 173 See also virtual log CR 169 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 174 Commands virtual region The virtual region command creates a new user defined design hierarchy region Syntax virtual region lt parentPath gt lt
53. of interconnect delay from an SDF file L lt library_name gt Specifies the library to search for design units instantiated from Verilog See Library usage UM 72 for more information If multiple libraries are specified each must be preceded by the L option Libraries are searched in the order in which they appear on the command line Lf lt library_name gt Same as L but libraries are searched before uselib directives See Library usage UM 72 for more information Optional maxdelays Selects the maximum value in min typ max expressions Optional The default is the typical value Has no effect if you specified the min typ max selection at compile time mindelays Selects the minimum value in min typ max expressions Optional The default is the typical value Has no effect if you specified the min typ max selection at compile time ModelSim Command Reference vsim CR 201 no_cancelled_e_msg Disables negative pulse warning messages Optional By default vsim issues a warning and then filters negative pulses on specify path delays You can drive an X for a negative pulse using show_cancelled_e no_neg_tchk Disables negative timing check limits by setting them to zero Optional By default negative timing check limits are enabled This is just the opposite of Verilog XL where negative timing check limits are disabled by default and they are enabled with the neg_tchk option no_notifier Disables the toggling o
54. option selects a given generic the most explicit specification takes precedence For example vsim g top ram ul tpd_hl 10ns gtpd_hl 15ns top This command sets tpd_hl to 10ns for the top ram u1 instance However all other tpd_hl generics on other instances will be set to 15ns Limitation In general generics parameters of composite type arrays and records cannot be set from the command line However you can set string arrays std_logic vectors and bit vectors if they can be set using a quoted string For example gstrgen This is a string gslv 01001110 The quotation marks must make it into vsim as part of the string because the type of the value must be determinable outside of any context Therefore when entering this command from a shell put a forward tick around the string For example gstrgen This is a string If working within the ModelSim GUI you would enter the command as follows gstrgen This is a string gt Note When you compile Verilog code with fast see vlog CR 183 all parameter values are set at compile time Therefore the g option has no effect on these parameters G lt Name gt lt Value gt Same as g see above except that it will also override generics parameters that received explicit values in generic maps instantiations or via defparams Optional Note there is no space between G and lt Name gt lt Value gt gui Starts the ModelSim GUI without loading a des
55. regionName gt Arguments lt parentPath gt The full path to the region that will become the parent of the new region Required lt regionName gt The name you want for the new region Required See also virtual function CR 165 virtual signal CR 177 Virtual Objects User defined buses and more UM 133 gt Note Virtual regions cannot be used in the when CR 208 command ModelSim Command Reference virtual save CR 175 virtual save The virtual save command saves the definitions of virtuals to a file Syntax virtual save kind lt kind gt append lt filename gt Arguments kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted append Specifies to save only virtuals that are not already saved or weren t read in from a macro file These unsaved virtuals are then appended to the specified or default file Optional lt filename gt Used for writing the virtual definitions Optional If you don t specify lt filename gt the default virtual filename virtuals do will be used You can specify a different default in the pref tcl file See also virtual count CR 160 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 176 Commands virtual show The virtual show command lists the full path names of all explicitly defined
56. required Available window types are dataflow list process signals source structure variables and wave noview wavel Closes the Wave window named wavel noview 1 Closes all List windows noview s Closes all Structure Signals and Source windows view CR 158 ModelSim Command Reference nowhen CR 97 nowhen The nowhen command deactivates selected when CR 208 commands Syntax nowhen lt label gt Arguments lt label gt Specifies an individual when command Optional Wildcards may be used to select more than one when command Examples when label 99 b echo b changed nowhen 99 This nowhen command deactivates the when CR 208 command labeled 99 nowhen This nowhen command deactivates all when CR 208 commands ModelSim Command Reference CR 98 Commands onbreak The onbreak command is used within a macro It specifies one or more commands to be executed when running a macro that encounters a breakpoint in the source code Using the onbreak command without arguments will return the current onbreak command string Use an empty string to change the onbreak command back to its default behavior i e onbreak In that case the macro will be interrupted after a breakpoint occurs after any associated bp command CR 46 string is executed onbreak commands can contain macro calls Syntax onbreak lt command gt lt command gt Arguments lt command gt Any command
57. rules e All text in a line beginning with to its end is treated as a comment e All text bracketed by is treated as a comment Also program arguments can be placed on separate lines in the argument file with the newline characters treated as space characters There is no need to put at the end of each line DOS pathnames require a backslash but ModelSim will accept either a backslash or the forward slash gt Note VHDL93 uses backslashes to denote extended identifiers By default ModelSim PE PLUS uses backslashes as pathname separators Therefore it cannot recognize extended identifiers You can change this behavior so that backslashes on comment lines are used for extended identifiers but then you can only use forward slashes when you need pathname delimiters To do this uncomment the following line in the modelsim ini file and set its value to zero BackslashesArePathnameDelimiters 0 This will allow command lines that can reference signals variables and design unit names that use extended identifiers for example examine clock 2x ModelSim Command Reference GUI_expression_format CR 15 GUI_expression_format The GUI_expression_format is an option of several simulator commands that operate within the ModelSim GUI environment The commands that use the expression format are configure CR 51 examine CR 75 searchlog CR 116 virtual function CR 165 and virtual signal CR 177 Exp
58. save CR 62 ModelSim Command Reference CR 56 Commands dataset clear The dataset clear command removes all event data from the current simulation WLF file while keeping all currently logged signals logged Subsequent run commands will continue to accumulate data in the WLF file Syntax dataset clear Example add wave run 100000ns dataset clear run 100000ns Clears data in the WLF file from time Ons to 100000ns then logs data into the WLF file from time 100000ns to 200000ns See also WLF files datasets UM 126 log CR 87 ModelSim Command Reference dataset close CR 57 dataset close The dataset close command closes an active dataset To open a dataset use the dataset open command Syntax dataset close lt logicalname gt all Arguments lt logicalname gt Specifies the logical name of the dataset or alias you wish to close Required if all isn t used l1 Closes all open datasets including the simulation Optional See also dataset open CR 60 ModelSim Command Reference CR 58 Commands dataset info The dataset info command reports a variety of information about a dataset Syntax dataset info lt option gt lt dataset_name gt Arguments lt option gt Identifies what information you want reported Required Only one option per command is allowed The current options include name Returns the actual name of the dataset Useful for identifying the real dataset name
59. specify report res t Resets values back to defaults Optional The behavior is to reset to default then apply remainder of arguments on command line See examples below If specified by itself without any other arguments reset disables dataset snapshot size lt file size gt Specifies that a snapshot occurs based on WLF file size You must specify either size or time See examples below time lt simulation time gt Specifies that a snapshot occurs based on simulation time You must specify either time or size See examples below ModelSim Command Reference CR 64 Commands Examples See also dataset snapshot size 10 Creates the file vsim_snapshot wlf that is written to every time the current WLF file reaches a multiple of 10 MB i e at 10 MB 20 MB 30 MB etc dataset snapshot size 10 mode sequential Similar to the previous example but in this case the current WLF file is cleared every time it reaches 10 MB dataset snapshot time 1000000 file gold wlf mode sequential filemode increment Assuming simulator time units are ps this command saves a file called gold_n wlf every 1000000 ps If you ran for 3000000 ps you d have three files gold_0 wif with data from 0 to 1000000 ps gold_1I wlf with data from 1000001 to 2000000 and gold_2 wlf with data from 2000001 to 3000000 gt Note Because this example uses sequential mode if you ran the simulation for 3500000 ps the resulting vsim wif th
60. table The following table provides a brief description of each ModelSim command Command details arguments and examples can be found at the page numbers given in the Command name column Command name Action abort CR 30 halts the execution of a macro file interrupted by a breakpoint or error add dataflow CR 31 adds the specified item to the Dataflow window add list CR 32 lists VHDL signals and variables and Verilog nets and registers and their values in the List window add log also known as the log command see log CR 87 add wave CR 35 adds VHDL signals and variables and Verilog nets and registers to the Wave window alias CR 39 creates a new Tcl procedure that evaluates the specified commands batch_mode CR 40 returns a if ModelSim is operating in batch mode otherwise returns a 0 bd CR 41 deletes a breakpoint bookmark add wave CR 42 adds a bookmark to the specified Wave window bookmark delete wave CR 43 deletes bookmarks from the specified Wave window bookmark goto wave CR 44 zooms and scrolls a Wave window using the specified bookmark bookmark list wave CR 45 displays a list of available bookmarks bp CR 46 sets a breakpoint cd CR 49 changes the ModelSim local directory to the specified directory change CR 50 modifies the value of a VHDL variable or Verilog register variable config
61. the working directory By default the file is named vsim wlf You can change the default name using the wlf option of the vsim CR 192 command If no port mode is specified the WLF file contains data for all items in the selected region whose names match the item name specification The WLF file is the source of data for the List and Wave windows An item that has been logged and is subsequently added to the List or Wave window will have its complete history back to the start of logging available for listing and waving Limitations Verilog memories and VHDL variables can be logged using the variable s full name only no wildcards log flush howmany in inout internal out ports recursive lt item_name gt flush Adds region data to the WLF file after each individual log command Optional Default is to add region data to the log file only when a command that advances simulation time is executed e g run step etc or when you quit the simulation howmany Returns an integer indicating the number of signals found Optional in Specifies that the WLF file is to include data for ports of mode IN whose names match the specification Optional inout Specifies that the WLF file is to include data for ports of mode INOUT whose names match the specification Optional internal Specifies that the WLF file is to include data for internal items whose names match the specification Optional out
62. to use more than one command use a semicolon to separate the commands or place them on multiple lines The entire command string must be placed in curly braces Optional do CR 68 ModelSim Command Reference CR 100 Commands onerror Syntax Arguments Example See also The onerror command is used within a macro it specifies one or more commands to be executed when a running macro encounters an error Using the onerror command without arguments will return the current onerror command string Use an empty string to change the onerror command back to its default behavior i e onerror Use onerror with a resume command CR 113 to allow an error message to be printed without halting the execution of the macro file onerror lt command gt lt command gt lt command gt Any command can be used as an argument to onerror If you want to use more than one command use a semicolon to separate the commands or place them on multiple lines The entire command string must be placed in curly braces Optional onerror quit f Forces the simulator to quit if an error is encountered while the macro is running abort CR 30 do CR 68 onbreak CR 98 resume CR 113 status CR 121 gt Note You can also set the global OnErrorDefaultAction Tcl variable in the pref tcl file to dictate what action ModelSim takes when an error occurs The onerror command is invoked only when an error occurs in the macro file tha
63. virtuals Signals Optional implicit Used internally to create virtuals that are automatically saved with the List or Wave format Optional delay lt time gt Specifies a value by which the virtual signal will be delayed Optional You can use negative values to look forward in time If units are specified the lt time gt option must be enclosed in curly braces See the examples below for more details lt expressionString gt A text string expression in the MTI GUI expression format that defines the signal and subelement concatenation Can also be a literal constant or computed subexpression Required For details on syntax please see Syntax and conventions CR 5 lt name gt The name you define for the virtual signal Required Case is ignored unless installed in a Verilog region Use alpha numeric and underscore characters only unless you are using VHDL extended identifier notation If using VHDL extended identifier notation lt name gt needs to be quoted with double quotes or with curly braces ModelSim Command Reference CR 178 Commands Examples virtual signal env sim chip alu concat_range 4 downto 0 a_04 amp a_03 amp a_02 amp a_01 amp a_00 a Reconstructs a bus sim chip alu a 4 downto 0 using VHDL notation assuming that a_ii are scalars all of the same type virtual signal env sim chip alu concat_range 4 0 amp a_04 a_03 a_02 a_01 a_00 a Reconstructs a bus sim chi
64. want help The entry is case and space sensitive Optional lt topic gt Specifies a topic for which you want help The entry is case and space sensitive Optional Specify one of the following six topics Topic Description commands Lists all available commands and topics debugging Lists debugging commands execution Lists commands that control execution of your simulation Tcl Lists all available Tcl commands Tk Lists all available Tk commands incrTCL Lists all available incr TCL commands ModelSim Command Reference CR 86 Commands history The history command lists the commands you have executed during the current session History is a Tcl command For more information consult the Tcl Man Pages Syntax history clear keep lt value gt Arguments clear Clears the history buffer Optional keep lt value gt Specifies the number of executed commands to keep in the history buffer Optional The default is 50 ModelSim Command Reference log Syntax Arguments log The log command creates a wave log format WLF file containing simulation data for all HDL items whose names match the provided specifications Items VHDL signals and variables and Verilog nets and registers that are displayed using the add list CR 32 and add wave CR 35 commands are automatically recorded in the WLF file The log is stored ina WLF file formerly a WAV file in
65. when label a_100 when label a_100 now 100 delete this breakpoint then stop nowhen a_100 stop ModelSim Command Reference CR 212 See also Time based breakpoints You can build time based breakpoints into a when statement with the following syntax For absolute time indicated by use when Snow 1750ns stop You can also use when errorFlag 1 OR Snow 2ms stop This example adds 2ms to the simulation time at which the when statement is first evaluated then stops You can also use variables as shown in the following example set time 1000 when Snow Stime stop The quotes instruct Tcl to expand the variables before calling the command So the when command sees when Snow 1000 stop Note that now has the escaped This prevents Tcl from expanding the variable because if it did you would get when 0 1000 stop bp CR 46 disablebp CR 67 enablebp CR 73 nowhen CR 97 ModelSim Command Reference where CR 213 where The where command displays information about the system environment This command is useful for debugging problems where ModelSim cannot find the required libraries or support files Syntax where Arguments None Description The where command displays two system settings current directory This is the current directory that ModelSim was invoked from or was specified on the ModelSim command line current project file This is the
66. 1 for additional information novital Causes vcom to use VHDL code for VITAL procedures rather than the accelerated and optimized timing and primitive packages built into the simulator kernel Optional Allows breakpoints to be set in the VITAL behavior process and permits single stepping through the VITAL procedures to debug your model Also all of the VITAL data can be viewed in the variables or signals windows novitalcheck Disables VITAL 2000 compliance checking if you are using VITAL 2 2b Optional nowarn lt number gt Selectively disables an individual warning message Optional Multiple nowarn switches are allowed Warnings may be disabled for all compiles via the Main window Options gt Compile Options menu command or the modelsim ini file see the vcom VHDL compiler control variables UM 350 The warning message numbers are unbound component process without a wait statement null range no space in time literal multiple drivers on unresolved signal compliance checks optimization messages OI ADUBWNHEHE signal value used in expression evaluated at elaboration 00 Lower the optimization to a minimum with O0 capital oh zero Optional Use this to work around bugs increase your debugging visibility on a specific cell or when you want to place breakpoints on source lines that have been optimized out pedanticerrors Forces ModelSim to error rather than warn on two conditions 1
67. 200 standards UM 14 timing check disabling UM 52 VITAL package UM 47 VHDL utilities UM 62 UM 63 get_resolution UM 62 to_real UM 64 to_time UM 65 VHDL493 ini file variable UM 351 view command CR 158 viewing design hierarchy UM 143 library contents UM 41 waveforms CR 197 UM 125 virtual count commands CR 160 virtual define command CR 161 virtual delete command CR 162 virtual describe command CR 163 virtual expand commands CR 164 virtual function command CR 165 virtual hide command CR 168 UM 134 virtual log command CR 169 virtual nohide command CR 171 virtual nolog command CR 172 virtual objects UM 133 virtual functions UM 134 virtual regions UM 135 virtual signals UM 133 virtual types UM 135 virtual region command CR 174 UM 135 virtual regions reconstruct the RTL hierarchy in gate level design UM 135 virtual save command CR 175 UM 134 virtual show command CR 176 virtual signal command CR 177 UM 133 virtual signals reconstruct RTL level design busses UM 134 reconstruct the original RTL hierarchy UM 134 virtual hide command UM 134 virtual type command CR 180 VITAL compiling and simulating with accelerated VITAL packages UM 61 disabling optimizations for debugging UM 61 specification and source code UM 60 VITAL packages UM 60 vital95 ini file variable UM 349 vlib command CR 182 vlog command CR 183 vlog opt file UM 253 vlog95compat ini file variable UM 351 vmake command CR 189 vmap command CR 191 VPI regi
68. 250 time resolution in Verilog UM 78 in VHDL UM 52 CR 241 ABCDEFGHIJKLMNOPORSTUVWXAYZ setting with the GUI UM 255 with vsim command CR 197 time type converting to real UM 64 time time units simulation time CR 14 time based breakpoints UM 198 timescale directive warning disabling CR 202 timing setuphold recovery UM 93 annotation UM 297 disabling checks CR 185 UM 308 disabling checks for entire design CR 195 negative check limits described UM 84 extending CR 200 title Main window changing CR 197 to_real VHDL function UM 64 to_time VHDL function UM 65 toggling waveform popup on off UM 232 toolbar Dataflow window UM 162 Main window UM 154 Wave window UM 221 tooltip toggling waveform popup UM 232 tracing events UM 168 source of unknown UM 169 transcript file name specifed in modelsim ini UM 357 redirecting with 1 CR 195 reducing file size CR 126 saving UM 147 TranscriptFile variable in ini file UM 356 using as a DO file UM 147 transcript command CR 125 transcript file command CR 126 tree windows VHDL and Verilog items in UM 143 viewing the design hierarchy UM 144 TreeUpdate command CR 220 triggers in the List window UM 392 triggers in the List window setting UM 185 TSCALE disabling warning CR 202 TSSI CR 225 in VCD files UM 320 tssi2mti command CR 127 type converting real to time UM 65 converting time to real UM 64 Type field Project tab UM 26 U u CR 186 unbound component UM 250 UnbufferedOutp
69. 35 ved dumpportsoff command CR 136 ved dumpportson command CR 137 ved file command CR 138 VCD files UM 311 adding items to the file CR 128 capturing port driver data CR 131 UM 320 case sensitivity UM 314 converting to WLF files CR 146 creating CR 128 UM 314 dumping variable values CR 129 dumpports tasks UM 312 flushing the buffer contents CR 142 from VHDL source to VCD output UM 317 inserting comments CR 130 internal signals adding CR 128 specifying maximum file size CR 143 specifying name of CR 140 specifying the file name CR 138 state mapping CR 138 CR 140 supported TSSI states UM 320 turn off VCD dumping CR 144 turn on VCD dumping CR 145 VCD system tasks UM 312 viewing files from another tool CR 146 ved files command CR 140 ved flush command CR 142 ved limit command CR 143 ved off command CR 144 ved on command CR 145 ved2wlf command CR 146 vcom command CR 147 vdel command CR 153 vdir command CR 154 vector elements initializing CR 50 vendor libraries compatibility of CR 154 Vera see Vera documentation Verilog ACC routines UM 116 capturing port driver data with dumpports CR 138 UM 320 cell libraries UM 88 compiler directives UM 96 compiling and linking PLI C applications UM 105 compiling and linking PLI C applications UM 106 compiling design units UM 69 ModelSim Command Reference compiling with XL uselib compiler directive UM 75 creating a design library UM 69 event order in simulation UM 80 language tem
70. 87 or by doing a nolog reset Because use of the nolog command adds new information to the WLF file WLF files created when using the nolog command cannot be read by older versions of the simulator If you are using dumplog64 c you will need to get an updated version nolog all reset recursive in out inout ports internal howmany lt item_name gt all Turns off logging for all signals currently logged Optional Must be used alone without other arguments fe5et Turns logging back on for all signals unlogged Optional Must be used alone without other arguments recursive Specifies that the scope of the search is to descend recursively into subregions Optional If omitted the search is limited to the selected region in Specifies that the WLF file is to turn off logging for ports of mode IN whose names match the specification Optional out Specifies that the WLF file is to turn off logging for ports of mode OUT whose names match the specification Optional inout Specifies that the WLF file is to turn off logging for ports of mode INOUT whose names match the specification Optional ports Specifies that the scope of the search is to turn off logging for all ports Optional internal Specifies that the WLF file is to turn off logging for internal items whose names match the specification Optional howmany Returns an integer indicating the number of signals found Optional
71. CD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference CR 142 Commands vcd flush Syntax Arguments See also The ved flush command flushes the contents of the VCD file buffer to the specified VCD file This command is useful if you want to create a complete vcd file without ending your current simulation Related Verilog tasks dumpflush fdumpflush ved flush lt filename gt lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd if ved file was not invoked See Chapter 11 Value Change Dump VCD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference vcd limit Syntax Arguments See also vcd limit CR 143 The ved limit command specifies the maximum size of a VCD file by default limited to available disk space When the size of the file exceeds the limit a comment is appended to the file and VCD dumping is disabled Related Verilog tasks dumplimit fdumplimit ved limit lt filesize gt lt filename gt lt filesize gt Specifies the maximum VCD file size in bytes Required lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd i
72. Commands vsim lt info gt The vsim lt info gt commands return information about the current vsim executable vsimAuth Returns the authorization level PE SE VHDL Verilog PLUS vsimDate Returns the date the executable was built such as Apr 10 2000 vsimId Returns the identifying string such as ModelSim 5 4 vsimVersion Returns the version as used by the licensing tools such as 1999 04 vsimVersionString Returns the full vsim version string This same information can be obtained using the version argument of the vsim command CR 192 ModelSim Command Reference vsource CR 207 vsource The vsource command specifies an alternative file to use for the current source file This command is used when the current source file has been moved The alternative source mapping exists for the current simulation only Syntax vsource lt filename gt Arguments lt filename gt Specifies a relative or full pathname Optional If filename is omitted the source file for the current design context is displayed Examples vsource design vhd vsource old design vhd ModelSim Command Reference CR 208 Commands when The when command instructs ModelSim to perform actions when the specified conditions are met For example you can use the when command to break on a signal value or at a specific simulator time see Time based breakpoints CR 212 Conditions can include the following HDL items VHDL signals and Veri
73. D of the result with the current value of top signalB The notation uses positive numbers for looking into the future and negative numbers for delay This notation does not support the use of time units ModelSim Command Reference CR 22 Syntax and conventions NOW gt 23 us amp amp NOW lt 54 us amp amp clk rising amp amp mode writing Evaluates to a boolean true when WLF file time is between 23 and 54 microseconds clk just changed from low to high and signal mode is enumeration writing searchlog expr dbus hasX 0 ns dbus Searches for an X in dbus This is equivalent to the expression dbus 0 x dbus 1 x This makes it possible to search for X values without having to write a type specific literal ModelSim Command Reference CR 23 Commands Chapter contents Command reference table a a CR 24 The commands here are entered either in macro files or on the command line of the Main window Some commands are automatically entered on the command line when you use the ModelSim graphical user interface Note that in addition to the simulation commands documented in this section you can use the Tcl commands described in the Tcl man pages use the Main window menu selection Help gt Tcl Man Pages gt Note ModelSim commands are case sensitive Type them as they are shown in this reference ModelSim Command Reference Commands Command reference
74. H lt alphanum gt where lt alphanum gt includes 0 9 a f A F and Example 12 hc91 This is the preferred notation because it removes the ambiguity about the number of bits Based notation ModelSim Command Reference Ox OX Oo 0O Ob OB ModelSim automatically zero fills unspecified upper bits GUI_expression_format CR 19 Variables Variable Type Name of a signal The name may be a simple name a VHDL or VLOG style extended identifier or a VHDL or VLOG style path The signal must be one of the following types VHDL signal of type INTEGER REAL or TIME VHDL signal of type std_logic or bit VHDL signal of type user defined enumeration VLOG net VLOG register VLOG integer or VLOG real Returns the value of time at the current location in the WLF file as the WLF file is being scanned not the most recent simulation time Array variables Variable Type Name of a signal VHDL signals of type bit_vector or std_logic_vector VLOG register VLOG net array A subrange or index may be specified in either VHDL or VLOG syntax Examples mysignal 1 to 5 mysignal 1 5 mysignal 4 mysignal 4 Signal attributes lt name gt event lt name gt rising lt name gt falling lt name gt delayed lt name gt hasX The delayed attribute lets you assign a delay to a VHDL signal To assign a delay to a signal in Verilog use
75. I objects in the Veriuser entry in the modelsim ini file see Preference variables located in INI files UM 349 You can use environment variables as part of the path lt plusarg gt Arguments preceded with are accessible by the Verilog PLI routine mc_scan_plusargs Optional t pulse_e lt percent gt Controls how pulses are propagated through specify path delays where lt percent gt is a number between 0 and 100 that specifies the error limit as a percentage of the path delay Optional A pulse greater than or equal to the error limit propagates to the output in transport mode transport mode allows multiple pending transitions on an output A pulse less than the error limit and greater than or equal to the rejection limit see pulse_r lt percent gt propagates to the output as an X If the rejection limit is not specified then it defaults to the error limit For example consider a path delay of 10 along with a pulse_e 80 option The error limit is 80 of 10 and the rejection limit defaults to 80 of 10 This results in the propagation of pulses greater than or equal to 8 while all other pulses are filtered Note that you can force specify path delays to operate in transport mode by using the pulse_e 0 option t pulse_e_style_ondetect Selects the on detect style of propagating pulse errors see pulse_e Optional A pulse error propagates to the output as an X and the on detect style is to schedule the X immedia
76. M 208 see also windows Structure window symbol mapping Dataflow window UM 174 symbolic constants displaying CR 180 symbolic names assigning to signal values CR 180 synopsys ini file variable UM 349 Synopsys libraries UM 47 synthesis rule compliance checking CR 147 UM 251 UM 350 system calls VCD UM 312 Verilog UM 90 system commands UM 331 ModelSim Command Reference system tasks ModelSim Verilog UM 95 VCD UM 312 Verilog UM 90 Verilog XL compatible UM 93 T tab stops in the Source window UM 207 tb command CR 124 Tcl UM 323 UM 334 command separator UM 330 command substitution UM 329 command syntax UM 326 evaluation order UM 330 Man Pages in Help menu UM 153 preference variables UM 360 relational expression evaluation UM 330 time commands UM 333 variable in when commands CR 209 substitution UM 331 VSIM Tcl commands UM 332 temp files VSOUT UM 348 text and command syntax UM 16 Text editing UM 156 UM 369 TextIO package alternative I O files UM 59 containing hexadecimal numbers UM 58 dangling pointers UM 58 ENDFILE function UM 58 ENDLINE function UM 58 file declaration UM 55 implementation issues UM 57 providing stimulus UM 59 standard input UM 56 standard output UM 56 WRITE procedure UM 57 WRITE_STRING procedure UM 57 TF routines UM 118 TFMPC disabling warning CR 202 time absolute using CR 14 simulation time units CR 14 time resolution as a simulator state variable UM 362 time literal missing space UM
77. M 58 ENDLINE function UM 58 entities default binding rules UM 45 entities specifying for simulation CR 204 entity simulator state variable UM 362 enumerated types UM 394 user defined CR 180 environment command CR 74 environment variables UM 345 reading into Verilog code CR 183 referencing from ModelSim command line UM 348 referencing with VHDL FILE variable UM 348 setting in Windows UM 347 specifying library locations in modelsim ini file UM 349 specifying UNIX editor CR 72 state of CR 103 transcript file specifying location of UM 356 using in pathnames CR 12 using with location mapping UM 397 variable substitution using Tcl UM 331 environment displaying or changing pathname CR 74 errors bad magic number UM 127 during compilation locating UM 248 getting details about messages CR 155 onerror command CR 100 event order changing in Verilog CR 183 in Verilog simulation UM 80 event queues UM 80 events tracing UM 168 examine command CR 75 examine tooltip toggling on off UM 232 exit command CR 78 expand net UM 165 Explicit ini file variable UM 350 Expression Builder UM 271 configuring a List trigger with UM 392 extended identifiers CR 14 syntax in commands CR 12 F f CR 184 file I O TextIO package UM 55 VCD files UM 311 file line breakpoints UM 206 files grouping for compile UM 29 filtering signals in Signals window UM 194 find command CR 79 finding cursors in the Wave window UM 236 marker in the List window UM 187
78. Model Sim Xilinx Edition Il Command Reference Version 5 7g Published 18 Jun 03 The world s most popular HDL simulator ModelSim is produced by Model Technology a Mentor Graphics Corporation company Copying duplication or other reproduction is prohibited without the written consent of Model Technology The information in this manual is subject to change without notice and does not represent a commitment on the part of Model Technology The program described in this manual is furnished under a license agreement and may not be used or copied except in accordance with the terms of the agreement The online documentation provided with this product may be printed by the end user The number of copies that may be printed is limited to the number of licenses purchased ModelSim is a registered trademark and Signal Spy TraceX ChaseX and Model Technology are trademarks of Mentor Graphics Corporation PostScript is a registered trademark of Adobe Systems Incorporated UNIX is a registered trademark of AT amp T in the USA and other countries FLEXIm is a trademark of Globetrotter Software Inc IBM AT and PC are registered trademarks AIX and RISC System 6000 are trademarks of International Business Machines Corporation Windows Microsoft and MS DOS are registered trademarks of Microsoft Corporation OSF Motif is a trademark of the Open Software Foundation Inc in the USA and other countries SPARC is a registered trademark and S
79. ModelSim Command Reference examine CR 77 time lt time gt Specifies the time value between 0 and now for which to examine the items Optional The items to be examined must be logged via the add list add wave or log command in order for the examine command to be able to return a value for a requested time This option can be used only with items that have been logged via the add list add wave or log command If the lt time gt field uses a unit the value and unit must be placed in curly braces For example the following are equivalent for ps resolution exa time 3 6 ns signal_a exa time 3600 signal_a value Returns value s as a curly braces separated Tcl list Default Use to toggle off a previous use of name lt name gt Specifies the name of any HDL item Required All item types are allowed except those of the type file Multiple names and wildcards are accepted Spaces square brackets and extended identifiers require curly braces see examples below for more details To examine a VHDL variable you can add a process label to the name For example make certain to use two underscore characters exa line_ 36 i Examples examine rega 16 Returns the value of rega that is specified by the index i e 16 Note that you must use curly braces when examining subelements examine foo 20 22 Returns the value of foo specified by the slice i e 20 22 Note the curly braces examine top My extended id
80. PARCstation is a trademark of SPARC International Inc Sun Microsystems is a registered trademark and Sun SunOS and OpenWindows are trademarks of Sun Microsystems Inc All other trademarks and registered trademarks are the properties of their respective holders Copyright 1990 2003 Model Technology a Mentor Graphics Corporation company All rights reserved Confidential Online documentation may be printed by licensed customers of Model Technology and Mentor Graphics for internal business purposes only ModelSim support Support for ModelSim is available from your FPGA vendor See the About ModelSim dialog box accessed via the Help menu for contact information ModelSim Command Reference Table of Contents CR 3 Syntax and conventions CR 5 Documentation conventions CR 6 Command return values CR 7 Command shortcuts CR 7 Command history shortcuts CR 7 Numbering conventions CR 8 File and directory pathnames CR 9 HDL item names CR 10 Wildcard characters CR 13 ModelSim variables CR 13 Simulation time units CR 14 Comments in argument files CR 14 GUI_expression_format CR 15 Commands CR 23 Command reference table CR 24 abort CR 30 add dataflow CR 31 add list CR 32 add wave CR 35 alias CR 39 batch_mode CR 40 bd CR 41 bookmark add wave CR 42 bookmark delete wave CR 43 bookmark goto wave CR 44 bookmark list wave CR 45 bp CR 46 cd CR 49 change CR 50 configure CR 51 dataset alias CR 55 dataset
81. UM 196 creating from VCD CR 146 filtering combining CR 216 limiting size CR 198 log command CR 87 overview UM 126 repairing CR 218 saving CR 62 CR 63 UM 127 saving at intervals UM 131 specifying name CR 197 using in batch mode UM 389 wlf2log command CR 214 wlfman command CR 216 wlfrecover command CR 218 work library UM 38 workspace UM 146 write format command CR 219 write list command CR 221 write preferences command CR 222 write report command CR 223 write transcript command CR 224 write tssi command CR 225 write wave command CR 227 X X tracing unknowns UM 169 X propagation disabling for entire design CR 195 Y y CR 187 Z zero delay elements UM 53 CR 245 ABCDEFGHIJKLMNOPORSTUVWAYZ zero delay mode UM 89 zero delay loop infinite UM 396 zero delay oscillation UM 396 zero delay race condition UM 80 zoom Dataflow window UM 167 from Wave toolbar buttons UM 237 saving range with bookmarks UM 238 with the mouse UM 238 ModelSim Command Reference CR 246 ModelSim Command Reference
82. WLF file from existing WLF file wlfrecover CR 218 attempts to repair incomplete WLF files write format CR 219 records the names and display options in a file of the HDL items currently being displayed in the List or Wave window write list CR 221 records the contents of the List window in a list output file write preferences CR 222 saves the current GUI preference settings to a Tcl preference file write report CR 223 prints a summary of the design being simulated write transcript CR 224 writes the contents of the Main window transcript to the specified file write tssi CR 225 records the contents of the List window in a TSSI format file write wave CR 227 records the contents of theWave window in PostScript format ModelSim Command Reference CR 30 Commands abort Syntax Arguments See also The abort command halts the execution of a macro file interrupted by a breakpoint or error When macros are nested you may choose to abort the last macro only abort a specified number of nesting levels or abort all macros The abort command may be used within a macro to return early abort ene ali lt n gt all An integer giving the number of nested macro levels to abort all aborts all levels Optional Default is 1 onbreak CR 98 onElabError CR 99 onerror CR 100 ModelSim Command Reference add dataflow CR 31 add dataflow Syntax
83. a dataset snapshot dir lt directory gt disable enable file lt filename gt filemode overwrite increment mode cumulative sequential report reset size lt file size gt time lt simulation time gt dir lt directory gt Specifies a directory into which the files should be saved Optional Default is to save into the directory where ModelSim is writing the current WLF file disable Turns snapshotting off Optional All other options are ignored if you specify disable enable Turns snapshotting on Optional Default file lt filename gt Specifies the name of the file to save Optional Default is vsim_snapshot wlf will be appended to the file and possibly an incrementing suffix if filemode is set to increment filemode overwrite increment Specifies whether to overwrite the snapshot file each time a snapshot occurs Optional Default is overwrite If you specify increment a new file is created for each snapshot An incrementing suffix 0 to n is added to each new file e g vsim_snapshot_0 wlf mode cumulative sequential Specifies whether to keep all data from the time signals are first logged Optional Default is cumulative If you specify sequential the current WLF file is cleared every time a snapshot is taken See the examples for further details report Lists current snapshot settings in the Main window transcript Optional All other options are ignored if you
84. akpoint or when statement id to enable Optional If you don t specify an id all breakpoints are enabled See also bd CR 41 bp CR 46 disablebp command CR 67 onbreak CR 98 resume CR 113 when CR 208 ModelSim Command Reference CR 74 Commands environment Syntax Arguments Examples The environment or env command allows you to display or change the current dataset and region signal environment environment dataset nodataset lt dataset_prefix gt lt pathname gt dataset Displays the specified environment pathname with a dataset prefix Optional Dataset prefixes are displayed by default if more than one dataset is open during a simulation session nodataset Displays the specified environment pathname without a dataset prefix Optional lt dataset_prefix gt Changes all unlocked windows to the specified dataset context Optional The prefix is the logical name of the dataset followed by a colon e g sim If the lt pathname gt argument is specified as well it will change the environment to that specified context If lt pathname gt is omitted the environment reflects the previously set context If you don t specify a dataset prefix then the current dataset is used lt pathname gt Specifies the pathname to which the current region signal environment is to be changed Optional If omitted the command causes the pathname of the current region signal environment to be displayed
85. al The default is to use the last delta of the time step The items to be examined must be logged via the add list add wave or log command in order for the examine command to be able to return a value for a requested delta This option can be used only with items that have been logged via the add list add wave or log command env lt path gt Specifies a path to look for a signal name Optional in Specifies that lt name gt include ports of mode IN Optional out Specifies that lt name gt include ports of mode OUT Optional inout Specifies that lt name gt include ports of mode INOUT Optional internal Specifies that lt name gt include internal non port signals Optional ports Specifies that lt name gt include all ports Optional Has the same effect as specifying in inout and out together name Displays signal name s along with the value s Optional Default is value behavior see below lt radix gt Specifies the radix for the items that follow in the command Valid entries or any unique abbreviations are binary ascii character unsigned decimal octal hex symbolic and default If no radix is specified for an enumerated type the default representation is used You can change the default radix for the current simulation using the radix command CR 108 You can change the default radix permanently by editing the DefaultRadix UM 353 variable in the modelsim ini file
86. al The default is landscape horizontal lt filename gt Specifies the name of the PostScript output file Required write wave alu ps Saves the current data in the Wave window in a file named alu ps ModelSim Command Reference CR 228 Commands write wave start 600ns end 800ns perpage 100ns top ps Writes two separate pages to top ps as indicated in the illustration the actual PostScript print out will show all items listed in the Wave window not just the portion in view page 1 starts at 600 ns wave default page 2 ends at 800 ns alx File Edit Cursor Zoom Prop Window g E Pinwae B0 RR ler 100 ns per page JU top clk JU top prw JU top pstrb IU top prdy EHIU top paddr EHIU top pdata WU top stw WU top sstrb IU top stdy EHIU top saddr EHIU top sdata 540 ns to 853 ns Va start finish To make the job of creating a PostScript waveform output file easier use the File gt Print Postscript menu selection in the Wave window See Saving waveforms UM 242 for more information ModelSim Command Reference CR 229 ABCDEFGHIJKLMNOPORSTUVWAYZ Index CR Command Reference UM User s Manual Symbols typdelays CR 186 So shared object file loading PLI VPI C applications UM 105 loading PLI VPI C applications UM 106 hasX hasX CR 19 Numerics 1076 IEEE Std UM 14 1364 IEEE Std UM 14 UM 68 64 bit time now variable UM 363 Tcl time comman
87. all signals under u2 Note that you can produce these files from scratch but be careful with syntax wlfman items always creates a legal item_list_file wlfman filter reads in a WLF file and optionally an item_list_file and writes out another WLF file containing filtered information from those sources You determine the filtered information with the arguments you specify Syntax wlfman info lt wlffile gt wlfman items n v lt wlffile gt wlfman filter b lt time gt e lt time gt f lt item list file gt r lt item gt s lt symbol gt t lt resolution gt lt sourcewlffile gt lt outwlffile gt Arguments for wlfman info lt wlffile gt Specifies the WLF file from which you want information Required Arguments for wlfman items H Lists regions only no signals Optional y Produces verbose output that lists item type next to each item Optional lt wlffile gt Specifies the WLF file from which you want item information Required ModelSim Command Reference wlfman CR 217 Arguments for wifman filter See also b lt time gt Specifies the simulation time at which you want to begin reading information from the source WLF file Optional By default the output includes the entire time that is recorded in the source WLF file e lt time gt Specifies the simulation time at which you want to end reading information from the source WLF file Optional f lt item list file gt
88. an modelsim tcl you must specify the alternative file name with the MODELSIM_TCL UM 346 environment variable You can modify variables by editing the preference file with the ModelSim notepad CR 95 notepad lt preference file name gt ModelSim Command Reference write report CR 223 write report The write report command prints a summary of the design being simulated including a list of all design units VHDL configurations entities and packages and Verilog modules with the names of their source files Syntax write report lt ilename gt 1 s tel Arguments lt filename gt Specifies the name of the output file where the data is to be written Optional If the lt filename gt is omitted the report is written to the Main window transcript 1 Generates more detailed information about the design Default 5 Generates a short list of design information Optional teL Generates a Tcl list of design unit information Optional This argument cannot be used with a filename Examples write report alu rep Saves information about the current design in a file named alu rep ModelSim Command Reference CR 224 Commands write transcript The write transcript command writes the contents of the Main window Transcript to the specified file The resulting file can be used to replay the transcribed commands as a DO file macro The command cannot be used in batch mode In batch mode use the standard Transcript
89. aracter ModelSim uses global Tcl variables for simulator state variables simulator control variables simulator preference variables and user defined variables see Preference variables located in Tcl files UM 360 for more information See Appendix A ModelSim variables in the User s Manual for more information on variables Variable settings report The report command CR 109 returns a list of current settings for either the simulator state or simulator control variables ModelSim Command Reference CR 14 Syntax and conventions Simulation time units You can specify the time unit for delays in all simulator commands that have time arguments For example force clk 1 50 ns 1 100 ns repeat 1 us run 2 ms Note that all the time units in a ModelSim command need not be the same Unless you specify otherwise as in the examples above simulation time is always expressed using the resolution units that are specified by the UserTimeUnit variable See UserTimeUnit UM 356 By default the specified time units are assumed to be relative to the current time unless the value is preceded by the character which signifies an absolute time specification Comments in argument files Argument files may be loaded with the f lt filename gt argument of the vcom vlog and vsim commands The f lt filename gt argument specifies a file that contains more command line arguments Comments within the argument files follow these
90. ark list wave CR 45 write format CR 219 ModelSim Command Reference CR 44 Commands bookmark goto wave The bookmark goto wave command zooms and scrolls a Wave window using the specified bookmark Syntax bookmark goto wave lt label gt Arguments lt label gt Specifies the bookmark to go to Required See also bookmark add wave CR 42 bookmark delete wave CR 43 bookmark list wave CR 45 write format CR 219 ModelSim Command Reference bookmark list wave CR 45 bookmark list wave The bookmark list wave command displays a list of available bookmarks in the Main window transcript Syntax bookmark list wave Arguments See also bookmark add wave CR 42 bookmark delete wave CR 43 bookmark goto wave CR 44 write format CR 219 ModelSim Command Reference CR 46 Commands bp Syntax Arguments The bp or breakpoint command either sets a file line breakpoint or returns a list of currently set breakpoints A set breakpoint affects every instance in the design unless the inst lt region gt argument is used bp lt filename gt lt line_number gt id lt id gt inst lt region gt disable cond lt condition_expression gt lt command gt query lt filename gt lt line_number gt line_number lt filename gt Specifies the name of the source file in which to set the breakpoint Required if you are setting HDL breakpoints lt line_number gt Specifies the lin
91. array of character enumeration can be forced as a sequence of character literals or as a based number with a radix of 2 8 10 or 16 For example the following values are equivalent for a signal of type bit_vector 0 to 3 Value Description 1111 character literal sequence 2 1111 binary radix 10 15 decimal radix 16 F hexadecimal radix gt Note For based numbers in VHDL ModelSim translates each 1 or 0 to the appropriate value for the number s enumerated type The translation is controlled by the translation table in the pref tcl file If ModelSim cannot find a translation for 0 or 1 it uses the left bound of the signal type type left for that value lt time gt Specifies the time to which the value is to be applied The time is relative to the current time unless an absolute time is specified by preceding the value with the character If the time units are not specified then the default is the resolution units selected at simulation start up Optional A zero delay force command causes the change to occur in the current rather than the next simulation delta cycle ModelSim Command Reference CR 84 Commands Examples See also force inputl 0 Forces input to 0 at the current simulator time force bus1 01XZ 100 ns Forces bus to 01XZ at 100 nanoseconds after the current simulator time force busl 16 f 200 Forces bus to 16 F at the absolute time 200 measured in the resolution units
92. athnames Several ModelSim commands have arguments that point to files or directories For example the y argument to vlog specifies the Verilog source library directory to search for undefined modules Spaces in file pathnames must be escaped or the entire path must be enclosed in quotes For example vlog top v y C Documents and Settings mcarnes simprims or vlog top v y C Documents and Settings mcarnes simprims ModelSim Command Reference CR 10 Syntax and conventions HDL item names VHDL and Verilog items are organized hierarchically Each of the following HDL items creates a new level in the hierarchy e VHDL component instantiation statement block statement and package e Verilog module instantiation named fork named begin task and function Item name syntax The syntax for specifying item names in ModelSim is as follows lt datasetName gt lt datasetSeparator gt lt pathSeparator gt lt hierarchicalPath gt lt item Name gt lt elementSelection gt where datasetName is the logical name of the WLF file in which the item exists The currently active simulation is the sim dataset Any loaded WLF file is referred to by the logical name specified when the WLF file was loaded See Chapter 7 WLF files datasets and virtuals for more information datasetSeparator is the character used to terminate the dataset name The default is though a different character other than may
93. ax GUI expressions generally follow C language syntax with both VHDL specific and Verilog specific conventions supported These expressions are not parsed by the Tcl parser and so do not support general Tcl parentheses should be used rather than curly braces Procedure calls are not supported A GUI expression can include the following elements Tcl macros constants array constants variables array variables signal attributes operators and casting Tcl macros Macros are useful for pre defined constants or for entire expressions that have been previously saved The substitution is done only once when the expression is first parsed Macro syntax is lt name gt Substitutes the string value of the Tcl global variable lt name gt Constants Type Values boolean value true false TRUE FALSE integer 0 9 real number lt int gt lt int gt lt int gt exp where the optional exp is elE I 0 9 time integer or real optionally followed by time unit enumeration VHDL user defined enumeration literal single bit constants expressed as any of the following OIxXZZUHLW U X OCP OZ EPE DL W PbO bl Array constants expressed in any of the following formats Type Values VHDL notation lt int gt lt alphanum gt Example 16 abc123 VHDL bitstring UIXION IZILIHIWI Example 11010X11 VLOG notation lt int gt bIBlolOldIDIhI
94. b UM 26 modules handling multiple common names UM 73 mouse shortcuts Main window UM 156 UM 369 Source window UM 369 Wave window UM 240 UM 366 mpf file UM 18 loading from the command line UM 35 mti_cosim_trace environment variable UM 346 MTI_TF_LIMIT environment variable UM 346 multiple drivers on unresolved signal UM 250 multiple simulations UM 125 multi source interconnect delays CR 195 N n simulator state variable UM 362 name case sensitivity VHDL vs Verilog CR 12 Name field Project tab UM 26 negative pulses driving an error state CR 203 negative timing setuphold recovery UM 93 algorithm for calculating delays UM 84 check limits UM 84 extending check limits CR 200 nets adding to the Wave and List windows UM 196 Dataflow window displaying in UM 158 drivers of displaying CR 69 stimulus CR 82 values of displaying in Signals window UM 192 examining CR 75 forcing UM 195 saving as binary log file UM 196 ModelSim Command Reference waveforms viewing UM 215 next and previous edges finding UM 241 UM 367 Nlview widget Symlib format UM 174 no space in time literal UM 250 NoCaseStaticError ini file variable UM 350 NoDebug ini file variable VCOM UM 350 NoDebug ini file variable VLOG UM 351 noforce command CR 92 NoIndexCheck ini file variable UM 350 nolibcell CR 185 nolog command CR 93 NOMMAP environment variable UM 346 non blocking assignments UM 82 NoOthersStaticError ini file variable UM 350 NoRangeCheck
95. bove virtual signal aold anew amp bold bnew myequalityvector Creates a two bit signal with an enumerated type based on the results of the subexpressions For example if aold equals anew then the first bit is true 1 Alternatively if bold does not equal c the second bit is false 0 Each subexpression is evaluated independently ModelSim Command Reference Commands fully compatible with virtual signals virtual signal CR 179 add list CR 32 add log log CR 87 add wave CR 35 delete CR 65 describe CR 66 Virtual describe is a little faster examine CR 75 find CR 79 force CR 82 noforce CR 92 restart CR 111 searchlog CR 116 show CR 119 Commands compatible with virtual signals using virtual expand lt signal gt drivers CR 69 Commands not currently compatible with virtual signals when CR 208 See also ved add CR 128 virtual count CR 160 virtual define CR 161 virtual delete CR 162 virtual describe CR 163 virtual expand CR 164 virtual function CR 165 virtual hide CR 168 virtual log CR 169 virtual nohide CR 171 virtual nolog CR 172 virtual region CR 174 virtual save CR 175 virtual show CR 176 virtual type CR 180 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 180 Commands virtual type Synta
96. breakpoint in the source file alu vhd at line 147 bp alu vhd 147 do macro do Executes the macro do macro file after the breakpoint bp disable test vhd 22 echo exa varl echo exa var2 Sets a breakpoint at line 22 of the file test vhd and examines the values of the two variables var and var2 This breakpoint is initially disabled It can be enabled with the enablebp command CR 73 bp test vhd 14 if Snow 100 then cont Sets a breakpoint in every instantiation of the file test vhd at line 14 When that breakpoint is executed the command is run This command causes the simulator to continue if the current simulation time is not 100 bp query testadd vhd Lists the line number and enabled disabled status 1 enabled 0 disabled of all breakpoints in testadd vhd bp query testadd vhd 48 Lists details about the breakpoint on line 48 The output comprises six pieces of information the first item 0 or 1 designates whether a breakpoint exists on the line 1 exists 0 doesn t exist the second item is always 1 the third item is the file name in the compiled source the fourth item is the breakpoint line number the fifth item is the breakpoint id and the sixth item 0 or 1 designates whether the breakpoint is enabled 1 or disabled 0 bp query testadd vhd 2 59 Lists all executable lines in testadd vhd between lines 2 and 59 gt Note Any breakpoints set in VHDL code and called by either resolution funct
97. ce CR 108 Commands radix The radix command specifies the default radix to be used for the current simulation The command can be used at any time The specified radix is used for all commands force CR 82 examine CR 75 change CR 50 etc as well as for displayed values in the Signals Variables Dataflow List and Wave windows You can change the default radix permanently by editing the DefaultRadix UM 353 variable in the modelsim ini file Syntax radix symbolic binary octal decimal hexadecimal unsigned asciil Arguments Entries may be truncated to any length For example symbolic could be expressed as s or sy etc Optional Also signed may be used as an alias for decimal The unsigned radix will display as unsigned decimal The ascii radix will display a Verilog item as a string equivalent using 8 bit character encoding If no arguments are used the command returns the current default radix ModelSim Command Reference report Syntax Arguments Examples report CR 109 The report command displays the value of all simulator control variables or the value of any simulator state variables relevant to the current simulation report simulator control simulator state simulator control Displays the current values for all simulator control variables simulator state Displays the simulator state variables relevant to the current simulation report simulator contr
98. ce CR 82 commands on the selected HDL items nolog CR 93 suspends writing of data to the WLF file for the specified signals ModelSim Command Reference Commands Command name Action notepad CR 95 opens a simple text editor noview CR 96 closes a window in the ModelSim GUI nowhen CR 97 deactivates selected when CR 208 commands onbreak CR 98 specifies command s to be executed when running a macro that encounters a breakpoint in the source code onElabError CR 99 specifies one or more commands to be executed when an error is encountered during elaboration onerror CR 100 specifies one or more commands to be executed when a running macro encounters an error pause CR 101 interrupts the execution of a macro precision CR 102 determines how real numbers display in the GUI printenv CR 103 echoes to the Main window the current names and values of all environment variables project CR 104 performs common operations on new projects pwd CR 105 displays the current directory path in the Main window quietly CR 106 turns off transcript echoing for the specified command quit CR 107 exits the simulator radix CR 108 specifies the default radix to be used report CR 109 displays the value of all simulator control variables or the value of any simulator state variables relevant to the current simula
99. ce in which to look for signals to log Optional recursive Specifies that the scope of the search is to descend recursively into subregions Optional If omitted the search is limited to the selected region only Can be used with a wildcard to specify that only virtual signals as opposed to all signals found by the wildcard should be logged Optional in Specifies that the kernal log data for ports of mode IN whose names match the specification Optional out Specifies that the kernel log data for ports of mode OUT whose names match the specification Optional inout Specifies that the kernel log data for ports of mode INOUT whose names match the specification Optional internal Specifies that the kernel log data for internal items whose names match the specification Optional ports Specifies that the kernel log data for all ports Optional lt pattern gt Indicates which signal names or wildcard patterns should be used in finding the signals to log Required Any number of names or wildcard patterns may be used ModelSim Command Reference CR 170 Commands See also virtual nolog CR 172 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual nohide CR 171 virtual nohide Syntax Arguments See also The virtual nohide command reverses the effect of a virtual hide command It resets the flag in the specified real or virtual signals so those signals reappea
100. checkpoint CR 129 dumps the current values of all VCD variables to the VCD file vcd comment CR 130 inserts the specified comment in the VCD file ved dumpports CR 131 creates a VCD file that captures port driver data ved dumpportsall CR 133 creates a checkpoint in the VCD file that shows the current value of all selected ports ved dumpportsflush CR 134 flushes the VCD buffer to the VCD file ved dumpportslimit CR 135 specifies the maximum size of the VCD file ved dumpportsoff CR 136 turns off VCD dumping and records all dumped port values as x ved dumpportson CR 137 turns on VCD dumping and records the current value of all selected ports vcd file CR 138 specifies the filename and state mapping for the VCD file created by a vcd add command CR 128 vcd files CR 140 specifies the filename and state mapping for the VCD file created by a ved add command CR 128 supports multiple VCD files vcd flush CR 142 flushes the contents of the VCD file buffer to the VCD file vcd limit CR 143 specifies the maximum size of the VCD file vcd off CR 144 turns off VCD dumping and records all VCD variable values as x vcd on CR 145 turns on VCD dumping and records the current values of all VCD variables vcd2wlf CR 146 translates VCD files into WLF files vcom CR 147 compiles VHDL design units vdel CR 153 deletes a desi
101. cified path recursively Optional lt pathname gt Specifies the pathname of the environment for which you want the items and subregions to be listed Optional if omitted the current environment is assumed show Lists the names of all the items and subregion environments visible in the current environment show uut Lists the names of all the items and subregions visible in the environment named uut show sub_region Lists the names of all the items and subregions visible in the environment named sub_region which is directly visible in the current environment find CR 79 ModelSim Command Reference CR 120 Commands simstats The simstats command returns performance related statistics about the simulation If executed without arguments the command returns a list of pairs like the following memory 57376 working set 56152 time 0 cpu time 0 context 0 page faults 0 See the arguments below for descriptions of each pair gt Note Some of the values may not be available on all platforms and other values may be approximates Different operating systems report these numbers differently Syntax simstats memory working time cpu context faults Arguments memory Returns the amount of virtual memory that the OS has allocated for vsim Optional working Returns the portion of allocated virtual memory that is currently being used by all vsim processes Optional If this number exceeds memory
102. d virtual nolog CR 172 stops the logging of the specified virtual signals virtual region CR 174 creates a new user defined design hierarchy region virtual save CR 175 saves the definitions of virtuals to a file virtual show CR 176 lists the full path names of all the virtuals explicitly defined virtual signal CR 177 creates a new signal that consists of concatenations of signals and subelements virtual type CR 180 creates a new enumerated type vlib CR 182 creates a design library vlog CR 183 compiles Verilog design units vmake CR 189 creates a makefile that can be used to reconstruct the specified library vmap CR 191 defines a mapping between a logical library name and a directory by modifying the modelsim ini file vsim CR 192 loads a new design into the simulator vsim lt info gt CR 206 returns information about the current vsim executable vsource CR 207 specifies an alternative file to use for the current source file when CR 208 instructs ModelSim to perform actions when the specified conditions are met where CR 213 displays information about the system environment wlf2log CR 214 ModelSim Command Reference translates a ModelSim WLF file vsim wi f to a QuickSim II logfile Command name Command reference table CR 29 Action wlfman CR 216 outputs information about or new
103. d lt kind gt region lt path gt lt pattern gt Arguments kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted region lt path gt Used in place of kind to specify a region of design space in which to look for the signal names Optional lt pattern gt Indicates which signal names or wildcard patterns should be used in finding the signals to hide Required Any number of names or wildcard patterns may be used See also virtual nohide CR 171 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual log Syntax Arguments virtual log CR 169 The virtual log command causes the simulation mode dependent signals of the specified virtual signals to be logged by the kernel If wildcard patterns are used it will also log any normal signals found unless the only option is used You unlog the signals using the virtual nolog command virtual log kind lt kind gt region lt path gt recursive only in out inout internal ports lt pattern gt kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted region lt path gt Used in place of kind to specify a region of design spa
104. d the command displays the mapping of the specified logical name ModelSim Command Reference CR 192 Commands vsim Syntax The vsim command is used to invoke the VSIM simulator or to view the results of a previous simulation run when invoked with the view switch You can specify a configuration an entity architecture pair or a module for simulation If a configuration is specified it is invalid to specify an architecture With no options vsim brings up the Load Design dialog box allowing you to specify the design and options the Load Design dialog box will not be presented if you specify any options During elaboration vsim determines if the source has been modified since the last compile This command may be used in batch mode from the Windows command prompt See Tips and techniques UM 387 for more information on the VSIM batch mode To manually interrupt design elaboration use the Break key The vsim command may also be invoked from the command line within ModelSim with most of the options shown below all except the vsim c and restore options vsim H assertfile lt filename gt c do lt command_string gt lt macro_file_name gt dumpports direction dumpports unique f lt filename gt g lt Name gt lt Value gt G lt Name gt lt Value gt gui help i keeploaded keeploadedrestart keepstdout 1 lt filename gt multisource_delay min max atest
105. d list CR 32 add wave CR 35 alias CR 39 batch_mode CR 40 bd breakpoint delete CR 41 bookmark add wave CR 42 bookmark delete wave CR 43 bookmark goto wave CR 44 bookmark list wave CR 45 bp breakpoint CR 46 cd change directory CR 49 change CR 50 configure CR 51 dataset alias CR 55 dataset clear CR 56 dataset close CR 57 dataset info CR 58 dataset list CR 59 dataset open CR 60 dataset rename CR 61 CR 62 dataset snapshot CR 63 delete CR 65 describe CR 66 disablebp CR 67 do CR 68 ModelSim Command Reference drivers CR 69 dumplog64 CR 70 echo CR 71 edit CR 72 enablebp CR 73 environment CR 74 examine CR 75 exit CR 78 find CR 79 force CR 82 graphic interface commands UM 276 help CR 85 history CR 86 log CR 87 Ishift CR 89 Isublist CR 90 modelsim CR 91 noforce CR 92 nolog CR 93 notation conventions CR 6 notepad CR 95 noview CR 96 nowhen CR 97 onbreak CR 98 onElabError CR 99 onerror CR 100 pause CR 101 printenv CR 102 CR 103 pwd CR 105 quietly CR 106 quit CR 107 radix CR 108 report CR 109 restart CR 111 resume CR 113 run CR 114 searchlog CR 116 shift CR 118 show CR 119 status CR 121 step CR 122 stop CR 123 system UM 331 tb traceback CR 124 transcript CR 125 transcript file CR 126 TreeUpdate CR 220 tssi2mti CR 127 variables referenced in CR 13 vcd add CR 128 ved checkpoint CR 129 CR 231 ABCDEFPGHIJKLMNOPORSTUVWAYZ ved comment CR 130 ved d
106. ds UM 333 A abort command CR 30 absolute time using CR 14 ACC routines UM 116 accelerated packages UM 47 add list command CR 32 add wave command CR 35 alias command CR 39 annotating interconnect delays v2k_int_delays CR 203 architecture simulator state variable UM 362 archives described UM 39 archives library CR 182 argc simulator state variable UM 362 arguments passing to a DO file UM 339 arithmetic package warnings disabling UM 358 arrays indexes CR 10 slices CR 10 AssertFile ini file variable UM 351 AssertionFormat ini file variable UM 352 AssertionFormatBreak ini file variable UM 352 AssertionFormatError ini file variable UM 352 AssertionFormatFail ini file variable UM 353 AssertionFormatFatal ini file variable UM 353 AssertionFormatNote ini file variable UM 352 AssertionFormatWarning ini file variable UM 352 assertions configuring from the GUI UM 264 locating file and line number UM 390 messages turning off UM 358 selecting severity that stops simulation UM 264 setting format of messages UM 352 testing for using a DO file UM 390 attributes of signals using in expressions CR 19 B bad magic number error message UM 127 balloon dialog toggling on off UM 232 base radix specifying in List window UM 182 batch_mode command CR 40 batch mode simulations UM 388 halting CR 211 bd breakpoint delete command CR 41 binding VHDL default UM 45 blocking assignments UM 82 bookmark add wave command CR 42
107. dth 100 wave signalnamewidth 0 wave justifyvalue left documented elsewhere See also add list CR 32 add wave CR 35 ModelSim Command Reference write list Syntax Arguments Examples See also write list CR 221 The write list command records the contents of the List window in a list output file This file contains simulation data for all HDL items displayed in the List window VHDL signals and variables and Verilog nets and registers write list events lt filename gt events Specifies to write print on change format Optional Default is tabular format lt filename gt Specifies the name of the output file where the data is to be written Required write list alu lst Saves the current data in the List window in a file named alu lst write tssi CR 225 ModelSim Command Reference CR 222 Commands write preferences Syntax Arguments See also The write preferences command saves the current GUI preference settings to a Tcl preference file Settings saved include current window locations and sizes Wave Signals and Variables window column widths Wave Signals and Variables window value justification and Wave window signal name width write preferences lt preference file name gt lt preference file name gt Specifies the name for the preference file Optional If the file is named modelsim tcl ModelSim will read the file each time vsim is invoked To use a preference file other th
108. e double quotes ModelSim will read the as a negative sign Examples 16 FFca23 2 11111110 23749 The second VHDL number style is base value Element Description base specifies the base binary B octal O hex X required value specifies digits in the appropriate base with optional underscore separators default is decimal required Examples BYLILILLIOY X FFca23 ModelSim Command Reference File and directory pathnames CR 9 Verilog numbering conventions Verilog numbers are expressed in the style size base value Element Description indicates a negative number optional the number of bits in the number optional specifies the base binary b or B octal o or O decimal d or D hex h or H optional specifies digits in the appropriate base with optional underscore separators default is decimal required gt Note A can also be used to designate a don t care element when you search for a signal in the List or Wave windows If you want the to be read as a don t care element rather than a negative sign be sure to enclose the number in double quotes For instance you would type 0110 as opposed to 7 b 0110 If you don t include the double quotes ModelSim will read the as a negative sign Examples b17111110 8 b11111110 Hffca23 21 H1lfca23 23749 File and directory p
109. e a library directory or index file If the specified library already exists as a valid ModelSim library the vlib command will exit with a warning message without touching the library vlib archive compact lt percent gt help dos short unix long lt name gt archive compact lt percent gt Causes design units that are compiled into the created library to be stored in archives rather than in subdirectories Optional See Archives UM 39 for more details You may optionally specify a decimal number between 0 and 1 that denotes the allowed percentage of wasted space before archives are compacted By default archives are compacted when 50 5 of their space is wasted See an example below help Displays the command s options and arguments Optional dos Specifies that subdirectories in a library have names that are compatible with DOS Not recommended if you use the vmake CR 189 utility Optional short Interchangeable with the dos argument Optional unix Specifies that subdirectories in a library may have long file names that are NOT compatible with DOS Optional Default for ModelSim SE long Interchangeable with the unix argument Optional lt name gt Specifies the pathname or archive name of the library to be created Required vlib design Creates the design library design You can define a logical name for the library using the vmap command CR 191 or by adding a line to the libra
110. e default log file file will contain data only from 3000001 to 3500000 ps dataset snapshot reset time 10000 Enables snapshotting with time 10000 and default mode cumulative and default filemode overwrite dataset save CR 62 ModelSim Command Reference delete Syntax Arguments Examples See also delete CR 65 The delete command removes HDL items from either the List or Wave window delete list wave window lt wname gt lt item_name gt list wave Specifies the target window for the delete command Required window lt wname gt Specifies the name of the List or Wave window to target for the delete command the view command CR 158 allows you to create more than one List or Wave window Optional If no window is specified the default window is used the default window is determined by the most recent invocation of the view command CR 158 lt item_name gt Specifies the name of an item Required Must match an item name used in an add list CR 32 or add wave CR 35 command Multiple item names may be specified Wildcard characters are allowed delete list window list2 vec2 Removes the item vec2 from the list2 window add list CR 32 add wave CR 35 and Wildcard characters CR 13 ModelSim Command Reference CR 66 Commands describe The describe command displays information about the specified HDL item The description is displayed in the Main window UM 145 The following kinds of ite
111. e find command to exclude the specified types of objects when performing the search See HDL item names CR 10 for more information on specifying names find nets signals in inout internal lt item_name gt nofilter out ports recursive find virtuals kind lt kind gt unsaved lt item_name gt find classes lt class_name gt find objects class lt class_name gt isa lt class_name gt lt object_name gt ModelSim Command Reference CR 80 Commands Arguments for nets and signals in Specifies that the scope of the search is to include ports of mode IN Optional inout Specifies that the scope of the search is to include ports of mode INOUT Optional internal Specifies that the scope of the search is to include internal items Optional lt item_name gt Specifies the net or signal for which you want to search Required Multiple nets and signals and wildcard characters are allowed Wildcard characters are accepted for primary names only Wildcards in index and record filed names are not supported Spaces square brackets and extended identifiers require special syntax see the examples below for more details nofilter Specifies that the WildcardFilter Tcl preference variable be ignored when finding signals or nets Optional out Specifies that the scope of the search is to include ports of mode OUT Optional ports Specifies that the scope of the search
112. e number at which the breakpoint is to be set Required if you are setting HDL breakpoints id lt id gt Attempts to assign this id number to the breakpoint Optional If the id number you specify is already used ModelSim will return an error gt Note Ids for breakpoints are assigned from the same pool as those used for the when command CR 208 So even if you haven t used an id number for a breakpoint it s possible it is used for a when command inst lt region gt Sets the breakpoint so it applies only to the specified region Optional disable Sets the breakpoint in a disabled state Optional You can enable the breakpoint later using the enablebp command CR 73 By default breakpoints are enabled when they are set cond lt condition_expression gt Specifies condition s that determine whether the breakpoint is hit Optional If the condition is true the simulation stops at the breakpoint If false the simulation bypasses the breakpoint The condition can be an expression with these operators Name Operator equals not equal l AND amp amp AND ModelSim Command Reference bp CR 47 Operator ll OR The operands may be item names signame event or constants Subexpressions in parentheses are permitted The command will be executed when the expression is evaluated as TRUE or 1 The formal BNF syntax is condition Name expression expression
113. e reused with these shortcuts at the ModelSim VSIM prompt Shortcut Description up and down arrows scrolls through the command history with the keyboard arrows click on prompt left click once on a previous ModelSim or VSIM prompt in the transcript to copy the command typed at that prompt to the active cursor history shows the last few commands up to 50 are kept ModelSim Command Reference CR 8 Syntax and conventions Numbering conventions Numbers in ModelSim can be expressed in either VHDL or Verilog style Two styles can be used for VHDL numbers one for Verilog VHDL numbering conventions The first of two VHDL number styles is radix value Element Description indicates a negative number optional can be any base in the range 2 through 16 2 8 10 or 16 by default numbers are assumed to be decimal optional specifies the numeric value expressed in the specified radix required is a delimiter between the radix and the value the first sign is required if a radix is used the second is always optional gt Note A can also be used to designate a don t care element when you search for a signal in the List or Wave window If you want the to be read as a don t care element rather than a negative sign be sure to enclose the number in double quotes For instance you would type 0110 as opposed to 0110 If you don t include th
114. each simulation time step Optional env lt path gt Provides a design region in which to look for the signal names Optional expr lt expr gt Specifies a general expression of signal values and simulation time Optional searchlog will search until the expression evaluates to true The expression must have a boolean result type See GUI_expression_format CR 15 for the format of the expression reverse Specifies to search backwards in time from lt startTime gt Optional rising falling anyedge Specifies an edge to look for on a scalar signal Optional This option is ignored for compound signals If no options are specified the default is anyedge startDelta lt num gt Indicates a simulation delta cycle on which to start Optional ModelSim Command Reference searchlog CR 117 lt startTime gt Specifies the simulation time at which to start the search Required The time may be specified as an integer number of simulation units or as lt num gt lt timeUnit gt where lt num gt can be integer or with a decimal point and lt timeUnit gt is one of the standard VHDL time units fs ps ns us ms sec value lt string gt Specifies to search until a single scalar or compound signal takes on this value Optional lt pattern gt Specifies one or more signal names or wildcard patterns of signal names to search on Required unless the expr argument is used See also virtual signal CR 177 vir
115. ecification Optional ports For use with wildcard searches Specifies that the scope of the listing is to include ports of modes IN OUT or INOUT Optional ModelSim Command Reference add wave CR 37 lt radix gt Specifies the radix for the items that follow in the command Optional Valid entries or any unique abbreviations are binary ascii character unsigned decimal octal hex symbolic and default If no radix is specified for an enumerated type the default representation is used You can change the default radix for the current simulation using the radix command CR 108 You can change the default radix permanently by editing the DefaultRadix UM 353 variable in the modelsim ini file If you specify a radix for an array of a VHDL enumerated type ModelSim converts each signal value to 1 0 Z or X recursive For use with wildcard searches Specifies that the scope of the search is to descend recursively into subregions Optional if omitted the search is limited to the selected region scale lt scale gt Scales analog waveforms Optional The scale value is part of the wave positioning equation shown below The position and size of the waveform is given by signal_value lt offset gt lt scale gt If signal_value lt offset gt 0 the waveform will be aligned with its name The lt scale gt value determines the height of the waveform 0 being a flat line Examples add wave logic color g
116. ecified by the slice i e 20 22 See also force CR 82 ModelSim Command Reference configure Syntax Description Arguments configure CR 51 The configure config command invokes the List or Wave widget configure command for the current default List or Wave window To change the default window use the view command CR 158 configure list wave lt option gt lt value gt delta all collapse none gateduration lt duration_open gt gateexpr lt expression gt usegating lt value gt strobeperiod lt period gt usesignaltriggers lt value gt strobestart lt start_time gt usestrobe lt value gt childrowmargin lt pixels gt eursorlockcolor lt coler gt griddelta lt pixels gt gridoffset lt time gt namecolwidth lt width gt rowmargin lt pixels gt signalnamewidth lt value gt timecolor lt color gt timeline lt value gt valuecolwidth lt width gt vectorcolor lt color gt waveselectenable lt value gt qridcolor lt coler gt gridperiod lt time gt waveselectcolor lt color gt The command works in three modes e without options or values it returns a list of all attributes and their current values e with just an option argument without a value it returns the current value of that attribute e with one or more option value pairs it changes the values of the specified attribute
117. ecified name Optional You can specify one or more names All names listed after divider are taken to be names expand lt signal_name gt Causes a compound signal to be expanded immediately but only one level down Optional The lt signal_name gt is required and may include wildcards lt format gt Specifies the display format of the items literal logic analog step analog interpolated analog backstep Optional Literal waveforms are displayed as a box containing the item value Logic signals may be U X 0 1 Z W L H or gt Analog signals are sized by scale and by offset Analog step changes to the new time before plotting the new Y Analog interpolated draws a diagonal line Analog backstep plots the new Y before moving to the new time See Editing and formatting HDL items in the Wave window UM 228 ModelSim Command Reference CR 36 Commands height lt pixels gt Specifies the height in pixels of the waveform Optional in For use with wildcard searches Specifies that the scope of the search is to include ports of mode IN if they match the item_name specification Optional inout For use with wildcard searches Specifies that the scope of the search is to include ports of mode INOUT if they match the item_name specification Optional internal For use with wildcard searches Specifies that the scope of the search is to include internal items non port items if they match the item_name s
118. ection1 clk_n that is the inverse of chip sectionI clk virtual function install chip std_logic_vector chip vlog rega rega_slv Creates a std_logic_vector equivalent of a verilog register rega and installs it as chip rega_slv virtual function chip addr 11 0 Oxfab addr_eq_fab Creates a boolean signal chip addr_eq_fab that is true when chip addr 11 0 is equal to hex fab and false otherwise It is acceptable to mix VHDL signal path notation with Verilog part select notation virtual function gate chip siga XOR rtl chip siga siga_diff Creates a signal that is high only during times when signal chip siga of the gate level version of the design does not match chip siga of the rtl version of the design Because there is no common design region for the inputs to the expression siga_diff is installed in region virtuals Functions The virtual function siga_diff can be added to the Wave window and when expanded will show the two original signals that are being compared virtual function delay 10 ns top signalA AND top signalB myDelayAandB Creates a virtual signal consisting of the logical AND function of top signalA with top signalB and delays it by 10 ns virtual function gate chip outbus XOR rtl chip outbus outbus_diff Creates a one bit signal outbus_diff which is non zero during times when any bit of chip outbus in the gate level version doesn t match the corresponding bit in the rtl versi
119. ed Verilog task dumpportsoff Syntax ved dumpportsoff lt filename gt Arguments lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on all open VCD files See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference vcd dumpportson CR 137 vcd dumpportson The ved dumpportson command turns on VCD dumping and records the current values of all selected ports This command is typically used to resume dumping after invoking vcd dumpportsoff Related Verilog task dumpportson Syntax vcd dumpportson lt filename gt Arguments lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on all open VCD files See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference CR 138 Commands vcd file Syntax Arguments The ved file command specifies the filename and state mapping for the VCD file created by a ved add command CR 128 The ved file command is optional If used it must be issued before any ved add commands Related Verilog task dumpfile gt Note ved file is included for backward compatibility Use the ved files command CR 140 if you want to use multiple VCD files during a single simulation ved file direction dumpports lt filename gt map lt mapping pairs gt nomap direction Af
120. eference Ignore VitalErrors ini file variable UM 350 IgnoreWarning ini file variable UM 354 implicit operator hiding with vcom explicit CR 152 importing FPGA libraries UM 48 incdir CR 184 incremental compilation automatic UM 71 manual UM 71 with Verilog UM 70 index checking UM 51 init_signal_spy UM 63 init_usertfs function UM 101 initial dialog box turning on off UM 344 interconnect delays CR 195 UM 308 annotating per Verilog 2001 CR 203 internal signals adding to a VCD file CR 128 item_list_file WLF files CR 216 iteration_limit infinite zero delay loops UM 396 IterationLimit ini file variable UM 354 K keyboard shortcuts List window UM 189 UM 367 Main window UM 156 UM 369 Source window UM 369 Wave window UM 240 UM 366 L language templates UM 273 libraries archives CR 182 dependencies checking CR 154 design libraries creating CR 182 UM 40 design library types UM 38 design units UM 38 group use setting up UM 389 IEEE UM 47 importing FPGA libraries UM 48 including precompiled modules UM 259 listing contents CR 154 mapping from the command line UM 43 from the GUI UM 43 hierarchically UM 357 search rules UM 44 modelsim_lib UM 62 moving UM 44 multiple libraries with common modules UM 73 CR 235 ABCDEFPGHIJKLMNOPORSTUVWAYZ naming UM 43 predefined UM 46 refreshing library images CR 151 CR 186 UM 47 resource libraries UM 38 std library UM 46 Synopsys UM 47 vendor supplied compatibilit
121. elSim Verilog system tasks UM 95 for more information May be used in tandem with multisource_int_delays argument see above ModelSim Command Reference CR 204 Commands Arguments object The object arguments may be a lt library_name gt lt design_unit gt mpf file wiffile or a text file If no object specification is made VSIM will open the Load a Design dialog box Multiple design units may be specified for Verilog modules and mixed VHDL Verilog configurations lt library_name gt lt design_unit gt Specifies a library and associated design unit multiple library design unit specifications can be made Optional If no library is specified the work library is used Environment variables can be used lt design_unit gt may be one of the following lt configuration gt Specifies the VHDL configuration to simulate lt module gt Specifies the name of one or more top level Verilog modules to be simulated Optional lt entity gt lt architecture gt lt MPF_file_name gt Opens the specified project Optional lt WLF_file_name gt Opens the specified dataset Optional lt text_file_name gt Specifies the name of the top level VHDL entity to be simulated Optional The entity may have an architecture optionally specified if omitted the last architecture compiled for the specified entity is simulated An entity is not valid if a configuration is specified Opens the speci
122. elsim do lt macrofile gt project lt project file gt do lt macrofile gt Specifies the DO file to execute when modelsim is invoked Optional gt Note In addition to the macro called by this argument if a DO file is specified by the STARTUP variable in modelsim ini it will be called when the vsim command CR 192 is invoked project lt project file gt Specifies the modelsim ini file to load for this session Optional vsim CR 192 do CR 68 and Using a startup file UM 358 ModelSim Command Reference CR 92 Commands noforce Syntax Arguments See also The noforce command removes the effect of any active force CR 82 commands on the selected HDL items The noforce command also causes the item s value to be re evaluated noforce lt item_name gt lt item_name gt Specifies the name of a item Required Must match an item name used in a previous force command CR 82 Multiple item names may be specified Wildcard characters are allowed force CR 82 and Wildcard characters CR 13 ModelSim Command Reference nolog Syntax Arguments nolog CR 93 The nolog command suspends writing of data to the wave log format WLF file for the specified signals A flag is written into the WLF file for each signal turned off and the GUI displays No Data for the signal s until logging for the signal s is turned back on Logging can be turned back on by issuing another log command CR
123. ent instance Here are some examples of item names and what they specify Syntax Description clk specifies the item c k in the current context top clk specifies the item c k in the top level design unit top block1 u2 clk specifies the item clk two levels down from the top level design unit block 1 u2 clk specifies the item clk two levels down from the current context array_sig 4 specifies an index of an array item array_sig 1 to 10 specifies a slice of an array item in VHDL syntax mysignal 31 0 specifies a slice of an array item in Verilog syntax record_sig field specifies a field of a record ModelSim Command Reference CR 12 Syntax and conventions Environment variables and pathnames You can substitute environment variables for pathnames in any argument that requires a pathname For example vlog v lib_path undl Assuming you have defined lib_path on your system vlog will locate the source library file und and search it for undefined modules See Environment variables UM 345 for more information gt Note Environment variable expansion does not occur in files that are referenced via the f argument to vcom vlog or vsim Name case sensitivity Name case sensitivity is different for VHDL and Verilog VHDL names are not case sensitive except for extended identifiers in VHDL 1076 1993 In contrast all Verilog names are case sensitive Names in ModelSim comma
124. es not match the VHDL standard However the majority of EDA tools choose explicit operators over implicit operators Using this switch makes ModelSim compatible with common industry practice f lt filename gt Specifies a file with more command line arguments Optional Allows complex argument strings to be reused without retyping Environment variable expansion for example in a pathname does not occur in f files force_refresh Forces the refresh of a module Optional When the compiler refreshes a design unit it checks each dependency to ensure its source has not been changed and recompiled If a dependency has been changed and recompiled the compiler will not refresh the dependent design unit unless you use force_refresh To avoid potential errors or mismatches caused by the dependency recompilation you should recompile the dependent design unit s source rather than use this switch help Displays the command s options and arguments Optional ignoredefaultbinding Instructs the compiler not to generate a default binding during compilation Optional You must explicitly bind all components in the design to use this switch ignorevitalerrors Directs the compiler to ignore VITAL compliance errors Optional The compiler still reports that VITAL errors exist but it will not stop the compilation You should exercise caution in using this switch as part of accelerating VITAL packages we assume that compliance checking has pas
125. f the notifier register argument of all timing check system tasks Optional By default the notifier is toggled when there is a timing check violation and the notifier usually causes a UDP to propagate an X This argument suppresses X propagation on timing violations for the entire design no_path_edge Causes ModelSim to ignore the input edge specified in a path delay Optional The result of this argument is that all edges on the input are considered when selecting the output delay Verilog XL always ignores the input edges on path delays no_pulse_msg Disables the warning message for specify path pulse errors Optional A path pulse error occurs when a pulse propagated through a path delay falls between the pulse rejection limit and pulse error limit set with the pulse_r and pulse_e options A path pulse error results in a warning message and the pulse is propagated as an X The no_pulse_msg option disables the warning message but the X is still propagated no_show_cancelled_e Filters negative pulses on specify path delays so they don t show on the output Default Use show_cancelled_e to drive a pulse error state no_tchk_msg Disables error messages issued by timing check system tasks when timing check violations occur Optional Notifier registers are still toggled and may result in the propagation of Xs for timing check violations tnosdferror Errors issued by the SDF annotator while loading the design prevent the simulation
126. f ved file was not invoked See Chapter 11 Value Change Dump VCD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference CR 144 Commands vcd off Syntax Arguments See also The ved off command turns off VCD dumping to the specified file and records all VCD variable values as x Related Verilog tasks dumpoff fdumpoff ved off lt filename gt lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd if ved file was not invoked See Chapter 11 Value Change Dump VCD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference vcd on Syntax Arguments See also vedon CR 145 The ved on command turns on VCD dumping to the specified file and records the current values of all VCD variables By default ved on is automatically performed at the end of the simulation time that the ved add CR 128 commands are performed Related Verilog tasks dumpon fdumpon vcd on lt filename gt lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd if ved file was not invoked See Chapter 11 Value Change Dump VCD Files for more information on VCD files
127. fects only VHDL ports Optional It specifies that the port variable type recorded in the VCD header for VHDL ports shall be one of the following in out inout internal ports includes in out and inout the default is all ports P Note The direction argument is obsolete in ModelSim versions 5 5c and later It is supported only for backwards compatibility with an NEC flow See http www model com products documentation resim_ved pdf for information regarding its use in earlier versions dumpports Capture detailed port driver data for Verilog ports and VHDL std_logic ports Optional This option works only on ports and subsequent ved add command CR 128 will accept only qualifying ports silently ignoring all other specified items lt filename gt Specifies the name of the VCD file that is created the default is dump vcd Optional map lt mapping pairs gt Affects only VHDL signals of type std_logic Optional It allows you to override the default mappings The mapping is specified as a list of character pairs The first character in a pair must be one of the std_logic characters UXO1ZWLH and the second character is the character you wish to be recorded in the VCD file For example to map L and H to z ved file map L z H z Note that the quotes in the example above are a Tcl convention for command strings that include spaces ModelSim Command Reference vcd file CR 139 nomap Affects only VHDL signals of
128. ff UM 232 port driver data capturing UM 320 Postscript saving a waveform in UM 242 saving the Dataflow display in UM 171 precedence of variables UM 362 precision simulator resolution UM 78 pref tcl file UM 360 preference variables ni files located in UM 349 editing UM 360 saving UM 360 Tcl files located in UM 360 preferences saving UM 360 primitives symbols in Dataflow window UM 174 printenv command CR 102 CR 103 Process window UM 190 see also windows Process window processes values and pathnames in Variables window UM 212 without wait statements UM 250 Programming Language Interface UM 100 project context menus UM 27 project tab information in UM 26 sorting UM 26 projects UM 17 accessing from the command line UM 35 adding files to UM 21 benefits UM 18 compile order UM 28 changing UM 28 compiler options in UM 34 compiling files UM 24 context menu UM 27 creating UM 20 creating simulation configurations UM 30 differences with earlier versions UM 19 folders in UM 32 grouping files in UM 29 loading a design UM 25 MODELSIM environment variable UM 346 override mapping for work directory with vcom CR 151 override mapping for work directory with vlog CR 187 overview UM 18 propagation preventing X propagation CR 195 pulse error state CR 203 pwd command CR 105 Q QuickSim II logfile format CR 214 Quiet ini file variable VCOM UM 350 Quiet ini file variable VLOG UM 351 quietly command CR 106 quit c
129. fied text file in a Source window Optional ModelSim Command Reference vsim CR 205 Examples vsim gedge low high gVCC 4 75 cpu Invokes vsim on the entity cpu and assigns values to the generic parameters edge and VCC If working within the ModelSim GUI you would enter the command as follows vsim gedge low high gVCC 4 75 cpu vsim view test sim2 wlf Instructs ModelSim to view the results of a previous simulation run stored in the WLF file sim2 wlf The simulation is displayed as a dataset named test Use the wlf option to specify the name of the WLF file to create if you plan to create many files for later viewing For example vsim wlf my_design i0l my_asic structure vsim wlf my_design i02 my_asic structure vsim sdfmin top ul myasic sdf Annotates instance top ul using the minimum timing from the SDF file myasic sdf Use multiple switches to annotate multiple instances vsim sdfmin top ul sdfl sdfmin top u2 sdf2 top vsim mylib top only gatelib cache_set This example searches the libraries mylib for top only and gatelib for cache_set If the design units are not found the search continues to the work library Specification of the architecture only is optional vsim do set PrefMain forceQuit 1 run all work test_counter Invokes vsim on test_counter and instructs the simulator to run until a break event and quit when it encounters a finish task ModelSim Command Reference CR 206
130. filenames can be opened during a single simulation in Includes ports of mode IN Optional inout Includes ports of mode INOUT Optional out Includes ports of mode OUT Optional unique Generates unique vcd variable names for ports even if those ports are connected to the same collapsed net Optional lt item_name gt Specifies the Verilog or VHDL item to add to the VCD file Required Multiple items may be specified by separating names with spaces Wildcards are accepted ModelSim Command Reference CR 132 Commands Examples vcd dumpports in file counter vcd test_counter dut Creates a VCD file named counter vcd of all IN ports in the region test_counter dut vcd dumpports file addern vcd testbench uut vsim vcdstim addern vcd addern gn 8 do add wave run 1000 These two commands resimulate a design from a VCD file See Resimulating a design from a VCD file UM 315 for further details ModelSim Command Reference vcd dumpportsall CR 133 vcd dumpportsall The ved dumpportsall command creates a checkpoint in the VCD file which shows the value of all selected ports at that time in the simulation regardless of whether the port values have changed since the last timestep Related Verilog task dumpportsall Syntax ved dumpportsall lt filename gt Arguments lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on all open VCD files See a
131. from continuing whereas warnings do not Changes SDF errors to warnings so that the simulation can continue Optional t nosdfwarn Disables warnings from the SDF annotator Optional t nospecify Disables specify path delays and timing checks Optional ModelSim Command Reference CR 202 Commands nowarn lt CODE gt Disables warning messages in the category specified by lt CODE gt Optional Warnings that can be disabled include the lt CODE gt name in square brackets in the warning message For example WARNING vsim 3017 test v 2 TFMPC Too few port connections Expected lt m gt found lt n gt This warning message can be disabled with nowarnTFMPC ntc_warn Enables warning messages from the negative timing constraint algorithm Optional By default these warnings are disabled This algorithm attempts to find a set of delays for the timing check delayed net arguments such that all negative limits can be converted to non negative limits with respect to the delayed nets If there is no solution for this set of limits then the algorithm sets one of the negative limits to zero and recalculates the delays This process is repeated until a solution is found A warning message is issued for each negative limit set to zero pli lt object list gt Loads a space separated list of PLI shared objects Optional The list must be quoted if it contains more than one object This is an alternative to specifying PL
132. g checks for faster simulation Optional By default Verilog timing check system tasks setup hold in specify blocks are enabled For VITAL the timing check default is controlled by the ASIC or FPGA vendor but most default to enabled quiet Disable loading messages during batch mode simulation Optional ModelSim Command Reference CR 196 Commands sdfmin sdftyp sdfmax lt delayScale gt lt instance gt lt sdf_filename gt Annotates VITAL or Verilog cells in the specified SDF file a Standard Delay Format file with minimum typical or maximum timing Optional The optional argument lt delayScale gt scales all values by the specified value For example if you specify sdfmax 1 5 all maximum values in the SDF file will be scaled to 150 of their original value The use of lt instance gt with lt sdf_filename gt is also optional it is used when the backannotation is not being done at the top level See Specifying SDF files for simulation UM 298 sdfmaxerrors lt n gt Controls the number of Verilog SDF missing instance messages that will be emitted before terminating vsim Optional lt n gt is the maximum number of missing instance error messages to be emitted The default number is 5 sdfnoerror Errors issued by the SDF annotator while loading the design prevent the simulation from continuing whereas warnings do not Changes SDF errors to warnings so that the simulation can continue Opt
133. g gt Specifies the message text to be displayed Optional If the text string is surrounded by quotes blank spaces are displayed as entered If quotes are omitted two or more adjacent blank spaces are compressed into one space echo The time is Snow ns If the current time is 1000 ns this command produces the message The time is 1000 ns If the quotes are omitted all blank spaces of two or more are compressed into one space echo The time is Snow ns If the current time is 1000ns this command produces the message The time is 1000 ns echo can also use command substitution such as echo The hex value of counter is examine hex counter If the current value of counter is 21 15 hex this command produces The hex value of counter is 15 ModelSim Command Reference CR 72 Commands edit The edit command invokes the editor specified by the EDITOR environment variable Syntax edit lt filename gt Arguments lt filename gt Specifies the name of the file to edit Optional If the lt filename gt is omitted the editor opens the current source file If you specify a non existent filename it will open a new file See also notepad CR 95 and the EDITOR UM 345 environment variable ModelSim Command Reference enablebp CR 73 enablebp The enablebp command turns on breakpoints and when commands that were previously disabled Syntax enablebp lt id gt Arguments lt id gt Specifies a bre
134. gn unit from a specified library vdir CR 154 lists the contents of a design library verror CR 155 prints a detailed description of a message number vgencomp CR 156 writes a Verilog module s equivalent VHDL component declaration to standard output view CR 158 opens a ModelSim window and brings it to the front of the display ModelSim Command Reference Commands Command name Action virtual count CR 160 counts the number of currently defined virtuals that were not read in using a macro file virtual define CR 161 prints the definition of the virtual signal or function in the form of acommand that can be used to re create the object virtual delete CR 162 removes the matching virtuals virtual describe CR 163 prints a complete description of the data type of one or more virtual signals virtual expand CR 164 produces a list of all the non virtual objects contained in the virtual signal s virtual function CR 165 creates a new signal that consists of logical operations on existing signals and simulation time virtual hide CR 168 sets a flag in the specified real or virtual signals so that the signals do not appear in the Signals window virtual log CR 169 causes the sim mode dependent signals of the specified virtual signals to be logged by the simulator virtual nohide CR 171 resets the flag set by a virtual hide comman
135. gt Arguments lt name gt Specifies the new procedure name to be used when invoking the commands lt cemds gt Specifies the command or commands to be evaluated when the alias is invoked Examples alias Lists all aliases currently defined alias lt name gt Lists the alias definition for the specified name if one exists alias lt name gt Lists the alias definition for the specified name if one exists lias myquit write list mylist save quit f Creates a Tcl procedure myquit that when executed writes the contents of the List window to the file mylist save by invoking write list CR 221 and quits ModelSim by invoking quit CR 107 w ModelSim Command Reference CR 40 Commands batch_mode The batch_mode command returns a 1 if ModelSim is operating in batch mode otherwise it returns a 0 It is typically used as a condition in an if statement Syntax batch_mode Arguments None Examples Some GUI commands do not exist in batch mode If you want to write a script that will work in or out of batch mode you can use the batch_mode command to determine which command to use For example if batch_mode log else add wave See also Running command line and batch mode simulations UM 388 ModelSim Command Reference bd Syntax Arguments Examples See also bd CR 41 The bd command deletes a breakpoint You must specify a filename and line number or a specific breakpoint
136. gt Specifies the name for the bookmark Required lt zoomrange gt Specifies a list of two times with optional units Required These two times must be enclosed in braces or quotation marks lt topindex gt Specifies the vertical scroll position of the window Required The number identifies which item the window should be scrolled to For example specifying 20 means the Wave window will be scrolled down to show the 20th item bookmark add wave foo 10 ns 1000 ns 20 Adds a bookmark named foo to the current default Wave window The bookmark marks a zoom range from 10ns to 1000ns and a scroll position of the 20th item in the window bookmark delete wave CR 43 bookmark goto wave CR 44 bookmark list wave CR 45 write format CR 219 ModelSim Command Reference bookmark delete wave CR 43 bookmark delete wave Syntax Arguments Examples See also The bookmark delete wave command deletes bookmarks from the specified Wave window bookmark delete wave lt label gt all lt label gt Specifies the name of the bookmark to delete Required unless the all switch is used al1 Specifies that all bookmarks in the window be deleted Optional bookmark delete wave foo Deletes the bookmark named foo from the current default Wave window bookmark delete wave all window wavel Deletes all bookmarks from the Wave window named wavel bookmark add wave CR 42 bookmark goto wave CR 44 bookm
137. h the WLFSizeLimit UM 356 variable in the modelsim ini file wlftlim lt duration gt Specifies the duration of simulation time for WLF file recording Optional The default is infinite time 0 The lt duration gt is an integer of simulation time at the current resolution you can optionally specify the resolution if you place curly braces around the specification For example 5000 ns sets the duration at nanoseconds regardless of the current simulator resolution The time range begins at current simulation time and moves back in simulation time for the specified duration For example vsim wlftlim 5000 writes at least the last 5000ns of the current simulation to the WLF file the current simulation resolution in this case is ns If used in conjunction with wlfslim the more restrictive of the limits will take effect This option may also be specified with the WLFTimeLimit UM 356 variable in the modelsim ini file gt Note The wifslim and wiftlim switches were designed to help users limit WLF file sizes for long or heavily logged simulations When small values are used for these switches the values may be overridden by the internal granularity limits of the WLF file format ModelSim Command Reference vsim CR 199 Arguments VHDL absentisempty Causes VHDL files opened for read that target non existent files to be treated as empty rather than ModelSim issuing fatal error messages Optional nocollapse
138. he examples version Returns the version of the compiler as used by the licensing tools such as Model Technology ModelSim SE vlog 5 5 Compiler 2000 01 Jan 28 2000 vlog95compat Some requirements in Verilog 2001 conflict with requirements in the 1995 LRM Use of this argument ensures that code that was valid according to the 1995 LRM can still be compiled Optional Edit the vlog95compat UM 351 variable in the modelsim ini file to set a permanent default ModelSim Command Reference Examples vlog CR 187 work lt library_name gt Specifies a logical name or pathname of a library that is to be mapped to the logical library work Optional by default the compiled design units are added to the work library The specified pathname overrides the pathname specified for work in the project file y lt library_directory gt Specifies a source library directory containing module and UDP definitions Optional See Verilog XL compatible compiler arguments UM 74 for more information After all explicit filenames on the vlog command line have been processed the compiler uses the y option to find and compile any modules that were referenced but not yet defined Files within this directory are compiled only if the file names match the names of previously unresolved references Multiple y options are allowed You will need to specify a file suffix by using y in conjunction with the libext lt suffix gt option if your filenames differ
139. he Verilog source file Optional By default the compiler starts at the beginning of the file Link Instructs ModelSim to perform three lint style checks 1 warn when Module ports are NULL 2 warn when assigning to an input port 3 warn when referencing undeclared variables nets in an instantiation The warnings are reported as WARNING 8 Can also be enabled using the Show_Lint variable in the modelsim ini file maxdelays Selects maximum delays from the min typ max expressions Optional If preferred you can defer delay selection until simulation time by specifying the same option to the simulator mindelays Selects minimum delays from the min typ max expressions Optional If preferred you can defer delay selection until simulation time by specifying the same option to the simulator noincr Disables incremental compile previously turned on with iner Optional tnolibcell By default all modules compiled from a source library are treated as though they contain a celldefine compiler directive This option disables this default The celldefine directive only affects the PLI access routines acc_next_cell and acc_next_cell_load Optional nologo Disables the startup banner Optional nospecify Disables specify path delays and timing checks Optional notimingchecks Removes all timing check entries from the design as it is parsed Optional nowarn lt CODE gt Disables warning messages in the category specif
140. herwise it is assumed to be bidirectional mode INOUT Items that can be converted to SEF are VHDL enumerations with 255 or fewer elements and Verilog nets The enumeration values U X 0 1 Z W L H and the enumeration values defined in the IEEE Standard 1164 std_ulogic enumeration are converted to SEF values according to the table below Other values are converted to a question mark and cause an error message Though the write tssi command was developed for use with std_ulogic any signal which uses only the values defined for std_ulogic including the VHDL standard type bit will be converted std_ulogic State SEF State Characters Characters aa Input Output Bidirectional U N X X N X 0 D L 0 1 U H 1 Z Z T F ModelSim Command Reference CR 226 Commands std_ulogic State SEF State Characters Characters ae 5 Input Output Bidirectional W N X L D L 0 U H 1 N X Bidirectional logic values are not converted because only the resolved value is available The Fluence TSSI TDS ASCII In Converter and ASCII Out Converter can be used to resolve the directionality of the signal and to determine the proper forcing or expected value on the port Lowercase values x z w l and h are converted to the same values as the corresponding capitalized values Any other values will cause an error message to be generated the first time an invalid value is detected on a sig
141. id You may specify multiple filename line number pairs and id s bd lt filename gt lt line_number gt lt id gt lt filename gt Specifies the name of the source file in which the breakpoint is to be deleted Required if an id is not specified The filename must match the one used previously to set the breakpoint including whether a full pathname or a relative name was used lt line_number gt Specifies the line number of the breakpoint to be deleted Required if an id is not specified lt id gt Specifies the id number of the breakpoint to be deleted Required if a filename and line Wa number are not specified If you are deleting a C breakpoint the id will have a c prefix bd alu vhd 127 Deletes the breakpoint at line 127 in the source file named alu vhd bd 5 Deletes the breakpoint with id 5 bd 6 alu vhd 234 Deletes the breakpoint with id 6 and the breakpoint at line 234 in the source file named alu vhd bp CR 46 onbreak CR 98 Chapter 13 C Debug ModelSim Command Reference CR 42 Commands bookmark add wave Syntax Arguments Examples See also The bookmark add wave command creates a named reference to a specific zoom range and scroll position in the specified Wave window Bookmarks are saved in the wave format file and are restored when the format file is read see write format command CR 219 bookmark add wave lt label gt lt zoomrange gt lt topindex gt lt label
142. ied the default library work is used Optional b Causes vgencomp to generate bit port types Optional Used for the explicit declaration of default std_logic port types Optional Causes vgencomp to generate vl_logic port types Optional lt module_name gt Specifies the name of the Verilog module to be accessed Required Examples This example uses a Verilog module that is compiled into the work library The module begins as Verilog source code module top il ol o2 iol parameter width 8 4 parameter delay By parameter filename file in input il output 7 0 ol output 4 7 02 inout width 1 0 iol endmodule After compiling vgencomp is invoked on the compiled module vgencomp top and writes the following to stdout component top generic ModelSim Command Reference width delay filename i port il ol 02 iol i end component vgencomp CR 157 integer 8 real 4 500000 string file in in std_logic out std_logic_vector 7 downto 0 out std_logic_vector 4 to 7 inout std_logic_vector ModelSim Command Reference CR 158 Commands view The view command will open a ModelSim window and bring that window to the front of the display To remove a window use the noview command CR 96 Syntax view height lt n gt icon title New Window Title lt window_type gt width lt n gt x lt n gt y lt n gt lt window_
143. ied by lt CODE gt Optional Warnings that can be disabled include the lt CODE gt name in square brackets in the warning message For example WARNING vsim 3017 test v 2 TFMPC Too few port connections Expected lt m gt found lt n gt This warning message can be disabled with the nowarnTFMPC option 00 Lower the optimization to a minimum with O0 capital oh zero Optional Use this to work around bugs increase your debugging visibility on a specific cell or when you want to place breakpoints on source lines that have been optimized out quiet Disables loading messages Optional ModelSim Command Reference CR 186 Commands R lt simargs gt Instructs the compiler to invoke the simulator vsim CR 192 after compiling the design The compiler automatically determines which top level modules are to be simulated The command line arguments following R are passed to the simulator not the compiler Place the R option at the end of the command line or terminate the simulator command line arguments with a single character to differentiate them from compiler command line arguments The R option is not a Verilog XL option but it is used by ModelSim to combine the compile and simulate phases together as you may be used to doing with Verilog XL It is not recommended that you regularly use this option because you will incur the unnecessary overhead of compiling your design for each simulation run Mainly
144. iew CR 159 ModelSim Command Reference CR 160 Commands virtual count The virtual count command counts the number of currently defined virtuals that were not read in using a macro file Syntax virtual count Kkind lt kind gt Arguments kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted unsaved Specifies that the count include only those virtuals that have not been saved Optional See also virtual define CR 161 virtual save CR 175 virtual show CR 176 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual define CR 161 virtual define Syntax Arguments Examples See also The virtual define command prints to the Main window the definition of the virtual signal or function in the form of a command that can be used to re create the object virtual define kind lt kind gt lt pathname gt kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted lt pathname gt Specifies the path to the virtual s for which you want definitions Required Wildcards can be used virtual define kind explicits Shows the definitions of all the virtuals you have explicitly c
145. ign Optional help Displays the command s options and arguments Optional i Specifies that the simulator is to be run in interactive mode Optional keeploaded Prevents the simulator from unloading reloading any FLI PLI VPI shared libraries when it restarts or loads a new design Optional The shared libraries will remain loaded at their current positions User application code in the shared libraries must reset its internal state during a restart in order for this to work effectively ModelSim Command Reference vsim CR 195 keeploadedrestart Prevents the simulator from unloading reloading any FLI PLI VPI shared libraries during a restart Optional The shared libraries will remain loaded at their current positions User application code in the shared libraries must reset its internal state during a restart in order for this to work effectively We recommend using this option if you ll be doing warm restores after a restart and the user application code has set callbacks in the simulator Otherwise the callback function pointers might not be valid if the shared library is loaded into a new position keepstdout For use with foreign programs Instructs the simulator to not redirect the stdout stream to the Main window Optional 1 lt filename gt Saves the contents of the Main window UM 145 transcript to lt filename gt Optional Default is transcript Can also be specified using the ini see Creating a tran
146. ignalc 5 downto 3 The slice of signalc is quoted in curly braces because it contains spaces See also virtual signal CR 177 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual function CR 165 virtual function Syntax Arguments The virtual function command creates a new signal known only by the GUI not the kernel that consists of logical operations on existing signals and simulation time as described in lt expressionString gt It cannot handle bit selects and slices of Verilog registers Please see Syntax and conventions CR 5 for more details on syntax If the virtual function references more than a single scalar signal it will display as an expandable object in the Wave and Signals windows The children correspond to the inputs of the virtual function This allows the function to be expanded in the Wave window to see the values of each of the input waveforms which could be useful when using virtual functions to compare two signal values Virtual functions can also be used to gate the List window display virtual function env lt path gt install lt path gt implicit delay lt time gt lt expressionString gt lt name gt Arguments for virtual function are the same as those for virtual signal except for the contents of the expression string env lt path gt Specifies a hierarchical context for the signal names in lt expressionString gt so they don
147. ile to create Required Multiple files can be opened during a single simulation map lt mapping pairs gt Affects only VHDL signals of type std_logic Optional It allows you to override the default mappings The mapping is specified as a list of character pairs The first character in a pair must be one of the std_logic characters UXO1ZWLH and the second character is the character you wish to be recorded in the VCD file For example to map L and H to z ved files map L z H z Note that the quotes in the example above are a Tcl convention for command strings that include spaces nomap Affects only VHDL signals of type std_logic Optional It specifies that the values recorded in the VCD file shall use the std_logic enumeration characters of UX01ZWLH This option results in a non standard VCD file because VCD values are limited to the four state character set of x01z By default the std_logic characters are mapped as follows ModelSim Command Reference vcd files CR 141 Examples The following example shows how to mask outputs from a vcd file until a certain time after the start of the simulation The example uses two vcd files and the ved on CR 145 and ved off CR 144 commands to accomplish this task ved files in_inout vcd ved files output vcd ved add in inout file in_inout vcd ved add out file output vcd ved off output vcd run lus ved on output vcd run aLL See also See Chapter 11 Value Change Dump V
148. im windows will not show any information when you are viewing a dataset See additional discussion in Examples CR 205 wlf lt filename gt Specifies the name of the wave log format WLF file to create The default is vsim wif Optional ModelSim Command Reference CR 198 Commands wlfcompress Creates compressed WLF files Default Use wlfnocompress to turn off compression wlfnocompress Causes VSIM to create uncompressed WLF files Optional Beginning with version 5 5 WLF files are compressed by default in order to reduce file size This may slow simulation speed by one to two percent You may want to disable compression to speed up simulation or if you are experiencing problems with faulty data in the resulting WLF file This option may also be specified with the WLFCompress UM 356 variable in the modelsim ini file wlfslim lt size gt Specifies a size restriction in megabytes for the event portion of the WLF file Optional The default is infinite size 0 The lt size gt must be an integer Note that a WLF file contains event header and symbol portions The size restriction is placed on the event portion only When ModelSim exits the entire header and symbol portion of the WLF file is written Consequently the resulting file will be larger than the size specified with wlfslim If used in conjunction with wlftlim the more restrictive of the limits will take effect This option may also be specified wit
149. ional sdfnowarn Disables warnings from the SDF reader Optional See Chapter 4 VHDL simulation for an additional discussion of SDF sdf_verbose Turns on the verbose mode during SDF annotation The Main window provides detailed warnings and summaries of the current annotation Optional ModelSim Command Reference vsim CR 197 t lt multiplier gt lt time_unit gt Specifies the simulator time resolution Optional lt time_unit gt must be one of the following fs ps ns us ms sec The default is 1ps the optional lt multiplier gt may be 1 10 or 100 Note that there is no space between the multiplier and the unit i e 10fs not 10 fs If you omit the t argument the default time resolution depends on design type in a Verilog design with timescale directives the minimum time precision is used see Simulator resolution limit UM 78 for further details in Verilog designs without any timescale directives or ina VHDL or mixed design the value specified for the Resolution UM 355 variable in the modelsim ini file is used Once you ve begun simulation you can determine the current simulator resolution by invoking the report command CR 109 with the simulator state option tag lt string gt Specifies a string tag to append to foreign trace filenames Optional Used with the trace_foreign lt int gt option Used when running multiple traces in the same directory title lt title gt Specifies the ti
150. ional You can disable these individually using the noindexcheck and norangecheck arguments respectively noindexcheck Disables checking on indexing expressions to determine whether indices are within declared array bounds Optional nologo Disables startup banner Optional nonstddriverinit Forces ModelSim to match pre 5 7c behavior in initializing drivers in a particular case Optional Prior to 5 7c VHDL ports of mode out or inout could have incorrectly initialized drivers if the port did not have an explicit initialization value and the actual connect to the port had explicit initial values Depending on a number of factors Modelsim could incorrectly use the actual signal s initial value when initializing lower ModelSim Command Reference CR 150 Commands level drivers Note that the argument does not cause all lower level drivers to use the actual signal s initial value it only does this in the specific cases where older versions used the actual signal s initial value noothersstaticerror Disables warnings that result from array aggregates with multiple choices having others clauses that are not locally static Optional If the pedanticerrors switch is specified this switch is ignored norangecheck Disables run time range checking In some designs this results in a 2X speed increase Range checking is enabled by default or once disabled can be enabled using rangecheck See Range and index checking UM 5
151. ions or functions that appear in a port map are ignored add dataflow CR 31 bd CR 41 disablebp CR 67 enablebp CR 73 onbreak CR 98 when CR 208 ModelSim Command Reference cd CR 49 cd The cd command changes the ModelSim local directory to the specified directory This command cannot be executed while a simulation is in progress Also executing a cd command will close the current project Syntax cd lt dir gt Arguments lt dir gt The directory to which to change Optional If no directory is specified ModelSim changes to your home directory ModelSim Command Reference CR 50 Commands change The change command modifies the value of a VHDL variable or Verilog register variable Syntax change lt variable gt lt value gt Arguments lt variable gt Specifies the name of a variable Required HDL variable names must specify a scalar type or a one dimensional array of character enumeration You may also specify a record subelement an indexed array a sliced array or a bit or slice of a register as long as the type is one of the above lt value gt Defines a value for the variable Required The specified value must be appropriate for the type of the variable Examples change count 16 FFFF Changes the value of the variable count to the hexadecimal value FFFF change rega 16 0 Changes the value of rega that is specified by the index i e 16 change foo 20 22 011 Changes the value of foo that is sp
152. is to include all ports Optional Has the same effect as specifying in out and inout together recursive Specifies that the scope of the search is to descend recursively into subregions Optional If omitted the search is limited to the selected region Arguments for virtuals kind lt kind gt Specifies the kind of virtual object for which you want to search Optional lt kind gt can be one of designs explicits functions implicits or signals unsaved Specifies that ModelSim find only virtuals that have not been saved to a format file lt item_name gt Specifies the virtual object for which you want to search Required Multiple virtuals and wildcard characters are allowed Arguments for classes lt class_name gt Specifies the incrTcl class for which you want to search Optional Wildcard characters are allowed The options for class_name include nets objects signals and virtuals If you do not specify a class name the command returns all classes in the current namespace context See incrTcl commands in the Tcl Man Pages for more information ModelSim Command Reference find CR 81 Arguments for objects class lt class_name gt Restricts the search to objects whose most specific class is class_name Optional isa lt class_name gt Restricts the search to those objects that have class_name anywhere in their heritage Optional lt object_name gt Specifies the incrTcl object for which you want t
153. is zero If gateduration is set to a non zero value a simulation value will be displayed after the gate expression becomes false if you don t want the values displayed set gateduration to zero gateexpr lt expression gt Specifies the expression for trigger gating Optional Use the usegating argument to enable trigger gating The expression is evaluated when the List window would normally have displayed a row of data usegating lt value gt Enables triggers to be gated on a value of 1 or off a value of 0 by an overriding expression Default is off Optional Use the gatexpr argument to specify the expression See Setting List window display properties UM 184 for additional information on using gating with triggers strobeperiod lt period gt Specifies the period of the list strobe When using a time unit the time value and unit must be placed in curly braces Optional strobestart lt start_time gt Specifies the start time of the list strobe Optional usesignaltriggers lt value gt If 1 uses signals as triggers if 0 not Optional usestrobe lt value gt If 1 uses the strobe to trigger if 0 not Optional ModelSim Command Reference configure CR 53 Arguments Wave window only childrowmargin lt pixels gt Specifies the distance in pixels between child signals Optional cursorlockcolor lt color gt Specifies the color of a locked cursor Default is red gridcolor
154. ke Your design gets recompiled for you You can change the design again and re run MAKE to recompile additional changes You can also run vmake on libraries other than work For example C MIXEDHDL gt vmake mylib gt mylib mak To rebuild mylib specify its makefile when you run MAKE C MIXEDHDL gt make f mylib mak ModelSim Command Reference vmap Syntax Arguments vmap CR 191 The vmap command defines a mapping between a logical library name and a directory by modifying the modelsim ini file With no arguments vmap reads the appropriate modelsim ini file s and prints the current logical library to physical directory mappings Returns nothing vmap help c del lt logical_name gt lt path gt help Displays the command s options and arguments Optional g Copies the default modelsim ini file from the ModelSim installation directory to the current directory Optional P Note This argument is intended only for making a copy of the default modelsim ini file to the current directory Do not use it while making your library mappings or the mappings may end up in the incorrect copy of the modelsim ini del Deletes the mapping specified by lt logical_name gt from the current project file Optional lt logical_name gt Specifies the logical name of the library to be mapped Optional lt path gt Specifies the pathname of the directory to which the library is to be mapped Optional If omitte
155. l file lt filename gt Specifies the name of the VCD file This option should be used only when you have created multiple VCD files using the ved files command CR 140 lt item_name gt Specifies the Verilog or VHDL item to add to the VCD file Required Multiple items may be specified by separating names with spaces Wildcards are accepted See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference ved checkpoint CR 129 vcd checkpoint The ved checkpoint command dumps the current values of all VCD variables to the specified VCD file While simulating only value changes are dumped Related Verilog tasks dumpall fdumpall Syntax ved checkpoint lt filename gt Arguments lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on the file designated by the ved file command CR 138 or dump vcd if ved file was not invoked See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference CR 130 Commands ved comment The ved comment command inserts the specified comment in the specified VCD file Syntax ved comment lt comment string gt lt filename gt Arguments lt comment string gt Comment to be included in the VCD file Required Must be quoted by double quotation marks or curly braces
156. lOrSliceNamel gt lt signalOrSliceName2 gt amp lt count gt lt signalOrSliceNamel gt lt signalOrSliceName2 gt Note that the concatenation syntax begins with amp rather than just Repetition multipliers are supported as illustrated in the second line The repetition element itself may be an arbitrary concatenation subexpression Concatenation directives The concatenation directive as illustrated below can be used to constrain the resulting array range of a concatenation or influence how compound objects are treated By default the concatenation will be created with descending index range from n 1 downto 0 where nis the number of elements in the array The concat_range directive completely specifies the index range The concat_ascending directive specifies that the index start at zero and increment upwards The concat_flatten directive flattens the signal structure hierarchy The concat_sort_wild_ascending directive gathers signals by name in ascending order the default is descending concat_range 31 0 lt concatenationExpr gt Verilog syntax concat_range 31 0 lt concatenationExpr gt Also Verilog syntax concat_range 31 downto 0 lt concatenationExpr gt VHDL syntax concat_ascending lt concatenationExpr gt concat_flatten lt concatenationExpr gt no hierarchy concat_sort_wild_ascending lt concatenationExpr gt ModelSim Command Reference Examples GUI_expression_ format CR 17
157. le due to optimizations Optional Note that using this option may reduce optimizations lt spec gt currently has only one choice v Enable access to variables constants and aliases in processes that would otherwise be merged due to optimizations lt entity gt and lt architecture gt specify the design unit s in which to allow the access If lt architecture gt is not specified then all architectures of a given lt entity gt are enabled for access check_synthesis Turns on limited synthesis rule compliance checking Specifically it checks to see that signals read by a process are in the sensitivity list Optional The checks understand only combinational logic not clocked logic Edit the CheckSynthesis UM 350 variable in the modelsim ini file to set a permanent default ModelSim Command Reference CR 148 Commands debugVA Prints a confirmation if a VITAL cell was optimized or an explanation of why it was not during VITAL level 1 acceleration Optional defercheck Defers until run time all compile time range checking on constant index and slice expressions As aresult index and slice expressions with invalid constant ranges that are never evaluated will not cause compiler error messages to be issued Optional explicit Directs the compiler to resolve ambiguous function overloading by favoring the explicit function definition over the implicit function definition Optional Strictly speaking this behavior do
158. ler directive define lt macro_name gt lt macro_text gt ModelSim Command Reference CR 184 Commands Optional Multiple define options are allowed on the command line A command line macro overrides a macro of the same name defined with the define compiler directive t delay_mode_distributed Disables path delays in favor of distributed delays Optional See Delay modes UM 88 for details delay_mode_path Sets distributed delays to zero in favor of using path delays Optional See Delay modes UM 88 for details t delay_mode_unit Sets path delays to zero and non zero distributed delays to one time unit Optional See Delay modes UM 88 for details delay_mode_zero Sets path delays and distributed delays to zero Optional See Delay modes UM 88 for details f lt filename gt Specifies a file with more command line arguments Optional Allows complex arguments to be reused without retyping Nesting of f options is allowed Environment variable expansion for example in a pathname does not occur in f files hazards Detects event order hazards involving simultaneous reading and writing of the same register in concurrently executing processes Optional You must also specify this argument when you simulate the design with vsim CR 192 See Hazard detection UM 83 for more details A Important Enabling hazards implicitly enables the compat argument As a result using this argument may affect you
159. log nets and registers Use the nowhen command CR 97 to deactivate when commands The when command uses a when_condition_expression to determine whether or not to perform the action The when_condition_expression uses a simple restricted language that is not related to Tcl which permits only four operators and operands that may be either HDL item names signame event or constants ModelSim evaluates the condition every time any item in the condition changes hence the restrictions With no arguments when will list the currently active when statements and their labels explicit or implicit gt Note Virtual signals functions regions types etc cannot be used in the when command Neither can simulator state variables other than now Syntax when label lt label gt id lt id gt lt when_condition_expression gt lt command gt Arguments label lt label gt Used to identify individual when commands Optional id lt id gt Attempts to assign this id number to the when command Optional If the id number you specify is already used ModelSim will return an error gt Note Ids for when commands are assigned from the same pool as those used for the bp command CR 46 So even if you haven t used an id number for a when command it s possible it is used for a breakpoint lt when_condition_expression gt Specifies the conditions to be met for the specified lt command gt to be executed Required
160. lso See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference CR 134 Commands vcd dumpportsflush The ved dumpportsflush command flushes the contents of the VCD file buffer to the specified VCD file Related Verilog task dumpportsflush Syntax vcd dumpportsflush lt filename gt Arguments lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on all open VCD files See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference vcd dumpportslimit CR 135 vcd dumpportslimit Syntax Arguments See also The ved dumpportslimit command specifies the maximum size of the VCD file by default limited to available disk space When the size of the file exceeds the limit a comment is appended to the file and VCD dumping is disabled Related Verilog task dumpportslimit ved dumpportslimit lt dumplimit gt lt filename gt lt dumplimit gt Specifies the maximum VCD file size in bytes Required lt filename gt Specifies the name of the VCD file Optional If omitted the command is executed on all open VCD files See Chapter 11 Value Change Dump VCD Files for more information on VCD files ModelSim Command Reference CR 136 Commands vcd dumpportsoff The ved dumpportsoff command turns off VCD dumping and records all dumped port values as x Relat
161. mpts to repair the file Required for PCs g Hides all messages unless there is an error while repairing the file Optional ModelSim Command Reference write format CR 219 write format Syntax Arguments Examples Output The write format command records the names and display options of the HDL items currently being displayed in the List or Wave window The file created is primarily a list of add list CR 32 or add wave CR 35 commands though a few other commands are included see Output below This file may be invoked with the do command CR 68 to recreate the List or Wave window format on a subsequent simulation run When you load a wave or list format file ModelSim verifies the existence of the datasets required by the format file ModelSim displays an error message if the requisite datasets do not all exist To force the execution of the wave or list format file even if all datasets are not present use the force switch with your do command For example VSIM gt do wave do force Note that this will result in error messages for signals referencing nonexistent datasets Also force is recognized by the format file not the do command write format list wave lt filename gt list wave Specifies that the contents of either the List or the Wave window are to be recorded Required lt filename gt Specifies the name of the output file where the data is to be written Required write format list alu_list do
162. ms can be described e VHDL signals variables and constants e Verilog nets and registers VHDL signals and Verilog nets and registers may be specified as hierarchical names VHDL variables and constants can be described only when visible from the current process that is either selected in the Process window or is the currently executing process at a breakpoint for example Syntax describe lt name gt Arguments lt name gt The name of an HDL item for which you want a description ModelSim Command Reference disablebp CR 67 disablebp The disablebp command turns off breakpoints and when commands To turn the breakpoints or when statements back on again use the enablebp command Syntax disablebp lt id gt Arguments lt id gt Specifies a breakpoint or when command id to disable Optional If you don t specify an id all breakpoints are disabled See also bd CR 41 bp CR 46 enablebp command CR 73 onbreak CR 98 resume CR 113 when CR 208 ModelSim Command Reference CR 68 Commands do The do command executes commands contained in a macro file A macro file can have any name and extension An error encountered during the execution of a macro file causes its execution to be interrupted unless an onerror command CR 100 onbreak command CR 98 or the OnErrorDefaultAction Tcl variable has specified the resume command CR 113 Syntax do lt filename gt lt parameter_value gt Argument
163. myfunc args throws away the first two arguments lshift args 2 See the Tcl man pages Help gt Tcl Man Pages for details ModelSim Command Reference CR 90 Commands Isublist Syntax Arguments Examples See also The Isublist command returns a sublist of the specified Tcl list that matches the specified Tcl glob pattern lsublist lt list gt lt pattern gt lt list gt Specifies the Tcl list to target with Isublist Required lt pattern gt Specifies the pattern to match within the lt list gt using Tcl glob style matching Required In the example below variable t returns structure signals source set window_names structure signals variables process source wave list dataflow set t lsublist window_names s The set command is a Tcl command See the Tcl man pages Help gt Tcl Man Pages for details ModelSim Command Reference modelsim Syntax Arguments See also modelsim CR 91 The modelsim command starts the ModelSim GUI without prompting you to load a design This command may be invoked in one of three ways from the DOS prompt from a ModelSim shortcut from the Windows Start gt Run menu To use modelsim arguments with a shortcut add them to the target line of the shortcut s properties Arguments work on the DOS command line too of course The simulator may be invoked from either the MODELSIM prompt after the GUI starts or from a DO file called by modelsim mod
164. n session project addfile lt filename gt close compileall delete lt project gt env history new lt home_dir gt lt proj_name gt lt defaultlibrary gt lt use_current gt open lt project gt removefile lt filename gt addfile lt filename gt Adds the specified file to the current open project Optional close Closes the current project Optional compileall Compiles all files in the current project Optional delete lt project gt Deletes a specified project file Optional env Returns the current project file Optional history Lists a history of manipulated projects Optional new lt home_dir gt lt proj_name gt lt defaultlibrary gt lt use_current gt Creates a new project under a specified home directory with a specified name and optionally a default library Optional If use_current is set to 1 then ModelSim uses the current modelsim ini file when creating the project rather than the default open lt project gt Opens a specified project file making it the current project Changes the current working directory to the project s directory Optional removefile lt filename gt Removes the specified file from the current project Optional vsim gt project open user george design test3 test3 mpf Makes user george design test3 the current project and changes the current working directory to user george design test3 vsim gt project compile all Executes cur
165. nal and the value will be converted to a question mark P Note The TDS ASCII In Converter and ASCII Out Converter are part of the TDS software from Fluence Technology ModelSim outputs a vector file and Fluence s tools determine whether the bidirectional signals are driving or not See also tssi2mti CR 127 ModelSim Command Reference write wave Syntax Arguments Examples write wave CR 227 The write wave command records the contents of the Wave window in PostScript format The output file can then be printed on a PostScript printer write wave width lt real_num gt height lt real_num gt margin lt real_num gt start lt time gt end lt time gt perpage lt time gt landscape portrait lt filename gt width lt real_num gt Specifies the paper width in inches Optional Default is 8 5 height lt real_num gt Specifies the paper height in inches Optional Default is 11 0 margin lt real_num gt Specifies the margin in inches Optional Default is 0 5 start lt time gt Specifies the start time on the waveform time scale to be written Optional end lt time gt Specifies the end time on the waveform time scale to be written Optional perpage lt time gt Specifies the time width per page of output Optional landscape Use landscape horizontal orientation Optional This is the default orientation portrait Use portrait vertical orientation Option
166. names and values UM 141 folders in projects UM 32 force command CR 82 defaults UM 359 format file List window CR 219 Wave window CR 219 UM 217 FPGA libraries importing UM 48 G GenerateFormat ini file variable UM 354 generics ModelSim Command Reference CR 234 Index ABCDEFGHIJKLMNOPORSTUVWAYZ assigning or overriding values with g and G CR 193 examining generic values CR 75 limitation on assigning composite types CR 194 get_resolution VHDL function UM 62 glitches disabling generation from command line CR 199 from GUI UM 257 graphic interface UM 137 grouping files for compile UM 29 GUI preferences saving UM 360 GUI_expression_format CR 15 GUI expression builder UM 271 syntax CR 18 H hasX CR 19 Hazard ini file variable VLOG UM 351 hazards hazards argument to vlog CR 184 hazards argument to vsim CR 200 limitations on detection UM 83 HDL item UM 16 help command CR 85 hierarchy forcing signals in UM 63 referencing signals in UM 63 releasing signals in UM 63 viewing signal names without UM 231 history of commands shortcuts for reuse CR 7 UM 368 of compiles UM 27 history command CR 86 HOME environment variable UM 345 T O TextIO package UM 55 VCD files UM 311 ieee ini file variable UM 349 IEEE libraries UM 47 IEEE Std 1076 UM 14 TEEE Std 1364 UM 14 UM 68 IgnoreError ini file variable UM 354 IgnoreFailure ini file variable UM 354 IgnoreNote ini file variable UM 354 ModelSim Command R
167. nds are case sensitive when matched against case sensitive identifiers otherwise they are not case sensitive Extended identifiers The following are supported formats for extended identifiers for any command that takes an identifier ext ident Note trailing space ext ident All non alpha characters escaped ModelSim Command Reference Wildcard characters CR 13 Wildcard characters Wildcard characters can be used in HDL item names in some simulator commands Conventions for wildcards are as follows Description matches any sequence of characters matches any single character matches any one of the enclosed characters a hyphen can be used to specify a range for example a z A Z 0 9 can be used only with the find command CR 79 The WildcardFilter Tcl preference variable filters matching items for the add wave add log add list and find commands gt Note A wildcard character will never match a path separator For example dut will match dut siga and dut clk However dut won t match either of those ModelSim variables Several variables are available to control simulation provide simulator state feedback or modify the appearance of the ModelSim GUI To take effect some variables such as environment variables must be set prior to simulation ModelSim variables can be referenced in simulator commands by preceding the name of the variable with the dollar sign ch
168. nt CR 197 when comparing datasets UM 126 simulator state variables UM 362 simulator version CR 197 CR 206 simultaneous events in Verilog changing order CR 183 sizetf callback function UM 112 so shared object file loading PLI VPI C applications UM 105 loading PLI VPI C applications UM 106 software version UM 153 sorting HDL items in GUI windows UM 141 ModelSim Command Reference CR 240 Index ABCDEFPGHIJKLMNOPORSTUVWAYZ source directory setting from source window UM 201 source errors locating during compilation UM 248 source files referencing with location maps UM 397 source libraries arguments supporting UM 74 source lines with errors showing UM 250 spaces in pathnames CR 9 specify path delays CR 203 standards supported UM 14 startup alternate to startup do vsim do CR 193 macro in the modelsim ini file UM 355 macros UM 358 using a startup file UM 358 Startup ini file variable UM 355 state variables UM 362 status bar Main window UM 156 status command CR 121 Status field Project tab UM 26 std ini file variable UM 349 std_arith package disabling warning messages UM 358 std_developerskit ini file variable UM 349 std_logic_arith package UM 47 std_logic_signed package UM 47 std_logic_textio UM 47 std_logic_unsigned package UM 47 StdArithNoWarnings ini file variable UM 355 STDOUT environment variable UM 346 step command CR 122 stimulus applying to signals and nets UM 195 stop command CR 123 Structure window U
169. o search Optional Wildcard characters are allowed If you do not specify an object name the command returns all objects in the current namespace context See incrTcl commands in the Tcl Man Pages for more information Examples find signals r Finds all signals in the entire design find nets in top xy Finds all input signals in region top that begin with the letters xy find signals r ul u2 cl Finds all signals in the design hierarchy at or below the region lt current_context gt ul u2 whose names begin with cl find signals s 1 Finds a signal named s Note that you must enclose the item in curly braces because of the square bracket wildcard characters find signals s 123 Finds signals s1 s2 or s3 find signals s 1 Finds the element of signal s that is indexed by the value 1 Note that the find command uses parentheses not square brackets to specify a subelement index find signals top data 3 downto 0 Finds a 4 bit array named data Note that you must use curly braces due to the spaces in the array name find signals top My extended id Note that when specifying an item that contains an extended identifier as the last part of the name there must be a space after the closing V and before the closing See also HDL item names CR 10 Wildcard characters CR 13 ModelSim Command Reference CR 82 Commands force Syntax Arguments The force command allows you to
170. okes the editor specified by the EDITOR environment variable enablebp CR 73 turns on breakpoints and when commands turned off by the disablebp command CR 67 environment CR 74 displays or changes the current dataset and region environment examine CR 75 examines one or more HDL items and displays current values or the values at a specified previous time in the Main window exit CR 78 exits the simulator and the ModelSim application find CR 79 displays the full pathnames of all HDL items in the design whose names match the name specification you provide force CR 82 allows you to apply stimulus to VHDL signals and Verilog nets and registers interactively help CR 85 displays in the Main window a brief description and syntax for the specified command history CR 86 lists the commands executed during the current session log CR 87 creates a wave log format WLF file containing simulation data for all HDL items whose names match the provided specifications Ishift CR 89 takes a Tcl list as argument and shifts it in place one place to the left eliminating the Oth element Isublist CR 90 returns a sublist of the specified Tcl list that matches the specified Tcl glob pattern modelsim CR 91 starts the ModelSim GUI without prompting you to load a design valid only for Windows platforms noforce CR 92 removes the effect of any active for
171. ol Displays all simulator control variables UserTimeUnit ns RunLength 100 BreakOnAssertion 3 IgnoreNote 0 IgnoreWarning 0 IgnoreError 0 IgnoreFailure 0 NumericStdNoWarnings PathSeparator SE SE SE SE SE SE Sk SE SE SE GE SE SE SE DelayFileOpen 0 report simulator state IterationLimit 5000 DefaultForceKind default CheckpointCompressMode StdArithNoWarnings DefaultRadix symbolic Displays all simulator state variables Only the variables that relate to the design being simulated are displayed now 0 0 delta 0 library work entity type_clocks architecture full resolution Ins ModelSim Command Reference CR 110 Commands Viewing preference variables Preference variables have more to do with the way things look but not entirely rather than controlling the simulator You can view preference variables from the Preferences dialog box Select the Tools gt Edit Preferences See also Preference variables located in INI files UM 349 and Preference variables located in Tcl files UM 360 ModelSim Command Reference restart Syntax Arguments restart CR 111 The restart command reloads the design elements and resets the simulation time to zero Only design elements that have changed are reloaded Note that SDF files are always reread during a restart Shared libraries are handled as follows during a restart e Shared libraries that
172. old out2 Displays an item named out2 The item is specified as being a logic item presented in gold add wave hex address a_7 a_6 a_5 a_4 a_3 a_2 a_l a_0 Displays a user defined hex formatted bus named address add wave r Waves all items in the design add wave Waves all items in the region add wave in Waves all input ports in the region ModelSim Command Reference CR 38 Commands add wave hex mybus scalarl vectorl scalar2 Creates a user defined bus named mybus consisting of three signals Scalar and scalar2 are of type std_logic and vector is of type std_logic_vector 7 downto 1 The bus is displayed in hex Slices and arrays may be added to the bus using either VHDL or Verilog syntax For example add wave vector3 1 add wave vector3 1 add wave vector3 4 downto 0 add wave vector3 4 0 add wave vecl hex vec2 dec vec3 vec4 Adds the item vec1 to the Wave window using symbolic values adds vec2 in hexadecimal and adds vec3 and vec4 in decimal See also add list CR 32 log CR 87 Extended identifiers CR 12 Concatenation directives CR 16 ModelSim Command Reference alias CR 39 alias The alias command displays or creates user defined aliases Any arguments passed on invocation of the alias will be passed through to the specified commands Returns nothing Existing ModelSim commands e g run env etc cannot be aliased Syntax alias lt name gt lt cmds
173. om the cancelled pending value of the net to the new pending value The alt_path_delays option modifies the inertial mode such that a delay is based on a transition from the current output value rather than the cancelled pending value of the net This option has no effect in transport mode see pulse_e lt percent gt and pulse_r lt percent gt extend_tcheck_data_limit lt percent gt extend_tcheck_ref_limit lt percent gt Causes a one time extension of qualifying data or reference limits in an attempt to provide a delay net delay solution prior to any limit zeroing A limit qualifies if it bounds a violation region which does not overlap a related violation region lt percent gt is the maximum percent of limit relaxation See Extending check limits without zeroing UM 85 for an example of how to calculate the percentage hazards Enables event order hazard checking in Verilog modules Optional You must also specify this argument when you compile your design with vlog CR 183 See Hazard detection UM 83 for more details A Important Enabling hazards implicitly enables the compat argument As a result using this argument may affect your simulation results int_delays Optimizes annotation of interconnect delays for designs that have been compiled using fast see vlog command CR 183 Optional This argument causes vsim to insert placeholder delay elements at optimized cell inputs resulting in faster backannotation
174. ommand CR 107 R race condition problems with event order UM 80 radix changing in Signals Variables Dataflow List and Wave windows CR 108 character strings displaying CR 180 default DefaultRadix variable UM 353 of signals being examined CR 76 of signals in Wave window CR 37 specifying in List window UM 182 radix command CR 108 range checking UM 51 disabling CR 150 enabling CR 151 readers and drivers UM 165 real type converting to time UM 65 ModelSim Command Reference CR 238 Index ABCDEFGHIJKLMNOPORSTUVWAYZ reconstruct RTL level design busses UM 134 record field selection syntax CR 10 records values of changing UM 212 recovery UM 93 redirecting messages TranscriptFile UM 356 refreshing library images CR 151 CR 186 UM 47 registers adding to the Wave and List windows UM 196 values of displaying in Signals window UM 192 saving as binary log file UM 196 waveforms viewing UM 215 report simulator control UM 344 simulator state UM 344 report command CR 109 reporting compile history UM 27 variable settings CR 13 RequireConfigForAl DefaultBinding variable UM 350 resolution returning as a real UM 62 specifying with t argument CR 197 verilog simulation UM 78 VHDL simulation UM 52 Resolution ini file variable UM 355 resolution simulator state variable UM 362 resource libraries UM 45 restart command CR 111 defaults UM 359 in GUI UM 150 toolbar button UM 154 UM 205 UM 223 restoring defaults UM 345 results
175. on This expression uses the OR reduction operator which takes the logical OR of all the bits of the vector argument Commands fully compatible with virtual functions add dataflow CR 31 add log log CR 87 add wave CR 35 delete CR 65 describe CR 66 Virtual describe is a examine CR 75 little faster find CR 79 restart CR 111 searchlog CR 116 show CR 119 Commands not currently compatible with virtual functions drivers CR 69 force CR 82 noforce CR 92 ved add CR 128 when CR 208 ModelSim Command Reference See also virtual function CR 167 virtual count CR 160 virtual define CR 161 virtual delete CR 162 virtual describe CR 163 virtual expand CR 164 virtual hide CR 168 virtual log CR 169 virtual nohide CR 171 virtual nolog CR 172 virtual region CR 174 virtual save CR 175 virtual show CR 176 virtual signal CR 177 virtual type CR 180 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 168 Commands virtual hide The virtual hide command sets a flag in the specified real or virtual signals so those signals do not appear in the Signals window This is used when you want to replace an expanded bus with a user defined bus You make the signals reappear using the virtual nohide command Syntax virtual hide kin
176. ons and arguments Optional verbose Displays progress messages Optional lib lt library_name gt Specifies the logical name or pathname of the library that holds the design unit to be deleted Optional by default the design unit is deleted from the work library al11 Deletes an entire library Optional BE CAREFUL Libraries cannot be recovered once deleted and you are not prompted for confirmation lt design_unit gt Specifies the entity package configuration or module to be deleted Required unless all is used lt arch_name gt Specifies the name of an architecture to be deleted Optional if omitted all of the architectures for the specified entity are deleted Invalid for a configuration or a package vdel all Deletes the work library vdel lib synopsys all Deletes the synopsys library vdel xor Deletes the entity named xor and all its architectures from the work library vdel xor behavior Deletes the architecture named behavior of the entity xor from the work library vdel base Deletes the package named base from the work library ModelSim Command Reference CR 154 Commands vdir The vdir command selectively lists the contents of a design library This command can also be used to check compatibility of a vendor library If vdir cannot read a vendor supplied library the library may not be ModelSim compatible Syntax vdir help 1 r lib lt library_name gt lt design_unit gt
177. ou want descriptions Required Wildcards can be used virtual describe kind explicits Describes the data type of all virtuals you have explicitly created virtual define CR 161 virtual show CR 176 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 164 Commands virtual expand The virtual expand command produces a list of all the non virtual objects contained in the specified virtual signal s This can be used to create a list of arguments for a command that does not accept or understand virtual signals Syntax virtual expand base lt pathname gt Arguments base Causes the root signal parent to be output in place of a subelement Optional For example vcd add virtual expand base myVirtualSignal the resulting command after substitution would be vcd add signala signalb signalc lt pathname gt Specifies the path to the signals and virtual signals to expand Required Wildcards can be used Any number of paths can be specified Examples vcd add virtual expand myVirtualSignal Adds the elements of a virtual signal to the VCD file In the Tcl language the square brackets specify that the enclosed command should be executed first virtual expand then the result substituted into the surrounding command So if myVirtualSignal is a concatenation of signala signalb rec1 and signalc 5 downto 3 the resulting command after substitution would be vcd add signala signalb recl s
178. p alu a 4 0 using Verilog notation Note that the concatenation notation starts with amp rather than virtual signal install sim testbench chipa alu a 19 downto 13 amp chipa decode inst amp chipa mode stuff Creates a signal sim testbench stuff which is a record type with three fields corresponding to the three specified signals The example assumes chipa mode is of type integer chipa alu a is of type std_logic_vector and chipa decode inst is a user defined enumeration virtual signal delay 10 ps top signalA myDelayedSignalA Creates a virtual signal that is the same as top signalA except it is delayed by 10 ps virtual signal chip instruction 23 21 address_mode Creates a three bit signal chip address_mode as an alias to the specified bits virtual signal a amp b amp c amp 3 b000 myextendedbus Concatenates signals a b and c with the literal constant 000 virtual signal num amp 000 fullbus add wave unsigned fullbus Adds three missing bits to the bus num creates a virtual signal fullbus and then adds that signal to the wave window virtual signal num31 amp num30 amp num29 amp amp num4 amp num3 amp 000 fullbus add wave unsigned fullbus Reconstructs a bus that was fragmented by synthesis and is missing the lower three bits Note that you would have to type in the actual bit names i e num28 num27 etc represented by the in the syntax a
179. pecification Optional lt item_name gt Specifies the names of HDL items to be included in the Wave window display Optional Wildcard characters are allowed Note that the WildcardFilter Tcl preference variable identifies types to ignore when matching items with wildcard patterns Variables may be added if preceded by the process name For example add wave myproc int1 lt item_name gt sigl sig2 sig3 Creates a user defined bus with the name lt item_name gt sigi are signals to be concatenated within the user defined bus Optional gt Note You can also select Tools gt Combine Signals Wave window to create a user defined bus label lt name gt Specifies an alternative name for the signal being added to the Wave window Optional For example add wave label c clock adds the clock signal labeled as c to the Wave window This alternative name is not valid in a force CR 82 or examine CR 75 command however it can be used in a searchlog command CR 116 with the wave option noupdate Prevents the Wave window from updating when a series of add wave commands are executed in series Optional offset lt oliset gt Modifies an analog waveform s position on the display Optional The offset value is part of the wave positioning equation see scale below out For use with wildcard searches Specifies that the scope of the search is to include ports of mode OUT if they match the item_name sp
180. plates UM 273 library usage UM 72 SDF annotation UM 302 sdf_annotate system task UM 302 simulating UM 77 delay modes UM 88 XL compatible options UM 87 simulation hazard detection UM 83 simulation resolution limit UM 78 source code viewing UM 200 standards UM 14 system tasks UM 90 TF routines UM 118 XL compatible compiler options UM 74 XL compatible routines UM 120 XL compatible system tasks UM 93 verilog ini file variable UM 349 Verilog 2001 current implementation UM 14 UM 68 disabling support CR 186 Verilog PLI VPI UM 123 compiling and linking PLI VPI C applications UM 105 compiling and linking PLI VPI C applications UM 106 debugging PLI VPI code UM 121 PLI callback reason argument UM 110 PLI support for VHDL objects UM 115 registering PLI applications UM 101 registering VPI applications UM 103 specifying the PLI VPI file to load UM 107 Verilog XL compatibility with UM 67 UM 99 Veriuser ini file variable UM 102 UM 356 Veriuser specifying PLI applications UM 102 veriuser c file UM 114 verror command CR 155 version obtaining via Help menu UM 153 obtaining with vsim command CR 197 obtaining with vsim lt info gt commands CR 206 vgencomp command CR 156 VHDL delay file opening UM 359 dependency checking UM 50 field naming syntax CR 10 file opening delay UM 359 CR 243 ABCDEPGHIJKLMNOPORSTUVWAYZ language templates UM 273 library clause UM 45 object support in PLI UM 115 simulating UM 52 source code viewing UM
181. r in the Signals window virtual nohide kind lt kind gt region lt path gt lt pattern gt kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted region lt path gt Used in place of kind to specify a region of design space in which to look for the signal names Optional lt pattern gt Indicates which signal names or wildcard patterns should be used in finding the signals to expose Required Any number of names or wildcard patterns may be used virtual hide CR 168 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 172 Commands virtual nolog Syntax Arguments The virtual nolog command reverses the effect of a virtual log command It causes the simulation dependent signals of the specified virtual signals to be excluded unlogged by the kernel If wildcard patterns are used it will also unlog any normal signals found unless the only option is used virtual nolog kind lt kind gt region lt path gt recursive only in out inout internal ports lt pattern gt kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted region lt path gt Used in place
182. r simulation results incdir lt directory gt Specifies directories to search for files included with include compiler directives Optional By default the current directory is searched first and then the directories specified by the incdir options in the order they appear on the command line You may specify multiple incdir options as well as multiple directories separated by in a single incdir option LNCr Performs an incremental compile Optional Compiles only code that has changed For example if you change only one module in a file containing several modules only the changed module will be recompiled Note however that if the compile options change all modules are recompiled regardless if you use incr or not May be used with fast tlibext lt suffix gt Works in conjunction with the y option Specifies file extensions for the files in a source library directory Optional By default the compiler searches for files without extensions If you specify the libext option then the compiler will search for a file with the suffix appended to an unresolved name You may specify only one libext option but it may contain multiple suffixes separated by The extensions are tried in the order they appear in the libext option ModelSim Command Reference vlog CR 185 t librescan Scans libraries in command line order for all unresolved modules Optional line lt number gt Starts the compiler on the specified line in t
183. reated virtual describe CR 163 virtual show CR 176 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference CR 162 Commands virtual delete The virtual delete command removes the matching virtuals Syntax virtual delete kind lt kind gt lt pathname gt Arguments kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted lt pathname gt Specifies the path to the virtual s you want to delete Required Wildcards can be used Examples virtual delete kind explicits Deletes all of the virtuals you have explicitly created See also virtual signal CR 177 virtual function CR 165 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual describe CR 163 virtual describe Syntax Arguments Examples See also The virtual describe command prints to the Main window a complete description of the data type of one or more virtual signals Similar to the existing describe command virtual describe kind lt kind gt lt pathname gt kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted lt pathname gt Specifies the path to the virtual s for which y
184. referenced in the expression This is useful for sub expressions of the form memory state reading ModelSim Command Reference CR 16 Syntax and conventions Signal and subelement naming conventions ModelSim supports naming conventions for VHDL and Verilog signal pathnames VHDL array indexing Verilog bit selection VHDL subrange specification and Verilog part selection Examples in Verilog and VHDL syntax top chip vlogsig top chip vhdlsig vlogsig 3 vhdlsig 9 vlogsig 5 2 vhdlsig 5 downto 2 Concatenation of signals or subelements Elements in the concatenation that are arrays are expanded so that each element in the array becomes a top level element of the concatenation But for elements in the concatenation that are records the entire record becomes one top level element in the result To specify that the records be broken down so that their subelements become top level elements in the concatenation use the concat_flatten directive Currently we do not support leaving full arrays as elements in the result Please let us know if you need that option If the elements being concatenated are of incompatible base type a VHDL style record will be created The record object can be expanded in the Signals and Wave windows just like an array of compatible type elements Concatenation syntax for VHDL lt signalOrSliceNamel gt amp lt signalOrSliceName2 gt amp Concatenation syntax for Verilog amp lt signa
185. refore precision values over 17 are not allowed precision lt digits gt lt digits gt Specifies the number of digits to display Optional Trailing zeros are not displayed unless you append the sign See examples for more details precision 4 Results in 4 digits of precision For example 1 234 or 6543 precision 8 Results in 8 digits of precision including trailing zeros For example 1 2345600 or 6543 2100 precision 8 Results in 8 digits of precision but doesn t print trailing zeros For example 1 23456 or 6543 21 ModelSim Command Reference printenv CR 103 printenv The printenv command echoes to the Main window the current names and values of all environment variables If variable names are given as arguments prints only the names and values of the specified variables Returns nothing All results go to the Main window Syntax printenv lt digits gt Arguments lt var gt s s Specifies the name s of the environment variable s to print Optional Examples printenv Prints all environment variable names and their current values For example CC gcc DISPLAY srl1 0 0 printenv USER HOME Prints the specified environment variables USER vince HOME scratch srl vince ModelSim Command Reference CR 104 Commands project Syntax Arguments Examples The project commands are used to perform common operations on projects Use this command outside of a simulatio
186. rent project library build scripts ModelSim Command Reference pwd CR 105 pwd The Tcl pwd command displays the current directory path in the Main window Syntax pwd Arguments None ModelSim Command Reference CR 106 Commands quietly The quietly command turns off transcript echoing for the specified command Syntax quietly lt command gt Arguments lt command gt Specifies the command for which to disable transcript echoing Required Any results normally echoed by the specified command will not be written to the Main window transcript To disable echoing for all commands use the transcript command CR 125 with the quietly option See also transcript CR 125 ModelSim Command Reference Syntax Arguments quit CR 107 The quit command exits the simulator quit f Or Lores Quits without asking for confirmation Optional if this argument is omitted ModelSim asks you for confirmation before exiting The f and force arguments are equivalent sim Unloads the current design in the simulator without exiting ModelSim All files opened by the simulation will be closed including the WLF file vsim wlf gt Note If you want to stop the simulation using a when command CR 208 you must use a stop command CR 123 within your when statement DO NOT use an exit command CR 78 or a quit command The stop command acts like a breakpoint at the time it is evaluated ModelSim Command Referen
187. ression typing GUI expressions are typed The supported types consist of six scalar types and two array types Scalar types The scalar types are as follows boolean integer real time 64 bit integer enumeration and signal state Signal states are represented by the nine VHDL std_logic states U X OCP CZ E L W and Verilog states 0 1 x and z are mapped into these states and the Verilog strengths are ignored Conversion is done automatically when referencing Verilog nets or registers Array types The array types supported are signed and unsigned arrays of signal states This would correspond to the VHDL std_logic_array type Verilog registers are automatically converted to these array types The array type can be treated as either UNSIGNED or SIGNED as in the IEEE std_logic_arith package Normally referencing a signal array causes it to be treated as UNSIGNED by the expression evaluator to cause it to be treated as SIGNED use casting as described below Numeric operations supported on arrays are performed by the expression evaluator via ModelSim s built in numeric_standard and similar package routines The expression evaluator selects the appropriate numeric routine based on SIGNED or UNSIGNED properties of the array arguments and the result The enumeration types supported are any VHDL enumerated type Enumeration literals may be used in the expression as long as some variable of that enumeration type is
188. rly braces virtual type state0O statel state2 state3 mystateType virtual function mystateType mysignal myConvertedSignal add wave myConvertedSignal Using positional notation associates each string with an enumeration index starting at zero and increasing by one in the positive direction When myConvertedSignal is displayed in the Wave List or Signals window the string stateO will appear when mysignal 0 statel when mysignal 1 state2 when mysignal 2 etc ModelSim Command Reference See also virtual type CR 181 virtual type 0 NULL_STATE 1 stl 2 st2 0x04 st3 16 h08 st4 h10 st5 16 20 st6 0b01000000 st7 0x80 st8 default BAD_STATE myMappedType virtual function myMappedType mybus myConvertedBus add wave myConvertedBus Uses sparse mapping of bus values to alphanumeric strings for an 8 bit one hot encoding It shows the variety of syntax that can be used for values The value default has special meaning and corresponds to any value not explicitly specified virtual type delete mystateType Deletes the virtual type mystateType virtual function CR 165 Virtual Objects User defined buses and more UM 133 gt Note Virtual types cannot be used in the when CR 208 command ModelSim Command Reference CR 182 Commands vlib Syntax Arguments Examples The vlib command creates a design library You must use vlib rather than operating system commands to creat
189. rns 0 if transcripting is turned off or 1 if transcripting is turned on Useful in a Tcl conditional expression Optional quietly Turns off the transcript echo for all commands To turn off echoing for individual commands see the quietly command CR 106 Optional transcript on Commands within a macro file will be echoed to the Main window as they are executed transcript If issued immediately after the previous example the message Macro transcripting is turned on appears in the Main window echo CR 71 ModelSim Command Reference CR 126 Commands transcript file The transcript file command sets or queries the pathname for the transcript file You can use this command to clear a transcript in batch mode or to limit the size of a transcript file It offers an alternative to setting the PrefMain file Tcl preference variable Syntax transcript file lt filename gt Arguments lt filename gt Specifies the full path and filename for the transcript file Optional If you specify a new file the existing transcript file is closed and a new transcript file opened If you specify an empty string the existing file is closed and no new file is opened If you don t specify this argument the current setting is returned Examples transcript file Closes the current transcript file and stops writing data to the file This is a method for reducing the size of your transcript transcript file run 1 ms
190. ror The verror command prints a detailed description about a message number It may also point to additional documentation related to the error verror lt msgNum gt lt msgNum gt Specifies the message number of a ModelSim message Required This number can be obtained from messages that have the format lt Tevel gt lt Tool gt lt Group gt lt MsgNum gt lt FormattedMsg gt Say you see the following message in the transcript Error vsim 3601 foo v 22 Too many Verilog port connections You would type verror 3061 and receive the following output Message 3061 Too many Verilog ports were specified in a mixed VHDL Verilog instantiation Verify that the correct VHDL Verilog connection is being made and that the number of ports matches DOC ModelSim User s Manual Mixed VHDL and Verilog Designs Chapter CR 155 ModelSim Command Reference CR 156 Commands vgencomp Once a Verilog module is compiled into a library you can use the vygencomp command to write its equivalent VHDL component declaration to standard output Optional switches allow you to generate bit or vl_logic port types std_logic port types are generated by default Syntax vgencomp help lib lt library_name gt b s v lt module_name gt Arguments help Displays the command s options and arguments Optional lib lt library_name gt Specifies the pathname of the working library If not specif
191. rs or various sized arrays as long as they have the same element enumeration type ModelSim Command Reference add list CR 33 label lt name gt Specifies an alternative signal name to be displayed as a column heading in the listing Optional This alternative name is not valid in a force CR 82 or examine CR 75 command however it can be used in a searchlog command CR 116 with the list option nodelta Specifies that the delta column not be displayed when adding signals to the List window Optional Identical to configure list delta none notrigger Specifies that items are to be listed but does not cause the List window to be updated when the item changes Optional out For use with wildcard searches Specifies that the scope of the search is to include ports of mode OUT if they match the item_name specification Optional ports For use with wildcard searches Specifies that the scope of the search is to include all ports Optional Has the same effect as specifying in out and inout together lt radix gt Specifies the radix for the items that follow in the command Optional Valid entries or any unique abbreviations are binary ascii character unsigned decimal octal hex symbolic and default If no radix is specified for an enumerated type the default representation is used You can change the default radix for the current simulation using the radix command CR 108 You can change the default radix permanen
192. ry by default This command may be invoked from within ModelSim or from the operating system command prompt This command may also be invoked during simulation Compiled libraries are version dependent For example you cannot use a library compiled with 5 5 in a simulation using 5 6 vsim Syntax vcom 87 93 acc lt spec gt lt entity gt architecture check_synthesis debugVA defercheck explicit f lt filename gt force_refresh help ignoredefaultbinding ignorevitalerrors just abcep skip abcep line lt number gt no1164 noaccel lt package_name gt nocasestaticerror nocheck noindexcheck nologo nonstddriverinit noothersstaticerror norangecheck novital novitalcheck nowarn lt number gt 00 pedanticerrors performdefaultbinding quiet rangecheck refresh s source time version work lt library_name gt lt filename gt Arguments 87 Disables support for VHDL 1076 1993 This is the VCOM default Optional See additional discussion in the examples Note that the default can be changed with the modelsim ini file see Preference variables located in INI files UM 349 93 Specifies that the simulator is to support VHDL 1076 1993 Optional Default is 87 See additional discussion in the examples acc lt spec gt lt entity gt architecture Enables access to design objects that would otherwise become unavailab
193. ry section of the modelsim ini file that is located in the same directory vlib archive compact 3 uut Creates the design library uut and specifies that any design units compiled in to the library are created as archives Also specifies that each archive be compacted when 30 of the its space is wasted ModelSim Command Reference vlog CR 183 vlog The vlog command is used to invoke VLOG the Model Technology Verilog compiler Use vlog to compile Verilog source code into a specified working library or to the work library by default vlog may be invoked from within ModelSim or from the operating system command prompt It may also be invoked during simulation Compiled libraries are version dependent For example you cannot use a library compiled with 5 5 in a simulation using 5 6 vsim Syntax vlog 93 help compat compile_uselibs lt directory_name gt define lt macro_name gt lt macro_text gt delay_mode_distributed delay_mode_path delay_mode_unit delay_mode_zero f lt filename gt hazards incdirt lt directory gt incr libext lt suffix gt librescan line lt number gt lint maxdelays mindelays noincr nolibcell nologo nospecify notimingchecks nowarn lt CODE gt 00 quiet R lt simargs gt refresh source time typdelays u v lt library_file gt version vlog95compat work lt library_name gt y lt library_directory gt
194. s lt filename gt Specifies the name of the macro file to be executed Required The name can be a pathname or a relative file name Pathnames are relative to the current working directory if the do command is executed from the command line If the do command is executed from another macro file pathnames are relative to the directory of the calling macro file This allows groups of macro files to be moved to another directory and still work lt parameter_value gt Specifies values that are to be passed to the corresponding parameters 1 through 9 in the macro file Optional Multiple parameter values must be separated by spaces If you want to make the parameters optional i e specify fewer parameter values than the number of parameters actually used in the macro you must use the argc UM 362 simulator state variable in the macro See Making macro parameters optional UM 340 Note that there is no limit on the number of parameters that can be passed to macros but only nine values are visible at one time You can use the shift command CR 118 to see the other parameters Examples do macros stimulus 100 This command executes the file macros stimulus passing the parameter value 100 to 1 in the macro file do testfile design vhd 127 If the macro file testfile contains the line bp 1 2 this command would place a breakpoint in the source file named design vhd at line 127 See also Chapter 12 Tcl and macros DO files
195. s The when command below instructs the simulator to display the value of item c in binary format when there is a clock event the clock is 1 and the value of b is 01100111 Finally the command tells ModelSim to stop when label whenl clk event and clk 1 and b 01100111 echo Signal c is exa bin c stop The commands below show an example of using a Tcl variable within a when command Note that the curly braces have been replaced with double quotes set clkb_path tb ps dprb_0 udprb ucar_reg uint_ram clkb when label whenl Sclkb_path event and Sclkb_path 1 echo Detected Clk edge at path S clkb_path This next example uses the Tcl set command UM 329 to disable arithmetic package warnings at time 0 Note that the time unit ns in this case would vary depending on your simulation resolution when Snow lns set NumericStdNoWarnings 1 run al The when command below is labeled a and will cause ModelSim to echo the message b changed whenever the value of the item b changes when label a b echo b changed The multi line when command below does not use a label and has two conditions When the conditions are met an echo CR 71 and a stop CR 123 command will be executed when b 1 and c 0 echo b is 1 and c is not 0 stop ModelSim Command Reference when CR 211 In the example below for the declaration wire 15 0 a the when command will activa
196. s That s why the condition_expression must be evaluated in the GUI before it is sent to the vsim kernel See below for an example of using a Tcl variable The gt lt gt and lt operators are the standard ones for vector types not the overloaded operators in the std_logic_1164 package This may cause unexpected results when comparing items that contain values other than 1 and 0 ModelSim does a lexical comparison position number for values other than 1 and 0 For example 0000 lt 1111 This evaluates to true HOOO lt 1111 This evaluates to false 001X gt 0010 This also evaluates to false ModelSim Command Reference CR 210 Commands lt command gt The command s for this argument are evaluated by the Tcl interpreter within the ModelSim GUI Any ModelSim or Tcl command or series of commands are valid with one exception the run command CR 114 cannot be used with the when command Required The command sequence usually contains a stop command CR 123 that sets a flag to break the simulation run after the command sequence is completed Multiple line commands can be used gt Note If you want to stop the simulation using a when command you must use a stop command CR 123 within your when statement DO NOT use an exit command CR 78 or a quit command The stop command acts like a breakpoint at the time it is evaluated See Ending the simulation with the stop command CR 211 for examples Example
197. s UM 156 Source window UM 369 Wave window UM 240 UM 366 show command CR 119 show drivers Dataflow window UM 165 Wave window UM 227 show source lines with errors UM 250 Show_BadOptionWarning ini file variable UM 351 Show_Lint ini file variable VLOG UM 351 Show_source ini file variable CR 239 ABCDEFPGHIJKLMNOPORSTUVWAYZ VCOM UM 350 Show_source ini file variable VLOG UM 351 Show_VitalChecksWarning ini file variable UM 350 Show_Warning 1 ini file variable UM 351 Show_Warning ini file variable UM 351 Show_Warning3 ini file variable UM 351 Show_Warning4 ini file variable UM 351 Show_WarningS ini file variable UM 351 Signal Spy UM 63 signal_force UM 63 signal_release UM 63 signals adding to a WLF file UM 196 adding to the Wave and List windows UM 196 alternative names in the List window label CR 33 alternative names in the Wave window label CR 36 applying stimulus to UM 195 attributes of using in expressions CR 19 breakpoints CR 208 UM 198 combining into a user defined bus CR 36 UM 183 UM 226 Dataflow window displaying in UM 158 drivers of displaying CR 69 environment of displaying CR 74 filtering in the Signals window UM 194 finding CR 79 force time specifying CR 83 hierarchy referencing in UM 63 releasing in UM 63 log file creating CR 87 names of viewing without hierarchy UM 231 pathnames in VSIM commands CR 10 radix specifying for examine CR 76 specifying in List window CR 33 specifying in Wa
198. s to the new values The returned information has five fields for each attribute the command line switch the Tk widget resource name the Tk class name the default value and the current value list wave Specifies either the List or Wave widget to configure Required lt option gt lt value gt bg lt color gt Specifies the window background color Optional fg lt color gt Specifies the window foreground color Optional selectbackground lt color gt Specifies the window background color when selected Optional selectforeground lt color gt Specifies the window foreground color when selected Optional font lt font gt Specifies the font used in the widget Optional ModelSim Command Reference CR 52 Commands height lt pixels gt Specifies the height in pixels of each row Optional Arguments List window only delta all collapse none The all option displays a new line for each time step on which items change collapse displays the final value for each time step and none turns off the display of the delta column To use delta usesignaltriggers must be set to 1 on Optional gateduration lt duration_open gt The duration for gating to remain open beyond when gateexpr below becomes false expressed in x number of timescale units Extends gating beyond the back edge the last list row in which the expression evaluates to true Optional The default value for normal synchronous gating
199. script file UM 357 file or the tc preference file multisource_delay min max latest Controls the handling of multiple PORT or INTERCONNECT constructs that terminate at the same port Optional By default the Module Input Port Delay MIPD is set to the max value encountered in the SDF file Alternatively you may choose the min or latest of the values If you have a Verilog design and want to model multiple interconnect paths independently use the multisource_int_delays argument t multisource_int_delays Enables multisource interconnect delay with pulse handling and transport delay behavior Optional Use this argument when you have interconnect data in your SDF file and you want the delay on each interconnect path modeled independently Pulse handling is configured using the pulse_int_e and pulse_int_r switches described below no_notifier Disables the toggling of the notifier register argument of all timing check system tasks Optional By default the notifier is toggled when there is a timing check violation and the notifier usually causes a UDP to propagate an X This argument suppresses X propagation in both Verilog and VITAL for the entire design no_tchk_msg Disables error messages issued by timing check system tasks when timing check violations occur Optional Notifier registers are still toggled and may result in the propagation of Xs for timing check violations t notimingchecks Disables Verilog and VITAL timin
200. sed ModelSim Command Reference vcom CR 149 just abcep Directs the compiler to just include a architectures b bodies c configurations e entities p packages Any combination in any order can be used but one choice is required if you use this optional switch skip abcep Directs the compiler to skip all a architectures b bodies c configurations e entities p packages Any combination in any order can be used but one choice is required if you use this optional switch line lt number gt Starts the compiler on the specified line in the VHDL source file Optional By default the compiler starts at the beginning of the file n01164 Causes the source files to be compiled without taking advantage of the built in version of the IEEE std_logic_1164 package Optional This will typically result in longer simulation times for VHDL programs that use variables and signals of type std_logic noaccel lt package_name gt Turns off acceleration of the specified package in the source code using that package nocasestaticerror Suppresses case static warnings Optional VHDL standards require that case alternative choices be static at compile time However some expressions which are globally static are allowed This switch prevents the compiler from warning on such expressions If the pedanticerrors switch is specified this switch is ignored nocheck Disables index and range checks Opt
201. selected at simulation start up force inputi 1 10 0 20 r 100 Forces input to 1 at 10 time units after the current simulation time and to 0 at 20 time units after the current simulation time This cycle repeats starting at 100 time units after the current simulation time so the next transition is to 1 at 100 time units after the current simulation time force inputl 1 10 ns 0 20 ns r 100ns Similar to the previous example but also specifies the time units Time unit expressions preceding the r must be placed in curly braces force s 1 0 0 100 repeat 200 cancel 1000 Forces signal s to alternate between values and 0 every 100 time units until time 1000 Cancellation occurs at the last simulation delta cycle of a time unit So force s 1 0 cancel 0 will force signal s to 1 for the duration of the current time period when mydut siga 10 1 force deposit mydut siga 10 85 Forces siga to decimal value 85 whenever the value on the signal is 1 noforce CR 92 change CR 50 gt Note You can configure defaults for the force command by setting the DefaultForceKind variable in the modelsim ini file See Force command defaults UM 359 ModelSim Command Reference help Syntax Arguments help CR 85 The help command displays in the Main window a brief description and syntax for the specified command help lt command gt lt topic gt lt command gt Specifies the command for which you
202. size you will encounter performance degradation time Returns the cumulative wall clock time of the run commands Optional cpu Returns the cumulative processor time of the run commands Optional Processor time differs from wall clock time in that processor time is only counted when the cpu is actually running vsim If vsim is swapped out for another process cpu time does not increase context Returns the number of context swaps vsim being swapped out for another process that have occurred during the run commands Optional faults Returns the number of page faults that have occurred during the run commands Optional ModelSim Command Reference status Syntax Arguments Examples See also status The status command lists summary information about currently interrupted macros If invoked without arguments the command lists the filename of each interrupted macro the line number at which it was interrupted and prints the command itself It also displays any onbreak CR 98 or onerror CR 100 commands that have been defined for each interrupted macro status file line file Reports the file pathname of the current macro line Reports the line number of the current macro The transcript below contains examples of resume CR 113 and status commands VSIM pause 4 gt status Macro resume_test do at line 3 Current macro command executing pause is Interrupted ONBREAK commands resume
203. stering applications UM 103 VPI PLI UM 100 compiling and linking C applications UM 105 compiling and linking C applications UM 106 vsim build date and version CR 206 vsim command CR 192 VSOUT temp file UM 348 W WARNING 8 lint argument to vlog CR 185 warnings disabling at time 0 UM 358 locating file and line number UM 390 suppressing VCOM warning messages CR 150 suppressing VLOG warning messages CR 185 suppressing VSIM warning messages CR 202 turning off warnings from arithmetic packages UM 358 wave format file UM 217 wave log format WLF file CR 197 UM 125 of binary signal values CR 87 see also WLF files wave viewer Dataflow window UM 166 Wave window UM 215 in the Dataflow window UM 166 toggling waveform popup on off UM 232 see also windows Wave window wave adding CR 35 WaveActivateNextPane command CR 220 waveform logfile log command CR 87 overview UM 125 see also WLF files waveform popup UM 232 waveforms UM 125 saving and viewing CR 87 UM 126 saving and viewing in batch mode UM 389 viewing UM 215 WaveRestoreCursors command CR 220 WaveRestoreZoom command CR 220 WaveSignalNameWidth ini file variable UM 356 welcome dialog turning on off UM 344 ModelSim Command Reference CR 244 Index ABCDEFPGHIJKLMNOPORSTUVWAYZ when command CR 208 when statement setting signal breakpoints UM 198 time based breakpoints CR 212 where command CR 213 wildcard characters for pattern matching in simulator commands CR 13
204. t all have to be full paths Optional install lt path gt Causes the newly created signal to become a child of the specified region If install is not specified the newly created signal becomes a child of the nearest common ancestor of all objects appearing in lt expressionString gt If the expression references more than one WLF file dataset the virtual signal will automatically be placed in region virtuals Functions Optional implicit Used internally to create virtuals that are automatically saved with the List or Wave format Optional delay lt time gt Specifies a value by which the virtual function will be delayed Optional You can use negative values to look forward in time If units are specified the lt time gt option must be enclosed in curly braces See the examples below for more details lt expressionString gt A text string expression in the MTI GUI expression format Required See GUI_expression_format CR 15 for more information lt name gt The name you define for the virtual signal Required Case is ignored unless installed in a Verilog region Use alpha numeric and underscore characters only unless you are using VHDL extended identifier notation If using VHDL extended identifier notation lt name gt needs to be quoted with double quotes or with curly braces ModelSim Command Reference CR 166 Commands Examples virtual function not chip sectionl clk clk_n Creates a signal chip s
205. t contains the onerror command Conversely OnErrorDefaultAction will run even if the macro does not contain a local onerror command This can be useful when you run a series of macros from one script and you want the same behavior across all macros ModelSim Command Reference pause Syntax Arguments Description See also pause CR 101 The pause command placed within a macro interrupts the execution of that macro pause None When you execute a macro and that macro gets interrupted the prompt will change to VSIM pause 7 gt This pause prompt reminds you that a macro has been interrupted When a macro is paused you may invoke another macro and if that one gets interrupted you may even invoke another up to a nesting level of 50 macros If the status of nested macros gets confusing use the status command CR 121 It will show you which macros are interrupted at what line number and show you the interrupted command To resume the execution of the macro use the resume command CR 113 To abort the execution of a macro use the abort command CR 30 abort CR 30 do CR 68 resume CR 113 run CR 114 ModelSim Command Reference CR 102 Commands precision Syntax Arguments Examples The precision command determines how real numbers display in the graphic interface e g Signals Wave Variables and List windows It does not affect the internal representation of a real number and the
206. te when the selected bits match a 7 when a 3 1 3 h7 echo matched at time Snow If you encounter a vectored net caused by compiling with fast use the event qualifier to prevent the command from falsely evaluating when unrelated bits of a change when a 3 1 3 h7 and a 3 1 event echo matched at time Snow The first when command below sets up a trigger for the falling edge of RESET When this happens a second when command is executed which sets up a trigger to occur 200us after the current time force SIGA 1 when RESET falling when Snow 200us noforce SIGA run al Ending the simulation with the stop command Batch mode simulations are often structured as run until condition X is true rather than run for X time simulations The multi line when command below sets a done condition and executes an echo CR 71 and a stop CR 123 command when the condition is reached The simulation will not stop even if a quit f command is used unless a stop command is executed To exit the simulation and quit ModelSim use an approach like the following onbreak resume when done_condition 1 echo End condition reached if batch_mode set DoneConditionReached 1 stop run 1000 us if DoneConditionReached 1 quit f Here s another example that stops 100ns after a signal transition when a 1 If the 100ns delay is already set then let it go if
207. tely as soon as it has been detected that a pulse error has occurred on event style is the default for propagating pulse errors see pulse_e_style_onevent pulse_e_style_onevent Selects the on event style of propagating pulse errors see pulse_e Default A pulse error propagates to the output as an X and the on event style is to schedule the X to occur at the same time and for the same duration that the pulse would have occurred if it had propagated through normally ModelSim Command Reference vsim CR 203 t pulse_int_e lt percent gt Analogous to pulse_e except it applies to interconnect delays only Optional Used in conjunction with multisource_int_delays see above t pulse_int_r lt percent gt Analogous to pulse_r except it applies to interconnect delays only Optional Used in conjunction with multisource_int_delays see above t pulse_r lt percent gt Controls how pulses are propagated through specify path delays where lt percent gt is a number between 0 and 100 that specifies the rejection limit as a percentage of the path delay Optional A pulse less than the rejection limit is suppressed from propagating to the output If the error limit is not specified by pulse_e then it defaults to the rejection limit sdf_nocheck_celltype Disables error check for mismatch between the CELLTYPE name in the SDF file and the module or primitive name for the CELL instance It is an error if the names do not match
208. tem_name gt lt item_name gt sigl sig2 sig3 label lt name gt nodelta notrigger trigger out ports lt radix gt recursive width lt n gt allowconstants For use with wildcard searches Specifies that constants matching the wildcard search should be added to the List window Optional By default constants are ignored because they do not change in For use with wildcard searches Specifies that the scope of the search is to include ports of mode IN if they match the item_name specification Optional ino t For use with wildcard searches Specifies that the scope of the search is to include ports of mode INOUT if they match the item_name specification Optional internal For use with wildcard searches Specifies that the scope of the search is to include internal items non port items if they match the item_name specification VHDL variables are not selected Optional lt item_name gt Specifies the name of the item to be listed Optional Wildcard characters are allowed Note that the WildcardFilter Tcl preference variable identifies types to ignore when matching items with wildcard patterns Variables may be added if preceded by the process name For example add list myproc int1 lt item_name gt sigl sig2 sig3 Creates a user defined bus in place of item_name sigi are signals to be concatenated within the user defined bus Optional Specified items may be either scala
209. th ModelSim to reconstruct the library A MAKE program is included with Microsoft Visual C C as well as many other program development environments After running the vmake utility MAKE recompiles only the design units and their dependencies that have changed You run vmake only once then you can simply run MAKE to rebuild your design If you add new design units or delete old ones you should re run vmake to generate a new makefile The vmake utility ignores library objects compiled with nodebug This command must be invoked from the Windows DOS prompt vmake fullsrcpath help lt library_name gt gt lt makefile gt fullsrcpath Produces complete source file paths within generated makefiles Optional By default source file paths are relative to the directory in which compiles originally occurred This argument makes it possible to copy and evaluate generated makefiles within directories that are different from where compiles originally occurred help Displays the command s options and arguments Optional lt library_name gt Specifies the library name if none is specified then work is assumed Optional gt lt makefile gt Specifies the makefile name Optional ModelSim Command Reference CR 190 Commands Examples Here is an example of how to use vmake and MAKE on your work library C MIXEDHDL gt vmake gt makefile Edit an HDL source file within the work library then enter C MIXEDHDL gt ma
210. timestep 8000 See also step CR 122 ModelSim Command Reference CR 116 Commands searchlog The searchlog command searches one or more of the currently open logfiles for a specified condition It can be used to search for rising or falling edges for signals equal to a specified value or for when a generalized expression becomes true Syntax searchlog count lt n gt deltas env lt path gt expr lt expr gt reverse rising falling anyedge startDelta lt num gt lt startTime gt value lt string gt lt pattern gt If at least one match is found it returns the time and optionally delta at which the last match occurred and the number of matches found in a Tcl list lt time gt lt matchCount gt where lt time gt is in the format lt number gt lt unit gt If the deltas option is specified the delta of the last match is also returned lt time gt lt delta gt lt matchCount gt If no matches are found a TCL_ERROR is returned If one or more matches are found but less than the number requested it is not considered an error condition and the time of the farthest match is returned with the count of the matches found Arguments pount lt n gt Specifies to search for the lt n gt th occurrence of the match condition where lt n gt is a positive integer Optional deltas Indicates to test for match on simulation delta cycles Otherwise matches are only tested for at the end of
211. tinue to be logged nowave Specifies that the current Wave window environment will not be maintained after the simulation is restarted Optional The default is for all items displayed in the Wave window to remain in the window with the same format gt Note You can configure defaults for the restart command by setting the DefaultRestartOptions variable in the modelsim ini file See Restart command defaults UM 359 ModelSim Command Reference CR 112 Commands See also vsim CR 192 ModelSim Command Reference resume CR 113 resume The resume command is used to resume execution of a macro file after a pause command CR 101 or a breakpoint It may be input manually or placed in an onbreak CR 98 command string Placing a resume command in a bp CR 46 command string does not have this effect The resume command can also be used in an onerror CR 100 command string to allow an error message to be printed without halting the execution of the macro file Syntax resume Arguments None See also abort CR 30 do CR 68 onbreak CR 98 onerror CR 100 pause CR 101 ModelSim Command Reference CR 114 Commands run The run command advances the simulation by the specified number of timesteps Syntax run lt timesteps gt lt time_units gt all continue next step over Arguments lt timesteps gt lt time_units gt Specifies the number of timesteps for the simulation to run The number ma
212. tion restart CR 111 reloads the design elements and resets the simulation time to zero resume CR 113 resumes execution of a macro file after a pause command CR 101 or a breakpoint run CR 114 advances the simulation by the specified number of timesteps searchlog CR 116 searches one or more of the currently open logfiles for a specified condition shift CR 118 shifts macro parameter values down one place show CR 119 lists HDL items and subregions visible from the current environment simstats CR 120 reports performance related statistics about active simulations status CR 121 lists all currently interrupted macros step CR 122 steps to the next HDL statement stop CR 123 stops simulation in batch files used with the when command CR 208 tb CR 124 ModelSim Command Reference displays a stack trace for the current process in the Main window Command name Command reference table CR 27 Action transcript CR 125 controls echoing of commands executed in a macro file also works at top level in batch mode transcript file CR 126 sets or queries the pathname for the transcript file tssi2mti CR 127 converts a vector file in Fluence Technology formerly TSSI Standard Events Format into a sequence of force CR 82 and run CR 114 commands vcd add CR 128 adds the specified items to the VCD file ved
213. tle to appear for the ModelSim Main window Optional If omitted the current ModelSim version is the window title Useful when running multiple simultaneous simulations Text strings with spaces must be in quotes e g my title trace_foreign lt int gt Creates two kinds of foreign interface traces a log of what functions were called with the value of the arguments and the results returned and a set of C language files to replay what the foreign interface side did The purpose of the logfile is to aid the debugging of your PLI VPI code The primary purpose of the replay facility is to send the replay file to MTI support for debugging co simulation problems or debugging problems for which it is impractical to send thePLI VPI code vcdstim lt filename gt Resimulates a design from a VCD file Optional The VCD file must have been created in a previous ModelSim simulation using the ved dumpports command CR 131 See Resimulating a design from a VCD file UM 315 for more information version Returns the version of the simulator as used by the licensing tools such as Model Technology ModelSim SE vsim 5 5 Simulator 2000 01 Jan 28 2000 view lt dataset_name gt lt WLF_filename gt Specifies a wave log format WLF file for vsim to read Allows you to use VSIM to view the results from an earlier simulation The Structure Signals Wave and List windows can be opened to look at the results stored in the WLF file other ModelS
214. tly by editing the DefaultRadix UM 353 variable in the modelsim ini file If you specify a radix for an array of a VHDL enumerated type ModelSim converts each signal value to 1 0 Z or X recursive For use with wildcard searches Specifies that the scope of the search is to descend recursively into subregions Optional if omitted the search is limited to the selected region trigger Specifies that items are to be listed and causes the List window to be updated when the items change Optional Default width lt n gt Specifies the column width in characters Optional ModelSim Command Reference CR 34 Commands Examples add list r Lists all items in the design add list Lists all items in the region add list in Lists all input ports in the region add list a label sig top lower sig array_sig 9 to 23 Displays a List window containing three columns headed a sig and array_sig 9 to 23 add list clk notrigger abcd Lists clk a b c and d only when clk changes config list strobeperiod 100 ns strobestart 0 ns usestrobe 1 add list notrigger clk abcd Lists clk a b c and d every 100 ns add list hex mybus msb opcode 8 downto 1 data Creates a user defined bus named mybus consisting of three signals the bus is displayed in hex add list vecl hex vec2 dec vec3 vec4 Lists the item vec using symbolic values lists vec2 in hexadecimal and lists vec3 and vec4
215. tual log CR 169 virtual nolog CR 172 ModelSim Command Reference CR 118 Commands shift Syntax Arguments Description See also The shift command shifts macro parameter values left one place so that the value of parameter 2 is assigned to parameter 1 the value of parameter 3 is assigned to 2 etc The previous value of 1 is discarded The shift command and macro parameters are used in macro files If a macro file requires more than nine parameters they can be accessed using the shift command To determine the current number of macro parameters use the argc UM 362 variable shift None For a macro file containing nine macro parameters defined as 1 to 9 one shift command shifts all parameter values one place to the left If more than nine parameters are named the value of the tenth parameter becomes the value of 9 and can be accessed from within the macro file do CR 68 ModelSim Command Reference show Syntax Arguments Examples See also show CR 119 The show command lists HDL items and subregions visible from the current environment The items listed include e VHDL signals and instances e Verilog nets registers tasks functions instances and memories The show command returns formatted results to stdout To eliminate formatting to use the output in a Tcl script use the Show command instead show all lt pathname gt all Display all names at and below the spe
216. type gt Arguments Specifies that all windows be opened Optional height lt n gt Specifies the window height in pixels Optional icon Toggles the view between window and icon Optional title New Window Title lt window_type gt Specifies the window title of the designated window Curly braces are only needed for titles that include spaces Double quotes can be used in place of braces for example New Window Title If the new window title does not include spaces no braces or quotes are needed For example title new_wave wave assigns the title new_wave to the Wave window width lt n gt Specifies the window width in pixels Optional lt window_type gt Specifies the ModelSim window type to view Required You do no need to type the full type see examples below implicit wildcards are accepted multiple window types may be used Available window types are dataflow list process signals source structure variables wave x lt n gt Specifies the window upper left hand x coordinate in pixels Optional y lt n gt Specifies the window upper left hand y coordinate in pixels Optional ModelSim Command Reference Examples See also view d Opens the Dataflow window view si pr Opens the Signals and Process windows view s Opens the Signals Source and Structure windows view title My Wave Window wave Opens a new wave window with My Wave Window as its title noview CR 96 v
217. type std_logic Optional It specifies that the values recorded in the VCD file shall use the std_logic enumeration characters of UX01ZWLH This option results in a non standard VCD file because VCD values are limited to the four state character set of x01z By default the std_logic characters are mapped as follows See also See Chapter 11 Value Change Dump VCD Files for more information on VCD files Verilog tasks are documented in the IEEE 1364 standard ModelSim Command Reference CR 140 Commands vcd files Syntax Arguments The ved files command specifies a filename and state mapping for a VCD file created by a ved add command CR 128 The ved files command is optional If used it must be issued before any ved add commands Related Verilog task fdumpfile ved files direction lt filename gt map lt mapping pairs gt nomap direction Affects both VHDL and Verilog ports Optional It specifies that the port variable type recorded in the VCD header for VHDL and Verilog ports shall be one of the following in out inout internal ports includes in out and inout the default is all ports gt Note The direction argument is obsolete in ModelSim versions 5 5c and later It is supported only for backwards compatibility with an NEC flow See http www model com products documentation resim_ved pdf for information regarding its use in earlier versions lt filename gt Specifies the name of a VCD f
218. ues CR 7 Command return values All simulator commands are invoked using Tcl For most commands that write information to the Main window that information is also available as a Tcl result By using command substitution the results can be made available to another command or assigned to a Tcl variable For example set aluinputs find in alu sets variable aluinputs to the result of the find command CR 79 Command shortcuts e You may abbreviate command syntax but there s a catch the minimum number of characters required to execute a command are those that make it unique Remember as we add new commands some of the old shortcuts may not work e Multiple commands may be entered on one line if they are separated by semi colons For example ModelSim gt vlog nodebug ports level3 v level2 v vlog nodebug top v The return value of the last function executed is the only one printed to the transcript This may cause some unexpected behavior in certain circumstances Consider this example vsim c do run 20 simstats quit f top You probably expect the simstats results to display in the Transcript window but they will not because the last command is quit f To see the return values of intermediate commands you must explicitly print the results For example vsim do run 20 echo simstats quit f c top Command history shortcuts The simulator command history may be reviewed or commands may b
219. ult options setting UM 249 graphic interface with the UM 247 grouping files UM 29 options in projects UM 34 order changing in projects UM 28 range checking in VHDL CR 151 UM 51 source errors locating UM 248 Verilog CR 183 UM 69 incremental compilation UM 70 XL uselib compiler directive UM 75 XL compatible options UM 74 VHDL CR 147 UM 50 at a specified line number CR 149 selected design units just eapbc CR 149 standard package s CR 151 VITAL packages UM 61 component default binding rules UM 45 concatenation directives CR 16 of signals CR 16 CR 177 ConcurrentFileLimit ini file variable UM 353 conditional breakpoints CR 208 UM 198 configuration simulator state variable UM 362 configurations simulating CR 192 configure command CR 51 connectivity exploring UM 165 constants in case statements CR 149 values of displaying CR 66 CR 75 context menus described UM 142 ModelSim Command Reference Index ABCDEFPGHIJKLMNOPORSTUVWAYZ Library tab UM 42 Project tab UM 27 Structure pages UM 210 convert real to time UM 65 convert time to real UM 64 cursors link to Dataflow window UM 159 locking UM 236 measuring time with UM 236 naming UM 235 trace events with UM 168 Wave window UM 235 customizing via preference variables UM 360 D deltas explained UM 53 Dataflow window UM 158 automatic cell hiding UM 175 UM 176 options UM 175 UM 176 pan UM 167 zoom UM 167 see also windows Dataflow window dataflow bsm
220. umpports CR 131 ved dumpportsall CR 133 ved dumpportsflush CR 134 ved dumpportslimit CR 135 ved dumpportsoff CR 136 ved dumpportson CR 137 vcd file CR 138 vcd files CR 140 ved flush CR 142 ved limit CR 143 ved off CR 144 ved on CR 145 vcom CR 147 vdel CR 153 vdir CR 154 verror CR 155 vgencomp CR 156 view CR 158 virtual count CR 160 virtual define CR 161 virtual delete CR 162 virtual describe CR 163 virtual expand CR 164 virtual function CR 165 virtual hide CR 168 virtual log CR 169 virtual nohide CR 171 virtual nolog CR 172 virtual region CR 174 virtual save CR 175 virtual show CR 176 virtual signal CR 177 virtual type CR 180 vlib CR 182 vlog CR 183 vmake CR 189 vmap CR 191 vsim CR 192 VSIM Tcl commands UM 332 vsimDate CR 206 vsimld CR 206 vsimVersion CR 206 WaveActivateNextPane CR 220 WaveRestoreCursors CR 220 WaveRestoreZoom CR 220 when CR 208 where CR 213 wlf2log CR 214 wlfman CR 216 wlfrecover CR 218 write format CR 219 write list CR 221 write preferences CR 222 write report CR 223 write transcript CR 224 write tssi CR 225 write wave CR 227 comment characters in VSIM commands CR 6 compare simulations UM 125 compatibility of vendor libraries CR 154 compile history UM 27 compile order auto generate UM 28 changing UM 28 compiler directives UM 96 IEEE Std 1364 2000 UM 96 XL compatible compiler directives UM 97 compiling changing order in the GUI UM 28 compile history UM 27 defa
221. ure CR 51 invokes the List or Wave widget configure command for the current default List or Wave window dataset alias CR 55 assigns an additional name to a dataset dataset clear CR 56 clears the current simulation WLF file dataset close CR 57 closes a dataset dataset info CR 58 reports information about the specified dataset dataset list CR 59 lists the open dataset s dataset open CR 60 opens a dataset and references it by a logical name dataset rename CR 61 changes the logical name of an opened dataset dataset save CR 62 ModelSim Command Reference saves data from the current WLF file to a specified file Command name Command reference table CR 25 Action dataset snapshot CR 63 saves data from the current WLF file at a specified interval delete CR 65 removes HDL items from either the List or Wave window describe CR 66 displays information about the specified HDL item disablebp CR 67 turns off breakpoints and when commands do CR 68 executes commands contained in a macro file drivers CR 69 displays in the Main window the current value and scheduled future values for all the drivers of a specified VHDL signal or Verilog net dumplog64 CR 70 dumps the contents of the vsim wif file in a readable format echo CR 71 displays a specified message in the Main window edit CR 72 inv
222. urns the version of the compiler as used by the licensing tools such as Model Technology ModelSim SE vcom 5 5 Compiler 2000 01 Jan 29 2000 work lt library_name gt Specifies a logical name or pathname of a library that is to be mapped to the logical library work Optional by default the compiled design units are added to the work library The specified pathname overrides the pathname specified for work in the project file lt filename gt Specifies the name of a file containing the VHDL source to be compiled One filename is required multiple filenames can be entered separated by spaces or wildcards may be used e g vhd If no filenames are given a dialog box pops up allowing you to graphically select the options and enter a filename ModelSim Command Reference CR 152 Commands Examples vcom example vhd Compiles the VHDL source code contained in the file example vhd vcom 87 o_unitsl vhd o_units2 vhd vcom 93 n_unit9l vhd n_unit92 vhd ModelSim supports designs that use elements conforming to both the 1993 and the 1987 standards Compile the design units separately using the appropriate switches Note that in the example above the 87 switch on the first line is redundant since the VCOM default is to compile to the 1987 standard vcom noaccel numeric_std example vhd When compiling source that uses the numeric_std package this command turns off acceleration of the numeric_std package located in the ieee library
223. urrent context A relative name does not start with a path separator and may or may not include a dataset name or a hierarchical path e g u data or view clk A relative name is relative to the current context in the current or specified dataset A fully rooted name starts with a path separator and includes a hierarchical path to an item e g top ul clk There is a special case of a fully rooted name where the top level design unit name can be unspecified e g u1 clk In this case the first top level instance in the design is assumed An absolute name is an exactly specified hierarchical name containing a dataset name and a fully rooted name e g sim top ul clk The current dataset is used when accessing items where a dataset name is not specified as part of the name The current dataset is determined by the dataset currently selected in the Structure window or by the last dataset specified in an environment command CR 74 The current context in the current or specified dataset is used when accessing items with relative or simple names The current context is either the current process if any or the current instance if there is no current process or the current process is not in the current instance The situation of the current process not being in the current instance can occur for example by selecting a different instance in the Structure tab or by using the environment command CR 74 to set the current context to a differ
224. uses the standard input instead force CR 82 run CR 114 write tssi CR 225 ModelSim Command Reference CR 128 Commands ved add The ved add command adds the specified items to a VCD file The allowed items are Verilog nets and variables and VHDL signals of type bit bit_vector std_logic and std_logic_vector other types are silently ignored All ved add commands must be executed at the same simulation time The specified items are added to the VCD header and their subsequent value changes are recorded in the specified VCD file By default all port driver changes and internal variable changes are captured in the file You can filter the output using arguments detailed below Related Verilog tasks dumpvars fdumpvars Syntax vcd add in out inout internal ports file lt filename gt lt item_name gt Arguments e Specifies that signal and port selection occurs recursively into subregions Optional If omitted included signals and ports are limited to the current region in Includes only port driver changes from ports of mode IN Optional out Includes only port driver changes from ports of mode OUT Optional inout Includes only port driver changes from ports of mode INOUT Optional internal Includes only internal variable or signal changes Excludes port driver changes Optional ports Includes only port driver changes Excludes internal variable or signal changes Optiona
225. ut ini file variable UM 356 unit delay mode UM 89 unknowns tracing UM 169 unresolved signals multiple drivers on UM 250 use 1076 1993 language standard UM 249 use clause specifying a library UM 46 use explicit declarations only UM 250 user defined bus CR 36 UM 133 UM 183 UM 226 UserTime Unit ini file variable UM 356 util package UM 62 V v CR 186 v2k_int_delays CR 203 values describe HDL items CR 66 examine HDL item values CR 75 of HDL items UM 206 replacing signal values with strings CR 180 variable settings report CR 13 variables adding to the Wave and List windows UM 196 describing CR 66 environment variables UM 345 LM_LICENSE_FILE UM 345 personal preferences UM 344 precedence between ini and tcl UM 362 setting environment variables UM 345 simulator state variables current settings report UM 344 iteration number UM 362 name of entity or module as a variable UM 362 resolution UM 362 simulation time UM 362 value of changing from command line CR 50 changing with the GUI UM 212 examining CR 75 values of displaying in Signals window UM 192 saving as binary log file UM 196 Variables window UM 212 see also windows Variables window ved add command CR 128 ved checkpoint command CR 129 ModelSim Command Reference CR 242 Index ABCDEFGHIJKLMNOPORSTUVWAYZ ved comment command CR 130 ved dumpports command CR 131 ved dumpportsall command CR 133 ved dumpportsflush command CR 134 ved dumpportslimit command CR 1
226. ve window CR 37 sampling at a clock change UM 391 states of displaying as mnemonics CR 180 stimulus CR 82 transitions searching for UM 237 types selecting which to view UM 194 unresolved multiple drivers on UM 250 values of converting to strings UM 394 displaying in Signals window UM 192 examining CR 75 forcing anywhere in the hierarchy UM 63 replacing with text CR 180 saving as binary log file UM 196 waveforms viewing UM 215 Signals window UM 192 see also windows Signals window simulating command line mode UM 388 comparing simulations UM 125 default run length UM 264 delays specifying time units for CR 14 design unit specifying CR 192 graphic interface to UM 254 iteration limit UM 264 saving dataflow display as a Postscript file UM 171 saving options in a project UM 30 saving simulations CR 87 CR 197 UM 125 UM 389 saving waveform as a Postscript file UM 242 stepping through a simulation CR 122 stimulus applying to signals and nets UM 195 stopping simulation in batch mode CR 211 time resolution UM 255 Verilog UM 77 delay modes UM 88 hazard detection UM 83 resolution limit UM 78 XL compatible simulator options UM 87 VHDL UM 52 viewing results in List window UM 177 VITAL packages UM 61 Simulation Configuration creating UM 30 simulations event order in UM 80 saving results CR 62 CR 63 UM 125 saving results at intervals UM 131 simulator resolution returning as a real UM 62 Verilog UM 78 VHDL UM 52 vsim t argume
227. virtual delete CR 162 virtual describe CR 163 virtual expand CR 164 virtual function CR 165 virtual hide CR 168 virtual log CR 169 virtual nohide CR 171 virtual nolog CR 172 virtual region CR 174 virtual save CR 175 virtual show CR 176 virtual signal CR 177 virtual type CR 180 vlib CR 182 vlog CR 183 vmake CR 189 vmap CR 191 vsim CR 192 vsim lt info gt CR 206 vsource CR 207 when CR 208 where CR 213 wlf2log CR 214 wlfman CR 216 wlfrecover CR 218 write format CR 219 write list CR 221 write preferences CR 222 write report CR 223 write transcript CR 224 write tssi CR 225 write wave CR 227 Index CR 229 CR 5 Syntax and conventions Chapter contents Documentation conventions CR 6 Command return values e CR 7 Command shortcuts eee CRT Command history shortcuts 2 0 0 CRA Numbering conventions a CR File and directory pathnames a a CRS HDL item names 6CR 10 Wildcard characters eee CR 13 ModelSim variables eee CR 13 Simulation time units eee CR 14 Comments in argument files CR 14 GUlLexpression_format CR 15 ModelSim Command Reference CR 6 Syntax and conventions Documentation conventions This manual uses the following conventions to define ModelSim command syntax
228. virtuals Syntax virtual show kind lt kind gt Arguments kind lt kind gt Specifies a subset of virtuals to look at Optional lt kind gt can be any of the following signals functions designs implicits and explicits Unique abbreviations are accepted See also virtual define CR 161 virtual describe CR 163 Virtual Objects User defined buses and more UM 133 ModelSim Command Reference virtual signal CR 177 virtual signal Syntax Arguments The virtual signal command creates a new signal known only by the GUI not the kernel that consists of concatenations of signals and subelements as specified in lt expressionString gt It cannot handle bit selects and slices of Verilog registers Please see Syntax and conventions CR 5 for more details on syntax virtual signal env lt path gt install lt path gt implicit delay lt time gt lt expressionString gt lt name gt env lt path gt Specifies a hierarchical context for the signal names in lt expressionString gt so they don t all have to be full paths Optional install lt path gt Causes the newly created signal to become a child of the specified region If install is not specified the newly created signal becomes a child of the nearest common ancestor of all objects appearing in lt expressionString gt If the expression references more than one WLF file dataset the virtual signal will automatically be placed in region
229. when a choice in a case statement is not a locally static expression 2 when an array aggregate with multiple choices doesn t have a locally static others choice Optional This argument overrides nocasestaticerror and noothersstaticerror see above performdefaultbinding Enables default binding when it has been disabled via the RequireConfigForAlIDefaultBinding option in the modelsim ini file Optional quiet Disable loading messages Optional ModelSim Command Reference vcom CR 151 rangecheck Enables run time range checking Default Range checking can be disabled using the norangecheck argument See Range and index checking UM 51 for additional information retresh Regenerates a library image Optional By default the work library is updated use work lt library gt to update a different library See vecom Examples CR 152 for more information s Instructs the compiler not to load the standard package Optional This argument should only be used if you are compiling the standard package itself source Displays the associated line of source code before each error message that is generated during compilation Optional by default only the error message is displayed time Reports the wall clock time vecom takes to compile the design Optional Note that if many processes are running on the same system wall clock time may differ greatly from the actual cpu time spent on vecom version Ret
230. x Arguments Examples The virtual type command creates a new enumerated type known only by the GUI not the kernel Virtual types are used to convert signal values to character strings The command works with signed integer values up to 64 bits virtual type delete lt name gt lt list_of_strings gt lt name gt delete lt name gt Deletes a previously defined virtual type lt name gt is the name you gave the virtual type when you originally defined it Optional lt list_of_strings gt A list of values and their associated character strings Required Values can be expressed in decimal or based notation Three kinds of based notation are supported Verilog VHDL and C language styles The values are interpreted without regard to the size of the bus to be mapped Bus widths up to 64 bits are supported There is currently no restriction on the contents of each string but if strings contain spaces they would need to be quoted and if they contain characters treated specially by Tcl square brackets curly braces backslashes they would need to be quoted with curly braces See the examples below for further syntax lt name gt The user defined name of the virtual type Required Case is not ignored Use alpha numeric and underscore characters only unless you are using VHDL extended identifier notation If using VHDL extended identifier notation lt name gt needs to be quoted with double quotes or with cu
231. y a name that is not the name of a top level design unit then the first top level design unit in the design is used e For arelative name containing a hierarchical path if the first item name cannot be found in the current context then an upward search is done up to the top of the design hierarchy to look for a matching item name If no items of the specified name can be found in the specified context then an upward search is done to look for a matching item in any visible enclosing scope up to an instance boundary If at least one match is found within a given context no more upward searching is done therefore some items that may be visible from a given context will not be found when wildcards are used if they are within a higher enclosing scope e The wildcards and can be used at any level of a name except in the dataset name and inside of a slice specification e A wildcard character will never match a path separator For example dut will match dut siga and dut clk However dut won t match either of those See HDL item names CR 10 for more information on specifying names examine delta lt delta gt env lt path gt in out inout internal ports name lt radix gt time lt time gt value lt name gt ModelSim Command Reference CR 76 Commands Arguments delta lt delta gt Specifies a simulation cycle at the specified time from which to fetch the value Option
232. y be fractional or may be specified absolute by preceding the value with the character Optional In addition optional lt time_units gt may be specified as fs ps ns us ms or sec The default lt timesteps gt and lt time_units gt specifications can be changed during a ModelSim session by selecting Simulate gt Simulation Options Main window See Setting default simulation options UM 263 Time steps and time units may also be set with the RunLength UM 355 and UserTimeUnit UM 356 variables in the modelsim ini file all Causes the simulator to run the current simulation forever or until it hits a breakpoint or specified break event Optional continue Continues the last simulation run after a step CR 122 command step over command or a breakpoint A run continue command may be input manually or used as the last command in a bp CR 46 command string Optional next Causes the simulator to run to the next event time Optional step Steps the simulator to the next HDL statement Optional over Specifies that VHDL procedures functions and Verilog tasks are to be executed but treated as simple statements instead of entered and traced line by line Optional ModelSim Command Reference run CR 115 Examples run 1000 Advances the simulator 1000 timesteps run 10 4 ms Advances the simulator the appropriate number of timesteps corresponding to 10 4 milliseconds run 8000 Advances the simulator to
233. y of CR 154 Verilog CR 200 UM 72 VHDL library clause UM 45 working libraries UM 38 working with contents of UM 41 library simulator state variable UM 362 License variable in ini file UM 355 licensing License variable in ini file UM 355 lint style checks CR 185 List window UM 177 adding items to CR 32 setting triggers UM 392 see also windows List window LM_LICENSE_FILE environment variable UM 345 location maps referencing source files UM 397 log command CR 87 log file log command CR 87 nolog command CR 93 overview UM 125 QuickSim II format CR 214 redirecting with 1 CR 195 virtual log command CR 169 virtual nolog command CR 172 see also WLF files Ishift command CR 89 Isublist command CR 90 M MacroNestingLevel simulator state variable UM 362 macros DO files UM 339 breakpoints executing at CR 47 creating from a saved transcript UM 147 depth of nesting simulator state variable UM 362 error handling UM 341 executing CR 68 forcing signals nets or registers CR 82 parameters as a simulator state variable n UM 362 passing CR 68 UM 339 total number passed UM 362 relative directories CR 68 shifting parameter values CR 118 startup macros UM 358 Main window UM 145 see also windows Main window mapping libraries from the command line UM 43 hierarchically UM 357 symbols Dataflow window UM 174 mapping libraries library mapping UM 43 math_complex package UM 47 math_real package UM 47 maxdelays CR 185
234. ys lt library_name gt lt design_unit gt ModelSim Command Reference vsim CR 193 VSIM arguments are grouped alphabetically by language e Arguments VHDL and Verilog CR 193 e Arguments VHDL CR 199 e Arguments Verilog CR 200 e Arguments object CR 204 Arguments VHDL and Verilog assertfile lt filename gt Designates an alternative file for recording assertion messages Optional By default assertion messages are output to the file specified by the TranscriptFile variable in the modelsim ini file see Creating a transcript file UM 357 Specifies that the simulator is to be run in command line mode Optional Also see for more information do lt command_string gt lt macro_file_name gt Instructs VSIM to use the command s specified by lt command_string gt or the macro file named by lt macro_file_name gt rather than the startup file specified in the ini file if any Optional Multiple commands should be separated by semi colons dumpports direction Modifies the format of extended VCD files to contain direction information Optional t dumpportstunique Generates unique vcd variable names for ports in a VCD file even if those ports are connected to the same collapsed net Optional f lt filename gt Specifies a file with more command line arguments Optional Allows complex argument strings to be reused without retyping Environment variable expansion for example in a pathname
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