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Interfacing The Tlc5510 Analog To Digital

1. Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP 5 4 TEXAS SLAA070 INSTRUMENTS SET dma POINTER SET A D ADDR SET SAMPLE COUNTER n CONTEXT SAVE RET ADDR AR1 ARO ST1 AND STO INITIALIZE DSP LOAD NEW VALUES IN ARs AND ARP GENERATE A D ADDR PROCESS RECEIVED DATA OF A D SAMPLES READ n YES CONTEXT RESTORE ST1 STO AR1 ARO AND RET ADDR ENABLE INTERRUPTS FUNCTION Figure 4 TLC5510 to TMS320C203 Interface Program Flow Chart C callable assembly code can be downloaded from the application note titled Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP literature number SLAA029 available at www ti com sc docs psheets abstract apps slaa029 htm 6 Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP 4i TEXAS INSTRUMENTS SLAA070 Summary This application brief shows the hardware and assembly code implementation required to interface the TLC5510 analog to digital converter ADC to the TMS320C203 DSP Many other analog components play a part in the entire system Operational amplifiers are needed for signal conditioning and voltage regulators are required to supply various voltages on the board The following are additional parts from Texas Instruments to be considered when designing the system described in this application brief e THS3001 High speed operational amplifier 420 Mhz
2. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements Customers are responsible for their applications using TI components In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards Tl assumes no liability for applications assistance or customer product design TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such semiconductor products or services might be or are used Tl s publication of information regarding any third party s products or services does not constitute Tl s approval warranty or endorsement thereof Copyright 2000 Texas Instruments Incorporated
3. GBW e THS4001 High speed operational amplifier 300 Mhz GBW e TPS7150 Low dropout regulator 5 V 500 mA e TPS7250 Low dropout regulator 5 V 250 mA e TPS7350 Low dropout regulator 5 V 250 mA supply voltage supervisor e TLC7705 Supply voltage supervisor e TPS3823 50 Supply voltage supervisor e TPS3823 50 Supply voltage supervisor For more detailed information refer to the following literature numbers and titles LITERATURE World Wide Web Our World Wide Web site at www ti com contains the most up to date product information revisions and additions A TI C2xx Development System User s Manual is also available from Wyle Electronics at www wyle com Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP 7 IMPORTANT NOTICE Texas Instruments and its subsidiaries Tl reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied on is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with Tl s standard warranty
4. 5510 analog input data is sampled at the falling edge of the clock signal The conversion time of the analog input signal amounts to 2 5 clock cycles Figure 3 shows the timing behavior of the TLC5510 The digital data is valid after a delay time tgg of 30 ns Several important parameters of the TLC5510 are summarized in Table 1 I l I l l I l l I l l I I ANALOG IN e aC ie ae N i i l l I Input Sig i i na jf i i 4 Di D8 Y nm X n X m AE Data I I toa I I I I I I Figure 3 TLC5510 I O Timing Diagram Table 1 TLC5510 Parameters At 1 dB At 3 dB tdd Delay time digital output CL lt 10 pF VI ANLG 0 5 V 2 5 V t A schematic of the TLC5510 EVM interface to the TMS320C203 DVM is shown in Figure 2 The TMS320C203 DVM is a standalone board carrying a TMS320C203PZ DSP an analog interface circuit AIC flash memory SRAM and serial interface for communication with a PC via the serial COM port The fixed point TMS320C203PZ has an instruction cycle time of 50 ns and is optimized for efficient implementation of digital signal processing algorithms Referring to Figure 2 the data bus D1 D8 is connected via data bus driver SN74AC573 J5 pins 2 4 6 8 10 12 14 and 16 through a short ribbon cable to the TMS320C203 DSP data bus lines DO D7 To prevent bus contention the SN74AC573 device must be in an active state only when data is being read from the ADC Each time the DSP wishes to read data from t
5. The 5 V supplied to the EVM is used as the negative supply voltage to the operational amplifier Depending on the operational amplifier used to drive the ADC this negative voltage may not be required in the actual application The digital ground area for the digital supply voltage is isolated from analog ground to prevent noise spikes generated by the digital logic from affecting the analog circuits on the board The two grounding areas can simply be connected together with a jumper from E21 to E22 or from E13 to E14 This helps to create and evaluate alternate grounding options k TEXAS SLAA070 INSTRUMENTS 2 The analog input signal is brought into the EVM through BNC connector J4 The reference voltage for the TLC5510 is generated by internal resistors The analog input range of the TLC5510 is determined by the configuration of jumper J6 inserted 0 V 2 28 V not inserted 0 6 V 2 6 V See the Texas Instruments data sheet for the TLC5510 and TLC5510A 8 bit high speed analog to digital converters for information regarding other voltage settings The user may select from four techniques to interface this analog input signal to the TLC5510 1 Direct the input signal can be directly fed to the ANALOG IN pin of the TLC5510 device 2 Via the amplifier input using dc coupling 3 Via the amplifier input using ac coupling 4 User defined input an optional circuit extension allows additional tests to be performed Refer to the applicat
6. he ADC address line A11 is set to a logic high level and IS is set to logic low A11 and IS form the inputs to the control logic that drives the OE pin to logic low and thus switches data bus driver SN74AC573 from 3 state to an active state 4 Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP YT EXAS INSTRUMENTS SLAA070 Software Overview The program editing and assembly are performed on the host PC and down loaded to the TMS320C203 DVM for real time processing The DSP executes the interface program and acquires and processes n input samples from the ADC Figure 4 shows the program flow chart The program starts with a common initialization procedure for the DSP followed by initialization of several auxiliary registers ARs The following steps define the program constants 1 2 3 4 Set data page pointer to Oh Set starting address Set number of samples Set A D address The program executes the following steps 1 2 3 4 5 6 Z On interrupt disable global interrupts and save PC ARs and status registers Initialize the C203 DSP Load the appropriate ARs Send the device address to the TLC5510 loading the A D output into memory After obtaining a predefined number of A D converter samples the DSP exits the loop subroutine Restore the PC status registers and ARs Enable global interrupts The data is now available for use in customer defined functions algorithms
7. ion note titled nterfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP literature number SLAA029 available at www ti com sc docs psheets abstract apps slaa029 htm for a detailed description of these four 4 types of interface techniques The maximum conversion rate of the TLC5510 ADC is 20 MHz The 20 MHz clock signal is fed via the BNC input J1 Two 74AC 11004 inverters buffer this signal before it is applied to both the clock pin of the TLC5510 and to J5 22 Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP SLAA070 INSTRUMENTS Wy TEXAS ainpow juewdojeneq EOZOOZESWL l l l I f Ir I NI X90179 1D uaxoug st SL 20N O 4a yoed Joysisay ODL QA s e ZSOVel on OHVP NS ZEDLLOHVYLNS 1 any any bLO E10 0 cofto s ja o oo tolo n olal oF L zza t wa an9a aN9Y anoa aNnov oan s8438 oan a434 1434 S1434 sa 4d vada sa sa vagn va ea vada za ta NI SOTVNV 39079 Lo zaa OLSSOTL en aAs at za i ela WA S WAS OPA S ano ano SPAS SPAS NI M9019 Ic 2 TLC5510 to TMS320C203 DVM Interface Schemati igure F 3 Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP vy TEXAS SLAA070 INSTRUMENTS Data Transfer The TLC
8. wi TEXAS Application Brief INSTRUMENTS SLAA070 April 2000 Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP Perry Miller Mixed Signal Products ABSTRACT This application report is a summary of the application note titled Interfacing the TLC5510 Analog to Digital Converter to the TMS320C203 DSP literature number SLAA029 that presents guidelines for interfacing the TI TLC5510 analog to digital converter ADC to the TI TMS320C203 DSP The TLC 5510 is a CMOS 8 bit 20 MSPS megasamples per second ADC utilizing a semi flash architecture EVM Overview The TLC5510 includes internal reference resistors a sample and hold circuit and 8 bit parallel outputs with high impedance mode The use of an evaluation module EVM is recommended due to the sampling rate of the TLC5510 Typically when the sampling rate of an ADC exceeds 1 or 2 MHz the board layoutis critical to the performance of the ADC and the use of a breadboard for evaluation is no longer suitable Figure 1 shows a simple example of how the TLC5510 EVM interfaces with the TMS320C203 development module DVM Control logic circuits are used to access the data bus TLC5510 EVM TM S320C203 DVM D1 D8 D0 D7 CLOCK IN CLKOUTI Figure 1 TLC5510 to TMS320C203 Block Diagram Figure 2 illustrates the various jumper locations on the EVM board The EVM must be provided with three 3 separate voltages analog 5 V J2 5 V J3 and digital 5 V J8

Interfacing The Tlc5510 Analog To Digital

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