EVBUM2178 - NCN5150 Evaluation Board User`s Manual
Contents
1. TR R2 R6 R8 R11 100R R0603 62 5 mW MC0 063W06031 100RFR R14 R17 R7 R16 220R R0603 62 5 mW MC0 063W06031 220RFR Y mE NM NM MN NE NEN RE NE NK Lm L4 1 9 a I3 4 3 Lo CAN 1 NCN5150 SOIC16 DNP ON Semiconductor NCN5150DR2G http onsemi com 3 NCN5150NGEVB Schematic Diagram R16 J1 220R CON2 0803 MBUS IN I g E a O 1SMA4OCATIG SMA 3v3 R1 OR 0603 TP2 3v3 ava R10 oR 0603 2 er 3 ESSES UN R12 DN 0803 CON10A TPI CON10A GND Figure 3 Schematic of NCN5150SOICGEVB J4 CON10A onsemi com http NCN5150NGEVB NCN5150QFNGEVB DESCRIPTION General Overview below as well as possible alternatives A drawing of the The NCN51500FNGEVB evaluation board board where the different sections are indicated is shown demonstrates the external components required for the below operation of the IC We will cover the different sections Loop I F Test I F NCN5150 R dg II m o dr Ul Ee e eZ 0 Q Rideau UART I F EOP Test I F STC Capacitor Figure 4 Board Drawing with Indication of Different Sections BOM List Table 3 NCN5150QFNGEVB BILL OF MATERIALS Guam Reference Pan Footprint Comments Manufacturer ProduiCode 3 me om m 3 e ewe ww O H Li R ce I uw n H 1SMA40CAT3G ON Semiconductor 1SMA40CAT3G RR cae o 3e Womens ae HIE cM ee eee R1 R2 R3 R4 R5 R8 R2. minimum allowed capacitance on STC is 10 times the capacitance on the VDD pin The minimum required capacitance on the VDD pin is 1 uF Mean MIn Max mv 20 2 40 ROO Table 4 UL RIDD VALUES STC CAPACITANCE Number of RIDD Maximum STC Min Avail Unit Loads Value Capacitor Value able Current 30 kQ 330 uF 13 KQ 820 uF 0 88 mA 2 10 mA 3 10 mA 4 20 mA 5 30 mA 6 50 mA 6 19 KQ 1500 uF 4 87 kQ 2200 uF 86 4 02 kQ 2700 uF Shown in Figure 6 is the startup sequence of the device Note that the NCN5150 does not require any external PMOS transistor on the STC pin for proper startup The yellow waveform is the bus voltage the purple waveform the STC voltage the green waveform the VDD output and the blue waveform the TX output J 10 0ms ETATEN J 3 54 V v n 0005 HSM points 16 Jan 2013 16 01 46 Figure 6 NCN5150 Startup Sequence Shown in Figure 7 is the shutdown sequence of the device The green waveform is the bus voltage the blue waveform is the VDD output the purple waveform is the PFb output and the yellow waveform is the TX output http onsemi com NCN5150NGEVB UART Interface IDC1 The interface between the transceiver and an external microcontroller is a standard uart interface consisting of the TX and RX Alternatively inverted signals TXI and RXI which are active high are also available Only one signal from TX and TXI or from RX and RXI can be used at the same time The uart
3. pins can handle communication up to 38400 baud The M BUS standard requires communication with 1 start bit 8 data bits 1 even parity bit and 1 stop bit Also available on the same connector is the VIO connection PFb indication and 3V3 VDD output Table 5 MICROCONTROLLER INTERFACE UART output Inverted Transmitter The M Bus transmitter translated the RX or RXI voltage levels to current levels on the bus Typically 15 mA is added when transmitting a space t S 00MS 75 15 7 NT SN points T 100 mg ERIT n 1 2012 11 18 19 Imark N unit loads Figure 8 Output Waveforms Receiver The receiver will compare the bus voltage level with the mark level stored on the SC capacitor minus the threshold level typically 6 V It will translate these voltage levels to low voltage communication on the TX and TXI pins The high voltage of these pins is determined by the VIO voltage Veus Vmark 21V 42V Vr Vmark 6V VspacE VmMaRK 12V Figure 9 Receive Waveforms http onsemi com 8 NCN5150NGEVB APPENDIX Evaluation Board Layout r3 QOOCOO L Lj Figure 10 Top Layer Layout SOIC Figure 11 Bottom Layer Layout SOIC http onsemi com 9 NCN5150NGEVB zd gue Figure 12 Top Layer Layout QFN 121 eug KAU VOI CHAV seua SI eug Figure 13 Bottom Layer Layout QFN http onsemi com 10 NCN5150NGEVB ON Semiconductor and uJ are registered t
4. 11 R13 R15 R18 um R10 R21 220R R0603 62 5 mW MC0 063W06031 220RFR Ei u NCN5150 QFN20 ON Sample ON Semiconductor NCN5150MNTWG http onsemi com 5 NCN5150NGEVB Schematic Diagram J1 CON10A R21 J2 220R CON2 E 2 MBUS IN 1SMA40CAT3G SMA MBUS OUT Cone 3v3 R6 oR 0603 SOT 23 on 0803 J3 CONI0A D2 220u DNP DNP 10V Case E 10V Case E 00 122 GND E D4 D5 A ONP A DNP SOD 123 SOD 123 jojojo J5 CON10A Figure 5 Schematic of NCN5150QFNGEVB onsemi com http NCN5150NGEVB FUNCTIONAL DESCRIPTION Power Supply The NCN5150 provides power to be used in the application To do this the NCN5150 draws a fixed current from the bus The amount of current drawn is fixed at a number of unit loads intervals of 1 5 mA and can be set by changing the value of the RIDD resistor The SOIC version can support up to 2 UL while the QFN version can support up to 6 UL The required resistors for are shown in table xx Also shown in table xx is the maximum amount of capacitance allowed on the STC pin This limit will ensure that the transceiver will start up in less than 3 s as required by the M BUS standard Using a smaller capacitor on STC is allowed and will result in faster start up but also in a faster shutdown reducing the time between the early warning PFb toggling when the bus is removed and the point where the 3 3V VDD voltage can no longer be maintained The
5. NCN5150NGEVB NCN5150 Evaluation Board User s Manual Introduction The NCN5150SOICGEVB and NCN51500FNGEVB evaluation boards demonstrate the NCN5150 M BUS transceiver in SOIC and QFN package respectively These evaluation boards include all external components needed for operating NCN5150 and demonstrate the small PCB surface area such an implementation requires Overview The NCNS5150 is a single chip integrated slave transceiver for use in two wire Meter Bus M BUS slave devices and repeaters The transceiver provides all of the functions needed to satisfy the European Standards EN 13757 2 and EN 1434 3 describing the physical layer requirements for M BUS It includes a programmable power level of up to 2 SOIC version or 6 NOFP version unit loads which are available for use in external circuits through a 3 3 V LDO regulator The NCN5150 can provide communication up to the maximum M BUS communication speed of 38 400 baud half duplex Applications Multi energy Utility Meters e Water e Gas e Electricity e Heating Systems Features e Single chip MBUS Transceiver e UART Communication Speeds Up to 38 400 baud ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Integrated 3 3 V VDD LDO Regulator with Extended Peak Current Capability of 15 mA Supports Powering Slave Device from the Bus or from External Power Supply e Adjustable I O Levels Adjustable Constant Current Sink up to 2 or 6 Unit Lo
6. ads Depending on the Package e Low Bus Voltage Operation e Extended Current Budget for External Circuits minimum 0 8 mA Polarity Independent e Power Fail Function e Fast Startup No External Transistor Required on STC Pin Industrial Ambient Temperature Range of 40 C to 85 C Available in 16 pin SOIC Pin to Pin Compatible with TSS721A 20 pin QFN These are Pb free Devices Figure 1 The NCN5150NGEVB Evaluation Boards Semiconductor Components Industries LLC 2013 March 2013 Rev O Publication Order Number EVBUM2178 D NCN5150NGEVB ELECTRICAL CHARACTERISTICS Table 1 ELECTRICAL CHARACTERISTICS OF THE NCN5150SOICGEVB AND NCN51500FNGEVB BOARD Value Symbol Parameter Condition mE Bus Voltage ES Current Drawn from the Bus Output Voltage fs NCN5150 DESCRIPTION The NCN5150 provide a complete transceiver for the Metering Bus M BUS It consists of a transmit block which will translate the logic level uart input to current level signaling on the bus and a receive block which will translate the voltage level signaling on the bus to a logic level uart output The device includes an echo function which will echo the uart input on the uart output provided the device is powered This can be used by the software stack to monitor if the message was transmitted The high voltage level of the microcontroller interface can be changed by connecting the desired voltage to the VIO p
7. in By default this pin is connected through a OR resistor to 3 3 V on the evaluation boards A constant current regulator that will draw a fixed current from the bus expressed in unit loads UL This current is made available to the application through a low dropout 3 3 V regulator The NCN5150 will detect when the bus is disconnected and provide an early warning to the microcontroller that the 3 3 V supply is about to collapse through the PFb pin A thermal shutdown protects the device against high junction temperatures NCN5150SOICGEVB DESCRIPTION General Overview The NCN5192NGEVB evaluation board demonstrates the external components required for the operation of the IC Loop I F NCN5150 Loop I F STC Capacitor We will cover the different sections below as well as possible alternatives A drawing of the board where the different sections are indicated is shown below R14 nim R17 uim UART I F Test I F eO m e Figure 2 Board Drawing with Indication of Different Sections http onsemi com NCN5150NGEVB BOM List Table 2 NCN5150SOICGEVB BILL OF MATERIALS Comments Manufacturer Product Code Gumi Reference Pon Footprint DS w om Lm o9 p me Doe o O pet Amm R13 220u Case E 10V AVX TAJD227K010RNJ Lm mee me fener ioe xs cw Lax cower we Was menses quao DNP SOT 28 e R1 R4 R10 R15 OR RO R0603 62 5 mW MC0603WG00000T5E
8. rademarks of Semiconductor Components Industries LLC SCILLC SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC p
9. roducts for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 l Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2178 D Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery amp Lifecycle Information ON Semiconductor NCN5150SOICGEVB
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