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P32C32/P32A32

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1. Figure 4 3 2 The circuit diagram of external device 1 for the digital outputs of PISO A64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_31 e Pin 18 37 are voltage signal for DO_0 DO_15 DO_16 DO_31 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 45 Here s the circuit diagram for external device 2 From the CON2 of PISO C64 Power Supply ICP DAS Super 2 p Uf U CE OFF On 20 DN 37 I O CONNECTOR BLOCK 37 Vlotage Output COM 1 X m o A A A A sy ACA A o y ils m o a A E A m O in O A AGA m iw a ES A A x m o a N m s a a A E JA A A A AGA y m o a gt a SA a a A A r m o a o Figure 4 3 3 The circuit diagram of external device 2 for the digital outputs of PISO C64 e The resistance of R33 R64 is 330 ohm e LEDs 33 64 are light emitting diodes e
2. o o AC Am A D a m o A ne A mi jam D w a N 25 Lam J o A m A E a o a i ES D D E E 3 o o ac fac fac far lac lac a ey ar D o Figure 4 1 4 The circuit diagram of external device 2 for the digital outputs of PISO P32C32 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 36 From the CON2 of PISO P32A32 Uf U o DN 37 I O CONNECTOR BLOCK BORRAR 1 Banm n ODO Raed Mal aed Ma eel al ll z y 23 ay gt jx E w o y Be y Ki y m S n a m S E e D o m uy w E m o A My 23 al gt jy E o y D a m oy a E m o ES y D o m oy o m o a x y D N m s E m o Ki y Ma Yo D m uy Figure 4 1 5 The circuit diagram of external device 2 for the digital outputs of PISO P32A32 e Resistance for R17 R32 is 330 ohm e LEDs 17 32 are light emitting diodes e Pin 1 20 are the GND
3. OLD Version Item Sub Vender Sub Device Sub Aux Version PISO C64 0x80 0x08 0x00 Rev1 0 3 0 PISO P64 0x80 0x08 0x10 Rev1 0 3 0 PISO P32C32 0x80 0x08 0x20 Rev1 0 4 0 PISO A64 0x80 0x08 0x50 Rev1 0 2 0 PISO P32A32 0x80 0x08 0x70 Rev1 0 2 0 Vendor ID OxE159 Device ID 0x02 New Version Item Sub Vender Sub Device Sub Aux Version PISO C64 0x0280 0x00 0x00 Rev4 0 PISO P64 0x4280 0x00 0x10 Rev4 4 PISO P32C32 0x4280 0x00 0x20 Rev5 5 PISO A64 0x8280 0x00 0x50 Rev3 0 PISO P32A32 0xC280 0x00 0x70 Rev3 3 Vendor ID 0xE159 Device ID 0x01 We provide all necessary functions as follows 1 PIO_Driverinit amp wBoard wSubVendor wSubDevice wSubAux 2 PIO_GetConfigAddressSpace wBoardNo wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice 3 Show_PIO_PISO wSubVendor wSubDevice wSubAux All functions are defined in PIO H Refer to Chapter 4 for more information The important driver information is given as follows PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 1 Resource allocated information wBase BASE address mapping in this PC wlrq IRQ channel number allocated in this PC 2 PIO PISO identification information wSubVendor subVendor ID of this board e wSubDevice subDevice ID of this board wSubAux subAux ID of this board 3 PC s physical slot information wSlotBus hardware slot ID1 in this PC s slot position wSlotDevice
4. D gt e o o D a N gt D a ES A 44 64 4 4 D a Figure 4 1 2 The circuit diagram of external device 1 for the digital outputs of PISO P32C32 T From the CON1 of PISO P32A32 O Uf 0 DN 37 I O CONNECTOR BLOCK 37 Voltage Output COM OFF On Q BEB RB RB RRB RR RBRBRBRRBRRRRE pe m o 23 y gt ne gt as ED 12 Pala T 23 LED 13 A as LED 14 an gt LED 15 AA 3 as Figure 4 1 3 The circuit diagram of external device 1 for the digital outputs of PISO P32A32 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 35 e Resistance for R1 R16 is 330 ohm e LEDs 1 6 are light emitting diodes e Pin 1 20 are the GND signal for DI O0 DI_15 DO_0 DO 15 e Pin 18 37 are the voltage signal for DI_0 DI_15 DO_0 DO_15 input DC 5V 24V e Here s the circuit diagram for external device 2 From the CON2 of PISO P32C32 ia Ud U CE 20 DN 37 I O CONNECTOR BLOCK 37 BEB RBBB RB RBRERBRRRR RRR 1 Eun Mal Md al Med Ml Ra Maal Mal Red el Mead el Mell Ha ue
5. printf nD63 32 Input Value 02x 02x 02x 02x n r8 r7 r6 r5 sleep 1 if kbhit 0 c getch if c q C Q C 27 return delay 1 end of while end of for PIO_DriverClose PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 5 7 Demo program for PISO C64 A64 Posse ee EIERE EAEE ee ete cde led ese eG EAE EEE Demo 1 Digital Output of PISO C64 e Step 1 The circuit diagram of hardware refer to Sec 4 3 Step 2 run demo1 EXE ide I ee ee eA A AER EAS E EAS E IS IT a include lt dos h gt include PIO H int main char c BYTE i WORD wBoards wRetVal WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr wRetVal PIO_Driverlnit amp wBoards 0x80 0x08 0x00 for PISO C64 0x80 0x08 0x50 for PISO A64 printf n 1 Threr are d PISO C64 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO C64 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp awBase amp wirgq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x sublD x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port outport
6. printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SubID x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port outportb wBase 1 enable D I O PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 59 step 2 digital input from DI_0 to DI_31 while 1 for 55 printf n n Digital input of PISO P32C32 j1 inportb wBase 0xcO Oxff DI_07 to DI_00 j2 inportb wBase 0xc4 Oxff DI_15 to DI_08 j 3 inporib wBase 0xc8 0xff DI_23 to DI_16 j4 inportb wBase 0xcc Oxff DI_31 to DI_24 gt E printf nD 31 0 Input Value 02x 02x 02x 02x j4 j3 j2 j1 sleep 1 if 0x80 i 0x01 break if kbhit 0 c getch if c q c Q c 27 return delay 1 end of while y end of for PIO_DriverClose PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 5 5 3 DEMO3 for PISO P32C32 P32A32 bs E NOE E EEEE O E A A AS SE Demo 3 Digital I O test of PISO P32C32 P32A32 Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo3 EXE El ae ot ee AA include lt dos h gt include PIO H
7. write to D O 48 55 write to D O 56 63 outportb wBase 0xd0 Val outportb wBase 0xd4 Val outportb wBase 0xd8 Val outportb wBase 0xdc Val gt AO A A PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 31 3 4 4 RESEM Control Register Read Write wBase 0 Note Refer to Sec 3 1 for more information about wBase When the PC is first powered on the RESET signal is in Low state This will disable all D I O operations The user has to set the RESET signal to High state before any D I O commands are given outportb wBase 1 RESET High gt all D I O are enabled now outportb wBase 0 RESET Low gt all D I O are disabled now 3 4 5 AUX Control Register Read Write wBase 2 Note Refer to Sec 3 1 for more information about wBase Aux 0 gt this Aux is used as a D l Aux 1 gt this Aux is used as a D O When the PC is first powered on All Aux signals are in Low state All Aux are designed as D I for all PIO PISO series cards Please set all Aux to D I state PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 32 3 4 6 AUX Data Register Read Write wBase 3 Note Refer to Sec 3 1 for more information about wBase When the Aux is used as D O the output state is controlled by this register This register is designed for future applications Please do not change this register 3 4 7 INT Mask Control Register Read Write wBase 5 o b b
8. C64A64 TC DIAG PIO_PISO PRJ C64A64 TC DIAG PIO_PISO EXE C64A64 BC LIB gt C64A64 BC DEMO gt C64A64 BC DIAG gt C64A64 BC LIB PIO H C64A64 BC LIB PIO C C64A64 BC LIB BCLIB BAT C64A64 BC LIB BCPIO_L LIB C64A64 BC LIB BCPIO_H LIB gt library header file gt demoi source file gt TC project file gt demo1 execution file gt library header file gt I O source code gt I O project file gt I O execution file gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 53 e C64A64 BC LIB IOPORT_L LIB e C64A64 BC LIB IOPORT_H LIB e C64A64 BC DEMO PIO H e C64A64 BC DEMO DEMO1 C e C64A64 BC DEMO DEMO1 PRJ e C64A64 BC DEMO DEMO1 EXE e C64A64 BC DIAG PIO H e C64A64 BC DIAG PIO_PISO C e C64A64 BC DIAG PIO_PISO PRJ e C64A64 BC DIAG PIO_PISO EXE gt I O port large mode gt I O port huge mode gt library header file gt demoi source file gt BC project file gt demo1 execution file gt library header file gt I O source code gt BC project file gt I O execution file e C64A64 MSC LIB gt gt for library source code e C64A64 MSC DEMO gt gt demo program s
9. o External Power External GND PISO P32C32 PISO P32A32 PISO P64 Figure 2 2 3 Isolated D l Architecture with external power supply External Power Supply GND_Internal GND DC 5V 24V Internal External source signal 5V PISO P32C32 PISO P32A32 PISO P64 Figure 2 2 4 Typical Applications of D l with external power supply PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 12 2 3 Isolated D O Architecture The PISO P32C32 amp the PISO C64 share the same architecture and the PISO P32A32 amp the PISO A64 share the same architecture Here are block diagrams related to the D O Figure 2 3 1 Isolated D O Architecture Current sinking External Power D out External GND External Power PISO P32C32 PISO C64 Figure 2 3 2 Typical Applications of D O Current sinking PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 13 Figure 2 3 3 Isolated D O Architecture Current sourcing External Power D out External GND External Power PISO P32A32 PISO A64 NOTE 1 The 11 12 amp 132 must be lt 100 mA 2 The R1 R2 4 R32 are current limit resistors They must be designed to let 11 12 8 132 lt 100 mA 3 If the internal resistance of
10. DI 11 13 Power GND 1 Power GND DI 27 DI12 14 DI32 3 D148 DI 28 DI13 15 Bias 5 bya DI 29 DI50 DI14 16 BIE JT DI 30 DI 51 DI 15 17 Dras ij External DI 31 DI36 11 DI 52 Power DI 0 15 18 37 DI 16 31 DI37 13 DI 53 External DI38 15 DI 54 Power N C 19 DI39 17 DI 55 DI40 19 DI 56 DI41 21 DI 57 DI 42 DI 58 DI 43 DI 59 CON2 Pin assignment Bud DI 45 DI 61 DI 60 External Power GND External DI 46 DI 62 DI 32 47 1 Power GND Sie 20 DI 48 63 DI 48 CON2 D I Power CON2 D I External Power CON2 D I Power N C DI 32 DI33 DI 49 DI34 N C DI 50 N C DI 35 DI 51 DI 36 DI 52 DI 37 DI 53 DI 38 DI 54 oOo 0 0 B WD DI39 DI55 o DI 40 DI 56 DI 57 Extension Cable DI 58 DI 41 N DI 42 DI 43 DI 59 DI 44 DI 60 DI 45 DI 61 D146 ed 37 Pin cable conversion 40 Pin DI 47 External DI 63 Power DI 32 47 37 DI 48 63 N C External Power Pin assignment of CON2 via extension PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 17 2 7 Pin Assignment of PISO C64 A64 CON1 Pin assignment PISO C64 External Power GND External DO 0 15 1 Power GND 20 DO 16 31 DO 16 DO 17 DO 18 DOO DO1 DO 2 DO3 DO 4 DO5 DO6 DO7 DO 19 PCIBUS DO 20 DO 21 DO 22 DO 23 DO 24 DO9 z a DO 25 CON Pin assignment DO 11 DO
11. LED 1 power indicator for DO_O0 to DO_15 LED 2 power indicator for DO_16 to DO_31 LED 3 power indicator for DO_31 to DO_47 LED 4 power indicator for DO_47 to DO_63 Isolation bank 1 DO_0toDO_15 Power CON1_18 Ground CON1_ 1 Isolation bank 2 DO_16 to DO_31 Power CON1_ 37 Ground CON1_ 20 Isolation bank 3 DO_32 to DO_47 Power CON2_18 Ground CON2_1 Isolation bank 4 DO_48 to DO_ 63 Power CON2_37 Ground CON2_20 All four banks are fully isolated from each other PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 10 2 2 Isolated D I Architecture The D I architecture of the PISO P32C32 P32A32 amp the PISO P64 are the same Select either internal or external power to supply photo couple digital input power Here are diagrams for the various configurations Configure 1 Internal power supply Default Setting o External GND PIN 19 for P32C32 P32432 PIN 1 20 for P64 gt External device GND o External device signal External GND PIN 19 for P32C32 P32432 PIN 1 20 for P64 External device signal PISO P32C32 PISO P3A32 PISO P64 Figure 2 2 2 Typical Applications of D l with internal power supply PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 11 Configure 2 External power supply External Power Supply GND_ Internal o GND DC 5V 24V Internal R 3K Ay
12. outportb wBase 1 enable D I O step 2 Digital output from DO_0toDO 31 while 1 printf n n Digital output of PISO P32C32 for i 1 i lt 0x80 i i lt lt 1 outportb wBase 0xc0 i DO_07 to DO_00 outportb wBase 0xc4 i DO_15 to DO_08 outportb wBase 0xc8 i DO_23 to DO_16 outporib wBase 0xcc i DO_31 to DO_ 24 printf nD 31 0 Output Value 02x 02x 02x 02x i 1 1 1 sleep 1 if i Ox80 i 0x01 break if kbhit 0 c getch if c q c Q C 27 return delay 1 y end of while end of for PIO_DriverClose PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 5 5 2 DEMO2 for PISO P32C32 P32A32 JE A e e e e a a S zji Demo 2 Digital input of PISO P32C32 P32A32 Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo2 EXE El 1 ae ot eee ee a eae ae include lt dos h gt include PIO H int main WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice BYTE i j1 j2 j3 j4 char c WORD wBoards wRetVal clrscr wRetVal PIO_Driverlnit amp wBoards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0
13. Isolated digital output e Isolation voltage 3750V e Open collector output 100 mA 30V per channel e Response time 4K Hz typical I O channels D l channels D O channels PISO P32C32 32 32 PISO P32A32 32 32 PISO P64 64 0 PISO C64 0 64 PISO A64 0 64 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 4 Other specifications PC compatible PCI bus Four isolated I O banks Operating Temperature 0 C to 60 C Storage Temperature 20 C to 80 C Humidity 0 to 90 non condensing Dimensions PISO P32C32 P32A32 180mm X 105mm PISO P64 180mm X 105mm PISO C64 A64 180mm X 105mm Power Consumption PISO P32C32 P32A32 5V 600mA typical PISO P64 5V 400mA typical PISO C64 A64 5V 800mA typical 2 Order Description o o o o o o o wa PISO P32C32 PCI bus with 32 bit D I 32 bit D O Current Sinking PISO P32A32 PCI bus with 32 bit D I 32 bit D O Current Sourcing PISO P64 PCI bus 64 bit D I PISO C64 PCI bus 64 bit D O Current Sinking PISO A64 PCI bus 64 bit D O Current Sourcing 2 1 Options DB 24P DB 24PD 24 channel isolated D l board DB 24R DB 24RD 24 channel relay board DB 24PR DB 24PRD 24 channel power relay board DB 16P8R 16 channel isolated D l and 8 channel relay output board DB 24POR 24 channel Photo MOS output board DB 24SSR 24 channel Solid State output board DB 24C 24 channel open collector output board ADP 37
14. int main WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice BYTE i j1 j2 j3 j4 char c WORD wBoards wRetVal clrscr wRetVal PIO_Driverlnit amp wBoards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port h outportb wBase 1 enable D I O step 2 DO_0 to DO_31 send to DI_0 to DI_31 Ej while 1 printf n n PISO P32C32 test by itself ys for i 1 i lt 0x80 i i lt lt 1 DO_07 to DO_00 DO_15 to DO_08 DO_23 to DO_16 outportb wBase 0xc0 i outportb wBase 0xc4 outportb wBase 0xc8 i A Ta outportb wBase 0xcc i DO_31 to DO_24 delay 1 about to wait 1m sec j1 inportb wBase 0xcO Oxff DI_07 to DI_00 j2 inportb wBase 0xc4 Oxff DI_15 to DI_08 j8 inportb wBase 0xc8 Oxff DI_23 to DI_16 j4 inp
15. printf gt ShowPioPiso wSubVendor wSubDevice wSubAux PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 26 3 2 The Assignment of I O Address The Plug amp Play BIOS will assign the proper I O address to each PIO PISO series card If there is only one PIO PISO board identify the board as card_0 However if there are two PIO PISO boards in the system identifying which board is card_0 becomes more difficult The software driver can support a max of 16 boards It is difficult to find the card NO The easiest way to identify which card is card_0 is to use wSlotBus amp wSlotDevice as following 1 Remove all PISO P32C32 P32A32 P64 C64 A64 cards from this PC 2 Install one PISO P32C32 P32A32 P64 C64 A64 card into the PC s PCI_sloti Run PIO PISO EXE record the result wSlotBusi amp wSlotDevice1 3 Remove all PISO P32C32 P32A32 P64 C64 A64 from this PC 4 Install one PISO P32C32 P32A32 P64 C64 A64 into the PC s PCI_slot2 Run PIO_PISO EXE amp record the wSlotBus2 amp wSlotDevice2 5 Repeat 3 amp 4 for all PCI_slots Record all results wSlotBus amp wSlotDevice Here is a possible sample record PC s PCI slot WslotBus WSlotDevice Slot_1 0 0x07 Slot_2 0 0x08 Slot_3 0 0x09 Slot 4 0 Ox0A PCI BRIDGE Slot_5 1 0x0A Slot_6 1 0x08 Slot_7 1 0x09 Slot_8 1 0x07 The above procedure will record all wSlotBus amp wSlotDevice in this PC w
16. 2 How to install software amp utility 3 Where is the diagnostic program 4 FAQ Attention If any of these items are missing or damaged contact the dealer from whom you purchased the product Please save the shipping materials and carton in case you want to ship or store the product in the future PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 7 2 Hardware configuration 2 1 Board Layout The board layout of PISO P32C32 P32A32 is as follows Digital input 0 15 Digital Output 0 15 Onn pr gt MEN HA O Digital Input 16 31 ES ad ah DC DC 1 Seeger DC DC 2 pane Aaa Dig tal Output 6 31 ae JP2 Figure 2 1A Board layout of PISO P32C32 P32A32 JP1JP2 ea INTERNAL SES EXTERNAL LED1 Power indicator forDO_0 toDO_15 LED2 Power indicator for DI_0 to DI_15 LED3 Power indicator for DO_16 to DO 31 LED4 Power indicator for Dl 16 toDI_31 JP1 Select internal external power for DI_O to DI_15 3000V isolation JP2 Select internal external power for DI_16 to DI_31 3000V isolation Isolation bank 1 DI_O to DI_15 Power CON1_ 18 Ground CON1_19 Isolation bank 2 DO_0 to DO_15 Power CON1_ 37 Ground CON1_1 8 CON1_ 20 Isolation bank 3 DI_16 to DI_31 Power CON2_18 Ground CON2_19 Isolation bank 4 DO_16 to DO_31 Power CON2_ 37 Ground CON2_1 amp CON2_20 All four banks are fully isolated from each other PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 8 The board
17. I8 37 CON1 DO External DI19 D019 CON1 D I COM1B 19 Power D120 D020 DI21 DO21 DI22 DO22 CON2 Pin assignment D123 D023 DI24 DO24 DI25 DO25 DI26 DO26 CON2 DO External GND 1 CON2 DO External D127 DO27 20 GND DI 16 DI 28 DO28 21 DO16 DI 17 DI29 DO29 22 DO17 DI 18 DI30 DO30 23 DO18 DI 19 DI31 DO31 24 DO19 DI 20 CON2D ICOM2A 35 e DO Extenal 25 DO20 ower DI 21 CON2 D I COM2B 37 N C Bi 26 DO21 DI 22 N C 39 N C 27 DO22 DI 23 28 DO23 DI 24 29 DO24 DI 25 30 DO25 DI 26 31 DO26 DI 27 32 DO27 DI 28 33 DO28 DI 29 34 DO29 Extension Cable DI 30 35 DO30 DI 31 17 36 DO31 CON2 D ICOM2A 18 47 CON2 DO External CON2 D ICOM2B 19 Power 37 Pin cable conversion 40 Pin oon Oa fF O DN ee ad ee ce cs oa F amp F WoW N O a a i rp ao 8 ON OH BW RN m oi a o k ak o a Pin assignment of CON2 via extension PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 16 2 6 Pin Assignment of PISO P64 CON1 Pin assignment External DC DC 1 DC DC2 E Power GND External J33 J4 DI 0 15 1 Power GND 20 DI 16 31 DIO 2 DI16 lt __ i esl DI17 cone DI2 4 40 PIN O DI 18 DI3 DI 19 Di4 PCI BUS DI 20 DI5 DI 21 DI 6 DI 22 DI7 9 DI 23 DI 8 10 bs n ENE CON2 Pin assignment DI 25 DI 10 12 DI 26 CON2 D I External CON2 D I External
18. b b b b p Note Refer to Sec 3 1 for more information about wBase This register is designed for future applications Please do not change this register 3 4 8 AUX Status Register ead ute wBase 7 Note Refer to Sec 3 1 for more information about wBase Aux0 3 reserved aux4 7 Aux ID PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 33 4 The applications of Digital I O 4 1 The PISO P32C32 P32A32 e The circuit diagram of D O of PISO P32C32 P32A32 is as follows DN 37 Board External Device 1 External Device 2 Figure 4 1 1 Digital inputs outputs for PISO P32C32 P32A32 e Figure 4 1 2 e Figure 4 1 3 e Figure 4 1 4 e Figure 4 1 5 PISO P32C32 PISO P32A32 PISO P32C32 PISO P32A32 shows the circuit diagram of external device 1 shows the circuit diagram of external device 1 shows the circuit diagram of external device 2 shows the circuit diagram of external device 2 gt ae ae N e o SWITCH ON hon HL CE 33 orr PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 34 e Here s the circuit diagram for external device 1 From the CON1 of PISO P32C32 7 Up U 20 DN 37 lO CONNECTOR BLOCK 37 REREREERERORERREE D 1 OOOOOOOODoOOoOoOoDoOoOoOoOo CE
19. file gt demo1 source file gt TC project file gt demo1 execution file gt library header file gt I O source code gt TC project file gt I O execution file gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 51 P64 BC LIB IOPORT_L LIB P64 BC LIB IOPORT_H LIB P64 BC DEMO PIO H P64 BC DEMO DEMO1 C P64 BC DEMO DEMO1 PRJ P64 BC DEMO DEMO1 EXE P64 BC DIAG PIO H P64 BC DIAG PIO_PISO C P64 BC DIAG PIO_PISO PRJ P64 BC DIAG PIO_PISO EXE P64 MSC LIB gt P64 MSC DEMO gt P64 MSC DIAG gt P64 MSC LIB PIO H P64 MSC LIB PIO C P64 MSC LIB MSCLIB BAT P64 MSC LIB MSCPIO_L LIB P64 MSC LIB MSCPIO_H LIB P64 MSC LIB IOPORT_L LIB P64 MSC LIB IOPORT_H LIB P64 MSC DEMO PIO H P64 MSC DEMO DEMO1 C P64 MSC DEMO MAKE1 BAT P64 MSC DEMO DEMO1 EXE P64 MSC DIAG PIO H P64 MSC DIAG PIO_PSIO C P64 MSC DIAG PIO BAT gt I O port large mode gt I O port huge mode gt library header file gt demo source file gt BC project file gt demo1 execution file gt library header file gt I O source code gt BC project file gt I O execution file gt for library s
20. the circuit diagram of external device 2 From the CON2 of PISO P64 DN 37 I O CONNECTOR BLOCK Figure 4 2 3 The circuit diagram of external device 2 for the digital inputs of PISO P64 e The D I of CON2 of PISO P64 is set to internal power PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 42 4 3 The example of PISO C64 A64 e Here s the D O circuit diagram for PISO C64 A64 O PISO C64 CON2 40 com MN DB 37 6 PCI BUS External Cable External Device 1 External Device 2 Figure 4 3 1 The example of digital outputs for PISO C64 A64 e Refer to Figure 4 3 2 for the circuit diagram of external device 1 e Refer to Figure 4 3 3 for the circuit diagram of external device 2 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 43 Here s the circuit diagram for external device 1 From the CON1 of PISO C64 Power Supply ICP DAS 5 00 V U CE 20 DN 37 I O CONNECTOR BL
21. the external device is large enough the R can be omitted 4 D1 D2 amp D31 are common cathode diodes for switching inductive loads They can be used as relay drivers hammer drivers lamp drivers display drivers line drivers amp logic buffers PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 14 2 4 Daughter Boards 2 4 1 DB 37 The DB 37 is a general purpose daughter board for D sub 37 pins lt is designed for easy wiring connections 37 Pin Cable TT gt 2 4 2 DN 37 The DN 37 is a general purpose daughter board for DB 37 with DIN Rail Mounting It is designed for easy wiring connections 37 Pin Cable Sr i H 1 ao Lae Lo m al 2 4 3 DB 8125 The DB 8125 is a general purpose screw terminal board It is designed for easy wiring connection One DB 37 amp two 20 pin flat cable headers are used in the DB 8125 DB 8125 for DB 37 or 20 pin flat cable 2 5 Pin Assignment of PISO P32C32 P32A32 CON1 Pin assignment O a Pa MN Piso P32c32 E rl g0 CON1 DO External Ipi TEDTTEDZ DC DC 1 P32A32 GND 1 CON1 DO External 20 GND PE DIO 21 DOO DI1 22 DO1 DI 2 23 DO2 DI 3 24 DO3 DI4 25 DO4 DI5 26 DO5 PCI BUS DI 6 27 DO6 DI7 28 DO7 DI8 29 DO8 DI9 0 D 1 i DI 10 o ie CON2 Pin assignment 31 DO10 DI 11 DI12 ae Pom CON2 DO External CON2 DO External 33 DO12 GND GND DI 13 34 DO13 DI16 DO16 oN 35 DO14 DI17 DO17 DI 15 17 36 DO15 DI18 DO18 CONTD NCOMTA
22. 12 O ON DO OT F WOW DY o DO8 4 DN a DO 26 DO 27 CON2 D O 32 47 CON2 D O 48 63 oe DO32 3 DO 48 DO 13 DO 14 po DO33 5 DO 49 DO 30 E l DO15 17 DO 34 xterna DO 31 bee DOS Power DO 0 15 18 37 DO 16 31 DO36 11 DO 52 N C 13 External Power 2 o 2 oa bf wo 7 DO 50 DO 37 13 DO 53 DO 38 15 DO 54 CON2 Pin assignment D039 17 DO 55 DO40 19 DO 56 External DO41 21 DO 57 Power GND External DO 32 47 1 Power GND 20 DO 48 63 DO 43 25 DO 59 DO42 23 DO 58 DO32 2 DO 48 DO 44 27 DO 60 DO33 3 DO 49 DO 45 29 DO 61 DO 34 DO 50 DO 46 31 DO 62 20 35 posi DO 47 33 DO 63 DO 36 CON2 D O e CON2 D O DO 52 32 47 48 63 DO 37 N C 37 N C DO 53 DO 38 N C 39 N C DO 54 DO 39 DO 55 DO40 10 DO 56 DO41 11 DO 57 DO42 12 DO 58 DO43 13 DO 59 DO 60 Extension Cable DO 61 DO44 14 DO45 15 DO46 16 DO 62 DO 47 17 External DO 63 Power DO 32 47 18 37 DO 48 63 A Nc 19 External 37 Pin cable conversion 40 Pin Power Pin assignment of CON2 via extension PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 18 3 I O Control Register 3 1 How to Find the I O Address The plug amp play BIOS will assign a proper I O address to every PIO PISO series card in the power on stage The fixed IDs of PIO PISO series cards are given as follows
23. 2A32MSC gt gt for Microsoft C 5 X above e P32C32P32A32 TC LIB gt gt for library source code e P32C32P32A32 TC DEMO gt gt demo program source code e P32C32P32A32 TC DIAG gt gt pio_piso auto detect program e P32C32P32A32 TC LIB PIO H gt library header file e P32C32P32A32 TC LIB PIO C gt library source file e P32C32P32A32 TC LIB TCLIB BAT gt batch compiler file e P32C32P32A32 TC LIB TCPIO_L LIB gt I O port large mode e P32C32P32A32 TC LIB TCPIO_H LIB gt I O port huge mode e P32C32P32A32 TC LIB IOPORT_L LIB gt I O port large mode e P32C32P32A32 TC LIB IOPORT_H LIB gt I O port huge mode e P32C32P32A32 TC DEMO PIO H gt library header file e P32C32P32A32 TC DEMO DEMO1 C gt demo1 source file e AP32C32P32A32TCIDEMOIDEMO2 C gt demo2 source file e AP32C32P32A32TCIDEMOIDEMO3 C gt demo3 source file e 1P32C32P32A32TCIDEMOIDEMO1 PRJ gt TC project file e 1P32C32P32A32TCIDEMOIDEMO 2 PRJ gt TC project2 file e AP32C32P32A32TCIDEMOIDEMOS PRJ gt TC projects file e P32C32P32A32 TC DEMO DEMO1 EXE gt demo1 execution file e 1P32C32P32A32TCIDEMOIDEMO 2 EXE gt demo2 execution file e AP32C32P32A32TCIDEMOIDEMOS EXE gt demo3 execution file PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 48 P32C32P32A32 TC DIAG PIO H P32C32P32A32 TC DIAG PIO_PISO C gt library header file gt I O source code P32C32P32A
24. 32 C32 P32A32 ii a TE da 59 XXI DEMOS for PISO P32 C32 P32A32 iniri doin dead dto tasbaate dente 61 5 6 DEMO PROGRAM FOR PIS O P64 isc cc csesiss costesescassss cbse cveSebbe estas sashasupeasnsvsa cheb sbueossuasasaneast 63 5 6 1 DEMOT for PISO P64 ceiien aoa ei i e ainis o iiaiai 63 5 7 DEMO PROGRAM FOR PISO C64 A64 cooccocccococonoconoconocononononnncnnncan cnn cnnonnn canon nn cn neon nccn corn nonns 65 SAL DEMOT for PIKO COAG sve ois acacia nda eddie deis 65 DIAGNOSTIC PROCEDURES ccsssssssssssssssssssssssssssesesesesssssssssssnsnsnssssssssesesesessssssesesesesesees 67 6 1 PISO Pc Ai 67 6 2 PISOP32C32 P92A 32 epi bast n 68 6 3 PISO2CG6A AG4 ias 69 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 3 1 Introduction The PISO P32C32 consists of 32 channels of isolated D l amp 32 channels of isolated D O Current Sinking The PISO P32A32 consists of 32 channels of isolated D I amp 32 channels of isolated D O Current Sourcing The PISO P64 consists of 64 channels of isolated D l The PISO C64 consists of 64 channels of isolated D O Current Sinking The PISO A64 consists of 64 channels of isolated D O Current Sourcing The D I specifications of PISO P32C32 PISO P64 8 PISO P32A32 are the same 1 1 Specifications Isolated digital input e Input voltage 5V to 30V e Input impedance 3K e Isolation voltage Using internal power 3000V Using external power 3750V e Response time 30K Hz max
25. 32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 20 Find all PISO P32C32 P32A32 cards in this PC Step1 Detect all PISO P32C32 P32A32 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x20 for PISO_P32C32 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x70 for PISO_P32A32 wRetVal PIO_Driverlnit 8wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P32C32 Cards in this PC n wBoards Step2 Save resource of all PISO P32C32 P32A32 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase 8wlrq amp wID1 amp wID2 amp wlD3 8 w D4 amp wlD5 printf nCard_ d wBase x wirq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpace i 1 wlrq save all resource of this card Find all PISO P64 cards in this PC Step1 Detect all PISO P64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x10 for PISO P64 wRetVal PIO_Driverlnit 8wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P64 Cards in this PC n wBoards Step2 save resource of all PISO P64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wirg amp wID1 amp wID2 amp wID3 8 w D4 amp wlD5 printf nCard_ d wBase x wlrq x i wBase wirq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpa
26. 32 TC DIAG PIO_PISO PRJ gt TC project file P32C32P32A32 TC DIAG PIO_PISO EXE gt I O execution file P32C32P32A32 BC LIB gt P32C32P32A32 BC DEMO gt P32C32P32A32 BC DIAG gt P32C32P32A32 BC LIB PIO H P32C32P32A32 BC LIB PIO C P32C32P32A32 BC LIB BCLIB BAT P32C32P32A32 BC LIB BCPIO_L LIB P32C32P32A32 BC LIB BCPIO_H LIB P32C32P32A32 BC LIB IOPORT_L LIB P32C32P32A32 BC LIB IOPORT_H LIB P32C32P32A32 BC DEMO PIO H P32C32P32A32 BC DEMO DEMO1 C P32C32P32A32 BC DEMO DEMO2 C P32C32P32A32 BC DEMO DEMO3 C P32C32P32A32 BC DEMO DEMO1 PRJ P32C32P32A32 BC DEMO DEMO2 PRJ P32C32P32A32 BC DEMO DEMO3 PRJ P32C32P32A32 BC DEMO DEMO1 EXE P32C32P32A32 BC DEMO DEMO2 EXE P32C32P32A32 BC DEMO DEMO3 EXE P32C32P32A32 BC DIAG PIO H P32C32P32A32 BC DIAG PIO_PISO C gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode gt I O port large mode gt I O port huge mode gt library header file gt demo1 source file gt demo2 source file gt demo3 source file gt BC project1 file gt BC project2 file gt BC project file gt demo1 execution file gt demo2 execution file gt demo3 execution file gt library header file gt I O source code P32C32P32A32 BC DIA
27. 5 Run the PISO C64 DOS Demo1 exe program 6 lt shows how many PISO C64 A64 board s found in the screen 7 Is the number correct 8 It then outputs to the D O channels 9 Does these LED s flash correctly PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 69
28. Detect all PISO P64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x10 for PISO_P64 wRetVal PIO_Driverlnit 8wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P64 Cards in this PC n wBoards Step2 Save resource of all PISO P64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirg amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wirq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card Step3 Control the PISO P64 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D I O operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 24 Find the configure address space of your PISO C64 A64 card Step1 Detect all PISO C64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x00 for PISO_C64 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x50 for PISO_A64 wRetVal PIO_Driverlnit 8 wBoards wSubVendor wSubDevice wSubAux printf There are d PISO C64 Cards in this PC n wBoards Step2 Save resource of all PISO C64 A64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddr
29. G PIO_PISO PRJ gt TC project file P32C32P32A32 BC DIAG PIO_PISO EXE gt I O execution file P32C32P32A32 MSC LIB gt gt for library source code P32C32P32A32 MSC DEMO gt gt demo program source code P32C32P32A32 MSC DIAG gt PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 gt pio_piso auto detect program e P32C32P32A32 MSC LIB PIO H gt library header file e P32C32P32A32 MSC LIB PIO C gt library source file e P32C32P32A32 MSC LIB MSCLIB BAT gt batch compiler file e P32C32P32A32 MSC LIB MSCPIO_L LIB gt I O port large mode e P32C32P32A32 MSC LIB MSCPIO_H LIB gt I O port huge mode e P32C32 P32A32 MSC LIB IOPORT_L LIB gt I O port large mode e P32C32 P32A32 MSC LIB IOPORT_H LIB gt I O port huge mode e 1AP32C32P32A32MSCIDEMOWPIO H gt library header file e P32C32P32A32 MSC DEMO DEMO1 C gt demo1 source file e P32C32P32A32 MSC DEMO DEMO2 C gt demo2 source file e P32C32P32A32 MSC DEMO DEMO3 C gt demo3 source file e 1P32C32P32A32MSCIDEMOWMAKE1 BAT gt demo1 batch file e 1P32C32P32A32MSCIDEMOWMAKE2 BAT gt demo2 batch file e P32C32P32A32 MSC DEMO MAKE3 BAT gt demo3 batch file e P32C32P32A32 MSC DEMO DEMO1 EXE gt demo1 execution file e P32C32P32A32 MSC DEMO DEMO2 EXE gt demo2 execution file e P32C32P32A32 MSC DEMO DEMO3 EXE gt demos execution file e P32C32P32A32 MSC DIAG PIO H gt library header fi
30. NT After executing the utility all detail information for all PIO PISO cards that have been installed in the PC will be shown as follows f PIO PISO series card OxX0001 OxD800 PISO 730 Board Name PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 56 5 5 Demo program for PISO P32C32 P32A32 Demo 1 Digital Output of PISO P32C32 P32A32 gi Step 1 The circuit diagram of hardware refer to Sec 4 1 Step 2 run demo1 EXE lia ES E E SS AE AI O AN MRA Rohe O ig include lt dos h gt include PIO H int main char c BYTE i WORD wBoards wRetVal WORD wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice clrscr wRetVal PIO_Driverlnit 8wBoards 0x80 0x08 0x20 for PISO P32C32 0x80 0x08 0x70 for PISO P32A32 printf n 1 Threr are d PISO P32C32 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P32C32 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp awBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x sublD x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 57 step 1 enable all D I O port
31. OC Viotage Output m ju ys m ju A UN A A m ju Y e Aca A A Im O gt m ju y PE A E AT m ie AVA A oe A A m D m m ie y lo A Lal A N m s N A A m A A 5 Y ACACA y 22 Figure 4 3 2 The circuit diagram of external device 1 for the digital outputs of PISO C64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_31 e Pin 18 37 are voltage signal for DO_0 DO_15 DO_16 DO_31 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 44 Here s the circuit diagram for external device 1 From the CON1 of PISO A64 LY Power Supply ICP DAS Super 2 5 00 V O U U Vlotage Output COM DN 37 1 0 CONNECTOR BLOCK 37 BERR RR RRR RR RRR RRR JODE ME LED 1 KK t lt t LED 2 4 LED 3 Tx R3 LED 4 ey R4 if LED 5 RR d RS e LED 6 aK 4 R6 LED7 R7 KK i LED8 Rg xd A
32. PCI extender 50 pin OPTO 22 header to DB 37 for PCI Bus I O boards ADP 50 PCI extender 50 pin OPTO 22 header to 50 pin header for PCI Bus I O boards PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 5 1 3 PCI Data Acquisition Family We provide a family of PCI BUS data acquisition cards These cards can be divided into three groups as follows 1 PCI series first generation isolated or non isolated cards PCI 1002 1202 1800 1802 1602 multi function family non isolated PCI P16R16 P16C16 P16POR16 P8R8 D I O family isolated PCI TMC12 timer counter card non isolated PIO series cost effective generation non isolated cards PIO 823 821 multi function family PIO D168 D 144 D96 D64 D56 D48 D24 D I O family PIO DA16 DA8 DA4 D A family PISO series cost effective generation isolated cards PISO 813 A D card PISO P32C32 P32A32 P64 C64 A64 D I O family PISO P8R8 P8SSR8AC P8SSR8DC D I O family PISO 730 730A D I O card PISO DA2 Channel to Channel Isolated D A card PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 6 1 4 Product Checklist In addition to this manual the package includes the following items e One PISO P32C32 P32A32 P64 C64 A64 card e One driver diskette or CD ROM e One release note It s recommended to read the release note first All important information will be given in the release note It tells 1 Where you can find the software driver amp utility
33. PISO P32C32 P32A32 I O addresses are mapped as follows RESET control register Same Wbase 2 Aux control register Wbase 5 INT mask control register Same Wbase 7 Aux pin status register Wbase 0x2a INT polarity control register Wbase 0xc0 Read data from DI 0 DI_7 Write data to DO 0 to DO 7 Wbase 0xc4 Read data from DI 8 DI 15 Write data to DO_8 to DO_15 Wbase 0xc8 Read data from DI_16 DI_23 Write data to DO_16 to DO_23 Wbase 0xcc Read data from DI_ 24 DI_31 Write data to DO_24 to DO_31 Note Refer to Sec 3 1 for more information about wBase outportb wBase 0xc0 Val outportb wBase 0xc4 Val outportb wBase 0xc8 Val outportb wBase 0xcc Val a write to D O 0 7 write to D O 8 15 write to D O 16 23 write to D O 24 31 xw as Ha Val inportb wBase 0xc0 read from D 1 0 7 Val inportb wBase 0xc4 read from D I 8 15 Val inportb wBase 0xc8 read from D l 16 23 Val inportb wBase 0xcc read from D l 24 31 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 29 3 4 2 PISO P64 I O Mapping The PISO P64 l O addresses are mapped as follows RESEM control register Same wBase 2 Aux control register WBase 3 Aux data register Wbase 7__ Aux pin status register Wbase 0x2a INT polarity control register Same a EA SAA WBase 0xd0 Read data from DI_32 DI_39 WBase 0xd4 Read data from DI_40 DI_47 WBase 0xd8 Read data fr
34. PISO P32C32 P32A32 P64 C64 A64 User Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assumes no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use not for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 1999 by ICP DAS All rights are reserved Trademark The names used for identification only may be registered trademarks of their respective companies PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 1 Tables of Contents 1 INTRODUCTION 6icccssssccsssscssnsesesesssssedsenvossuseestsnasoasesosnssosdeasasoasssssssesuasesgansssasoonacs cseesssscseosenseseendess 4 1 1 SPECIEICA TON SA ro 4 1 2 ORDER DESCRIPTION lt a iii 5 VA R LT E EEN 5 1 3 PCI DATA ACQUISITION FAMILY csore riirn rara R E E E A TR 6 1 4 PRODUCT CHECK Tai di ia di 7 HARDWARE CONFIGURATION cscssssssscssssssscssssssscssssesesssssesssssesssseesessessesessesseseenessesesness 8 2 1 BOARD LAYOUT tidad di nd ts dd ad A 8 2 2 ISOLATED D T ARCHITEGTURE ic cece cunscesacededpcasnvecussdovese susteectiefussdecupucash a
35. Pin 1 20 are GND signal for DO_32 DO_47 DO_48 DO_63 e Pin 18 37 are voltage signal for DO_32 DO_47 DO_32 DO_63 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 46 Here s the circuit diagram for external device 2 From the CON1 of PISO A64 LY ia 5 00 V U U DN 37 I O CONNECTOR BLOCK 37 Vlotage Output COM n T Power Supply ICP DAS Super 2 Figure 4 3 4 The circuit diagram of external device 1 for the digital outputs of PISO A64 e The resistance of R1 R32 is 330 ohm e LEDs 1 32 are light emitting diodes e Pin 1 20 are GND signal for DO_0 DO_15 DO_16 DO_31 e Pin 18 37 are voltage signal for DO_0 DO_15 DO_16 DO_31 input DC 5V 24 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 47 5 Demo Program There are many demo programs provided on floppy disk or CD ROM After software installation the following driver will be installed into your hard disk 5 1 Program file list for PISO P32C32 P32A32 e AP32C32P32A32TC gt gt for Turbo C 2 xx or above e P32C32P32A32 BC gt gt for Borland C 3 X above e AP32C32P3
36. b wBase 1 enable D 1 O step 2 Digital output from DO_0 to DO_63 Al while 1 printf n n Digital output of PISO C64 for i 1 i lt 0x80 i i lt lt 1 outportb wBase 0xc0 i DO_07 to DO_00 outportb wBase 0xc4 i DO_15 to DO_08 outportb wBase 0xc8 i DO_23 to DO_16 outportb wBase 0xcc i DO_31 to DO_ 24 outportb wBase 0xd0 i DO_39 to DO_ 32 outportb wBase 0xd4 i DO_47 to DO_40 outportb wBase 0xd8 i DO_55 to DO_48 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 65 outporib wBase 0xdc i DO_63 to DO_56 printf nThe CON1 of PISO C64 printf nD31 0 Output Value 02x 02x 02x 02x1n i 1 1 1 printf nThe CON2 of PISO C64 printf nD63 32 Output Value 02x 02x 02x 02xn i 1 1 1 sleep 1 if i Ox80 i 0x01 break if kbhit 0 c getch if c q c 0 c 27 return delay 1 end of while end of for PIO_DriverClose PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 6 Diagnostic Procedures 6 1 PISO P64 Please follow the below steps to finish the test Digital Input Test 1 Power off the PC Refer to the hardware manual section 4 2 wire the D l to external signal s or switch s respectively Install the PISO P64 card into an available PCI slot 5V bus Power on the PC with a bootable flop
37. celi 1 wlrq save all resource of this card PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 21 Find all PISO C64 A64 cards in this PC Step1 Detect all PISO C64 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x00 for PISO C64 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x50 for PISO A64 wRetVal PIO_Driverlnit 8wBoards wSubVendor wSubDevice wSubAux printf Threr are d PISO C64 Cards in this PC n wBoards Step2 save resource of all PISO C64 A64 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp wBase amp wirg amp wlD1 amp wlD2 amp wlD3 amp wlD4 amp wID5 printf nCard_ d wBase x wirq x i wBase wirq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 22 3 1 2 PIO _GetConfigAddressSpace PIO_GetConfigAddressSpace wBoardNo wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice e wBoardNo 0 to N gt totally N 1 boards found by PIO_Drivelnit e wBase gt base address of the board control word e wirq gt allocated IRQ channel number of this board e wSubVendor gt subVendor ID of this board e wSubDevice gt subDevice ID of this board e wSubAux gt subAux ID of this board e wSlotBus gt hardware slot ID1 of this board e
38. da 11 2 3 ISOLATED D O ARCHITECTURE riita E A E a A AEA A ead 13 2 4 DAUGHTER BOARDS oiai e ti ti n 15 LAT DIB Li Bs BEE EEE EEE 15 DADA DNS Bees Bo E ys ease A oe aioe ag Ss ees BEL A 15 DAS DBS ose seo oh vege oes Seabee E A A sess 15 23 PIN ASSIGNMENT OF PISO P32C32 P32A32 ceeccesssecesceecesceceseeeeseeceeeeenceceeeeenaeceereeeneeenee 16 2 6 PIN ASSIGNMENT OF PISO P64 eceessccceseccssceceseceseeeceseeesaeeceseeeceeecseeeeaeeceseesenaeceseeeenaeseee 17 2 7 PIN ASSIGNMENT OF PISO C64 A64 oo eee ceeeceesecesecesceceseeeeneeceeeeeneeceeeeeneecereseaaecereeeneeeeee 18 I O CONTROL REGISTER cssssssssssesssscssesecsessesecnesseseenessesecnessesesnesseseesesseessesessesseseseees 19 3 1 HOW TO FIND THE I O ADDRESSG ssccsseceesecceseceeseeceseeeescecssceeeseecesececsaececeeesaeceseeseneeesees 19 3 1 1 PI OD VIVO ii 20 IAL PIO GetConfigAddress Space iii ai ds la 23 LES SHOW SPIO PISO a 26 3 2 THE ASSIGNMENT OF I O ADDRESS crnina a ER a S E aE 27 3 3 ENABLING VO OPERATION micas neata a sdeoenesaaneonsnsvassoassansasieaessvavsauscnnsispsbsncseen 28 3 4 THEVO ADDRESS MAP u E E ERTE EE E R R EE 28 3 4 1 PISO P32C32 P32A32 I O Mapping sn iissa iEn iE E ET E ea EES 29 34 2 PISO P641 0 Mappin Bci tl a a tias 30 3 4 3 PISO CO4T O Mapping cin atadas 31 S44 RESET Control Register cieta E ind 32 34 AUX Control Register ita 32 9 4 0 AUX Data RE iste na e En ii a eta ee 33 3 47 INT Mask Control Regist
39. er icon rt tientas dape 33 348 AUX AA A NN 33 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 2 4 THE APPLICATIONS OF DIGITAL VO ooccconcccncconononcnnncononinonononononnnnoonnocnronoconononcnoconoconcnnccnos 34 4 1 THEPISO P32 E32 PSZASD e a eaaa a a E EaR R Sa Ea E aa EEA E DRENE 34 4 2 THE EXAMPLE OF PISO P 4 a a RE E A A e ROEE EEES SES 40 4 3 THE EXAMPLE OF PISO C64 A64 coococccccccccocconcconoconoconocnnonononnncnnnnnn vEt EEE E EEE EEE aa nono 43 DEMO PROGRAM scssssssssssssssvsosesssssceveresesessssssesesossecesesssssssesnsosossssssesesesesssssosssesesesosceseseses 48 5 1 PROGRAM FILE LIST FOR PISO oooocccccccconocononnconnconccnnonn neon no E SE on nono nro EEEa corno nera E neon neon nono 48 5 2 PROGRAM FILE FOR PISO POl eera eena e a o EE raas ESE Se a rn neon neon anno nero nono 51 5 3 PROGRAM FILE LIST FOR PIS O C64 iresi oebe capa eest arpei en iee obrei a eraasi sE es eher 53 5 4 DIAGNOSTIC PROGRAM tala tai 55 5 4 1 Diagnostic program for DOS coonocicocinaconanonocnnonnnonnnonanonn sniene canon aE EES 55 5 4 2 Diagnostic program for WINDOWS ccsccssscesscesecesecesecsecacecaeeeseesseeeseeseeeneeeseenaes 56 5 5 DEMO PROGRAM FOR PISO cc ceo cocrosiotododasonessonioloiprosras cnn nio Aerob E bE e Ks e PERRE SSEB ESENE ETVE besoo SE S 57 5 5 1 DEMO for PISO P32C32 P32A3 2 coooocincconocccononconncconnnonnnccnnanonnnncnnnnronnn cono ccoo nn cana nono nncnnes 57 5 9 2 SDEMO2 for PISO P
40. essSpace i 8wBase 8wlrq 8t1 812 813 814 815 printf nCard_ d wBase x wlrq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpaceli 1 wlrq save all resource of this card Step3 Control the PISO C64 A64 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D I O operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 25 3 1 3 Show_PIO_PISO Show_PIO_PISO wSubVendor wSubDevice wSubAux e wSubVendor gt subVendor ID of board you are seeking e wSubDevice gt subDevice ID of board you are seeking e wSubAux gt subAux ID of board you are seeking This function will show a text string for these special sublDs This text string is the same as defined in PIO H The demo program is as follows wRetVal PIO_Driverlnit wBoards Oxff Oxff Oxff find all PIO_PISO series card printf nThere are d PIO_PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice
41. hardware slot ID2 in this PC s slot position The utility program PIO_ PISO EXE will detect amp show all PIO PISO cards installed in this PC Refer to Chapter 5 for more information 3 1 1 PIO _Driverlnit PIO _Driverinit 8 wBoards wSubVendor wSubDevice wSubAux e wBoards 0toN gt Number of boards found in this PC e wSubVendor gt SubVendor ID of board you are seeking e wSubDevice gt SubDevice ID of board you are seeking e wSubAux gt SubAux ID of board to you are seeking This function can detect all PIO PISO series cards with your system Implementations is based on the PCI plug amp play mechanism 1 It will find all PIO PISO series cards installed in this system amp save all their resource in the library Find all PIO PISO cards in this PC Step 1 Detect all PIO PISO series cards in this PC wRetVal PIO_Driverlnit wBoards Oxff Oxff Oxff Find all PIO_PISO printf nThere are d PIO_PISO Cards in this PC wBoards if wBoards 0 exit 0 Step2 Save resources for all PIO ISO cards installed in this PC printf n for i 0 icwBoards i PIO_GetConfigAddressSpace i amp wBase amp wlrq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux PISO P32C32 P32A
42. ith the values mapped to the card s physical slot in the PC This mapping will not be changed for any PIO PISO cards Because this mapping won t change it can be used to identify the specified PIO PISO card as follows Step1 Record all wSlotBus amp wSlotDevice Step2 Use PIO_GetConfigAddressSpace to get the wSlotBus amp wSlotDevice for the specified card Step3 The user can identify the specified PIO PISO card if he compares the two results PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 27 3 3 Enabling I O Operation When the PC is first powered on D I O operations are disabled The enable disable of D I O is controlled by the RESET signal The powered on states are given as follows e All D I O operations are disabled e All D O latch register are clear The user has to initialize before using these D I O parts To do so follow these recommended steps Step 1 Enable all D I O operation Step 2 Read from D I or write to D O Refer to DEMO1 C for demo program 3 4 The I O Address Map PIO PISO series card I O addresses are automatically assigned by the main ROM BIOS of the main board You can also re assign the I O addresses It is strongly recommended to use the assigned I O address The Plug amp Play BIOS will assign the proper I O address to each PIO PISO series card PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 28 3 4 1 PISO P32C32 P32A32 I O Mapping The
43. l PIO_Driverlnit amp wBoards Oxff Oxff Oxff for PIO PISO printf nThrer are d PIO_PISO Cards in this PC wBoards if wBoards 0 exit 0 printf n j for i 0 icwBoards i PIO_GetConfigAddressSpace i amp wBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x subID x x x SlotID x x i wBase wirq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice printf gt ShowPioPiso wSubVendor wSubDevice wSubAux PIO_DriverClose NOTE the PIO_PISO EXE file is valid for all PIO PISO cards Execute PIO_PISO EXE to get the following information e A list all of PIO PISO cards installed in this PC e A list all of resources allocated to every PIO PISO cards e A list of wSlotBus amp wSlotDevice for specified PIO PISO card identification PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 55 5 4 2 Diagnostic program for WINDOWS The software utility PIO_PISO EXE is designed for Windows 95 98 NT For more detailed information about this file please refer to the Readme txt in Windows 95 98 NT development toolkit It is useful for all PIO PISO series cards e Follow these steps to setup the toolkit Step 1 Toolkit Softwares Manuals Step 2 AGREE Step 3 PCI Bus DAQ Card Step 4 PIO_PISO Step 5 Install Toolkits for WINDOWS 98 98 or
44. layout of PISO P64 is as follows 32 Channels O Digital Inpyt O ED aa PISO P64 E 32 Channels LEDI LED2 LED3 LED4 Digital Input aa ja EX EE EE EE q ae J3 J4 PCI BUS Figure 2 1B Board layout of PISO P64 LED 1 power indicator for DI_O to DI_15 LED 2 power indicator for DI_16 to DI_31 LED 3 power indicator for DI_32 to DI_47 LED 4 power indicator for DI_48 to DI_63 3000V isolation 3000V isolation 3000V isolation 3000V isolation J1 select internal external power for DI_O to DI_15 J2 select internal external power for DI_16 to DI_ 31 J3 select internal external power for DI_ 32 to DI_47 J4 select internal external power for DI_48 to DI_63 go oem gaan was ass DH Isolation bank 1 DI_O to DI_15 Power CON1_18 Ground CON1_1 Isolation bank 2 DI_16 to DI_31 Power CON1_ 37 Ground CON1_ 20 Isolation bank 3 DI_32 to DI_47 Power CON2_18 Ground CON2_1 Isolation bank 4 DI_48 to DI_63 Power CON2_37 Ground CON2_20 All four banks are fully isolated from each other The DC DC1 provides the internal power supply for banks 1 amp 2 The DC DC2 provides the internal power supply for banks 3 amp 4 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 9 The board layout of PISO C64 A64 is as follows 32 Channels 32 Channels Digital Output O pet pe PISO C64 pe eae Digital Output LEDI LED2 PISO A64 LED3 LED4 PCI BUS Figure 2 1C Board layout of PISO C64 A64
45. le e P32C32P32A32 MSC DIAG PIO_PSIO C gt I O source code e P32C32P32A32 MSC DIAG PIO BAT gt batch file e P32C32P32A32 MSC DIAG PIO_PISO EXE gt I O execution file PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 50 5 2 Program file for PISO P64 e P64 TC gt e P64 BC gt e P64 MSC gt e P64 TC LIB gt e P64 TC DEMO gt e P64 TC DIAG gt e P64 TC LIB PIO H e P64 TC LIB PIO C e P64 TC LIB TCLIB BAT e P64 TC LIB TCPIO_L LIB e P64 TC LIB TCPIO_H LIB e P64 TC LIB IOPORT_L LIB e P64 TC LIB IOPORT_H LIB e P64 TC DEMO PIO H e P64 TC DEMO DEMO1 C e P64 TC DEMO DEMO1 PRJ e P64 TC DEMO DEMO1 EXE e P64 TC DIAG PIO H e P64 TC DIAG PIO_PISO C e P64 TC DIAG PIO_PISO PRJ e P64 TC DIAG PIO_PISO EXE e P64 BC LIB gt e P64 BC DEMO gt e P64 BC DIAG gt e P64 BC LIB PIO H e P64 BC LIB PIO C e P64 BC LIB BCLIB BAT e P64 BC LIB BCPIO_L LIB e P64 BC LIB BCPIO_H LIB gt for Turbo C 2 xx or above gt for Borland C 3 X above gt for Microsoft C 5 X above gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode gt I O port large mode gt I O port huge mode gt library header
46. om DI_48 DI_55 WBase 0xdc Read data from DI_56 DI_63 Reserved Note Refer to Sec 3 1 for more information about wBase Val inportb wBase 0xc0 read from D l 0 7 Val inportb wBase 0xc4 read from D l 8 15 Val inportb wBase 0xc8 read from D l 16 23 Val inportb wBase 0xcc read from D l 24 31 Val inportb wBase 0xd0 read from D l 32 39 Val inportb wBase 0xd4 read from D l 40 47 Val inportb wBase 0xd8 read from D l 48 55 Val inportb wBase 0xdc read from D l 56 63 Sor ONS PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 30 3 4 3 PISO C64 I O Mapping The PISO C64 A64 I O addresses are mapped as follows Address Reed Write WBase 0__ RESEM control register WBase 2 Aux control register Same wBase 5 INT mask control register Same WBase 7 Aux pin status register Same INT polarity control register Same AA AN A AAA Ww Ww wBase 0xd4 Reserved Write data to DO_40 to DO 47 wBase 0xd8 Reseved Write data to DO 48 to DO_55 wBase 0xdc Reserved WritedatatoDO 56toDO 63 Note Refer to Sec 3 1 for more information about wBase Base 0xd0 Reserved Write data to DO_32toDO_39 outportb wBase 0xc0 Val write to D O 0 7 outportb wBase 0xc4 Val write to D O 8 15 outportb wBase 0xc8 Val write to D O 16 23 outportb wBase 0xcc Val write to D O 24 31 write to D O 32 39 f write to D O 40 47
47. ortb wBase 0xcc 0xff DI_31 to DI_24 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 6l printf nD 31 0 Output Value 02x 02x 02x 02x i 1 1 1 printf nD 31 0 Input Value 02x 02x 02x 02x n j4 j3 j2 1 if i j1 printf nD I O 7 0 error in here n putch 0x07 putch 0x07 putch 0x07 if i j2 printf nD I O 15 8 error in here n putch 0x07 putch 0x07 putch 0x07 if i j3 printf nD I O 24 16 error in here n putch 0x07 putch 0x07 putch 0x07 if i j4 printf nD I O 31 25 error in here n putch 0x07 putch 0x07 putch 0x07 if iz j1 8 i 22 8 i j3 amp i j4 printf The Digital I O test of PISO P32C32 by itself OK n if i Ox80 i 0x01 break if kbhit 0 c getch if c q C Q C 27 return delay 1 end of while y end of for PIO_DriverClose PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 5 6 Demo program for PISO P64 5 6 1 DEMO1 for PISO P64 vhs A Se A De he ee A ES tee fet E et ay Demo 1 Digital Input of PISO P64 Step 1 The circuit diagram of hardware refer to Sec 4 2 Step 2 run demo1 EXE tL rh Fe PEE A BIE RIE RE RA EAA TA PRA REA IRE A SEERA TRE DRAMAS TEA TE E include lt dos h gt include PIO H int main char c BYTE i r1 r2 r3 r4 r5 r6 r7 r8 WORD wBoards wRetVal WORD wBase wlrq wSubVendor wS
48. ource code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode gt I O port large mode gt I O port huge mode gt library header file gt demo source file gt demo batch file gt demo1 execution file gt library header file gt I O source code gt batch file P64 MSC DIAG PIO_PISO EXE gt I O execution file PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 C64A64 TC gt C64A64 BC gt C64A64 MSC gt C64A64 TC LIB gt C64A64 TC DEMO gt C64A64 TC DIAG gt C64A64 TC LIB PIO H C64A64 TC LIB PIO C C64A64 TC LIB TCLIB BAT 5 3 Program file list for PISO C64 gt for Turbo C 2 xx or above gt for Borland C 3 X above gt for Microsoft C 5 X above gt for library source code gt demo program source code gt pio_piso auto detect program gt library header file gt library source file gt batch compiler file C64A64 TC LIB TCPIO_L LIB gt I O port large mode C64A64 TC LIB TCPIO_H LIB gt I O port huge mode C64A64 TC LIB IOPORT_L LIB gt I O port large mode C64A64 TC LIB IOPORT_H LIB gt I O port huge mode C64A64 TC DEMO PIO H C64A64 TC DEMO DEMO1 C C64A64 TC DEMO DEMO1 PRJ C64A64 TC DEMO DEMO1 EXE C64A64 TC DIAG PIO H C64A64 TC DIAG PIO_PISO C
49. ource code e 1C64A64MSCIDIAG gt gt pio_piso auto detect program e C64A64 MSC LIB PIO H e C64A64 MSC LIB PIO C e C64A64 MSC LIB MSCLIB BAT e C64A64 MSC LIB MSCPIO_L LIB e C64A64 MSC LIB MSCPIO_H LIB e C64A64 MSC LIB IOPORT_L LIB e C64A64 MSC LIB IOPORT_H LIB e C64A64 MSC DEMO PIO H e C64A64 MSC DEMO DEMO1 C e C64A64 MSC DEMO MAKE1 BAT e C64A64 MSC DEMO DEMO1 EXE e C64A64 MSC DIAGI PIO H e C64A64 MSC DIAG PIO_PISO C e C64A64 MSC DIAG MAKE1 BAT gt library header file gt library source file gt batch compiler file gt I O port large mode gt I O port huge mode gt I O port large mode gt I O port huge mode gt library header file gt demo1 source file gt demo1 batch file gt demo1 execution file gt library header file gt 1 0 source code gt batch file e C64A64 MSC DIAG PIO_PISO EXE gt I O execution file PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 54 5 4 Diagnostic program Find all PIO_PISO series cards in this PC system Step 1 plug all PIO_PISO cards into PC Step 2 run PIO_PISO EXE 7 hal SEA SA A e AS A DEAE NM LOVE AOL e INO Se OO AO ee e include PIO H WORD wBase wlrq WORD wBase2 wlrq2 int main int i j j1 j2 3 j4 k jj dd j11 j22 j33 j44 WORD wBoards wRetVal WORD wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice char c float ok err clrscr wRetVa
50. py disk or CD with MS DOS Run the PISO P64 DOS Demo1 exe program It shows how many PISO P64 board s found in the screen Is the number correct It then gets status of the D I channels Are these values correct N 00 XDOA0w PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 67 6 2 PISO P32C32 P32A32 Please follow the below steps to finish the test Digital Input and Digital Output Test 1 Power off the PC 2 Refer to the hardware manual section 2 1 select the external power for DI_O to DI_15 and DI_16 to DI_31 3 Refer to the hardware manual Section 2 2 and 2 3 wire the D O to D I respectively Install the PISO P32C32 P32A32 card into an available PCI slot 5V bus Power on the PC with a bootable floppy disk or CD with MS DOS Run the PISO P32C32 DOS Demo3 exe program lt shows how many PISO P32C32 board s found in the screen Is the number correct Does it show the following text in the screen The Digital I O test of PISO P32C32 by itself OK OON Oa Sf PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 68 6 3 PISO C64 A64 Please follow the below steps to finish the test Digital Output Test 1 Power off the PC 2 Refer to the hardware manual section 4 3 wire the D O to LED indicator s respectively 3 Install the PISO C64 A64 card into an available PCI slot 5V bus 4 Power on the PC with a bootable floppy disk or CD with MS DOS
51. signal for DI_16 DI_31 DO_16 DO_ 31 e Pin 18 37 are the voltage signal for DI_16 DI_31 DO_16 DO_ 31 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 37 e Here s the circuit diagram for D l of PISO P32C32 P32A32 From the CON1 of PISO P32C32 P32A32 CE 20 DN 37 I O CONNECTOR BLOCK Figure 4 1 6 The circuit diagram of external device 1 for the D l of PISO P32C32 P32A32 e The D I of CON1 for PISO P32C32 is set to internal power e Pin 19 is the GND signal for DI_O DI_15 e Pin 18 is the voltage signal for DI_0 DI_15 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 38 From the CON2 of PISO P32C32 P32A32 eae Power Supply ICP DAS Super 2 5 00 V POWER CE Vlotage Output COM OFF ON 20 DN 37 I O CONNECTOR BLOCK 37 Figure 4 1 6 The circuit diagram of external device 2 for the D I of PISO P32C32 P32A32 e The D l of CON1 of PISO P32C32 is set to external power e Pin 19 is
52. the GND signal for DI_O DI_ 15 e Pin 18 is the voltage signal for DI_O DI_15 input DC 5V 24V PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 39 4 2 The example of PISO P64 e Here s the circuit diagram of D l for PISO P64 External Device 1 External Device 2 Figure 4 2 1 Digital inputs for PISO P64 e Refer to Figure 4 2 2 for the circuit diagram of external device 1 e Refer to Figure 4 2 3 for the circuit diagram of external device 2 SWITCH ON gt ho na E o O OFF PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 40 Here s the circuit diagram for external device 1 From the CON1 of PISO P64 CE 20 DN 37 I O CONNECTOR BLOCK AWW Od co T 000 a Figure 4 2 2 The circuit diagram of external device 2 for the digital inputs of PISO P64 e The D I of CON1 of PISO P64 is set to internal power PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 41 Here s
53. ubDevice wSubAux wSlotBus wSlotDevice clrscr wRetVal PIO_DriverInit wBoards 0x80 0x08 0x10 for PISO P64 printf n 1 Threr are d PISO P64 Cards in this PC wBoards if wBoards 0 putch 0x07 putch 0x07 putch 0x07 printf n 1 There are no PISO P64 card in this PC exit 0 printf n 2 The Configuration Space gt wBase for i 0 i lt wBoards i PIO_GetConfigAddressSpace i amp awBase amp wirq amp wSubVendor amp wSubDevice amp wSubAux amp wSlotBus amp wSlotDevice printf nCard_ d wBase x wlrq x SubID x x x SlotID x x i wBase wlrq wSubVendor wSubDevice wSubAux wSlotBus wSlotDevice step 1 enable all D I O port outportb wBase 1 enable D I O step 2 Digital input from DI_O to DI_63 while 1 for 53 printf n Digital input of PISO P64 1 r1 inportb wBase 0xc0 DI_07 to DI_O r2 inportb wBase 0xc4 DI_15 to DI_08 r3 inportb wBase 0xc8 DI_23 to DI_16 r4 inportb wBase 0xcc DI_31 to DI_24 r5 inportb wBase 0xd0 DI_39 to DI_32 r6 inportb wBase 0xd4 DIl_47 to DI_40 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 63 r7 inportb wBase 0xd8 DI_55 to DI_48 r8 inportb wBase 0xdc DI_63 to DI_56 printf nThe CON1 of PISO P64 printf nD31 0 Input Value 02x 02x 02x 02xn r4 r3 r2 r1 printf nThe CON2 of PISO P64
54. wSlotDevice gt hardware slot 1D2 of this board The user can use this function to save resources of all PIO PISO cards installed in this system Then the application program can directly control all functions of the PIO PISO series card Find the configure address space for your PISO P32C32 P32A32 card Step1 Detect all PISO P32C32 cards first wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x20 for PISO _P32C32 wSubVendor 0x80 wSubDevice 0x08 wSubAux 0x70 for PISO _P32A32 wRetVal PIO_Driverlnit wBoards wSubVendor wSubDevice wSubAux printf There are d PISO P32C32 Cards in this PC n wBoards Step2 Save resources for all PISO P32C32 P32A32 cards installed in this PC for i 0 i lt wBoards i PIO_GetConfigAddressSpace i awBase amp wlrq amp t1 amp t2 amp t3 amp t4 amp t5 printf nCard_ d wBase x wlrq x i wBase wlrq wConfigSpacel i 0 wBaseAddress save all resource of this card wConfigSpacel i 1 wlrq save all resource of this card Step3 Control the PISO P32C32 P32A32 directly wBase wConfigSpace 0 0 get base address the card_0 outport wBase 1 enable all D I O operation of card_0 wBase wConfigSpace 1 0 get base address the card_1 outport wBase 1 enable all D I O operation of card_1 PISO P32C32 P32A32 P64 C64 A64 User Manual V3 4 Sep 2006 _ 23 Find the configure address space of your PISO P64 card Step1

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