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DT3000 Series User`s Manual

1. eee Re ee ex 72 Contents Analog Input Conversion Modes 73 Continuously Paced Scan Mode 73 Triggered Scan Mode 74 Software Retriggered Scan 74 Externally Retriggered Scan Mode 76 Trigger Sources ess set hear Ares 77 Data Format and Transfer 77 Analog Output Features esses sers 4 4 ed dash e aa eS 78 Analog Output 78 Analog Output Channels 2 222 2 22 2 2 78 Specifying Single Channel 78 Specifying One or More Channels 78 Output Ranges and 2 22 2 2 2 2 79 D A Output Clock Sources sanse krass dts 79 Trigger DOUT ESk nce hte tures eet IA 79 Analog Output Conversion Modes 22 80 Single Value 80 Continuously Paced Operations 80 Da
2. AE ME IEEE o ttt I 96 Triggered Scan Mode teoria nri e een A pasos 96 Contents 26 97 Cliannels 4 nitet e RR REA Ee e Ne baee e ce Re e e eR eod 97 Gain mM 98 eie o tine stu en 98 Resolution bre rey CREE 98 IhermocoupleS ppott ii iiem e ht em e Rd Rn RR e 99 Supportere tue M deca OME 99 TAS it VE PANE a Ue D A Svea ance ae AA 100 Cloruro RI ERR SEA MEA leses SUN RIPE ae gu E 101 Counter Timers er Deda Hr E nep guid e de a ADA 102 Chapter 8 Calibration ee m hm nh 105 Calibrating the A D 2 2 2 2 2 2 2 2 2 2 107 Calibrating the D A 2 2 2 2 2 2 2 2 2 2 2 108 Calibrating the DI730 128 a add fade do ca ds et des 109 Chapter 9 Troubleshooting 111 General Checklist e cer EE ED a eR CE 112 Technical Support i rene sace Maes saved im EE RERO S sie E Ren 115 If Your Board Needs Factory Service 116 Appendix A Specifications 117 Analog Input Specifications 118 A
3. 21 2 1 2 144 Digital iscsi ease a at patna Pe OE I dg 145 Dem PLE 147 Contents 10 About this Manual This manual describes how to set up and install the following components DT3000 Series software DT3000 Series board DT3000 Series device driver DT730 or DT730 T screw terminal panel 5801 or 5B08 signal conditioning backplane 7BP16 1 7BP08 1 or 7 04 1 signal conditioning backplane It describes how to wire signals to the board and how to verify the board s operation using the Quick DataAcq application This manual also describes the features of the DT3001 DT3001 PGL DT3002 DT3003 DT3003 PGL DT3004 and DT3005 boards collectively referred to as the DT3000 Series or 2 Series It describes capabilities of the DT3000 Series Device Driver and how to program the board using DT Open Layers for NET Class Library software Troubleshooting information is also provided Note For information on checking system requirements installing the software and viewing the documentation refer to the README file on the OMNI CD For more information on the class library refer to the DT Open Layers for NET Class Library User s Manual If you are using the DataAcq SDK or software application to program your device refer to the documentation for that software for more information Intended Audience This document is
4. This chapter describes how to wire signals to the D1730 or DT730 T screw terminal panel For information on how to wire signals to the 5B or 7B Series signal conditioning modules refer to the data sheets and user s manuals for the 5B and 7B Series 40 Wiring Signals Before Wiring This section describes wiring recommendations and the pin assignments of the DT730 and DT730 T screw terminal panel Wiring Recommendations Keep the following recommendations in mind when wiring signals to the DT730 or DT730 T screw terminal panel Follow standard ESD procedures when wiring signals to the board Use individually shielded twisted pair wire size 14 to 26 AWG when using the DT3000 Series board in highly noisy electrical environments Separate power and signal lines by using physically different wiring paths or conduits To avoid noise do not locate the DT730 or DT730 T screw terminal panel and cabling next to sources that produce high electromagnetic fields such as large electric motors power lines solenoids and electric arcs unless the signals are enclosed in metal shield Connect the analog shield to screw terminals TB35 TB36 and TB51 through TB56 on the DT730 or DT730 T screw terminal panel Connect the digital shield to the digital ground screw terminals on the screw terminal panel Connect the analog and digital shields to one end only either at the DT730 DT730 T or the signal source When fir
5. 1 q q q 1 o 0 ollo 92 J1 0 0 0 9919 ajjaja HO LI LI LI Li Li LI L 94 0 R99 TB27 0 1 D sesees ooooooooo TB1 TB10 TB16 TB17 TB26 Potentiometer R99 Figure 30 Potentiometer R99 on the DT730 T Screw Terminal Panel Note The available enclosure is highly recommended for the DT730 T screw terminal panel See page 18 for ordering information 109 Chapter 8 110 Troubleshooting General ES o A eee ske E oe qure AAA ce o e eec TOPICS or HERD CEA ene 115 Your Board Needs Factory Service oss ce e eR e 116 111 Chapter 9 112 General Checklist Should you experience problems using DT3000 Series board follow these steps 1 Read all the documentation provided for your product Make sure you have added any Read This First information to your manual and that you have used this information Check the Data Acquisition OMNI CD for any README files and ensure that you have used the latest installation and configuration information available Check that your system meets the requirements stated in the README file on the OMNI CD Check that you have installed your hardware properly using the instructions in Chap
6. 100 gt 1 ms period 100 100 cycle Figure 28 Example of Repetitive One Shot Mode Principles of Operation Interrupts A DT3000 Series board functions as a 5 V 32 bit PCI target device to any master on the PCI bus It supports PCI burst transfers to and from memory space and accesses to configuration memory space A single level sensitive interrupt to the PCI bus master is asserted under any combination of the following conditions The number of A D samples specified by the software has been collected and is waiting to be transferred to the host An A D scan has been completed counter has reached its terminal count A D A event has been completed e The board has detected an error Interrupts are not generated for digital I O operations 91 Chapter 6 92 Supported Device Driver Capabilities Data Plow and Operation IPOD coner nda 95 EMT net 96 Ks es EEE eee nete a inta 96 EE Dacia oe 98 nena 97 on EEE 98 opo EE 98 Thermocouple mest 99 NNN 99 EN EE 100 GE EEE 101 Counter TIMES ak Hie ew eee Pee 102 93 Chapter 7
7. ND Digital Ground 10 Digital Ground 11 RESERVED 12 RESERVED 13 5V OUT 14 5V OUT 15 Digital Ground 16 Digital Ground 17 DIG 10B3 18 DIG 19 DIG 10B2 20 DIG 2 21 DIG 10B1 22 DIG IOA1 23 DIG 10BO 24 DIG 25 Digital Ground 26 Digital Ground 27 35V OUT 134 Connector Pin Assignments Table 34 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 28 15V OUT Not Applicable 29 Analog Common 30 Analog Common 31 DAC1 GND 32 DAC1 OUT 33 DACO GND 34 DACO OUT 35 Amp Low Note Jumper W1 Connects Amp Low to 36 Analog Gnd Analog Gnd 37 AIN63 R32 R64 38 AIN55 AIN31 H 39 AIN62 AIN30 L R31 R63 40 AIN54 AIN30 41 AIN61 AIN29 L R30 R62 42 AIN53 AIN29 H 43 AIN60 AIN28 L R29 R61 44 AIN52 AIN28 H 45 AIN59 AIN27_L R28 R60 46 AIN51 AIN27_H 47 AIN58 AIN26_L R27 R59 48 AIN50 AIN26_H 49 AIN57 AIN25_L R26 R58 50 AIN49 AIN25_H 51 AIN56 AIN24_L R25 R57 52 AIN48 AIN24_H 53 AIN47 AIN23_L R24 R56 54 AIN39 AIN23_H 55 AIN46 AIN22_L R23 R55 56 AIN38 AIN22_H 57 AIN45 AIN21_L R22 R54 58 AIN37 AIN21_H 135 Appendix B Table 34 Screw Terminal Desc
8. 114 Table 21 Troubleshooting Problems cont Symptom Possible Cause Possible Solution System lockup cont Interrupt level is unacceptable Some network devices do not share interrupts If you still have an interrupt conflict try removing the network device installing the DT3000 Series board and rebooting the system then reinserting the network device Calibration routine will not run VxD is missing Ensure that you download the latest version of VDTDAD 386 from our web site www datatranslation com tech Troubleshooting Technical Support If you have difficulty using a DT3000 Series board Data Translation s Technical Support Department is available to provide technical assistance To request technical support go to our web site at http www datatranslation com and click on the Support link When requesting technical support be prepared to provide the following information Your product serial number The hardware software product you need help on The version of the OMNI CD you are using contract number if applicable If you are located outside the USA contact your local distributor see our web site www datatranslation com for the name and telephone number of your nearest distributor 115 Chapter 9 If Your Board Needs Factory Service If your board must be returned to Data Translation do the following 1 Record the board s
9. Number of Ports 2 4 bit ports or 1 8 bit port Inputs Input Type Level Sensitive Logic Sense Positive True Logic Load 1 ABT Load High Level Input Voltage 2 0 V minimum Low Level Input Voltage 0 8 V maximum High Level Input Current 100 yA Low Level Input Current 100 uA Termination None Outputs High Level Output Voltage 2 0 V minimum Low Level Output Voltage 0 55 V maximum High Level Output Current 32 mA maximum Low Level Output Current 64 mA maximum 123 Appendix A User Counter Timer Specifications 124 Table 27 lists the user counter timer specifications for the DT3000 Series boards Table 27 User Counter Timer Specifications Features Specifications Inputs 1 Source 1 Gate High Level Input Voltage 2 0 V minimum Low Level Input Voltage 0 8 V maximum Output Leakage Current 25 maximum Input Load Current 10 yA maximum Output 1 Counter Timer Output High Level Output Voltage 2 0 V minimum Low Level Output Voltage 0 4 V maximum High Level Output Current 15 mA maximum Low Level Output Current 24 mA maximum External Counter Timer Clock Input Type Schmitt Trigger Rising Edge Sensitive Logic Load 1 LSTTL Load Positive Threshold 3 0 V Negative Threshold 1 5V High Level Input Current 25 maximum
10. Select Differential Click Get to acquire a single value from analog input channel 0 The application displays the value on the screen in both text and graphical form Verifying the Operation of a DT3000 Series Board Testing Single Value Analog Output To verify that the board can output a single analog output value do the following 1 g o M Connect an oscilloscope or voltmeter to DACO on the board Refer to page 50 for an example of how to connect analog output signals In the Quick DataAcq application choose Single Analog Output from the Control menu Select the appropriate DT3000 Series board from the Board list box In the Channel list box select analog output channel 0 In the Range list box select the output range of DACO The default is 10 V Enter an output value or use the slider to select value to output from DACO Click Send to output a single value from DACO The application displays the output value on the screen in both text and graphical form 59 Chapter 5 60 Testing Continuous Analog Input To verify that the board can perform continuous analog input operation do the following 1 10 11 12 Connect known voltage sources such as the outputs of a function generator to analog input channels 0 and 1 on the DT3000 Series board using the differential configuration Refer to page 47 for an example of how to connect a differential analog input In the Quick
11. 2 2 2 2 2 2 2 2 24 2 2 27 Inserting the Board into the Computer 28 Loading the Device Drivet side ss oes a e p e n 29 a eer UE kes t bs ud 29 Windows Vista eec e ERA EC EE 29 Windows SU Mh ai A RIA UTE 30 Chapter 3 Attaching and Configuring a Screw Terminal Panel Backplane 31 Using the DT730 or DT730 T Screw Terminal Panel 33 Attaching DT730 or DT730 T Screw Terminal Panel 33 Configuring a 01730 or DT730 T Screw Terminal Panel 34 aS SLA ee ard 34 Configuring Jumper W1 Common Ground Sense 35 Configuring Jumpers W2 and 35 Configuring Jumpers W4 to W7 Analog Outputs on the 5B01 or 7BP16 1 Backplane sensorer SE 35 Resist ii ske SG TR eI MEN 36 Configuring Resistors R1 to R32 Input Bias Return 36 Configuring Resistors to R64 Current Shunt 36 Using 5B and 7B Series Conditioning 37 Attaching a 5B Series Backplane 2 2 37 Attaching a 7B Series Backplane 2 37 Contents Considerations When Using 5B
12. 3 Click Install this driver software anyway The driver files are installed Once the driver is loaded perform the steps in Chapter 3 starting on page 31 to attach and configure the screw terminal panel and signal conditioning backplane 29 Chapter 2 Windows 7 Once you have installed the software from the Data Acquisition OMNI installed DT3000 Series board and powered up the host computer the hardware is found automatically Perform the steps in Chapter 3 starting on page 31 to attach and configure the screw terminal panel and signal conditioning backplane 30 Attaching Configuring Screw Terminal Panel Backplane Using the DT730 or DT730 T Screw Terminal Panel Using 5B and 7B Series Conditioning Chapter 3 32 Install the Board and the Device Driver see Chapter 2 starting on page 23 Attach and Configure the Screw Terminal Panel and Signal Conditioning Backplane this chapter Wire Signals see Chapter 4 starting on page 39 Verify the Operation of the Board see Chapter 5 starting on page 55 Attaching and Configuring Screw Terminal Panel Backplane Using the DT730 or DT730 T Screw Terminal Panel The DT730 and DT730 T screw terminal panels are accessory products that provide convenient screw terminal connections for DT3000 Series boards The DT730 is general purpose screw term
13. The DT3000 Series Device Driver provides support for the analog input A D analog output D A digital input DIN digital output and counter timer C T subsystems Table 7 DT3000 Series Subsystems DT3000 Series D A DIN DOUT C T QUAD Total Subsystems on Board 1 12 20 20 1 0 The DT3002 board does not support subsystems b DIN and DOUT subsystems use the same DIO lines The tables in this chapter summarize the features available for use with the DT Open Layers for NET Class Library and the DT3000 Series boards The DT Open Layers for NET Class Library provides properties that return support information for specified subsystem capabilities The first row in each table lists the subsystem types The first column in each table lists all possible subsystem capabilities A description of each capability is followed by the property used to describe that capability in the DT Open Layers for NET Class Library Note Blank fields represent unsupported options For more information refer to the description of these properties in the DT Open Layers for NET Class Library online help or DT Open Layers for NET Class Library User s Manual 94 Supported Device Driver Capabilities Data Flow and Operation Options Table 8 DT3000 Series Data Flow and Operation Options DT3000 Series A D D A DIN DOUT QUAD Single Value Operation Support Support
14. Inserting the Board into the Computer Once you have set up an expansion slot do the following to insert the DT3000 Series board into the computer 1 Discharge any static electricity by holding the wrapped board in one hand while placing your other hand firmly on metal portion of the computer chassis 2 Carefully remove the antistatic packing material from the board It is recommended that you save the original packing material in the unlikely event that your board requires servicing in the future 3 Hold the board by its edges and do not touch any of the components on the board 4 Position the board so that the cable connectors are facing the rear of the computer as shown in Figure 2 DT3000 Rear of Computer Series Board lt PCI Expansion Slot Bus Connector Figure 2 Inserting the DT3000 Series Board in the Computer 5 Carefully lower the board into the PCI expansion slot using the card guide to properly align the board in the slot 6 When the bottom of the board contacts the bus connector gently press down on the board until it clicks into place CAUTION Do not force the board into place Moving the board from side to side during installation may damage the bus connector If you encounter resistance when inserting the board remove the board and try again 7 Secure the board in place at the rear panel of the system unit using the screw removed from the slot cover 8 Po
15. for powering 7B Series backplanes Enclosure 94 14 110 rugged plastic enclosure from EAI Plastic Enclosures with the following dimensions 7 48 in X 5 43 in X 1 77 in This enclosure is recommended for use with the DT730 T screw terminal panel Higher boxes are available Part number 91 14 111 is an optional aluminum plate for the enclosure You can reach EAI Plastic Enclosures at 708 295 6664 Overview Getting Started Procedure The flow diagram shown in Figure 1 illustrates the steps needed to get started using a DT3000 Series board This diagram is repeated in each getting started chapter the shaded area in the diagram shows you where you are in the getting started procedure K Install the Board and Load the Device Driver see Chapter 2 starting on page 23 Attach and Configure a Screw Terminal Panel Backplane see Chapter 3 starting on page 31 Wire Signals see Chapter 4 starting on page 39 Verify the Operation of the Board see Chapter 5 starting on page 55 Figure 1 Getting Started Flow Diagram 19 Chapter 1 20 Part 1 Getting Started 2 Installing the Board and Loading the Device Driver IE E E ITUR 25 betting up an Expansion SI nevi tee peer pee ee pee acce aes ee eds 27 Inserting the Board into the Computer re iea e e meh beet ina 28 tie Devre ve ae 29 Chapter 2 Install the Board and Load t
16. 2 0 04 N A N A 4 0 04 N A N A 8 0 05 N A N A DT3002 1 0 03 N A N A 2 0 04 N A N A 4 0 04 N A N A 8 0 05 N A N A DT3003 1 0 03 N A N A 2 0 04 N A N A 4 0 04 N A N A 8 0 05 N A N A DT3001 PGL 1 0 03 N A N A 10 0 04 N A N A 100 0 05 N A N A 500 0 10 N A N A DT3003 PGL 1 0 03 N A N A 10 0 04 N A N A 100 0 05 N A N A 500 0 10 N A N A DT3004 1 N A 0 01 N A 2 N A 0 017 N A 4 N A 0 022 N A 8 N A 0 03 N A DT3005 1 N A N A 0 01 2 N A N A 0 017 4 N A N A 0 022 8 N A N A 0 03 Specifications Table 24 Typical Channel Gain Scan Accuracy Scan Source Impedance 100 ohms Model Gain 300 kHz 250 kHz 150 kHz 100 kHz 75 kHz 50 kHz 20 kHz 10 kHz 4 kHz 2 5 kHz DT3001 1 0 08 0 03 2 0 10 0 04 4 0 15 0 04 8 0 20 0 05 DT3002 1 0 10 0 08 N A 0 03 2 0 12 0 09 N A 0 04 4 0 13 0 10 N A 0 04 8 0 14 0 12 N A 0 05 DT3003 1 0 15 0 09 N A 0 03 2 0 17 0 12 N A 0 04 4 0 18 0 14 N A 0 04 8 0 20 0 16 N A 0 05 DT3001 1 0 10 0 03 N A 0 03 Te Mg N A 0 25 N A 0 05 100 N A N A N A N A N A N A 0 05 500 N A N A N A N A N A N A N A 1 00 0 10 DT3003 1 0 15 0 09 N A 0 03 rd ET N A 0 30 N A 0 05 100 N A N A N A N A N A N A 0 10 0 05 500 N A N A N A N A N A N A N A 1 00 0 20 0 10 DT3004 1 N A N A N A N A 0 02 0 01 2 N A N A N A N A 0 27 0 17 4 N A N A N A N A 0 32 0 22 8 N A N
17. Testing Single Value Analog Output acia nce eem eins 59 Testing Continuos Analog Input oce is cee eee 60 Testing Single Value Mie tal 61 Testing Single Value Digital Culpit con eer eem eh temen eee ies 62 Testing Frequency Measurement sese E a ad e he 63 Testing Pulse COUIpUL noe peer A ote Feet end petes 64 55 Chapter 5 Install the Board and Load the Device Driver Mo see Chapter 2 starting on page 23 Attach and Configure the Screw Terminal Panel and Signal Conditioning Backplane see Chapter 3 starting on page 31 Wire Signals see Chapter 4 starting on page 39 Verify the Operation of the Board this chapter You can verify the operation of a DT3000 Series board using the Quick DataAcq application Quick DataAcq allows you to do the following Acquire data from a single analog input channel or digital input port Acquire data continuously from one or more analog input channels using an oscilloscope strip chart or Fast Fourier Transform FFT view Measure the frequency of events Output data from a single analog output channel or digital output port Output pulses either continuously or as a one shot Save input data to disk 56 Verifying the Operation of a DT3000 Series Board Running the Quick DataAcq Application The Quick DataAcq application is installed automatic
18. To DT3000 pk Series board PWR 977 Power Supply To wall outlet Figure 5 Connecting the 5B Series Backplane to the DT730 or DT730 T Screw Terminal Panel To connect a 5B Series signal conditioning backplane to the DT730 or DT730 T screw terminal panel do the following while referring to Figure 5 1 Plug one end of the AC1315 cable into the J2 connector of the DT730 or DT730 T screw terminal panel 2 Plug the other end of the AC1315 cable into the 26 pin connector on the 5B Series backplane 3 Connect power supply PWR 977 to the 5 V and power ground screw terminals on the 5B Series backplane and to the wall outlet Attaching a 7B Series Backplane AC1393 J2 Connector Adapter Cable DT730 or y 7BP16 1 7 08 1 DT730 T 7BP04 1 To DT3000 AC1315 Series board Cable HES14 21 Power Supply To wall outlet Figure 6 Connecting the 7B Series Backplane to the DT730 or DT730 T Screw Terminal Panel 37 Chapter 3 38 To connect a 7B Series signal conditioning backplane to the DT730 or DT730 T screw terminal panel do the following while referring to Figure 6 1 Plug one end of the AC1315 cable into the J2 connector of the DT730 or DT730 T screw terminal panel Plug the other end of the AC1315 cable into the 26 pin connector of the AC1393 adapter cable then attach the 25 pin connector of the AC1393 adapter cable to the 7B Series backplane Connect power supply
19. You must consider this 22 Qresistor if you are matching cable impedance to the far end 145 Appendix C 146 Numerics 5 01 backplane 18 attaching 37 connecting analog outputs 35 considerations when using 38 5B08 backplane 18 attaching 37 considerations when using 38 7BP04 1 backplane 18 attaching 37 considerations when using 38 7BP08 1 backplane 18 attaching 37 considerations when using 38 7BP16 1 backplane 18 attaching 37 connecting analog outputs 35 considerations when using 38 A A D sample clock 71 external 72 internal 72 A D subsystem 69 abrupt stop analog input 73 analog output 81 AC1315 cable 18 37 38 AC1393 adapter cable 38 AC1393 cable 18 accessories 18 aliasing 72 Amp Low 35 analog input channel configuration differential 46 pseudo differential 46 single ended 46 analog input features 69 A D sample clock 71 channel list 70 channels 69 continuous operations 73 conversion modes 73 data format 77 gains 70 Index input ranges 70 resolution 69 single value operations 73 specifications 118 trigger sources 77 79 when not using the DT730 DT730 T 141 analog output features 78 channel list 78 channels 78 connecting to 5BO1 35 connecting to 7BP16 1 35 continuous operations 80 conversion modes 80 D A output clock 79 data format and transfer 81 gains 79 output ranges 79 resolution 78 single value operations 80 specifications 122 when not using the DT730 DT730 T 143 a
20. 102 output ranges 79 outputting pulses continuously 87 one shot 88 repetitive one shot 89 P panel layout 34 physical specifications 127 pin assignments connector J1 132 connector J2 138 ports 82 post trigger acquisition mode 95 power consumption 126 power supply HES14 21 18 PWR 977 18 pseudo differential inputs 46 47 when not using the DT730 DT730 T 141 pulse output duty cycle 85 one shot 88 rate generation 87 repetitive one shot 89 types 85 pulse train output 87 pulse width 85 PWR 977 power supply 18 Q Quick DataAcq 17 continuous analog input operations 60 frequency measurement operations 63 pulse output operations 64 running 57 single value analog input operations 58 single value analog output operations 59 single value digital input operations 61 single value digital output operations 62 quickDAQ 17 R ranges analog input 70 analog output 79 number of 98 rate generation 102 repetitive one shot mode 89 repetitive one shot pulse output 102 resistors R1 to R32 36 R33 to R64 36 resolution analog input 69 analog output 78 availalble 98 digital I O 82 151 Index 152 number of 98 programmable 98 retrigger clock 74 frequency 74 retrigger clock frequency 96 retriggered scan mode externally 76 soiftware 74 returning boards to the factory 116 rising edge gate 85 RMA 116 running the Quick DataAcq application 57 5 sample clock external A D 72 internal A D 72 sample rate
21. 29 Windows XP loading the device driver 29 wiring recommendations 41 when using your own screw terminal panel 141 wiring signals analog output signals 50 current loop analog inputs 49 differential analog inputs 47 digital I O signals 51 event counting applications 52 frequency measurement applications 53 pseudo differential analog inputs 47 pulse output applications 53 single ended analog inputs 46 writing programs in C C 17 Visual Basic 17 Visual Basic NET 17 Visual C 17 Visual C 17 153 Index 154
22. DataAcq application choose Scope from the Acquisition menu Select the appropriate DT3000 Series board from the Board list box In the Sec Div list box select the number of seconds per division 1 to 00001 for the display In the Channels list box select analog input channel 1 and then click Add to add the channel to the channel list Channel 0 is automatically added to the channel list Click Config from the Toolbar From the Config menu select ChannelType and then select Differential From the Config menu select Range and then select Bipolar or Unipolar depending on the configuration of your board The default is Bipolar From the Scope view double click the input range of the channel to change the input range of the board 10 V 5 V 2 5 V 1 25 V for bipolar ranges 0 to 10 V 0 to 5 V 0 to 2 5 V or 0 to 1 25 V for unipolar ranges The default is 10 V Note that the display changes to reflect the selected range for all the analog input channels on the board In the Trigger box select Auto to acquire data continuously from the specified channels or Manual to acquire a burst of data from the specified channels Click Start from the Toolbar to start the continuous analog input operation The application displays the values acquired from each channel in a unique color on the oscilloscope View Click Stop from the Toolbar to stop the operation Verifying the Operation of a DT3000 Series Board Testing
23. HES14 21 to V A and screw terminals on the 7B Series backplane and to the wall outlet Considerations When Using 5B or 7B Series Accessories When using the DT730 or DT730 T screw terminal panel with 5B or 7B Series signal conditioning accessories keep the following considerations in mind Configure your DT3000 Series board to use single ended mode You must remove jumper W1 on the DT730 or DT730 T screw terminal panel as described on page 35 If you are using a 5B Series backplane you must also install jumper W3 on the 5B Series backplane to connect Amp Low to Analog Ground The 5808 and 7 08 1 map to single ended analog input channels 0 to 7 and 7BP04 1 maps to single ended analog input channels 0 to 3 If you are using a signal conditioning module for an analog input channel ensure that you connect the analog input signal to the module on the signal conditioning backplane For channels that do not use signal conditioning connect the analog input signals to the DT730 or DT730 T screw terminal panel By default the 5B01 and 7BP16 1 backplanes map to single ended analog input channels 0 to 15 However by configuring jumpers W4 to W7 on the DT730 or DT730 T as described on page 35 you can use channels 14 and 15 on the 5801 or 7BP16 1 backplane as analog output channels 0 and 1 Note You cannot use analog output modules on 5808 7BP08 1 or 7BP04 1 backplane 5B thermocouple modules provide their own C
24. Inputs Differential inputs offer the maximum noise rejection at the expense of half your total channel count For the best results shielded twisted pairs are a must The shield must connect at one end so that ground currents do not travel over the shield In low level voltage applications differential inputs reduce problems not only due to electrostatic and magnetic noise but due to cross talk and thermal errors One problem to consider with differential inputs is the bias current error The differential impedance is usually hundreds of megaohms With a very small bias current multiplied by this high input impedance the voltage produced is out of the common mode input range of the instrumentation amplifier You must provide an external resistor to return this bias current to the analog common of the data acquisition board This resistor is typically in the order of 1 kQto 100 kQfrom input low side to analog common Alternatively you can return the external common through 10 to 100 kQresistor to analog common it cannot be 0 Qdue to ground currents 142 Using Your Own Screw Terminal Panel Analog Outputs The analog output channels on DT3000 Series boards have a resolution of 12 bits even though the accuracy may be less Data Translation ensures that the analog outputs do not break into a high frequency oscillation with high capacitance loads that occur with long cables Typically the analog outputs drive 1 000 pF with
25. Low Level Input Current 0 25 mA maximum Minimum Pulse Width High 40 ns Low 40 ns Maximum Frequency 10 MHz Termination 22 kQ pullup to 5 V Specifications External Trigger Specifications Table 28 lists the external trigger specifications for the DT3000 Series boards Table 28 External Trigger Specifications Features Specifications Input Type Edge Sensitive Selectable Logic Load 1 ABT Load High Level Input Voltage 2 0 V minimum Low Level Input Voltage 0 8 V maximum High Level Input Current 100 yA Low Level Input Current 100 uA Minimum Pulse Width High 500 ns Low 500 ns Termination 22 KQ pullup to 5 V 125 Appendix A Power Consumption Table 29 lists the power specifications for the DT3000 Series boards Table 29 Power Specifications Feature Specifications 5 V 0 25 V 1 5 maximum 12 V not applicable 42V not applicable 126 Specifications Physical Specifications Table 30 lists the physical specifications for the DT3000 Series boards Table 30 Physical Specifications Feature Specifications Dimensions 4 2 in L x 9 15 W x 0 5 in D Weight 5 6 2 159 9 Operating Temperature Range 0 C to 70 C Storage Temperature Range 25 C to 85 Relative Humidity To 95 noncondensing 127 Appendix A 128 DT730 and DT73
26. and D A subsystems as well as several user counter timer features This section describes the following user counter timer features Counter timer channels C T clock sources Gate types Pulse types and duty cycles Counter timer operation modes Counter Timer Channels DT3000 Series boards support one 16 bit user counter timer channel called counter 0 Counter 0 corresponds to C T subsystem element 0 The counter accepts a clock input signal and gate input signal and outputs a clock output signal also called a pulse output signal as shown in Figure 22 Clock Input Signal internal external or gt Counter Pulse Output Signal internally cascaded Gate Input Signal software or external input Figure 22 Counter Timer Channel C T Clock Sources The following clock sources are available for the user counters Internal C T clock External C T clock Refer to the following subsections for more information on these clock sources 83 Chapter 6 84 Internal C T Clock The internal C T clock is 16 bit clock with 4 bit prescaler it uses 10 MHz time base The prescaler effectively extends the counter to 20 bits Counter timer operations start on the rising edge of the clock input signal Through software specify the clock source as internal and the frequency at which to pace the counter timer operation this is the frequenc
27. as how they interact with each other This appendix describes additional considerations to keep in mind when designing your own screw terminal panel for use with a DT3000 Series board Refer to Appendix B for connector and cable specifications 140 Using Your Own Screw Terminal Panel Analog Inputs DT3000 Series boards have three different types of analog input configurations that you can Single ended Pseudo differential Differential This section describes wiring considerations for these analog input configurations Single Ended Inputs With single ended inputs you have the maximum number of inputs but the worst case noise immunity without external signal conditioning The major problem with this configuration it that you need common ground between the external inputs and the data acquisition board Even with conditioning you must consider the cable length and how the cable is routed If the cable is over 3 feet you must consider the ringing and cross talk in the cable A typical cable has 30 pF per foot of capacitance If the source impedance is 1 000 Qand the cable is 3 feet then the cross talk based on the source impedance is 1 000 30 pF x 3 ft 90 ns This seems negligible but when you consider that it requires nine time constants to settle within 0 01 the cross talk becomes almost 10 of the settling time when switching channels at 100 kHz In addition coupling must be considered
28. ended pseudo differential and differential voltage inputs as well as current loop inputs to the DT730 or DT730 T screw terminal panel Connecting Single Ended Voltage Inputs Figure 7 shows how to connect single ended voltage inputs channels 0 1 and 8 in this case to the DT730 and DT730 T screw terminal panel Jumper W 6 YESA Installed CN Analog In 0 wi i TB35 NE Analog In 8 Analog In 1 Signal Source 7 D D TB98 100 bid DT7300r DT730 T Analog Ground Panel Figure 7 Connecting Single Ended Voltage Inputs Shown for Channels 0 1 and 8 46 Wiring Signals Connecting Pseudo Differential Voltage Inputs Figure 8 shows how to connect pseudo differential voltage inputs channels 0 1 and 8 in this case to the DT730 or DT730 T screw terminal panel Signal Source Analog Ground TB36 Fang Analog In 0 nalog In 2 Analog In 8 7899 Andoa nA DT730 nalog In D r D DT730 T D Panel Vin 1 x Remove Jumper W1 to use Low as remote ground sense Make this connection as close to Viy sources as possible to reduce ground loop errors Vom is the common mode voltage for all 64 analog inputs Figure 8 Connecting Pseudo Differential Voltage Inputs Shown for Chann
29. example of using an input bias return resistor Configuring Resistors R33 to R64 Current Shunt In single ended mode inputs share a common return path Single ended connections should be restricted to applications with high level voltage inputs and short lead lengths Current shunt resistors R33 to R64 connect the high side of analog input channels 0 to 31 to the low side of each input Resistor R33 corresponds to analog input channel 0 resistor R64 corresponds to analog input channel 31 Current shunt resistors typically convert 4 to 20 mA to 1 to 5 V for A D conversion Note that depending on your application a bias current return resistor may also be required in addition to the current shunt resistor The typical current shunt resistor value is 250 Q If for example you add a 250 Qresistor to location R33 and connect a 4 to 20 mA current loop input to channel 0 the input range for channel 0 is converted to 1 to 5 V Refer to page 49 for an example of using a current shunt resistor 36 Attaching and Configuring Screw Terminal Panel Backplane Using 5B and 7B Series Conditioning Backplanes This section describes how to attach 5B or 7B Series signal conditioning backplane to DT730 or DT730 T screw terminal panel and considerations when using signal conditioning accessories with DT3000 Series boards Attaching a 5B Series Backplane J2 Connector y DT730 or DT730 T 5B01 or 5B08
30. following documents for more information on using the DT3000 Series board Measure Foundry Manual UM 19298 and online help These documents describe how to use Measure Foundry to build drag and drop test and measurement applications for Data Translation data acquisition devices DT Open Layers for NET User s Manual UM 22161 For programmers who are developing their own application programs using Visual C or Visual Basic NET this manual describes how to use the DT Open Layers for NET Class Library to access the capabilities of Data Translation data acquisition devices About this Manual DataAcq SDK User s Manual UM 18326 For programmers who are developing their own application programs using the Microsoft C compiler this manual describes how to use the DT Open Layers Data Acq SDK to access the capabilities of Data Translation data acquisition boards This manual is provided on the Data Acquisition OMNI CD DTx EZ Getting Started Manual UM 15428 This manual describes how to use the ActiveX controls provided in DTx EZ to access the capabilities of Data Translation data acquisition boards in Microsoft Visual Basic or Visual C LV Link Online Help This help file describes how to use LV Link with the LabVIEW graphical programming language to access the capabilities of Data Translation data acquisition devices PCI Specification PCI Local Bus Specification PCI Special Interest Group Por
31. intended for engineers scientists technicians or others responsible for using and or programming the DT3000 Series boards for data acquisition operations in Microsoft Windows XP Windows Vista or Windows 7 It is assumed that you have some familiarity with data acquisition principles and that you understand your application How this Manual is Organized This manual is organized as follows Chapter 1 Overview describes the major features of the boards as well as the supported software and accessories for the boards and provides an overview of the DT3000 Series getting started procedure Chapter 2 Installing the Board and Loading the Device Driver describes how to install the DT3000 Series board and load the DT3000 Series device driver 11 About this Manual Chapter 3 Attaching and Configuring a Screw Terminal Panel Backplane describes how to attach DT730 or DT730 T screw terminal panel to DT3000 Series board how to attach 5B or 7B Series conditioning backplanes and how to configure these accessories for use with DT3000 Series board Chapter 4 Wiring Signals describes how to wire signals to DT3000 Series board using the DT730 screw terminal panel Chapter 5 Verifying the Operation of a DT3000 Series Board describes how to verify the operation of a DT3000 Series board with the Quick DataAcq application Chapter 6 Principles of Operation describes all of the
32. of this NET application is included on the Data Acquisition OMNI CD quickDAQ lets you acquire analog data from all devices supported by DT Open Layers for NET software at high speed plot it during acquisition analyze it and or save it to disk for later analysis Measure Foundry An evaluation version of this software is included on the Data Acquisition OMNI CD Measure Foundry is drag and drop test and measurement application builder designed to give you top performance with ease of use development Order the full development version of this software package to develop your own application using real hardware DT Open Layers for NET Class Library Use this class library if you want to use Visual or Visual Basic for NET to develop your own application software for DT3000 Series board using Visual Studio 2003 or Visual Studio 2005 the class library complies with the DT Open Layers standard DataAcq SDK Use the Data Acq SDK if you want to use Visual Studio 6 0 and Microsoft C or C to develop your own application software for a DT3000 Series board using Windows XP Windows Vista or Windows 7 the DataAcq SDK complies with the DT Open Layers standard DTx EZ DTx EZ provides ActiveX controls which allow you to access the capabilities of the DT3000 Series boards using Microsoft Visual Basic or Visual C DTx EZ complies with the DT Open Layers standard DAQ Adaptor for MATLAB Data Translation s DAQ Adaptor provides an int
33. output channels The following subsections describe how to specify the channels Specifying Single Channel The simplest way to output data to a single analog output channel is to specify the channel for a single value analog output operation using software refer to page 80 for more information on single value operations Specifying One or More Channels You can specify one or both analog output channels in the analog output channel list either starting with DACO or with DACI Values are output simultaneously to the entries in the channel list 78 Principles of Operation Output Ranges and Gains Each DAC on the DT3000 Series board can output bipolar analog output signals in the range of 10 V Through software specify the range for the entire analog output subsystem as 10 V to 10 V and the gain for each DAC as 1 If you are using single value operation specify gain of 1 refer to page 80 for more information on single value operations If you are using an analog output channel list the subsystem defaults to gain of 1 for each channel therefore you do not have to specify the gain D A Output Clock Sources DT3000 Series boards except the DT3002 provide an internal D A output clock for pacing analog output operations The internal D A output clock uses the 16 bit D A counter with 4 bit prescaler on the board this clock uses a 10 MHz time base Conversions start on the falling edge of the counter
34. output voltage signal channel 0 in this case to the DT730 screw terminal panel Load Analog Output 0 Analog Output 0 Ground TB34 TB33 oooooooooo DT730 or DT730 T Panel Figure 12 Connecting Analog Output Voltages Shown for Channel 0 50 Wiring Signals Connecting Digital Signals Figure 13 shows how to connect a digital input signal channels 0 and 1 of digital port A in this case to the DT730 or DT730 T screw terminal panel W N N Y 50000000 a R Digital 1 O Port A Line 1 Digital Port Line 0 Digital Ground E DT730 or DT730 T Panel Figure 13 Connecting Digital Inputs Channels 0 and 1 Port A Shown Figure 14 shows how to connect a digital output signal channel 0 of digital port 1 in this case to the DT730 or DT730 T screw terminal panel 0 Out LED On O Digital Bank B Line 0 3 TB23 500 2 s a Digital Ground 2 TB25 DT730 or DT730 T Panel Figure 14 Connecting Digital Outputs Channel 0 Port 1 Shown 51 Chapter 4 Connecting Counter Timer Signals The DT3000 Series board DT730 screw terminal panel provide one user counter timer channel that you can use for the following operations Event counting Frequency measurement Pulse output rate generation one shot an
35. serial number and then contact the Customer Service Department at 508 481 3700 ext 1323 if you are in the USA and obtain Return Material Authorization RMA If you are located outside the USA call your local distributor for authorization and shipping instructions see our web site www datatranslation com for the name and telephone number of your nearest distributor All return shipments to Data Translation must be marked with the correct RMA number to ensure proper processing 2 Using the original packing materials if available package the module as follows Wrap the board in an electrically conductive plastic material Handle with ground protection A static discharge can destroy components on the module Place in a secure shipping container 3 Return the board to the following address making sure the RMA number is visible on the outside of the box Customer Service Dept Data Translation Inc 100 Locke Drive Marlboro MA 01752 1192 116 Specifications Analog Input bpecification amp csse seeker e epi i ee eee e e s hele 118 Analog Output pel beer e DER HC RA IH Chee ded 122 Digital D C Spscificalons id eed stes e HERE C A VERE dr da 123 User Counter Timer Specifications 124 termal Teger DpectHioatlong savnes id Pet e e e dtt Se ees 125 Power t ons HOD x eco t estere I EGER ee eye eye ey dee Y 126 Phy
36. source as an external positive digital TTL trigger for a rising edge external trigger or an external negative digital TTL trigger for a falling edge external trigger Note The external digital trigger is also used to trigger analog output operations Data Format and Transfer DT3001 DT3001 PGL DT3002 DT3003 and DT3003 PGL boards use offset binary data encoding to represent bipolar signals DT3004 and DT3005 boards use twos complement data encoding to represent bipolar signals Use software to specify the data encoding type The board is mapped into memory space to allow the use of the multiple read bus instruction The data transfer starts when user defined number of samples has accumulated The accumulated sample data is stored in an onboard circular buffer which is accessible for read operations by the host computer An interrupt is sent to host computer notifying it with message indicating that sample data is ready to be read The host computer then commands the PCI bus master to transfer the sampled data from the onboard buffer to its destination in memory Digital samples are received from 12 bit A D section and are sign extended to 16 bits The DT3000 Series Device Driver accesses the onboard circular buffer to fill user buffers that you allocate in software It is recommended that you allocate minimum of two buffers for analog input operations and add them to the subsystem queue using software Data is w
37. until you stop the operation refer to page 77 for more information on buffers The sample rate is determined by the frequency of the A D sample clock divided by the number of entries in the channel list refer to page 71 for more information on the A D sample clock The conversion rate of each scan is determined by the frequency of the 16 bit A D Trigger Clock with 4 bit prescaler on the board it uses a 10 MHz timebase Using software specify the frequency of the software retrigger The minimum retrigger frequency is 9 54 Hz The maximum retrigger frequency varies depending on the board type as shown in Table 6 Table 6 Maximum Retrigger Frequency Single Channel Multiple Channel Board Retrigger Frequency Retrigger Frequency DT3001 330 kHz 250 kHz DT3001 PGL 330 kHz 250 kHz DT3002 330 kHz 100 kHz Principles of Operation Table 6 Maximum Retrigger Frequency cont Single Channel Multiple Channel Board Retrigger Frequency Retrigger Frequency DT3003 330 kHz 100 kHz DT3003 PGL 330 kHz 100 kHz DT3004 100 kHz 50 kHz DT3005 200 kHz 100 kHz a Unless otherwise indicated these rates assume a gain of 1 b Using a gain of 100 the maximum frequency is 20 kHz using a gain of 500 the maximum frequency is 4 kHz c Using a gain of 100 the maximum frequency is 10 kHz using a gain of 500 the maximum frequency is 2 5 kHz Note For proper operation ensure t
38. use Bank B as an output port port 1 lines 0 to 3 of Bank B are configured as outputs Digital input signals are TTL compatible Digital outputs are TTL compatible signals capable of sinking at least 10 mA each All digital I O signals are configured as inputs on power up Use software to specify the configuration of the digital I O lines as differential Digital I O Resolution Using software specify the number of banks to read by specifying the resolution as 4 for four lines or 8 for eight lines If you specify a resolution of 4 two digital I O subsystems are available Element 0 the first subsystem corresponds to the Bank A lines 0 to 3 Element 1 the second subsystem corresponds to Bank B lines 0 to 3 If you specify a resolution of 8 one subsystem element 0 is available Note When the resolution is 8 digital I O lines 0 to 3 of Bank are represented as bits 4 to 7 of the digital value Digital I O Operation Modes DT3000 Series boards support single value digital I O operations only When you start a single value digital I O operation data is read from or written to the digital I O lines For a single value operation you cannot specify a clock or trigger source Single value operations stop automatically when finished you cannot stop a single value Operation 82 Principles of Operation Counter Timer Features The counter timer circuitry on the board provides clocking circuitry used by the A D
39. 0 T Specifications Table 31 lists the specifications for the DT730 screw terminal panel Table 31 DT730 and DT730 T Specifications Feature Specification Current Loop Resistor value Resistor tolerance Resistor power dissipation Resistor temperature coefficient 250 0 to 20 mA current range 0 02 or better 1 4 W minimum 15 ppm C or better Temperature Accuracy DT730 T only Temperature range Initial accuracy Accuracy Output voltage Bias current 0 to 55 C 32 F to 131 F 1 25 C factory set 1 C 0 to 55 C 0 5 mV C 12 5 mV 25 C 250 nA 10 M to 2 5 V Operating and Storage Temperature Relative humidity 25 to 85 C up to 95 noncondensing Power 15 Volts Pin 28 35 Volts Pin 27 3 mA maximum Physical Overall size of PC board Enclosure dimensions Weight Screw terminals J1 connector J2 connector Acceptable wire size Mounting 0 9 in H x 4 9 in W x 6 9 in L 1 90 cm x 12 70 cm x 22 86 cm 7 48 in X 5 43 in X 1 77 in 7 oz 198 g 100 Screw Clamp Connections 100 pin 50 mil spacing AMP 1 104069 7 Amp 26 pin connector AMP 104341 6 14 to 22 AWG via four 4 40 screws Specifications EP291 Cable Specifications Table 32 lists the specifications for the EP291 cable Table 32 EP291 Cable Specifications Feature Specification Length 1 meter Conductors 100 S
40. 2 20 DIG 2 21 DIG 1 22 DIG IOA1 23 DIG IOBO 24 DIG 25 Digital Ground 26 Digital Ground 27 35V OUT 42 Wiring Signals Table 2 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 28 15V OUT Not Applicable 29 Analog Common 30 Analog Common 31 DAC1 GND 32 DAC1 OUT 33 DACO GND 34 DACO OUT 35 Amp Low Note Jumper W1 Connects Amp Low to Analog Gnd 36 Analog Gnd 37 AIN63 R32 R64 38 AIN55 AIN31 H 39 AIN62 AIN30 L R31 R63 40 AIN54 AIN30 H 41 AIN61 AIN29 L R30 R62 42 AIN53 AIN29 H 43 AIN60 AIN28 L R29 R61 44 AIN52 AIN28 H 45 AIN59 AIN27_L R28 R60 46 AIN51 AIN27_H 47 AIN58 AIN26_L R27 R59 48 AIN50 AIN26_H 49 AIN57 AIN25_L R26 R58 50 AIN49 AIN25_H 51 AIN56 AIN24_L R25 R57 52 AIN48 AIN24_H 53 AIN47 AIN23_L R24 R56 54 AIN39 AIN23_H 55 AIN46 AIN22_L R23 R55 56 AIN38 AIN22_H 57 AIN45 AIN21_L R22 R54 58 AIN37 AIN21_H 43 Chapter 4 Table 2 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Retur
41. 25 Chapter 2 26 Setting up the Computer CAUTION To prevent electrostatic damage that can occur when handling electronic equipment use ground strap or similar device when performing this installation procedure To set up the computer do the following 1 RR SN Install the software from the Data Acquisition OMNI CD or Data Translation web site Note If you are using Windows 7 you must install the device driver before installing the board in the computer Turn off the computer Turn off all peripherals printer modem monitor and so on connected to the computer Unplug the computer and all peripherals Remove the cover from you computer Refer to your computer s user manual for instructions Installing the Board and Loading the Device Driver Setting up an Expansion Slot Once you have set up the computer set up an expansion slot by doing the following 1 Select a 32 bit or 64 bit PCI expansion slot PCI slots are shorter than ISA or EISA slots and are usually white or ivory Commonly three PCI slots one of which may be shared ISA PCI slot are available If an ISA board exists in the shared slot you cannot use the slot for a PCI board if a PCI board exists in the shared slot you cannot use the slot for an ISA board 2 Remove the cover plate from the selected expansion slot Retain the screw that held it in place you will use it later to install the board 27 Chapter 2
42. 5801 and 7BP16 1 signal conditioning backplanes The following subsections describe these jumpers Note The screw terminal panels were initially shipped with enough jumper plugs to select every possible configuration Spare jumper plugs are stored on the panel itself the posts marked spare Save these jumper plugs for future use 34 Attaching and Configuring Screw Terminal Panel Backplane Configuring Jumper W1 Common Ground Sense Jumper W1 is installed when the board is shipped from the factory This jumper connects Amp Low TB35 to Analog Ground TB36 on the screw terminal panel Amp Low is connected to the low side of the board s input amplifier When connecting pseudo differential analog inputs directly to the screw terminal panel remove jumper W1 and connect Amp Low to remote common mode voltage to reject offset voltages common to all 64 input channels Refer to page 46 for an example of using jumper WI Note If you are using 5B Series backplane install jumper W3 on backplane to connect Amp Low to Analog Ground on the backplane Configuring Jumpers W2 and W3 CJC The DT730 T screw terminal panel is provided for thermocouple connections and includes CJC circuit for measuring temperature at the connector blocks on the screw terminal panel Power is derived from Vcc on the DT3000 Series board Installing jumpers W2 and W3 connects the CJC circuit to channel 0 Jumper W2 connects the t
43. 73 scan mode externally retriggered 76 software retriggered 74 screw terminal panel 18 33 SDK 17 selecting an expansion slot 27 service and support procedure 115 setting up the computer 25 single buffer wrap mode 96 single ended channels 97 number of 97 single ended inputs 46 when not using the DT730 DT730 T 141 single value operations 95 analog input 73 analog output 80 digital I O 82 slot selection 27 software packages 17 software supported 17 software trigger 100 analog input 77 analog output 79 software retriggered scan mode 74 specifications analog input 118 analog output 122 digital I O 123 DT730 and DT730 T 128 EP291 129 external trigger 125 physical 127 power 126 user counter timer 124 specifying a single channel analog input 70 analog output 78 digital I O 82 specifying one or more channels analog input 70 analog output 78 stopping an operation analog input 73 analog output 81 subsystem descriptions A D 69 C T 83 D A 78 DIN and DOUT 82 supported thermocouple types 99 SupportedGains 98 SupportedResolutions 98 Supported VoltageRanges 98 SupportsBinaryEncoding 97 SupportsBuffering 96 SupportsCjcSourceChannel 99 SupportsContinuous 95 SupportsCount 102 SupportsDifferential 97 SupportsExternalClock 101 SupportsGateHighEdge 102 SupportsGateHighLevel 102 SupportsGateLowEdge 102 SupportsGateLowLevel 102 SupportsGateNone 102 SupportsHighToLowPulse 102 SupportsInProcessFlush 96 S
44. 77 ANIN27 Analog In 27 19 Return 76 ANIN20 Analog In 20 75 ANIN28 Analog In 28 20 Return 74 ANIN21 Analog In 21 73 ANIN29 Analog In 29 21 Return 72 ANIN22 Analog In 22 71 ANIN30 Analog In 30 22 Return 70 ANIN23 Analog In 23 69 ANIN31 Analog In 31 23 Return 68 ANIN32 Analog In 32 67 ANIN40 Analog In 40 32 Return 66 ANIN33 Analog In 33 65 ANIN41 Analog In 41 33 Return 64 ANIN34 Analog In 34 63 ANIN42 Analog In 42 34 Return 62 ANIN35 Analog In 35 61 ANIN43 Analog In 43 35 Return 60 ANIN36 Analog In 36 59 ANIN44 Analog In 44 36 Return 58 ANIN37 Analog In 37 57 ANIN45 Analog In 45 37 Return 56 ANIN38 Analog In 38 55 ANIN46 Analog In 46 38 Return 54 ANIN39 Analog In 39 53 ANIN47 Analog In 47 39 Return 52 ANIN48 Analog In 48 51 ANIN56 Analog In 56 48 Return 50 ANIN49 Analog In 49 49 ANIN57 Analog In 57 49 Return 48 ANIN50 Analog In 50 47 ANIN58 Analog In 58 50 Return 132 Connector Pin Assignments Table 33 Connector J1 Pin Assignments cont Signal Signal Pin Name Description Pin Name Description 46 ANIN51 Analog In 51 45 ANIN59 Analog In 59 51 Return 44 ANIN52 Analog In 52 43 ANIN60 Analog In 60 52 Return 42 ANIN53 Analog In 53 41 ANIN61 Analog In 61 53 Return 40 ANIN54 Analog In 54 39 ANIN62 Analog In 62 54 Return 38 ANIN55 Analog In 55 37 ANIN63 Analog In 63 55 Return 36 AGND Analog Ground 35 AMPLO Amp Low 34 ANOO Analog Output 0 33 ANOO Analog Output 0 R
45. 8 of connector J1 on the DT3000 Series board Conversions start on the falling edge of the external A D sample clock input signal Using software specify the clock source as external The clock frequency is always equal to the frequency of the external A D sample clock input signal that you connect to the board through the screw terminal panel Principles of Operation Analog Input Conversion Modes DT3000 Series boards support the following conversion modes Single value operations are simplest to use but offer the least flexibility and efficiency Use software to specify the range gain and analog input channel among other parameters acquire the data from that channel and convert the result The data is returned immediately For a single value operation you cannot specify a clock source trigger source trigger acquisition mode scan mode or buffer Single value operations stop automatically when finished you cannot stop single value operation Scan mode takes full advantage of the capabilities of DT3000 Series boards In scan you can specify a channel list clock source trigger source scan mode and buffer Two scan modes are supported continuously paced scan mode and triggered scan mode These modes are described in the following subsections Using software you can stop a scan mode operation by performing either an orderly stop or an abrupt stop In an orderly stop the board finishes acquiring the
46. 80 Using software specify the trigger source as an external positive digital TTL trigger for a rising edge external trigger or an external negative digital TTL trigger for a falling edge external trigger Note The external digital trigger is also used to trigger analog input operations External User Gate This trigger type is supported using the DataAcq SDK only for analog output operations An external trigger event can occur when the DT3000 Series board detects either a rising or falling edge on the external gate input signal connected to TB5 on the DT730 or DT730 T screw terminal panel pin 5 of connector J1 on the DT3000 Series board The gate signal is TTL compatible When it is recognized the D A output clock is enabled Subsequent triggers ignored trigger lockout until the operation is complete Once the operation is complete the board can detect another trigger event Using software specify the trigger source as a falling edge external gate extra 1 for DataAcq SDK users or rising edge external gate extra 2 for DataAcq SDK users Note The external user gate is also used to trigger counter timer operations Analog Output Conversion Modes DT3000 Series boards support single value and continuously paced conversion modes These modes are described in the following subsections Single Value Operations Single value operations are the simplest to use but offer the least flexibility and effic
47. A N A N A 0 04 0 39 DT3005 1 N A N A 0 02 0 01 2 N A N A 0 27 0 12 4 N A N A 0 32 0 22 8 N A N A 0 04 0 03 121 Appendix A Analog Output Specifications Table 25 lists the analog output specifications for the DT3001 DT3001 PGL DT3003 DT3003 PGL DT3004 and DT3005 boards Note that the DT3002 does not provide analog output features 122 Table 25 Analog Output Specifications Feature Specifications Resolution Coding 12 bits Offset Binary Integral Nonlinearity 0 03 FSR Differential Nonlinearity 0 75 LSB monotonic Gain Error Adjustable to 0 Zero Error Number of Analog Outputs Adjustable to O 2 voltage out Output Ranges 10 V bipolar Input Data Coding Offset binary Throughput 200 kS s maximum single channel 100 kS s maximum multiple channel Current Output 5 mA maximum Output Impedance 0 1 maximum Capacitive Drive Capability 0 004 uF no oscillations Protection Short circuit to analog common Power On Voltage 10 mV maximum Settling Time to 0 01 FSR 5 us 20 V step 2 5 us 100 mV step Slew Rate 10 V us Specifications Digital I O Specifications Table 26 lists the digital I O specifications for the DT3000 Series boards Table 26 Digital I O Specifications Feature Specifications Number of Lines 8
48. AINO1 AINO1 99 AINO8 AINOO_L R1 R33 100 AINOO 00 a The screw terminal assignments match the pin numbers of the 1 connector 137 Appendix B DT730 and DT730 T Connector J2 Pins Connector J2 on the DT730 and DT730 T screw terminal panel is provided for connecting a 5B or 7B Series signal conditioning backplane Table 35 describes the pin assignments of connector J2 Table 35 Connector J2 Pin Assignments Pin Description Pin Description 1 AINOO H 14 AIN12 H 2 AINO8 H 15 Analog Gnd 3 Analog Gnd 16 AIN13 H 4 AINO9 H 17 AINO5 H 5 AINO1 H 18 Analog Gnd 6 Analog Gnd 19 AIN06 H 7 AINO2 20 AIN14 H 8 AIN10 21 Analog Gnd 9 Analog Gnd 22 AIN15 H 10 AIN11 H 23 AINO7 H 11 AINO3 H 24 Analog Gnd 12 Analog Gnd 25 Amp Low 18 AINO4 26 Not Connected a Signals AIN08 to AIN15 are not available on the 5B08 7BP08 1 or 7BP04 1 backplane 138 Using Your Own Screw Terminal Panel Analog DOPU Pr 141 Analog S m 143 Digital Inputs and Counter Timer 144 GE O EEE EEE 145 139 Appendix C Data acquisition boards can perform only as well as the input connections and signal integrity you provide If you choose not to use the DT730 or DT730 T screw terminal panel consideration must be given to how the signals interact in the real world as well
49. DATA TRANSLATION UM 17546 N DT3000 Series User s Manual Thirteenth Edition April 2010 Data Translation Inc 100 Locke Drive Marlboro MA 01752 1192 508 481 3700 www datatranslation com Fax 508 481 8620 E mail info datx com Copyright O 1999 2010 by Data Translation Inc All rights reserved Information furnished by Data Translation Inc is believed to be accurate and reliable however no responsibility is assumed by Data Translation Inc for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or otherwise under any patent rights of Data Translation Inc Use duplication or disclosure by the United States Government is subject to restrictions as set forth in subparagraph c 1 ii of the Rights in Technical Data and Computer software clause at 48 C F R 252 227 7013 or subparagraph c 2 of the Commercial Computer Software Registered Rights clause at 48 C F R 52 227 19 as applicable Data Translation Inc 100 Locke Drive Marlboro MA 01752 Data Translation is a registered trademark of Data Translation Inc DT Open Layers DT Open Layers for NET Class Library DataAcq SDK Data Acquisition OMNI CD LV Link and DTx EZ are trademarks of Data Translation Inc All other brand and product names are trademarks or registered trademarks of their respective companies Radio and Televi
50. Hz for DT3002 DT3003 DT3003 PGL and DT3005 boards and 50 kHz for DT3004 boards Using a gain of 500 the maximum throughput is 4 kHz for DT3001 PGL boards and 2 5 kHz for DT3003 PGL boards Using a gain of 100 the maximum throughput is 20 kHz for DT3001 PGL boards and 10 kHz for a DT3003 PGL boards b When run simultaneously with the A D subsystem in triggered scan mode the maximum throughput of the D A subsystem is 100 kHz Some older revision boards allow a maximum D A throughput of 155 Hz 101 Chapter 7 Counter Timers Table 20 DT3000 Series Counter Timer Options DT3000 Series D A DIN DOUT C T QUAD Cascading Support SupportsCascading Event Count Mode Support SupportsCount Yes Generate Rate Mode Support SupportsRateGenerate Yes One Shot Mode Support SupportsOneShot Yes Repetitive One Shot Mode Support SupportsOneShotRepeat Yes Up Down Counting Mode Support SupportsUpDown Edge to Edge Measurement Mode Support SupportsMeasure Continuous Edge to Edge Measurement Mode Support SupportsContinuousMeasure High to Low Output Pulse Support SupportsHighToLowPulse Yes Low to High Output Pulse Support SupportsLowToHighPulse Variable Pulse Width Support SupportsVariablePulseWidth Yeso 4 None internal Gate Type Support SupportsGateNone Yes High Level Gate Type Support SupportsGateHighLevel Yes Low Level Gate Type Support SupportsGateLowLev
51. JC and return a voltage that already compensates for CJC Therefore when using 5B Series modules you do not have to compensate for offsets as you do when measuring thermocouples on the DT730 T directly The output of many 5B modules is 5 V The output of many 7B modules is O to 10 V Ensure that you select an input range that matches the output of the 5B or 7B modules that you are using For example if you are using 5B modules that have an output of 5 V use a bipolar input range and a gain of 2 on the DT300 Series board Connect all unused inputs to analog common Reading an open channel can cause settling problems on the next valid channel Refer to the user s manuals and data sheets for the 5B and 7B Series for more information Y Wiring Signals A 41 Connecting Analog Input ccc sso cr ewan 46 Connecting Analog Output oo rs e eere ewes 50 Conhecting Digital O Signals A eee eee eines 51 Connecting Counters Timer Signals cocinas bem ete 52 39 Chapter 4 Install the Board and Load the Device Driver see Chapter 2 starting on page 23 ee NM REM Attach and Configure the Screw Terminal Panel and Signal Conditioning Backplane see Chapter 3 starting on page 31 Wire Signals this chapter Verify the Operation of the Board see Chapter 5 starting on page 55
52. MinRetriggerFreq 9 54 Hz 0 0 0 0 0 When run simultaneously with A D subsystem in triggered scan mode the maximum throughput of the D A subsystem is 100 kHz Some older revision boards allow maximum D A throughput of 155 Hz b Using a gain of 1 the maximum single channel throughput is 333 4 kHz for DT3001 DT3005 boards DT3003 PGL boards DT3003 PGL boards DT3001 PGL DT3002 DT3003 and DT3003 PGL boards 100 kHz for DT3004 boards and 200 kHz for Using a gain of 1 the maximum multiple channel throughput is 250 kHz for DT3001 and DT3001 PGL boards 100 kHz for DT3002 DT3003 DT3003 PGL and DT3005 boards and 50 kHz for DT3004 boards Using a gain of 500 the maximum throughput is 4 kHz for DT3001 PGL boards and 2 5 kHz for Using gain of 100 the maximum throughput is 20 kHz for DT3001 PGL boards and 10 kHz for a c Ensure that the retrigger period is longer than the number of entries in the channel list multiplied by the sample period Supported Device Driver Capabilities Data Encoding Table 11 DT3000 Series Data Encoding Options DT3000 Series D A DIN DOUT C T QUAD Binary Encoding Support SupportsBinaryEncoding Yes Yes Yes Yes Yes Twos Complement Support SupportsTwosCompEncoding Yes Returns Floating Point Values ReturnsFloats a Binary data encoding is supported on DT3001 DT3001 PGL DT3003
53. Single Value Digital Input To verify that the board can read a single digital input value do the following 1 S Connect digital input to digital input line 0 of port on the DT3000 Series board Refer to page 51 for an example of how to connect a digital input In the Quick DataAcq application click the Acquisition menu Click Digital Input Select the appropriate DT3000 Series board from the Board list box Select digital input port by clicking Port Click Get The application displays the value of each digital input line port on the screen in both text and graphical form 61 Chapter 5 62 Testing Single Value Digital Output To verify that the board can output a single digital output value do the following 1 9 M Connect a digital output to digital output line 0 of port B on the DT3000 Series board Refer to page 51 for an example of how to connect a digital output In the Quick DataAcq application choose Digital Output from the Control menu Select the appropriate DT3000 Series board from the Board list box Select digital output port B by clicking Port B Click the appropriate bits to select the digital output lines to write to If the bit is selected a high level signal is output to the digital output line if the bit is not selected a low level signal is output to the digital output line Optionally you can enter an output value in the Hex text box Click Send The
54. T3000 Series Boards Analog A D Sample Board Inputs Frequency A D Ranges DT3001 16 SE 8 DI 330 kHz 1 25 V 2 5 V x5 V 10 V DT3001 PGL 16 SE 8DI 330 kHz 0 02 V 0 1 V x1 V 10 V DT3002 32SE 16DI 330 kHz 1 25 V 2 5 V x5 V 10 V DT3003 64 SE 32 DI 330 kHz 1 25 V 2 5 V x5 V 10 V DT3003 PGL 64 SE 32DI 330 kHz x 0 02 V 0 1 V x1 V 10 V DT3004 16 SE 8 DI 100 kHz 1 25 V 2 5 V 5 V 10 V 0130059 16 SE 8 DI 200 2 lt 1 25 V 2 5 V 5 V 10 V The analog I O resolution is 12 bits b Maximum 250 kHz for multiple channels c Maximum 100 kHz for multiple channels d The analog I O resolution is 16 bits e Maximum 50 kHz for multiple channels Overview Supported Software The following software is available for use with the DT3000 Series board and shipped on the Data Acquisition OMNI CD DT3000 Series Device Driver The device driver is installed automatically when you install the software from the Data Acquisition OMNI CD You need the device driver to use the DT3000 Series board with any of the supported software packages or utilities The Quick DataAcq application This application provides a quick way to get a DT3000 Series board up and running Using the Quick DataAcq application you can verify the features of the board display data on the screen and save data to disk The quickDAQ application An evaluation version
55. ally when you install the driver software To run the Quick DataAcq application do the following 1 If you have not already done so power up your computer and any attached peripherals 2 Click Start from the Task Bar 3 Browse to Programs Data Translation Inc DT Open Layers for Win32 QuickDataAcq The main menu appears Note The Quick DataAcq application allows you to verify basic operations on the board however it may not support all of the board s features For information on each of the features provided use the online help for the Quick DataAcq application by pressing F1 from any view or selecting the Help menu If the system has trouble finding the help file navigate to C Program Files Data Translation Win32 dtdataacq hlp where is the letter of your hard disk drive 57 Chapter 5 58 Testing Single Value Analog Input To verify that the board can read a single analog input value do the following 1 Connect a voltage source such as a function generator to analog input channel 0 differential mode on the DT3000 Series board Refer to page 47 for an example of how to connect a differential analog input In the Quick DataAcq application choose Single Analog Input from the Acquisition menu Select the appropriate DT3000 Series board from the Board list box In the Channel list box select analog input channel 0 In the Range list box select the range for the channel The default is 10 V
56. alog output channel is determined by the order of the data written into the circular buffer During analog output operations the board reads the data from the DAC circular buffer and writes it to the respective DACs Note that for continuously paced analog output operations the data from the circular buffers in host computer memory can wrap multiple times That is if you are using a single buffer all the data in buffer is written to the output FIFO on the board The board outputs all the data and the process repeats continuously starting with the first location in buffer until you stop it If you are using multiple buffers data is output from each of the buffers on the queue when no more buffers are on the queue the operation stops 81 Chapter 6 Digital I O Features This section describes the following features of the digital I O subsystem Digital I O lines Digital I O resolution Digital I O operation modes Digital I O Lines DT3000 Series boards support eight digital I O lines through the digital input DIN and output DOUT subsystems both subsystems use the same digital I O lines These lines are divided into two banks of four Bank A lines 0 to 3 and Bank B lines 0 to 3 You can use each bank as either an input port or an output port all four lines within a bank have the same configuration For example if you use Bank A as an input port port 0 lines 0 to 3 of Bank A are configured as inputs Likewise if you
57. and DT3003 PGL boards only b Twos complement data encoding is supported on DT3004 and DT3005 boards only Channels Table 12 DT3000 Series Channel Options DT3000 Series D A DIN DOUT C T QUAD Number of Channels NumberOfChannels 16 32 64 2 1 1 0 0 SE Support SupportsSingleEnded Yes SE Channels MaxSingleEndedChannels 16 32 648 0 0 0 0 0 DI Support SupportsDifferential Yes Yes Yes Yes DI Channels MaxDifferentialChannels 8 16 32 2 1 1 0 0 Maximum Channel Gain List Depth CGLDepth 512 2 1 1 0 0 Simultaneous Sample and Hold Support SupportsSimultaneousSampleHold Channel List Inhibit SupportsChannelListlnhibit a The maximum number of single ended or pseudo differential channels is 16 for DT3001 DT3001 PGL DT3004 and DT3005 boards 32 for DT3002 boards and 64 for DT3003 and DT3003 PGL boards b The maximum number of differential channels is 8 for DT3001 DT3001 PGL DT3004 and DT3005 boards 16 for DT3002 boards and 32 for DT3003 and DT3003 PGL boards 97 Chapter 7 Gain Table 13 DT3000 Series Gain Options DT3000 Series D A DIN DOUT C T QUAD Programmable Gain Support SupportsProgrammableGain Yes Number of Gains NumberOfSupportedGains 4 1 1 1 0 0 Gains Available 1 2 4 8 or SupportedGains 1 10 100 5004 1 1 1 The DT3001 PGL and DT3003 PGL boards have gains of 1 10 100 and 500 oth
58. application displays the value of each digital output line of digital port B on the screen in both text and graphical form Verifying the Operation of a DT3000 Series Board Testing Frequency Measurement To verify that the board can perform a frequency measurement operation do the following 1 Wire an external clock source to counter timer 0 on the DT3000 Series board Refer to page 53 for an example of how to connect an external clock for frequency measurement operation Note The Quick DataAcq application works only with counter timer 0 In the Quick DataAcq application choose Frequency Counter from the Acquisition menu Select the appropriate DT3000 Series board from the Board list box In the Count Duration text box enter the number of seconds during which events will be counted Click Start to start the frequency measurement operation The operation automatically stops after the number of seconds you specified has elapsed and the frequency is displayed on the screen If you want to stop the frequency measurement operation when it is in progress click Stop 63 Chapter 5 Testing Pulse Output To verify that the board can perform pulse output operation do the following 1 Connect scope to counter timer 0 on the DT3000 Series board Refer to page 53 for an example of how to connect a scope pulse output to counter timer 0 Note The Quick DataAcq application work
59. ate input signal You can use this mode to clean up a poor clock input signal by changing its pulse width then outputting it In repetitive one shot mode the internal C T clock source is more useful than an external C T clock source refer to page 83 for more information on the internal C T clock source Use software to specify the counter timer mode as repetitive one shot the polarity of the output pulses high to low transitions the duty cycle of the output pulses 100 only the C T clock source and the gate type to trigger the operation Refer to page 85 for more information on pulse output types and to page 84 for more information on gates When the one shot operation is triggered determined by the gate input signal a pulse is output When the board detects the next trigger another pulse is output This operation continues until you stop the operation 89 Chapter 6 Note In case of a repetitive one shot operation the pulse width is automatically set to 100 Triggers that occur while the pulse is being output are not detected by the board Ensure that the signals are wired appropriately Figure 28 shows an example of a repetitive one shot operation using an external gate rising edge clock output frequency of 1 kHz one pulse every 1 ms and high to low pulse type Repetitive One Shot Operation Starts External Gate Signal Pulse Output Signal 90 2 1 1 ms period
60. ation Calibrating the A D Subsystem To calibrate the A D subsystem on the board do the following 1 Connect precision voltage source to channel 0 A D input screw terminal J1 pin 100 for AINOO high and 99 for low The A D is configured for differential inputs during calibration Set the voltage source to 0 000 V Adjust potentiometer R4 shown in Figure 29 until the A D output voltage is 0 000 V Potentiometers ma R4 R6 R14 R1 R3 R5 R13 0 Figure 29 Potentiometers for Calibrating the DT3000 Series Boards Set the voltage source to 9 950 V Adjust potentiometer R3 shown in Figure 29 until the A D output voltage is 9 950 V For DT3001 DT3002 DT3003 DT3004 and DT3005 boards set the gain to 8 for the DT3001 PGL and DT3003 PGL boards set the gain to 500 Set the voltage source to 0 000 V Adjust potentiometer R1 shown in Figure 29 until the A D output voltage is 0 000 V 107 Chapter 8 Calibrating the D A Subsystem Do the following to calibrate the D A subsystem on the board 1 Connect a precision voltmeter to DAC 0 screw terminal pin 34 ANOO and 33 for ANOO Set the value to the minus full scale range all zeros Adjust potentiometer R5 shown in Figure 29 until the analog output voltage is 10 V Set the value to the plus ful
61. cate signals you can access 16 32 or 64 Channel Multiplexer 12 bit or Data 16 bit H Port 0 ES 8 Lines of Digital 1 O ADC Register p Port 1 E Program and Program Select pr Data RAM ROM ion 16 Bit Digital Signal Processor 16 bit Countel TMS320C52 Counter Timer CGL Timer Clock 3952 82054 Output Words Dual Port RAM Gate 4096 x 16 Logic date Lor M 221 ConfigurableConfigurabl Interface D A Clock Clock External A D Clock 7 i In To 16 Bit 16 Bit Double Analog Divider Divider l External Data Circuits 4 Bit 4 Bit Trigger In Two Buffers 45V 15 Prescaler Prescaler Analog Doubi ouble Outputs 1480 Divide by 4 Divide by 2 Dac DC DC Power i 1 Converter 40 MHz PCI Bus Interface 5 E B On all but the DT3002 PCI Bus Figure 19 Block Diagram of the DT3000 Series Boards Principles of Operation Analog Input Features This section describes the features of the analog input A D subsystem including the following Analog input resolution Analog input channels Input ranges and gains A D sample clock sources Analog input conversion mode
62. d repetitive one shot This section describes how to connect counter timer signals to perform these operations Refer to page 83 for more information on using the counter timers Connecting Event Counting Signals Figure 15 shows one example of connecting event counting signals to the DT730 or DT730 T screw terminal panel In this example clock edges are counted while the gate is active Digital Ground D External O Gating Gate Input Switch LU E ge TB7 D User Clock Input Signal Source DT730 or DT730 T Panel Digital Ground Figure 15 Connecting Event Counting Signals Shown Using an External Gate Figure 16 shows another example of connecting event counting signals to the DT730 or DT730 T screw terminal panel In this example a software gate is used to start the event counting operation 52 Wiring Signals Digital Ground D D Signal Source D D D TB7 3 U User Clock Input DT730 or DT730 T Panel Figure 16 Connecting Event Counting Signals without an External Gate Input Connecting Frequency Measurement Signals On the DT3000 Series a frequency measurement application uses the same wiring as an event counting application that does not use an external gate signal see Figure 16 The
63. e D A output clock For DT3000 Series boards the maximum throughput rate in this mode is 200 kSamples s for a single channel or 100 kSamples s for both channels Note that rate is system dependent Refer to page 79 for more information on the D A output clock To select continuously paced analog output mode use software to specify the following parameters e The dataflow as Continuous Set WrapSingleBuffer to False if you want to output data from multiple buffers Set WrapSingleBuffer to True if you want to output data from a single buffer continuously this mode is sometimes called waveform generation mode The trigger source as any of the supported trigger sources Refer to page 77 for more information on the supported trigger sources To stop a continuously paced analog output operation you can stop sending data to the board letting the board stop when it runs out of data or you can perform either an orderly stop or an abrupt stop using software In an orderly stop the board finishes outputting the specified number of samples then stops all subsequent triggers are ignored In an abrupt stop the board stops outputting samples immediately all subsequent triggers are ignored Format and Transfer Data from the host computer must use binary data encoding for analog output signals Use software to specify the data encoding The host computer writes analog output data to the DAC circular buffer on the board The destination an
64. el Yes High Edge Gate Type Support SupportsGateHighEdge Yes Low Edge Gate Type Support SupportsGateLowEdge Yes Level Change Gate Type Support SupportsGateLevel Clock Falling Edge Type SupportsClockFalling Clock Rising Edge Type SupportsClockRising Gate Falling Edge Type SupportsGateFalling 102 Supported Device Driver Capabilities Table 20 DT3000 Series Counter Timer Options cont Gate Rising Edge Type SupportsGateRising DT3000 Series A D D A DIN DOUT C T QUAD b Interrupt Driven Operations Supportsinterrupt Yes You can use one shot mode only with software gate type none You cannot use a software gate type none with repetitive one shot mode In rate generation mode you can use duty cycle of 50 or 100 only If you use duty cycle of 50 the output of the specified C T subsystem is a square wave with a 50 duty cycle The frequency of this square wave is determined differently depending on the clock source If you use duty cycle of 100 the output of the specified C T subsystem 15 square wave that is low active for specified period determined by the clock source If you use an internal clock the active period is typically 100 ns however for slower frequencies the period may increase to as much as 1 6 If you use an external clock the active period is 1 external clock frequency
65. els 0 1 and 8 Connecting Differential Voltage Inputs Figure 9A illustrates how to connect a floating signal source to the DT730 or DT730 T screw terminal panel using differential inputs and a bias return resistor In Figure 9B the signal source itself provides the bias return path therefore you do not need to use bias return resistors R is the signal source resistance while R is the resistance required to balance the bridge Note that the negative side of the bridge supply must be returned to analog ground 47 Chapter 4 48 A D DO Analog nalog 7399 TB100 Floating Pd D Signal Rs Source Analog In 0 M Return D 2 Analog Ground B Analog In 0 Return TB99 TB100 Analog In 0 TB36 DT730 or DT730 T Panel Use resistor R1 to connec the low side of channel 0 tc analog ground DC Supply Analog Ground 099900909009 TB36 DT730 or DT730 T Panel Figure 9 Connecting Differential Voltage Inputs Shown for Channel 0 with and without Input Bias Return Resistors Note that since they measure the difference between the signals at the high and low 3 inputs differential connections usually cancel any common mode voltages leaving only the signal However if you are using a grounded signal source and ground loop problems arise connec
66. emperature sensor to channel 0 high jumper W3 connects channel 0 low to analog ground The output is 0 50 mV C or 12 5 mV at 25 C After scaling for the gain and thermocouple type you must add this voltage to the thermocouple voltage to remove the offset created by the temperature of the screw terminal panel when measuring thermocouple inputs on the DT730 T directly Note 5B and 7B thermocouple modules provide their own CJC and return a voltage that already compensates for the CJC Therefore if you are using the DT730 T with a 5B or 7B thermocouple module you do not have to compensate for offsets as you do when measuring thermocouples on the DT730 T directly Configuring Jumpers W4 to W7 Analog Outputs on the 5B01 or 7BP16 1 Backplane Note You cannot use analog output modules on the 5B08 7BP08 1 or 7BP04 1 backplane Jumpers W4 to W7 are provided if you are using the DT730 or DT730 T screw terminal panel with analog output modules on a 5B01 or 7BP16 1 signal conditioning backplane Install jumpers W4 and W5 to connect DACO from the data acquisition board to channel 14 on 5 01 or 7BP16 1 backplane Jumper W4 connects DACO to channel 14 jumper W5 connects DACO s return 35 Chapter 3 Install jumpers W6 and W7 to connect DAC1 from the data acquisition board to channel 15 on the 5801 or 7BP16 1 backplane Jumper W6 connects DACO to channel 15 jumper W7 connects DACT s return Note If you are using analog
67. er DT3000 Series boards have gains of 1 2 4 and 8 Ranges Table 14 DT3000 Series Range Options DT3000 Series A D D A DIN DOUT C T QUAD Number of Voltage Ranges NumberOfRanges 1 1 0 0 0 0 Available Ranges SupportedVoltageRanges 10V x10V Current Output Support SupportsCurrentOutput Resolution Table 15 DT3000 Series Resolution Options DT3000 Series D A DIN DOUT QUAD Software Programmable Resolution SupportsSoftwareResolution Yes Yes Number of Resolutions NumberOfResolutions 1 1 28 28 1 0 Available Resolutions 12 or SupportedResolutions 16 12 4 8 4 8 16 a When configured for 4 bits of resolution element 0 uses bits 3 to 0 and element 1 uses bits 7 to 4 When configured for 8 bits of resolution element 0 uses bits 7 to 0 and element 1 is not used b The DT3001 DT3001 PGL DT3002 DT3003 and DT3003 PGL boards have a fixed analog input resolution of 12 bits The DT3004 and DT3005 boards have a fixed analog input resolution of 16 bits 98 Supported Device Driver Capabilities Thermocouple Support Table 16 DT3000 Series Thermocouple Support Options DT3000 Series D A DIN DOUT QUAD Thermocouple Support SupportsThermocouple Yes RTD Support SupportsRTD Resistance Support ReturnsOhms Voltage Converted to Temperature in Hardware SupportsTemperatureDatalnStream Supported Th
68. erface between the MATLAB Data Acquisition DAQ subsystem from The MathWorks and Data Translation s DT Open Layers architecture LV Link An evaluation version of LV Link is included on the Data Acquisition OMNI CD Use LV Link if you want to use the LabVIEW graphical programming language to access the capabilities of the DT3000 Series boards Refer to the Data Translation web site www datatranslation com for information about selecting the right software package for your needs 17 Chapter 1 18 Accessories The following optional accessories are available for the DT3000 Series board DT730 or DT730 T screw terminal panel General purpose screw terminal panel providing analog digital counter timer external trigger and external clock connections The DT730 T is the same as the DT730 but also provides cold junction compensation for thermocouple connections Connector 1 accommodates the analog and digital I O signals from the DT3000 Series board connector J2 allows you to connect 5B and 7B Series signal conditioning backplanes EP291 cable A 0 95 m 3 2 foot cable with two 100 connectors to connect J1 connector for the DT3000 Series board to J1 connector on the DT730 or DT730 T screw terminal panel 5 01 or 5B08 backplane and 5B Series modules The 5801 is 16 channel backplane the 5 08 is an 8 channel backplane Both backplanes accept 5B modules for signal conditioning applications includ
69. ermocouple Types J E ThermocoupleType N S T Supported RTD Types RTDType Supports CJC Source Internally in Hardware SupportsCjcSourcelnternal Supports CJC Channel SupportsCjcSourceChannel Yes Available CJC Channels CjcChannel 0 Supports Interleaved CJC Values in Data Stream SupportsInterleavedCjcTemperaturesInStream Supports Programmable Filters SupportsTemperatureFilters Programmable Filter Types TemperatureFilterType a Thermocouple inputs are supported on the DT3001 PGL and DT3003 PGL boards IEPE Support Table 17 DT3000 Series IEPE Support Options DT3000 Series A D D A DIN DOUT C T QUAD Software Programmable AC Coupling SupportsACCoupling Software Programmable DC Coupling SupportsDCCoupling Software Programmable External Excitation Current Source SupportsExternalExcitationCurrentSrc Software Programmable Internal Excitation Current Source SupportsinternalExcitationCurrentSrc Available Excitation Current Source Values SupportedExcitationCurrentValues 99 Chapter 7 Triggers 100 Table 18 DT3000 Series Trigger Options DT3000 Series A D D A DIN DOUT C T QUAD Software Trigger Support SupportsSoftwareTrigger Yes Yes Yes Yes External Positive TTL Trigger Support SupportsPosExternalTTLTrigger Yes Yes External Negative TTL Trigger Support SupportsNegExternalTTLTrigger Yes Y
70. errite clamp attaches to the cable with an integral latch and grips the cable to prevent sliding 33 Chapter 3 Configuring a DT730 or DT730 T Screw Terminal Panel Figure 4 illustrates the screw terminal and component locations for the DT730 and DT730 T W2 5 p W3 TB44 TB52 TB60 TB68 TB76 TB84 TB92 TB100 Ll 0 q 0 0 0 0 0 1 0 1 0 Oo 0 4 0 q 0 0 0 D J2 TB37 0 J B45 TB53 6 TB69 77 TB85 TB93 R61 R57 R53 R49 R4 RA R R33 OEE R29 R25 R21 R17 B13 R9 de Ri R62 R58 R54 R50 R46 642 R38 R34 BEE 30 H26 R22 Rig Hi4 RIO R6 R2 R63 R59 R55 Hol 847 R43 R39 R35 wa Re Rie DB El do d mw R32 R28 R38 R20 Ri6 R12 R8 R4 pa W6 5 TB36 27 O 0 Oooooooooolooooo 66666666 Spare Jumpers TB1 TB10 16 17 26 Jumpers W2 W3 potentiometer R99 are on the DT730 T only Figure 4 DT730 and DT730 T Screw Terminal Panels Jumpers The DT730 and DT730 T screw terminal panels contain jumpers W1 W4 to W7 The DT730 T screw terminal panel also contains jumpers W2 and W3 Jumper W1 provides the circuitry and jumpers W4 to W7 are associated with analog outputs on
71. es External Positive TTL Trigger Support for Single Value Operations SupportsSvPosExternalTTLTrigger External Negative TTL Trigger Support for Single Value Operations SupportsSvNegExternalTTLTrigger Positive Threshold Trigger Support SupportsPosThresholdTrigger Negative Threshold Trigger Support SupportsNegThresholdTrigger Digital Event Trigger Support SupportsDigitalEventTrigger Supported Device Driver Capabilities Clocks Table 19 DT3000 Series Clock Options DT3000 Series D A DIN DOUT C T QUAD Internal Clock Support SupportsinternalClock Yes Yes Yes External Clock Support SupportsExternalClock Yes Yes Simultaneous Input Output on a Single Clock Signal SupportsSimultaneousClocking Base Clock Frequency BaseClockFrequency 20 MHz 10MHz 10 0 10 MHz 0 Maximum Clock Divider MaxExtClockDivider 1 1 1 1 65535 10 Minimum Clock Divider MinExtClockDivider 1 1 1 1 2 0 Maximum Frequency 333 4 kHz MaxFrequency 100 kHz 200 kHz 200 kHz 0 0 5MHz 10 Minimum Frequency MinFrequency 19 1Hz 9 54 Hz 0 0 9 54 Hz 0 a Using a gain of 1 the maximum single channel throughput is 333 4 kHz for DT3001 DT3001 PGL DT3002 DT3003 and DT3003 PGL boards 100 kHz for DT3004 boards and 200 kHz for DT3005 boards Using a gain of 1 the maximum multiple channel throughput is 250 kHz for DT3001 and DT3001 PGL boards 100 k
72. eturn 32 ANO1 Analog Output 1 31 ANO1 Analog Output 1 Return 30 AGND Analog Ground 29 AGND Analog Ground 28 15V 15 volts out 27 15V 15 volts out 26 DGND Digital Ground 25 DGND Digital Ground 24 DIOO Digital I O Bank A O 23 DIO4 Digital I O Bank BO 22 DIO1 Digital I O Bank A 1 21 DIO5 Digital I O Bank B 1 20 DIO2 Digital I O Bank A 2 19 DIO6 Digital I O Bank 2 18 DIO3 Digital I O Bank 17 DIO7 Digital I O Bank B 16 DGND Digital Ground 15 DGND Digital Ground 14 5V 5 volts out 13 5V 5 volts out 12 Reserved Reserved 11 Reserved Reserved 10 DGND Digital Ground 9 DGND Digital Ground 08 EADCLKI External A D Sample Clock In 07 UCLKI User Clock Input 06 EADTRIG External A D or D A Trigger 05 UGATE External User Gate 04 Reserved Reserved 03 UCLKO User Counter Output 02 DGND Digital Ground 01 DGND Digital Ground 133 Appendix B DT730 and DT730 T Screw Terminals Table 34 describes each of the screw terminal assignments and identifies the resistors that are associated with each channel on the DT730 and DT730 T screw terminal panels Table 34 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt Digital Ground Not Applicable Digital Ground UCLK OUT RESERVED USER GATE EADTRIG EDATRIG USER CLK1 EADCLK1 oOo ay
73. external gate signal to TB5 of the DT730 or DT730 T screw terminal panel pin 5 of connector J1 on the DT3000 Series board Pulse Output Signals and Duty Cycles DT3000 Series boards provide one pulse output signal The pulse signal is output on TB3 of the DT730 and DT730 T screw terminal panel pin 3 of connector J1 on the DT3000 Series board DT3000 Series boards support high to low pulse output signals only With a high to low transition the low portion of the total pulse output period is the active portion of the counter timer clock output signal The duty cycle or pulse width indicates the percentage of the total pulse output period that is active For example a duty cycle of 50 indicates that half of the total pulse is low and half of the total pulse output is high Figure 23 illustrates a high to low pulse with a duty cycle of approximately 50 Note For rate generation mode the duty cycle must be 50 or 100 only For one shot and repetitive one shot mode the duty cycle must be 100 Total Pulse Period lt gt high pulse low pulse Active Pulse Width Figure 23 Example of High to Low Pulse Output Signal 85 Chapter 6 Counter Timer Operation Modes DT3000 Series boards support the following counter timer operation modes Event counting Frequency measurement Rate generation One shot Repetitive one shot Event Counting Use event counting
74. features of the boards and how to use them in your application Chapter 7 Supported Device Driver Capabilities lists the data acquisition subsystems and the associated features accessible using the DT3000 Series Device Driver Chapter 8 Calibration provides information that allows you to calibrate the analog I O circuitry of the boards and to calibrate the DT730 T screw terminal panel Chapter 9 Troubleshooting provides information that you can use to resolve problems with the boards and the device driver should they occur Appendix A Specifications lists the specifications of the boards Appendix B Connector Pin Assignments shows the pin assignments for the connectors on the boards and for the DT730 and DT730 T screw terminal panel Appendix C Using Your Own Screw Terminal Panel describes additional considerations to keep in mind when designing your own screw terminal panel for use with a DT3000 Series board An index completes this manual Conventions Used in this Manual The following conventions are used in this manual Notes provide useful information or information that requires special emphasis cautions provide information to help you avoid losing data or damaging your equipment and warnings provide information to help you avoid catastrophic damage to yourself or your equipment Items that you select or type are shown in bold Related Information 12 Refer to the
75. g 58 Testing Single Value Analog Output 59 Testing Continuous Analog Input 2 2 60 Testing Single Value Digital Input 2 2 4 2 4 2 2 61 Testing Single Value Digital 62 Testing Frequency Measurement 63 Testing Pulse Output si a E He basket 64 Part 2 Using Your 65 Chapter 6 Principles of Operation 67 Analog Features iii DE A us ve eeu 69 Analog Input Resolution enn 69 Analog Input Channels 222 222 2 2 2 69 Specifying a Single Channel 2 2 2 2 70 Specifying One or More Channels 70 Input Ranges and Gains 2 22 2 22 2 70 Specifying the Gain for a Single Channel 71 Specifying the Gain for One or More Channels 71 A D Sample Clock Sourc s iii eee trem a tte ete re deos 71 Internal A D Sample Clock 22 72 External A D Sample Clock
76. ger to start other operations such as analog input When the one shot operation is triggered a single pulse is output then the one shot operation stops All subsequent clock input signals and gate input signals are ignored The period of the output pulse is determined by the clock input signal In one shot mode the internal C T clock source is more useful than an external clock source refer to page 83 for more information on the internal C T clock source Using software specify the counter timer mode as one shot the clock source as internal the polarity of the output pulse high to low transitions and the gate type to trigger the operation Refer to page 85 for more information on pulse output types and to page 84 for more information on gate types Principles of Operation Note In case of a one shot operation pulse width is automatically set to 100 Ensure that the signals are wired appropriately Figure 27 shows an example of a one shot operation using an external gate input rising edge clock output frequency of 1 kHz pulse period of 1 ms and high to low pulse type One Shot Operation Starts External Gate Signal 4 1 ms period 100 duty cycle Pulse Output Signal Figure 27 Example of One Shot Mode Repetitive One Shot Use repetitive one shot mode to generate a pulse output signal each time the board detects a trigger determined by the g
77. h impedance Fach incorporates 35 V over voltage protection when the board is on and 20 V over voltage protection when the board is off DT3000 Series boards can acquire data from single analog input channel or from group of analog input channels Depending on the number of channels supported by the board channels are numbered 0 to 15 0 to 31 or 0 to 63 for single ended and pseudo differential inputs and 0 to 7 0 to 15 or 0 to 31 for differential inputs The following subsections describe how to specify the channels Specifying Single Channel The simplest way to acquire data from single channel is to specify the channel for single value analog input operation using software refer to page 73 for more information on single value operations You can also specify a single channel using the analog input channel list described in the next section Specifying One or More Channels DT3000 Series boards can read data from one or more analog input channels using an analog input channel list You can group the channels in the list sequentially either starting with 0 or with any other analog input channel or randomly You can also specify a channel more than once in the list Using software specify the channels in the order you want to sample them The analog input channel list corresponds to the Channel Gain List CGL on the board You can enter up to 512 entries in the list The channels are read in order using continuousl
78. hat the retrigger period is longer than the number of entries in the channel list multiplied by the sample period For example if you have a channel list with five entries and sample period of 16 us the retrigger period must be greater than 80 us 5 x 16 us To select internally retriggered scan mode use software to specify the following parameters The dataflow as Continuous Triggered scan mode usage as enabled The retrigger source as Software The number of times to scan per trigger or retrigger also called the multiscan count as 1 The frequency of the software retrigger The initial trigger source refer to page 77 for more information Figure 21 illustrates software retriggered scan mode using a channel list with three entries channel 0 channel 1 and channel 2 In this example analog input data is acquired on each clock pulse of the A D sample clock until the channel list has been scanned once then the board waits for the retrigger period to elapse When the retrigger period elapses the retrigger event occurs and the board scans the channel list once more acquiring data on each pulse of the A D sample clock The process repeats continuously with every specified retrigger event 75 Chapter 6 76 Chano Chan2 2 Chan 0 1 1 0 Sample Clock Trigger occurs Board waits for the Retrigger occurs Board waits for the channel li
79. he Device Driver this chapter Attach and Configure a Screw Terminal Panel and Signal Conditioning Backplane see Chapter 3 starting on page 31 Wire Signals see Chapter 4 starting on page 39 Verify the Operation of the Board see Chapter 5 starting on page 55 Note DT3000 Series boards are factory calibrated and require no further adjustment prior to installation If you are using the DT3000 Series board and decide later to recalibrate it refer to Chapter 8 starting on page 105 for instructions 24 Installing the Board and Loading the Device Driver Unpacking Open the shipping box and remove the wrapped DT3000 Series board CAUTION Keep the board in its protective antistatic bag until you are ready to install it this minimizes the likelihood of electrostatic damage Verify that the following items are present DT3000 Series data acquisition board Data Acquisition OMNI CD If an item is missing or damaged contact Data Translation If you are in the United States call the Customer Service Department at 508 481 3700 ext 1323 An application engineer will guide you through the appropriate steps for replacing missing or damaged items If you are located outside the United States call your local distributor listed on Data Translation s web site www datatranslation com Once you have unpacked your board check the system requirements as described in the next section
80. iency Use software to specify the range gain and analog output channel among other parameters and output the data from that channel For a single value operation you cannot specify a clock source trigger source or buffer Single value operations stop automatically when finished you cannot stop a single value operation Continuously Paced Operations Continuous analog output operations take full advantage of the capabilities of the DT3000 Series boards In this mode you can specify a channel list clock source trigger source buffer and buffer wrap mode Use continuously paced analog output mode if you want to accurately control the period between conversions of individual analog output channels in the analog output channel list Principles of Operation Data The host computer transfers digital values to write to the DACs from allocated circular buffers in computer memory to the DAC buffer on the board Use software to allocate the number of host buffers and to specify the values to write to the DACs When it detects a trigger the board outputs the values in the onboard buffer to the DACs at the same time The operation repeats continuously until you stop the operation Refer to page 81 for more information on buffers Ensure that the host computer transfers data to the onboard buffer fast enough so that it does not empty completely otherwise an error may result The conversion rate is determined by the frequency of th
81. inal panel providing analog digital counter timer external trigger and external clock connections The DT730 T is the same as the DT730 but also provides cold junction compensation CJC for thermocouple connections The DT730 and DT730 T provide J1 connector for connecting to your DT3000 Series board using the EP291 cable included with the screw terminal panel The DT730 and DT730 T also provide a 26 pin J2 connector to allow connection to standard 5B and 7B Series signal conditioning backplanes The following section describes how to attach DT730 or DT730 T screw terminal panel to DT3000 Series board The section on page 34 describes how to configure a DT730 or DT730 T screw terminal panel for use with DT3000 Series board Attaching a DT730 or DT730 T Screw Terminal Panel To connect the DT730 or DT730 T screw terminal panel to a DT3000 Series board do the following 1 Plug one end of the EP291 flat ribbon cable into the connector at the rear of the DT3000 Series board and the other end into the DT730 or DT730 T as shown in Figure 3 DT3000 Series Board Rear Panel Connector J1 Connector y Ferrite Clamp Computer Side View EP291 Cable DT730 or DT730 T Figure 3 Connecting the DT730 DT730 T to the DT3000 Series Board 2 Toreduce EMI emissions place the ferrite clamp shipped with the DT3000 Series board no more than six inches from the DT3000 Series board connector The f
82. ing measuring thermocouples RTDs voltage input current input strain gage input and frequency input To use the 5B series backplanes and modules with the DT730 or DT730 T screw terminal panel you need the following additional accessories available from Data Translation 1315 cable 2 foot cable with 26 pin connector on each end that connects 5B Series signal conditioning backplane to the DT730 or DT730 T screw terminal panel PWR 977 power supply A 5 V 3 A power supply for powering the 5B Series backplanes 7BP16 1 7BP08 1 or 7BP04 1 backplane and 7B Series modules 7BP16 1 is a 16 channel backplane the 7 08 1 15 an 8 channel backplane and the 7 04 1 is 4 channel backplane All three backplanes accept 7B modules for signal conditioning applications including measuring thermocouples RTDs voltage input current input strain gage input and frequency input To use the 7B series backplanes and modules with the DT730 or DT730 T you need the following additional accessories available from Data Translation 1315 2 foot 26 pin female to 26 pin female cable that connects 7B Series backplane to the AC1393 cable AC1393 a 6 inch 26 pin male to 25 pin female adapter cable that connects a 7B Series backplane to the AC1315 cable the AC1315 cable then connects to the DT730 or DT730 T screw terminal panel HES14 21 power supply linear ac dc power supply that provides 24
83. l In rate generation mode either the internal or external clock input source is appropriate depending on your application refer to page 83 for more information on the C T clock source 87 Chapter 6 88 Using software specify the counter timer mode as rate generation rate the C T clock source as either internal or external the polarity of the output pulses high to low transitions the duty cycle of the output pulses 50 or 100 only and the gate type that enables the operation Refer to page 85 for more information on pulse output signals and to page 84 for more information on gate types Ensure that the signals are wired appropriately Figure 26 shows an example of an enabled rate generation operation using an external C T clock source with an input frequency of 4 kHz a clock divider of 4 a high to low pulse type and duty cycle of 50 The gate type does not matter for this example 1 kHz square wave is the generated output Rate Generation Operation Starts External C T Clock Input Signal 4 kHz Output 50 duty cycle Signal Figure 26 Example of Rate Generation Mode with 50 Duty Cycle One Shot Use one shot mode to generate a single pulse output signal from the counter when the operation is triggered determined by the gate input signal You can use this pulse output signal as an external digital TTL trig
84. l scale range all ones Adjust potentiometer R6 shown in Figure 29 until the analog output voltage is 995 c Sa gt gt M Connect a precision voltmeter to DAC 1 screw terminal pin 32 for ANO1 and 31 for ANOT 7 Setthe value to the minus full scale range all zeros 8 Adjust potentiometer R13 shown in Figure 29 until the analog output voltage is 10 V 9 Setthe value to the plus full scale range all ones 10 Adjust potentiometer R14 shown in Figure 29 until the analog output voltage is 995 108 Calibration Calibrating the DT730 T The DT730 T screw terminal panel is factory calibrated for optimum compensation Therefore you do not need to calibrate the panel initially If you wish to calibrate the DT730 T at a later time do the following 1 Allow the DT730 T screw terminal panel to warm up for 10 minutes then measure the temperature at the DT730 T 2 Adjust potentiometer R99 screw terminal panel shown Figure 30 0 50 mV for each degree measured above 0 12 5 mV at 25 At a gain of 500 the output should be DOOh at a gain of 100 the output should be 900h W3 a TB44 TB52 TB60 TB68 76 TB84 TB92 TB100
85. located is PCI slot that the board is correctly seated in the slot and that the board is secured in the slot with screw The power supply of the computer is too small to handle all the system resources Check the power requirements of your system resources and if needed get a larger power supply consult the board s specifications on page 127 of this manual System lockup Board is not seated properly Check that the slot in which your DT3000 Series board is located is a PCI slot that the board is correctly seated in the slot and that the board is secured in the slot with a screw Interrupt level is unacceptable An interrupt conflict exists in your system The most common interrupt conflict occurs with a PCI device and a device that is plugged into the ISA bus To correct this problem change the interrupt setting usually by changing a jumper on the ISA device An interrupt conflict can also occur if a PCI device was not designed to share interrupts To resolve this problem select a different interrupt for each PCI slot in the PCI BIOS To do this enter the system BIOS program this is usually done by pressing the DEL key when rebooting your system Once in the system BIOS enter the PCI PnP BIOS setup and select a unique interrupt for each PCI slot The PCI BIOS assigns the interrupt the device on the PCI bus does not have control over the interrupt assignment 113 Chapter 9
86. mode to count events from the counter s associated clock input source You can count a maximum of 65 536 events before the counter rolls over to 0 and starts counting again In event counting mode use an external clock source refer to page 84 for more information on the external clock source Using software specify the counter timer mode as event counting count the clock source as external and the gate type that enables the operation Refer to page 84 for information on gates Ensure that the signals are wired appropriately Figure 24 shows an example of an event counting operation In this example the gate type is low level high level disables operation Gate Input low level Signal enables operation External C T Clock Input Signal 3 events are counted while the operation is enabled event counting event counting operation starts operation stops Figure 24 Example of Event Counting 86 Principles of Operation Frequency Measurement Use frequency measurement mode to measure the frequency of the signal from counter s associated clock input source over a specified duration In this mode use an external clock source refer to page 83 for more information on the external C T clock source To perform a frequency measurement on the DT3000 Series use the same wiring as an event counting application that does not use an external gate signal Use soft
87. n Current Shunt 59 AIN44 AIN20 L R21 R53 60 AIN36 AIN20 H 61 AIN43 AIN19 L R20 R52 62 AIN35 AIN19 H 63 AIN42 18 R19 R51 64 AIN34 AIN18 65 AIN41 AIN17_L R18 R50 66 AIN33 AIN17 H 67 AIN40 AIN16 L R17 R49 68 AIN32 AIN16 69 AIN31 AIN15 R16 R48 70 AIN23 AIN15 H 71 AIN30 AIN14 L R15 R47 72 AIN22 AIN14 H 73 AIN29 AIN13 R14 R46 74 AIN21 AIN13_H 75 AIN28 AIN12_L R13 R45 76 AIN20 AIN12_H 77 AIN27 AIN11_L R12 R44 78 AIN19 AIN11_H 79 AIN26 AIN10_L R11 R43 80 AIN18 AIN10 81 AIN25 AINO9 R10 R42 82 AIN17 AINO9 H 83 AIN24 AINO8 R9 R41 84 AIN16 85 AIN15 AINO7 R8 R40 86 AINO7 AINO7 H 87 AIN14 AINO6 R7 R39 88 AINO6 AINO6_H Wiring Signals Table 2 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 89 AIN13 AINO5_L R6 R38 90 AINO5 AINO5_H 91 AIN12 AINO4 L R5 R37 92 AINO4 AINO4 H 93 AIN11 L R4 R36 94 AINO3 H 95 AIN10 AINO2 L R3 R35 96 AINO2 AINO2 H 97 AINO9 AINO1 L R2 R34 98 AINO1 AINO1 99 AINO8 AINOO_L R1 R33 100 AINOO 00 a The screw terminal assignments match the pin numbers of the 1 connector 45 Chapter 4 Connecting Analog Input Signals The DT730 screw terminal panel supports b
88. nal gate type 102 internal retrigger clock 74 interrupt driven operations 103 J J1 connector 132 jumper W1 35 W2 35 W3 35 W4 35 W5 35 W6 35 W7 35 LabVIEW 17 layout of panel 34 level gate type high 84 low 84 lines digital I O 82 loading the device driver Windows 7 30 Windows Vista 29 Windows XP 29 logic high level gate type 84 logic low level gate type 84 low edge gate type 84 102 low level gate type 102 LV Link 17 M MaxDifferentialChannels 97 MaxExtClockDivider 101 MaxFrequency 101 MaxMultiScanCount 96 MaxRetriggerFreq 96 MaxSingleEndedChannels 97 Measure Foundry 17 measuring frequency 87 MinExtClockDivider 101 MinFrequency 101 Index MinRetriggerFreq 96 N number of differential channels 97 gains 98 I O channels 97 resolutions 98 scans per trigger 96 single ended channels 97 voltage ranges 98 NumberOfChannels 97 NumberOfRanges 98 NumberOfResolutions 98 NumberOfSupportedGains 98 Nyquist Theorem 72 one shot mode 88 102 online help 57 operation modes continuously paced analog output 80 continuously paced scan mode 73 event counting 86 externally retriggered scan mode 76 frequency measurement 87 one shot pulse output 88 rate generation 87 repetitive one shot pulse output 89 single value analog input 73 single value analog output 80 single value digital I O 82 software retriggered scan mode 74 orderly stop analog input 73 analog output 81 output pulses
89. nalog Output Specifications 2 22 2 2 2 2 2 122 Digital 1 0 Specifications nete ree ru ESI etes 123 User Counter Timer Specifications 124 External Trigger Specifications 125 Power Consutpltioti Joi a pter Bae Ee RR aye 126 Physical Specifications eec ed eda d e 127 DT730 and DT730 T Specifications 128 EP291 Cable 129 Appendix Connector Pin Assignments 131 Board Connector J leiers mesaer A o ipe gig 132 DT730 and DT730 T Screw Terminals 134 DT730 and DT730 T Connector J2 Pins 138 Appendix C Using Your Own Screw Terminal Panel 139 Analog Inputs n e oe e eet ce ee le tee Ce i ret ee der uda 141 Single Ended E E led eee 141 Pseudo Differential Inputs 222 2 2 22 141 Differential Inputs vag siete en a a ete al ce de 142 Contents Analog Outputs ree estie ee e P ce e DA 143 Digital Inputs and Counter Timer
90. ock 74 maximum external clock divider 101 maximum throughput 101 minimum external clock divider 101 minimum throughput 101 common ground sense 35 configuring the DT730 or DT730 T screw terminal panel 34 connecting signals analog output signals 50 current loop analog inputs 49 differential analog inputs 47 digital I O signals 51 event counting applications 52 frequency measurement applications 53 pseudo differential analog inputs 47 pulse output applications 53 single ended analog inputs 46 connector J1 132 connector J2 138 continuous analog input continuously paced scan mode 73 externally retriggered scan mode 76 post trigger 95 software retriggered scan mode 74 continuous analog output 95 continuous counter timer 87 95 conversion modes 73 continuous analog output 80 continuously paced scan mode 73 externally retriggered scan mode 76 single value analog input 73 single value analog output 80 software retriggered scan mode 74 conversion rate 73 74 76 counter timer 83 C T clock sources 83 channels 83 97 clock sources 101 connecting event counting signals 52 connecting frequency measurement signals 53 connecting pulse output signals 53 duty cycle 85 event counting 102 gate types 84 high edge gate type 102 high level gate type 102 high to low output pulse 102 internal gate type 102 interrupt driven operations 103 low edge gate type 102 low level gate type 102 one shot mode 102 operation modes 86 Index pulse outp
91. olid 30 AWG on 25 mil centers Connectors 100 pin Self Locking AMP amp 1 111196 6 129 Appendix 130 Connector Pin Assignments Board Connector Tl oe S eee eee te 132 DT730 and DT730 T Screw 134 UT atid DIZ30 T Connector I2 Pins leet RR wd eee de PUSS ERES 138 131 Appendix B Board Connector J1 Jl is a 100 pin double row connector on the rear of the board This connector accepts signals through the EP291 cable or a user designed cable Table 33 lists the pin assignments of connector J1 Table 33 Connector J1 Pin Assignments Signal Signal Pin Name Description Pin Name Description 100 ANINOO Analog In 00 99 ANINO8 Analog In 08 00 Return 98 ANINO1 Analog In 01 97 09 Analog In 09 01 Return 96 ANINO2 Analog In 02 95 ANIN10 Analog In 10 02 Return 94 ANINO3 Analog In 03 93 ANIN11 Analog In 11 03 Return 92 ANINO4 Analog In 04 91 ANIN12 Analog In 12 04 Return 90 ANINO5 Analog In 05 89 ANIN13 Analog In 13 05 Return 88 ANINO6 Analog In 06 87 ANIN14 Analog In 14 06 Return 86 ANINO7 Analog In 07 85 ANIN15 Analog In 15 07 Return 84 ANIN16 Analog In 16 83 ANIN24 Analog In 24 16 Return 82 ANIN17 Analog In 17 81 ANIN25 Analog In 25 17 Return 89 18 Analog In 18 79 ANIN26 Analog In 26 18 Return 78 ANIN19 Analog In 19
92. on The minimum frequency supported is 19 07 Hz 19 07 Samples s The maximum frequency supported varies depending on the board type as shown in Table 5 Table 5 Maximum Sampling Frequency Single Channel Multiple Channel Board Frequency Frequency DT3001 330 kHz 250 kHz DT3001 PGL 330 kHz 250 kHz DT3002 330 kHz 100 kHz DT3003 330 kHz 100 kHz DT3003 PGL 330 kHz 100 kHz DT3004 100 kHz 50 kHz DT3005 200 kHz 100 kHz a Unless otherwise indicated these rates assume a gain of 1 b Using gain of 100 the maximum frequency is 20 kHz using gain of 500 the maximum frequency is 4 kHz Using gain of 100 the maximum frequency is 10 kHz using gain of 500 the maximum frequency is 2 5 kHz According to sampling theory Nyquist Theorem specify a frequency that is at least twice as fast as the input s highest frequency component For example to accurately sample a 20 kHz signal specify a sampling frequency of at least 40 kHz Doing so avoids an error condition called aliasing in which high frequency input components erroneously appear as lower frequencies after sampling External A D Sample Clock The external A D sample clock is useful when you want to pace acquisitions at rates not available with the internal A D sample clock or when you want to pace at uneven intervals Connect an external A D sample clock to screw terminal TB8 on the DT730 or DT730 T screw terminal panel pin
93. or 7B Series Accessories 38 Chapter 4 Wiring 39 Before ae A ae Ne 41 Wiring 2 22 2 24 2 24 41 DT730 and DT730 T Screw Terminal 42 Connecting Analog Input Signals 46 Connecting Single Ended Voltage 46 Connecting Pseudo Differential Voltage 47 Connecting Differential Voltage Inputs 47 Connecting Current Loop 49 Connecting Analog Output Signals 50 Connecting Digital 1 2 2 2 2 2 2 2 2 2 2 51 Connecting Counter Timer Signals 52 Connecting Event Counting Signals 52 Connecting Frequency Measurement Signals 53 Connecting Pulse Output Signals 2 2 53 Chapter 5 Verifying the Operation of a DT3000 Series Board 55 Running the Quick DataAcq Application 57 Testing Single Value Analo
94. or all counter timer modes Logic low level external gate input Enables a counter timer operation when external gate signal is low and disables the counter timer operation when the external gate signal is high Note that this gate type is used only for event counting frequency measurement and rate generation refer to page 86 for more information on these modes Logic high level external gate input Enables a counter timer operation when the external gate signal is high and disables counter timer operation when the external gate signal is low Note that this gate type is used only for event counting frequency measurement and rate generation refer to page 86 for more information on these modes Falling edge external gate input Triggers counter timer operation on the transition from the high level to the low level falling edge In software this is called a low edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 86 for more information on these modes Principles of Operation Rising edge external gate input Triggers a counter timer operation on the transition from the low level to the high level rising edge In software this is called a high edge gate type Note that this gate type is used only for one shot and repetitive one shot mode refer to page 86 for more information on these modes Specify the gate type in software Connect the
95. oth voltage and current loop inputs You can connect analog input voltage signals to the DT730 in the following configurations Single ended Choose this configuration when you want to measure high level signals noise is not significant the source of the input is close to the DT730 or DT730 T screw terminal panel and all the input signals are referred to the same common ground When you choose the single ended configuration all 32 analog input channels are available Pseudo Differential Choose this configuration when noise or common mode voltage the difference between the ground potential of the signal source and the ground of the DT730 or DT730 T screw terminal panel or the difference between the grounds of other signals exists and the differential configuration is not suitable for your application This option provides less noise rejection than the differential configuration however all 32 analog input channels are available Differential Choose this configuration when you want to measure low level signals less than 1 V you are using an A D converter with high resolution gt 12 bits noise is significant part of the signal or common mode voltage exists and you want the most noise rejection When you choose the differential configuration 16 analog input channels are available Note We recommend that you connect all unused analog input channels to analog ground This section describes how to connect single
96. out degradation and bandwidth limit with higher capacitive loads The grounds of most boards are optimized for analog inputs at the expense of some logic or high frequency noise on the analog outputs This is because the analog and digital grounds of the board are connected at the ADC s input The analog outputs are brought out as a high and a low signal but the low side is the analog ground at the DAC s output buffer To remove high frequency noise and smooth the glitch energy on the analog outputs you can install a 15 kHz RC filter on the output 100 resistor in series with the output and a 0 1 UF capacitor between the output side of the 100 Qresistor and output low 143 Appendix C Digital Inputs and Counter Timer Inputs To prevent damage when power is removed you must provide current limiting circuitry for TTL type input On high speed clock inputs a ground that is located in the connector next to the clock must be connected as a twisted pair with the high speed clock input 144 Using Your Own Screw Terminal Panel Digital Outputs If you are using the high drive capability of a DT3000 Series board ensure that the load is returned to the digital ground provided in the connector next to the outputs If just eight of the digital outputs are switching 16 mA per output then 128 mA of current flows To minimize problems with ringing loading and EMI a 22 Qresistor is used in series with all digital outputs
97. output Through software specify the clock source as internal and the clock frequency at which to pace the analog output operation The minimum frequency supported is 9 54 Hz 9 54 Samples s the maximum frequency supported is 200 kHz 200 kSamples s Note When run simultaneously with the A D subsystem in triggered scan mode the maximum throughput of the D A subsystem is 100 kSamples s Trigger Sources A trigger is an event that occurs based on a specified set of conditions DT3000 Series boards support the following trigger sources Software trigger A software trigger event occurs when you start the analog output operation the computer issues a write to the board to begin conversions Specify the software trigger source in software External digital TTL trigger For analog output operations an external trigger event occurs when the DT3000 Series board detects either a rising or falling edge on the external trigger input signal connected to TB6 on the DT730 or DT730 T screw terminal panel pin 6 of connector J1 on the DT3000 Series board The trigger signal is TTL compatible The trigger pulse is recognized when it is of the correct polarity and has a pulse width greater than 500 ns When it is recognized the D A output clock is enabled Subsequent triggers are ignored trigger lockout until the operation is complete Once the operation is complete the board can detect another trigger 79 Chapter 6
98. output modules on the 5 01 7BP16 1 backplane ensure that you make no connections to the screw terminals corresponding to that signal on the screw terminal panel For example if you are using channel 14 on the 5B01 for analog output do not use screw terminals corresponding to DACO on the screw terminal panel You can read the output of the DACs as inputs Resistors Locations are provided on the DT730 and DT730 T for user installed bias return and current shunt resistors Resistors must be 1 4 W size The following subsections describe these resistors and their use Configuring Resistors R1 to R32 Input Bias Return Differential mode permits low level signal measurement by limiting common mode input noise This mode provides a separate return path for each channel For floating signal sources where the voltage source has no connection with earth ground you need to provide a bias return path by adding input bias return resistors Input bias resistors R1 through R32 connect the low sides of channels 0 to 31 to analog ground where R1 corresponds to channel 0 and R32 corresponds to channel 31 When input bias resistors are installed for an analog input channel the high or positive side of the analog input channel returns the source input impedance through the bias return resistor to the low side of the channel and then to analog ground Typical resistor values are 1 kQto 100 kQdepending on the application Refer to page 47 for an
99. pplication wiring analog output signals 50 current loop analog inputs 49 differential analog inputs 47 digital I O signals 51 event counting applications 52 frequency measurement applications 53 pseudo differential analog inputs 47 pulse output applications 53 single ended analog inputs 46 attaching the screw terminal panel 33 B banks digital I O 82 base clock frequency 101 BaseClockFrequency 101 bias return resistors 36 binary data encoding 97 bipolar signals 70 block diagram 68 buffers 81 96 inprocess flush 96 single wrap mode 96 147 Index 148 C C C programs 17 clock sources 83 external C T clock 84 internal clock 84 C T subsystem 83 cables AC1315 18 37 38 AC1393 18 AC1393 adapter 38 EP291 18 33 calibrating the board analog input 107 analog output 108 calibrating the DT730 T 109 CGLDepth 97 channel list analog input 70 analog output 78 channel type differential 69 97 pseudo differential 69 single ended 69 97 channel gain list 70 channel gain list depth 97 channels analog input 69 analog output 78 counter timer 83 digital I O 82 number of 97 circular buffer 81 CJC on 5B Series modules 38 on screw terminal panel 35 CJC channel 99 available 99 CjcChannel 99 clocks base frequency 101 external 101 external A D sample clock 72 external C T clock 84 internal 101 internal A D sample clock 72 internal C T clock 84 internal D A output clock 79 internal retrigger cl
100. program this is usually done by pressing the DEL key when rebooting your system Once in the system BIOS enter the PCI PnP BIOS setup and select a unique interrupt for each PCI slot The PCI BIOS assigns the interrupt the device on the PCI bus does not have control over the interrupt assignment Troubleshooting Table 21 Troubleshooting Problems cont Symptom Possible Cause Possible Solution Board does not respond cont The interrupt level is unacceptable cont Some network devices do not share interrupts If you still have an interrupt conflict try removing the network device installing the DT3000 Series board and rebooting the system then reinserting the network device Intermittent operation Loose connections or vibrations exist Check your wiring and tighten any loose connections or cushion vibration sources The board is overheating Check environmental and ambient temperature consult the board s specifications on page 127 of this manual and the documentation provided by your computer manufacturer for more information Electrical noise exists Check your wiring and either provide better shielding or reroute unshielded wiring Data appears to be invalid An open connection exists Check your wiring and fix any open connections Computer does not boot Board is not seated properly Check that the slot in which your DT3000 Series board is
101. put range for this channel is then 2 5 V which provides the best sampling accuracy for that channel The way you specify gain depends on how you specified the channels as described in the following subsections Specifying the Gain for a Single Channel The simplest way to specify gain for a single channel is to specify the gain for a single value analog input operation using software refer to page 73 for more information on single value Operations Specifying the Gain for One or More Channels For DT3000 Series boards you can use software to specify the gain for each analog input channel entry in the analog input channel list A D Sample Clock Sources DT3000 Series boards provide two clock sources for pacing analog input operations in continuous mode Aninternal A D sample clock that uses 16 bit A D Counter with a 4 bit prescaler on the board Anexternal A D sample clock that you can connect to the screw terminal panel The A D sample clock paces the acquisition of each channel in the channel list this clock is also called the A D pacer clock The following subsections describe the internal and external A D sample clocks in more detail 71 Chapter 6 72 Internal A D Sample Clock The internal A D sample clock uses a 20 MHz time base Conversions start on the falling edge of the counter output Using software specify the clock source as internal and the clock frequency at which to pace the operati
102. remainder of the period is 1 external clock frequency external clock divider In one shot and repetitive one shot mode you can use a duty cycle of 100 only The output of the specified C T subsystem goes low active for a period of 1 clock frequency then goes high inactive for the remainder of the period which is determined by the gate signal for repetitive one shot operations The clock frequency depends on the clock source You cannot use a level gate type with one shot or repetitive one shot mode You can use an edge gate type only with one shot and repetitive one shot mode 103 Chapter 7 104 Calibration Calibrating the A D OUbSyslefri oco dre Ne feen 107 Calibrating the Dy A SUbsySlem rages bene canna es 108 SEG LE ete cree Patent EEE 109 105 Chapter 8 106 To calibrate your DT3000 Series board you need precision voltage source and precision voltmeter 10 0 V range for both The accuracy of your calibration depends on the precision of this equipment and the care you take making the adjustments You can connect signals to the DT730 or DT730 T screw terminal panel or directly to the 1 connector on the board The adjustment potentiometers are clearly labeled on the board This chapter describes how to calibrate the A D and D A subsystems of the DT3000 Series boards and how to calibrate the DT730 T screw terminal panel Calibr
103. riptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 59 AIN44 AIN20 L R21 R53 60 AIN36 AIN20 H 61 AIN43 AIN19 L R20 R52 62 AIN35 AIN19 H 63 AIN42 18 R19 R51 64 AIN34 AIN18_H 65 AIN41 AIN17_L R18 R50 66 AIN33 AIN17_H 67 AIN40 AIN16_L R17 R49 68 AIN32 AIN16_H 69 AIN31 AIN15_L R16 R48 70 AIN23 AIN15_H 71 AIN30 AIN14_L R15 R47 72 AIN22 AIN14_H 73 AIN29 AIN13_L R14 R46 74 AIN21 AIN13_H 75 AIN28 AIN12_L R13 R45 76 AIN20 AIN12 H 77 AIN27 AIN11 L R12 R44 78 AIN19 AIN11 H 79 AIN26 AIN10 L R11 R43 80 AIN18 AIN10 H 81 AIN25 AINO9 R10 R42 82 AIN17 AINO9 83 AIN24 AINO8 R9 R41 84 AIN16 85 AIN15 AINO7 R8 R40 86 AINO7 AINO7 H 87 AIN14 AINO6 R7 R39 88 AINO6 AINO6_H 136 Connector Pin Assignments Table 34 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T cont Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 89 AIN13 AINO5_L R6 R38 90 AINO5 AINO5_H 91 AIN12 AINO4 L R5 R37 92 AINO4 AINO4 H 93 AIN11 L R4 R36 94 AINO3 H 95 AIN10 AINO2 L R3 R35 96 AINO2 AINO2 H 97 AINO9 AINO1 L R2 R34 98
104. ritten to the queued input buffers continuously when no more empty buffers are available on the queue the operation stops The data is gap free 77 Chapter 6 Analog Output Features An analog output D A subsystem is provided on all DT3000 Series boards except the DT3002 board which does not support analog output This section describes the following features of the D A subsystem Analog output resolution Analog output channels Output ranges and gains D A output clock sources Trigger sources Analog output conversion modes Data formats and transfer Analog Output Resolution All DT3000 Series boards except the DT3002 have a fixed analog output resolution of 12 bits The analog output resolution cannot be changed in software Analog Output Channels DT3000 Series boards except the DT3002 support two analog output channels DACO and DAC1 Refer to Chapter 4 starting on page 39 for information on how to wire analog output signals to the board using the screw terminal panel Use software to specify the configuration of the analog output channels as differential Within each DAC the digital data is double buffered to prevent spurious outputs then output as an analog signal Both DACs have single dedicated timer that latches the digital values into each DAC The DACs are initialized to 0 V on power up or reset DT3000 Series boards can output data from a single analog output channel or from both analog
105. rnally retriggered scan mode use software to specify the following parameters The dataflow as Continuous Triggered scan mode as enabled The retrigger mode as an external retrigger The number of times to scan per trigger or retrigger also called the multiscan count as 1 The initial trigger source as the external digital TTL trigger Principles of Operation Trigger Sources trigger is an event that occurs based on specified set of conditions DT3000 Series boards support the following trigger sources e Software trigger A software trigger event occurs when you start the analog input operation the computer issues a write to the board to begin conversions Specify the software trigger source in software External digital TTL trigger For analog input operations an external trigger event occurs when the DT3000 Series board detects either a rising or falling edge on the external trigger input signal connected to TB6 on the DT730 or DT730 T screw terminal panel pin 6 of connector J1 on the DT3000 Series board The trigger signal is TTL compatible The trigger pulse is recognized when it is of the correct polarity and has a pulse width greater than 500 ns When it is recognized the A D sample clock is enabled Subsequent triggers are ignored trigger lockout until the operation is complete Once the operation is complete the board can detect another trigger Using software specify the trigger
106. rrent 20 Mode Voltage 10 5 V maximum operational 11 V maximum operational ESD Protection Mil 38510 class 2 1500 V maximum Common Mode Rejection Ratio 60 Hz 1 kQ balanced 74 db Maximum Input Voltage 35 V maximum protection A D Converter Noise 0 3 LSB RMS Amplifier Input Noise 15 0 UVims 5 UV rms Gain 20 0 PArms current 20 0 rms voltage 20 0 PArms current Specifications Table 22 Analog Input Specifications cont DT3001 DT3001 PGL DT3002 DT3003 Feature DT3003 PGL DT3004 DT3005 Channel to Channel 80 0 uV 40 0 uV Offset Channel Acquisition 3 us 10 us for DT3004 Time 5 us for DT3005 A D Conversion Time 3 us 10 us for DT3004 5 us for DT3005 Total Harmonic 74 dB typical 84 dB typical Distortion amp 1kHz input 100kHz rate Channel Crosstalk 80 dB 1 kHz Data Throughput 330 5 5 100 kS s for DT3004 Single Channel Data Throughput Scan 300 kS s see Table 24 for typical accuracy 200 kS s for DT3005 50 kS s for DT3004 100 kS s for DT3005 Effective Number of Bits 11 5 13 5 119 Appendix A 120 Table 23 Typical Single Channel Accuracy Channel Gain List Single Channel Model Gain 330 kHz 100 kHz 200 kHz DT3001 1 0 03 N A N A
107. s Trigger sources and trigger acquisition modes Data formats and transfer Analog Input Resolution The DT3001 DT3001 PGL DT3002 DT3003 and DT3003 PGL boards have a fixed analog input resolution of 12 bits The DT3004 and DT3005 boards have a fixed analog input resolution of 16 bits The analog input resolution cannot be changed Analog Input Channels DT3001 DT3001 PGL DT3004 and DT3005 boards support 16 single ended or pseudo differential analog input channels or 8 differential analog input channels The DT3002 board supports 32 single ended or pseudo differential analog input channels or 16 differential analog input channels The DT3003 and DT3003 PGL boards support 64 single ended or pseudo differential analog input channels or 32 differential analog input channels Table 3 summarizes the number of channels supported Table 3 Number of Channels Supported Single Ended Pseudo Differential Differential Board Channels Channels Channels DT3001 16 16 8 DT3001 PGL 16 16 8 DT3002 32 32 16 DT3003 64 64 32 DT3003 PGL 64 64 32 DT3004 16 16 8 DT3005 16 16 8 Refer to Chapter 4 starting on page 39 for a description of how to wire these signals Use software to specify the channel type 69 Chapter 6 70 Note For pseudo differential inputs specify single ended in software in this case how you wire these signals determines the configuration All input channels have hig
108. s only with counter timer 0 2 In the Quick DataAcq application choose Pulse Generator from the Control menu 3 Select the appropriate DT3000 Series board from the Board list box 4 Select either Continuous to output a continuous pulse stream or One Shot to output one pulse 5 Select either Low to high to output a rising edge pulse the high portion of the total pulse output period is the active portion of the signal or High to low to output a falling edge pulse the low portion of the total pulse output period is the active portion of the signal 6 Enter a percentage or use the slider to select a percentage for the pulse width The pulse width determines the duty cycle of the pulse 7 Click Start to generate the pulse s The application displays the results both in text and graphical form 8 Click Stop to stop a continuous pulse output operation One shot pulse output operations stop automatically 64 Part 2 Using Your Board D Principles of Operation Input A EE VE 69 AROS Output Peares o a E 78 Digital L O Peru 82 Counter Timer Portrait A pee a te ne dese 83 lj rur je 91 67 Chapter 6 68 This chapter describes the analog input analog output digital I O counter timer and interrupt features of the DT3000 Series boards To frame the discussions refer to the block diagram shown in Figure 19 Note that bold entries indi
109. sSingleValue Yes Yes Yes Yes Simultaneous Single Value Output Operations SupportsSetSingle Values Continuous Operation Support SupportsContinuous Yes Yes Yes Continuous Operation until Trigger SupportsContinuousPreTrigger Continuous Operation before amp after Trigger SupportsContinuousPrePostTrigger Waveform Operations Using FIFO Only SupportsWaveformModeOnly Simultaneous Start List Support SupportsSimultaneousStart Supports Programmable Synchronization Modes SupportsSynchronization Synchronization Modes SynchronizationMode Interrupt Support SupportsinterruptOnChange Output FIFO Size FifoSize Auto Calibrate Support SupportsAutoCalibrate 95 Chapter 7 96 Buffering Table 9 DT3000 Series Buffering Options DT3000 Series Buffer Support SupportsBuffering A D Yes D A Yes DIN DOUT QUAD Single Buffer Wrap Mode Support SupportsWrapSingle Yes Inprocess Buffer Flush Support SupportsinProcessFlush Yes Triggered Scan Mode Table 10 DT3000 Series Triggered Scan Mode Options DT3000 Series Triggered Scan Support SupportsTriggeredScan A D Yes D A DIN DOUT C T QUAD Maximum Number of CGL Scans per Trigger MaxMultiScanCount 1 Maximum Retrigger Frequency MaxRetriggerFreq 333 kHz 100 kHz 200 kHz Minimum Retrigger Frequency
110. sica Spec BHONE EEE EE e AAA ed eia i beast e ca ens 127 AT ou and DTZSIET Specie tiene ede cake ee E rhe LE dE PER I RS hr retten 128 EP29 Cable Hodie ccce esten eda DRE ERE HERD ERE Vie Yd e 129 117 Appendix A 118 Analog Input Specifications Table 22 lists the analog input specifications for the DT3000 Series boards Feature Table 22 Analog Input Specifications DT3001 DT3001 PGL DT3002 DT3003 DT3003 PGL DT3004 DT3005 Resolution Coding 12 bits offset binary 16 bits twos complement System Accuracy FSR Guaranteed 0 03 Gain 1 0 04 Gain 10 0 05 Q Gain 100 0 10 Q Gain 500 See Table 24 for typical values 0 017 Gain 1 Integral Nonlinearity 0 03 of FSR maximum 0 01 of FSR maximum Differential Nonlinearity 0 75 LSB No missing codes to 12 bits 1 5 LSB Monotonic to 15 bits Range Bipolar Only 10 V A D Zero Drift 20 0 UVims 10 UVims 10 UV ms C Gain Drift 30 20 C Number of Analog 16 SE 8 DI DT3001 and 16 SE 8DI Inputs DT3001 PGL 32 SE 16 DI DT3002 64 SE 32 DI DT3003 and DT3003 PGL Gain Ranges 1 2 4 8 1 2 4 8 1 10 100 500 for DT3001 PGL and DT3003 PGL Input Impedance 100 MQ 10 pF Off 100 MQ 400 pF On with 100 Q series resistor 100 MQ 10 pF Off 100 100 pF with 330 Q series resistor Input Bias Cu
111. sion Interference This equipment has been tested and found to comply with CISPR EN55022 Class and EN50082 1 CE requirements and also with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Changes or modifications to this equipment not expressly approved by Data Translation could void your authority to operate the equipment under Part 15 of the FCC Rules Note This product was verified to meet FCC requirements under test conditions that included use of shielded cables and connectors between system components It is important that you use shielded cables and connectors to reduce the possibility of causing interference to radio television and other electronic devices Canadian Department of Communications Statement This digital apparatus does not exceed the Class A limits for radio noise emissions from digital apparatus set out in the Radio Interference Regulations of the Canadian Departmen
112. software uses the Windows timer to specify the duration of the frequency measurement The frequency of the clock input is the number of counts divided by the duration of the Windows timer Connecting Pulse Output Signals Figure 17 shows one example of connecting pulse output signals to the DT730 or DT730 T screw terminal panel using an external gate type Digital Ground Heater Controller TB3 User Counter Output D TB5 Gate Input p TB7 Gating Switch External D D Digital Ground DT730 or DT730 T Panel Figure 17 Connecting Pulse Output Signals Using an External Gate 53 Chapter 4 Figure 18 shows another example of connecting pulse output operation to the DT730 or DT730 T screw terminal panel using a software gate type Digital Ground D TB1 Heater Controller TB3 User Counter Output O 5 D FG oD User Clock Input 0 Teg D Signal Source DT730 or DT730 T Panel Digital Ground Figure 18 Connecting Pulse Output Signals Using an External Gate 54 Y Verifying the Operation of a DT3000 Series Board Running the Quick DataAcq Application cese m eR seeren 57 Testing omple yalue Analog Inpub as ck ice eds en A aa en Cae ua ES EE Ya ende 58
113. specified number of samples stops all subsequent acquisition and transfers the acquired data to host memory all subsequent triggers or retriggers are ignored In an abrupt stop the board stops acquiring samples immediately the acquired data is not transferred to host memory but all subsequent triggers or retriggers are ignored Continuously Paced Scan Mode Use continuously paced scan mode if you want to accurately control the period between conversions of individual channels scan When it detects an initial trigger the board cycles through the channel list acquiring and converting the value for each entry in the channel list this process is defined as the scan The board then wraps to the start of the channel list and repeats the process continuously until either the allocated buffers are filled or until you stop the operation Refer to page 77 for more information on buffers conversion rate is determined by the frequency of the A D sample clock refer to page 71 for more information on the A D sample clock The sample rate which is the rate at which a single entry in the channel list is sampled is determined by the frequency of the A D sample clock divided by the number of entries in the channel list To select continuously paced scan mode use software to specify the dataflow as continuous and to specify the trigger source as either internal or external Refer to page 77 for more information on the supported trigger so
114. st installing the board it is recommended that you do the following Wire function generator or a known voltage source to analog input channel 0 use differential configuration Wire an oscilloscope or voltage meter to analog output channel 0 Wire a digital input to digital I O Port A Wire a external clock or scope to counter timer channel 0 If you have not done so already install the DT3000 Series software Run the Quick DataAcq application described in Chapter 5 starting on page 55 to verify that the board is operating properly Once you have determined that the board is operating properly wire the signals according to your application s requirements 41 Chapter 4 DT730 and DT730 T Screw Terminal Assignments Table 2 describes each of the screw terminal assignments and identifies the resistors that are associated with each channel Table 2 Screw Terminal Descriptions and Resistor Use for the DT730 and DT730 T Screw Signal Name Resistor Used Terminal Number Single Ended Differential Bias Return Current Shunt 1 Digital Ground Not Applicable 2 Digital Ground 3 UCLK OUT 4 IADCLKO 5 USER GATE 6 EADTRIG EDATRIG 7 USER 8 EADCLK1 9 Digital Ground 10 Digital Ground 11 RESERVED 12 RESERVED 13 5V_OUT 14 5V_OUT 15 Digital Ground 16 Digital Ground 17 DIG_IOB3 18 DIG_IOA3 19 DIG 10B
115. st scanned duration of the channel list scanned duration of the once retrigger frequency once retrigger frequency Figure 21 Software Retriggered Scan Mode Externally Retriggered Scan Mode Use externally retriggered scan mode if you want to accurately control the period between conversions of individual channels and retrigger the scan based on an external event When it detects the initial trigger the board scans the channel list once then waits for the external retrigger to occur On DT3000 Series boards the initial trigger and the retrigger source must be an external digital TTL trigger TB6 on the DT730 and DT730 T screw terminal or pin 6 of connector J1 on the DT3000 Series board When the retrigger occurs the board scans the channel list once then waits for another external retrigger to occur The process repeats continuously until either the allocated buffers are filled or you stop the operation refer to page 77 for more information on buffers The conversion rate of each channel is determined by the frequency of A D sample clock refer to page 71 for more information on the A D sample clock The conversion rate of each scan is determined by the period between external retriggers therefore it cannot be accurately controlled The board ignores external triggers that occur while it is acquiring data Only external retrigger events that occur when the board is waiting for a retrigger are detected and acted on To select exte
116. t of Communications Le pr sent appareil num rique n met de bruits radio lectriques d passant les limites applicables aux appareils num riques de la class prescrites dans le Reglement sur le brouillage radio lectrique dict par le Ministere des Communications du Canada Table of Contents About this 11 Intended Audience Eo bebe EE Er he PER BA are he he 11 How this Manual is Organized 2 2 11 Conventions Used in this 12 Related Information 2I dd S e ie Lee Fi se pte oe eis 12 Where Get Help 4 5 caede eee e ee cede 13 Chapter 1 Overview 15 Features eena eie OR a ee RE SE AR A Rp reete Ru 16 Supported Software oo deret PER di eR ete ies 17 Accessories s eR dai XH ATA ER E E 18 Getting Started 19 Part 1 Getting 21 Chapter 2 Installing the Board and Loading the Device Driver 23 Unp cking zc tute ske RECIBIR e 25 Setting up the Comp ler iiis ese eee en e Ress med dul oa ls 26 Setting up an Expansion
117. t the differential signals to the DT730 or DT730 T screw terminal panel as shown in Figure 10 using an input bias return resistor if the external ground signal is floating In this case make sure that the low side of the signal 3 is connected to ground at the signal source not at the DT730 or DT730 T screw terminal panel and do not tie the two grounds together Wiring Signals Analog In 0 DO Grounded 7 100 DT730 Signal Es Source N Analog In 0 n M Return Ri D TB36 Signal Source Ground V Install resistor R1 for bias return if the external ground is floating Figure 10 Connecting Differential Voltage Inputs from a Grounded Signal Source Shown for Channel 0 Connecting Current Loop Inputs Figure 11 shows how to connect a current loop input channel 0 in this case to the DT730 or DT730 T screw terminal panel Vcc 4 to 20 mA pm Analog Input 0 DT730 Analog Input 0 D or DT730 T Return R33 O Panel D Analog Ground 6 Use current shunt resistor R33 to convert current to voltage 250 Qfor 4 to 20 mA 1 to 5 V If needed also use resistor R1 to provide bias return path Figure 11 Connecting Current Inputs to the DT730 or DT730 T Screw Terminal Panel Shown for Channel 0 49 Chapter 4 Connecting Analog Output Signals Figure 12 shows how to connect an analog
118. ta Format and Transfer 21 81 Digital I O Features sanne canica dac tpe dates 82 rd baserer li cla d 82 Digital I O Resolution sesin ta a a A 82 Digital I O Operation 82 Counter Timer Features Seka rd EXC EUER 83 Counter Timer Channels 83 C T Clock Sources eo cerrara 83 Internal OAT Clock 2 teres wr Canes waste ler eh asks visite da 84 ExternabC 7T Clock a 84 Gate PAD DR peque v eue dd iy vba e dae 84 Pulse Output Signals and Duty Cycles 85 Counter Timer Operation Modes 86 Event Counting secs kosae ehs cada nb ER AU ed 86 Frequency Measurement 87 Rate Generation sv eee yi ei i eee bee eres 87 One Shot Aaa be kes fas 88 Repetitive OneShot saene ee s er et ad dad 89 Interrupts AS aah ent A AAA 91 Chapter 7 Supported Device Driver 93 Data Flow and Operation 95 D utfering
119. ter 2 Check that you have loaded the device driver properly using the instructions in Chapter 2 Search the Knowledgebase in Support section of the Data Translation web site at www datatranslation com for an answer to your problem If you still experience problems try using the information in Table 21 to isolate and solve the problem If you cannot identify the problem refer to page 115 Table 21 Troubleshooting Problems Symptom Possible Cause Possible Solution respond Board does not The board configuration is incorrect Check the configuration of your device driver to ensure that the board name and type are correct The board is incorrectly aligned Check that the slot in which your DT3000 Series PCI expansion slot board is located is PCI slot and that the board is correctly seated in the slot The board is damaged Contact Data Translation for technical support refer to page 115 The interrupt level is unacceptable An interrupt conflict exists in your system The most common interrupt conflict occurs with a PCI device and a device that is plugged into the ISA bus To resolve this problem change the interrupt setting usually by changing a jumper on the ISA device An interrupt conflict can also occur if a PCI device was not designed to share interrupts To resolve this problem select a different interrupt for each PCI slot in the PCI BIOS To do this enter the system BIOS
120. tland OR Revision 2 1 June 1 1995 e Microsoft Windows XP Windows Vista or Windows 7 documentation Where To Get Help Should you run into problems installing or using a DT3000 Series board our Technical Support Department is available to provide technical assistance Refer to Chapter 9 starting on page 111 for more information If you are outside the U S or Canada call your local distributor whose number is listed on our web site www datatranslation com 13 About this Manual 14 Overview llc MED 16 supported isiecsse c Re Dre tr de chide I De EE PEE enn i FESTE sad se k re eee cede Reb px CERE RUE CEP ES eee 18 Getting Sted Prop Am ciere ebbe bere i ee ee ee eR seende 19 15 Chapter 1 16 Features The DT3000 Series PCI EZ data acquisition boards were designed for high channel count high speed data acquisition applications on the PCI bus They are ideal for data logging and signal analysis applications in the medical process automation and aerospace industries The major features of the DT3000 Series boards are as follows Two 10 V analog outputs all but the DT3002 at 200kHz each 8 user selectable digital input output signals A 16 bit counter timer for external functions An onboard digital signal processor DSP that operates as a slave to the host processor user access to the DSP is not supported Table 1 Differentiating Features of D
121. upportsInternalClock 101 SupportsInterrupt 103 SupportsNegExternalTTLTrigger 100 SupportsOneShot 102 SupportsOneShotRepeat 102 SupportsPosExternalTTLTrigger 100 SupportsProgrammableGain 98 SupportsRateGenerate 102 SupportsSingleEnded 97 SupportsSingle Value 95 SupportsSoftwareResolution 98 SupportsSoftwareTrigger 100 SupportsThermocouple 99 SupportsTriggeredScan 96 SupportsTwosCompEncoding 97 SupportsVariablePulseWidth 102 Index SupportsWrapSingle 96 T technical support 115 thermocouple support 99 ThermocoupleType 99 throughput maximum 101 minimum 101 transferring data analog input 77 analog output 81 trigger sources external gate 80 external trigger 77 79 software trigger 77 79 triggered scan 74 96 number of scans per trigger 96 retrigger frequency 96 Triggered Scan Counter 74 triggers external negative digital 100 external positive digital 100 software 100 troubleshooting procedure 112 service and support procedure 115 troubleshooting table 112 twos complement data encoding 97 U unipolar signals 70 unpacking 25 using your own screw terminal panel 139 V variable pulse width 102 Visual Basic for NET programs 17 Visual Basic programs 17 Visual programs 17 Visual C programs 17 voltage ranges 98 number of 98 W W1 jumper 35 W2 jumper 35 W3 jumper 35 W4 jumper 35 W5 jumper 35 W6 jumper 35 W7 jumper 35 Windows 7 loading the device driver 30 Windows Vista loading the device driver
122. urces Figure 20 illustrates continuously paced scan mode using a channel list with three entries channel 0 channel 1 and channel 2 In this example analog input data is acquired on each clock pulse of the A D sample clock The board wraps to the beginning of the channel list and repeats continuously 73 Chapter 6 74 Chano 2 0 Chan2 0 Chan2 Chan 0 Chan 2 Chan 1 Chan 1 Chan 1 Chan 1 Sample Clock Post trigger data acquired Trigger occurs continuously Figure 20 Continuously Paced Scan Mode Triggered Scan Mode DT3000 Series boards support two triggered scan modes software retriggered and externally retriggered These modes are described in the following subsections Software Retriggered Scan Mode Use software retriggered scan mode if you want to accurately control both the period between conversions of individual channels in a scan and the period between each scan Specify any supported trigger source as the initial trigger The retrigger source is the retrigger clock on the board When it detects an initial trigger the board scans the channel list once then waits software retrigger to occur When the board detects a software retrigger the board scans the channel list once then waits for another software retrigger to occur The process repeats continuously until either the allocated buffers are filled or
123. ut types 85 rate generation mode 102 repetitive one shot mode 102 specifications 124 variable pulse width 102 when not using the DT730 DT730 T 144 counting events 86 current loop inputs 49 current shunt resistors 36 customer service 116 D D A subsystem 78 DAQ Adaptor for MATLAB 17 data encoding 97 analog input 77 analog output 81 data flow modes continuous C T 95 continuous post trigger 95 single value 95 data format analog input 77 analog output 81 data transfer analog input 77 analog output 81 DataAcq SDK 17 description of the functional subsystems A D 69 C T 83 D A 78 DIN and DOUT 82 device driver 17 differential channels 97 differential inputs 46 47 when not using the DT730 DT730 T 142 digital I O features 82 lines 82 operation modes 82 resolution 82 specifications 123 digital inputs when not using the DT730 DT730 T 144 digital outputs when not using the DT730 DT730 T 145 DIN subsystem 82 DOUT subsystem 82 DT3000 Series Device Driver 17 DT730 or DT730 T screw terminal panel 18 33 connector J2 pin assignments 138 screw terminal assignments 134 specifications 128 DT Open Layers for NET Class Library 17 DTx EZ 17 duty cycle 85 edge gate type high 85 low 84 EMI emissions 33 enclosure 18 encoding data analog input 77 analog output 81 EP291 cable 18 33 specifications 129 event counting 52 86 102 expansion slot selection 27 external clock 101 A D sample 72 C T 84 external clock di
124. vider maximum 101 minimum 101 external gate analog output 80 external negative digital trigger 100 external positive digital trigger 100 external trigger analog input 77 analog output 79 specifications 125 externally retriggered scan mode 76 F factory service 116 falling edge gate 84 features 16 analog input 69 analog output 78 counter timer 83 digital I O 82 ferrite clamp 33 formatting data analog input 77 analog output 81 149 Index 150 frequency base clock 101 external A D sample clock 72 external C T clock 84 internal A D clock 101 internal A D sample clock 72 101 internal C T clock 84 101 internal D A output clock 79 internal retrigger clock 74 96 frequency measurement 87 G gain actual available 98 analog input 70 analog output 79 number of 98 programmable 98 gate type 84 falling edge 84 high edge 102 high level 102 internal 102 logic high level 84 logic low level 84 low edge 102 low level 102 none software 84 rising edge 85 generating continuous pulses 87 ground sense 35 H help online 57 HES14 21 power supply 18 high edge gate 85 high edge gate type 102 high level gate type 102 high to low pulse output 85 I inprocess buffers 96 input bias return resistors 36 input configuration differential analog 46 pseudo differential analog 46 single ended analog 46 input ranges 70 inserting the board 28 internal clock 101 A D sample 72 84 D A output 79 inter
125. ware to specify the counter timer mode as frequency measurement or event counting and specify the duration of the Windows timer over which to measure the frequency The Windows timer uses a resolution of 1 ms Frequency is determined using the following equation Frequency Measurement Number of Events Duration of the Windows Timer Figure 25 shows an example of a frequency measurement operation In this example three events are counted during a duration of 300 ms The frequency is 10 Hz since 10 Hz 3 3 s 3 Events Counted External C T Clock Input Signal Duration over which the frequency is measured 300 ms frequency measurement frequency starts measurement stops Figure 25 Example of Frequency Measurement Rate Generation Use rate generation mode to generate continuous pulse output signal from the counter this mode is sometimes referred to as continuous pulse output or pulse train output You can use this pulse output signal as an external clock to pace other operations such as analog input While the pulse output operation is enabled the counter outputs pulse of the specified type and frequency continuously As soon as the operation is disabled rate generation stops The period of the output pulse is determined by the clock input signal and the external clock divider You can output pulses using a maximum frequency of 5 MHz this is the frequency of the clock output signa
126. wer up the computer 9 Follow the steps on page 29 28 Installing the Board and Loading the Device Driver Loading the Device Driver To load the DT3000 Series device driver in Windows XP follow the steps on page 29 Windows Vista follow the steps on page 29 Windows 7 follow the steps on page 30 Windows XP Once you have installed the software from the Data Acquisition OMNI CD installed a DT3000 Series board and powered up the host computer the New Hardware Found dialog box appears Do the following to load the device driver in Windows XP 1 Click Next Click Search for a suitable driver for my device recommended Click Specify a location and click Next 2 3 4 Browse to Windows NInfNDT3000 Inf and then click Open 5 Click OK 6 Click Next The files are copied 7 Click Finish Once the driver is loaded perform the steps in Chapter 3 starting on page 31 to attach and configure the screw terminal panel and signal conditioning backplane Windows Vista Once you have installed the software from the Data Acquisition OMNI CD installed DT3000 Series board and powered up the host computer the New Hardware Found dialog box appears Do the following to load the device driver in Windows Vista 1 Click Locate and install driver software recommended The popup message Windows needs your permission to continue appears 2 Click Continue The Windows Security dialog box appears
127. when adjacent channels have high speed signals especially if these signals are TTL type with high speed edges If it is provided and not used ensure that you connect Amp Low to the analog common of the DT3000 Series board or to ground when running in single ended mode Pseudo Differential Inputs Pseudo differential inputs allow one common mode voltage for all single ended inputs With this type of connection the low side of the instrumentation amplifier is used to sense an external common mode voltage For example if you have a signal conditioning rack the Amp Low signal connects to the analog common of the external rack The pseudo differential configuration allows you to use the maximum number of input channels while placing an impedance between the external ground and the data acquisition ground or analog common Even if it is 100 Q this impedance provides the bias return currents for the inputs and causes only 10 mA of current to flow with a ground potential difference of 1 V The input bias current is typically in milliamperes This is usually manageable by the common mode range of the instrumentation amplifier and analog ground system Consider the problems with 1 Qof impedance between 1 V of potential difference The resulting 1 A of current causes many problems in the analog signal integrity 141 Appendix C If it is available use Amp Low as remote ground sense when running pseudo differential mode Differential
128. y of the clock output signal The maximum frequency that you can specify for the clock output signal is 5 MHz The minimum frequency that you can specify for the clock output signal is 9 54 Hz External C T Clock The external C T clock is useful when you want to pace counter timer operations at rates not available with the internal clock or if you want to pace at uneven intervals Counter timer operations start on the rising edge of the clock input signal Using software specify the clock source as external and the clock divider used to determine the frequency at which to pace the operation this is the frequency of the clock output signal The minimum clock divider that you can specify is 2 0 the maximum clock divider that you can specify is 65 535 For example if you supply an external C T clock with a frequency of 2 MHz and specify clock divider of 2 the resulting frequency of the external clock output signal is 1 MHz Connect the external clock input signal to TB7 of the DT730 or DT730 T screw terminal panel pin 7 of connector J1 on the DT3000 Series board Gate Types The active edge or level of the gate input to the counter enables counter timer operations The operation starts when the clock input signal is received DT3000 Series boards provide the following gate input types software command enables any specified counter timer operation immediately after execution This gate type is useful f
129. y paced scan mode or triggered scan mode from the first entry to the last entry in the channel list The board reads the entries in the channel list once per trigger using triggered scan mode Refer to page 73 for more information on the supported conversion modes Input Ranges and Gains Each channel on the DT3000 Series board can measure bipolar analog input signals between 10 V to 10 V A bipolar signal extends between the negative and positive peak values of the range You specify the range in software Note that the range applies to the entire analog input subsystem not to a specific channel The DT3001 DT3002 DT3003 DT3004 and DT3005 boards provide gains 1 2 4 and 8 the DT3001 PGL and DT3003 PGL boards provide gains of 1 10 100 and 500 Gains on all DT3000 Series boards are programmable per channel Table 4 lists the effective ranges supported by DT3000 Series boards using these gains Principles of Operation Table 4 Gains and Effective Ranges Bipolar Analog Bipolar Analog Gain Input Range Gain Input Range 1 10 V 1 10 V 2 5 V 10 1V 4 2 5 V 100 0 1 V 8 1 25 V 500 0 02 V For each channel choose the gain that has the smallest effective range that includes the signal you want to measure For example if the range of your analog input signal on a DT3001 board is 1 5 V specify a range of 10 V to 10 V for the board and use a gain of 4 for the channel the effective in

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