PE0201 CMX703x Series Evaluation Kit User Manual
Contents
1. 75 3 3 3 3 100 0 1 50 1 Not including any current drawn from pins by external circuitry 2 Small signal impedance 3 Timing for an external input to the CLOCK XTAL pin 4 Max 100 3 45 3 45 3 45 PE0201 Units lt lt lt kQ MQ ns ns MQ MHz dBm UM0201 5 PE0201 Evaluation Kit PE0201 7 1 3 Operating Characteristics Timing Diagrams See relevant CMX703x documentation for C BUS signal timing information 2006 CML Microsystems Plc 19 UM0201 5 PE0201 Evaluation Kit PE0201 Infinite Capabilities FirmASIC About FirmASIC o Maximum Flexibility CML s proprietary FirmASICTM component technology reduces cost time to market and development risk with increased flexibility for the designer and end application FirmASIC combines Analogue Digital Firmware and Memory technologies in a single silicon platform that can be focused to deliver the right feature mix performance and price for a target application family Specific functions of a FirmASICTM device are determined by uploading its Function Image during device initialization New Function Images may be later provided to supplement and enhance device functions expanding or modifying end product features without the need for expensive and time consuming design changes FirmASICTM devices provide significant time to market and commercial benefits over Custom ASIC Structured ASIC FPGA and DSP solutions They may also2. J1 Figure 1 Block Diagram 2006 CML Microsystems Plc 3 UM0201 5 PE0201 Evaluation Kit PE0201 2 1 2 2 2 2 1 2 2 2 2 3 Preliminary Information The CMX703x device fitted to the PE0201 has very little inherent functionality The functionality must come from a Function Image M which is downloaded from the CML website The PE0201 is designed to support a range of CMX703x FirmASIC devices with their respective function images Not all features of the PE0201 will be available with a given Function Image Laboratory Equipment The following laboratory equipment is needed to use this evaluation kit A 5 Volt dc regulated power supply If being used with the PE0001 Interface Card the following items will also be required 1 An IBM compatible PC equipped with a serial port and with one of the following Microsoft operating systems installed 98 NT 2000sp4 or XP 2 Software application ES000110 exe or later version installed on the PC 3 RS232 9 way DTE lt gt DCE cable Precautions Like most evaluation kits this product is designed for use in office and laboratory environments The following practices will help ensure its proper operation Static Protection This product uses low power CMOS circuits which can be damaged by electrostatic discharge Partially damaged circuits can function erroneously leading to misleading results Observe ESD precautions at all times when handling this product Conten
3. Isolates analogue supply rail from CMX703x Isolates charge pump supply rail from CMX703x Isolates digital supply rail from CMX703x Write protects EEPROM when shorted 19 2MHz TXCO clock source External clock source Crystal clock source if components fitted by customer Ground external clock input Crystal clock source if components fitted by customer Manual C BUS open or RS232 selection short Manual BootEn1 control short HI Manual BootEn2 control short Hl Ground input to uncommitted buffer Ground input to uncommitted buffer2 Indicates that digital supply voltage is present Notes I P Input O P Output BI Bidirectional N C Not connected PWR Power supply connection 2006 CML Microsystems Plc 10 UM0201 5 PE0201 PE0201 Evaluation Kit Circuit Schematics and Board Layouts 5 For clarity circuit schematics are available as a separate high resolution pdf file This can be found on the CML website ZHINO9P car 8 82 dia GaND 9 6 9 al AO AGT e lt os e ag 84 n 2d sa Ke per nie ex 559 al GGND CIA zed EL O VGND en 6 9 m ga amp dL O e0l sdl Da zx OH DE IH LS ETS 9r Le EEE or 199
4. be exclusively customised where security or intellectual property issues prevent the use of Application Specific Standard Products ASSP s CML does not assume any responsibility for the use of any circuitry described No IPR or circuit patent licences are implied CML reserves the right at any time without notice to change the said circuitry and any part of this product specification Evaluation kits and demonstration boards are supplied for the sole purpose of demonstrating the operation of CML products and are supplied without warranty They are intended for use in a laboratory environment only and are not for re sale end use or incorporation into other equipments Operation of these kits and boards outside a laboratory environment is not permitted within the European Community All software firmware is supplied as is and is without warranty It forms part of the product supplied and is licensed for use only with this product for the purpose of demonstrating the operation of CML products Whilst all reasonable efforts are made to ensure that software firmware contained in this product is virus free CML accepts no resonsibility whatsoever for any contamination which results from using this product and the onus for checking that the software firmware is virus free is placed on the purchaser of this evaluation kit or development board www cmimicro com For FAQs see www cmimicro com products fags For a full data sheet listing see www cmimi
5. provide three CMX703x device clock options The board is supplied with a 19 2MHz oscillator module fitted This option allows convenient RF synthesiser configuration to typical channel spacings If a Fl providing an auxiliary DAC at AuxDAC4 is used then fine tuning of the output frequency is possible A 3 9kQ resistor should be fitted in position R21 for this purpose Other options are an external clock source at J3 and PCB footprints for assembly of a quartz crystal oscillator circuit C34 C35 and X1 Header J4 is used with jumper sockets to select the required option as shown in the table below Shaded cells illustrate locations where a jumper socket should be fitted J4 Clock option Jumper 19 2MHz TCXO External Quartz crystal position default 1 gt 2 3 gt 4 5 gt 6 7 gt 8 9 gt 10 Table 1 Clock Select Jumper Positions Control Interface The C BUS and CMX703x boot control signals are brought out on connector J1 This is a right angle male header designed to plug directly into the PE0001 controller card which has a matching female header Additionally this connector carries the 3 3V digital supply rail which can be used to power the PE0001 card Alternatively if not using the PE0001 the CMX703x boot control signals can be manually set with jumpers on header J9 2006 CML Microsystems Plc 12 UM0201 5 PE0201 Evaluation Kit PE0201 6 2 It is possible that a future CMX703
6. BUF2IN I P High impedance buffered input 19 BUF2OUT O P Buffered output 2 4 6 8 GNDA PWR Analogue supply ground 10 12 14 16 18 20 J11 1 AUXADC4 I P Auxiliary ADC input 2 AUXDAC1 O P Auxiliary DAC output 3 AUXADC3 I P Auxiliary ADC input 4 AUXDAC2 O P Auxiliary DAC output 5 AUXADC2 I P Auxiliary ADC input 6 AUXDAC3 O P Auxiliary DAC output 7 AUXADC1 I P Auxiliary ADC input 8 AUXDAC4 O P Auxiliary DAC output 2006 CML Microsystems Plc 8 UM0201 5 PE0201 Evaluation Kit PE0201 CONNECTOR PINOUT Connector Connector Signal Signal Description Ref Pin No Name Type p ow ano Analogue supply ground 11 12 13 14 Digital supply ground 15 16 17 Do not connect these pins 18 19 General purpose I O pin 20 General purpose I O pin TEST POINTS Test Point Default Des ription Ref Measurement p CMX703x system clock 1 output CMX703x system clock 2 output CP1OUT charge pump output for RF synthesiser 1 CP2OUT charge pump output for RF synthesiser 2 not fitted Output from on board regulator DC supply voltage for analogue rail Output from on board regulator DC supply voltage for digital rail Output from on board regulator DC supply voltage for RF Charge Pump and 460MHz VCO GNDD digital ground GNDD digital ground GNDA analogue ground GNDA analogue ground 2006 CML Microsystems Plc 9 UM0201 5 PE0201 Evaluation Kit PE0201 JUMPERS LINKS Link Default RE T renon DE
7. C CSN Chip select Connects to host uC N C CDATA Serial Data input Connects to host uC N C SCLK Serial clock input Connects to host uC N C RDATA Serial data output Connects to host uC N C oOo N OO P O N o 10 IRQN Interrupt request Connects to host uC 12 GNDD Digital supply ground 13 BOOTEN1 CMX703x Hardware Boot Control 14 BOOTEN2 CMX703x Hardware Boot Control 15 RS232 CBUS CMX703x Hardware Boot Control N 16 17 18 N C Do not connect these pins 19 20 3V3D 3 3V dc digital supply rail RF1_EXT External input option to RF synthesiser 1 CLK EXT External input option for CMX703x clock 460MHz Output from 460MHz VCO RF2_EXT External input to RF synthesiser 2 not fitted External supply voltage External supply ground 2006 CML Microsystems Plc 7 UM0201 5 PE0201 Evaluation Kit PE0201 CONNECTOR PINOUT Connector Connector Signal Signal rm J8 1 N C 2 TXD O P 9 pin D Type connector PC TXD 3 RXD I P 9 pin D Type connector PC RXD 4 N C 5 GNDD Power 9 pin D Type connector PC GND 6 N C 7 RTS I P 9 pin D Type connector PC RTS 8 CTS O P 9 pin D Type connector PC CTS 9 N C J10 1 IP1 I P Channel 1 inverting input 3 IP2 I P Channel 2 inverting input 5 IP3 I P Channel 3 inverting input 7 MOD1 O P Channel 1 output 9 MOD2 O P Channel 2 output 11 AUDIO O P Channel 3 output 13 BUF1IN IP High impedance buffered input 15 BUF1OUT O P Buffered output 17
8. MHz and a Tx frequency of 455MHz on Channel 1 Synthesiser with a loop comparison frequency of 25kHz the following values of N and R are required For 455MHz using the Tx divider registers TXN 18 200 0x4718 TxR 768 0x0300 For 465MHz using the Rx divider registers 2006 CML Microsystems Plc 15 UM0201 5 PE0201 Evaluation Kit PE0201 Rx N 18 600 0x48A8 RxR 768 0x0300 Write 0x8000 to B3 RF Channel Control to select XTAL clock input as reference Write 0x0021 to CO Powerdown Control Write 0x4318 to B2 RF Channel Data Tx N b9 0 Write 0x4411 to B2 RF Channel Data Tx N b19 10 Write 0x4B00 to B2 RF Channel Data Tx R b9 0 Write 0x4C00 to B2 RF Channel Data Tx R b19 10 Write 0x50A8 to B2 RF Channel Data Rx N b9 0 Write 0x5412 to B2 RF Channel Data Rx N b19 10 Write 0x5B00 to B2 RF Channel Data Rx R b9 0 Write 0x5C00 to B2 RF Channel Data Rx R b19 10 Then Write 0x802D to B3 RF Channel Control to select the Rx frequency or Write 0x802B to B3 RF Channel Control to select the Tx frequency or Write 0x8028 to B3 RF Channel Control to disable both Rx and Tx frequencies When RF Synthesiser 1 is in lock it will return the value 0x01 in the RF Channel Status register B4 When not in lock this value will be 0x00 Depending on the setting of the IRQ mask in the IRQ Mask register CE an interrupt will be generated and the interrupt will be reported in the Status 1 regist
9. PE0201 CML Microcircuits Platform Evaluation COMMUNICATION SEMICONDUCTORS Kit for CMX703x Range UM0201 5 February 2006 Features e CMX703x FirmASIC product range e Command and control by PC via the PE0001 evaluation interface card or user s uC development e Evaluate both RF and baseband application or emulator capabilities e On board 460MHz VCO e Socketed EEPROM option for Function Image e On board supply regulators operate from a On board access to all CMX703x signals single 5 volt supply commands and data 1 Brief Description The PE0201 Platform Evaluation Kit is designed to assist in the evaluation and application development of the CMX703x range of FirmASIC products The kit is in the form of a populated PCB comprising a CMX703x IC and appropriate supporting components and circuitry including a 460MHzZ VCO operating in conjunction with one of the IC s on chip synthesizers The board also incorporates all the necessary power supply regulation facilities for operation from a single 5 volt supply together with a number of board jumpers to enable various circuit arrangements to be effected The board is fitted with connectors allowing the PE0201 to be operated with a CML PE0001 Interface Card and associated PC GUI software or by direct connection between the CMX703x C BUS serial port and the user s uC development application or emulation system The CMX703x Function Image FI can be loaded on power up directly
10. VOND C A a ed Q fe A ie mozo L I te cw cy our aOR kos O DCE CN BAL Tin ono var Pan n 89 d uo w IU OF 8 LOZOH ELA GED AH S In O LOLO v on o In zoj Se AS a o ees Lin C4 BL EE m oa L eel rq co CD i Hai lay 999 T sv 9 i ilo d die lodges hoc DE eim O ie red 6 1008 UU t o o gille HH wel So UL ba fe 8 G nR 9 er M l LL Figure 3 Evaluation Board Layout UM0201 5 11 2006 CML Microsystems Plc PE0201 Evaluation Kit PE0201 Detailed Description Hardware Description Power supplies The board is fitted with three voltage regulators U7 U8 and U9 provide the analogue digital and RF Charge Pump supply rails respectively The input to these three regulators is provided by an external 5V dc regulated power supply which is connected to the board via connector J7 a snap type connector The Analogue Digital and RF Charge Pump supply voltage levels can be monitored on test points TP5 TP6 and TP7 respectively LED illumination confirms the on board presence of the 3 3V dc digital voltage supply Clock Options The PCB is designed to
11. cro com products datasheets download htm lication notes www cmimicro com products applications CML Microcircuits USA Inc COMMUNICATION SEMICONDUCTORS For detailed a CML Microcircuits UK Ltd COMMUNICATION SEMICONDUCTORS CML Microcircuits Singapore Pte Ltd COMMUNICATION SEMICONDUCTORS Oval Park Langford Maldon Essex CM9 6WG England Tel 44 0 1621 875500 Fax 44 0 1621 875600 Sales sales cmlmicro com Technical Support techsupport cmlmicro com 4800 Bethania Station Road Winston Salem NC 27105 USA Tel 1 336 744 5050 800 638 5577 Fax 1 336 744 5054 Sales us sales cmlmicro com Technical Support us techsupport cmlmicro com No 2 Kallang Pudding Road 09 05 06 Mactech Industrial Building Singapore 349307 Tel 65 6745 0426 Fax 65 6745 2917 Sales sg sales cmlmicro com Technical Support sg techsupport cmlmicro com No 218 Tian Mu Road West Tower 1 Unit 1008 Shanghai Kerry Everbright City Zhabei Shanghai 200070 China Tel 86 21 6317 4107 86 21 6317 8916 Fax 86 21 6317 0243 Sales cn sales cmlmicro com cn Technical Support sg techsupport cmlmicro com
12. e B3 b4 0 High gain B b3 1 For further information refer to relevant CMX703x data sheet Alternatively RF synthesiser 1 can be used with an external VCO with the following circuit changes e Remove R11 and R28 Disconnect VCO output from CMX703x e Remove R32 Stops the on board VCO oscillating e Remove R15 Disconnect CMX703x charge pump output from on board VCO The charge pump output of RF synthesiser 1 can now be picked up from TP3 labelled CP1OUT and the users VCO output connected to the SMA connector J2 labelled RF1_EXT Note that the loop filter for RF synthesiser 1 is still in circuit RF synthesiser 2 can also be used with a user supplied external VCO A loop filter can be constructed using the PCB footprints provided Also the ISET resistor R38 must be fitted The user supplied VCO can be fitted across the following connectors that are not fitted e J6 SMA socket labelled RF2_EXT RF input to RF synthesiser 2 TP4 test loop labelled CP2OUT Charge pump output Adjustments and Controls The boot state of the CMX703x device can be set manually using jumpers on header J9 If using with the PE0001 2006 CML Microsystems Plc 13 UM0201 5 PE0201 Evaluation Kit PE0201 6 3 6 4 6 4 1 6 4 2 Function Image The PE0201 is shipped with a blank EEPROM U2 The EEPROM is socketed allowing it to be removed and externally programmed with a FI Instead of using the EEPROM Fils may be down
13. er C6 as the value 0x8002 2006 CML Microsystems Plc 16 UM0201 5 PE0201 Evaluation Kit 7 Performance Specification 7 1 Electrical Performance 7 1 1 Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the Evaluation Kit Min Max Supply Vin Vss 0 3 9 0 Voltage on any connector pin to Vss 0 3 3 6 Current into or out of Vin and Vss pins 0 0 45 Current into or out of any other connector pin 20 20 7 1 2 Operating Limits Correct operation of the Evaluation Kit outside these limits is not implied Notes Min Max Supply V Van 4 5 5 5 External Clock Frequency 4 0 24 576 2006 CML Microsystems Plc 17 PE0201 Units mA Units MHz UM0201 5 PE0201 Evaluation Kit 7 1 3 Operating Characteristics For the following conditions unless otherwise specified Evaluation Device Clock Frequency 19 2MHz Vin 5 0V Tamb 25 C For CMX703x parameters see relevant CMX703x data sheet DC Parameters IDD 3V3A 3V3D 3V3_VCO Baseband Parameters Output Impedances Mod1 Mod2 and Audio Buf1 out and Buf2out Input Impedances IP1 IP2 and IP3 Buf1in and Buf2in External Clock Input High pulse width Low pulse width Input impedance VCO output Frequency range Power Output Impedance Notes Notes 1 Min 60 3 15 3 15 3 15 21 10 450 When configured as supplied as unity gain buffers 2006 CML Microsystems Plc 18 Typ
14. into the on board target CMX703x IC using the PE0001 interface or the user s system Alternatively it can be pre loaded 2006 CML Microsystems Plc separately into the on board EEPROM for automatic operation on power up downloaded from the CML website CONTENTS Section 1 Brief Description 2 Preliminary Information 2 1 Laboratory Equipment 2 2 PrecautionS ens 2 3 APPTrOVAIS ni cena essonssee 3 QUICK Start ns need A A Tee 3 1 With PE0001 2 22 un ue 3 2 Without PE0001 ccccsccesseeceseeeeeeseeeseeeeeseeeeeees 4 Signal LIStS c2cn caer eao eere nn dt 5 Circuit Schematics and Board Layouts 6 Detailed Description 6 1 Hardware Description 6 2 Adjustments and Controls ssssasnnsnnnennnnnnnnnnnne 6 3 Function ImageTM cucrrececrrcaceaa 6 4 Evaluation Tests ccocceecccenann 7 Performance Specifications 7 1 Electrical Performance PE0201 Function images can be It is always recommended that you check for the latest product datasheet version from the Datasheets page of the CML website www cmlmicro com 2006 CML Microsystems Plc 2 UM0201 5 PE0201 Evaluation Kit PE0201 Auxiliary connections Ju A Clocks 19 2MHz default Baseband Y connections C BUS lt gt CMX703x and Boot J10 contral gt gt gt EEPROM
15. loaded into the CMX703x device via the C BUS interface Whenever power is removed from the PE0201 the FI will be erased from the CMX703x device Therefore whenever power is applied a Fl must be loaded either from the EEPROM or via the C BUS interface Evaluation Tests Before a FI is loaded into the CMX703x device there is a limited functionality which can be demonstrated directly by programming the C BUS The first group of examples can be used to verify control of the CMX703x via the C BUS serial interface All of the following examples are available as PE0001 compatible script files from the CML website Write to and Read from a Register e Write any 16 bit number to register CO The data transferred to the device on the Command Data pin looks like this CO lt ms byte gt lt Isbyte gt a Command Data e The value written to this register the Powerdown Control register can be read back from register C4 by issuing a single command byte then reading two data bytes from the Reply Data pin as follows C4 me Command Data lt ms byte gt lt Isbyte gt gt u Reply Data Note that the power consumption of the device will increase once this register has been written to since some parts of the device will no longer be powersaved Check Analogue Path and Set Input Gain Write 0x4061 to CO Powerdown Control Write 0x0C30 to B1 Input Gain and Signal Routing Write 0x0008 to CF Test Mode Apply a 1kHz audi
16. o signal to the input IP3 J10 pin 5 at a level of 10dBm the maximum signal level before distortion is about 1dBm Check the audio signal coming out of the AUDIO OUT pin J10 pin 11 The level should be 5 5dB below the level of the input signal The MOD1 and MOD2 outputs should have no signal on them All three outputs should have a dc bias level of approximately 1 65 volts 2006 CML Microsystems Plc 14 UM0201 5 PE0201 Evaluation Kit PE0201 6 4 3 6 4 4 6 4 5 Check Analogue Path and Set Output Gain Write 0x03E1 to CO Powerdown Control Write 0x410C to BO Analogue Gain Write 0x0001 to CF Test Mode Apply a differential 1kHz audio signal across the inputs IP1 J10 pin 1 and IP2 J10 pin 2 at a level of OdBm between them Check the audio signal coming out of the AUDIO OUT pin J10 pin 11 The level should be 9 6dBm Check the audio signal coming out of the MOD1 pin J10 pin 7 The level should be 6 0dBm Check the audio signal coming out of the MOD2 pin J10 pin 9 The level should be 12 0dBm All three outputs should have a DC bias level of approximately 1 65 volts Generate Two External Digital Clocks Write 0x0021 to CO Powerdown Control Write 0x2577 to AB System Clock 1 PLL Configuration Write OxEOC8 to AC System Clock 1 Reference and Source Configuration Write 0x09A0 to AD System Clock 2 PLL Configuration Write OxEOC8 to AE System Clock 2 Reference and Source Configurati
17. on With the default 19 2MHz clock input a digital clock frequency of 4 0MHz should be observed at the AUX SYS CLOCK 1 output labelled CLKOUT1 TP1 and a frequency of 19 968MHz should be observed at the AUX SYS CLOCK 2 output labelled CLKOUT2 TP2 Now write OxA0C8 to either AC or AE registers to turn off the CLKOUT1 or CLKOUT2 outputs respectively Set RF Synthesiser 1 These settings will enable the on board VCO to switch between two frequencies of 455MHz and 465MHz The VCO output is monitored at SMA socket J5 labelled 460MHz Each synthesiser has an N and an R value for the Rx frequency and the same again for the Tx frequency Once programmed the synthesiser can easily be switched between Rx and Tx An Application Note is available separately to help calculate the N and R values The RF Channel Data register B2 is used to program both RF synthesisers and this is done by 16 contiguous writes to this register This can be reduced to 8 contiguous writes if only one of the synthesisers is to be programmed There is no indication of the completion of these writes except that the synthesiser which has been written to will indicate lock in the RF Channel Status register B4 once it has been enabled and providing the correct external components have been used for the programmed frequency For this example it is assumed that the RF frequency is derived from the default clock frequency of 19 2MHz To select an Rx frequency of 465
18. ts Unpacking Please ensure that you have received all of the items listed on the separate information sheet EK0201 and notify CML within 7 working days if the delivery is incomplete Approvals This product is not approved to any EMC or other regulatory standard Users are advised to observe local statutory requirements which may apply to this product and the radio frequency signals that may emanate from it 2006 CML Microsystems Plc 4 UM0201 5 PE0201 Evaluation Kit 3 1 Quick Start PE0201 This section is divided into two sub sections The first is for those users who are using the PE0201 with a PE0001 controller card and its Windows PC application The second is for users who are using the PE0201 by itself without the PE0001 With PE0001 Note that the C BUS connector J1 a right angle header of the PE0201 is designed to plug directly into socket J1 of the PE0001 3 1 1 Setting Up e Ensure that all pins of header J9 are open circuit e Refer to the PE0001 user manual and follow the instructions given in the quick start section The basic arrangement when used with the PEO001 is shown below PE0201 J9 Direct Connection Out PE0001 O J2 Serial Cable Figure 2 PE0201 used with PE0001 2006 CML Microsystems Plc 5 UM0201 5 PE0201 Evaluation Kit PE0201 3 2 Operation The Function Image Fl must now be downloaded to the CMX703x de
19. vice Use the Function Image Download tab of the PE0001 windows application Two methods are available for downloading the FI e Directly from a file on the PE0001 host PC to the CMX703x e From the PE0201 EEPROM To use this method the EEPROM must first be programmed with the Fl using a user supplied proprietary programmer The EEPROM is socketed so that it can be removed for this purpose Function images are available as a C type header file and must be obtained from the CML website The PE0201 should now be ready for evaluation of the CMX703x with the loaded FI Without PE0001 As an alternative to using the PE0001 controller kit users may control the CMX703x target device with a user supplied host controller card C BUS serial interface connections are made via connector J1 The power up or boot state of the CMX703x may be set using jumpers on header J9 Consult the relevant CMX703x documentation for valid modes A jumper in circuit on header J9 corresponds to a 1 state on the boot pins A FI for the CMX703x device must be either included in the customers host system and downloaded to the CMX703x device on power up or programmed into the EEPROM using a user supplied proprietary programmer The EEPROM is socketed so that it can be removed for this purpose 2006 CML Microsystems Plc 6 UM0201 5 PE0201 Evaluation Kit PE0201 4 Signal Lists CONNECTOR PINOUT Connector Connector Signal Signal EES J1 N
20. x device will have an RS232 interface instead of a C BUS interface In such cases the PE0201 will not operate with the PE0001 controller kit the RS232 interface provided on the PE0201 PCB should be used instead Baseband Interfacing Connector J11 provides access to Auxiliary ADCs 1 to 4 Auxiliary DACs 1 to 4 and the general purpose I O lines of the CMX703x device The CMX703x device baseband input amplifiers for IP1 IP2 and IP3 are configured as AC coupled unity gain inverting amplifiers The inputs to these circuits are fed from connector J10 The CMX703x device baseband outputs MOD1 MOD2 and AUDIO are fed through an RC network to connector J10 A dual op amp IC is fitted to the board with both amplifiers configured as unity gain buffers It is possible to set up other op amp based configurations with the addition of passive components to the PCB footprints provided It is recommended that 0603 sized surface mount components are used Access to the input and output of each of these uncommitted amplifiers is also from connector J10 RF Circuits The board is fitted with a Voltage Controlled Oscillator VCO Using RF synthesiser 1 of the CMX703x device the VCO is tuneable across a range of 450 to 470MHz with a nominal frequency of 460MHz The output of the VCO is fed to connector J5 which is a straight SMA type The charge pump settings for CMX703x RF channel control register B3 when using this VCO should be Positive slop
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