event counter mode, free run type selected
Contents
1. REJ05B0539 0110 Rev 1 10 January 2006 Page 10 of 102. reit reit skkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk Setting of variable vector table a K k k KKK k k k k k he k k k k k k k k k k k k k k kk k kk k k kk k k kk k kk kk kkk k kkk kkk k k kk kkk kk kk ee hehe kkk kk kk kkk kk kkk kk section vect romdata org VECT TOP 4 4 lword DUMMY INT3 interrupt vector lword DUMMY TB5 interrupt vector lword DUMMY TBA interrupt vector UART1 bus collision detection interrupt vector lword DUMMY TB3 interrupt vector UARTO bus collision detection interrupt vector lword DUMMY SI 04 INT5 interrupt vector lword DUMMY SI 03 INTA interrupt vector lword DUMMY UART2 bus collision detection interrupt vector lword DUMMY DMAO interrupt vector lword DUMMY DMA1 interrupt vector lword DUMMY KEY interrupt vector lword DUMMY A D interrupt vector lword DUMMY UART2 transmit NACK interrupt vector lword DUMMY UART2 receive ACK interrupt vector lword DUMMY UARTO transmit NACK interrupt vector lword DUMMY UARTO receive ACK interrupt vector lword DUMMY UART1 transmit NACK interrupt vector lword DUMMY UART1 receive ACK interrupt vector lword TAO_INT TAO interrupt vector lword DUMMY TA1 interrupt vector lword DUMMY TA2 interrupt vector lword DUMMY TAS interrupt vector lword DUMMY TA4 interrupt vector lword DUMMY TBO interrupt vector lword DUMMY TB1 interrupt vector lword DUMMY TB2 interrupt vector lword DUMMY
3. 0 99 Ne b7 b6 0 0 Input on TA4IN is selected Note ae eee He Timer AO register Address 038716 038616 TAO b7 bO b7 Timer A1 register Address 038916 038816 TA1 Timer A2 register Address 038B16 038A16 TA2 Timer A3 register Address 038D16 038C16 TAS Timer A4 register Address 038F16 038E16 TA4 Can be set to 000016 to FFFF16 7 Setting count start flag Count start flag Address 038016 TABSR Timer AO count start flag Timer A1 count start flag Timer A2 count start flag Timer A3 count start flag Timer A4 count start flag Start count Figure 2 Set up procedure of event counter mode free run type selected REJ05B0539 0110 Rev 1 10 January 2006 Page 3 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected 5 The example of reference program a K k k KKK k k eee he k k k ke k k k k k k k k k k kk k kk k k kk k k kk k k k kk kkk kkk k kkk k k kk kkk kk kk ehe he ke kkk kk kkk kkk eee ee M16C 62P Program Collection FILE NAME rjj05b0692 src a30 CPU M16C 62P Group FUNCTION Operation of Timer A event counter mode free run type selected HISTORY 2004 12 24 Ver 1 00 Copyright C 2004 Renesas Technology Corp Copyright C 2004 Renesas Solutions Corp All rights reserved skkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk skkkkkkkkkkkkkkkkkkkkkkkkkkkkkk
4. data diagrams charts programs and algorithms please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products Renesas Technology Corporation assumes no responsibility for any damage liability or other loss resulting from the information contained herein Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes such as apparatus or systems for transportation vehicular medical aerospace nuclear or undersea repeater use The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials If these products or technologies are subject to the Japanese export control restrictions they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination Any diversion or reexport contrary to the export control laws and regulations of Japan and or the country of destination is prohibited Please contact Renesas Technology Corporation for further details on these materials or the products contained therein
5. i 0 4 Operation 1 Setting the count start flag to 1 causes the counter to count the falling edges of the count source 2 Even if an underflow occurs the content of the reload register is not reloaded but the count continues At this time the timer Ai interrupt request bit goes to 1 3 If switching from an up count to a down count or vice versa while a count is in progress the switch takes effect from the next effective edge of the count source 4 Even if an overflow occurs the content of the reload register is not reloaded but the count continues At this time the timer Ai interrupt request bit goes to 1 n reload register content 2 Underflow 4 Overflow l Counter content hex 000016 i I Set to 1 by software I f Count start flag Set to 1 by software 4 Up down flag 9 go es rr i Cleared to 0 when interrupt request is accepted or cleared by software I l I l l l l Timer Ai interrupt request bit Figure 1 Operation timing of event counter mode free run type selected REJ05B0539 0110 Rev 1 10 January 2006 Page 2 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected va Selecting event counter mode and functions Z bC Timer Ai mode register i 0 to 4 Address 039616 to 039A16 TAIMR i 0 to 4 Selection of event counter mode Pulse output function select bit 0 Pulse is not output TA
6. not convey any license under any intellectual property rights or any other rights belonging to Renesas Technology Corporation or a third party Renesas Technology Corporation assumes no responsibility for any damage or infringement of any third party s rights originating in the use of any product data diagrams charts programs algorithms or circuit application examples contained in these materials All information contained in these materials including product data diagrams charts programs and algorithms represents information on products at the time of publication of these materials and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein The information described here may contain technical inaccuracies or typographical errors Renesas Technology Corporation assumes no responsibility for any damage liability or other loss rising from these inaccuracies or errors Please also pay attention to information published by Renesas Technology Corporation by various means including the Renesas Technology Corporation Semiconductor home page http www renesas com When using any or all of the information contained in these materials including product
7. 434 NESAS APPLICATION NOTE M16C 62P Group Operation of Timer A event counter mode free run type selected 1 Abstract In event counter mode choose functions from those listed in Table 1 Operations of the circled items are described below Figure 1 shows the operation timing and Figure 2 shows the set up procedure A reference program is an example when using the Timer AO interrupt based on the setting procedure of Figure 2 2 Introduction This application note is applied to the M16C 62P group Microcomputers This program can be operated under the condition of M16C family products with the same SFR Special Function Register as M16C 62P Group products Because some functions may be modified of the M16C family products see the user s manual When using the functions shown in this application note evaluate them carefully for an operation REJ05B0539 0110 Rev 1 10 January 2006 Page 1 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected 3 Choosed functions Table 1 Choosed functions Count source Input signal to TAiIN Pulse output function No pulses output counting falling edges Pulses output Input signal to TAiIN Count operation type Reload type counting rising edges Free run type Timer overflow Factor for switching Content of up down flag between up and dowi BERI Duel aw j Input signal to TAIOUT Note j i 1 but j 4 when
8. INTO interrupt vector lword DUMMY INT1 interrupt vector lword DUMMY INT2 interrupt vector REJ05B0539 0110 Rev 1 10 January 2006 Page 6 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected a K k k k k k k che ee hehe k hehe k k k k k k e k k k k k k k k k k k k k k k KK k k k kk k kk k kkk kkk k k kk k kk kk kk ee he ke kkk kk kk kk eee kk Setting of fixed vector skkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk section f vect romdata org FIXED VECT TOP lword DUMMY Undefined instruction interrupt vector lword DUMMY Overflow INTO instruction interrupt vector lword DUMMY BRK instruction interrupt vector lword DUMMY Address match interrupt vector lword DUMMY Single step interrupt vector lword DUMMY Watchdog timer interrupt vector Oscillation stop and Re oscillation detection interrupt vector Voltage down detection interrupt vector lword DUMMY DBC interrupt vector lword DUMMY NMI interrupt vector lword START Sets start vector end REJ05B0539 0110 Rev 1 10 January 2006 Page 7 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected 6 Referense Hardware manual M16C 62P Group Hardware Manual Use the most recent version of the document on the Renesas Technology Web site Technical news Technical update Use the most recent version of the document on the Renes
9. IOUT pin is a normal port pin Count polarity select bit 0 Counts external signal s falling edge Up down switching cause select bit 0 Up down flag s content 0 Must always be 0 in event counter mode Count operation type select bit 1 Free run type Invalid in event counter mode i 0 1 C Invalid when not using two phase pulse signal processing i 2 to 4 a Setting up down flag b0 Up down flag Address 038416 UDF Timer A0 up down 0 Down count Timer A1 up down flag 0 Down count Timer A2 up down flag 0 Down count Timer A3 up down flag 0 Down count Timer A4 up down flag 0 Down count k When not using the 2 phase pulse signal processing function be sure to set the select bit to 0 a Setting one shot start flag and trigger select register b7 bo b7 bo X One shot start flag Address 038216 IL LTLLLII Trigger select register Address 038316 ONSF TRGSR Timer AO event trigger select bit Timer A1 event trigger select bit b7 bG Bou TAIN is selected N 0 0 Input on TAOIN is selected Note Input on is selected Note Timer A2 event trigger select bit bie i Input on TA2IN is selected Note Timer A3 event trigger select bit b5 b4 0 0 Input on TASIN is selected Note Timer A4 event trigger select bit Note Set the corresponding port direction register to
10. as Technology Web site REJ05B0539 0110 Rev 1 10 January 2006 Page 8 of 10 434 NES Web site and contact for support Renesas Technology Web site AS M16C 62P Group Operation of Timer A event counter mode free run type selected http www renesas com en m16c Inquiries http www renesas com inquiry csc renesas com Revision Revised Rev Issue data avis Page Point 1 00 2004 12 First edition issued 1 10 2006 01 2 Figure 1 modified REJ05B0539 0110 Rev 1 10 January 2006 Page 9 of 10 434 NE SAS M16C 62P Group Operation of Timer A event counter mode free run type selected Keep safety first in your circuit designs Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable but there is always the possibility that trouble may occur with them Trouble with semiconductors may lead to personal injury fire or property damage Remember to give due consideration to safety when making your circuit designs with appropriate measures such as i placement of substitutive auxiliary circuits ii use of nonflammable material or iii prevention against any malfunction or mishap Notes regarding these materials These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer s application they do
11. e selected Idc RAM_END 1 isp Sets interrupt stack pointer Idc SB_BASE sb Sets sb register mov b 03h prcr Removes protect Set processor mode registers 0 and 1 mov w 0800h pm0 Single chip mode No expansion No wait mov w 2008h cm0 Xcin Xcout High Xin Xout High Main clock is No divison mov b 0 prer Protects all registers Idintb VECT_TOP Sets interrupt table register mov w 0 r0 Clears WORKRAM area mov w RAM_END 1 RAM_TOP 2 r3 mov w RAM_TOP a1 sstr w mov b 01000001b taOmr Timer AO mode register Tu Event counter mode oM Free run type mov b 00000000b udf Up down flag LI oM Down count f HMM When not using the 2 phase pulse signal processing function set the select bit to 0 mov b 00000000b onsf One shot start flag Input on ta0in is selected belr pd7 1 Note Set the corresponding port direction register to O TAOIN mov w 5 ta0 Timer AO register mov b 00000011b ta0ic Interrupt control register Interrupt priority level select bit 011 Level 3 interrupt disabled MM Interrupt request bit O interrupt not requested mov b 00000001b tabsr Count start flag qc Starts counting fset i Set interrupt enable flag MAIN jmp MAIN Interrupt program TAO INT REJ05B0539 0110 Rev 1 10 January 2006 Page 5 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run type selected TAO interrupt routine
12. kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk Include a K k k k k k KK k k k k k k k k k k k k k k k k k k kk k kk k k kk k k kk k k k kk kkk kk kk kkk k k kk kkk kk kk ehe hehe kkk kk kkk kkk kk kk kk LIST off Stops outputting lines to the assembler list file INCLUDE sfr62p inc Reads the file that defined SFR LIST on Starts outputting lines to the assembler list file skkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk Symbol definition a K k k k k k k k k k k k k k k k k k k k k k k k k k kk kkk kk k k k k kk k kk kk kkk kkk k kkk k k kk kkk k kkk k kkk kkk kk kk kkk kkk kk kk RAM_TOP equ 00400h Start address of RAM RAM_END equ 013ffh End address of RAM ROM TOP equ 0f4000h Start address of ROM VECT_TOP equ OffeOOh Start address of vect_top FIXED_VECT_TOP equ Offfdch Start address of fixed vect top SB BASE equ 00380h Base address of sb skkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk Program area a K k k k k k k she ede hehe k k k k k k KKK e k k k k he he k kk k k k k k k kk k k k k k kkk k kkk kkk k k kk kkk kk kk k kkk kkk kk kk ke eee kk Start up section program code Declares section name and section type org ROM_TOP Declares start address sb SB BASE START REJ05B0539 0110 Rev 1 10 January 2006 Page 4 of 10 434 NESAS M16C 62P Group Operation of Timer A event counter mode free run typ
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