ECAN1000HR Isolated CAN interface board User`s Manual
Contents
1. 6 CAN BUS CONTROLLER 3 SI a re eee re ar eee hasten e A e eese E EE hates 6 PHYSICAL INTERFACE et e ebd ectetur rite anie der dde a Tate 7 MECHANICAL ete rete te petere ti ete eicit tege b 7 CONNECTOR DESCRIPTION eee Bae Se asiste emet tdem 7 WHAT COMES WITH YOUR BOARD RR 7 BOARD ACCESSORIES ve ie ande hl ti eie 8 USING THIS MANUAL Nr ee eit d te 8 WHEN YOUNEED HEEP EU e HER EE 8 CHAPTER2 BOARD SETTINGS siscsssccseccssescseseccsesscsccscsassnsootscessevossunsoctecnsovscvensesscesvsncssencseseecssocsseseovscensscossasens 9 FACTORY CONFIGURED JUMPER SETTINGS 9 BASE ADDRESS JUMPERS FACTORY SETTING 300 10 INTERRUPT CHANNEL FACTORY SETTING IRQS 0 cccccccssssscessseeeeeenseeeessneeecseeeeeseseeesssneeecseeeeesenseeeeseeeesseeeeess 12 CHAPTER 3 4400 13 BOARD INSTALLATION TEETE 13 General installation guidelines2. t a tg d UI p a eu 13 Installation integrated with a PC 104 module stack 13 30 rack or enclosure installation with a EUROCARD CPU containing an ECANIOO00HR eee 14 J12 GALVANICALLY ISOLATED CAN BUS CONNECTOR 15 134 GALVANICALLY ISOLATED CAN BUS TERMINATION 2 4 2 2441 480000000000000000000000000000000000000 222 15 CHAPTER4 HARDWARE DESCRIPTION e eeeeee ette etta etna tn senses stats stas tease tasto sees ease east 16 THE CAN BUS CONTROLLER re be e bev De Es TER eere FERE ba A etse 17 GALVANIC ISOLATION OF THE CAN BUS pronio Re E E a EEE E ORTE E TE TERR 18 CHAPTER5 BOARD OPERATION AND 2 4 44 19 DEFINING THE MEMORY d Y RR 19 INTBERRUPBES 2 entere eee er e ette eta te e tte eer ere 20 What is dn interrupt 5 p RE ea 20 Interrupt request lines eei ed e va ee ea o e a de Eve eee et 20 6259 Programmable Interrupt Controller eese eene enne nnne 21 Interrupt Mask Register eee eret eee rtt tae ede lev pedet e eye de ee 21 End of Interrupt EOI Command 2 e d eite dee ed e EHE Rea er E e eoe A 21 What exactly happens wh
3. RTD Embedded Technologies EXCEPT AS EXPRESSLY SET FORTH ABOVE NO OTHER WARRANTIES ARE EXPRESSED OR IMPLIED INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND RTD Embedded Technologies EXPRESSLY DISCLAIMS ALL WARRANTIES NOT STATED HEREIN ALL IMPLIED WARRANTIES INCLUDING IMPLIED WARRANTIES FOR MECHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE LIMITED TO THE DURATION OF THIS WARRANTY IN THE EVENT THE PRODUCT IS NOT FREE FROM DEFECTS AS WARRANTED ABOVE THE PURCHASER S SOLE REMEDY SHALL BE REPAIR OR REPLACEMENT AS PROVIDED ABOVE UNDER NO CIRCUMSTANCES WILL RTD Embedded Technologies BE LIABLE TO THE PURCHASER ANY USER FOR ANY DAMAGES INCLUDING ANY INCIDENTAL OR CONSEQUENTIAL DAMAGES EXPENSES LOST PROFITS LOST SAVINGS OR OTHER DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PRODUCT SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR CONSUMER PRODUCTS AND SOME STATES DO NOT ALLOW LIMITATIONS ON HOW LONG AN IMPLIED WARRANTY LASTS SO THE ABOVE LIMITATIONS OR EXCLUSIONS MAY NOT APPLY TO YOU THIS WARRANTY GIVES YOU SPECIFIC LEGAL RIGHTS AND YOU MAY ALSO HAVE OTHER RIGHTS WHICH VARY FROM STATE TO STATE ECAN1000 User s Manual 29 BDM 610020026 rev B
4. and is then matched to the identifiers in the message objects ECAN1000 User s Manual 17 BDM 610020026 rev B Galvanic isolation of the CAN bus The galvanic isolation of the ECAN1000HR is implemented using the following e Optocouplers for reliable data transmission e DC DC converter to supply power the CAN bus and the physical in terface circuitry The high speed optocouplers are directly connected to the SJA1000 The opto couplers drive the CAN bus transceiver A special balanced CAN bus choke is used not only to improve immunity to bus noise but also to protect the bus trans ceiver This choke also reduces the radiated emissions in the range of 30 200MHz A 1W DC DC converter may be used to power other remote devices on the CAN bus The output power of this converter is isolated up to 1 5 kV peak A 125mA fuse green are used to protect the DC DC converter The jumper marked as J34 is the CAN bus termination jumper Only two termina tion jumpers should be closed at the endpoints of the CAN bus Failure to do so may degrade the performance of the bus or even cause permanent damage to the driver chips The maximum drive of the transceiver is 32 nodes ECAN1000 User s Manual 18 BDM 610020026 rev B Chapter 5 BOARD OPERATION AND PROGRAMMING This chapter shows you how to program and use your ECAN1000HR It provides a complete description of the internal memory map of the chip and a detailed discussion of the internal regis
5. isolated transceiver 1 Mb s data rate Timing parameters and speed of bus programmable Balanced CAN bus Choke Jumper selectable 120 Ohm termination resistors Transceiver type Philips 826251 0 8W 5V isolated output power for other field devices Connectors Galvanically isolated CAN bus 90 degree 10 pin header Host bus XT AT PC 104 bus Electrical Operating temperature range 40 to 85 C Supply voltage 5V 8 Power consumption 1 0W typical CE The ECAN1000HR is CE certified in the IDAN Enclosure System Please consult the factory for more information on the system ECAN1000 User s Manual 27 BDM 610020026 rev B Chapter 7 RETURN POLICY AND WARRANTY Return Policy If you wish to return a product to the factory for service please follow this procedure Read the Limited Warranty to familiarize yourself with our warranty policy Contact the factory for a Return Merchandise Authorization RMA number Please have the following available Complete board name e Board serial number A detailed description of the board s behavior List the name of a contact person familiar with technical details of the problem or situation along with their phone and fax numbers address and e mail address if available List your shipping address Indicate the shipping method you would like used to return the product to you We will not ship by next day service without your pre approval Carefully package the product using proper anti stat
6. not masked and it can then generate an interrupt The interrupt mask register is programmed through port 21h End of Interrupt EOI Command After an interrupt service routine is complete the 8259 Interrupt Control ler must be acknowledged by writing the value 20h to port 20h What exactly happens when an interrupt occurs Understanding the sequence of events when an interrupt is triggered is necessary to correctly write interrupt handlers When an interrupt request line is driven high by a peripheral device such as the ECAN1000HR the interrupt controller checks to see if interrupts are enabled for that IRQ It then checks to see if other interrupts are active or requested and deter mines which interrupt has priority The interrupt controller then interrupts the processor The current code segment CS instruction pointer IP and flags are pushed onto the system stack and a new set if CS and IP are loaded from the lowest 1024 bytes of memory This table is referred to as the interrupt vector table and each entry to this table is called an interrupt vector Once the new CS and IP are loaded from the interrupt vector table the processor starts to execute code from the new Code Segment CS and from the new Instruction Pointer IP When the interrupt routine is completed the old CS and IP is popped from the system stack and the program execution continues from the point where the interruption occurred ECAN1000 User s Manual 21 BD
7. ECAN1000HR Isolated CAN interface board User s Manual 7777 RTD Embedded Technologies Inc Real Time Devices Accessing the Analog World 1509001 and AS9100 Certified BDM 610020026 ev ECAN1000HR ISOLATED 1 MB S CAN INTERFACE BOARD USER S MANUAL RTD Embedded Technologies INC 103 Innovation Blvd State College PA 16803 0906 Phone 1 814 234 8087 FAX 1 814 234 5218 E mail sales rtd com techsupport rtd com Web site http www rtd com ECAN1000 User s Manual 2 BDM 610020026 rev B Revision History 28 11 1991 Release 1 0 15 07 2001 Name of company changed reformatted Rev A New Manual Naming Method Rev 05 04 2007 Clarified references to QNX support improved formatting and grammar Published by RTD Embedded Technologies Inc 103 Innovation Blvd State College PA 16803 0906 Copyright 1999 2002 2003 2007 by RTD Embedded Technologies Inc All rights reserved The RTD Logo is a registered trademark of RTD Embedded Technologies cpuModule and utilityModule are trademarks of RTD Embedded Technologies PC 104 is a registered trademark of PC 104 Consor tium All other trademarks appearing in this document are the property of their respective owners ECAN1000 User s Manual 3 BDM 610020026 rev B TABLE OF CONTENTS CHAPTER 1 INTRODUCTION cescsecscccsccsccceccscccscccscesccssccssessscssscsscsssesssescsssescsscesscesocssesesesssessoesoessses 6 FEATURES C
8. M 610020026 rev B Using Interrupts in your program Adding interrupt support to your program is not as difficult as it may seem especially when programming under DOS The following discussion will cover programming under DOS Note that even the smallest mistake in your interrupt program may cause the computer to hang up and will only restart after a reboot This can be frustrating and time consuming Writing an Interrupt Service Routine ISR The first step in adding interrupts to your software is to write an interrupt service routine ISR This is the routine that will be executed automati cally each time an interrupt request occurs for the specified IRQ An ISR is different from other sub routines or procedures First on entrance the processor registers must be pushed onto the stack_before anything else Second just before exiting the routine you must clear the interrupt on the ECAN1000HR by writing to the SJA1000 CAN controller and write the EOI command to the interrupt controller Finally when exiting the inter rupt routine the processor registers must be popped from the system stack and you must execute the IRET assembly instruction This instruc tion pops the CS IP and processor flags from the system stack These were pushed onto the stack when entering the ISR Most compilers allow you to identify a function as an interrupt type and will automatically add these instructions to your ISR with one exception most compilers do not a
9. N number Function Hp NG isolated BUS L BUS H GND isolated N C N C 5V isolated GND isolated 10 TNG Table3 J12 CAN Bud Connector 0 N A N 9 7 5 3 1 GND GND BUS L 6 4 2 Table 4 Physical interface connector J12 pinout of the ECAN1000HR J34 Galvanically isolated CAN bus termination jumper The jumper marked as J34 is the CAN bus termination jumper Only two termination jumpers should be closed at the endpoints of the CAN bus Failure to do so may degrade the performance of the bus and it will affect the bus timing characteristics of the CAN bus The maximum guaranteed drive capability of the CAN bus transceiver is 32 nodes ECAN1000 User s Manual 15 BDM 610020026 rev B Chapter 4 HARDWARE DESCRIPTION This chapter describes in detail the major features of the ECAN1000HR e Philips SJA1000 CAN bus controller e Galvanic isolation of the CAN bus LN BUFFER a 5 1 CAN BUS CONTROLLER FCAO4 BUS ADDRESS DECODER Figure 6 ECAN1000HR Block diagram ECAN1000 User s Manual 16 BDM 610020026 rev B The CAN bus controller The SJA1000 CAN bus controller uses a 16 MHz base oscillator This must be taken into account when performing settings in the CAN bus tim ing registers that set the baud rate and sampling times of the CAN net work The SJA1000 CAN controller consists of seven functional bloc
10. O IRO 5 one ee ome ace Te OT Ten ed oe e 12 FIGURE 4 ECAN1000HR INTEGRATED IN A PC 104 RTD CPUMODULE STACK FIGURE 5 19 EUROCARD RACK INSTALLATION WITH AN INTEGRATED PC 104 DATAMODULE AND 14 FIGURE 6 ECAN1000HR BLOCK SEERE EEEE eeaeee 16 TABLES TABLE 1 FACTORY CONFIGURED JUMPER SETTINGS 0cccccccccessscccesssccccssseeccessseecessseccesssseecenseeeeessseeeessseeecenseeeens 9 TABLE 2 JP1 BASE ADDRESS JUMPER 11 TABLE 3 12 CAN BUD CONNECTOR 2002 2 2 00000000000000000000000000000 15 TABLE 4 PHYSICAL INTERFACE CONNECTOR J12 PINOUT OF THE 1000 15 TABLE 5 ECAN MEMORY MAP een eene vec eet dese he re 19 ECAN1000 User s Manual 5 BDM 610020026 rev B Chapter 1 INTRODUCTION This user s manual describes the operation of the ECAN1000HR CAN bus Interface board Features Some of the key features of the ECAN1000HR include SJA1000 CAN network controller Electrically compatible with the 82 200 stand alone CAN controller chip 1 Mb s maximum data rate fully programmable Full CAN functionality 2 0 B Extended receive buffer 64 byte FIFO 16 MHz clock frequency Galvanically isolated physical interfaces mapped host interface using three addresses 40 to 85C operati
11. en an interrupt occurs 21 Using Interrupts An VOUT Hama ete ias aei aeree pip eek et epe 22 Saving the Startup Interrupt Mask Register IMR and interrupt vector eese 24 Common Interrupi mistdkes i aiii ee en qu ep eer ERREUR SE START ee Rep owen 25 Example on Interrupt vector table setup in 26 CHAPTER 6 ECANI1000HR SPECIFICATIONS eeeeeee eee eene en seen 27 HOST TINETERFACE e ete ose cupri toiub e dre etel Ss Oe eee 27 CAN INTERFACES pe 27 CONNECTORS eec Omen 27 E 27 CE uunc Inu iin e ndm heads MS 27 CHAPTER7 RETURN POLICY AND WARRANT Y e eeeeeee eese 28 RETURN POLICY 5 533 hit RR dit 28 LIMITED WARRANTY esee tee nte e dee eee ea esee da dese sata aee 29 ECAN1000 User s Manual 4 BDM 610020026 rev B ILLUSTRATIONS FIGURE 1 COMPONENT iter ERI ER ETHER EYE E Re Y 10 FIGURE 2 BASE ADDRESS JUMPERS ILLUSTRATING ADDRESS 300 2 22 222 12 FIGURE 3 INTERRUPT SET T
12. g pages is attached the chip specific users manual for the SJA1000 CAN controller chip ECAN1000 User s Manual 19 BDM 610020026 rev B INTERRUPTS What is an interrupt An interrupt is an event that causes the processor in your computer to temporarily halt its current process and execute another routine Upon completion of the new routine control is returned to the original routine at the point where its execution was interrupted Interrupts are a very flexible way of dealing with asynchronous events Keyboard activity is a good example your computer cannot predict when you might press a key and it would be a waste of processor time to do nothing whilst waiting for a keystroke to occur Thus the interrupt scheme is used and the processor proceeds with other tasks When a keystroke finally occurs the keyboard then interrupts the processor so that it can get the keyboard data It then places it into the memory and then returns to what it was doing before the interrupt occurred Other common devices that use interrupts are A D boards network boards serial ports etc Your ECAN1000HR can interrupt the main processor when a message is received or transmitted if interrupts are enabled on the ECAN1000HR board By using interrupts you can write powerful code to interface to your CAN network Interrupt request lines To allow different peripheral devices to generate interrupts on the same computer the PC AT bus has interrupt request channel
13. ic packaging Write the RMA number in large 1 letters on the outside of the package Return the package to RTD Embedded Technologies Inc 103 Innovation Blvd State College PA 16803 0906 USA ECAN1000 User s Manual 28 BDM 610020026 rev B Limited Warranty RTD Embedded Technologies Inc warrants the hardware and software products it manufactures and pro duces to be free from defects in materials and workmanship for one year following the date of shipment from RTD Embedded Technologies INC This warranty is limited to the original purchaser of product and is not transferable During the one year warranty period RTD Embedded Technologies will repair or replace at its option any defective products or parts at no additional charge provided that the product is returned shipping prepaid to RTD Embedded Technologies All replaced parts and products become the property of RTD Embedded Technologies Before returning any product for repair customers are required to contact the factory for an RMA number THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY PRODUCTS WHICH HAVE BEEN DAMAGED AS A RESULT OF ACCIDENT MISUSE ABUSE such as use of incorrect input voltages improper or insufficient ventilation failure to follow the operating instructions that are provided by RTD Embedded Technologies acts of God or other contingencies beyond the control of RTD Embedded Technologies OR AS A RESULT OF SERVICE OR MODIFICATION BY ANYONE OTHER THAN
14. is manual does not cover CAN bus network programming and system design When you need help This manual and all the example programs will provide you with enough information to fully utilize all the features on this board If you have any problems with installation or use of the board contact our Technical Support Department 814 234 8087 Alternatively send an Email to sales rtd com When sending an Email request please include the following information Your company s name and address your name your telephone number and a brief description of the problem ECAN1000 User s Manual 8 BDM 610020026 rev B Chapter 2 BOARD SETTINGS The ECAN1000HR CAN bus interface board has jumper settings which can be changed to suit your application and host computer memory configuration The factory settings are listed and shown in the diagram at the beginning of this chapter Factory Configured Jumper Settings Table 1 below illustrates the factory jumper setting for the ECAN1000HR Fig ure 1 shows the board layout of the ECAN1000HR and the locations of the jumpers The following paragraphs explain how to change the factory jumper settings to suit your specific application Table 1 Factory configured jumper settings Please see figure 1 for detailed locations NUMBER OF FACTORY JUMPER NAME DESCRIPTION JUMPERS SETTING JP1 BASE Base Addresses 8 300H SENS Host interrupts 10 5 J34 CAN bus termination 1 Closed Table 1 Factory configured jum
15. ks The host interface logic the Transmit Buffer the Receive Buffer the Accep tance Filter the Bit Stream Processor the Bit Timing Logic and the Error management logic A detailed description of these blocks is listed in the detailed component specific datasheet reprinted from Philips Semicon ductors The SJA1000 internal message FIFO RAM provides storage for 64 mes sage bytes Each message can vary from one to up to 8 bytes in length Each message object has a unique identifier and can be configured to ei ther transmit or to receive Each message identifier contains control and status bits A message ob ject with a direction set for receive will send a remote frame by requesting a message transmission A message set as transmit will be configured to automatically send a data frame whenever a remote frame with a match ing identifier is received over the CAN bus All message objects have separate transmit and receive interrupts and status bits allowing the CPU full flexibility in detecting when a remote frame has been sent or received The SJA1000 also features masking for acceptance filtering This feature allows the user to globally mask or don t care any identifier bits of the incoming message This mask is programmable to allow the user to de sign an application specifically message identification strategy There are separate global masks for standard and extended frames The incoming message first passes through the global mask
16. n Auto mation Website at http www can cia de Mechanical description The ECAN1000HR is designed on a PC 104 form factor An easy me chanical interface to both PC 104 and EUROCARD systems can be achieved Stack your ECAN1000HR directly on a PC 104 compatible computer using the onboard mounting holes Connector description There is a 10 pin interface connector on the ECAN1000HR to directly interface to the galvanically isolated CAN networks This header is compliant with the ISO11892 2 specified pinout What comes with your board Your ECAN1000HR package contains the following items ECAN1000HR CAN bus interface module e User s manual Note Software and drivers can be downloaded from our website If any item is missing or damaged please call RTD Embedded Tech nologies Inc customer service department at the following number 814 234 8087 ECAN1000 User s Manual 7 BDM 610020026 rev B Board accessories In addition to the items included in your ECAN1000HR delivery several accessories are available Contact your local distributor for more infor mation and for advice on selecting the most appropriate accessories to support your system Using this manual This manual is intended to help you install your new ECAN1000HR card and get it working quickly whilst also providing enough detail about the board and its functions so that you can obtain maximum use of its fea tures even in the most demanding applications Th
17. on an antistatic surface Connect the board to the CAN field bus using the field bus interface header connector J12 Make sure that the orientation of the cable is cor rect Installation integrated with a PC 104 module stack ECAN1000 User s Manual 13 BDM 610020026 rev B Secure the four PC 104 installation holes with standoffs Connect the board to the CAN bus using the CAN header connector J12 RTD dataModule Figure 4 ECAN1000HR integrated in a PC 104 RTD cpuModule stack 3U rack or enclosure installation with a EUROCARD CPU containing an ECAN1000HR The PC 104 system can be easily inserted into a 19 rack installation us ing the CPU as a form factor adaptor Assemble your PC 104 data mod ules on an RTD single board EUROCARD computer and install the sys tem in a 19 enclosure Multiple ECAN1000HR boards can be easily con nected to this system See figure 5 below E 50 PIN EXPANSION CONNECTOR RTD dataModule EUROCARD AT 96 CPU WITH 4 EXPANSION BUS Figure 5 19 Eurocard rack installation with an integrated PC 104 dataModule and EUROCARD cpuModule computer system ECAN1000 User s Manual 14 BDM 610020026 rev B J12 Galvanically isolated CAN bus connector Table 3 below shows the CAN physical interface connector pinout This connector is to the right hand side of your board marked J12 The pinout con forms to the ISO 11898 2 standard specification PI
18. onal temperature 5V only operation PC 104 compliant The following paragraphs briefly describe the major features of the ECAN1000HR A more detailed discussion in included in Chapter 4 Hardware description and in Chapter 5 Board operation and program ming The board setup is described in Chapter 2 Board Settings A full description of the Philips SJA1000 CAN controller is included in Chapter 5 Board operation and programming CAN bus controller The ECAN1000HR CAN bus interface is implemented using the Philips SJA1000 controller This controller supports CAN Specification 2 0 This versatile chip supports standard and extended Data and Remote frames a Programmable Global Message Identifier Mask 15 message objects of 8 byte Data Length and a Programmable Bit Rate This fully integrated chip supports all the functionality of the CAN bus protocol The internal 64 byte receive FIFO is ideal for block mode data transfer from the CAN controller chip ECAN1000 User s Manual 6 BDM 610020026 rev B Physical Interface Industrial environments require galvanic isolation and bus filtering to pro vide reliable data communication and safety The galvanically isolated physical interface is uses high speed optocouplers and a DC DC con verter To protect the input from radiated bus noise a specially balanced bus filter is used The bus connectors conform to the 15011898 2 speci fication For more information on CAN bus please visit the CAN i
19. ot call any functions that use the screen read keyboard input or any file I O routines These should not be used ISRs The same problem of reentrancy also exists for many floating point emu lators This effectively means that you should also avoid floating point mathematical operations in your ISR Note that the problem of reentrancy exists no matter what programming language you use Even if you are writing your ISR in Assembly lan guage DOS and many floating point emulators are not re entrant Of course there are ways to avoid this problem such as those which activate when your ISR is called Such solutions are however beyond the scope of this manual The second major concern when writing ISRs is to make them as short as possible in term of execution time Spending long times in interrupt service routines may mean that other important interrupts are not ser viced Also if you spend too long in your ISR it may be called again be fore you have exited This will lead to your computer hanging up and will require a reboot Your ISR should have the following structure e Push any processor registers used in your ISR Most C com piler do this automatically e Put the body of your routine here e Read interrupt status register of the SJA1000 chip on your ECAN1000HR board e Clear the interrupt bit by writing to the SJA1000 CAN control ler e Issue the EOI command to the 8259 by writing 20h to address 20h e Pop all registe
20. per settings ECAN1000 User s Manual 9 BDM 610020026 rev B e CAN Bus Connector Fuse F1 000 J34 CAN Bus Termination Address Selection JPI Figure 1 Component Locations Base Address Jumpers Factory setting 300h The ECAN1000HR is I O mapped into the memory space of your host XT AT This board occupies two I O addresses starting from the base address The most common cause of failure when you are first setting up your module is address contention Some of your computers I O space is already occupied by other devices and memory resident programs When the ECAN1000HR at tempts to use its own reserved memory addresses which are being already used by another peripheral device erratic performance may occur and the data read from the board may be corrupted To avoid this problem make sure you set up the base address by using the ten jumpers marked BASE This allows you to choose from a number of different ECAN1000 User s Manual 10 BDM 610020026 rev B addresses in your host computer I O map Should the factory installed setting of 300h be incompatible to your system configuration you may change this set ting to another using the options illustrated in Table 2 The table shows the jumper settings and their corresponding values in hexadecimal form Ensure that you verify the correct location of the base address jumpers When the jumper is removed it corresponds to a logical 0 connecting the jumper
21. rs Most C compilers do this automatically ECAN1000 User s Manual 23 BDM 610020026 rev B The following C example shows what the shell of your ISR should be like Function new IRQ handler Inputs Nothing Returns Nothing Sets the interrupt flag for the EVENT void interrupt far new handler void IRQ_flag 1 Indicate to main process interrupt has oc curred Your program code should be here Read interrupt status registers Clear interrupt on ECAN1000HR outp 0x20 0x20 Acknowledge the interrupt controller Saving the Startup Interrupt Mask Register IMR and interrupt vector The next step after writing the ISR is to save the start up state of the in terrupt mask register and the original interrupt vector you are using The IMR is located in address 21h The interrupt vector you will be using is lo cated in the interrupt vector table which is an array of pointers ad dresses and it is locate din the first 1024 bytes of the memory Segment 0 offset 0 You can read this value directly but it is better practice to use DOS function 35h get interrupt vector to do this Most C compilers have a special function available for doing this The vectors for the hardware interrupts on the XT bus are vectors 8 15 where IRQO uses vector 8 and IRQ7 uses vector 15 Thus if your ECAN1000HR is using IRQ5 it corre sponds to vector number 13 Before you install your ISR temporarily mask out the IRQ yo
22. s IRQs A rising edge transition on one of these lines will be latched into the interrupt con troller The interrupt controller checks to see if the interrupts are to be ac knowledged from that IRQ and if another interrupt is being processed it decides if the new request should supersede the one in progress or if it has to wait until the one in progress has been completed The priority level of the interrupt is determined by the number of the IRQ as follows IRQO has the highest priority whilst IRQ15 has the lowest Many of the IRQs are used by the standard system resources IRQO is dedicated to the internal timer IRQ1 is dedicated to the keyboard input IRQ3 for the serial port COM2 and IRQA for the serial port COM1 Often interrupts 2 5 and 7 are free for the user ECAN1000 User s Manual 20 BDM 610020026 rev B 8259 Programmable Interrupt Controller The chip responsible for handling interrupt requests in a PC is the 8259 Interrupt Controller To use interrupts you will need to know how to read and set the 8259 s internal interrupt mask register IMR and how to send the end of interrupt EOI command to acknowledge the 8259 interrupt controller Interrupt Mask Register IMR Each bit in the interrupt mask register IMR contains the mask status of the interrupt line If a bit is set equal to 1 then the corresponding IRQ is masked and it will not generate an interrupt If a bit is cleared equal to 0 then the corresponding IRQ is
23. s further interrupts ECAN1000 User s Manual 25 BDM 610020026 rev B Example on Interrupt vector table setup in C code void far interrupt new_IRQ1_handler void ISR function proto type define IRQ1_VECTOR 3 Name for IRQ void interrupt far old IRQ1 dispatcher es ds di si bp sp bx dx cx ax ip cs flags Variable to store old Vector void far interrupt new IRQ1 hanaler void Function init irg handlers Inputs Nothing Returns Nothing Purpose Set the pointers in the interrupt table to point to our funtions ie setup for ISR s void init irg handlers void disable old IRQ1 handler dos getvect IRQ1 VECTOR 8 dos setvect IRQ1 VECTOR 8 new IRQ1 handler Gi old mask z inp 0x21 outp 0x21 Gi old mask amp 1 lt lt IRQ1 VECTOR enable Function restore do this before exiting program Inputs Nothing Returns Nothing Purpose Restore interrupt vector table void restore void Restore the old vectors disable dos setvect IRQ1 VECTOR 8 old IRQ1 handler outp 0x21 Gi old mask enable ECAN1000 User s Manual 26 BDM 610020026 rev B Chapter 6 ECAN1000HR SPECIFICATIONS Host Interface mapped device occupies 3 bytes Jumper selectable base address 8 bit data bus 16 bit AT bus connector Jumper selectable XT and AT interrupts CAN Interfaces Galvanically
24. ter 3 BOARD INSTALLATION The ECAN1000HR CAN bus interface board is very easy to connect to your industrial distributed control system Direct interface to PC 104 sys tems as well as EUROCARD boards is possible This chapter gives step by step instructions on how to install the ECAN1000HR into your system After completing the installation it is recommended that you use the diag nostic and test software to fully verify that your board is working Board Installation Keep your board in the antistatic bag until you are ready to install it to your system When removing it from the bag hold the board at the edges and do not touch the components or connectors Please handle the board in an antistatic environment and use a grounded workbench for testing and handling of your hardware Before installing the board in your computer check the jumper settings Chapter 2 reviews the factory settings and how to alter them If any alterations are needed please refer to the appropriate instructions in this chapter Do however note that incompatible settings can result in unpredictable board operation and erratic response General installation guidelines Turn OFF the power to your computer and all devices connected to the ECAN1000HR Touch the grounded metal housing of your computer to discharge any antistatic build up and then remove the board from its antistatic bag Hold the board by the edges and install it in an enclosure or place it on the table
25. ters to aid you in program ming your CAN controller chip The full functionality of the ECAN1000HR is described in the attached datasheet reprint from Philips on the SJA1000 CAN controller chip Defining the Memory Map The memory map of the ECAN1000HR occupies 2 bytes of host PC I O memory space This 3 byte window is freely selectable by the user as de scribed in Chapter 2 Table 2 After setting the base address you have access to the internal resources of the SJA1000 CAN controller chip These resources are described in the next sections reprinted from the SJA1000 chip specific user s manual ADDRESS Description BASE 00h ADDRESS BASE 01h DATA of ADDRESS BASE 02h HARDWARE RESET OF SJA1000 Table 5 ECAN Memory Map The SJA1000 chip access is multiplexed in such a way that the host must first write to BASE 0 the internal address of the CAN chip and after that perform a write to address BASE 1 with the actual data to be written into the desired memory location An example is listed below using C syn tax We assume base address is 300H Write 78H to the CAN controller Control byte located in the on chip ad dress 0 outp 0x300 0x00 outp 0x301 0x78 Address BASE 02h is a hardware reset function of the SJA1000 Performing a read or write to this address will cause a hardware reset to the CAN controller You may need to reset the chip in case of an unrecoverable error in the CAN controller chip On the followin
26. to a 1 When you set the base address of the board record the setting inside the back cover of this manual BASE ADDRESS JUMPER SETTINGS ECAN1000HR Base address Hex Jumper Settings A8 A7 A6 A5 200 0 0 00 220 0 0 0 1 240 0 0 1 0 260 0 0 1 1 280 01 00 2 0 0 1 0 1 2 0 01 10 2 0 ot 11 300 10 00 320 1 0 0 1 340 1 0 10 360 1011 380 1 1 00 3A0 1101 11 10 3E0 1111 Q JUMPEROFF J 1 JUMPER CLOSED Table 2 JP1 Base Address Jumper Settings Note The above table illustrates the settings for the high address bits A8 A5 A9 is always decoded 1 ECAN1000 User s Manual 11 BDM 610020026 rev B BASE 1 Blololololetole AB Figure 2 Base address jumpers illustrating address 300 h Interrupt channel Factory setting IRQ5 The header connector shown in Figure 3 below lets you connect the on board SJA1000 CAN controllers interrupt outputs to one of the interrupt channels available on the host XT AT bus If your board has no AT extension interrupts IRQ 10 15 are not available IRQ SELECTION alaloiala 15121110 7 8 5 43 2 Figure 3 Interrupt set to IRQ 5 Note The ECAN1000HR does not support interrupt sharing This feature is some times regarded as a part of the PC 104 special features After extensive software and hardware tests we have found that error free interrupt per formance can not be guaranteed when sharing interrupts ECAN1000 User s Manual 12 BDM 610020026 rev B Chap
27. u will be us ing This prevents the IRQ from requesting an interrupt while you are in stalling and initializing your ISR To mask the IRQ read the current IMR at I O port 21h and set the bit that corresponds to the IRQ The IMR is arranged so that bit 0 is for IRQO and bit 7 is for IRQ7 See the para graph entitled nterrupt Mask Register IMR earlier in this discussion for help in determining your IRQ s bit After setting the bit write the new value to I O port 21h ECAN1000 User s Manual 24 BDM 610020026 rev B With the startup IMR saved and the interrupts temporarily disabled you can assign the interrupt vector to point to your ISR Again you can over write the appropriate entry in the vector table with a direct memory write but this is not recommended Instead use the DOS function 25h Set In terrupt Vector or if your compiler provides it the library routine for set ting up interrupt vectors Remember that interrupt vector 8 corresponds to IRQO vector 9 for IRQ1 etc If you need to program the source of your interrupts do that next For ex ample if you are using transmitted or received messages as interrupt Sources program it to do that Finally clear the mask bit for your IRQ in the IMR This will enable your IRQ Common Interrupt mistakes Remember that hardware interrupts are from 8 15 XT IRQs are num bered 0 7 Forgetting to clear the IRQ mask bit in the IMR Forgetting to send the EOI command after ISR code disable
28. utomatically add the EOI command to the func tion you must do it yourself Other than this and a few exceptions dis cussed below you can write your ISR as any code routine It can call other functions and procedures in your program and it can access global data If you are writing your first ISR we recommend you stick to the ba sics just something that enables you to verify you have entered the ISR and executed it successfully For example set a flag in your ISR and in your main program check for the flag Note If you choose to write your ISR in in line Assembly you must push and pop registers correctly and exit the routine with the IRET in struction instead of the RET instruction ECAN1000 User s Manual 22 BDM 610020026 rev B There are a few precautions you must consider when writing ISRs The most important is do not use any DOS functions or functions that call DOS functions from an interrupt routine DOS is not re entrant that is a DOS function cannot call itself In typical programming this will not happen because of the way DOS is written But what about using inter rupts Consider then the following situation in your program If DOS func tion X is being executed when an interrupt occurs and the interrupt rou tine makes a call to the same DOS function X then function X is essen tially being called while active Such cases will cause the computer to crash DOS does not support such operations The general rule is that do n
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