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UNIVERSITI TEKNOLOGI MALAYSIA

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1. D7 SSTIMES11 5 TIMES 0 7 1FFF DO 1 D0 TOP11 A7 D0 10 D0 55 510 10 SSTIMES9 TOP9 SSTIMES8 MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L 56 D0 PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 SENT TO PORT A 0 2 HYPERTERMINAL 7 55 810 5 TIMES 0 7 1FFF DO 1 D0 TOP10 A7 D0 20 D0 DO BDR DISPLAY HEX VALUE OF DO B 11 PORT A HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 SENT TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES9 5 TIMES 0 7 1FFF DO 1 D0 TOP9 A7 D0 80 D0 DO BDR DISPLAY HEX VALUE DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 SENT TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES8 5 TIMES 00 7 1FFF DO SSTIMES7 TOP7 SSTIMES6 TOP6 SSTIMESS NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE
2. 04 D0 D0 PBDR 11 0 9 4 D7 8 D0 11 PAGE 005 aimilong asm 253 004006DA 0002 254 004006DC 51CFFFF6 255 256 004006E0 2F00 257 004006E2 203C00001FFF 258 004006 8 4E71 259 004006EA 048000000001 260 004006F0 66F6 261 004006F2 201F 262 263 004006F4 103C0002 264 004006F8 13C000800013 265 004006FE 4E4B 266 00400700 0009 267 00400702 3E3C0004 268 00400706 103 0008 269 0040070 4 4 270 0040070 0002 271 0040070E 51CFFFF6 272 273 00400712 2F00 274 00400714 203C00001 FFF 275 0040071A 4E71 276 0040071C 048000000001 277 00400722 66F6 278 00400724 201F 2 9 280 00400726 103C0001 281 0040072A 13C000800013 282 00400730 4 4 283 00400732 0009 284 00400734 3E3C0004 285 00400738 103 0008 286 0040073C 4E4B 287 0040073E 0002 288 00400740 51CFFFF6 289 290 00400744 2F00 29 00400746 203C00001FFF 292 0040074C 4E71 293 0040074E 048000000001 294 00400754 66F6 TOP3 SSTIMES2 TOP2 SSTIMES 1 DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE 69 Mon Apr 13 10 40 39 2009 0 2 D7 SSTIMES3 00 7 1FFF DO 1 D0 TOP3 7 00 02 D0 D0 PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES2 7 1FFF DO 1 D0 TOP2 A7 D0 01 D0 DO
3. Figure 8 Trigger Function 8 Answer the question in SECTION A 79 Part 3 Using Hyperterminal Trigger Another Address Program is APPENDIX 1 Type the program on the APPENDIX 2 Assemble the program using command prompt to get BIN file refer to the lab manual Flight 68000 3 Press MENU on the Logic Analyser 4 Press 4 for TRIGGER SETUP i Change the Address HEHEX should be HEX but this is the display in the Logic Analyser Trig Wrd means Word to 400400 Starting address for microprocessor ii Press MENU 5 On 68000 Microprocessor Board i Switch on the 68000 Microprocessor Board ii Open Hyperterminal on the PC Connection Description kd i hh New Connection aimi Enter a name and choose an icon for the connection Enter details for the phone number that you want to dial Name aimi Country region Icon Area code Phone number using Figure 9 Hyperterminal Connection Description Connect To 80 1 Properties Port Settings Bits per second Data bits Parity Stop bits Flow control None Restore Defaults Figure 10 COM1 Properties iii Press reset on 68000 Microprocessor Board iv Press ENTER 3 times on keyboard This figure will be entering Figure 11 v Type It Figure 12 siet Hyper Termina Melcome to the Flight 68K
4. 42 43 44 45 45 40 49 LIST OF ABBREVIATIONS EEPROM Electrically Erasable Programmable Read Only Memory EPROM Erasable Programmable Read Only Memory FKE Faculty of Electrical Engineering FYP Final Year Project IDE Integrated Drive Electronics LED Light Emitted Diode UTM Universiti Teknologi Malaysia UV Ultra Violet APPENDIX gt LIST OF APPENDICES TITLE Program for Part 3 of the Laboratory Manual Listing File for Part 3 of the Laboratory Manual Program for Part 4 of the Laboratory Manual Lab Manual for the Logic Analyser 68000 Microprocessor Board as the Test Hardware PAGE 53 61 72 73 1 INTRODUCTION First chapter will explain about the problems statement objectives scope of work and project planning for Final Year Project 1 FYP 1 and Final Year Project 2 FYP 2 This project executed based on the problem happened directly or indirectly Objective of the project is needed to ensure the target in this project will be achieved To make sure the project is on the track towards achievable objective scope of work is important Gantt chart is used as project planning to get the overall view of project completion milestone beside as a guideline of the process As an undergraduate student researches could help most of student daily schedule From the research all of the theories applied could easily remember Before run the research the laboratory ma
5. AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMESIS5 5 TIMES 00 7 1FFF DO 1 D0 TOPI5 A7 D0 READAGA 01 D0 D0 PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES14 5 TIMES D0 A7 1FFF DO 1 D0 TOP14 A7 D0 02 D0 DO PBDR sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A SSTIMES 12 TOP12 SSTIMES11 TOP11 DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B 55 0 2 HYPERTERMINAL D7 SSTIMES13 5 TIMES D0 A7 1FFF DO 1 D0 TOP13 A7 D0 04 D0 DO PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 D7 SSTIMESI2 5 TIMES 0 7 1FFF DO 1 D0 TOP12 A7 D0 08 D0 0 DISPLAY HEX VALUE OF DO B 11 PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2
6. MOVE B 57 1 00 7 00 40 D0 DO PBDR sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES7 5 TIMES D0 A7 1FFF DO 1 D0 TOP7 A7 D0 20 D0 DO PBDR sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES6 5 TIMES DO A7 1FFF DO 1 D0 TOP6 7 00 510 00 D0 PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 5 55 54 SSTIMES3 TOP3 TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L 58 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES5 5 TIMES D0 A7 1FFF DO 1 D0 5 A7 D0 508 00 0 sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES4 5 TIMES D0 A7 1FFF DO 1 D0 TOP4 A7 D0 04 D0 DO PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII C
7. growth over the years Without you all I would not have had the inner strength to persevere through the fact that to be implemented in future Thank you ACKNOWLEGEMENTS Thanks to Allah with His strength and bless I could complete my Final year Project FYP successfully I would like to thank my parents for providing me with the opportunity to gain this tremendous education and the necessary tools to succeed in life My supervisor En Zuraimi bin Yahya that assisting teaching and encouraging me to make sure the project done according to the schedule and successfully AII the sacrifice effort time and ideas contributed by all of you may Allah SWT rewarding it I would also like to thank to En Zainul Abidin technition from Microprocessor Lab which allow me to use the PC and instruments there Finally I would like to express my sincere thanks to all the lecturer and staffs in Faculty of Electrical Engineering UTM my fellow course mates friends and those who involved directly and indirectly in this project for all their helps encourage and advice Thank you very much ABSTRACT The aim of this project is to build a lab manual on how to use the Logic Analyser by using a 68000 microprocessor board as test hardware The Logic Analyser can be used to monitor real time hardware operation of 68000 microprocessor chip The lab manual for the Logic Analyser is intended to assist student to learn how to use the equipment and unde
8. 00 MOVE B 00800013 L JMP 0426 W Figure 4 8 b Question and Answers for the Part 4 of the Laboratory Manual 4 43 Aquired Data from the Logic Analyser To trigger the data from the chip set the trigger function as 000000 It will trigger when the address was found on the chip After the Logic Analyser was triggered the data will be display on multiple digital signals on a single screen The triggered result by using the Logic Analyser was shown on Figure 4 2 MOVEA L 4003F0 A7 MOVE B 80 0080000D L MOVE B 00 00800005 L MOVE B 80 0080000 1 MOVE B 00800007 L 00800011 L DO EORLW 800FF DO MOVE B 00 00800013 L JMP 0426 W Figure 49 The Program That Shown on a Single Screen 46 4 4 44 The Program for Part 4 of the Laboratory Manual The program below is cross assembled and programmed to the EPROM for the 68000 board compared with the data aquired from the Logic Analyser Figure 4 3 is the actual program of this part When comparing the program it is same EQU 80000D EQU 800005 EQU 800011 EQU 80000F EQU 800007 EQU 800013 bin ORG 0 DC L 4003F0 DC L START DS B 400 8 ORG 400 MOVEA L 4003F0 A7 MOVE B 80 PACR MOVE B 00 PADDR MOVE B 80 PBCR MOVE B FF PBDDR READAGA MOVE B PADR DO EOR 11111111 D0 MOVE B D0 PBDR JMP READAGA DS B 8000 END Figure 4 10 Program for Part 4 of the Laboratory Manual 5 DISCUSSION The
9. L LFFF DO 36 0040045 4E71 TOP16 NOP 37 0040045 048000000001 SUB L 1 00 38 00400464 66F6 TOP16 39 00400466 201F MOVE L A7 D0 62 40 00400408 103 0055 55 D0 41 42 0040046 13 000800013 D0 PBDR 43 00400472 4 4 TRAP 11 44 00400474 0009 DC B 0 9 45 00400476 3E3C0004 MOVE 4 D7 46 0040047A 103 0008 SSTIMES15 MOVE B 8 D0 47 0040047 4E4B TRAP 11 48 00400480 0002 DC B 0 2 49 00400482 51CFFFF6 DBF D7 S5TIMES15 50 51 00400486 2F00 MOVE L D0 A7 52 00400488 203C00001FFF LFFF DO 53 0040048E 4E71 15 54 00400490 048000000001 SUB L 1 00 55 00400496 66F6 BNE 15 56 00400498 201 MOVE L 7 00 57 0040049 6084 READAGA 58 59 0040049C 103 0001 NO3 MOVE B 01 D0 60 004004A0 13C000800013 MOVE B D0 PBDR 61 004004 6 4 4 TRAP 11 62 004004A8 0009 DC B 0 9 63 004004AA 3E3C0004 MOVE 4 D7 63 PAGE 002 aimilong asm Mon Apr 13 10 40 39 2009 64 004004AE 103 0008 SSTIMESI4 MOVE B 8 D0 65 004004B2 4E4B TRAP 11 66 004004B4 0002 DC B 0 2 67 004004B6 51CFFFF6 DBF D7 S5TIMES14 68 69 004004BA 2F00 MOVE L D0 A7 70 004004BC 203 00001 MOVE L LFFF DO 71 004004 2 4 71 TOP14 NOP 72 004004 048000000001 SUB L 1 00 73 004004 66F6 TOP14 74 004004CC 201F MOVE L A7 D0 75 76 004004CE 103C0002 MOVE B 02 D0 77 004004D2 13C000800013 MOVE B D0 PBDR 78 004004D8 4E4B TRAP 11 79 004004DA 0009 DC B 0 9 80 004004DC
10. PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES1 00 7 1FFF DO 1 D0 295 00400756 201 296 297 00400758 6000FCC6 298 299 0040075C 0C000007 NO7 300 00400760 6600FCBE 301 302 00400764 103COOFF 303 00400768 13C000800013 304 0040076E 4 4 305 00400770 0009 306 00400772 3E3C0004 307 00400776 103 0008 SSTIMES 18 308 0040077A 4E4B 309 0040077C 0002 310 0040077E 51CFFFF6 311 312 00400782 2F00 313 00400784 203C00001 FFF 314 0040078A 4E71 TOP18 315 0040078C 048000000001 MOVE L BRA CMP B BNE MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L 70 A7 D0 READAGA 7 D0 READAGA FF DO D0 PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES18 00 7 1FFF DO 1 D0 PAGE 006 aimilong asm 316 00400792 66F6 317 00400794 201F 318 319 00400796 103C0000 320 0040079 13C000800013 32 004007A0 4 4 322 004007A2 0009 323 004007A4 3 3 0004 324 004007A8 103 0008 325 004007 4E4B 326 004007 AE 0002 327 004007B0 51CFFFF6 328 329 004007B4 2F00 330 004007B6 203C00001FFF 331 004007BC 4 71 332 004007 048000000001 333 004007 4 66F6 334 004007 6 201 335 336 004007 8 6000 56 337 004007 4 4 338 004007 0000 339 340 341 71 13 10 40 39 2009 SSTIMES 17 QUIT BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L TO
11. Re edit the program if it has the error Ignore the warning because it is not effect to the program The listing file and BIN file will be create after assemble For the second part of the project the program will be burn to the EPROM So the program should be split to two For split the program SPLIT2 exe software can be use Figure 2 11 shows the instruction to split the program to even and odd Then the program can burn to the EPROM using Chip Max 400400 START TOUE 580 lt P 506 R 580 SFF PBDDR SET PORT AS OUTPUT SET PORT A AS INPUT READAGA d PADR DA TIE READPA 7 DO QUIT 1 MOUE B SAA DB Figure 2 8 Write the Program Using Command Prompt 14 C WINDOWS system32 cmd exe o x C Documents and Settings amy gt cd my documents C Documents and Settings amy My Documents gt cd psm C Documents and Settings amy My Documents PSM gt cd 68k C Documents and Settings amy My Documents PSM 68K gt xasm aimilong aimilong aimilo ng Flight 6888B84PC Macro Cross fissembler Version 1 10 Copyright 1987 1989 Crossware Products All rights reserved 5 Tel 7 3 gt 227721 Commencing first pass Commencing second pa Bytes filed 976 O errors O warnings 1 91715 17 NPSM 68K dir Figure 2 9 Assemble Program Using Command Prompt C WINDOWS system32 cmd exe 0 x aimi3 asm AIMI3 BIN AIMI3 EU
12. Switch on the Logic Analyser then check the 68000 Disassembler POD was assembled or not Figure 4 1 a Instructions for the Part 1 of the Laboratory Manual 4 the 68000 Disassembler POD to chip MC68000 68000 Microprocessor Board Make sure the connection is correct Pin 1 on DP 68000 to Pin 1 chip Figure 4 68000 Disassembler POD Figure 5 Connection between 68000 Disassembler POD to 68000 microprocessor 5 Press Confirm Figure 6 The disassembler has been loaded Figure 4 1 b Instructions for the Part 1 of the Laboratory Manual 33 34 4 0 Part 2 of the Laboratory Manual Part 2 is the basic set up of the Logic Analyser and how to use the trigger function The data that will be trigger on this part started from reset vector 000000 But the result only showed certain part of the data because a lot of data line on the Logic Analyser been registered 4 2 1 Instructions from the Laboratory Manual for Part 2 Figure 4 2 a and b shows the instruction of Part 2 of the laboratory manual Part 2 Introduction for the Logic Analyser Using Reset Vector Press 1 for CONFIGURATION 1 Set clock selected as EXTERNAL li Press MENU 2 Press 1 for CONFIGURATION i Set clock selected as EXTERNAL ii Press MENU ADDRO0 gt A00 ADDRO1 gt 01 ADDRO2 gt A02 ADDRO03 A03 ADDRIS gt 15 Figure 4 2 a Instructions for the Part 2 of the Laboratory Manual 35 Press the but
13. board The 68000 microprocessor board is connected to the computer using the RS 232 interface The program can be uploaded to the 68000 microprocessor board by taking the step shown on Figure 3 2 until Figure 2 9 Connection Description hh New Connection Enter a name and choose an icon for the connection Name aimi Icon Figure 3 2 Hyperterminal Connection Description 24 Enter details for the phone number that you want to dial Country region 0999991 Area code 18020 Phone number Connect using COM1 Figure 3 3 Hyperterminal Connect To COM1 Properties Port Settings Bits per second Data bits Parity Stop bits Flow control Tm Figure 3 4 COMI Properties 25 sime Hyper Termina Welcome to the Flight 58K Mk2 Dre ned tures by Flight Electronics International Lid ui iers of high technolo to education 1 81703 221721 Fax 817 Feail tight den co uk Compuserve 10 Firmware Version V3 01 C Flight Electronics International Ltd 1993 F gt nco Pt acte Figure 3 5 After press ENTER 3 times Welcome to the Flight 68K Mk Designed and Manufactured by Flight Electronics International Ltd iers of high technology products to education Call 01703 227721 Fox 81703
14. on the existing tested hardware In this chapter the observation from the Logic Analyser s data is the main item Four parts from the laboratory manual are the steps on how to use the Logic Analyser properly The result can be analyse on the experiment session The trigger function will be used to initiate aquiring the data from the Logic Analyser Laboratory manual stated that the trigger function of the Logic Analyser is on part 2 part 3 and part 4 Part 2 is the basic of trigger function while part 3 is comparing the data between the Logic Analyser and listing file This chapter will clarify the research results The result for this project is the procedure and the question created on the laboratory manual 32 4 1 Part 1 of the Laboratory Manual 41 1 Instructions from the Laboratory Manual for Part 1 In this part student will learn how to connect the Logic Analyser with 68000 Disassembler POD and attach the 68000 Disassembler POD to 68000 microprocessor chip No question is given on this part by laboratory manual to be answer by the student Figure 4 1 a and b shows the instruction of Part 1 of the laboratory manual Part 1 Beginning 1 In this experiment we will use Logic Analyser to analyse the working of a 68000 Microprocessor 2 Connect the Disassembler POD 68000 to the Logic Analyser Make sure that the Disassembler POD 68000 is connecting correctly on MC68000 chip Figure 3 Connection to the Logic Analyser 3
15. steps on how to use the Logic Analyser properly was include on the laboratory manual The result was shows in chapter 4 After completing this project the result of the laboratory manual will be discuss in details in this chapter The trigger function will be used to initiate aquiring the data from the Logic Analyser Laboratory manual stated that the trigger function of the Logic Analyser is on part 2 part 3 and part 4 Part 2 15 the basic of trigger function while part 3 is comparing the data between the Logic Analyser and listing file This chapter will clarify the research results 5 1 Part 1 of the Laboratory Manual In this part student will learn how to connect the Logic Analyser with 68000 Disassembler POD and attach the 68000 Disassembler POD to 68000 microprocessor chip The respond from the person who had done the testing said that this part is easy to follow Question is not given on this part because it just the basic of the connection of the Logic Analyser 48 5 20 Part 2 of the Laboratory Manual On the result only showed certain part of the data because a lot of data line on the Logic Analyser been registered The student will be understood of some necessary instruction on how to use Logic Analyser after answer the question From Figure 4 3 a Table 1 the data from the Logic Analyser was shown that the operation on address A0000A on cursor 0028 From the listing file this part not available in analysis because we n
16. using the Logic Analyser Compare the data on the Logic Analyser end listing file board and the Logic Analyser using Disassembler POD 68000 i software hardware analysis Figure3 1 Flow Chart for the Part 3 3 3 1 Software for Part 3 of the Laboratory Manual In this project the software part was written on EASy68K editor The software that will be used in this project has been explained in literature review After completing writing the program in a source file asm the file is assembled to create the S format which has the machine codes of the program if there is no error Then to load the program to the 68000 microprocessor board the S format file will be created Data in the S format file will be loaded into the user memory of the 68000 board The step load the program into the user memory of the 68000 board is shown in Figure 2 9 in literature review The listing file created together will be used to analyse the hardware operation of the 68000 board by comparing with the Logic analuser display The program for this part is in Appendix A and the listing file is in Appendix B 23 3 3 2 Hardware for Part 3 of Laboratory Manual The hardware is a 68000 microprocessor board and application board The detail about the existing board was explained in literature review Hyperterminal is the terminal emulator software which can be use for upload the program to the 68000 microprocessor
17. 0 sp prog rd 40040E 0005 sp prog rd Table 3 DISASSEMBLER DISPLAY GLITCH Figure 4 5 a Question and Answers for the Part 3 of the Laboratory Manual 40 2 After Logic Analyser was triggered what the STATE LISTING showed ANSWER Address BERR BGACK UDS LDS 400400 1 00 400402 00 400404 00 400406 00 400408 00 80000C 10 40040A 00 40040C 00 40040E 00 Table 4 STATE LISTING GLITCH 3 2 110 110 110 110 110 101 110 110 110 peek ek peek MIR pum pn pah pam pa paa paa 3 3 Compared listing file in Part 3 with DISASSEMBLER DISPLAY in Table 1 It is same Why ANSWER The data on the Logic Analyser is the same when we compared with listing file because the data that was transferred on 68000 microprocessor chip is the same program 4 Open the timing diagram and draw the FC2 FCO press group if not display ANSWER the timing diagram must be related each other 5 What the relationship between timing diagram and Table 4 Explain ANSWER the timing diagram must be related each other Figure 4 5 b Question and Answers for the Part 3 of the Laboratory Manual 41 6 Repeat procedure in Part 3 no need to begin step 5 proceed to 6 Change Address HEHEX Trig Wrd to 400408 After Logic Analyser was triggered what the STATE LISTING sh
18. 00 Microprocessor Board to the another EPROM that was programmed Below is the listing file of the program Figure 17 Replace the EPROM from the 68000 microprocessor board 85 001 7 12 Thu Apr 09 15 55 06 2009 1 68000 program that control the 8 bit LED Display 2 3 00800000 PACR EQU 80000D 4 00800005 PADDR EQU 800005 5 00800011 PADR EQU 5800011 6 0080000 PBCR EQU 80000F 7 00800007 PBDDR EQU 800007 8 00800013 PBDR EQU 800013 9 10 bin 11 00000000 ORG 0 12 00000000 004 003 0 L 5400360 13 00000004 00000400 DC L START 14 00000008 05 400 8 15 16 00000400 ORG 400 17 18 00000400 2 7 004003 0 START MOVEA L 4003F0 A7 19 00000406 13FCO0800080000D MOVE B 80 PACR 20 0000040 13 000000800005 MOVE B 00 PADDR PORT AS INPUT 21 00000416 13FC00800080000F MOVE B 80 PBCR 22 0000041 13FCOOFFO00800007 MOVE B FF PBDDR SET PORT B AS OUTPUT 23 24 00000426 103900800011 READAGA MOVE B PADR DO PORT A INPUT SWITCH TO 00 25 0000042C 0 4 EOR 11111111 00 COMPLIMENT THE SWITCH FUNCTION 26 00000430 13c000800013 MOVE B DO PBDR DO TO PORT B OUTPUT LED 27 28 00000436 4EF80426 JMP READAGA 29 30 0000043A here DS B 8000 31 END Assembly complete Bytes filed 32768 0 errors 0 warnings Figure 18 Listing file 2 Press 4 for TRIGGER SETUP 1 Change the Address HEHEX Trig Wrd to 000000 ii Press MENU 3 Press 7 for 68000 DISASSEMBLER VER 1
19. 00 Microprocessor Board The important thing on this board is 68000 microprocessor and EPROM 27C256 Even and Odd Figure 2 13 shows the example of connection between 68000 microprocessor and EPROM 27C256 2 22 22 gt m anh mb mh Penyahkod alamat A2 A2 A2 A2 AS QO rPoCobocO NUA Figure 2 13 Connection between 68000 microprocessor and EPROM 27C64 Example 2 4 2 Existing Application Board The Application Board was shown in Figure 2 12 The device that was used on the existing application board is Light Emitted Diode LED and switch After the program was load on the 68000 microprocessor or burn on the EPROM that devices can be function like the program planning before The application board will be connected to the 68000 microprocessor board using the IDE cable 17 2 4 3 EPROM 27C256 EPROM 27 256 is a non volatile device that the data retained without power The Figure 2 13 shows that the two EPROM was use on the 68000 microprocessor board because it has two parts of memory which is even and odd EPROM must be erased using ultra violet UV light before reprogramming EPROM uses the expensive ceramic package and has a quartz window to allow UV to pass through After the EPROM memory is clear burn the new program on the EPROM using the programmer Figure 2 14 EPROM 27C256 18 2 5 Chip Max Programmer Chip Max is one of the programme
20. 000 microprocessor architecture software and interfacing techniques Prentice Hall University of Michigan 1986 User manual for the Logic Analyser 1989 APPENDIX Program for 3 of Laboratory Manual A 68000 program that control the 8 bit LED Display Pattern Control By using Switch SW1 on Application board PACR EQU PADDR EQU PADR EQU PBCR EQU PBDDR EQU PBDR EQU ORG START MOVE B MOVE B MOVE B MOVE B READAGA MOVE B BTST BNE CMP B BNE MOVE B MOVE B TRAP DC B MOVE 55 516 MOVE B TRAP DC B DBF MOVE L MOVE L TOP16 NOP SUB L 80000D 800005 5800011 580000 5800007 5800013 5400400 80 PACR 00 PADDR SET PORT A AS INPUT 80 PBCR FF PBDDR SET PORT AS OUTPUT PADR DO JSR READPA 7 D0 QUIT 1 D0 NO3 DO PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES16 5 TIMES 00 7 1FFF DO 1 D0 SSTIMES 15 15 SSTIMES 14 TOP14 SSTIMES 13 BNE MOVE L MOVE B DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L BRA MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP 54 TOP16 A7 D0 55 D0 DO PBDR sDISPLAY HEX VALUE OF DO B 11
21. 00001 88 c Explain the about the data on cursor 0022 and 0023 ANSWER For the first word from the operand 00A0 it will put on address 00223C and second word 0001 it will put on address 00223E d How many bus cycles on that table ANSWER 2 bus cycle Section B 1 After Logic Analyser was triggered what the DISASSEMBLER DISPLAY showed ANSWER Address Data Operation 400400 13FC MOVE B 80 0080000D L 400402 0080 sp prog rd 400404 0080 sp prog rd 400406 000D sp prog rd 400408 13FC MOVE B 00 00800005 L 80000C 8080 sp prog wr 40040A 0000 sp prog rd 40040C 0080 sp prog rd 40040E 0005 sp prog rd Table 3 DISASSEMBLER DISPLAY GLITCH 2 After Logic Analyser was triggered what the STATE LISTING showed ANSWER Address BERR BGACK UDS LDS R W FC2 FCO 400400 1 1 00 1 110 400402 1 1 00 1 110 400404 1 1 00 1 110 400406 1 1 00 1 110 400408 1 1 00 1 110 80000 1 1 10 0 101 40040 1 1 00 1 110 40040 1 1 00 1 110 40040 1 1 00 1 110 Table 4 STATE LISTING GLITCH 89 3 Compared the listing file in Part 3 with DISASSEMBLER DISPLAY in Table 1 It is same Why ANSWER The data on the Logic Analyser is the same when we compared with listing file because the data that was transferred on 68000 microprocessor chip is the same program 4 Open the timing diagram and draw the FC2 FCO press group if not displa
22. 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom 4 On 68000 Microprocessor Board i Switch on the 68000 Microprocessor Board ii Press reset on 68000 Microprocessor Board 5 Logic Analyser will be triggered the data and displayed to the screen Figure 19 Trigger Function 6 Check the data on Logic Analyser and answer the question on SECTION C 86 QUESTIONS Section A 1 What the operation on cursor 0027 ANSWER MOVEA L 00000080 D0 87 2 On cursor 0028 write the Address Data Operation Bus Transfer UDS LDS R W and FC2 FCO ANSWER Cursor Address Data Operation Bus UDS LDS R W FC2 Transfer FCO 0028 A0000A 0000 sp data wr low 10 101 byte Table 1 DISASSEMBLER DISPLAY a What does the result of R W signal signify ANSWER Write b What does the result of UDS LDS signal signify on cursor 0028 ANSWER The data is on low byte So UDS is 1 and LDS is 0 3 We can see the operation on cursor 0021 until 0023 Cursor Address Data Operation Bus UDS LDS R W 2 Transfer 0021 00223A 2C7C MOVEA L 00A00001 A6 00 110 0022 00223C 0 sp prog rd 00 110 0023 00223E 0001 rd 00 110 Table 2 DISASSEMBLER DISPLAY a Refer to operation on cursor 0021 which one the destination ANSWER A6 b What is the operand ANSWER 00A
23. 028 write the Address Data Operation Bus Transfer UDS LDS R W and FC2 FCO ANSWER Cursor Address Data Operation Bus UDS LDS Transfer 0028 A0000A 0000 sp data wr low 10 byte Table 1 DISASSEMBLER DISPLAY a What does the result of R W signal signify ANSWER Write b What does the result of UDS LDS signal signify on cursor 0028 ANSWER The data is on low byte So UDS is 1 and LDS is 0 3 We can see the operation on cursor 0021 until 0023 Cursor Address Data Operation Bus Tran sfer 0021 00223A 2C7C MOVEA L 00A00001 A6 00 0022 00223C 0 prog rd 00 0023 00223E 0001 sPprog rd 00 Table 2 DISASSEMBLER DISPLAY Figure 4 3 a Question and Answers for the Part 2 of the Laboratory Manual 37 Refer to operation on cursor 0021 which one the destination ANSWER A6 What is the operand ANSWER 00A00001 Explain the about the data on cursor 0022 and 0023 ANSWER For the first word from the operand 00 0 it will put address 00223C and second word 0001 it will put on address 00223E How many bus cycles on that table ANSWER 2 bus cycle Figure 4 3 b Question and Answers for the Part 2 of the Laboratory Manual 4 2 3 Data from the Listing File for Part 2 of Laboratory Manual The listing file is not included in this part because all the data was taken directly from 68000 micropro
24. 14 and 15 X Press ENTER ee B a d to oa Call 01 03 Fax 01 Enail Light co uk Compuserve 109043 Firmware Version 3 81 Flight Electronics International Ltd 1993 F gt It LOAD S FORMAT OBJECT FILE FROM TERMINAL TERMINATOR IS CONTROL T ENTER_OFFSET CR IF NOME LOAD COMPLETED Figure 14 Load Completed aimi HyperTerminal Welcome to the Flight 68K Mk2 Designed and Manufactured by Flight Electronics International Ltd Suppliers of high technology products to education Call 01703 227721 Fax 81703 330039 Email sales amp flight demon co uk Compuserve 100043 3305 Firmware Version 93 01 Flight Electronics International Ltd 1993 LORD S FORMAT OBJECT FILE FROM TERMINAL TERMINATOR IS CONTROL T ENTER OFFSET CR IF NONE LOAD ENTER ADDRESS 480408 Figure 15 Type Address for Microprocesser 6 Assuming you have press Menu as instructed above in Part 3 1 1 Press 7 for 68000 DISASSEMBLER VER 1 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom iii Repeat procedure Part 3 2 iii 2 1v 2 ix 7 Logic Analyser will be triggered on the screen and it will get the data Figure 16 Trigger Function 8 Answer the question SECTION B 83 84 Part 4 Trigger data directly from EPROM 1 Switch off the Microprocessor Board Replace the EPROM 27 256 on the 680
25. 2 004005E8 203C00001FFF 173 004005 4E71 174 004005 0 048000000001 175 004005F6 66F6 176 004005F8 201F 177 178 004005FA 103C0040 179 004005FE 13C000800013 180 00400604 4 4 181 00400606 0009 182 00400608 3E3C0004 183 0040060C 103 0008 184 00400610 4 4 185 00400612 0002 186 00400614 51 CFFFF6 187 188 00400618 2F00 189 0040061A 203C00001FFF SSTIMES7 DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L 66 D7 SSTIMES8 0 7 1FFF DO 1 D0 7 00 40 D0 D0 PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES7 0 7 1FFF DO PAGE 004 aimilong asm 190 00400620 4E71 191 00400622 048000000001 192 00400628 66F6 193 0040062A 201F 194 195 0040062C 103C0020 196 00400630 13C000800013 197 00400636 4 4 198 00400638 0009 199 0040063A 3E3C0004 200 0040063E 103C0008 201 00400642 4E4B 202 00400644 0002 203 00400646 51CFFFF6 204 205 0040064A 2F00 206 0040064C 203C00001FFF 207 00400652 4E71 208 00400654 048000000001 209 0040065A 66F6 210 0040065C 201F 211 212 0040065E 103C0010 213 00400662 13C000800013 214 00400668 4 4 215 0040066A 0009 216 0040066C 3E3C0004 217 00400670 103 0008 218 00400674 4 4 219 00400676 0002 220 00400678 51CFFFF6 221 222 0040067C 2F00 223 0040067E 203C00001FFF 224 00400684 4E71 225 00400686 048000000001 22
26. 330039 Enail sales flight demon co uk Compuserve 100043 3305 Firmware Version V3 01 Flight Electronics International Ltd 1993 LOAD S FORMAT OBJECT FILE FROM TERMINAL TERMINATOR 15 CONTROL T ENTER OFFSET CR IF NONE _ Figure3 6 It 26 Designad and by Flight Electronics International Ltd 5 85 products to education liers x 2 log si 01783 1 p 917 Email demon co uk Compuserve 180043 3305 Firmware Version V3 01 Flight Electronics International Lid 1993 F gt lt LORD 57 FORMAT OBJECT FILE FROM TERMINAL TERMINATOR IS CONTROL T ENTER OFFSET CR TF NONE Figure 3 7 Load data BIN to chip using Hyperterminal Welcome to the Flight 68K Mk2 Designed and Manufactured by Flight Electronics International Ltd EAT liers of hi h technol TN to education Call 81 03 227 Fax 01 9 mail sales Io demon co Compuserve 109043 3305 Firmware Version V3 01 Flight Electronics International Ltd 1993 F gt lt LOAD S FORHAT OBJECT FILE FROM TERMINAL TERMINATOR IS CONTROL T ENTER OFFSET CR IF NOME EXT Ao detect 9600 PUR MOM Figure 3 8 Load Completed aimi HyperTerminal Fle Edt View Cal Transfer Help Os 58 on f Welcome to the Flight 68K Mk2 _ Designed and Manufactured by Flight Electronics International Ltd Suppliers of high technology products to education Call 81703 227721 Fax 01703 330039
27. 3E3C0004 MOVE 4 07 81 004004 0 103 0008 SSTIMESI3 MOVE B 8 D0 82 004004E4 4E4B TRAP 11 83 004004E6 0002 DC B 0 2 84 004004E8 51CFFFF6 DBF D7 S5TIMES13 85 86 004004EC 2F00 MOVE L D0 A7 87 004004EE 203C00001FFF MOVE L LFFF DO 88 004004F4 4E71 TOP13 NOP 89 004004F6 048000000001 SUB L 1 00 90 004004FC 66F6 BNE 91 004004 201 MOVE L AT DO 92 93 00400500 103C0004 MOVE B 04 D0 94 00400504 13C000800013 MOVE B D0 PBDR 95 0040050A 4 4 TRAP 1 96 0040050 0009 DC B 0 9 97 0040050E 3E3C0004 MOVE 4 D7 98 00400512 103C0008 SSTIMES12 MOVE B 8 D0 99 00400516 4E4B TRAP 11 100 00400518 0002 DC B 0 2 101 0040051A 51CFFFF6 DBF D7 S5TIMES12 102 103 0040051 2F00 MOVE L 00 7 104 00400520 203C00001 FFF MOVE L 8 1FFF DO 105 00400526 4E71 TOP12 NOP 64 106 00400528 048000000001 SUB L 1 00 107 0040052 66F6 BNE TOP12 108 00400530 201F MOVE L A7 D0 109 110 00400532 103 0008 MOVE B 08 D0 111 00400536 13C000800013 MOVE B DO PBDR 112 0040053C 4E4B TRAP 11 113 0040053E 0009 DC B 0 9 114 00400540 3E3C0004 MOVE 4 D7 115 00400544 103 0008 55 511 MOVE B 8 D0 116 00400548 4E4B TRAP 11 117 0040054A 0002 DC B 0 2 118 0040054C 51CFFFF6 DBF D7 SSTIMESII 119 120 00400550 2F00 MOVE L 00 7 121 00400552 203C00001FFF MOVE L LFFF DO 122 00400558 4E71 123 0040055 048000000001 SUB L 1 00 124 00400560 66 6 BNE 11 125 00400562 201 MOVE L 7 00 126 65
28. 6 0040068C 66F6 2277 0040068E 201F 228 229 00400690 103 0008 230 00400694 13C000800013 231 0040069A 4E4B TOP7 SSTIMES6 TOP6 55 55 5 SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP 67 Mon Apr 13 10 40 39 2009 1 D0 TOP7 A7 D0 20 D0 DO PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES6 00 7 1FFF DO 1 D0 TOP6 A7 D0 10 D0 DO PBDR 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES5 7 1FFF DO 1 D0 TOPS 7 00 08 D0 DO PBDR 11 232 0040069 0009 233 0040069 3 3 0004 234 004006 2 103 0008 235 004006A6 4 4 236 004006A8 0002 237 004006AA 51CFFFF6 238 239 004006AE 2F00 240 004006 0 203C00001FFF 241 004006B6 4E71 242 004006B8 048000000001 243 004006BE 66F6 244 004006 0 201F 245 246 004006 2 103 0004 247 004006 6 13 000800013 248 004006 4E4B 249 004006 0009 250 00400600 3E3C0004 251 00400604 103 0008 252 00400608 4 4 55 54 SSTIMES3 DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE 68 0 9 4 07 8 D0 11 0 2 D7 SSTIMES4 00 7 1FFF DO 1 D0 TOP4 A7 D0
29. 800005 MOVE B 00 PADDR 14 00400410 13FC00800080000F MOVE B 80 PBCR 15 00400418 13FCOOFF00800007 FF PBDDR Figure 4 6 X Listing File for part of the Program 4 4 4 of the Laboratory Manual Part 4 is like a reverse engineering method The students do not know the program that have on the chip To get the data from the chip the student can use the Logic Analyser to capture the data The programmed EPROM will be replace from original EPROM for observe the data 4 4 1 Instructions from the Laboratory Manual for Part 4 In this part student will be exposed with the other application of trigger function such as 000000 That address is a starting point for program that already uploaded to the 68000 microprocessor board Figure 4 7 shows the instruction of Part 3 of the laboratory manual 43 Part 4 Trigger data directly from the EPROM Switch off the Microprocessor Board Replace the EPROM 27C256 on the 68000 Microprocessor Board to the another EPROM that was programmed Below is the listing file of the program Press 4 for TRIGGER SETUP i Change the Address HEHEX Trig Wrd to 000000 Press MENU Press 7 for 68000 DISASSEMBLER VER 1 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom On 68000 Microprocessor Board i Switch on the 68000 Microprocessor Board ii Press reset on 68000 Microprocessor Board Logic Analyser wi
30. Designed end Manufactured E Flight Electronics International Ltd ers of high technolo to education 1 81703 221721 Fax 61783 330639 Featl salesttlisht den co uk Compuserve Firmware Version V3 01 Flight Electronics International Ltd 1993 F gt Figure 11 After press ENTER RG times 81 Welcome to the Flight 68K Manufactured by Flight Electronics International Ltd iers of high technology products to education Enail salesBflight dewon co uk Compuserve 100042 3305 Firmware Version V3 801 Flight Electronics International Ltd 1993 LOAD S FORMAT OBJECT FILE FROM TERMINAL TERMINATOR 15 CONTROL T ENTER OFFSET lt CR gt IF NONE _ Figure 12 Type 40 vi Press ENTER after Hyperterminal show ENTER OFFSET CR IF NONE vil Click TRANSFER on the MENU and then SEND TEXT FILE K Mk2 sin and Manufactured by Flight Electronics International Ltd liers of high technology products to education colt 81789 2277S Fax 01705 3 390039 Email saleseflight demon co uk Compuserve 100043 3305 Firmware Version V3 01 C Flight Electronics International Lid 1993 F gt 14 LORD S FORMAT OBJECT FILE FROM TERMINAL TERMINATOR IS CONTROL T ENTER OFFSET CR IF NONE Figure 13 Load data BIN to chip using Hyperterminal Search BIN file that you create before 82 ix After LOAD COMPLETED type and enter address 400400 Figure
31. Email sales amp flight demon co uk Compuserve 100043 3305 Firmware Version 93 01 Flight Electronics International Ltd F gt 1t LOAD S FORMAT OBJECT FILE FROM TERMINRL TERMINATOR IS CONTROL T ENTER OFFSET CR IF NONE LOAD ENTER ADDRESS 480408_ Figure 3 9 Address for Microprocessor 27 After program is uploaded on the 68000 microprocessor board 68000 Disassembler POD and 68000 microprocessor chip was shown on Figure 3 10 Figure 3 10 Connections between 68000 Disassembler POD and 68000 microprocessor chip Disassembler POD is connected to the 68000 microprocessor chip to observe the operation of the 68000 microprocessor board The connection between 68000 28 3 3 3 Analysis for Part 3 of the Laboratory Manual The last step for the Part 3 is the analysis the data read from the display of the logic analyser The trigger function on the Logic Analyser can be used to initiate data to be collected from 68000 Disassembler POD We can compare the data with listing file that was created before The data should be get from the Logic Analyser supposedly same with listing file The detail operation of the 68000 microprocessor can be triggered by the Logic Analyser The detail step for analyse the data is in the laboratory manual on Appendix D 3 4 Part 4 of the Laboratory Manual Figure 3 11 shows the steps taken to implement the Part 4 laboratory The step of this part is quite simi
32. HARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES3 5 TIMES D0 A7 4 1FFF DO 1 D0 TOP3 A7 D0 55 52 2 SSTIMESI TOPI NO7 SSTIMES 18 MOVE B DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L MOVE B MOVE B TRAP DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L BRA CMP B BNE MOVE B MOVE B TRAP DC B MOVE MOVE B 59 02 D0 DO PBDR sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 HYPERTERMINAL D7 SSTIMES2 5 TIMES 00 7 1FFF DO 1 D0 TOP2 A7 D0 01 D0 DO PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 D7 SSTIMES1 5 TIMES 0 7 1FFF DO 1 D0 7 00 READAGA 7 00 READAGA FF DO DO PBDR sDISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 18 SSTIMES17 TOP17 QUIT Font name Courier New TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L DC B MOVE MOVE B TRAP DC B DBF MOVE L MOVE L NOP SUB L BNE MOVE L BRA TRAP DC B Font size 10 Tab type 1 Tab size 8 60 11 TO P
33. N AIMI3 LST AIMI3 ODD aimi4 ASM AIMI4 BIN AIMI4 EUN AIMI4 LST H F UDD aimilong asm AIMILONG BIN AIMILONG LST APP ASM 5 BAT ASM68K EXE AT I E2 CMD BIN2HEX EXE calc asm CALC BIN CALC HEX CHKLIST 5 DATAGS IN Figure 2 10 Create the Listing File and BIN file 15 C WINDOWS system32 cmd exe eig x 02 23 1993 TILP ASM 04 10 1996 TTLPER ASM 09 25 1992 TUTOR ASM 09 25 1992 TUTOR LNK 10 10 1991 A 528 09 25 1992 TUTOR SCF 16 16 1991 TUTOR SYM 07 15 1996 68 10 28 1989 61 951 03 19 1996 09 497 ZAKIAH ASM 261 File lt s gt 1 718 082 bytes 2 Dir lt s gt 8 038 531 072 bytes free DOCUME 1 amy MY DOCU INPSMNG8K gt split2 aimilong bin boeeee 2 WAYS FILE SPLITTER V3 0 seeeec Output even file nameLaimilong EUNI Output odd file lit to aimilong EUN aimilong ODD 2 ways splitting now 1 amy MY DOCU 1 PSM 68K gt Figure 2 11 Split the BIN file to EVN and ODD files Using Command Prompt 2 4 Test Hardware In this project the 68000 microprocessor board and application board will be use as the test hardware EPROM 27C256 was used on the 68000 microprocessor board Figure 2 12 Application Board Side and 68000 Microprocessor Board Right Side 16 2 4 4 68000 Microprocessor Board From Figure 2 12 was shown the architecture of 680
34. ORT A 0 2 HYPERTERMINAL D7 SSTIMES18 5 TIMES D0 A7 1FFF DO 1 D0 8 A7 D0 00 D0 DO PBDR DISPLAY HEX VALUE OF DO B 11 AT PORT HYPERTERMINAL 0 9 4 D7 8 D0 BACKSPACE ASCII CHARACTER 11 TO PORT A 0 2 D7 SSTIMES17 5 TIMESJSR WRITEPB 00 7 1FFF DO 1 D0 TOP17 A7 D0 READAGA 11 0 0 APPENDIX Listing File for Part 3 of the Laboratory Manual PAGE 001 aimilong asm Mon Apr 13 10 40 39 2009 3 0080000D PACR EQU 80000D 4 00800005 PADDR EQU 800005 5 00800011 PADR EQU 800011 6 0080000F PBCR EQU 80000F 7 00800007 PBDDR EQU 800007 8 00800013 PBDR EQU 800013 9 10 00400400 ORG 400400 11 12 00400400 13FC00800080000D START MOVE B 80 PACR 13 00400408 13 000000800005 MOVE B 00 PADDR 14 00400410 13 00800080000 MOVE B 80 PBCR 15 00400418 13FCOOFF00800007 FF PBDDR 16 17 00400420 103900800011 READAGA MOVE B PADR 18 19 00400426 08000007 BTST 7 00 20 0040042 660003A0 BNE QUIT 21 0040042E 0C000001 CMP B 1 00 22 00400432 06000068 BNE NO3 23 24 00400436 103C00AA MOVE B 25 0040043A 13C000800013 MOVE B D0 PBDR 26 00400440 4 4 TRAP 1 27 00400442 0009 DC B 0 9 28 00400444 3E3C0004 MOVE 4 D7 29 00400448 103C0008 55 516 MOVE B 8 D0 30 0040044C 4E4B TRAP 1 31 0040044 0002 DC B 0 2 32 00400450 51CFFFF6 DBF D7 SSTIMES 16 33 34 00400454 2F00 MOVE L D0 A7 35 00400456 203C00001FFF MOVE
35. P17 SUB L BNE MOVE L BRA TRAP DC B 342 Font name Courier New 343 Font size 10 344 Tab type 1 345 Tab size 8 Assembly complete Bytes filed 976 0 errors 0 warnings 8 A7 D0 00 D0 0 11 0 9 4 D7 8 D0 11 0 2 D7 SSTIMES17 D0 A7 1FFF DO NOP 1 D0 TOP17 A7 D0 READAGA 11 0 0 APPENDIX Program for 4 of Laboratory Manual A 68000 program that control the 8 bit LED Display PACR EQU PADDR EQU PADR EQU PBCR EQU PBDDR EQU PBDR EQU bin ORG DC L DC L DS B ORG START MOVEA L MOVE B MOVE B MOVE B MOVE B READAGA MOVE B EOR MOVE B JMP here DS B END 80000D 800005 800011 80000F 800007 800013 0 4003F0 START 400 8 400 4003F0 A7 80 PACR 00 PADDR SET PORT A AS INPUT 80 PBCR FF PBDDR SET PORT AS OUTPUT PADR DO PORT A INPUT SWITCH DO 11111111 D0 DO PBDR 00 TO PORT B OUTPUT LED READAGA 8000 APPENDIX D Lab Manual for the Logic Analyser 68000 Microprocessor Board as the Test Hardware OBJECTIVE To learn how to use the Logic Analyser 2 To study the operation of the 68000 Microprocessor Chip EQUIPMENT 1 Logic Analyser 2 Disassembler POD for 68000 3 68000 Microprocessor board 4 Hlight 68000 application board 5 EPROM 27c256 THEORY 1 Logic Analyser A Logic Analyser is an electronic instrument that could display mul
36. PAGE 003 aimilong asm Mon Apr 13 10 40 39 2009 127 00400564 103C0010 MOVE B 10 D0 128 00400568 13C000800013 MOVE B D0 PBDR 129 0040056E 4 4 TRAP 1 130 00400570 0009 DC B 0 9 131 00400572 3E3C0004 MOVE 4 07 132 00400576 103 0008 55 510 MOVE B 8 D0 133 0040057 4 4 1 134 0040057 0002 DC B 0 2 135 0040057E 51CFFFF6 DBF D7 SSTIMES 10 136 137 00400582 2F00 MOVE L D0 A7 138 00400584 203C00001 FFF MOVE L LFFF DO 139 0040058A 4E71 10 140 0040058 048000000001 SUB L 1 00 141 00400592 66F6 BNE 10 142 00400594 201 MOVE L A7 D0 143 144 00400596 103C0020 MOVE B 20 D0 145 0040059A 13C000800013 MOVE B D0 PBDR 146 004005A0 4 4 TRAP 1 147 004005 2 0009 DC B 0 9 148 004005A4 3E3C0004 MOVE 4 D7 149 004005 8 103 0008 SSTIMES9 MOVE B 8 D0 150 004005AC 4E4B TRAP 1 151 004005 0002 DC B 0 2 152 004005B0 51CFFFF6 DBF D7 S5TIMES9 153 154 004005B4 2F00 MOVE L D0 A7 155 004005B6 203C00001FFF MOVE L LFFF DO 156 004005BC 4E71 9 157 004005 048000000001 SUB L 1 00 158 004005 4 66F6 9 159 004005 6 201 MOVE L A7 D0 160 161 004005C8 103C0080 MOVE B 80 D0 162 004005 13C000800013 MOVE B D0 PBDR 163 004005D2 4 4 TRAP 1 164 00400504 0009 DC B 0 9 165 00400506 3E3C0004 MOVE 4 D7 166 004005 103 0008 SSTIMES8 MOVE B 8 D0 167 004005DE 4 4 TRAP 1 168 004005 0 0002 DC B 0 2 169 004005E2 51CFFFF6 170 171 004005E6 2F00 17
37. PS7 10 14 Pind 1 077 UNIVERSITI TEKNOLOGI MALAYSIA DECLARATION OF THESIS UNDERGRADUATE PROJ ECT PAPER AND COPYRIGHT AIMI RUZAINI Date of birth 8 JUNE 1986 Title J LAB MANUAL FOR THE LOGIC ANALYSER 68000 MICROPROCESSOR AS THE TEST HARDWARE Academici 20002000 I declare that thisthesisis classified as Contains confidential information under the Official Secret Act 1972 RESTRIC TED Contains restricted information as specified by the organisation where research wasdone OPEN ACCESS agree that my thesisto be published asonline open access full text acknowledged that Universiti Teknologi Malaysia reservesthe right asfollows The thesis is the property of Universiti Teknologi Malaysia The Library of Universiti Teknologi Malaysia has the right to make copies forthe purpose of research only The Library right to make copiesof the thess foracademic exchange Certified by aimi OETA SIG NATURE SIG NATURE OF SUPERVISOR 860608 29 6074 EN ZURAIMI BIN YAHYA NEW IC NO PASSPORTNO NAME OF SUPERVISOR Date NOTES If thessis CONFIDENTIAL or RESTRIC TED please attach with the letter from the organisation with period and reasons for confidentiality or restriction 1 hereby declare that I have read this report and in my opinion this thesis is sufficient terms of scope and quality for the award of the degr
38. at also in part 1 is how to connect between 68000 Disassembler POD to the 68000 microprocessor chip It is very important because if the 68000 Disassembler POD wrongly attach the data couldn t appeared correctly from Logic Analyser Refer to Appendix D to know how to make the connection correctly 3 2 Part2 of the Laboratory Manual In part 2 of the laboratory manual was explained on how to set up the Logic Analyser and test the trigger function by using the reset vector The set up is very important because the result will be effect if using the wrong set up The laboratory manual on Appendix D will help the students to set up the Logic Analyser The reset vector is the starting point of 68000 microprocessor to start the program The reset vector for 68000 microprocessor is 000000 In part 2 the set up of trigger function was provided The laboratory manual must be followed so that the students can use it perfectly 33 Part 3 of the Laboratory Manual 22 Figure 3 1 is showing the planning for the Part 3 of this project that separate into three sessions which is software hardware and analysis This part is different with part 4 Part 3 is comparing between the data from the Logic Analyser and the listing file Load the program binary file to 68000 microprocessor board using Hyperterminal Write the program Create the listing file and binary file between 58000 microprocessor Analyse the hardware
39. at can be used for 68000 microprocessor such as EASy68K ide68K and so on Another way for make the program is use Command Prompt For this project EASy68K software and Command Prompt will be used for make and assemble the program 2 3 1 EASy68K Software Figure 2 3 shows the windows of EASy68K software The program of EASy68K is simple and easy to understand To write the program in EASy68K we use the editor as shows in Figure 2 4 As shown in Figure 2 4 that is the template to write program This software can be assembling the program to know the error of the program as shown in Figure 2 6 and the full program is in Appendix A After assemble the program the listing file will be create The example of listing file was shown in Figure 2 7 and the full listing file is in Appendix B Project Options Oo Program Written by Date 1 t Description 9 TRAP 15 Halt Simulator END START Figure2 3 Windows of EASy68K software Written by Description 11 Figure 2 4 5990009 800005 900011 90000F 5800007 800013 8780 8100 PADDA 8480 TY PADDR PADR 87 29 QUIT 41 00 AGAk DG DO PBDR 811 0 9 84 07 Editor of EAS y68K software sSET PORT AS INPUT SET PORT OUTPUT JSR READPA JDISPLAY HEX VALUE CF DO B 3AT PORT HYPERTERMINAL Figure 2 5 W
40. cessor board Therefore the data are only getting from the Logic Analyser The trigger function had been used to simplify Logic Analyser to make the breakpoint 4 3 Part3 of the Laboratory Manual In part 3 the comparison between data from the Logic Analyser and listing file could be seen All the data from Logic Analyser are more detail compared with listing file By using Logic Analyser memory will be seen easily by student that stored in it address 4 3 1 Instructions from Laboratory Manual for Part 3 In this part student will be exposed with the other application of trigger function such as 400400 That address is a starting point for program that already uploaded to the 68000 microprocessor board Figure 4 4 a and b shows the instruction of Part 3 of the laboratory manual Part 3 Using Hyperterminal Trigger the Another Address 1 Type the program on the APPENDIX 2 Assemble the program using command prompt to get BIN file refer to the laboratory manual Flight 68000 3 Press MENU on the Logic Analyser 4 Press 4 for TRIGGER SETUP 1 Change Address should be HEX but this is display in the Logic Analyser Trig Wrd means Word to 400400 Starting address for microprocessor Press MENU 5 On 68000 Microprocessor Board i ii iii iv v vi Switch on the 68000 Microprocessor Board Open Hyperterminal on the PC Press reset on 68000 Microprocessor Board Pr
41. dents to understand the function of the Logic Analyser 14 Project Planning Table 1 1 Gantt chart for FYP 1 PSM 1 TASK WW SCHEDULE 3456 7 8 9 1 0 Meeting with Coordinator Meet The Supervisor Get amp Confirm the Title Analyze the title Check the manual of the Logic Analyser Study the software Study the hardware Preparation for presentation Presentation Report Writing Table 1 2 Gantt chart for FYP 2 PSM 2 TASK W W W W W w WwW WwW WwW WWW W SCHEDULE 2345 6789 1 111 1 0 234 6 Built a program Built the hardware Determine the connection of the system to the Logic Analyser Built a laboratory manual Submit project summary Preparation for Presentation and Demo Presentation and Demo Writing Thesis 2 LITERATURE REVIEW As we know in statement problem has been explained that the Logic Analyser is never being used in the FKE s laboratory UTM For solving this problem the laboratory manual is provided to the students as their guide and reference on how to use the Logic Analyser easily The analysis is using the Logic Analyser will be running after the program was uploaded on the 68000 microprocessor chip The existing board for the application device will be used to te
42. e so that the original binary codes can be burned into two EPROM high even byte and low odd byte because on the 68000 microprocessor architecture used two used using command prompt The command for split the binary file was shown in Figure 2 11 3 4 Hardware for Part 4 of the Laboratory Manual Labeling the EPROM as even and odd to make sure the ROMs will not be inter change Each EPROM label are program with the data from their respective splitted binary file using the Chip Max programmer Before burning the program the memory of EPROM was erased If the EPROM is still with the data erase the memory of the EPROM using EPROM The details about EPROM was explained in literature review Then the EPROM 27C256 s was replace on their respective socket the 68000 Microprocessor Board 30 Figure 3 12 Replace the EPROM from 68000 microprocessor board 3 4 3 Analysis for Part 4 of the Laboratory Manual Analysis the data that can be triggered from the Logic Analyser is the last step for the Part 4 Actually for this part students do not know the program that was burned on the EPROM So in this step student will be triggered the data to know the program that was operated on the 68000 microprocessor board The detail step for analyse the data is in laboratory manual on Appendix D 4 RESULT ANALYSIS To ensure the program execute properly the program need to test
43. e switch is pressed ANSWER MOVEA L 4003 0 7 MOVE B 80 0080000D L MOVE B 400 00800005 L MOVE B 80 0080000F L MOVE B FF 00800007 L MOVE B 00800011 L D0 MOVE B 00800013 1 JMP 0426 W
44. ee of Bachelor of Engineering Computer Signature NAE ms Name of Supervisor En Zuraimi bin Yahya Date 15 May 2009 LAB MANUAL FOR THE LOGIC ANALYSER 68000 MICROPROCESSOR AS THE TEST HARDWARE AIMI RUZAINI BINTI AHMAD A report submitted partial fulfilment of the requirement for the award of the degree of Bachelor of Engineering Computer Faculty of Electrical Engineering Universiti Teknologi Malaysia MAY 2009 I declare that this report entitled Lab Manual for Logic Analyser 68000 Microprocessor is the Test Hardware 15 the result of my own research except as cited in the references The thesis has not been accepted for any degree and is not concurrently submitted in candidature of any other degree aimi Signature Er eni iiia dte Name Aimi Ruzaini binti Ahmad Date 15 May2009 Dedicated to my lovely family My dad Ahmad bin Din My lovely mum Rahimah binti Mat Yassim My inspiration elder brother Aizuddin Akmal bin Ahmad My spirit brother Anwar Ashraf bin Ahmad My dearest sister Anis Ruwaida binti Ahmad My pamper sister Aini Razanah binti Ahmad To all my friends Unforgettable those who are assisting and taught me in developing this project En Zuraimi bin Yahya my supervisor Truly your assistance En Zainul Abidin bin Halim is valuable and I will never forget it This Project Report is dedicated to all those who have supported my educational
45. ess ENTER 3 times on keyboard This figure will be entering Type It Press ENTER after Hyperterminal show ENTER OFFSET lt CR IF NONE Click TRANSFER on the MENU and then SEND TEXT FILE Search BIN file that you create before After LOAD COMPLETED type go and enter address 400400 Press ENTER Figure 4 4 a Instructions for the Part 3 of the Laboratory Manual 39 6 Assuming you have press Menu as instructed above in Part 3 1 ii Press 7 for 68000 DISASSEMBLER VER 1 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom iii Repeat procedure Part 3 2 2 1v 2 ix 7 Logic Analyser will be triggered on the screen and it will get the data 8 Answer the question SECTION B Figure 4 4 b Instructions for the Part 3 of the Laboratory Manual 4 3 22 Question and Answer for Part 3 of Laboratory Manual SECTION B To ensure that the student understood of some necessary instruction on how to use Logic Analyser the questions will be given Figure 4 5 a b and c shows the question and answer for part 3 of the laboratory manual Section B 1 After Logic Analyser was triggered what the DISASSEMBLER DISPLAY showed ANSWER Address Data Operation 400400 13FC MOVE B 80 0080000D L 400402 0080 sp prog rd 400404 0080 sp prog rd 400406 000D sp prog rd 400408 13FC MOVE B 00 00800005 L 80000C 8080 sp prog wr 40040A 0000 sp prog rd 40040C 008
46. igure 2 6 Figure 2 7 Figure 2 8 Figure 2 9 Figure 2 10 Figure 2 11 Figure 2 12 Figure 2 13 Figure 2 14 LIST OF FIGURES TITLE The Test Hardware Application Board and 68000 Microprocessor Board Logic Analyser Disassembler POD for 68000 Windows of EASy68K Software Editor of EASy68K Software Write the Program using EASy68K Software Window of EASy68K Software Listing File from EASy68K Software Write the Program Using Command Prompt Assemble the Program Using Command Prompt Create the Listing File and BIN file Split the BIN file to EVN and ODD files Using Command Prompt Application Board Left Side and 68000 Microprocessor Board Right Side Connection between 68000 microprocessor and EPROM 27C64 Example EPROM 27C256 PAGE 10 11 11 12 12 13 14 14 15 15 10 17 Xii Figure 2 15 Figure 2 16 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 3 5 Figure 3 6 Figure 3 7 Figure 3 8 Figure 3 9 Figure 3 10 Figure 3 11 Figure 3 12 Figure 4 1 a Figure 4 1 b Figure 4 2 a Figure 4 2 b Figure 4 3 a Figure 4 3 b Figure 4 4 a Figure 4 4 b Figure 4 5 a Chip Max Programmer EPROM eraser Flow Chart for the Part 3 Hyperterminal Connection Description Hyperterminal Connect To COMI Properties After press ENTER 3 times Type It Load data BIN to chip using Hyperterminal Load Completed Type Address for Microp
47. ing the program the data is same with the acquired data from the Logic Analyser EQU 80000D EQU 800005 EQU 800011 EQU 80000F EQU 800007 EQU 800013 bin ORG 0 DC L 4003F0 DC L START DS B 400 8 ORG 400 MOVEA L 4003F0 A7 MOVE B 80 PACR MOVE B 00 PADDR MOVE B 80 PBCR MOVE B FF PBDDR READAGA MOVE B PADR DO EOR 11111111 D0 MOVE B D0 PBDR JMP READAGA DS B 8000 END Figure 5 1 program that be created before programmed the EPROM 6 CONCLUSION AND SUGGESTIONS 6 1 Recommendation on Future Works This project is only to apply certain part of the function of the logic analyser because of the time constraint Most of the time is spent on exploring the functionality of the Logic Analyser because this project runs without a specific usage manual This project could be further expand so that all the other functions in the Logic Analyser Among of the suggestion to continue this project is by utilising the print function that is available on the Logic Analyser To print the data from the Logic Analyser print function is very important because the triggered data is very long and taking long time to write by hand The advantage of this function is very useful to the students Other than that for part 4 in the provided lab manual should try to use the EEPROM because it will save a lot of time By the EPROM it will take quite long time erase and reprogrammed so if there is erro
48. lar with part 3 It is separate into three sessions which is software hardware and analysis This part is like a reverse engineering method Students do not know the program that was burn on the EPROM Then student can use the Logic Analyser to analyse the program on the EPROM Write the Burn the even Analyse the program and odd files to hardware using the the Logic 270256 Analyser Create the liszirg file and binary Connect between 1 file 68000 Get the data micropracessor from the Logic Y board and the Analyser Split the binary Logic Aralyser file to even and using odd files Disasse nbler PCD 68006 gt software hardware analysis Figure 3 11 Flow Chart for the Part 4 29 3 4 11 Software for Part 4 of Laboratory Manual EASy68K editor is the software that will be use in this part of the laboratory manual which is same in part 3 The different in this part 15 that the program should be written for ROMable code for RESET entry so it must be located in the address of the ROM area The program for this part is shown in Appendix C After completing writing the program in a source file asm the file is assembled to create the S format which has the machine codes of the program if there is no error The binary file created will be used as the data to program to the EEPROM as the 68000 board simple boot firmware Then the even address and odd address data of program has to divided to separat
49. ll be triggered the data and displayed to the screen Figure 19 Trigger Function 6 Check the data on Logic Analyser and answer the question on SECTION C Figure 4 7 Instructions for the Part 4 of the Laboratory Manual 44 4 4 2 Question and Answer for Part 4 of Laboratory Manual SECTION C The student will understood how to use Logic Analyser when the answer the questions that will be given in Section C of the laboratory manual Figure 4 8 a and b shows the question and answer for part 4 of the laboratory manual Section C 1 Write the program that you can get from the Logic Analyser from address 000400 until 000436 ANSWER MOVEA L 4003 0 7 MOVE B 80 00800000 MOVE B 400 00800005 L MOVE B 80 0080000F L MOVE B FF 00800007 L MOVE B 00800011 1 00 EORI W 00 MOVE B 00800013 L JMP 0426 W What is the benefit if we used the ROM that was programmed ANSWER No needs to use the PC for upload the program Press the SW1 port 0 what happened to LED ANSWER e LED 0 light off Press the SW1 port 0 until port 7 what happened to LED ANSWER e All LED light off Figure 4 8 a Question and Answers for the Part 4 of the Laboratory Manual 45 5 Rewrite program will make LED to light up when switch is pressed ANSWER MOVEA L 4003 0 7 MOVE B 80 00800000 MOVE B 400 00800005 L MOVE B 80 0080000F L MOVE B FF 00800007 L MOVE B 00800011 1
50. nts couldn t understand the data that was displayed from the listing file of the software And sometimes the student misreading the data that given in the listing file The Logic Analyser can be solving that problem Student will be able to view the real operation of the software and hardware through the multiple digital signals output The data that will be display is one by one on the memory location So it is easier to the student to read the data that existed in the program compared with listing file Figure 1 1 The Test Hardware Application Board and 68000 Microprocessor Board 12 Objectives of Project By this project it will solve the problem that faced by most of the students Therefore the objectives to overcome all of these are 1 To assist student to learn how to use the equipment and understand the operation of the software loaded on the 68000 microprocessor 2 develop laboratory manual for the Logic Analyser using the 68000 microprocessor board as the test hardware 1 3 Scope of Work This project done base on the scope of guide line that been fixed as follows 1 Explore function of the Logic Analyser and refer the information about Logic Analyser on the internet 2 Compare the data of the program between the listing file and the data on Logic Analyser 3 Trace the data on the 68000 microprocessor chip without software reverse engineering method 4 Build a laboratory manual which allow stu
51. ntu pelajar untuk debug dan faham tentang putaran bus melalui operasi mikroprosessor 68000 TABLE CONTENTS TITLE DECLARATION DEDICATION ACKNOWLEGEMENTS ABSTRACT ABSTRAK TABLE OF CONTENTS LIST OF TABLES LIST OF FIGURES LIST OF ABBREVIATIONS LIST OF APPENDICES INTRODUCTION 1 1 Problems Statement 1 2 Objectives of the Project 13 Scope of Work 14 Project Planning LITERATURE REVIEW 2 1 Logic Analyser 2 2 Disassembler POD for 68000 2 3 Software 68000 microprocessor vii PAGE ii iii iv vi vii xi xii A A N 10 2 4 2 5 2 6 2 3 1 EASy68K Software 2 3 2 Command Prompt Test Hardware 2 4 1 68000 Microprocessor Board 2 4 2 Existing Application Board 2 4 5 EPROM 27C256 Chip Max Programmer EPROM Eraser METHODOLOGY 3 1 3 2 3 3 3 4 Part 1 of the Laboratory Manual Part 2 of the Laboratory Manual Part 3 of the Laboratory Manual 3 3 1 Software for Part 3 of the Laboratory Manual 3 3 2 Hardware for Part 3 of the Laboratory Manual 3 3 3 Analysis for Part 3 of the Laboratory Manual Part 4 of the Laboratory Manual 3 4 1 Software for Part 4 of the Laboratory Manual 3 4 2 Hardware for Part 4 of the Laboratory Manual 3 4 3 Analysis for Part 4 of the Laboratory Manual RESULT ANALYSIS 4 1 4 2 Part 1 of the Laboratory Manual 4 1 1 Instructions from Laboratory Manual for Part Part 2 of the Laboratory Ma
52. nual 4 2 Instructions from the Laboratory Manual for Part 2 10 13 15 16 16 17 18 19 21 21 22 22 23 28 28 29 29 30 32 32 34 34 viii 4 3 4 4 422 Question and Answer Part 2 of Laboratory Manual SECTION A 4 2 3 Data from the Listing File for Part 2 of Laboratory Manual Part 3 of the Laboratory Manual 431 Instructions from the Laboratory Manual for Part 3 4 3 2 Question and Answer for Part 3 of Laboratory Manual SECTION B 4 3 3 Data from the Listing File for Part 3 of Laboratory Manual Part 4 of the Laboratory Manual 441 Instructions from the Laboratory Manual for Part 4 4 4 2 Question and Answer for Part 4 of Laboratory Manual SECTION C 4 4 3 Aquired Data from the Logic Analyser 4 4 4 Program for Part 4 of the Laboratory Manual DISCUSSION 5 1 5 2 5 3 5 4 Part 1 of the Laboratory Manual Part 2 of the Laboratory Manual Part 3 of the Laboratory Manual Part 4 of the Laboratory Manual SUGGESTIONS AND CONCLUSION 6 1 6 2 Recommendation on Future Works Conclusion 36 37 37 38 39 41 42 42 44 45 46 47 48 48 49 50 51 REFERENCES Appendix A Appendix B Appendix C Appendix D 52 53 61 12 73 TABLE 11 1 2 LIST OF TABLES TITLE Gantt chart for FYP 1 Gantt chart for FYP 2 PAGE xi FIGURE NO Figure 1 1 Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 F
53. nual is needed as a guide line If without the laboratory manual the research will take quite long time to search all the other references In assisting and helping students to be easier the laboratory manual for the Logic Analyser will be provides 11 Problems Statement The Logic Analyser is the instrument that never being used before in the Faculty of Electrical Engineering FKE University Teknologi Malaysia UTM This instrument is important to know because today it is been used in most industries Also it is an advantage if we know to use it in proper Among of few advantages of this instrument are could trace the data that have on the chip by using reverse engineering method and also it could display the data that cannot done by some software The data that will display is very detail 68000 microprocessor board is the test hardware for this project The application devices that use on this project are LEDs and switches It is normal applications are connected to a microprocessor board as an output The application board for LEDs and switches is already existed on the laboratory The application board should connect by IDE cable to the 68000 microprocessor board for LED and switch to be functional Figure 1 1 shows that the test hardware that will be use on this project The test hardware will be connected to the Logic Analyser Using Logic Analyser the real time hardware operation of microprocessor chip can be monitor Most stude
54. ot create the source code of the program But by using Logic Analyser the data can be observed Figure 4 3 a Table 2 shown the instructions from the 68000 microprocessor board on address 00223A This program already embedded on the board for reset vector function 5 3 Part 3 of the Laboratory Manual The comparison between data from the Logic Analyser and listing file could be seen 400400 is a starting point for program that already uploaded to 68000 microprocessor board Compared with the listing file the data from Logic Analyser are more details From Figure 4 5 a Table 3 the data from the Logic Analyser was shown That is the operation on address 400400 until 40040E The data between the Logic Analyser and the listing file in Figure 4 6 is same but in the data on Logic Analyser dispaly are more details Figure 4 5 a Table 4 is the details from the state listing on the Logic Analyser And the operations which had done by every line in 68000 microprocessor chip Here also shown active or inactive of each line in the chip 49 5 4 Part 4 of the Laboratory Manual Reverse engineering method was used in this part Figure 4 7 was shows the step how to capture the data from the 68000 microprocessor The program below is cross assembled and programmed to the EPROM for the 68000 board compared with the acquired data from the Logic Analyser Figure 4 10 is the program that be created before programmed the EPROM When compar
55. owed ANSWER Addres BERR BGACK UDS LDS 2 400408 1 00 110 00 00800005 1 80000C 8080 sp prog wr 10 101 40040A 0000 sp prog rd 00 110 40040C 0080 sp prog rd 00 110 40040E 0005 sp prog rd 00 110 Table 5 STATE LISTING 7 Compare the Table 5 and Table 4 Explain ANSWERX It is the same thing because we run the same program Figure 4 5 c Question and Answers for the Part 3 of the Laboratory Manual 4 3 3 Data from the Listing File for Part of Laboratory Manual Figure 4 6 was shows the listing file of the program When the result from table 3 in Figure 4 5 a comparing with Figure 4 6 the data is similar but the data from the Logic Analyser is more detail compared with data in the listing file If look at the address 400400 the operation from logic analyser is MOVE B 80 0080000D L but from the listing file is MOVE B 4580 PACR Actually this is the same PACR was declared before start the program as 0080000D The Logic Analyser will analyse the PACR is 0080000D as the hexadecimal number So for the conclusion between the Logic Analyser data and listing file are same 42 3 00800000 EQU 80000D 4 00800005 EQU 800005 5 00800011 EQU 800011 6 0080000F EQU 80000F 7 00800007 EQU 800007 8 00800013 EQU 800013 9 10 00400400 ORG 400400 11 12 00400400 13 008000800000 START 80 PACR 13 00400408 13 000000
56. r after the program is burned to erase the EPROM and reprogrammed will take very long time EEPROM can be erased by overwriting during reprogramming and take no extra time for erasing 51 6 2 Conclusion As a conclusion this project has been completed successfully and fulfilling the objective and scope specified By practicing the laboratory manual for this project student will be expose on method of writing a program cross assembling the program writing a ROMable program and splitting the binary file of the program so the data can be stored in two ROM mapped as even and odd byte After replacing the ROM on its respective socket on the 68000 board student will be exposed on how to use the Logic Analyser to analyse the 68000 hardware line based on the program executed on the 68000 processor The laboratory manual is in Appendix D REFERENCES Donald Krantz James Stanley 65000 assembly language techniques for building programs 274 edition University of Michigan 2007 William D Cramer Gerry Kane 68000 microprocessor handbook McGraw Hill 2 edition 2006 Joseph J Carr 68000 User s Manual 1987 Contributor Motorola Staff MC 68000 16 bit Microprocessor User s Manual Motorola Prentice Hall 3 edition 1982 Walter A Triebel Avtar Singh The 68000 and 68020 microprocessors hardware software and interfacing techniques Prentice Hall University of Michigan 1991 Walter A Triebel Avtar Singh The 68
57. r that can be use for burn the program to the chip EPROM 27 256 is available to use for program the chip Actually not all devices can be programmed using Chip Max In Figure 2 15 shows the Chip Max instrument Figure 2 15 Chip Max Programmer 19 2 6 EPROM Eraser EPROM must be erased using UV light Before reprogramming the EPROM ensure that the EPROM memory is clear without the data Then after erase the data the new program can be programmed on the chip Figure 2 16 EPROM eraser 3 METHODOLOGY In this chapter the methodology of this project will be achieving the objective of the project Overall in this project the laboratory manual is dividing by four parts For the first part is beginning on how to connect the Logic Analyser with 68000 Disassembler POD and the correct way of the connection of 68000 Disassembler POD to the 68000 microprocessor chip The second part is the introduction about the Logic Analyser on how to set up the Logic analyser and trigger the data using reset vector After the student has known the step how to use the Logic Analyser the program will be uploaded to the 68000 microprocessor board by using Hyperterminal on the third part The last part is triggering the data directly from the EPROM 21 31 Part 1 of the Laboratory Manual The beginning on how to connect the Logic Analyser with 68000 Disassembler POD had been explained on part 1 of the laboratory manual Other items th
58. rite the Program using EASy68K software 12 ris 60 Edito Assaber v3 7 19 2000 alnriong am Pow yta T OD SCUBA oe o e du DO PEDR DIBPLAY HEX VALUE OF DO B JAT PORT HYPERTERBINAL TBACKEPACE ASCII CHARACTER SENT TO PORT A MYPERTERMINAL 04 D0 DO PODA DISPLAY HEX VALUE DO B PORT A HYPERTERNINAL HD WARNING END dreckve misang addrerr nol 00900002 00800005 50200011 00900007 00900007 00800013 00400400 00400400 90400408 00400410 00400418 00400420 00400426 00400424 0040042Y 00400452 00400436 00400454 00400440 00400442 Figure 2 6 1 137 009009800008 isFcoosooosoooor isrcoorraosoooo7 103500500011 08000007 66000320 02000001 66000068 103COOkA 13 000800015 aran Window of EASy68K software 4800000 5600005 4600011 1800007 4800007 4600013 3400400 180 PACR 400 PADDR 8160 3FF PBDDR PADR DO 7 00 61 0 NOS 4144 00 00 PBDR 11 0 9 Figure 2 7 Listing File from EASy68K software 13 2 3 2 Command Prompt Command Prompt can be use as the editor and assembler to the make a program Figure 2 8 shows the editor to write the program using command prompt After finish writing the program assemble the program as shown in Figure 2 9 using XASM exe The error and warning can show after assemble
59. rocessor Connections between 68000 Disassembler POD and 68000 microprocessor chip Flow Chart for the Part 4 Replace the EPROM from the 68000 microprocessor board Instructions for the Part 1 of the Laboratory Manual Instructions for the Part 1 of the Laboratory Manual Instructions for the Part 2 of the Laboratory Manual Instructions for the Part 2 of the Laboratory Manual Question and Answers for the Part 2 of the Laboratory Manual Question and Answers for the Part 2 of the Laboratory Manual Instructions for the Part 3 of the Laboratory Manual Instructions for the Part 3 of the Laboratory Manual Question and Answers for the Part 3 of the Laboratory Manual 18 19 22 23 24 24 25 25 26 26 27 27 28 30 32 33 34 35 36 37 38 39 39 xiii Figure 4 5 b Figure 4 5 c Figure 4 6 Figure 4 7 Figure 4 8 a Figure 4 8 b Figure 4 9 Figure 4 10 Figure 5 1 Question and Answers for the Part 3 of the Laboratory Manual Question and Answers for the Part 3 of the Laboratory Manual Listing File for part 3 of the Program Instructions for the Part 4 of the Laboratory Manual Question and Answers for the Part 4 of the Laboratory Manual Question and Answers for the Part 4 of the Laboratory Manual The Program That Shown on a Single Screen The Program for Part 4 of the Laboratory Manual The program that be created before programmed the EPROM 40 41
60. rstand the operation of the software loaded on the 68000 microprocessor Student also will be able to view the real operation of the software and hardware through the multiple digital signals output The logic of listing file created by assembling the source program can be visualized on the display of the Logic Analyser Trigger function can be used as a breakpoint for Logic Analyser to start capturing data on the 68000 board and helps student to debug and understand the bus cycle operation of a 68000 microprocessor ABSTRAK Tujuan projek dijalankan adalah untuk menyediakan satu manual penggunaan makmal mengenai bagaimana menggunakan Logic Analyser dan litar mikroprosessor 68000 adalah sebagai litar uji Logic Analyser boleh digunakan untuk meneliti secara langsung operasi pada cip mikroprosessor 68000 Dengan tersedianya manual penggunaan makmal mengenai Logic Analyser ini ia dapat membantu pelajar untuk belajar bagaimana menggunakan peralatan dan memahami operasi yang terdapat di dalam perisian mikroprosessor 68000 Pelajar juga akan dapat melihat operasi sebenar dalam perisian dan perkakasan melalui keluaran pelbagai isyarat digital Logik yang terdapat pada listing file yang diwujudkan pembinaan perisian sumber boleh dilihat di paparan Logic Analyser Fungsi trigger boleh digunakan sebagai breakpoint Logic Analyser untuk memulakan menangkapan data kotak mikroprosessor 68000 dan ia dapat memba
61. sembler POD to 68000 microprocessor 5 Press Confirm Figure 6 The disassembler has been loaded 77 Part 2 Introduction for the Logic Analyser Using Reset Vector Figure 7 Main Menu Press 1 for CONFIGURATION 1 Set clock selected as EXTERNAL li Press MENU 2 Press 2 for TIMING DIAGRAM i Press FORMAT for change the label ii Press CLEAR to delete ADDROO and rename to 00 refer below ADDROO A00 ADDROI t A01 ADDRO2t A02 ADDRO3 A03 ADDRIS5 15 ii X Press the button on right side of Logic Analyser to rename the address iv Press tab cursor to continue change the label Repeat step Part 2 2 ii and 2 v A After finish labeling press EXIT vi Press MENU 78 3 Press 3 for STATE LISTING i Confirm that no data on the Logic Analyser ii Press PAGE DEC page decreases GOTO TRG go to trigger until it shows the 0000 POS on the upper left of Logic Analyser display Starting point it will be triggering POS is position Press MENU 4 Press 4 for TRIGGER SETUP 1 On Address HEHEX Trig Wrd set as 000000 Reset Vector li Press MENU 5 Press 7 for 68000 DISASSEMBLER VER 1 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom 6 Switch on the Flight 68000 Board i Press reset button on 68000 Microprocessor Board 7 Logic Analyser will be triggered the data and displayed to the screen eren Rn
62. st the program is running properly or not The connection between application board and 68000 microprocessor board will be connecting using IDE cable This chapter will explained in details about the instruments and devices that will be used in this project 2 1 Logic Analyser The Logic analyser is an electronic instrument that could display multiple digital signals on a single screen Students can easily analyse the operation of a digital signal which cannot be done using an Oscilloscope The Logic Analyzer can trigger on a complicated sequence of digital events and then capturing a large amount of digital data These probes provide a durable reliable mechanical and electrical connection between the probe and the circuit board with less than 0 5 to 0 7 pF loading per signal Once the probes are connected the student programs of the analyzer with the names of each signal and can grouping several signals into groups for easier manipulation Figure 2 1 X Logic Analyser 2 2 Disassembler POD for 68000 The most common method of data capture for logic analyzers is through a probe The Logic Analyzer can measure anything electronic if it has the proper probe connected Mostly the Logic Analyzer measure data buses from the ports The probes try to tap into the electronic signals being passed through a data bus or wire Figure 2 2 Disassembler POD for 68000 10 2 3 Software 68000 microprocessor Now a day so many software th
63. tiple digital signals on a single screen They are typically used for capturing data in digital systems that have too many channels to be examined with an oscilloscope Software running on the Logic Analyser can convert the captured data into timing diagrams protocol decodes state machine traces assembly language or correlate assembly with source level software 74 Figure 1 Logic Analyser 2 Disassembler POD for 68000 The most common method of data capture for logic analyzers is through a probe A Logic Analyzer can measure anything electronic if it has the proper probe connected Mostly Logic Analyzer measure data buses The probes try to tap into the electronic signals being passed through a data bus or wire Figure 2 Disassembler POD for 68000 15 INSTRUCTION Part 1 Beginning 1 In this experiment we will use Logic Analyser to analyse the working of a 68000 Microprocessor 2 Connect the 68000 Disassembler POD to the Logic Analyser Make sure that the 68000 Disassembler POD is connecting correctly on MC68000 chip Figure 3 Connection to the Logic Analyser 3 Switch on the Logic Analyser then check the 68000 Disassembler POD was assembled or not 4 Clip the 68000 Disassembler POD to the chip MC68000 on 68000 Microprocessor Board Make sure the connection is correct Pin 1 on DP 68000 to Pin 1 on chip Figure 4 68000 Disassembler POD 76 Figure 5 Connection between 68000 Disas
64. ton right side of Logic Analyser to rename address Press tab cursor to continue change the label Repeat step Part 2 2 ii and 2 iii After finish labeling press EXIT Press MENU 4 Press 3 for STATE LISTING iv Confirm that no data on the Logic Analyser v Press PAGE DEC page decreases or GOTO TRG go to trigger until it shows 0000 POS on the upper left of Logic Analyser display Starting point it will be triggering POS is position vi Press MENU 5 Press 4 for TRIGGER SETUP 1 On Address HEHEX Trig Wrd set as 000000 Reset Vector li Press MENU 6 Press 7 for 68000 DISASSEMBLER VER 1 01 i Press RUN button on right side of Logic Analyser ii Press SINGLE on the list menu on the bottom 7 Switch on the Flight 68000 Board i Press reset button on 68000 Microprocessor Board 8 Logic Analyser will be triggered the data and displayed to the screen Figure 8 Trigger Function 9 Answer the question in SECTION A Figure 4 2 b Instructions for the Part 2 of the Laboratory Manual 36 4 2 2 Question and Answer for Part 2 of Laboratory Manual SECTION Figure 4 3 a and b shows the question and answer for part 2 of the laboratory manual The questions will be given to the student to ensure that they are understood of some necessary instruction on how to use Logic Analyser Section A 1 What the operation on cursor 0027 ANSWER MOVEA L 00000080 D0 2 On cursor 0
65. y ANSWER the timing diagram must be related each other 5 What the relationship between timing diagram and Table 4 Explain ANSWER the timing diagram must be related each other 6 Repeat the procedure in Part 3 no need to begin the step 5 proceed to 6 Change Address HEHEX Trig Wrd to 400408 After Logic Analyser was triggered what the STATE LISTING showed ANSWER Address BERR BGACK UDS LDS R W 2 0 400408 1 00 1 110 00 00800005 L 80000C 8080 sp prog wr 10 0 101 40040A 0000 sp prog rd 00 1 110 40040C 0080 sp prog rd 00 1 110 40040E 0005 sp prog rd 00 1 110 Table 5 STATE LISTING 7 Compare the Table 5 and Table 4 Explain ANSWER It is the same thing because we run the same program 90 Section 1 Write program that you can get from Logic Analyser from address 000400 until 000436 ANSWER MOVEA L 4003 0 7 MOVE B 5 80 0080000D L MOVE B 400 00800005 L MOVE B 80 0080000F L MOVE B FF 00800007 L MOVE B 00800011 1 00 EORI W 00 MOVE B 00800013 L 0426 W 2 What is the benefit if we used the ROM that was programmed ANSWER No needs to use the PC for upload the program 3 Press the SW1 port 0 what happened to LED ANSWER LED 0 light off 4 Press the SWI port 0 until port 7 what happened to LED ANSWER All LED light off 5 Rewrite the program will make LED to light up when th

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