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1. If disabled bus master traffic is a break event and it will return from C3 C4 to CO based on break events If enabled ICH will observe a bus master request and it will take the system from a C3 C4 state to a C2 state and auto enable bus masters Pop Down Mode Enable Disabled Enabled Should be enabled only if Pop up is enabled If disabled ICH will NOT attempt to automatically return If enabled ICH will observe a NO bus master request and it can return to a previous C3 or C4 state 6 2 4 4 1 PCI Express Control Sub Menu am om sem PCI Express Root Port Disabled Control PCI Express Port via this setup 1 5 Enabled option Auto Disabled Port always Disabled Auto Only enable if card found Note that if Root Port 1 is disabled Root Ports 2 5 will be disabled as well ASPM Disabled Enabled Enable PCI Express Active State Power Management settings Automatic ASPM Manual auto Automatically enable ASPM based on reported capabilities and know issue Note Only selectable if ASPM enabled ASPM L0s Disabled Enable PCle ASPM L0s Root Port Only Endpoint Port Only Both Root and Endpoint Ports Note Only selectable if Automatic ASPM manual ASPM L1 Disable Enable Enable PCle L1 Note Only selectable if Automatic ASPM manual 6 2 4 4 2 PCI Control Sub Menu r oe 48 MSC CXC GS45 User s Manual BIOS PCI IRQ line 1 8 Disabled Select the IRQ nu
2. Four GPO pins 412V primary power supply input 45V standby optional and 3 3V RTC power supply inputs 32 bit PCI interface IDE port to support legacy ATA devices such as CD ROM drives and Compact Flash storage cards 21 PCI Express lanes 5 on A B and 16 on C D 16 of 21 PCI Express lanes used for PCI Express Graphics SDVO option pins shared with PCI Express Graphics TPM module option TPM 1 2 SLB9635 User s Manual CXC GS45 2 2 Block diagram OLY EAE AaJO4JUOD i v NVI IHDA AZLOOA ABS ASDOA ees T VLVS Xt JUDON St X9 Bop i yM uondo CL Wd Sk REIH H snsu3usA AASTAS OQA HSA KSO sAesns DON EAESNSIDA WS0S2 AOWUOW soyes9UaH 9JeMpJeH MOO s 890L wa AZLOOA 29 me 00 AZLOOA St 294 AZLOOA AZLOOA LIA OOA en ooa 10128uuo5 ejnpojy sse1dx3 WOD pexnu JOAAS 939d pexnu gOAAS Io svs xeu ex go t pesnjou a euaa WINIGOS zHaa AZLOOA P o 20 e ZHWZ99 ES ZHIN 008 Z99 S 8S3 ASO L u iu q AZLOOA 200 094 99A ong 2 4 9102 l 1ul c d L npolN Pedwo ssaJudxq WOJ SVS9 OX9 ISIN CXC GS45 User s Manual 2 3 COM Express implementation COM Express required and optional features of pin out type 2 are summari
3. PCI BEV Other USB PCI Legacy Network Card Legacy 1394 CDROM Pressing the F10 key during the bios boot phase will bring up the bios boot menu which will allow you to select a different boot device for the current boot process only In this boot menu only devices in the Boot priority list will selectable Devices excluded from boot order will not be shown 55 MSC CXC GS45 User s Manual BIOS 6 2 8 The Exit Menu The following sections describe each of the options on this menu Note that lt Esc gt does not exit this menu You must select one of the items from the menu or menu bar to exit Exit Saving Changes After making your selections on the Setup menus always select Exit Saving Changes This procedures stores the selections displayed in the menus in CMOS short for battery backed CMOS RAM a special section of memory that stays on after you turn your system off The next time you boot your computer the BIOS configures your system according to the Setup selections stored in CMOS If you attempt to exit without saving the program asks if you want to save before exiting During boot up PhoenixBIOS attempts to load the values saved in CMOS If those values cause the system boot to fail reboot and press lt F2 gt to enter Setup In Setup you can get the Default Values as described below or try to change the selections that caused the boot to fail Exit Discarding Changes Use this option
4. to create a recovery disk or select Removable Disk 0 xxxMb to create a recovery USB stick Disk options should be left as Create MINIDOS Crisis Disk 3 Press the start button to generate the selected crisis recovery medium Proceed as follows to use the generated Disk or USB stick for the recovery Plug the USB dongle into a free USB port on the failing system before switching the system on Please make sure that you use different USB controllers for USB dongle and USB crisis recovery medium After power up crisis recovery mode should start automatically The programming process is signalled by short beeps and terminated after successfull programming with one long beep After that the system is automatically rebooted Important Notes USB recovery dongle and USB crisis recovery device must not be plugged to the same USB controller Crisis recovery may take up to 5 minutes A long beep indicated successful recovery Crisis recovery does not include the bootblock 59
5. 6 1 2 Activity Detection Background While the Startup screen is displayed press the Setup Entry key F2 SecureCore default The SecureCore Startup Status Bar acknowledges the input and at the end of POST the screen clears and setup launches An example of the Startup Status Bar displaying changing state is shown in the following figure The Please Wait text is displayed after the F2 key is pressed to acknowledge user input Active status bar Please Wait a 6 2 SecureCore Setup Utility With the Phoenix SecureCore Setup program you can modify SecureCore settings and control the special features of your computer The Setup program uses a number of menus for making changes and 35 MSC CXC GS45 User s Manual BIOS turning the special features on or off This chapter provides an overview of the Setup utility and describes at a high level how to use it 6 2 1 Configuring the System BIOS To start the Phoenix SecureCore Setup utility press F2 to launch Setup The Setup main menu appears 6 2 2 The BIOS Menu Structure The BIOS Menu is structured in the following way The Menu Bar The Menu Bar at the top of the window lists these selections 36 MSC CXC GS45 User s Manual BIOS OO ew OO Gees Use this menu for basic system configuration Advanced Use this menu to set the Advanced Features available on your system s chipset Security Use this menu to set User and Supervisor Passw
6. IDE Device DMA Acknowledge T8213F IDE CS14 O CMOS 3 3V 33V IDE Device Chip Select for 1FOh to 1FFh range T8213F IDE CS3 O CMOS 33V 3 8SV IDE Device Chip Select for 3F0h to 3FFh range T8213F IDE IORDY EH CMOS ik PU VIDE device I O ready input Pulled low by the IDE device to extend the IT8213F cycle lee IDE RESET O CMOS Reset output to IDE device active low T8213F IDE IRQ Il CMOS 10k PD Interrupt request from IDE device T8213F IDE CBLID CMOS 3 3V 5V Input from off module hardware indicating the type of IDE cable being used IT8213F High indicates a 40 pin cable used for legacy IDE modes Low indicates that an 80 pin cable with interleaved grounds is used Such a cable is required for Ultra DMA 66 100 and 133 modes 2 9 4 Serial ATA Pin Signal Power PU PD Description Source Type Level Rail Target SATAO_TX SATA 3 3V AC coupled Serial ATA Channel 0 transmit differential pair ICH9M SFF SATAO TX on module SATAO_RX WE ELE E Serial ATA Channel 0 receive differential pair ICH9M SFF SATAO RX on module SATA1 TX NEN ee a Serial ATA Channel 0 transmit differential pair ICH9M SFF SATA1_TX on module 16 MSC CXC GS45 User s Manual Technical Description Pin Signal Power sea Description Type Level Rail Target SATA1_RX e ei UNE Serial ATA Channel 0 receive differential pair SATA1_RX on module SATA2_TX ee eee SE RER Serial ATA Channel 0 transmit differential pair SATA2 TX on mod
7. Low temperature between 40 C and 50 C Fan Speed Zone 3 50 60 70 Fan speed control for temperature zone 3 Speed Medium temperature between 50 C and 60 C 54 MSC CXC GS45 User s Manual BIOS 6 2 7 The Boot Menu After you turn on your computer it will attempt to load the operating system such as DOS Windows XP or Linux from a device listed in the boot priority order If it cannot find the operating system on that device it will attempt to load it from the next device in that list Boot devices i e with access to an operating system can include hard drives floppy drives CD ROMs removable devices e g USB sticks and network cards Note Specifying any device as a boot device on the Boot Menu requires the availability of an operating system on that device Selecting Boot from the Menu Bar displays the Boot menu which looks like this Feature Description Boot priority order Boot priority order for next boot System tries to boot the USB KEY first bootable device in this list USB FDC Use lt gt and lt gt to change order IDE CD or USB CDROM Use lt x gt to exclude or include device to boot priority list IDE HDD Shift gt lt 1 gt enables or disables a device 1 4 Loads default Boot sequence 1 2 3 4 5 6 7 8 Exclude from boot order System does not try to boot a device from this list USB HDD USB ZIP USB LS120 PCI SCSI
8. PEG Port ASPM Support Auto Disabled Control ASPM for the PEG Device Auto will set APMC to the highest common supported ASPM between the Port and Endpoint Extended Synch Disabled Enabled Enable PCle Extended Synchronization for Logic analyser use MDA Support Disabled Enabled Control MDA support for the PEG Device 6 2 4 3 Video Intel IGD Control Sub Menu mee mess TI Se Default Primary Video PEG IGD Select PEG to have PCI Express Adapter Graphics If supported and enabled be used for the boot display device If selected and no PEG card is found Internal Graphics will be used automatically Select IGD to have Internal Graphics If supported and enabled be used for the boot display device Select also to use PCI video IGD Device 2 Disabled Auto Enables or Disable the Internal Graphics Device by setting item to the desired value IGD Boot Type VBIOS default Select the Video Device that will be CRT activated during POST LFP EFP EFP2 CRT LFP CRT EFP CRT EFP2 45 MSC CXC GS45 User s Manual BIOS am sme 640x480 sp 18bit Select the LCD panel used by the 800x600 sp 18bit Internal Graphics Device by selecting 1024x768 sp 18bit the appropriate setup item 1280x1024 dp 18bit The first item is Panel 1 the last item 1440x900 dp 24bit is Panel 16 1400x1050 dp 24 bit Some Panels are not numbered due to 1600x1200 dp 24 bit size constraints 1280
9. 0 PCI GNT 1 GNT3 if used PCI GNT 3 PCI GNT 0 PCI_GNT 1 PCI_GNT 2 The signals PCI_IRQx PCI_REQx or PCI_GNTx are are routed exclusively to the COM Express connector They are not shared on the CPU board 5 3 SMB Address Map Device A6 A5 A4 A3 A2 A1 AO R W address SMBus host ICH9 M o o 0 1 0 0 o x 10h 08h slave SMSC EMC2104 0 5En 2Fh ICSYLPRS365 Clock Ze J FEE Dan 69h A8h 54h CCCII a SPD EEPROM SO DIMM AOh 50h A2h 51h 8 bit address with R W 7 bit address without R W 6 BIOS 34 MSC CXC GS45 User s Manual BIOS 6 1 Introduction This guide describes the Phoenix SecureCore Startup screen and contains information on how to access Phoenix SecureCore setup to modify the settings which control Phoenix pre OS operating system functions 6 1 1 Startup Screen Overview The Phoenix SecureCore Startup screen is a graphical user interface GUI that is included in Phoenix SecureCore products The default bios behavior is to show an informational text screen during bios POST phase but the graphical boot screen can be enabled in the bios setup The standard boot screen is a black screen including a progress bar at the bottom of the screen This bar indicates the progress of the Startup Screen functions and provides user prompting and POST status The following figure shows the various parts of a generic Startup Screen at 1024x768 resolution
10. 10k PU Input to module from optional external keyboard controller that can force ICH9M SFF a reset Pulled high on the module This is a legacy artifact of the PC AT KBD A20GATE CMOS 3 3V 3 3V 10k PU Input to module from optional external keyboard controller that can be ICH9M SFF used to control the CPU A20 gate line The A20GATE restricts the memory access to the bottom megabyte and is a legacy artifact of the PC AT Pulled high on the module 2 9 16 Power and System Management Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target PWRBTN Il CMOS 3 3V Sus 20k PU Power button to bring system out of Suspend states active on falling edge ICH9M SFF SYS_RESET CMOS 3 3V Sus 3 3V 10k PU Reset button input ICH9M SFF When the SYS_RESET pin is detected as active after the 16 ms debounce logic the ICH attempts to perform a graceful reset by waiting up to 25 ms for the SMBus to go idle If the SMBus is idle when the pin is detected active the reset occurs immediately otherwise the counter starts If at any point during the count the SMBus goes idle the reset occurs If however the counter expires and the SMBus is still active a reset is forced upon the system even though activity is still occurring Once the reset is asserted it remains asserted for 5 to 6 ms regardless of whether the SYS RESET input remains asserted or not It cannot occur again until SYS_RESET has been detect
11. 1min 5min 10min The time delay starts as soon as it is enabled in the BIOS MSC provides a software API which gives the application software access to the Watchdog functionality if needed 32 MSC CXC GS45 User s Manual System resources 5 System resources 5 1 PCIIRQ Routing Interrupts of Controller ICH 9M Slot Number or IDSEL Onboard Device or S Ns o 0 o DEV Q Sr or or Sr Sr or SE 5 JS Z E Z Z E Z E Z Z E Z Z m m SD sl sl SI SI zl PCle x16 Root Port Dev 1 Fn0 0 A Internal Graphic Dev 2 Fn 0 0 A AMT Controller Dev 3 Fn 0 0 A MEI if enabled Dev 3 Fn 1 0 D IDER if enabled Dev 3 Fn2 0 C SOL if enabled Dev 3 Fn 3 0 B GBit LAN Controller Dev 25 Fn0 0 A UHCI USB1 1 Host USB Ports 0 1 Dev 29 Fn0 0 A USB Ports 2 3 Dev 29 Fn1 O B USB Ports 4 5 Dev 29Fn2 0 C USB Ports 6 7 Dev 26 Fn0 0 A EHCI USB2 0 Host USB Ports 0 5 Dev 29Fn7 0 A USB Ports 6 7 Dev 26 Fn7 O C HD Audio Dev27FnO 0 A PCle x1 Root Port for Slot 1 Dev 28Fn0 0 A for Slot 2 Dev 28 Fn 1 0 B for Slot 3 Dev 28 Fn2 O C for Slot 4 Dev 28Fn3 0 D for Slot 5 Dev 28Fn4 0 A SATA Controller 1 Dev 31Fn2 0 B SATA Controller 2 Dev 31Fn5 0 B SMBus Controller Dev 31 Fn3 0 C PCle x16 Slot Dev 0 Fn 0 1 A B C D PCle x1 Slot 1 Dev 0 Fn 0 dyn A B C D PCle x1 Slot 2 Dev 0
12. 3 3V Gigabit Ethernet Controller 0 Media Dependent Interface Differential Pairs 82567L GBEO MDI 0 3 Output Sus 0 1 2 3 The MDI can operate in 1000 100 and 10 Mbit sec modes MDI 0 B1_DA MDI 1 B1_DB MDI 2 B1_DC MDI 3 B1_DD Gigabit Ethernet Controller 0 activity indicator active low 82567L m Gigabit Ethernet Controller 0 link indicator active low 82567L Drain Sus Ge Drain Sus ea i e i Drain Sus i GBEO_LINK1000 CMOS E Gigabit Ethernet Controller 0 1000 Mbit sec link indicator active low 82567L Drain Sus 15 MSC CXC GS45 User s Manual Technical Description Pin Signal Power Power PU PD Description Source Type Level Rail Tolerance Target GBEO CTREF REF GND min 82567 1000MBit 1 8V 82567L 3 3V max 2 9 3 IDE Pin Signal Power Power PU PD Description Source Type Level Rail Tolerance Target ize IDE D 0 6 8 15 CMOS Bidirectional data to from IDE device IT8213F IDE D 7 CMOS 10k PD Bidirectional data to from IDE device T8213F IDE A02 Io CMOS 33V 33V Address lines to IDE device T8213F IDE IOW2 o CMOS 33V 33V IO write line to IDE device Data latched on trailing rising edge T8213F DE _IOR Io CMOS 333V 33V O read line to IDE device T8213F IDE REQ EAE ee ie pee IDE Device DMA Request It is asserted by the IDE device to request a IT8213F data transfer IDE_ACK lO CMOS 33V 3 3V
13. 79 C 87 C 95C of the ACPI Critical Trip Point the point in which the OS will shut the system off Notes 1 100C is POR for all Intels CPUs 2 If value is gt 100C and DTS is enabled the Out of Spec Bit will be used 3 The EC value will be set to 127 after ACPI initialation FACP RTC S4 Flag Disabled Enabled Valid only for ACPI Value Control the value for the RTC S4 flag in the FACP Table FACP PM Timer Flag Disabled Enabled Valid only for ACPI value Controls the timer used by the OS through the FACP Tables Flags This is now possible with WINXP SP2 and beyond HPET Support Disabled Enabled This field is valid only in the WindowsXP OS Control the High Performance Event Timer through this setup option when enabled The HPET Table will then be pointed to by the RSDT and the proper enable bits will be set HPET Base Address 0xFED00000 Select the Base Address for the High OxFED01000 Performance Event Timer 0xFED02000 0xFED03000 6 2 4 6 UO Device Configuration Menu EE usu s Serial Port A Disabled Enabled Auto Disabled Disabled the device Enabled User configuration Auto BIOS or OS chooses configuration Base I O address 3F8 2F8 3E8 2E8 Set the base I O address for Serial Port A Interrupt Set the interrupt for Serial Port A Serial Port B Disabled Enabled Auto Disabled Disabled the device Enabled User configuration Auto BIOS or OS chooses configuration 5
14. BKLT CTRL C83 GND b amp 4 GND GND FIXED D90 GND FIXED GND os oND j PEG RXi4 D99 PEG TX C110 29 MSC CXC GS45 User s Manual Jumpers not supported on MSC CXC GS45 module 3 Jumpers There are three jumpers available on the module RTC Reset By shorting the pins of this jumper the RTC Clock is reset and the values of the CMOS NV RAM are cleared SRTC Reset By shorting the pins of this jumper the manageability register bits in the CMOS NV RAM are reset Clear Backup EEPROM By shorting the pins of this jumper the values of the Backup EEPROM and the values of the NV ROM are invalidated thus forcing the board to start up with default values These jumpers are located at the top side of the board at the border beneath the label with the serial number DO Ge d EE c monn DEDE k s ooo m sa inl Les m mi ii OE 30 MSC CXC GS45 User s Manual 31 MSC CXC GS45 User s Manual Watchdog 4 Watchdog The CXC GS45 board has a watchdog function implemented in a PIC Microcontroller The watchdog can be enabled and configured in the BIOS Setup If the watchdog is enabled a counter is started which generates a reset if it is not retriggered within a programmable time window Possible watchdog delays 1s 5s 10s 30s 1min 5min 10min 30min Possible watchdog timeout 0 4s 1s 5s 10s 30s
15. Remark PU PD Description Type Level Rail Power Tol PEG_TX 0 15 PCle 3 3V AC coupled PCI Express Graphics transmit differential pairs Some of these are PEG_TX 0 15 on module multiplexed with SDVO lines see SDVO section These are the same lines as PCIE_TX 16 31 and in module pin out types 4 and 5 PEG_RX 0 15 PCle 3 3V AC coupled PCI Express Graphics receive differential pairs Some of these are PEG RX 0 15 off module multiplexed with SDVO lines see SDVO section These are the same lines as PCIE RX 16 31 and in module pin out types 4 and 5 PEG LANE RV CMOS 3 3V 3 3V 5k7 PU PCI Express Graphics lane reversal input strap Pull low on the carrier board to reverse lane order Be aware that the SDVO lines that share this interface do not necessarily reverse order if this strap is low ee RM M M a Strap to enable PCI Express x16 external graphics interface Pull low to PU disable internal graphics and enable the x16 interface 2 9 7 Express Card Support Type Level Rail Power Tol EXCD 0 CPPE CMOS 3 3V 3 3V 8k2 PU ExpressCard card request active low EXCD 1 CPPE CMOS 3 3V 3 22V ExpressCard card request active low EXCD 0 RST O CMOS 3 22V 3 32V 8k2 PU ExpressCard reset active low EXCD 1 RST O CMOS 3 3v 3 3V 8k2 PU ExpressCard reset active low Source Target GS45 GS45 GS45 CFG 9 ICH9M SFF GPI17 Source Target ICH9M SFF CH9M S
16. __ Real time clock circuit power input 3 0V 2 0V to 3 3V ICH9M SFF GND Power RT DC power and signal and AC signal return path All available GND connector pins shall be used and tied to Carrier Board GND plane 27 MSC CXC GS45 User s Manual Technical Description 2 10 Pin List for MSC CXC GS45 module Type 2 RowA __ RowB RowC Rewb A6 GBED MDb es LPC AD2 C6 IDE DB D6 IDE DI A8 GBEOLLINK B8 LPC DHQ0 C8 IDEpe D8 IDE REG no GBE0 MDH B9 fip Drom C9 IDE DI DI IDE OW A28 ATA ACT B28 AC SDIN2 C28 PCI AD8 D28 PCLAD11 A29 AC SYNC B29 AC SCH C29 PCI ADIO D29 PCI AD13 A30 AC RST B30 AC SDINO C30 PCI AD12 D30 PC AD15 A31 GND FIXED B31 GND FIXED C31 GND FIXED D31 GND FIXED A32 AC BITCLK B32 SPKR C32 PCL ADI D32 PCI PAR A33 AC SDOUT B33 l2C CK C33__ PCI_C BE1 D33 PCI_SERR BIOS DISABLE I2C DAT PCI PERR PCI_STOP THRMTRIP THRM PCI LOCK PCI_TRDY USB6 USB7 PCI_DEVSEL D36 PCI_FRAME not supported on MSC CXC GS45 module MSC CXC GS45 User s Manual Technical Description Rowa OWNS ts tl Sea a ROW Te D60 PCIE TX24 PCIE RX2 PEG RX34 PEG TX3 PCIE TX2 PCIE RX2 PEG RX3 PEG TX3 GPII GPO3 RSVD RSVD PEG bi D6 PEG x4 PEG Rx D69 PEG A78 LVDS_A3 B78 LVDS B3 G E A82 LVDS A CK B82 LVDS B CK C82 A83 LVDS DC CK B83 LVDS
17. visit our support pages at www msc technologies eu support boards 14 MSC CXC GS45 User s Manual Technical Description 2 9 Signal description Pins are marked in the following tables with the power rail associated with the pin and for input and I O pins with the input voltage tolerance The pin power rail and the pin input voltage tolerance may be different For example the PCI group is defined as having a 3 3V power rail meaning that the output signals will only be driven to 3 3V but the pins are tolerant of 5V signals An additional label Suspend indicates that the pin is active during suspend states S3 S4 S5 If suspend modes are used then care must be taken to avoid loading signals that are active during suspend to avoid excessive suspend mode current draw 2 9 1 High Definition Audio Pin Signal Power Power PU PD Description Source Type Level Rail Tolerance Target AC_RST CMOS 20k PD Reset output to CODEC active low ICH9M SFF Sus AC SYNC CMOS 20k PD 48kHz fixed rate sample synchronization signal to the CODEC s ICH9M SFF AC BITCLK CMOS 20k PD 24 00 MHz serial data clock generated by the ICH9 M ICH9M SFF AC SDOUT CMOS 20k PD Serial TDM data output to the CODEC ICHOM SFF AC SDIN 0 2 CMOS 20k PD Serial TDM data inputs from up to 3 CODECs ICH9M SFF Sus 2 9 2 Ethernet Pin Signal Power Power PU PD Description Source Type Level Rail Tolerance Target GBEO_MDI 0 3 Input Analog
18. 0 MSC CXC GS45 User s Manual BIOS Base I O address Interrupt 6 2 4 7 Watchdog Options Normal IR ASK IR 3F8 2F8 3E8 2E8 Description Set the mode for Serial Port B wired infrared Set the base I O address for Serial Port B Set the interrupt for Serial Port B Warning If you choose the same I O address or Interrupt for more than one port the menu displays an asterisk at the conflicting settings me i m Watchdog delay Watchdog timeout 1 second 5 seconds 10 seconds 30 seconds 1 minute 5 minutes 10 minutes 30 minutes 0 4 second 1 second 5 seconds 10 seconds 30 seconds 1 minute 5 minutes 10 minutes After watchdog is activated he waits selected delay time before he starts counting the timeout period Select the maximum watchdog trigger period If the watchdog will not be triggered during selected period system reset will be generated Select if the watchdog should be started at the end of POST 51 MSC CXC GS45 User s Manual BIOS 6 2 4 8 AMT Sub Menu am o m Intel AMT Disabled Enabled Enable Disable INTEL Active Management Technology Bios Extension Fees CSS bmeem p Ice e IE AMT Wait Timer Disabled Enabled Set timer to wait before sending ASF_GET_BOOT_OPTIONS Intel AMT SPI Protected Disabled Enabled Determine SPI ROM Lock enabled disabled AMT CIRA Request Disabled Enabled Set Trigger CIRA boot
19. 066MHz 956uFCBGA Intel Core 2 Duo SU9300 Penryn Ultra Low Voltage 1 3 GHz FSB 800MHz 956uFCBGA Intel GS45 GMCH Graphics Memory Controller Hub Intel ICH9M SFF IO Controller Hub 200 pin DDR2 SO DIMM socket for up to 4GB max height 1250mil 31 75mm PC5300 6400 8500 DDR2 SDRAM DDR667 800 1066 4 SATA channels up to 300MByte s each 1 Enhanced IDE port ATA UDMA100 8 x USB 2 0 Type 2 interface fully compliant Five channels PCle x1 32 Bit standard interface Low Pin Count Bus for heritage interfaces Intel Gen 5 0 integrated graphics engine Intel Dynamic Video Memory Technology Intel DVMT 5 0 LVDS 2x24Bit dual channel max resolution 1 600 x 1 200 2 independent SDVO interfaces SDVOB SDVOC or external PCle x16 graphics multiplexed by Intel Gen 5 0 integrated graphics engine max resolution 2 048 x 1 536 10 100 1000Base TX Intel amp 82567L High Definition Audio Interface PIC12C509A Creates system reset programmable 1s 255h Optional TPM module TPM 1 2 SLB9635 3 pin header 12V integrated in ICH9M SFF External Voltage Temperature Fan Core voltage 12V CPU thermal diode RAM Temperature System Temperature 11 CXC GS45 User s Manual 2 5 Power Supply 412V primary power supply input 45V standby Option is not required for module operation If not present customer has to make sure that the supply voltages which are generated on the carrier bo
20. 45 User s Manual BIOS tre sme SMART Monitoring Disabled Enabled Displays the status of SMART Monitoring if supported by the used drive WARNING Incorrect settings can cause your system to malfunction 6 2 3 3 Keyboard Features m ms et On Off Auto Selects Power on state for NumLock Key Click Disabled Enabled Enables key click Keyboard auto repeat Selects key repeat rate Keyboard auto repeat rate 0 25s 0 5s 0 75s 1s selects delay before key repeat 6 2 3 4 Boot Options re ms Fe Disabled Enabled Enabled displays system configuration on boot Boot time Diagnostic Disabled Enabled Enabled displays the diagnostic Screen screen during boot Disabled displays the Boot Logo Quick Boot Mode Disabled Enabled Enabled allows POST to skip certain test while booting This will decrease the time needed to boot the system POST Errors Disabled Enabled Pauses and displays Setup entry or resume boot prompt if error occurs on boot If disabled system always attempts to boot Legacy OS Boot Disabled Enabled Select Enabled to attempt Legacy OS Boot only Select Disabled to attempt EFI Boot first Legacy OS second 41 MSC CXC GS45 User s Manual BIOS 6 2 4 The Advanced Menu tre sme Installed O S Reset configuration Data No Yes Large Disk Access Mode Other DOS Small Disk Access Mode No Yes Port 80 Cycles LPC Bus PCI Bus Video
21. FF CH9M SFF ICH9M SFF 18 MSC CXC GS45 User s Manual Technical Description 2 9 8 PCI Bus Si Ke eae Type Level Rail Power Tol Target PCI AD 0 31 Up CMOS aa 5V PC bus multiplexed address and data lines ICH9M SFF PCI C BE 0 3 VO CMOS 33V sv PCI bus byte enable lines acivelow 1 EHEMSEE PCLPAR CO IQ iV 3 8V I PCI bus parity iCHOWE SFF PCI PERR CMOS 3 3V 5V 8k2 PU Parity Error An external PCI device drives PERR when it receives data ICH9M SFF that has a parity error PCL REQ 0 2 CMOS 33V X 5V 8k2 PU PCI bus master request input lines activelow ICH9M SFF PCL GNT o levos Jew SV Pcrbus master grant output ines cive low ICH MESEE PCI REQ 3K CMOS 3 3V 5V 75kPU PClbusmasterrequestinputlines active low fps IT8208M PCI GNT 3 O CMOS 33V 5V PCI bus master grant output lines activelow IT8208M PCI RESET JO CMOS 33VSus SV jPClResetoutpuLacivelow ICH9M SFF PCI LOCK CMOS 8k2 PU PCI Lock control line active low ICH9M SFF a system error condition GN E se oir ee e system from low power states S1 S5 cl ll icio d S S ss el PCI_IRQ A D CMOS 8k2 PU PCI interrupt request lines ICH9M SFF PCI Ok O CMOS 10k PD PCI 33MHz clock output CK505 PCI M66EN CMOS 3 3v 5V Module input signal indicat
22. Fn 0 dyn D A B C PCle x1 Slot 3 Dev 0 Fn 0 dyn C D A B PCle x1 Slot A Dev 0 Fn 0 dyn B C D A PCle x1 Slot 5 Dev 0 Fn 0 dyn A B C D PCI Slot 1 AD20 Dev 4 dyn A B C D PCI Slot 2 AD21 Dev 5 dyn D A B C PCI Slot 3 AD22 Dev 6 dyn C D A B PCI Slot 4 AD23 Dev 7 dyn B C D A PATA Controller Dev 8 Fn 0 dyn A 5 2 Carrier Board PCI Resource Allocation The external PCI resource allocation on the carrier board should be as follows 33 MSC CXC GS45 User s Manual Slot Device Slot Device 0 Slot Device 1 Slot Device 2 Slot Device 3 Signal IDSEL PCI_AD 20 PCI_AD 21 PCI_AD 22 PCI_AD 23 PCI Clock PCI_CLK replica PCI_CLK replica PCI_CLK replica PCI_CLK replica INTA PCI_IRQ A PCI_IRQ B PCI_IRQ C PCI_IRQ D INTB if used PCI_IRQ B PCI_IRQ C PCI_IRQ D PCI_IRQ A INTC if used PCI_IRQ C PCI_IRQ D PCI_IRQ A PCI_IRQ B INTD if used PCI_IRQ D PCI_IRQ A PCI_IRQ B PCI IRQ C REQO if used PCI REQ 0 PCI REQ 1 PCI REQ 2 PCI REQ 3 REQ1 if used PCI REQ 1 PCI REQ 2 PCI REQ 3 PCI REQ 0 REQ2 if used PCI REQ 2 PCI REQ 3 PCI REQ 0 PCI REQ 1 REQ3 if used PCI REQ 3 PCI REQ 0 PCI REQ 1 PCI REQ 2 GNTO if used PCI GNT 0 Z PCI GNT 1 PCI_GNT 2 PCI_GNT 3 GNT1 if used PCI_GNT 1 PCI_GNT 2 PCI_GNT 3 PCI_GNT 0 GNT2 if used PCI_GNT 2 PCI_GNT 3 PCI_GNT
23. Intelligent Solutions Engineering Leadership User Manual MSC COM Express Compact Module CXC GS45 Intel Core 2 Duo Rev 1 6 2014 10 09 CXC GS45 User s Manual Preface Copyright Notice Copyright 2014 MSC Technologies GmbH All rights reserved Copying of this document and giving it to others and the use or communication of the contents thereof is forbidden without express authority Offenders are liable to the payment of damages All rights are reserved in the event of the grant of a patent or the registration of a utility model or design Important Information This documentation is intended for qualified audience only The product described herein is not an end user product It was developed and manufactured for further processing by trained personnel Disclaimer Although this document has been generated with the utmost care no warranty or liability for correctness or suitability for any particular purpose is implied The information in this document is provided as is and is subject to change without notice EMC Rules This unit has to be installed in a shielded housing If not installed in a properly shielded enclosure and used in accordance with the instruction manual this product may cause radio interference in which case the user may be required to take adequate measures at his or her owns expense Trademarks All used product names logos or trademarks are property of their respect
24. Repost Disabled Linux Enabled CPU Control Sub Menu Sub Menu MCH Control Sub Menu Sub Menu Video Intel IGD Control Sub Menu Sub Menu ICH Control Sub Menu Sub Menu ACPI Control Sub Menu Sub Menu IO Device Configuration Sub Menu Select the operating system installed on your system which you will use most commonly NOTE An incorrect setting can cause some operating systems to display unexpected behavior Select Yes if you want to clear the Extended System Configuration Data ESCD area Select Other for UNIX Novell NetWare Select DOS for all other operating systems Select if CHS translation should be made for a LBA capable harddisk with less than 1024 cylinders e g CompactFlash R If you have problems with booting from a CompactFlash R try to change this setting No translate CHS only if HDD has gt 1024 cyls Yes translate CHS for all LBA capable disks Control where the Port 80h cycles are sent Select If a Video Repost is to be performed during resume from S3 Disabled Never perform a Video Repost upon resome from S3 Linux Only perform a Video Repost IF the OS is Linux Enabled Always perform a Video Repost upon resume from S3 Configure Yonah Merom CPU Control Configure MCH Control Configure Video Intel IGD Control Configure ICH Control Configure ACPI Control Configure I O Device 42 MSC CXC GS45 User s Manual BIOS am cm Watchdog Optio
25. S45 User s Manual Technical Description 2 9 18 Module Type Definition EE Signal Power Remark PU PD Description Source E E Level Rail Power Tol Target TYPE 0 2 Type The TYPE pins indicate to the Carrier Board the Pin out Type that is For this Detect implemented on the module The pins are tied on the module to either Type 2 ground GND rare no connects NC For Pin out Type 1 these pins are board all don t care X Type Detect pins are n c TYPE24 TYPE1 TYPEO X X Pin out Type 1 NC NC Pin out Type 2 NC GND Pin out Type 3 no IDE GND NC Pin out Type 4 no PCI GND GND Pin out Type 5 no IDE no PCI The Carrier Board should implement combinatorial logic that monitors the module TYPE pins and keeps power off e g deactivates the ATX ON signal for an ATX power supply if an incompatible module pin out type is detected The Carrier Board logic may also implement a fault indicator such as a LED 26 MSC CXC GS45 User s Manual Technical Description 2 9 19 Power and GND Pin Signal Power Remark PU PD Description Source Type Level Rail EH Tol Target 12V Ee o qe qe power input 12V 5 Voltage Gu Regulators vali DV SBY a Wa 5 _ ni power input 5 0V 5 If VCC5_SBY is used all available VCC_5V_SBY pins on the connector s shall be used Only used for standby and suspend functions May be left unconnected if these functions are not used in the system design VCC RTC Power
26. Trigger AMT CIRA Timeout 0 255 Set OEM defined timeout for MPS connection to be established Mebx Debug Message Disabled Enabled Mebx Debug Message Enabled Disabled UnConfigure ME Disabled Enabled Unconfigure ME without password Enabled Disabled MEADER IDE R Disabled Enabled Enabled wee KT Disabled Enabled Enabled Console Redirection Submenu Additional setup menu to console 6 2 4 8 1 Console Redirection tre om seem Console Type VT100 VT100 8bit PCI ANSI Enabled the specified console type PCI ANSI 7bit VT100 VT UTF8 ASCII Continue C R after Post On Off Enables Console Redirection after OS has loaded 52 MSC CXC GS45 User s Manual BIOS 6 2 5 The Security Menu ro JI zm Femme Supervisor Password Displays Supervisor Displays the current status of the Password Supervisor password Clear or Set User Password Displays User Password Displays the current status of the User password Clear or Set Set Supervisor Press return to enter Supervisor Password controls access to Password supervisor password the setup utility Set User Password Press return to enter user User Password controls access to the password system at boot Diskette Access Controls access to diskette drives Fixed disk boot sector Normal Write Protect Write protects boot sector on hard disk to protect agains viruses Password on boot Disabled Enables password
27. UPDATE BAT to this device 3 Boot the system from this device 4 Type update bat to update the System BIOS 5 When the BIOS update has finished reboot the system Note After the system has been updated the CMOS has been changed to defaults and therefore it is necessary to enter Setup press F2 at boot time to configure the system settings 57 MSC CXC GS45 User s Manual BIOS 6 4 Bios Crisis Recovery Should the BIOS setup be altered such that it is no longer possible to re enter the BIOS setup for example if wrong display selected the following methods can be used to restore the default settings 1 Blind reset to defaults 2 Crisis recovery clear backup EEPROM jumper 3 Crisis recovery software usually only necessary if the BIOS is corrupted for example if power was removed during a BIOS update 6 4 4 Blind Reset to defaults In the event that there is no display or the display is for some reason not active in order to get the BIOS back to the default settings and so enable the display the following sequence must be performed 1 During boot press F2 to get into BIOS setup F2 can be pressed repeatedly at least until the numlock LED on Keyboard is on 2 Press F9 and then enter to reset to default settings 3 Press F10 and then enter to save and exit the BIOS setup 4 System should then reboot with the default settings 6 4 2 Crisis Recovery Clear backup EEPROM Jumper See Jumper Section 3
28. analog signal S Video Luminance analog signal TV DAC C Analog TVDAC Channel C Output supports the following Not Composite video not used supported Component Chrominance Pr analog signal S Video Chrominance analog signal We K 01 2 9 14 SVDO Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target SDVOB_RED PCle AC coupled Serial Digital Video B red output differential pair GS45 SDVOB_RED on module Multiplexed with PEG_TX 0 and PEG_TX 0 pair 22 MSC CXC GS45 User s Manual Technical Description Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target SDVOB_GRN SDVOB_BLU AC coupled on module Multiplexed with PEG_TX 1 and PEG TX 1 on module Multiplexed with PEG_TX 2 and PEG TX 2 Serial Digital Video B clock output differential pair Multiplexed with PEG_TX 3 and PEG TX 3 Serial Digital Video B interrupt input differential pair Multiplexed with PEG_RX 1 and PEG RX 1 Serial Digital Video C red output differential pair Multiplexed with PEG_TX 4 and PEG TX 4 Serial Digital Video C green output differential pair Multiplexed with PEG TX 5 and PEG TX B Serial Digital Video C blue output differential pair Multiplexed with PEG_TX 6 and PEG TX 6 Serial Digital Video C clock output differential pair Multiplexed with PEG TX 7 and PEG TX 7 Serial Digital Video C interrupt inpu
29. ard are switched off during suspend states so that no current from the carrier board s signal lines can flow to the CPU board 3 3V RTC power supply Option is not required for module operation BIOS SETUP data is stored in a non volatile backup memory device EEPROM therefore configuration data will not get lost during power off except for time and date information E Inputtende 11 4V 126 V See next table 5V Standby 4 75V 5 25 V max 2A 3V RTC power supply 2 0V 3 3V 2 6 Power dissipation DOS Prompt 512MB DDR2 SO DIMM Module CPU Voltage V Current A typ Intel Core 2 Duo SP9300 teli Core 2 Duo SL9406 tel Core 2 Duo SU9306 miel Celeron 722 12 CXC GS45 User s Manual 2 Mechanical Dimensions 2 7 1 Compact module 95 00 91 00 gt 31 00 i I i i i Pin D1 L t 18 00 H a 6 00 n la i 4 00 A Ge 88 B Pin AI S a1 n There are two height options defined in the COM Express specification 5mm and 8mm The height option is defined by the connectors on the baseboard Heatspreader Module PCB 3 007 i TTT j Sab 7 UT 18 00 5 00 2 007 7 I 4 50 Carrier Board PCB 13 CXC GS45 User s Manual 28 Thermal specifications The cooling solution of a COM Express module is based on a heatspreader concept A heatspr
30. ata bus LPC ERAMER O CMOS sv 83V LPC frame indicates the start of an LPC cycle LPC_DROQ O 1 CMOS 33V am 20k PUL Ferme serial DMA request LPC_SERIRO O cmos J 33V LPC serial interrupt LPC CLK Jo CMOS 33V 33V LPC clock output 33MHz nominal 21 MSC CXC GS45 User s Manual Technical Description 2 9 12 Analog VGA mee teeta owe C Target Type Level Rail Power Tol Target BEE epee Red for monitor Analog DAC output designed to drive a 37 5 Ohm GS45 PD equivalent load fee E A ees Green for monitor Analog DAC output designed to drive a 37 5 Ohm GS45 PD equivalent load VGA_BLU Analog 150R Blue for monitor Analog DAC output designed to drive a 37 5 Ohm GS45 PD equivalent load VGA HSYNC lO CMOS 33V 3 8V Horizontal sync output to VGA monitor GS45 VGA VSYNC lO CMOS 33V 33V Vertical sync output to VGA monitor VGA I2C CK E CMOS 2k2 PU DDC clock line I2C port dedicated to identify VGA monitor capabilities GS45 DDC data line GS45 2 9 13 TV Out Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target TV_DAC_A Analog TVDAC Channel A Output supports the following Composite video not used supported CVBS Component video Chrominance Pb analog signal S Video not used TV DAC B Analog TVDAC Channel B Output supports the following Not Composite video not used supported Component video Luminance Y
31. d USB over current sense USB channels 2 and 3 A pull up for this line is present on the module An open drain driver from a USB current monitor on the Carrier Board may drive this line low Do not pull this line high on the Carrier Board USB over current sense USB channels 4 and 5 A pull up for this line is present on the module An open drain driver from a USB current monitor on the Carrier Board may drive this line low Do not pull this line high on the Carrier Board USB over current sense USB channels 6 and 7 A pull up for this line is present on the module An open drain driver from a USB current monitor on the Carrier Board may drive this line low Do not pull this line high on the Carrier Board Description LVDS Channel A differential pairs LVDS Channel A differential clock LVDS Channel B differential pairs LVDS Channel B differential clock LVDS panel power enable LVDS panel backlight enable LVDS panel backlight brightness control 12C clock output for LVDS display use ICH9M SFF ICH9M SFF ICH9M SFF ICH9M SFF Source Target GS45 GS45 GS45 GS45 GS45 GS45 GS45 GS45 20 MSC CXC GS45 User s Manual Technical Description Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target LVDS I2C DAT I O OD CMOS 2k2 PU 12C data line for LVDS display use GS45 2 9 11 LPC Bus Type Level Rail Power Tol Target LPC ADSL EE LPC multiplexed address command and d
32. eader is a metal plate typically aluminium mounted on the top of the module The connection between this plate and the module components is typically done by thermal interface materials like phase change foils gap pads and copper or aluminium blocks A very good thermal conductivity is required in order to conduct the heat from the cpu and the chipset to the heatspreader plate The heatspreader of the MSC module is thermally attached using phase change materials and small aluminium blocks filling the gap between cpu and chipset dies and the heatspreader plate The heatspreader is not a heatsink It is a defined thermal interface for the system designer with fixed mechanical dimensions so it should be possible to change different module types without problems There must be a cooling solution for the system the surface temperature of the heatspreader should not exceed 60 C Main issue for the thermal functionality of a system is that each device of the module is operated within its specified thermal values The max values of CPU and chipset are 100 C so there may be system implementations where the heatspreader temperature could be higher Anyway in this case it has to be validated that there are no thermal spec violations of any assembled part or integrated circuit over the system temperature range even at worst case conditions For mounting instructions and ordering numbers of heatspreaders and complete cooling solutions for this product
33. ed inactive after the debounce logic and the system is back to a full SO state This behavior is a result of Intel ICH internal chipset logic which is different to the COM Express Module Base Specification stating that the system shall remain in reset as long as SYS RESET input is low CB RESET CMOS 3 3V Sus 3 3V 100k Reset output from module to Carrier Board Active low Issued by module CH9 PD chipset and may result from a low SYS_RESET input a low PWR OK input a VCC_12V power input that falls below the minimum specification a FWH LAN watchdog timeout or may be initiated by the module software Ei eZ Power OK from main power supply A high value indicates that the power Power Good PU is good logic SUS_STAT lO CMOS 3 3V Sus 3 3V Indicates imminent suspend operation used to notify LPC devices ICH9M SFF 24 MSC CXC GS45 User s Manual Technical Description Pin Signal Power Remark PU PD Description Type Level Rail Power Tol SUS S3 IO _ CMOS 3 3V Sus Indicates system is in Suspend to RAM state Active low output SUS_S4 lO CMOS 3 3V Sus 3 3V Indicates system is in Suspend to Disk state Active low output SUS S54 CMOS 3 3V Sus 3 3V Indicates system is in Soft Off state Also known as PS ON and can be used to control an ATX power supply WAKEO Il CMOS 3 3V Sus 10k PU PCI Express wake up signal WAKE1 CMOS 3 3V Sus 3 3V 10k PU General purpose wa
34. eee 13 2 7 1 Compact Module 13 2 8 thermal SpeecifiCauOns teet tein eed ee eec nnde tdm ua 14 Ne EIN eet EE 15 2 9 1 High BZ dein AUC OT 15 2 9 2 Ethernet RR 15 E EC EE e 16 2 9 4 Serial ATA ccc nerne renerne nere 16 2 9 5 POL Express Eanes ae ette t ett er ett e bt E st b e ia test eb End E 17 2 9 6 PCI Express Eanes x10 onore ee a ei ee ee 17 2 9 7 Express Card Support a 18 2 98 EPG RE 19 ZOO ENEE 20 2 9 10 sEVDS Flat GET 20 29 s LEGIBUS i oni ue UEM REEL Ren M M E 21 2 9 2 Analog e 22 2 9 13 TV OUt ll 22 ZONA SVDO E 22 2 9515 Mi cellaneous o rere EE i dei bt ee aed 23 2 9 16 Power and System Managemetnt a 24 2 95 General Purpose O ween Stateside tare ee eee nea 25 2 9 18 Module Type Definition 26 29 19 Powerand GND un e HERHUBRHORHOHHERE HERR REGER O a E AAEE EAEE 27 2 10 Pin List for MSC CXC GS45 module Type 2 28 ME TAO TE 30 CMM EN EEUU 32 EE BE et 33 S MEM EMINET 33 5 2 Carrier Board PCI Resource Allocation 33 SEC MEE OMB iore AU ET ne 34 b BloSG o Lone UT UM LE M UM MM M EM M u 34 6 1 Introduction i 35 6 1 1 Startub Kee EN 35 6 1 2 Activity Detection Background 35 6 2 SecureCore Setup Ulm 35 6 2 1 Configuring the System BIOS 36 6 2 3 The BIOS Menu Structure nennen nennen nennen sss 36 5 237 ME NED NEE 38 6 24 The Advanced Menu ici eg een ie ce Pera een oe ceva va sas Sees
35. eegen mE 42 CXC GS45 User s Manual 6 2 5 The Securty Menu REPRE ENEE ERR RE RES 53 6 2 The Power Mem 54 6 2 Ne Boot E EE 55 E ln Ne ul En EE 56 5 91 BIOS Update sm n n s re eee nuansa uum carta uaa es MR 57 6 4 Bios Crisis Recovery 58 6 4 1 Blind Reset to defaults itte E 58 6 4 2 Crisis Recovery Clear backup EEPROM Jumper 58 6 4 8 Crisis Recovery software 58 CXC GS45 User s Manual 1 General Information 1 1 Revision History 1 2 Description th Changed to Version 1 2 Updated Bios chapter and added PCI 2 e IRQ routing table 3 une 2070 November 26 2010 Changed Pin for GPIO 3 und 4 p 25 February 18 2011 Corrected SMB Adresses October 9 2014 New style sheet 1 2 1 2 3 4 5 6 Reference Documents COM Express Module Base Specification COM Express Revision 1 0 Last update July 10 2005 PCI Local Bus Specification Rev 2 1 PCI21 PDF Last update June 1 1995 http www pcisig com ATA ATAPI 6 Specification d1410r3b pdf http www t13 org Serial ATA Specification Serial ATA 1 0 gold pdf Last update August 29 2002 Rev 1 0 http www sata io org IEEE Std 802 3 2002 802 3 2002 pdf http www ieee org Universal Bus Specification usb 20 pdf Last update April 27 2000 http www usb org CXC GS45 User s Manual 1 3 Introduction COM Express an open specification of the PICMG PCI Industria
36. entry on boot Enabled TPM Support Disabled Enable Trusted Platform Module support Enabled Change TPM State No Change Changes TPM state Enable Disable Activate Deactivate Clear Enable amp Deactivate Deactivate amp Disable SetOwnerlnstall with state true Set Ownerlnstall with state false Current TPM State Displays Current TPM Displays the current TPM status State 53 MSC CXC GS45 User s Manual BIOS 6 2 6 The Power Menu me omm N After Power Failure Stay Off Sets the mode of operation if an AC power loss Power On occurs Power On will turn the power on as soon as the power supply is back on Stay Off will keep the power off until the power button is pressed PLL3 Spread Spectrum Off On Enables Spread Spectrum support for PLL3 in the Mode CK 505 clock chip Spread Percentage Down 0 5 Select Spread Percentage for PLL3 in the CK505 Down 1 00 Clock chip Down 1 50 Cntr 0 5 Cntr 1 Hardware Monitor Configure Hardware Monitor 6 2 6 1 Hardware Monitoring Menu me omm sme Memory Temperature Informative Displays current Memory temperature Sensor Board Temperature Sensor Displays current Board temperature FAN Speed Displays the current fan speed Fan Control Auto Disabled Fan Cruise Control Auto Fan speed is automatically controlled by temperature Disabled Fan set to maximum speed Fan Speed Zone 2 30 40 50 Fan speed control for temperature zone 2 Speed
37. es whether an off module PCI device is capable of 66MHz operation Pulled to GND by Carrier Board device or by Slot Card supported if the devices are NOT capable of 66 MHz operation If the module is not capable of supporting 66 MHz PCI operation this input may be a no connect on the module If the module is capable of supporting 66 MHz PCI operation and if this input is held low by the Carrier Board the module PCI interface shall operate at 33 MHz 19 MSC CXC GS45 User s Manual Technical Description 2 9 9 USB Type Signal Level Power Remark PU PD Description Source Rail Power Tol Target USB 0 7 3 3V Sus ee a USB differential pairs channels 0 through 7 ICH9M SFF USB 0 7 USB 0 1 OCH CMOS 3 3V Sus 8 USB 2 3 OC USB 6 7 OC 2 9 10 LVDS Flat Panel Pin Signal Type Level Power Remark Rail LVDS_A 0 3 LVDS A 0 3 LVDS A CK LVDS A CK LVDS_B 0 3 LVDS B 0 3 LVDS B CK LVDS B CK LVDS VDD EN LVDS BKLT EN LVDS BKLT CTRL LVDS DC CK LVDS LVDS CMOS E CMOS 3 3V Sus 8k2 PU USB 4 5 OCH E CMOS 3 3V Sus 8k2 PU E CMOS 3 3V Sus 8k2 PU PU PD Power Tol CMOS 3 9V 3 3V 100kPD CMOS 3 8V 3 33V 100kPD CMOS k2 PU USB over current sense USB channels 0 and 1 A pull up for this line is present on the module An open drain driver from a USB current monitor on the Carrier Board may drive this line low Do not pull this line high on the Carrier Boar
38. igure ICH USB Control SATA Mode Selection IDE AHCI Raid Determines how SATA Controllers operate IDE Sata operates in IDE Mode AHCI Sata operates in AHCI Mode Raid Sata operates in Raid Mode Note to configure Raid press CTRL after Post to enter Raid option Rom or install the Intel Matrix Storage Manager for XP Vista Note Only 3 of 4 Sata Ports can be used for Raid Note To install XP in AHCI or Raid Mode it is necessary to install ICH9M AHCI Raid Driver during installation process For XP a USB Floppy is needed to include drivers by pressing F6 Azalia Device 27 Disabled Enabled Auto Control Detection of the Azalia Device Function 0 Disabled Azalia will be unconditionally disabled regardless of presence Auto Azalia will be enabled if present disabled otherwise Enabled Azalia will be unconditionally enabled regardless of presence for Docking Azalia Modem PME Disabled Enabled Control the ability to wake the system Enable from an Azalia Modem Device On board LAN Disabled Enabled Setting item to Disabled will remove the LAN from PCI Config Space Setting item to Enabled will allow the LAN to operate correctly PXE OPROM Disabled Enabled Enable PXE Option ROM PCI Clock Run Disabled Enabled If enabled the CLKRUNZ logic will stop the PCI Clocks 47 MSC CXC GS45 User s Manual BIOS O ee sem Pop Up Mode Enable Disabled Enabled Select the proper mode
39. igure SATA Port 2 SATA Port 3 Submenu Master amp Slaves Configure SATA Port 3 38 MSC CXC GS45 User s Manual BIOS 6 2 3 1 Board Information O ee sme Boot Counter Informative The number of times this board has booted up Northbridge Informative Identification of the northbridge 6 2 3 2 Masters amp Slaves The Master and Slave settings on the Main Menu control these types of devices Hard disk drives IDE and SATA Removable disk drives CD ROM drives There is one IDE connector on your motherboard usually labeled Primary IDE There are usually two connectors on each ribbon cable attached to IDE connector When you have connected two drives to this connector the one on the end of the cable is the Master When you enter Setup the Main Menu displays the results of Autotyping information each drive provides about its own size and other characteristics and how they are arranged as Masters or Slaves on your machine Note Do not attempt to change these settings unless you have an installed drive that does not autotype properly such as an older hard disk drive that does not support autotyping 39 MSC CXC GS45 User s Manual BIOS If you need to change your drive settings select one of the Master or Slave drives on the Main Menu This will display a menu like this Note The capacity is displayed in real Mbytes 1MB 1024 1024 Bytes Drives with a total capacity g
40. ive owners Certification MSC Technologies GmbH is certified according to DIN EN ISO 9001 2000 standards Life Cycle Management MSC products are developed and manufactured according to high quality standards Our life cycle management assures long term availability through permanent product maintenance Technically necessary changes and improvements are introduced if applicable A product change notification and end of life management process assures early information of our customers Product Support MSC engineers and technicians are committed to provide support to our customers whenever needed Before contacting Technical Support of MSC Technologies GmbH please consult the respective pages on our web site at www msc technologies eu support boards for the latest documentation drivers and software downloads If the information provided there does not solve your problem please contact our Technical Support Email support msc technologies eu Phone 49 8165 906 200 CXC GS45 User s Manual Content T GieneralnfottmatlOl coo ote Rr are re ian he ea e 5 tl devenir EE 5 1 2 Reference Documents asss 5 ES Sarl e ee E 6 EE nelle leen EC H 2317 E TEEN H EN Ee ege le ET TT 8 23 COM Express implementation ra 9 24 EDITIONS 11 EN Ge ET lee KE 12 2 6 Power dissipation DOS Prompt 512MB DDR2 SO DIMM enn rrrrrr nn n rn rr reen 12 2 7 Mechanical Dimensions cr eer n ae db ee ee
41. ization Disabled Enabled When enabled a VMM utilize the Technology additional hardware virtualization capabilities provided by this technology T States Disabled Enabled Enables Processor throttling states Thermal Control Circuit Disabled Setting this bit enables the thermal control circuit TCC portion of the Thermal Monitor feature of the CPU TM1 50 duty Cycle TM2 Geyserville III TM1 and TM2 PROCHOT Enable Disabled Enabled Enables the processors s PROCHOT signal If asserted the TMx circuit will be engaged PROCHOT is in addition to the TCC and Enhanced TCC circuitry inside the processor and either may engage TMx 6 2 4 2 MCH Control Sub Menu mem om osem PCI Express Graphics 256 MB 128 MB 64 MB Selects variable size PCI Express Size config space Dynamic FSB Disabled Enabled Enable Disable dynamic FSB Option for System memory Disabled Enabled Disable No change in System memory Frequency frequency Enable System memory setting as 667MHz DMI Link ASPM Support Enabled Disabled Enable disable the control of Active State Power Management on both GMCH side and ICH9 side of the DMI Link Stop Grant Configuration Auto Manual Automatic Manual stop grant configuration Number of Stop Grant 0 63 Selects number of Stop Grant cycles cycles 44 MSC CXC GS45 User s Manual BIOS zs LI zm JL Femme Always enable PEG Disabled Enabled To enable PEG
42. ke up signal May be used to implement wake up on PS2 keyboard or mouse activity BATLOW Il CMOS 3 3V Sus 8k2 PU Indicates that external battery is low THRM Was CMOS 3 3V 10k PU Input from off module temp sensor indicating an over temp situation 3V 3 3V THERMTRIP CMOS 3 Active low output indicating that the CPU has entered thermal shutdown SMB CK I O OD CMOS System Management Bus bidirectional clock line Power sourced through 5V standby rail and main power rails SMB DAT I O OD CMOS 3 3V Sus 3 3V System Management Bus bidirectional data line Power sourced through PU 5V standby rail and main power rails 1 SMB ALERT CMOS 3 3V Sus 3 3V Ok PU System Management Bus Alert active low input can be used to generate an SMI System Management Interrupt or to wake the system Power sourced through 5V standby rail and main power rails 2 9 17 General Purpose UO Pin Signal Power Remark PU PD Description Type Level Rail Power Tol GPO O 3 CMOS 3 3V 3 3V General purpose output pins Upon a hardware reset these outputs are low GPI 0 3 CMOS 3 3V 3 3V 10k PU General purpose input pins Pulled high internally on the module Source Target CH9M SFF CH9M SFF ICH9M SFF CH9M SFF ICH9M SFF GPIO14 CH9M SFF ICH9M SFF GPIO13 CPU GS45 ICH9M SFF ICH9M SFF ICH9M SFF ICH9M SFF Target ICH9M SFF GPIOs 28 08 26 10 ICH9M SFF GPIOs 36 37 38 39 25 MSC CXC G
43. l Computer Manufacturer Group is a module concept to bring PCI Express and other latest technologies like SATA USB 2 0 and LVDS ona COM Computer On Module A COM Express module is plugged onto an application specific base board similar to the ETX concept but offers more options and a growth path to future CPU technologies Utilizing different sizes COM Express can be used for highly embedded solutions up to high performance platforms The design of the MSC CXC GS45 module supports the dual core CPU technology enabling you to boost your embedded application to highest performance levels For low power requirements we also support the LV version in a single core configuration For evaluation and design in of the COM Express modules we offer evaluation baseboards and develop motherboards providing the interface infrastructure for the COM Express module using PC type connectors for external access Currently two module sizes are defined in the COM Express Specification 1 0 the Basic Module and the Extended Module In addition MSC and other manufacturers have created a third smaller form factor the Compact Module The primary difference between the Compact the Basic and the Extended Module is the over all physical size and the performance envelope supported by each The Extended Module is the largest and can support larger processor and memory solutions The Basic Module is the most common supporting typical processor platforms i
44. mber that should Auto Select be used for this PCI interrupt line dda 14215 Disabled PCI INT not functional Auto Select Let Bios decide which IRQ should be assigned 3 4 5 6 7 10 11 12 14 15 Use this IRQ number for the PCI interrupt Note see chapter 5 1 for PCI IRQ Routing table 6 2 4 4 3 ICH USB Control Sub Menu am om sme USB Ports 0 5 Enabled 0 1 Enables USB controller Device 29 Enabled 0 3 Enabled 0 5 USB 2 0 Ports 0 5 Disabled Enabled USB Controller Device 29 EHCI functionality USB 2 0 Pons 67 2 USB 2 0 Pons 67 Ports 6 7 Disabled Enabled 67 Enabled Disabled Enabled 67 7 Enables USB Controller Device 26 USB Controller Device Enables USB Controller Device 26 Legacy USB Support Disabled Enabled Enable support for Legacy Universal Serial Bus 6 2 4 5 ACPI Control Sub Menu mem oe sem Disable ACPI Sx None S1 S2 S3 84 S5 Select one of the ACPI power states 1 S2 S3 S4 S5 If selected the corresponding power state will be disabled Passive Cooling Trip Point Disabled This value controls the temperature 63 C 71 C 79 C 87 C 95 C tof the ACPI Passive Trip Point the point in which the OS will begin throttling the CPU Note If the DTS is enabled only values below 97C are valid 49 MSC CXC GS45 User s Manual BIOS tre om Critical Trip Point POR This value controls the temperature
45. n the embedded world The Compact format allows smaller and more portable system solutions All module sizes use the same connectors and pin outs and utilize several common mounting hole positions This level of compatibility allows that a carrier board designed to accommodate an Extended Module can also support a Basic or a Compact Module Up to 440 pins of connectivity are available between COM Express modules and the Carrier Board Legacy buses such as PCI parallel ATA LPC HDA are supported as well as new high speed serial interconnects such as PCI Express Serial ATA and Gigabit Ethernet To enhance interoperability between COM Express modules and Carrier Boards five common signalling configurations Pin out Types have been defined to ease system integration CXC GS45 User s Manual 2 Technical Description 2 1 Key features The MSC CXC GS45 COM Express module is designed as a type 2 module Key features include Module size 95 mm x 95 mm 18 mm 2 height with heat spreader with 5 mm stack option Dual 220 pin connector 440 pins x DDR2 SO DIMM module Eight USB 2 0 ports 4 shared over current lines Four Serial ATA ports with data rates up to 3 0Gb s 300MB s Five PCI Express x1 lanes Support pins for two ExpressCards One dual 24 bit LVDS channel Analog VGA High definition digital audio interface external CODEC Single GBit Ethernet interface LPC interface Four GPI pins
46. ns Configure Watchdog Options AMT Sub Menu Configure AMT Options 6 2 4 1 CPU Control Sub Menu Note Depending on the CPU type you are using some options of the CPU Control Sub Menu can be hidden in consequence of different CPU type features that exist tre om seem VTD Feature Disabled Enabled VT d supports the remapping of I O DMA transfers and device generated interrupts in a VM Note Vt d must be supported by the Virtual Machine Manager Core Multi Processing Disabled Enabled Determines whether the 2 core is enabled Disabled 2nd core is disabled Enabled 2nd core is enabled Intel SpeedStep Disabled Enabled Allows more than two frequency range to be supported Note Intel amp Celeron CPU s do not support Intel SpeedStep CX States Disabled Enabled Enable CPU C States Main switch for CO C1 C2 C3 C4 Deep C4 C6 Enhanced C States Disabled Enabled Enables Enhanced C State support Enable Disabled Enhanced C States disabled Enabled Enhanced C State enable Deep C4 Disabled Enabled Intel Enhanced Deeper Sleep Enable bit Disabled Enabled Set this bit enable the Package C4 Deep CA exit VID s to min of EIST operating point upon DPRSLP 43 MSC CXC GS45 User s Manual BIOS Description Disabled Enabled Enable deep power down technology state No Execute Mode Disbaled Enabled Prevents attacks again system MemProtection Intel Virtual
47. ords and the Backup and Virus Check reminders Boot Use this menu to set the boot order in which the BIOS attempts to boot to OS Exit Exits the current menu Use the left and right arrow keys on your keyboard to make a menu selection Use this menu to configure Power Management features The Legend Bar Use the keys listed in the legend bar on the bottom of the screen to make your selections or to exit the current menu The following table describes the legend keys and their alternates Key Function Tab or Shift Tab Move cursor left and right i e at System Time System Date Home or End Move cursor to top or bottom of window F9 Load the Default Configuration values for all menus EE Select an item 37 MSC CXC GS45 User s Manual BIOS To select an item use the arrow keys to move the cursor to the field you want Then use the plus and minus value keys to select a value for that field The Save Values commands in the Exit Menu save the values currently displayed in all the menus Display a submenu To display a submenu use the arrow keys to move the cursor to the sub menu you want Then press Enter A pointer marks all submenus 6 2 3 The Main Menu You can make the following selections on the Main Menu itself Use the sub menus for other selections an om Pesio System Time Enter Time HH MM SS System Date Enter Date DD MM YYYY SATA Port 2 Submenu Master amp Slaves Conf
48. reater than 8Gbyte operate in LBA format only tre sme None Auto User ATAPI Removable Other ATAPI CD ROM None Autotyping is not able to supply the drive type or end user has selected None disabling any drive that may be installed Auto Autotyping the drive itself supplies the information User You supply the hard disk drive information in the following fields ATAPI Removable Removable Disk Drive Other ATAPI non specific ATAPI Device CD ROM CD ROM drive Cylinders 1 to 65536 Number of Cylinders Multi Sector Transfers Disabled 2 sectors 4 sectors 8 sectors 16 sectors LBA Mode Control Disabled Enabled 32 Bit I O Disabled Enabled Transfer Mode Standard Fast PIO 1 Fast PIO 2 Fast PIO 3 Fast PIO 4 FPIO 3 DMA 1 FPIO 4 DMA 2 Ultra DMA Mode Disabled Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Number of sectors per track Any selection except Disabled determines the number of sectors transferred per block Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads amp Sectors Enables 32 bit communication between CPU and IDE card Requires PCI or local bus Selects the method for transferring the data between the hard disk and system memory The Setup menu only lists those options supported by the drive and platform Ultra DMA Mode supports 33 66 100 MB sec transfer rate for fixed disk drives 40 MSC CXC GS
49. t differential pair Multiplexed with PEG RX 5 and PEG RX 5 Serial Digital Video TVOUT synchronization clock input differential pair Multiplexed with PEG RX 0 and PEG RX O supported Serial Digital Video Field Stall input differential pair Multiplexed with PEG RX 2 and PEG RX 2 See pP I meu SDVOB CK on module wem m mm SDVOB INT off module Se p meu SDVOC RED on module Ges pm p mm SDVOC_GRN on module Ger Pm mm SDVOC BLU on module Bovococ JL mee SDVOC CK on module sovocn JL D SDVOC_INT off module Spvo S D SDVO_TVCLKIN off module SDVO_FLDSTALL PCle AC coupled Sassel JL e SDVO l2C CK Io CMOS 25V 25V 2 9 15 Miscellaneous Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target I2C_CK Ei CMOS k2 PU General purpose 12C port clock output ICH9M SFF GPIO13 2 IOC DAT I O CMOS 3 3V 3 3V 2k2 PU General purpose 12C port data I O line ICH9M SFF GPIO18 3V 3V SPKR O CMOS 20k PD Output for audio enunciator the speaker in PC AT systems ICH9M SFF 23 MSC CXC GS45 User s Manual Technical Description Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target BIOS DISABLE CMOS 3 3V 3 3V 100k Module BIOS disable input Pull low to disable module BIOS Disables PU SPI Flash BEBE WDT O CMOS Output indicating that a watchdog time out event has occurred PIC12C509 KBD_RST CMOS 3 3V 3 3V
50. to exit Setup without storing in CMOS any new selections you may have made The selections previously in effect remain in effect Load Setup Defaults To display the default values for all the Setup menus select Load Setup Defaults from the Main Menu If during boot up the BIOS program detects a problem in the integrity of values stored in CMOS it displays these messages System CMOS checksum bad run SETUP Press F1 to resume F2 to Setup The CMOS values have been corrupted or modified incorrectly perhaps by an application program that changes data stored in CMOS Press lt F1 gt to resume the boot or lt F2 gt to run Setup with the ROM default values already loaded into the menus You can make other changes before saving the values to CMOS Discard Changes If during a Setup Session you change your mind about changes you have made and have not yet saved the values to CMOS you can restore the values you previously saved to CMOS Selecting Discard Changes on the Exit menu updates all the selections with their previous values Save Changes Selecting Save Changes saves all the selections without exiting Setup You can return to the other menus if you want to review and change your selections 56 MSC CXC GS45 User s Manual BIOS 6 3 Bios Update If a System BIOS update is required please follow these instructions 1 Create a bootable DOS disk usb stick hdd 2 Copy PHLASH16 EXE BIOS WPH and
51. to find the Crisis Recovery or Clear backup EEPROM Jumper The two pads of this jumper should be shorted using tweezers or pliers before applying power to the board and held shorted until the crisis recovery has started As soon as crisis recovery is started the short can be removed The programming process is signalled by short beeps and terminated after successful programming with one long beep After that the system is automatically rebooted 6 4 3 Crisis Recovery software This technique should only be required in the event of a serious corruption of the BIOS for example following an unsuccessful attempt to update the BIOS To use this technique a special software CRISDISK and a USB dongle must be obtained from MSC Note Contact the MSC customer support for information how to obtain the CRISDISK ZIP software and the USB recovery dongle Please follow these simple steps to create a bootable crisis recovery medium 1 Unzip CRISDISK ZIP and start the windows based program WINCRIS EXE on the host system A window will pop up as shown below 58 MSC CXC GS45 User s Manual BIOS Phoenix Crisis Disk Build Project Path Driver Floppy Driver A 1 44Mb Disk Format Ge Removable Fired Disk Options Create MINIDOS Crisis Disk Start C Create FULLDOS Crisis Disk Format the Drive Diskette 2 In the drop down box select either Floppy Drive A
52. ule SATA2_RX pp ee ee Serial ATA Channel 0 receive differential pair SATA2_RX on module SATA3_TX Ce Risi Serial ATA Channel 0 transmit differential pair SATA3_TX on module SATA3_RX MK EAE Serial ATA Channel 0 receive differential pair ICH9M SFF SATA3 RX on module ATA AC Io cmos 33V 33V amp SATA activity indicator active low 2 9 5 PCI Express Lanes Pav mme jte nar Te me rise Type Level Rail Power Tol Target eee E BR NN NN d PCIE TX 0 4 on module PCIE RX 0 4 PCle 3 3V AC coupled PCI Express Differential Receive Pairs 0 through 4 poems JI PSY ama TTT PCIE_TX 5 PCle 3 3V AC coupled PCI Express Differential Transmit Pair 5 not pong JI JI D oaa e TTT dappored ee EE MM PCIE_RX 5 off module supported EEE eee lee a PCI Express Differential Transmit Pairs 16 through 31 These are same PCIE_TX 16 31 on module lines as PEG_TX 0 15 and in module pin out types 4 and 5 ei PCle aR JEE PCI Express Differential Receive Pairs 16 through 31 These are the same PCIE_RX 16 31 off module lines as PEG_RX 0 15 and in module pin out types 4 and 5 PCIE_CLK_REF PCle CLK 3 3V AC coupled Reference clock output for all PCI Express and PCI Express Graphics CK505 PCIE CLK REF on module lanes 2 9 6 PCI Express Lanes x16 Pin Signal Power Remark PU PD Description Source Type Level Rail Power Tol Target 17 MSC CXC GS45 User s Manual Technical Description Pin Signal Power
53. x1024 dp 24 bit 1024x768 sp 24bit 1920x1200 dp 24bit 800x480 sp 18bit 1280x800 sp 18bit 1366x768 sp 24bit 1440x900 dp 18bit 1680x1050 dp 24bit 1920x1080 dp 24bit IGD LCD Panel Type IGD Panel Scaling Auto Force Scaling Off Selects the LCD panel scaling option Maintain Aspect Ratio used by the Internal Graphics Device 1 Auto 2 Force Scaling 3 Off IGD Backlight 10 20 30 40 50 Select the starting brightness for the Brightness 60 70 80 90 100 LVDS backlight signal Note Depending on the used backlight inverter it is possible that brightness scale could be inverted HDCP Mode Disabled Enabled Enable disable HDCP feature DVMT Pre Allocated 32 MB 64 MB 128 MB Select DVMT Pre Allocated Fixed Graphics Memory size used by the internal Graphics Device Total graphics Memory 128 MB 256 MB MaxDVMT Select the amount of Total Graphics Memory Pre Allocated Fixed DVMT for use by the Internal for use by the Internal Graphics Device PAVP Mode Disabled Lite High GMCH Protected Audio Video Path Onboard EDID Eeprom Disabled Enabled Enables or disables the Onboard EEPROM for EDID on LFP1 6 2 4 4 ICH Control Sub Menu mem oom osem PCI Express Control Sub Menu Configure PCI Express Control Submenu 46 MSC CXC GS45 User s Manual BIOS m LI zm JL Femme PCI Control Submenu Configure PCI Control ICH USB Contol Submenu Conf
54. zed in the following table The features identified as Minimum Min shall be implemented by all modules Features identified up to Maximum Max may be additionally implemented by a module The column MSC CXC GS45 shows the implemented features of the MSC module Pree Msccxcests Noe O ue 2 signals are multiplexed with SDVO PCI Express Lanes0 8 E ELE LT PCI Express Lanes 16 31 0 16 off module x16 PCI Express same as PEG pins Graphics signals are multiplexed with PEG LVDS Channels 1x dual channel 2x24 Bit not implemented SATA Ports 2 4 HDA Digital Interface 0 1 USB 2 0 Ports po Uu Tm EELER oes Seege EZ IEE Gen Pose uous U P we RI 1 Sr P wampun EF Seed NN Poema OS RON spor TI Sep qur P EE ER momsen ur CXC GS45 User s Manual mu EI optional TPM 1 2 module 10 CXC GS45 User s Manual Functional units CPUs Chipset Memory SATA EIDE USB COM Express PCI Express PCI LPC Graphics Controller Video Memory LCD Interface SDVO Interface CRT Interface Ethernet Sound Interface Watchdog Timer TPM option Fan Supply Real Time Clock RTC Battery System Monitoring Intel Celeron amp M 722 Penryn Ultra Low Voltage 1 2GHz FSB 800MHz 956uFCBGA Intel Core 2 Duo SP9300 Penryn Standard Voltage 2 26 GHz FSB 1066MHz 956uFCBGA Intel Core 2 Duo SL9400 Penryn Low Voltage 1 86 GHz FSB 1
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