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Enabling Aggressive Voltage Scaling for Real-Time

1. ssssssesseeseeeeeeesssss 85 GaN based buck converter using LM5113 at 2MEHZ eese 86 LIST OF TABLES Table 1 Solar Cell Configurations Table 2 File Structure for Driver Code CHAPTER 1 Introduction Embedded systems have become an integral part of our life Right from an electronic tooth brush to a mobile phone or an unmanned surveillance robot to a satellite embedded systems have played a crucial role in making tasks efficient and easy Embedded systems are developing at an unprecedented rate in terms of features capability and power With the cost of high performance hardware going low and with the aid of easily available development tools the overall cost and development time of each system is decreasing An increasing number of devices are going portable these days These devices operate on battery power and are getting smaller in size With increasing portability comes the challenge of designing efficient battery systems The devices are made up of multiple subsystems designed to perform specific tasks With more number of devices going portable and complex there is a need for efficient power subsystems that can be embedded in these devices The power subsystem should be able to provide power for the entire embedded system which includes charging the batteries and using the energy stored in the batteries to power the subsystems The power subsystem should be low cost efficient
2. DSP Micro Controller Figure 12 Hardware Implementation of EPS EPS prototype has three Flexible Battery Charging Modules FBCMs which interface the solar panels with energy storage devices Two energy storage devices can be 29 connected to the prototype These storage devices can be Li based batteries or super capacitors depending on the requirement of the CubeSat It has four Flexible Digital Point of Load FDPOL converters Two FDPOLs generate standard voltage rails of voltages below the battery voltage whereas the other two FDPOLs generate voltage rails above the battery voltage These rails are user configurable on the fly PMOS switches are present on the prototype to control the power flow from Battery Charging Modules to batteries or Point of Load converters and from Batteries to Point of load converters The system 1s controlled by a micro controller currently TI s DSP TMS320F28335 FBCM 1 FBCM 2 FBCM 3 Buck Boost Buck Boost Buck Boost Converter Converter Converter SCT Input Connectors TI s DSP 22 Fy AN ove aL ose Se Output Connector B r Cd oe AN FDPOL 1 FDPOL 2 FDPOL 3 FDPOL 4 Buck Buck Boost Boost Converter Converter Converter Converter Figure 13 EPS Prototype Board Sections Figure 14 EPS Prototype Board Figure 15 Current Sensing Board 30 31 The current sensing implementation for each converter on the board is modifie
3. Switch closes Sun Time Synchronous Buck Converters Point of Load 5V FDPOL Solar Panels PV Switch closes Eclipse Time Satellite Regulated Bus gt Wide Input Synchronous Buck Boost Charger FBCM Synchronous Boost Converters Point of Load 12V FDPOL 4 v v Plug n play Chargers Battery Pack Synchronous OSLA 15V Point of Load FDPOL Figure 11 Proposed Architecture for CubeSat EPS As shown in Figure 11 1 a scalable modular architecture was proposed which can generate multiple power rails with different voltage ratings These rails can be reconfigured as per requirement 26 It has multiple Flexible Battery Charging Modules FBCMs which can interface with solar panels with different configurations and ratings These converters can be connected in parallel to scale the system to higher ratings They extract power from solar panels and deliver it to energy storage devices connected in the system Each FBCM can be interfaced with two strings of solar panels on opposite faces of the satellite Two energy storage devices can be connected to the system Multiple Flexible Digital Point of Load FDPOL converters convert power from batteries and FBCM to regulated buses for various subsystems Standard voltage levels are regulated on these rails buses like 3 3v 5v 12v 15v etc These levels can are flexible and can be reconfigured by giving appropriate
4. Figure 29 TestBed The testbed is developed using a Renesas RDK Renesas Demonstration Kit based on a 32 MHz 16 bit microcontroller from the RL78 family This specific board has several peripherals including a small LCD screen several push button switches a potentiometer 47 wheel and a PWM Pulse Width Modulation port making it easy to interface a servomotor Potentiometer wheel and switches are used to scroll through the menu and select options Test bed is also designed to run various peripherals periodically 15 NOTE The development of testbed 1s done by Michael Plautz as a part of Aggressive Voltage Scaling project to test EPS board 48 CHAPTER 5 Software Design 5 1 Controller Software Design Controller software is designed in three parts Board Driver Control Loop and Debug interface The software is written in C language Eclipse based Integrated Development Environment provided by TI Code Composer Studio is used for development and testing of software The software is debugged by online emulation using JTAG interface 5 1 1 Board Driver Board driver is a set of functions that are used to configure the board giving an abstraction layer for user to configure the board These functions modify the state of I O pins initialize PWM signals for converters and initialize ADC channels and conversion rate Driver code is arranged in a file structure as below Table 2 File Structure for Driver Code
5. Q24 DMN4027SSS 13CT ND SW BAIT X D35 D36 5 4V 5 4V KDZTR5 1BCT ND KDZTR5 1BCT ND C65 R86 0 1u 10 TP32 pg 478 1395 1 ND 541 10 0TC T ND R165 T POINTOA V 541 10 0TC T ND uem PWM POL1B X TP31 POK 3 RNCP0805FTD20K0CT ND T POINT A V PWM_POL1A gt R166 R89 20k 10k RNGPO805F TD20KOCT RMCFO0805FT10KO0C T ND R88 POL Inductor current detection circuit 10k RMCFO0805FT10KOCT ND TP30 a T POINT A V lt PHASE_POL1 U11 1 8 J9 VI PWM POL1A UGATE PHASE 1 2 7 POL1 ENS 55 BOOT EN PG du e ege oe POL1 PWM PWM VDD SONS 478 1395 1 ND 4 5 C76 GND LGATE 1u 296 22853 1 ND 490 4736 1 ND gt gt PWM_POL1B DMN4027SSS 13CT ND TP29 T POINT A V 5 POL1 OUT C66 47u 565 2568 1 ND POL1 OUT X R90 43k RHM43 0KCRCT ND gt gt POL1 OUT VI C67 0 01u T 478 1383 1 ND 10k R91 RMCF0805FT10KOCT ND Figure 18 Flexible Digital Point of Load Buck Converter Schematic 36 gt gt POL2 CSP gt gt POL2 CSN R102 i Muss PHASE POL2 X ab TP33 100u CSRO0805FK25LOC T ND DMN4027SSS 13CT ND T POINT A SW_BATT gt Y MSS1048 104ML gt gt POL2 OUT TP34 C79 T POINTA Q27 47 C78 V DMN4027SSS 13CT ND KDZTR5 1BCT ND 565 2568 1 ND 0 1u 478 1395 1 ND PWM POL2B gt R168 R104 R103 20k 10 z 10 RNCPOB805FTD20KO0C T ND TP35 541 10 0TCT ND 541 10 07CT ND T POINSA lt PWM POL2A D39 D40 KDZTR5 1BCT 10k 5 4V 5 4V KDZTR5 1BCT NEDZTR5 1BCT ND R167 20k RNCPO0805FTD20KOCT ND R106 RMC
6. It also discusses EPS in detail CHAPTER 3 discusses previous work in the field of development of CubeSat EPS It discusses the architecture implementation advantages and drawbacks of various CubeSat Electrical Power Subsystems available in the market It is followed by the work 1 by Shailesh Notani He gathered design specifications for EPS proposed architecture which caters the requirements and developed prototype board He has reported preliminary test results of the prototype board Testing of high frequency GaN devices development of phase leg and its results are discussed in 1 This thesis is based on his work Enhancement of EPS prototype board CHAPTER 4 software design and implementation CHAPTER 5 communication and debugging interface CHAPTER 5 and enhancement and redesign of GaN devices based phase leg along with implementation of buck and boost converters using the phase leg CHAPTER 8 is discussed in as a part of the work in this thesis Aggressive Voltage Scaling its requirements and advantages are discussed in CHAPTER 6 Being a part of the project team I was responsible for developing and implementing the following mentioned segments e Testing the CubeSat EPS board e Modifications in FBCM and FDPOL circuits e Modifications in path selection feature circuit and power failure circuit e Design of breakout board to interface EPS board with any micro controller development kit e Design and development of Curre
7. PB Ci BuckMOEoscsueestotibessuat teat hates tae ense Ebene Sc vat dol ure quotas S 68 FBCNI Closed L 00pCOBL UOL oeste oti ota E n dtes eol n DUM euo u bM Puede edd 69 FDPOL converters at 73 and 25 Guty CYCIES cose I tits tev thao roe aver abd aod tech a 71 FDPOLconvetters at o070 duty Cycle ioediuseies eio Cris eei Erit aud toa rae ebd dae 72 FDPOL converters varyme duty Cycle on the TY ossi s e rn oe EHE gea euet o dana oues 72 FDPOL Closed Loop Control is RE RR tee a Verve etaed wae 73 Resistance vs Breakdown Voltage comparison eese 75 LGA Package for BPC eGalN devices uc o REA EARN v ia e osa i nuu A uas due ea uae Us 76 Digital and Power Section Schematic for GaN bOard ee ececcceceseeeeeeeeeeeeeeeeeeeeeeeeeeeeees 77 Isolated power supply circuit for gate driver sees 78 GaN device based Phase Leg Board Layout eene 79 Low Power Buck Convertet at 1S METZ iot oerte bo Rees retis ba ee etes ho o Mae sti En Run 80 High Power Buck Converter at MEHZ 5522 tterdiisan ios ead e e sah ata tactu uus 81 Low Power Boost Converter at LMLBIZ ives oto pene re eoo sepa Eo Bent ede ewe tape ue se entre pa ba Bene dps des 82 High Power Boost Converter at MHZ ieidiedecu uud exsa sacas cuan as da dea io dau ad auo sa cac uaa eaeque dads 82 GaN based phase leg circuit using LMS5113 esses 84 Board layout GaN based phase leg using LM5113
8. RMCFO0805FT10KOCT ND 8 1383 Figure 23 Voltage Measurement Circuits II Voltage divider circuits are implemented to bring the voltage at different stages down to ADC input voltage range The resistors can be selected based on the highest possible voltage at the stage Currently we are testing with batteries rated at 7 2V and thus buck output resistor divider can be selected as 23k and 1k Boost converters are rated at maximum output voltage of 30V Resistor divider for boost converter can be selected as 99k andlk This gives capacity of fine sensing on buck converter To keep the design scalable and accommodate batteries up to 30V all resistor dividers are selected as 43k and 10k ohms 41 Figure 24 Current Sensor Circuit Schematic An external current sensing circuit is implemented to sense and amplify the voltages sensed across sense resistors The gain of this circuit can be set by the equation G 1 R1 R2 4 Maximum current across any sense resistor 0 025 ohms is rated to be 2A Gain of this circuit is currently set to 31 to accommodate any current overshoots up to 4A keeping the output to the ADC to maximum of 3 1V 42 4 6 MPPT Circuit design D1 568 6530 1 ND PANEL X 1 L1 10u 240 2395 1 ND C1 1000p 709 1288 1 ND PANEL X 2 C2 0 1u C3 478 1395 1 N 0 1u 478 1395 1 ND 1000u PCE4848CT ND D2 C4 568 6530 1 ND 1000p 709 1288 1 ND R5 30k RHM30 0
9. This supply is provided to opto coupler FOD3180 which drives is used to drive gate 3V is used to quickly remove charge from gate to facilitate quick turn off of FET Power section contains gate driver circuit and GaN FETs Digital section contains signal conditioning and dead band verification for PWM signals for gate If sufficient dead band is not provided between the upper gate and lower gate PWM the signals do not reach the gate of FETs thus it provides protection against possible short circuit 79 8 1 2 Board Layout Digital Sectic isolated Supply 2 Figure 51 GaN device based Phase Leg Board Layout Board Layout is done three sections so as to keep the switching noise from entering the digital circuit and power supply circuit The Isolated Power Supply section is located on one end of the board surrounding the digital section The Printed circuit board is designed in such a way that none of the routes of one section overlap with routes of other section to eliminate any kind of coupling or interference The power section of the board containing GaN devices is located on other side of board along with gate driver circuit Provision is made so that in case of any interference the board can be cut into three individual boards 80 digital board power supply board and switching board The GaN devices are on the bottom layer of the board so that heat sink can be easily mounted 8 1 3 Results The GaN
10. a buck converter is tested using EPC1010 switching at 2MHz with an output current of 200mA at 4 0V Noise is present because of the wires used to connect components This noise can be eliminated by using the printed circuit board This will allow the devices to be tested at higher currents and voltages 87 CHAPTER 9 Summary and Future Work CubeSat EPS is a very good example of a power supply system for an embedded system with stringent parameters This subsystem is used as a base to look at a wide range of embedded applications Hardware is enhanced over previous work along with software implementations PID and MPPT algorithm implementations protection algorithms etc are implemented as a part of software implementation Real Time Operating Systems based software is implemented and tested Effect of change in control loop frequency on transient voltage response is studied and system cost reduction is analyzed based on selection of micro controller and components GUI based debugging and configuration software helps us to test various stages of CubeSat EPS The concept of Aggressive Voltage Scaling is explored using CubeSat EPS and subsystems High frequency GaN device based phase leg is designed along with developing gate driver circuit It is further implemented using gate driver IC LM5113 for better performance and to remove the effect of stray inductance and ringing effects Use of high frequency GaN devices reduces the size of filter
11. GaN based phase leg circuit using LM5113 85 Figure 57 Board layout GaN based phase leg using LM5113 As seen from the circuit in Figure 56 a phase leg is implemented As preliminary testing of the circuit resistance R1 and R2 are shorted so as to keep extra impedance to zero A ceramic boot strap capacitor of 0 luF is used The board layout Figure 57 shows the placement of the two devices right beside each other along with LM5113 so as to provide a very low impedance path As suggested in the datasheet the bootstrap capacitor C1 is kept close to the IC The devices are on the bottom side of the board so that heat sinks can be mounted easily The size of this circuit board is 0 75 x 0 75 It is expected that this circuit can process minimum power of 1 kW 8 2 1 Results Preliminary testing was done to test the switching ability of the gate driver IC LM5113 The test setup had a lot of wires and stray inductance which caused a lot of noise in 86 the circuit This circuit was to test if it is possible to make power converters of very small sizes like 1 x 1 Tek TIE e Stop M Pos r20 0 us MEASLIRE t CH1 Mean CH2 Max 1 4 Dv CH2 Mean 3 B3V 2k CH4 Freq SUUM UU UU 1356M CH4 f 1 f f i f f i j f fl Mean 54V CH1 5 00V CH2 5 00 M 1 0 0 us CHS 1 74V Push an option button to change its measurement Figure 58 GaN based buck converter using LM5113 at 2MHz As seen from Figure 58
12. It 1s important to consider efficient power usage at the satellite level rather than the system level Because the subsystems consist majorly of digital systems the power consumption is directly proportional to product of operating frequency and square of voltage P a Vf The subsystems are moved to the low power modes when not in use During this mode the subsystem switches to a lower clock frequency f in order to reduce power consumption But the bus remains at the same voltage If supply is brought to a lower voltage V a significant amount power of two of power saving can be achieved Also considering specifications of a subsystem maximum voltage margin can be derived which defines the minimum voltage at which subsystem can run It is required to know the maximum voltage drop a subsystem can handle so that a load transient can be acted upon by the power controller within known range The selection of control loop frequency and power controller system along with its cost depends on this specification 64 To prepare the requirements of aggressive voltage scaling various tests are performed and loads are characterized along with point of load converters Control loop task frequency plays an important role in determining transient response of the converter Operating Voltage Figure 38 Response time based on control loop frequency Figure 38 shows how a transient response of point of load converter can be if it 1s det
13. LOOD enana AA 50 51 3 Debug Mern Eana T PO I DIC MM IS ILU DES 52 52 RTOS based ImplemebtatiOl 25i iore cei pria ea aU esa opu Ss teo hU nde oit EE lost AES 52 5 3 Communication and Configuration Design ccccccesseccccesseccceesececeuececseseceeeueceeseneceeseeeeeetas 55 5 4 MPPT Algoritbim dtmpletmeftbatiob suscepit eoe el eie heme a Pecoe Cour coti ecieata Ces ra ule eeu eRs 56 5 5 PID Controlot POL CODVeLEIBES eed ce Ne es Meet berto ta Miet ERO Ed t ED e Meer bon baeels 59 CHAPTER 6 Aggressive Voltage Scaling eese nennen nennen nennen renean nnne ne 63 CHAPTER Z RESUM Soret unt tetasat xe ctetu ur iet e ue n optet em iet Ud rM E toPER NUEVE EU MR 67 Fads EB o c mM 67 7 1 1 Open LOOD sage sae DU 67 7 1 2 Eoi oh Bole o EE MA EAEE ET D E E E E E 69 T2s FDPOl Mc 71 7 2 1 pen LOOP PTT 71 7 2 2 CO ea OOo Ainaa UE D UTI ea sedancecsehestace 73 CHAPTER 8 High Frequency GaN device based implementation ccccccesecccesccceeeceeeececeeceeeseeeens 74 8 1 GaN based phase leg with indigenous driver circuit cccccccesseccceeseceeceesceeeaesececseeeceeseneeeeeas 77 S T TS CIECUI iia ie dr dtc da M LI ns MEE UL caius 77 Ble OAV OUI AREE ERR NR RUE RR BENE TERNURA ERR TEC terse ctats 79 8 13 CL cic s 80 8 2 Development of GaN based circuit with LM5113 driver IC eeeern 84 Bo DC E E Y Sy crs fact cece utet AEE cect dub Sad sib AE EAE AN ENE A E EA Ent E E A A
14. PAW OGG Ed Ib A NERO TN NEIN TP TTE TORTE 13 2 23 45 SIR I RE RT EU CE DI 13 2 4 BlectricalPOWer SUubSystelTiaisiuedse e biattic etia tie utpat a Ceres oeanaeeso waar 15 GCHAPTER 3 Previous WOPK ie eren seed br ect lee eet o E ead M era ses el obi n aree pede 18 se CVde SD ACCAER A NR EE TUE EET ES 18 S CUDSSSERIFEPS ue ierat tis Da i ema uH a bI PUE FOU UNE 20 SPESE scel CEP EE 22 S L DESEMDE CICIR opis tutut euh vt a ubt soe euacaua inte a ues ote LIE 22 3 3 2 Proposed Architecture ue oco ioo ode Yo vx ta eco epa deae eyed tr o rado vta to opa iore depu ei PE LER RS 25 CHAPTER 4 Hardware Design and Modifications cccscccccssseccceeseccccescecceesececeuececseeeceesensecesseneses 28 4 1 Flexible Battery Charging Module cio rte e e bien ea eet aee ex fep eu the ds 32 LN IP OT 34 ze Mie l eidejtm ET 37 4 4 Power Failure amp RecoVelVss a indu au ceils ote fv tive e d o a EU m ID EA A EE SUID 38 4 5 Current amp Voltage MEaSUreEMe Nt cccccssseccccesecceceesccecsenececeeeeceeeseecessuseceeseneceesensecesseneceseeeas 39 AG MVIPPTOCIECHIEGIBSIS naei a ua Duedo uvtedids Ones rou ates orti mcus uu AEEA 42 Vii 4 7 COMM ONE cii o i cu a D TO ARMOR EMEN dM IR e UD PIdUI EUER 43 do TOSEBOU ed mots E tad Eu DM MED EE E I E 45 CHAPTERS SOLtW ale Desig orasi uci e Sentent N ease ele ee eae 48 Sul Controller Software DESIGN iei ere m Ceo Ver PED Deere PAN VEPR DUE Cedere Pob aEe v ew dees 48 SABOO DUVET DEDE 48 SLEA COL FOL
15. also known as hill climbing methods as these algorithms track local maximum of the power curve Perturb and Observe P amp O algorithm is generally used in most of the systems It perturbs operating voltage in a direction and senses output power of solar panel If the power has increased as compared to previous iteration it knows that the change in operating voltage is beneficial The operating voltage is continuously changed in the direction which increases the output power This results in oscillations about the maximum power point Under very 58 fast changing illumination conditions this algorithm can track in a wrong direction This algorithm is easy to implement and the system is not facing rapidly changing illumination conditions The Incremental Conductance method uses PV array s incremental conductance dl dV to compute the sign of change in power dP dV It adapts to changing irradiance conditions more accurately than P amp O However the output oscillates about maximum power point and can track in wrong directions under rapidly changing illumination conditions This method is more complex than P amp O and requires more computational time The Constant Voltage method makes use of the fact that the ratio of Vmpp Voc 0 76 This method requires setting PV panel s output current to zero for the time it senses open circuit voltage The operating voltage is then set to 76 of the measured value Even though 76 is a good
16. and easily reconfigurable for various applications It should generate multiple voltage domains so as to eliminate the need for each subsystem to have its own power converter Increasing the efficiency of the device by reducing the number of power conversion stages is critical The devices go into a low power or standby mode when not in use to save power consumption Generally the low power mode is achieved by reducing the frequency of operation of subsystems The system can operate at low voltage in standby mode Power being directly proportional to the square of voltage scaling the supply voltage of the system saves a significant amount of power The motivation of the project is to develop a low cost efficient and scalable power subsystem which can aggressively and intelligently scale the output voltage on multiple rails to reduce power consumption of the system CubeSat is a very good example of an embedded system with stringent voltage and power limits of operations It is a battery powered system which has communication capabilities and high performance sensing equipment like earth imaging and weather monitoring equipment It has a dedicated Electrical Power Subsystem EPS which serves as the power processing and regulating subsystem The size and weight constraints of CubeSat along with its power processing requirements make EPS design very critical CHAPTER 2 describes CubeSat mission satellite specifications and various subsystems
17. approximation of maximum power point voltage it might not coincide with it Digital implementation of perturb and observe P amp O method is applied to track maximum power point of solar panels This method is chosen for its easy and accurate implementation The output voltage and current of solar panel are sensed by the sense circuit as discussed in Section 4 6 and fed to ADC module of micro controller These values are multiplied to get power In next iteration the output current of Battery Charging Module is increased by a predefined step to increase the load on solar panel The voltage and current are sensed at this load and output power is compared to previous value If output power is more than the previous value load current is increased again If it is less than the previous value 59 algorithm starts to decrease the load current and perform the same steps till it reaches a point where the output power starts decreasing The direction is continuously changed on reaching the peak point and thus it keeps on oscillating about the peak power As discussed in 16 17 during the rapid changes of solar irradiance a tracking error may occur Also the algorithm may get confused due to the variations in PV output power caused by duty cycle modulation of the converter Thus the sampling interval of P amp O algorithm is kept low enough not to cause instability 5 5 PID Control of POL converters Control software is developed t
18. components in turn reduces the size of printed circuit board We can look forward to use air core inductors and planar inductors Evolution of GaN technology and availability of devices with higher power specifications will enable its use in high power applications 88 EPS being a ready to use model and being enabled with high frequency devices can be used to develop and test various algorithms and methodologies for power converters EPS prototype board can be used with various power supplies to scale it to higher power requirements The platform can also be used to test different battery models Different types of batteries can be interfaced with the board to test and study various charging algorithms for different batteries The world is moving towards hand held devices with batteries where power consumption of devices plays a very critical role The concept of aggressive voltage scaling can be explored and extended for use in power supplies for various embedded systems The prototype using GaN devices can be developed with very small sized passive components like on board inductors and extended to develop boards for different type of power converters 89 REFERENCES 1 S A Notani Development of Distributed Scalable and a Flexible Electrical Power System Module for CubeSat and Small Satellites North Carolina State University North Carolina USA 2010 2 CubeSat Atlas V OUTSat Launch 2012 Online Available http www
19. cubesat org index php missions past launches 122 136 launch alert 3 The University of Southern California AENEAS Online Available http www isi edu projects serc aeneas 4 Amsat UK ISS Amateur Radio CubeSats Deployed 2012 Online Available http www uk amsat org p 10119 5 California Polytechnic State University CubeSat Design Specification Rev 12 2009 6 Piug Suari J C Turner and W Ahlgren Development of the standard CubeSat deployer and a CubeSat class PicoSatellite in EEE Aerospace Conference 2001 7 California Polytechnic State University Poly Picosatellite Orbital Deployer Mk III ICD 2007 8 Colorado Space Grant Consortium Hermes CubeSat Project 2011 Online Available http spacegrant colorado edu 9 J G A Ocana Altitude Control System for the CubeSat Inter American University of Puerto Rico Bayamon Campus Bayamon Puerto Rico 10 Clyde Space User Manual Flexible Electronic Power System CS XUEPS2 41 42 2010 11 C Clark A Strain and A L Mazarias A High Performance Very Low Cost Power System For Microspacecraft in 2008 European Space Power Conference Konstanz 12 Pumpkin C Inc CubeSat Kit Linear EPS Online Available http www cubesatkit com docs datasheet DS CSK Linear EPS 711 00338 D pdf 13 Efficient Power Conversion Development Board EPC9001 Quick Start Guide Online Available http epc co com epc documents
20. employed to perform imaging task on the earth These satellites have sensors that assist in monitoring vegetation health improve species separation and help in measuring protein and nitrogen content in biomass These satellites are to be replaced with a group of 6 micro satellites weighting 38kg to improve the revisit time of 3 5 hours as compared to 24 hours On August 2 2012 Atlas V rocket launched from Vandenberg Air Force Base in California deployed 11 CubeSats for US Government and NASA ELaNa university program 2 These satellites are e CINEMA by University of California at Berkeley A 3U cubesat to study Space Weather effects in near Earth Space e CSSWE by University of Colorado at Boulder A 3U cubesat to study the relationship between solar flares and energetic particles CP5 by California Polytechnic State University at San Luis Obispo A 1U cubesat De Orbiting experiment using a Deployed Thin Film Mechanism CXBN by Morehead State University A 2U cubesat Map the entire sky in X ray spectrum using energy cosmic background radiation measurements in the 30 50KeV range Aeneas by University of Southern California A 3U cubesat to prove the concept of wifi based tag tracking from low earth orbit to track cargos in the open ocean waters ORSES by Operationally Responsive Space Office A 3U cubesat for US Army Space and Missile Defense Command HORUS amp RE by Lawrence Livermore National Laboratory Both 3U CubeSat to detect orbit
21. guides EPC9001 qsg pdf 14 Efficient Power Conversion Development Board EPC9002 Quick Start Guide Online 90 Available http epc co com epc documents guides EPC9002 qsg pdf 15 M Shah A Juneja S Bhattacharya and A G Dean High Frequency GaN Device Enabled CubeSat EPS in EEE Energy Conversion Congress and Exposition Raleigh North Carolina USA 2012 16 A Ramamurthy and S Bhattacharya Optimized digital maximum power point tracking implementation for satellites in EEE 30th International Telecommunications Energy Conference 2008 17 N Femia G Petrone G Spagnuolo and M Vitelli Optimizing DutyCycle Perturbation of P amp O MPPT Technique in Power Electronics Specialists Conference vol 3 1939 1944 2004 18 J G Zeigler and N B Nichols Optimum Settings for Automatic Controllers Trans ASME vol 64 p 759 768 1942 19 A Lidow J Strydom M d Rooij and Y Ma GaN Transistors for Efficient Power Conversion 20 S L Colino and R A Beach Fundamentals of Gallium Nitride Power Transistors EPC Corp 21 California Polytechnic State University CP5 2011 Online Available http polysat calpoly edu CP5 php 22 University of Colorado Colorado Student Space Weather Experiment 2012 Online Available http lasp colorado edu home csswe 23 UC Berkley CINEMA at UC Berkley Online Available http www smdc army mil FactSheets SMDC One pdf
22. in Figure 47 19 20 The on resistance of GaN mosfet EPC1001 at 125 C is 1 45 times than that at 25 C as compared to 1 7 times for Silicon This difference increases with increase in voltage rating of the device 75 100V 200V Ron Omm 3 e e nm 10 10 10 10 Breakdown Voltage V Figure 47 Resistance vs Breakdown Voltage comparison The threshold voltage for eGaN FETs is much lower than Si MOSFETs eGaN FETs start conducting at gate voltage of 1 6V Along with very low Rps ow GaN devices have very low capacitance This enables devices to switch hundreds of volts in nanoseconds giving it multiple megahertz capability The forward voltage of the body diode of eGaN FET is higher than silicon transistors There 1s no minority charge carriers involved in conduction therefore it results in zero reverse recovery losses EPC eGaN FETs are available in LGA packaging as in Figure 48 which reduces the package resistance and inductance 19 20 76 Figure 48 LGA Package for EPC eGaN devices Enhancement mode GaN transistors have similar characteristics to power MOSFETs but have improved high speed switching lower on resistance and smaller size Thus they can be used in various power converter applications to get better performance than conventional Si devices based power converters Developing power converters switching at high frequencies reduces ratings required for filter components We can loo
23. micro controller can be used in place of DSP Thus a selection of inexpensive micro controller can reduce the overall cost of the system Aggressive Voltage Scaling concept has a broader view and can be applied to a variety of embedded systems of which CubeSat is a very good example 67 CHAPTER 7 Results This chapter discusses the results of the prototype board and algorithms implemented on it 7 1 FBCM 7 1 1 Open Loop The Flexible Battery Charging Modules are capable of boosting the input voltage as well as bucking it The results in Figure 40 show the Boost mode of FBCM where the synchronous boost converter runs at 50 duty cycle and synchronous buck converter is bypassed at 100 duty cycle We can see the average output voltage 9 68V nearly twice the input voltage 5 19V 68 Vin 3 18V Vout 968V Buck Duty Cycle 100 Boost Duty Cycle 50 M Pos 2 000 us MEASURE CH2 Mean OUTPUT INTERMEDIATE Ugate Buck INPUT CH2 5 00V M 1 06 us CH3 T12V 3 200v CH4 100v 8 Mov ll 105 150 1304Hz Figure 40 FBCM Boost Mode Vin I I Vout 5 27V Buck Duty Cycle 50 Boost Duty Cycle 100 k A E Tria d M Pos 2 000 us MEASURE QUIPUT INTERMEDIATE Ugate Boost 10 0V CH2 500V M1 00us vertical position 0 76 divs 3 80 Figure 41 FBCM Buck Mode 69 Figure 41 shows the wave form of FBCM running in Buck mode where the boost converter is bypassed
24. with upper switch kept on and buck converter is running at 50 duty cycle The average output voltage 5 27V is nearly half of the input voltage 10 1V 7 1 2 Closed Loop Transition I Pos amp 0 0ns MEASURE CH Mean VUE CH Off Voltage re Pos Width CH3 Uff Pos Width CH4 Mean Input Voltage CH2 Uff Freq 25s CH3 3 264 4 ct 122333 lt 10Hz 1 IEEeeeeee MM CHT SADY E 5 CH4 5v BOOST MODE BUCK MODE Figure 42 FBCM Closed Loop Control 70 Figure 42 shows the closed loop control of Flexible Battery Charging Module The output voltage is set to 7 4V When input voltage is less than the output voltage FBCM runs in Boost Mode as seen in the first part of the waveform When input voltage is more than the output voltage FBCM runs in Buck Mode as seen in the third part of the waveform During transition phase from boost converter to buck converter is when the output is disconnected and converters are switched off as shown in the transition region of the waveform This phase can be configured by specifying the input voltage band around the set output voltage for transition The transition region can be narrowed by implementing better algorithms 71 7 2 FDPOL 7 2 1 Open Loop Two point of load converters are tested simultaneously in open loop As seen in the following figures buck and boost point of load converters are tested and results are reported Buck 7396
25. 0 0TCT ND T POINT A 30k PCE4848CT ND V V D13 RHM30 0KCRCT ND PWM X 1AY PWM X 18 gt gt XINV VI a KDZTR 1BCT ND C8 R8 RNCPO8Q5F TD20K0C T ND R7 0 01u 10k R6 7 3k 478 1383 1 ND RMCF0805FT10K0CT ND 10k Bre HIBCT ND RMCF0805FT3K00CT ND RMCF0805FT10K0CT ND a TP4 TP5 Q3 TPOINT A TPOINTA L3 DMN40278SS 13CT ND gt gt PHASE X 2 22u FBCM OUT lt SRR6038 220Y C T ND D15 D16 PWM GND LGATE tu 296 22853 1 ND 490 4736 1 ND C12 0 1u PWM 478 1395 1 ND GND LGATE 296 22853 1 ND PWM X 2B C9 7u 565 2568 1 ND R9 10 541 10 0TCT ND PWM X2A gt 10k R11 RMCF0805FT10KOCT ND 5 4V 5 4V KDZTR5 1BCT ND KDZTR5 1BCT ND TP8 20k Z RNCP0805FTD20KO0CT ND DMN4 27SSS 13CT ND R10 TRY T POINT A 0 541 10 0TC T ND Y ot lt PWM_X_2B R12 Ok ars e RMCFO865FT10KOCT ND DZTR5 1BCT ND R16 D18 20 RNCPO0805F TD20KO0C T NID 5 AV KDZTR5 1BCT ND itle Cubesat Electrical Power Sy stem Size Document Number usto Date Thursday November 17 2011 Sheet Figure 17 Flexible Battery Charging Module Schematic As shown in the schematic Figure 17 gate driver IC TPS28226 is used to drive MOSFETs of buck boost converter Devices are rated for breakdown of 40V 8A The MOSFETs QI and Q2 along with inductor L2 form Buck Converter for FBCM Similarly the MOSFETs Q3 and Q4 and inductor L2 form Boost Converter for FBCM Only one of the buck and boost converter is active at a time Resistors R5 and R7 form th
26. 6 805FT10KOCT ND R147 RMCF 805F T1 OK0CT ND 10k RMCF0805FT10KOCT ND 5FT10KOCT ND R148 10k RMCFO805FT10KOCT ND RMCF 0805F T10KOCT ND Q18 Q17 FBCM SWB EN gt BCR133INCT ND Q16 BATT2 CHRG gt BCR133INCT ND BATTI CHRG gt BCR133INCT ND Q19 DMP4050SSS 13CT ND TP28 5015KCT ND gt gt SW_BATT a BATT2 gt Q20 DMP4050SSS 13CT ND Leo R71 10k R151 RMCFQ805FT10KOCT ND 10k BCR133INC T NIRMCF0805FT10KOCT ND BCR133INCT ND Figure 20 Path Selection Feature Schematic As seen from schematic diagram in Figure 20 output of battery charging modules can be connected to batteries BATT1 or BATT2 or to the input rail of Point of Load converters SW BATT by Q13 Q14 and QI5 respectively Also power from Batteries can be connected or disconnected to input of POLs by switches Q19 and Q20 These switches are controlled by signals from microcontroller Diodes D8 D9 and D10 are connected to block 38 reverse flow of power to Battery Charging Modules Thus power from the solar panels can be diverted to the POLs instead of using them for charging if batteries are fully charged or there is more need of power at the loads Also batteries can be disconnected to prevent over charging and in case of short circuit faults on the output side 4 4 Power Failure amp Recovery Q34 DMP4050SSS 13C T ND HI wt PWR X oss 568 6530 1 ND Figure 21 Power Failure Recovery Circuit Schematic When
27. ABSTRACT SHAH MIHIR ROHIT Enabling Aggressive Voltage Scaling for Real Time and Embedded System with Inexpensive and Efficient Power Conversion Under the direction of Dr Subhashish Bhattacharya The thesis takes Electrical Power Subsystem EPS for CubeSats as a base and builds the concept of Aggressive Voltage Scaling with Real Time Implementation using it EPS 1s flexible scalable and reconfigurable for its use in wide range of small satellites with different power processing requirements It consists of battery charging modules to store solar energy and point of load modules to use it to power other subsystems and payloads The thesis discusses the requirements specifications architecture and implementation of EPS It also discusses various protection and failure recovery features making the subsystem robust in the harsh space environment Software implementation and RTOS based implementation are reported which apply algorithms like MPPT and PID to the converters of the subsystem A prototype board is developed and results are presented The effect of change in control loop frequency on load transients is discussed This helps to lower the cost of system by relaxing the real time requirements and enabling the use of low end micro controllers or designing multiple subsystems using a single micro controller Aggressive Voltage Scaling method processes the power supplied to the loads and keeps it to a minimum by scaling the supply voltage based o
28. AE E 85 CHAPTER 9 S mmary and FUTURE VV ORK osoenean E RbPa tet te Pet band Eae De 87 REFERENCES d d bdetetin ten tl tok attcrtnare bata o Reti totes qe ota apre nto beta pni cc olde opp oU ef eid 89 viii LIST OF FIGURES Figure 1 SMART 1 Swedish Medium Sized Satellite sseeennnnnnnnnnnnenennnnnnnn 6 Figure 2 One mini satellite of RapidEye Constellation eeeeeeeeeeeeeeeeeeee eene 7 Figure AENEAS A SU Cube Sal inr uten timus emu tpa ease imus piatue uses 8 Proure 4 P POD Deployer aie EHE CHI RES ESSET CENE Er be cH eG Ee HEU aide e Iia e Bere Mb qUE US 10 Pre ure CubeSat SDS YSE oe SEE CHAR AE CHE IN aee i uou tu ue Bede MU uELs 11 Ficure 6 burlding BIOCES Of EDS c EROR dome Ed EHE tn due puit dum nd M Oa dudelad elu dE 15 Fiene 7 Architecture or Clyde Space EPS ceriti bum tx Rio bnt ebbe eon butt viu inte eb esse bandes 18 Figures Clyde Space EPS Har WOEG iso ute En eet busta Rico bte db fendi buie victu buts bless seamed 19 Ligure 9 Architecture or Cube sat KILER Sistine ea eut etn maet es Las Ree pas a n tute 20 Froure 10 Cubesat Rit EP Hard wares eos tesiout as dresden ete dubio ces elsi tiun tumba deb resqeibduds 21 Figure 11 Proposed Architecture Tor CubeSat EPS ide Etre etes peau se tob enu bra etl aset duda 25 Figure 12 Hardware Implementation ot BEDS terri eto PERPE e Feb Creo EP deve det borEe ptt eite elo mte devais 28 Figure I5 EPS Protetype Board SecttOBS isset ies be
29. Adc c Configure Analog to Digital Converters Adc h 49 Table 2 Continued BoardInit c Board initialization function BoardInit h Initialization of Debug interface and transmit functions for Debug Information Configuration of General Purpose Inputs and Outputs to control switches Interrupt Service Routines for ADC PWMs and Communication Configuration of PWM modules switching period initial duty cycle etc Serial c Initialization of Serial module to enable the command debug Serial h interface Timers c Configuration of Timers to call user based algorithms Timers h periodically Contains the global variable declarations and initializations Extern h Contains extern declaration of global variables to be included in various source files The function Init_Board resets EPS to initial settings disables all PMOS switches and asserts SOLAR_PWR signal It stops PWMs for all the converters and does a power on 50 self test It calls initialization functions for System Control InitSysCtrl General Purpose I Os nitGpioQ Interrupt vectors InitPieCtrl Interrupt Vector Table InitPieVectTable Analog to Digital Converters InitADC PWM modules InitPWM Timers InitTimers Serial Interface InitSerial and voltage and current levels for each stage InitValues Current implementation initializes the output of Battery Charging Modules to 7 2V Buck point of load converters to 3 3V a
30. CHI Output Voltage Input Voltage Gate Pulse Output Current Valuexi10 mA Freq 4 i 1471MHz CHI 500V CH2 200V M 100us CH3 400m CH3 5 00V CH4 500mV 17 May 120930 333 848Hz Figure 55 High Power Boost Converter at IMHz 83 Similar to buck converter implementation GaN device based phase leg is used to implement boost converter and is tested for low and high power ratings At MHz switching frequency boost converter implementation at 40 duty cycle 1s reported in Figure 54 and Figure 55 for low power and high power ratings respectively giving output current of 500mA at 24 4V 13Watt and output current of 1A at 48V 48 Watt 84 8 2 Development of GaN based circuit with LM5113 driver IC Recently TI launched a gate driver IC for GaN devices It 1s capable to drive both the high side and low side enhancement mode GaN devices in a synchronous buck converter The higher side voltage is generated using bootstrap technique and is clamped at 5 2V to prevent it to go above the maximum voltage rating of 6V The floating high side driver is capable of driving a high side device operating up to 100V The inputs are TTL compatible and the outputs have capability to adjust turn on and turn off strengths independently Strong sink capability maintains the gate in the low state preventing an un intended turn on during Switching V POWER Q1 EPC1010 917 1004 1 ND J1 VDD LI 3 HI 4HEADER Figure 56
31. Duty Cycle Boost 25 Duty Cycle Tek d Trig d Mi Pos 0000s MEASURE A CHI Mean Input Tady CH2 Freg 500 2kHz CH3 Mean Qutput Buck nen erm dm cl mer e manasa na d m i i CH4 3 Mean Output Boost 10 4 MATH Off None ev LH1 5 00V CH2 5 00V hA 1 00 us CH2 J fai CHS 00v CH4 5 00V 14 Dec 11 03 21 433 327 kHz Figure 43 FDPOL converters at 75 and 25 duty cycles As seen from Figure 43 Buck converter running at 75 duty cycle and boost converter running at 25 duty cycle give the output voltage 5 74V and 10 4V respectively for input voltage of 7 84 V 72 30 Duty Cycle H rad M Pos 33 00 us MEASURE 1118 a Freq 433 3kHz CH3 3 63 t CH4 Mean Output Boost 14 7 MATH Off Mone a CHI 5 00v CH 5 00V M Shins CH2 2 00 CHS 5 007 CH4 5 00V 14 Dec 11 05 4 433 52 4kHz Figure 44 FDPOL converters at 50 duty cycle Figure 44 shows the buck and boost POLs running at 50 duty cycle giving the output of 3 63V and 14 7V for input voltage of 7 45V respectively Varying the duty cycle on the fy Tek N O Scan MEASURE de CH1 Mean input CH2 Freg 2 PM e CR ee o CH3 M rud lutput Buck CH4 Mean Output Boost MATH Off Mone 4s ICH1 5 00 CH2 5 00 M S ms CH2 J TATV CH3 S 00V CH4 5 00v d4 Dec 1109 23 495 927 KHz Figure 45 FDPOL converters varying duty cycle on the fly 73 FDPOLs are also tested by varying the output voltage on t
32. FO0805FT10KO0CT ND R105 10k RMCFO0805FT10KOCT ND TP36 T POINT A V lt PHASE_POL2 1 VL PWM POL2A lt UGATE PHASE U 2 7 POL2 EN Gin 3 1395 1 POL2 PWM PWM CONG 478 1395 1 ND 4 5 C81 GND LGATE tu 296 22853 1 ND e 490 4736 1 ND gt gt PWM POL2B SW BATT over here has to be replaced by another power supply POL2 OUT gt 43k RHM43 0KCRCT ND gt gt POL2 OUT VI ose SSS O itle 10k 0 01u T 478 1383 1 ND Cubesat Electrical Power Sy stem R108 RMCFO0805FT10KO0CT ND Size Document Number CustonxDoc gt Date Monday November 21 2011 heet 8 Figure 19 Flexible Digital Point of Load Boost Converter Schematic Figure 18 and Figure 19 are schematics of Synchronous Buck POL and Synchronous Boost POL converters As mentioned before same components as FBCM are used to reduce the cost of the EPS Gate driver TPS28226 drives the MOSFETs for the buck and the boost converters The voltage divider on the output side brings down the voltage to ADC input range Inductor current is sensed by the resistor and fed to the ADC for sensing by the microcontroller 37 4 3 Path Selection Path selection feature 1s implemented to control the flow of power in the system Q13 DMP4050SSS 13CT ND Q14 FBCM_OUT gt DMP4050SSS 13CT ND HT _earr Q15 DMP4050SSS 1 SCT NB Sw BATT C64 00 D8 568 6530 1 ND 1000u PGE4848CT ND D g D10 568 6530 1 ND 568 6530 1 ND R14
33. KCRCT ND R7 Figure 25 MPPT Circuit Schematic To track power extracted from a solar panel there is a need to sense voltage and current from the panel The voltage measurement by voltage divider circuit and current measurement by sense resistor 1s used to track the power transferred from solar panels to battery charging circuit MPPT algorithm uses these values to change the load current so as to extract the maximum power possible from the solar panels 43 4 7 Controller v33 ISO gt X V33 ISO R79 EMUO MU1 10k TRSTn 2 R80 RMCFO0805FT10KOCT ND TDO TCK a sv S SFBCM SWB EN L RMCF0805FT10KOCT ND l2c_SCL lt _ gt 2C SDA a ug JP POL4 EN POL3 EN POL2 EN gt gt POL1_EN a C Li L VCC 5V gt ANA2 4 SEL2 ANA1 3 SEL2 ANA2 4 SELI ANA1 3 SEL1 VCC 5V gt gt gt GPIO86 GPIO85 gt gt GPIO84 ANA1_3 SEL1 gt gt Z EN BATT 1 2 SEL K SS NM gt gt Z_PWM 2 VCC_5W POL4 PWM Y_PWM_2 POL3 PWM gt gt Y PWM 1 ERST d PWM gt gt xX PWM plies BATT2_SWB_EN D Z ae 4 BATT SWB EN BATT2 CHRG C BATT1_CHRG Z INC VI E ES AR Y EN X EN z Y INC VI lt BATT VI X INC VI S SW BATT VI FBCM VI X amp POL1 3 OUT VI es Z INV VI amp POL1 3 CS VI Y INV VIS amp POL2 4 OUT VI X_INV_VI gt Se X POL2 4 CS VI ND_ISO 3 T1so K RX ISO V33 ISO Figure 26 Micro Controller Interface Schematic Microcontroller is required to cont
34. PS communicates with other modules using I2C telemetry Figure 8 Clyde Space EPS Hardware 20 Clyde Space EPS has the output voltage buses limited to 3 3V and 5V These buses are non configurable Thus a subsystems needs to have its own converter if it operates at a voltage level other than 3 3V or 5V Also as the buses are not configurable they cannot be switched to lower voltage levels when the subsystems enter low power modes 3 2 CubeSat Kit EPS CubeSat Kit Bus connector 45V EPS Jaa 7 JPS on 5V Current limited i 454 Switch w Protection 5V SYS LDO 5V SYS 5V USB VCC_EPS LDO 3 3V Current limited EX Switch w Protection LP T vcc EPS ON I2C SDA ne La scr MSP430 Isolator L SDA SYS _ SCL SYS 5V_USB vec sys 5V_SYS 5V EPS 4 8V zi A D Converter Lithium f Battery T A Charger i JP1 e Oo so s4 AGND i GND Lithium Battery Charger Figure 9 Architecture of CubeSat Kit EPS 21 CubeSat Kit EPS 12 is a product by Pumpkin Inc They have been designing the kit since 2003 and they have the fourth generation of CubeSat EPS in market CubeSat Kit EPS uses linear voltage regulators to generate voltage rails of 3 3V and 5V along with unregulated battery power rail Use of linear regulators reduces switching noise but reduces the efficiency of the converters Figure 10 Cube
35. Sat Kit EPS Hardware The batteries are charged via USB connector EPS boards can be stacked to increase the output current It has auto resettable current fuse for over current protection The kit provides EPS telemetry via I2C interface It uses iPod batteries and there is no interface with solar cells for charging battery 22 3 3 CubeSat EPS In his work 1 Shailesh Notani gathered requirements and design specifications He proposed a scalable architecture for EPS and modeled the system He explored the use of Rad Hard GaN devices and discussed its use for CubeSat EPS He developed a prototype did some preliminary tests and presented results for both boards Here we discuss about his work and proposed enhancements 3 3 1 Design Specifications The paper 1 gathers specifications for solar panels payloads and various subsystems of CubeSat to design requirements of EPS The EPS prototype does not fulfill to all the requirements as the primary motive is to enable its fast development Due to rapid technological advancements various new systems are being deployed in CubeSats along with new experiments Thus EPS needs to be easily scalable and reconfigurable to accommodate changes in configurations and designs Configuration of solar panels depends on batteries being used in the system which in turn depends on payloads of system Based on the specifications of battery different configurations of solar panels can be designed The t
36. able shows various configurations of solar panels for CubeSat and their power supply capabilities based on Spectrolab s 28 3 efficient ultra triple junction UJT solar cells 23 Table 1 Solar Cell Configurations nane FET Vip Config Total Power Subsystems and payload dictates the power requirements of a CubeSat Batteries are selected in accordance with the power requirements of these subsystems Generally there are two batteries in a CubeSat one being used as backup These batteries are Li based batteries as they are light in weight and compact in size They can be of 3 7V 7 4V 14V 20V or 30V depending on the configuration of CubeSat EPS should be able to charge one battery while supplying power from the other one Thus it should be capable of controlling the power flow in the system Battery Charging Modules should be capable of interfacing with the different solar panel configurations and batteries It should be able to handle voltage levels of 30V FBCM 24 should have battery over charging protection and excess energy should be diverted to point of load converters Point of Load converters should be able to interface with batteries with different specifications It should be capable of taking excess power input from battery charging modules Different voltage rails required by the system should be generated by multiple point of load converters The output voltage of point of load converters should be config
37. al architecture of EPS with the essential blocks of the subsystem Here Flexible Battery Charging Module FBCM derives energy from solar panels and stores it in Li batteries Flexible Digital Point of Load FDPOL Converter 1s responsible to generate a regulated power bus which powers other subsystems and payloads In the absence of battery power point of load converter can extract the power from the solar panels as well The Central Power Controller controls FBCM and FDPOL and runs various health and protection algorithms It communicates with Command and Data Handling CDH Subsystem to receive commands regarding the system It is to be noted that subsystems possess power converters to convert power bus to their power requirements As each subsystem needs to have its own power converter the electrical efficiency of the satellite reduces This helps us to note the requirements of Electrical Power Subsystem e It should be low cost and efficient e t should have multiple point of load converters to generate various power rails to cater power requirements of multiple payloads e t should be flexible to accommodate a variety of specifications and configurations of solar panels as well as the batteries e It should be scalable to cater the needs of IU to 12U CubeSats e It should be reconfigurable to eliminate the need for redesigning the power system for each CubeSat 17 e t should be able to handle various load transients generated b
38. ate and respond to conditions like no power over current etc but it is primarily controlled by Command and Data Handling subsystem The thesis deals with EPS 1n detail 13 2 3 5 Structures STR All subsystems circuits and payloads are safely housed in the CubeSat structure It provides mounts and supports so that all subsystems can be mounted It is responsible to provide protection from the space environment and radiation The structure is the interface between the CubeSat and deployer It can slide on the rails to be easily deployed by the springs mounted on the deployer It has the deployment switches which senses separation from the deployer 2 3 6 Payload PLY Payload consists of experiments proof of concept designs individual tasks like imaging or distributed tasks like weather monitoring With the continued advances in miniaturization and capability increase of electronic technology it is possible for small but complicated tasks like imaging to be accomplished by a system as small as a CubeSat Payload and its application are used to create specifications for all the other subsystems of the satellite 2 3 7 Software The software is divided into two categories The ground station software is responsible to communicate with the satellite and display status of the satellite along with payload experimental data to ground crew Flight software 1s responsible for the control and operations of CubeSat It should support va
39. attacharya for the support and guidance he has provided during my graduate program at North Carolina State University His belief in me and constant encouragement made this Masters program a fruitful experience He has been a source of inspiration in both personal and professional domains I thank my committee Dr Alexander G Dean and Dr Srdjan Lukic for providing valuable feedback and continuous support during this project I thank FREEDM Systems Center for sharing the resources and National Science Foundation for funding this project I thank Avik Juneja Tharunachalam Pindicura and Michael Plautz for working with me to accomplish this project I am grateful to Shailesh Notani for introducing me to Dr Bhattacharya and this project I appreciate the valuable inputs and discussions by my seniors and friends Kamalesh Hatua Arun Kadavelugu Samir Hazra FNU Sachin Madhusudan Hesam Mirzaee Awneesh Tripathi and Sumit Datta at FREEDM Systems Center I extend my gratitude towards the staff members of the center especially Karen Autry and Colleen Reid for the facilities and support I thank Hulgize Kassa for his supervision assuring my safety in the laboratory I would like to thank my friends Chintan Panirwala Nikunj Bhansali Aarohi Patel Milind Kulkarni Komal amp Jayesh Bhambhani Amit Deshmukh Sushant Sinha Prathamesh Save Jaydip Solanki Hemil Jariwala Richa Asarawala Nidhi Pandya Shikhar Singh Bharat Balagopal Bharath Balasub
40. command to the power controller EPS 1s controlled by a micro controller which controls all the converters of FBCM FDPOL senses the state of battery and controls power flow in the system It communicates with other subsystems to know the state of other subsystems and with CDH to accept commands and send status messages It runs algorithms for Maximum Power Point Tracking Over Current protection under voltage protection etc Preliminary tests were carried on the prototype board and test results were reported Shailesh Notani proposed a GUI based interface to debug and test the hardware 1 Development of a test bed was required to enable proper testing of the CubeSat EPS We will discuss hardware implementation of each stage of EPS along with modifications in the next chapter Test bed will be discussed in Section 4 8 followed by the concept of aggressive voltage scaling 27 In his work 1 Shailesh Notani reported the test results of EPC GaN devices on the demo boards 13 and 14 He designed a phase leg circuit using EPC1010 devices and reported its results The phase leg circuit 1s enhanced to handle higher power and a phase leg with gate driver IC LM5113 is developed We will discuss these circuits and their results along with converters using these circuits in CHAPTER 8 28 CHAPTER 4 Hardware Design and Modifications In this chapter we will see the hardware implementation of EPS and discuss each stage in detail
41. d Another board is used to sense the current in each of the converters The implementation on the current sensor board can be accommodated on the prototype board by replacing the existing sensing circuit X di x a h v x e V N f ry s O e Cte gt Figure 16 EPS Board with Current Sensing Board The size of the board is 5 9 x 5 05 The parts count has changed to 500 The same parts and devices have been used in designing all converters to keep the count of different parts low The total number of different parts used is 43 It 1s to be noted that all the parts on the board are placed on the top layer of four layer board Thus it gives a scope to reduce the size of the board by placing components on both the sides The prototype can be interfaced 32 with six solar panels on the input side connector two batteries on the connector and generates four output voltage rails on the output connector It is equipped with two communication interface I2C and RS232 on the respective connectors 4 1 Flexible Battery Charging Module Three Flexible Battery Charging Modules FBCMs are present on EPS prototype board Each module can be interfaced with two strings of solar panels each on opposite face of the CubeSat Only one of the pair of solar panels faces the sun and thus produces more power than the other which is exposed to reflection of solar rays from the earth EPS can be interfaced with all the six
42. deploys them P POD Mk III 7 has the capability to deploy a 3U CubeSat or a combination of 1U and 2U CubeSats sizing up to 3U CubeSats Cal Poly has a CubeSat Acceptance Checklist 5 which needs to be fulfilled for a CubeSat to be deployed by P POD P PODs have been used to deploy all the CubeSats since 2006 Along with the size constraints a CubeSat is required to fulfill vibration standards radiation hardness standards launch procedures and other design requirements like deployment switches and launch pins 2 3 CubeSat Subsystems A CubeSat comprises of following subsystems 8 11 Figure 5 CubeSat Subsystems 2 3 1 Attitude Determination and Control Subsystem ADCS The Attitude Determination and Control Subsystem ADCS 9 keeps the satellite in proper orbit and orientation It consists of a permanent magnet to stabilize the satellite about earth s magnetic field It possesses sensors like magnetometer to determine the satellite s orientation and send it to Control and Data Handling subsystem sun sensors to detect the direction of sun and accelerometers to detect the motion of satellite Actuators like Hysteresis rods providing magnetic damping momentum wheels etc are present in the subsystem to prevent oscillation about the spinning axis and correct the attitude of satellite The subsystem is responsible to point the antenna in an orientation to establish a good communication with the ground station the solar panels
43. devices based phase leg is used to implement buck and boost converters switching at high frequencies near to 1MHz 6 1 3 1 Buck Converter Tek AL Stop M Pos 0000s MEASURE CHI Mean WELT IEN cH _ GATE VOLTAGE Pk Pk FDP LOWER SAW MOSFET me GATE VOLTAGE 125v HOR UPPER CH4 MOSHI Mean CV DUTPUT CH Freq 1 453MHz CHi 100V CH 50v Mo5 ns CH2 7 10V CH3 400V CH4 400V 2f7 Jan 12 0702 1 4337 8MHz Figure 52 Low Power Buck Converter at 1 5MHz 81 M400ns 1 2565 800ps pt s OY Figure 53 High Power Buck Converter at IMHz GaN phase leg is used to implement buck converter and is tested for high and low power domains Figure 52 shows the buck converter implementation switching at 1 5MHz at 50 duty cycle which steps down mean input voltage 9 69V to average output voltage 5 70V at output current of about 200mA Figure 53 shows buck converter implementation switching at IMHz at 50 duty cycle which steps down average input voltage of 118 8V to an average output voltage of 52 94V at output current of about 1A 82 6 1 3 2 Boost Converter Tek al la E Tris d M Pos 360 0ns MEASURE _ 3 CH1 Mean Output Voltage 24 4V CH2 Input Voltage Gate Pulse Output Current Valuex10 mA 4r CH 50 0V CH2 200v M1 00us CHS J 400mV CHS 5 00v CH4 5 0mv 17 May 12 03 29 333 946kHz Figure 54 Low Power Boost Converter at IMHz Tek Ji il Tisd M Pos 360 0ns MEASURE Eo
44. e voltage divider to sense solar panel output voltage Input current and inductor current are sensed respectively by resistors R1 and R2 and are amplified to ADC inputs of the microcontroller Gate terminals of devices are protected by back to back zener diodes rated at 5 4V Capacitors 34 CI and C4 help in protection against ESD Inductor L1 is a ferrite bead used to reduce the input noise The battery charging modules can be connected in parallel to increase the amount of current to charge batteries and to provide current to point of load converters Additional FBCM modules can be connected to the board to scale up the input power of the EPS 4 2 FDPOL Flexible Digital Point of Load converters generate standard voltages on output rails from unregulated battery voltage as input Prototype board has two synchronous buck point of load converters and two synchronous boost point of load converters to generate the output voltage ranges from less than battery voltage to higher than battery voltage Battery voltage can be from 3 2V to 30V and output voltage rails can be of any voltage generally standard voltages like 1 8V 3 3V 5V 6V 9V 12V 15V and 30V These converters can handle maximum current of 3A A Synchronous Buck 5 PHASE POL1 L10 100u 35 FDPOL Circuits gt gt POLI CSP gt gt POL1_CSN R85 0 025 CSRO0805F K2 LOCT ND MSS1048 104ML Q25 D37 5 4V KDZTR5 1BCT ND D38 5 4V KDZTR5 1BCT ND
45. ected by a control loop running at different frequencies If control loop runs at a very high frequency the transient can be detected at a very early stage and can be acted upon to regulate it back to the output voltage A low control frequency allows the transient to drop output voltage to a lower value before it 1s detected and acted upon Thus the frequency at which control loop can be executed depends on the given voltage margin in system specification More tight voltage margin requirements require high control loop frequencies 65 0 7 0 6 7 05 E 2 04 gt 2 0 3 S8 S 0 2 gt 0 1 0 0 5 1 2 4 8 16 32 Control Loop Update Rate kHz Figure 39 Selection of Control loop update rate based on Voltage Margin A servo motor is used to characterize voltage margin against control loop update rate Voltage drop at the transient is measured by varying the control loop update rate for the PID control The impact of changing the PID controller update rate upon the output voltage response to a load transient was evaluated in order to determine the lowest operating voltage Vo possible for a given loop update rate while making sure that load transients do not affect the device s functionality Thus a lower threshold voltage Vi 4 42V was determined for correct servomotor operation The task frequency control loop update rate was then decremented in steps from its highest value of 25 KHz and the corresponding Vo was deter
46. he fly by periodically changing the configuration Figure 45 shows FDPOLs being reconfigured every 1 2s This test shows that any FDPOL can be reconfigured for an optimum system performance 7 2 2 Closed Loop Time S84 68ms Figure 46 FDPOL Closed Loop Control Closed loop control of point of load converters is implemented as PID control The PID control of point of load converters is discussed in detail in Section 5 5 As shown in Figure 46 load transient is handled and voltage is regulated to specified output voltage by the point of load converter 74 CHAPTER 8 High Frequency GaN device based implementation Silicon has been a dominant material for power management since more than 50 years There are advantages of using silicon devices Silicon enabled applications that were not possible by earlier semiconductors It proved to be more reliable and easy to use Silicon devices turned out to be cheaper in cost as compared to other semiconductors EPC was founded in November 2007 as a spin off from IR It is the pioneer in enhancement mode Gallium Nitride on Silicon transistors It produces GaN devices with breakdown voltage from 40V to 200V It makes power transistors using gallium nitride grown on top of silicon 19 GaN has an extra advantage compared with Si and SiC devices as a result of enhanced mobility of electrons in 2DEG Thus a smaller sized GaN device gives a better on resistance and breakdown voltage as seen
47. ild test and operate Its primary purpose was to reduce cost decrease development time and increase number of experimental launches It also aimed to increase collaboration between universities and private companies to build small satellites Satellites can be classified on the basis of their size weight e Large Satellite Wet Mass greater than 1000kg e Medium Sized Satellite Wet Mass between 500 1000kg e Mini Satellite Wet Mass between 100 500kg e Micro Satellite Wet Mass between 10 100kg e Nano Satellite Wet Mass between 1 10kg e Pico Satellite Wet Mass between 0 1 lkg e Femto Satellite Wet Mass less than 100g These definitions are not strict but are general They are sometimes cross referred based on their size and weight This thesis deals with power system design for CubeSats which fall under the category of Pico Satellites and Nano Satellites Figure 1 SMART 1 Swedish Medium Sized Satellite The satellite SMART 1 was a Swedish designed ESA mini satellite weighing 367kg that orbited around the moon for three years after its launch in September 2003 until it was deliberately crashed into the Moon s surface in September 2006 to study the effect of a meteor impact and expose materials in the ground to spectroscopic analysis Figure 2 One mini satellite of RapidEye Constellation RapidEye constellation is an example of distributed tasks mini satellites where a group of 5 identical satellites weighing 150kg each is
48. ing payloads and debris for orbital measurement Aerocube 4A 4B 4C by Aerospace Corporation For technical research Figure 3 AENEAS A 3U CubeSat 3 Five CubeSat were deployed from the International Space Station on October 4 2012 These CubeSats were carried to ISS by a Japanese HTV cargo carrier and they have payloads 4 Morse code communication with the earth using LED optical interface a ham radio transmitter space photography infrared photography and earth observation This demonstration proved the concept of deployment of cubesats from a bigger satellite like International Space Station Looking at the current trends it is seen that the shift to the CubeSat specification for satellite development has increased the frequency of cubesats being deployed More number of missions is being planned as these are low cost and fast to develop missions 2 2 CubeSat Specifications A CubeSat is a 10 cm cubed sized small satellite with maximum mass of 1 33kg These are known as 1U one unit CubeSats They can be scaled in one axis in increments of 1U modules to make 2U CubeSats 20cm x 10cm x 10cm and 3U CubeSats 30cm x 10cm x 10 cm This standard 10cm x 10cm size enables the use of common deployment system thus reducing the cost of development of deployment system 10 Figure 4 P POD Deployer 5 Cal Poly has developed Poly Picosatellite Orbital Deployer P Pod 5 6 which carries the CubeSats into the orbit and
49. k forward to use air core inductors We also plan implementing planar inductors and transformers for power conversion We will look at GaN device based implementations for buck and boost converters 77 8 1 GaN based phase leg with indigenous driver circuit 8 1 1 Circuit J2 i 10A trace 1 TP3 HEADER 1 gt V POWER T P10 1 8191K ND J6 1 5016KCT ND C12 C13 C14 C15 C16 C17 Cii a 0 1uF 2 2uF 2 2uF 47uF 47uF 22uF 22uF 5016KCT ND 99 4387 ND 493 1189 ND 493 1189 ND 493 1180 ND M93 1180 ND 493 1403 ND 493 1403 ND V POWERS 8191K ND E V 3VP 4A gt R17 10k VCC 5V gt RMCF0805JT10KOS T N D29 R9 R10 270 10k 10k R11 1 RMCF0805JT10K0C RMCF0805JT10KOCT ND RHM270ACT ND NC VCC NM 2 GATE_1B gt Anode OP1 VCC_5V R13 2k 541 2 0KVC T ND Cathode OP C33 R7 0 1uF NC1 10k 490 1673 1 ND 10k RMCFO0805JT10K0C T ND 568 6265 1 ND S RMCFQ805JT1 oKSET N 5 v y D4 cc 5v gt 568 6265 1 ND 917 1004 1 ND R8 10k RMCF0805JT 0KOCT ND GATE_1A X IFL Q4 EPC1010 i gi74004 1 ND TEST POINT ur a i 2 RMOFUBOSTTNOKOCT ND HEADER 1 J1 1 1 8191K ND M HOLE1 M HOLE1 3 4 1 1 5016KCT ND MHOLE1 M HOLE1 R19 10pF 10k 709 1168 1 RMCFO0805JT10K0C T ND SDM03U40DIC T ND NC J10 J11 Anode OP1 GATE A gt 1 GATE A A 1 Cathode OP GATE_B GATE B gt NC1 VEE GND SIGNAL gt GND SIGNAL gt b FODST80SDYCTND CON3 CON3 V_3VN_1 B J9 gt gt GATE_1A gt gt gt GATE_1B l
50. mined 66 The minimum value of Vo was determined such that the combined effect of the current transient Alo and the control loop update rate fe restricts the operating voltage to dip below Vin The difference in operating voltage Vo and Vm is given as the voltage margin Vmargin This margin allows us to determine the room for the voltage fluctuation as a result of load current transients The goal is to operate at the slowest update rate such that V margin 18 not exceeded Thus for the servomotor various operating voltages were obtained for different control loop update rates fiask For each of these operating points the corresponding voltage margin was calculated as shown in Figure 39 As the update rate increases the sampling period falls allowing the controller to respond more quickly to the transient and therefore reducing the load voltage variation Alternatively if large voltage variation is acceptable a lower loop update rate can be used freeing up processor time for other computations TT s DSP being used in this system is a high end micro controller with clock frequency of 150 MHz 16 ADC channels floating point execution unit 18 PWM channels etc Considering control task s execution time as 37us and scheduler overhead control loop can be executed at 25 KHz frequency Ability to use a low control loop frequency allows free execution time to be used to execute other tasks and support other micro controllers A low end
51. munication protocols I2C protocol can be configured as required by CubeSat Present on the fly configuration testing is done by RS232 protocol Software is developed in Visual C to communicate with the board over serial interface and provide a GUI to configure EPS stages As shown in the Figure 32 it displays currents and voltages at each stage of EPS and can be used to reset set the voltage at any stage It follows the debug interface protocol defined for EPS to get debug information and send commands 56 5 4 MPPT Algorithm Implementation As CubeSat spins on its axis along with its revolution around the earth the illumination condition on solar panels keeps on varying The Battery Charging Module needs to extract maximum power while the output power of solar panels varies The EPS micro controller runs the Maximum Power Point Tracking algorithm to track peak power point of solar panel V I curve 35 30 asooo I M Eo ee E 20 _ Se u 15 5 UC BINNEN o O 0 0 2 4 6 8 10 Voltage V Figure 33 V I characteristics of Solar Panel 57 Power Curve Voltage V Figure 34 Power Curve for Solar Panel Figure 34 shows the power curve of solar panels by varying the load on the output side under sunlight inside laboratory The solar panels are rated at Vmp of 7 8V and Imp 350mA There are three main types of MPPT algorithms perturb and observe incremental conductance and constant voltage The first two methods are
52. n the state of loads These concepts can be applied to a variety of embedded system power supplies with wide range of power requirements The thesis also reports the use of GaN devices for power converters eGaN devices from EPC rated at 200V 12A are used to develop a prototype board with gate driver circuit for the devices The devices are switched at up to 1 5MHz with the output current of 1A at 50V A prototype board using off the shelf gate drivers 1s also designed to compare its performance with the prototype with indigenous gate driver circuit Copyright 2012 by Shah Mihir Rohit All Rights Reserved Enabling Aggressive Voltage Scaling for Real Time and Embedded System with Inexpensive and Efficient Power Conversion by Mihir Rohit Shah A thesis submitted to the Graduate Faculty of North Carolina State University in partial fulfillment of the requirements for the degree of Master of Science Computer Engineering Raleigh North Carolina 2012 APPROVED BY Dr Subhashish Bhattacharya Chair of Advisory Committee Dr Srdjan Lukic Dr Alexander G Dean DEDICATION TO MY PARENTS RASHMITA SHAH amp ROHIT SHAH MY SISTER SWATI SHAH AND MY FIANCEE NIDHI JOSHI BIOGRAPHY Mihir Shah was born on April 20 1986 in Ahmedabad Gujarat India He did his schooling from Shri C C Shah Sarvajanik English High School Surat He received the degree of Bachelor of Technology in Electronics Engineering from Na
53. nd 5V whereas boost point of load converters to 12V and 15V Initially all switches are turned off to disable power flow on the board The power flow on the board 1s started when the deployment switches separate The control algorithm turns off a converter with input voltage less than specified minimum input voltage This helps to protect boost converters running at very high duty cycles and the gate driver ICs from locking down 5 1 2 Control Loop Present implementation of the control loop is as a part of the interrupt service routine of ADC module whereas the main program idles in an infinite loop after triggering start of conversion for ADC module Initially control loop runs with all the converters in off mode with all switches turned off so that it can stabilize for the first 500 cycles After the stabilization routine FBCMs and FDPOLs are turned on followed by the switches to enable battery charging with MPPT and power supply to the loads At the end of ADC interrupt service routine ISR ADC conversion is started This keeps the control loop running The 51 trigger for the start of ADC conversion can be placed in a timer interrupt service routine to modify the control loop update rate Features for protection against overcharging over current etc conditions are implemented as a part of control loop Under the situation of over current particular stage is shut down and restarted As shown in Figure 30 a few attempts are made t
54. nt Sensing circuit for EPS e Software development board driver and interrupt driven control implementation e Communication and Debug Interface e Plugging PID algorithm in interrupt driver control implementation for point of load converters e MPPT algorithm implementation e Over current and under voltage protection implementation e Enabling the EPS board for Aggressive Voltage Scaling implementation e A part of Aggressive Voltage Scaling implementation e Enhancement and re design of GaN devices based phase leg e Development and testing of buck and boost converters using the phase leg The test bed discussed in Section 4 8 developed by Michael Plautz an MS student under Dr Alexander Dean is used to test the EPS and characterize various loads and their transients The CubeSat EPS board is used to test various implementations RTOS based implementation discussed in Section 5 2 and implementation of PID on RTOS discussed in Section 5 5 are developed by Avik Juneja and are tested on EPS board CHAPTER 2 CubeSat 2 1 Introduction The term CubeSat is used for satellites that adhere to the standards described in CubeSat design specification The program is led by Professor Jordi Puig Suari at California Polytechnic State University San Luis Obispo and Professor Bob Twiggs at Stanford University s Space System Development Laboratory with an aim to design a satellite with capabilities that a graduate student could design bu
55. o improve the controller accuracy and response PID control is employed for designing a stable and fast response controller Ziegler Nichols method 18 is used to obtain initial values for the three proportional gain controls Kp Ki and Kd It is tuned manually to attain a good voltage control with fast response and small steady state error 60 Imax 270mA m Umintll 4 3568 ma z Sgm Mmaxil 5 1 Wminlli 4 BB i E CHiz Shem S mi Time SHA Bus Im Time 38 68mse a b Figure 35 Open loop response of servo motor Tek ds cq Complete M Pos 218 0ms MEASURE CHI Max 5 35 V CH1 Mean 5 3v CH1 Min 4 70 CH2 Min 2 0 00 CH2 Max a 1 074 CH1 500m CH2 400m M 50 0ms CH2 255mv 24 Oct 12 0217 lt 10H2 Figure 36 Closed loop response for interrupt driven implementation Load Servo Motor 61 Time S88 Aus Time S84 68ms a b Figure 37 Closed loop response for RTOS based implementation Load Servo Motor Servo motor is characterized as a sample load to test the point of load converter It is capable of drawing 370mA at 5 1V at maximum speed TestBed controller is used to configure rotation parameters of servo motor rotation direction speed and rest time These parameters can be configured by using the user interface of testbed controller The current drawn by servo motor is measured as voltage drop across a 2 Q resistor in series with the motor Figure 35 sh
56. o restart the power stage before raising a flag depicting a permanent fault This flag can be used to signal DCH regarding the fault Restart attempts continue periodically until a command is received to turn off the module Under the situation of battery under voltage point of load converters are disconnected from the battery to avoid further discharging Battery voltage is continuously monitored so as to look for an attempt to reconnect it to converters Tek TE e Stop Mi Pas 34 00ms MEASURE Mean 12 2V CH2 Fre 1 eq CHS Freq 3 6 006H2 CH4 Max S20 SBP Cee m CH4 Mean ddm CH1 5 00vBy CH2 500v M 25 0ms CH3 2 00V CHS 5 00v CH4 5 00 oct Td 143 37 5kHz Figure 30 FBCM Over Current Situation 52 5 1 3 Debug Interface A debug interface implementation is used to send sensed voltages and currents at all stages of EPS via RS232 protocol This interface runs in the main loop at the lowest priority so that it does not hinder the functionality of critical control loop It is a bi directional interface and can be used to configure EPS externally as discussed in Section 5 3 A light protocol is developed to use the debug interface An enumeration eCommand is transmitted which determines the type of message stage and voltage current This is followed by a space 0x20 character The values are sent as strings followed by a new line 0x0a character as the end of message For example 0x01 0x20 0x49 0x50 0x49 OxOa i
57. ows the open loop response of servo motor The yellow trace is the operating voltage of motor and blue trace shows operating current It is seen that there is a voltage drop of 0 6V on a transient of 270mA over a time of Ims PWM signals are seen as blue trace on the Figure 35 b which shows the response of the motor from its start till the end of motion Initial transient is followed by periodic transients due to the discrete response of the motor to PWM signals A few transients are seen at the end of motion as motor comes to a standstill Testing point of load converter with PID control with servo motor as load it is seen from Figure 37 that the initial transient is acted upon and output voltage is regulated to 62 its original value within Ims The effect of discrete PWM transients is minimized on the output voltage and the transients at the end of motion are also minimized Similar response is seen for the RTOS based implementation of PID control as shown in Figure 37 Thus PID control implementation on point of load converters gives a very good voltage regulation at the output NOTE The PID control and its RTOS based implementation is designed by Avik Juneja as a part of Aggressive Voltage Scaling project to test EPS board 63 CHAPTER 6 Aggressive Voltage Scaling A Satellite is in a limited power availability environment where it is exposed to solar power only for a certain part of orbit and goes into eclipse part for the rest
58. r HWlage and HWly 4 are responsible for collecting the ADC samples and updating the PWM duty cycles respectively The PWM s duty cycle controls the output voltage of the respective voltage domain 54 At the beginning of execution task To collects the ADC samples from various power domains voltages from Buck Boost and Buck Boost and currents from various parts of the board by enabling HWlIa These samples are then used for control calculations and updating the PWM duty cycles of their respective domains by enabling the HWIpwm The HWIs are disabled within their respective ISRs to avoid further interruption until the next occurrence of To This enables us to control the update frequency by controlling the task frequency The control task s execution time was measured to be T 37 us consistently with the MCU running at a clock frequency of 150 MHz This time can be used for real time schedulability analysis such as processor utilization and worst case task response time After adding scheduler overhead and timing resolution the fastest task possible execution frequency was measured to be fiask 25 kHz This task execution time can likely be reduced significantly with code optimization reducing the computational load 55 5 3 Communication and Configuration Design EBR FBCM1 Buck Boost IN Figure 32 Configuration and Debugging Interface As discussed before EPS prototype is equipped with I2C and RS232 com
59. ramanian and Abhinaya Nakka for being my family during the stay at North Carolina State University and making it a joyful journey Finally I would like to thank my parents Rashmita Shah and Rohit Shah and my sister Swati Shah for their care and constant support and my fianc e Nidhi Joshi for her love and patience vi TABLE OF CONTENTS EIST OR FIGURES ciii sodalem a m DER atu RS UD Ead tebud aequ E aq oboe Puts viii LIST OF TABLES 2e tot predecir ee Ca E an ov totum tese datoroteM X CHAPTER ETOCEOQUCLIOTI ii puc aepo tuus uve aua Seeds uae esq on es n ai aetvosta ba ua pas bees deest atu eroe tedtlue 1 CHAPTER Z CUDSSSE tux eaten iU ti tamdiu tese betont E tute uteLa utu nct eu d ER iURE 5 Dicks Ii dgociPodo emt E 5 2 2 CGubeSat SHCCIFICALIONS wien tec b ds ate eu abd e tete etr des baec a aea e Lob ues du bl iu oe ceu 9 2 3 CubDeSdb OUDS YS CIS ceces duce emere deseo reri cuu dor e edos aot dep nos rte e ovn be ec tei Pom sid d tetas 10 2 3 1 Attitude Determination and Control Subsystem ADCS cccccccsessseeceeeeeeseeeeeeeeeees 11 2 3 2 Command and Data Handling CDH Subsystem eese 12 2 3 3 COMMUNICATION COM usscc esses co usbelio detti oosr stata exuta dre lata e eden reso oa boo ce rune als dendi 12 2 3 4 Electrical Power Subsystem EPS 2 ect pico ue EE hada teo puede ANAE 12 2 3 5 SU CCUG S31 SIP casco m ed bo oc tet eum mer EM CUN P sunaeaacseaeaeeenese eoraeseacaatee 13 2 3 6
60. rious modes like communications mode idle mode and power save mode along with handling emergency conditions that arise during the flight All subsystems should communicate smoothly for successful operation of satellite 14 EPS should have algorithms for maximum power point tracking battery health monitoring PID controls and voltage scaling Refer later chapters for further discussion on EPS software 15 2 4 Electrical Power Subsystem The EPS is responsible to generate and distribute electrical energy to various subsystems in CubeSat It interfaces with solar panels to extract solar power which is the only source of energy during operation This is used to charge energy storage devices like batteries or super capacitors The stored energy is used to provide power to various subsystems It runs various algorithms to maintain storage devices in healthy condition protect subsystems under electrical failures extract peak power from PV arrays etc It is directly responsible for efficient power distribution in the satellite Regulated Power Bus Storage Lithium Point Of Load Module Batteries FBCM Communication System Flexible Battery Flexible Digital Charging Module Payload Point of Load DC DC FDPOL GEV Command amp Data Central Digital Power Handling Controller Solar Panel Panels Attitude Determination amp Control System Figure 6 Building blocks of EPS 1 16 Figure 6 shows the gener
61. rol all the converters and switches of EPS EPS has a pluggable micro controller interface which can interface with any micro controller Currently EPS is being tested using Tl s DSP TMS320F28335 It has a hardware floating point unit FPU 256K x 16 Flash memory 34K x 16 SARAM 18 PWM outputs 6 high resolution PWM outputs 16 channels of 12 bit ADC with 80ns conversion rate and other high end features like 2 CAN modules 3 UART modules JT AG support etc It operates at a 44 frequency up to 150MHz We can replace it by a low end micro controller as we will see in the low cost aggressive voltage scaling CHAPTER 6 J2 J3 X INV VI Y INV V INV V FBCM VI X INC V Y INC V Z INC V X CS VI CON16A J4 i j X PWM 1 u X EN Y EN X PWM 2 Z EN POL1 EN Y PWM 1 POL2 E POL3 EN Y PWM 2 POL4 E BATTI SWB_EN Z PWM 1 BATT2 SWB E FBCM SWB EN Z PWM2 ANA1 3 SEL1 ANA1 3 SEL2 POL PWM ANA2 4 SEL1 ANA2 4 SEL2 POL2 PWM SOLAR PWR BATM PWR POL3 PWM POL4 PWM CON20A CON20A Digital Signals J7 J8 1 1 v33 ISO v33 ISO I2C SCL RX ISO I2C SDA TX ISO COM COM4 IZC UART Communication J9 J6 EMUO u a EMU1 TRSTn TMS TDO TCK TDI GND CON8A Power Supply JTAG Figure 27 Micro controller Kit interface circuit 45 Figure 28 Micro controller Kit interface board A general purpose interface board is designed to interface various micro controller kits to the EPS board This board plugs in the EPS in place of TT s DSP daugh
62. s a message for ADCVal00 121 5 2 RTOS based implementation The RTOS based implementation 15 developed by Avik Juneja 1s based on TT s advanced RTOS called SYS BIOS The features include preemptive multitasking synchronization instrumentation hardware abstraction and memory management The software architecture is depicted in Figure 31 NOTE The RTOS based implementation is designed by Avik Juneja as a part of Aggressive Voltage Scaling project to test Real Time software implementation Data ISR ADC ADC hk AO 5R PM Buck Converter 1 Voltage Domains ADC start 1 7 i LT i y Task T n AD Control a ISR PM Buck Convertor Voltage Domains Enable Piha HV 53 L k k ISR FWM BR FWM fuck Convertor Voltage Domains Boost Convertor 1 Voltage Domains Figure 31 RTOS based implementation A single task To 1s responsible for the control of voltage domains in the EPS Within the task there are various functions which control separate voltage domains A single task 1s used to simplify interfacing with the single analog to digital converter ADC The ADC performs sequential conversions using an analog input multiplexer and stores the results in the respective result registers There are two hardware interrupts HW laac and HW pwm which are enabled once each time To runs The interrupt service routines ISRs fo
63. solar panels on a CubeSat The strings of solar arrays are connected to the input of Battery Charging Module through diodes As CubeSat spins and revolves around the earth there is a large variation in the solar illumination of the panels Also there can be various configurations of solar panels connected to the modules Thus the modules should have a wide input range up to 30V Also different batteries 3 2V 30V can be connected to the modules based on the requirements of CubeSat The implementation of Battery Charging Modules is a synchronous buck converter followed by a synchronous boost converter to accommodate wide input and output voltage ranges The module switches to buck converter mode when input voltage is higher than the battery voltage and to boost converter mode when input voltage is lower than the battery voltage 33 gt gt PWR_X FBCM Panel X 1 amp Panel X 2 V gt gt x INP mnm 568 6930 1 ND i gt gt PHASE X 1 gt gt X csP gt X INN PANEL X 1 gt X CSN T R1 TP1 Q1 R2 C1 10u 0 025 5015KCT ND DMN4027SSS 13CT ND L2 0 025 1000p 240 2395 1 ND CSRO805FK25LOCT ND V 100u CSRO805FK28LOCT ND 709 1288 1 ND D11 D12 MSS1048 104ML 5 4V 5 4V ANE X c2 KDZTR5 1BCT ND KDZTR5 1BCT ND 0 1u C3 D2 478 1395 1 N 0 1u C7 C4 568 6530 1 ND 478 1395 1 ND 0 1u R4 1000p 478 1395 1 ND 10 Q2 709 1288 1 ND 20k 541 10 0TC T ND DMN4027SSS 13C T ND uu ir RNCPO0805F TD20KOCT ND T s TP3 on TP2 R5 1000u T POINT 541 1
64. ster ma uU Efe a ndofa uite nod 29 Figure t4 EPS Prototype Board ireen cnenctautnnt ateutecnstantecned ictwencsnuoettevautacncmswiaedsdectaencenueettaleteenceeues 30 Figure 15 Current Sensing Board osse cbe beum E A E 30 Figure 16 EPS Board with Current Sensing Board cccccccccccccscececeeeceeeececeeeeceeeeeeceeeeeeceeeeeeeeeeeeeeees 31 Figure 17 Flexible Battery Charging Module Schematic eeeeeeeeeeeeeeeeeeeeeeee eene 33 Figure 18 Flexible Digital Point of Load Buck Converter Schematic eeeessssss 35 Figure 19 Flexible Digital Point of Load Boost Converter Schematic eeeesssssss 36 Figure 20 Path Selection Feature Schernatie eot estas bett reet e Lr eve s ete t tet uet uade NS 37 Figure 21 Power Failure Recovery Circuit Schematic ueni eu oth rta t atte bebe a ue Deoa Phe eaatesbiacerae 38 Figure 22 Voltage Measurement C TECUIES S T ies eie eee oe ta e ke e eo dere oto Rete don oed des 39 Figure 23 Voltage Meas rement Circuits I e esa ceto p pee Ress ete ety Pe Ee etae e eva teo pape tuae dna saspe 40 Figure 24 Current Sensor Circuit SChemmalie srira siae exeo eee E EE EEE 41 Figure 259 MPPT Circuit Schemat iG soot ere tutu Entre putent voe itum Un nu pU E bebes 42 Figure 26 Micro Controller Interface Sehematte epe teer eoe Ee preteen e tra a eM Rs EUR 43 Figure 27 Micro controller Kit interface CIECUIU eoe ERR Hes sen TE 44 Fig
65. t SGOOD_1 yvcc_5V GATE 1A GATE_1B C20 C21 C22 0 1uF 2 2uF 4 7uF 490 1673 1 ND 445 1420 1 ND 445 1369 1 ND SGOOD 1 WM4203 ND J33 74VHCOOMND i 1 5016KCT ND HEADER 1 Figure 49 Digital and Power Section Schematic for GaN board VCC_SUPPL gt Jm J4 C3 0 1uF U1 RMCFO0805ZTOROOC T ND 4 7uF 490 1673 1 N 1 b 445 1369 1 ND D 12 5 V 3VP 1A 10k C9 RMCF0805JT10KOC T ND 0 1uF 490 1673 1 ND D C1 2 2uF 445 1420 1 ND 445 1 369 1 ND VCC_SUPPL gt m 0 1uF C7 T phr 1 N 4 7uF DCP020503U ND ee gt gt LEG MIDI 2 2uF 6 C10 445 1420 1 ND 4 7uF 0 1uF 445 1369 1 ND R6 490 1673 1 ND 270 RHM270ACT ND J14 5 V_3VN_1A 1 R20 10k RMCFososuTioKocT ND V 9 PT AK LEG MID CONS V 3VN 1A die 1 TP9 5016KCT ND CONS 78 VCC_SUPP J7 C25 C26 RMCE0805ZTOROOCT ND 4 7uF 0 1uF 1 mu 445 1369 1 ND 490 1673 1 ND i V 3VP 1B 10k C31 RMCF0805JT10KOC T ND C23 z ow 2 VCC SUP C29 C30 4 7uF 0 1uF 1 445 1369 1 ND 490 1673 1 ND 0 1uF 490 1673 1 ND D J8 RMCFO0805ZTOROOC T ND C27 0 1uF 490 1673 1 ND ACT ND 2 2uF 445 1420 1 ND gt gt V 3WN 1B R21 10k RMCF0805JT10KO0C T ND 5016KCT ND Figure 50 Isolated power supply circuit for gate driver GaN based phase leg is designed in three sections The Isolated Power Supply section generates 3V and 3V to drive the gate of GaN FETs using IC DCP020503U
66. ter board This board provides connectors for analog signals digital signals communication signals power supply and JTAG interface as shown in Figure 27 As shown in Figure 28 layout for the board is complete except for the mechanical cut out to make it compatible with DIMM 100 pin dimensions 4 8 TestBed Subsystems and Payloads contain mainly digital systems These systems can be micro controllers imaging devices memory devices communication devices etc They generate transients that must be handled by CubeSat EPS to meet the voltage regulation specifications A configurable testbed 1s prepared by Michael Plautz to emulate the load transients and to ensure robustness of EPS and its underlying firmware 15 46 The hardware components chosen are representatives of a wide range of embedded applications The diversity also accounts for a wide spectrum of operating voltages and power requirements At this stage the application hardware is separate from the EPS board The behavior of embedded application is controlled using a different microcontroller than that used on the EPS board It should be noted that the power supply of the testbed 1s provided by the EPS whereas the behavior is embedded in a distinct microcontroller Sample loads include servomotors LCD screens Bluetooth radios etc 15 LCD Screen Push button Switches UART Port RL78 MCU PWM Port Accelerometer TI LIII L R SD Card Reader Potentiometer Wheel
67. there is a condition of no power on satellite the power controller cannot start All converters in the system cannot operate as they receive PWM signals from the controller This results in a deadlock situation as batteries cannot be charged To overcome this situation power failure recovery circuit is implemented PMOS switch Q34 is ON when there is no signal SOLAR PWR from micro controller This switches on non regulated 39 charging of the battery 1 When battery is charged enough to power the micro controller performed by FBCMs controller by micro controller micro controller asserts SOLAR_PWR signal and turns off the switch Battery charging 1s 4 5 Current amp Voltage Measurement D5 568 6530 1 ND PANEL Z 1 ay 1000p 709 1288 1 ND PANEL Z 2 D6 568 6530 1 TP25 T POINT A C31 1000p 709 1288 1 ND TP26 R29 T POINT A 30k RHM30 0KCRC T ND 43k RHM43 0KCRCT ND 5 Z INVI C34 0 01u iik 3k 478 1383 1 ND RMCFO805F T3K ii R76 RMCFO0805FT10KOCT ND R31 43k RHM43 0KCRCT ND gt BATTI VI gt gt SW BATT VI C61 0 01u 10k 478 1383 1 ND C62 R77 RMCFO0805F T10KOCT ND 0 01u 478 1383 1 ND Figure 22 Voltage Measurement Circuits I 40 POL2 OUT gt 43k RHM43 0KCRCT ND 43k RHM43 0KCRCT ND POL1 OUT VI 2 gt POLL OUT gt gt POL2 OUT VI C67 Otu 10k 0 478 1383 1 ND Bios RMCF0805FT10KOCT ND 10k C82 R91 0 01u 478 1383 1 ND
68. tional Institute of Technology Surat India in 2008 He started pursuing his graduate studies in the field of Computer Engineering at North Carolina State University in Spring 2011 He is associated as a student with Future Renewable Electrical Energy Delivery and Management FREEDM Systems Center during his study at North Carolina State University He is engaged in research in application of embedded systems in the field of power electronics His interests span across a wide range of subjects Embedded Systems Digital Design Computer Architecture and Power Electronics Mihir has been an entrepreneur and has developed and marketed products and provided consultancy in the field of embedded systems during his undergraduate program from 2006 to 2008 From 2008 to 2010 he worked as Design and Development Engineer at Tata Elxsi Ltd India He has worked in the field of Digital TV and Multimedia Systems Image Processing Video Analytics and Computer Architecture He has developed Automated Testing Environment ATE for Multimedia Home Platform on Sony Bravia Ground Truth Video Analytics Tool for Canon cameras and benchmarked Intel s SandyBridge Processor against its predecessors From May 2012 he has been working as an Intern in IBM where he is involved in the development of Hardware Acceleration for Internet Scale Messaging and Cloud Computing Servers ACKNOWLEDGEMENTS I express my sincere gratitude and thank my advisor Dr Subhashish Bh
69. towards the sun and the imaging camera towards the earth 12 2 3 2 Command and Data Handling CDH Subsystem The Command and Data Handling CDH system is the brain of the satellite It is responsible to control all other subsystems provide communication with ground station store and process data from sensors and detect and manage faults This subsystem communicates with all other subsystems and maintains their operation along with providing communication interface between subsystems and ground station 2 3 3 Communication COM The Communication COM system is responsible for providing the data link between the Command and Data Handling CDH system and the ground station to communicate control commands as well as receive health and status data through a bi directional full duplex communication system The COM system is made up of three main components the antenna design the terminal node controller TNC and the radio transceiver The communication functionalities like data rate control flow control and standby shutdown are controlled by Command and Data Handling CDH subsystem 2 3 4 Electrical Power Subsystem EPS The Electrical Power Subsystem EPS is responsible to regulate power supply to all subsystems It is interfaced with the solar panels to harness the solar power and with batteries to store the energy This stored energy is used to provide electrical power to other subsystems It possesses the ability to regul
70. urable on the fly Each one should be able to deliver current of 2A It should also provide battery under voltage protection There should be various protection circuits and algorithms implemented in EPS Battery should be protected against over charging and under voltage operations All the stages should have over current protection implemented In case of short circuit faults multiple attempts should be made to determine if the faults are temporary or permanent and proper actions should be taken Command and Data Handling subsystem should be informed of any such faults occurring in the system The software should be able to control all the converters of the system along with provision to change parameters or power flow by the user It should be running multiple algorithms like MPPT battery state of charge and battery state of health etc It should also implement protection algorithms by sensing currents and voltages at each stage of EPS It should be able to communicate with other subsystems over I2C bus 25 Lastly EPS should use components which are least affected by radiation and comply with Rad Hard space requirements It helps to minimize the use of aluminum for shielding and reduce the weight of EPS Maximum weight of EPS should be 200 grams along with batteries It should fit in a cube of 10 cms 3 3 2 Proposed Architecture Multiphase Synchronous Buck Path Selection Converters Point of Load FDPOL 3 3V
71. ure 28 Micro controller Kit interface board seeeeeeeeeeeeeeeeeeeeeeee eene 45 Picts 29 Test Bed csi dedico d Reed E E e mm 46 Fisure 20 EBCM Over Current STOOD aon es d ed tenn ERE Ene EU edited t pe ido dde te adipe eme 51 Figure 2L RTOS based qmple Bie nation sss sender trek utbs en Uu anten abes usto east ae devi ho hee uote n 53 Figure 32 Configuration and Debugging Interface eeeeeeeeeeseeeeeeeeeeee eene 55 Ligure 25 V Leharacteristics of Solar Pane Das ev ihre ERES So he Aber saepe oap M uode hee uet ed un 56 Fieu 4 Power Curve tor Solar Pane Listes vite dones ao ei duobus todo ito M edo sdb Puede desc 57 Ligure 25 Open loop response OF Servo Motor rinteeseen ve ee ver ieri eb Ne em oem idi eb fecu iea 60 Figure 36 Closed loop response for interrupt driven implementation Load Servo Motor 60 Figure 37 Closed loop response for RTOS based implementation Load Servo Motor 61 Figure 38 Figure 39 Figure 40 Figure 41 Figure 42 Figure 43 Figure 44 Figure 45 Figure 46 Figure 47 Figure 48 Figure 49 Figure 50 Figure 51 Figure 52 Figure 53 Figure 54 Figure 55 Figure 56 Figure 57 Figure 58 Response time based on control loop frequency esee 64 Selection of Control loop update rate based on Voltage Margin ssse 65 DBCNE BOOSUMIOGG 2i eoiceib necatta ha eiie a S 68
72. y subsystems switching to low power modes and high power modes 18 CHAPTER 3 Previous Work The work done in development of CubeSat EPS by Shailesh Notani is reported in his thesis 1 First we will look at a few very well known EPS providers and their architectures followed by a discussion of the work by Shailesh Notani 3 1 Clyde Space EPS _ TELEMETRY BCR6 only on CS XUEPS2 42 Figure 7 Architecture of Clyde Space EPS 10 19 Clyde Space is the world leading supplier of power system components for CubeSats They have been designing manufacturing testing and supplying power system electronics solar panels and batteries for space programmes since 2006 Figure 7 shows architecture of the second generation of Clyde Space CubeSat Electronic Power System 10 11 It connects to solar panels via Battery Charge Regulators Each BCR can be connected in parallel to two solar panels on the opposite faces of the Cubesat The BCRs have in built Maximum Power Point Tracker MPPT to track the panel which is directly illuminated and track its maximum power point This energy from solar panel 1s used to charge batteries or provide power to distribution modules via a switched network The output of the distribution modules is an unregulated Battery Voltage Bus a regulated 5V supply Bus and a regulated 3 3V supply Bus Protections features like Over Current Bus Protection and Battery Under Voltage Protection are implemented E

Enabling Aggressive Voltage Scaling for Real-Time

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