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Single Board PC User Manual

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2. 2 ON BOARD BATTERY d iiiter eter orbe 2 RELATED PUBLICATIONS uuu aguas hai uq 3 TRADEMARKS nito ted e E OR Uere C He EO o o RR 3 4 ON EER VIEW ATH 4 BOARD LEVEL FEATURES ien CODE 5 CPUs T 5 PROCESSOR UPGRADE 5 ient e ciebat iere 6 SECOND LEVEL CACHE t end 6 SYSTEM MEMORY see tesi e pr tes ages 6 BUS EXPANSION SLOTS eese I ene e Ln ei le 7 ELECTROMAGNETIC seen 7 SPECIFICATION ps 9 HARDWARE DESCRIPTION 10 CHIPSET 5 RR 10 82439HX XCELERATED CONTROLLER TXC 10 IDE XCELERATOR 11 UNIVERSAL SERIAL BUS USB 11 I O CONTROLLER roten 12 IDE SUPPORT 12 SMC 37C932 SUPER I O 13 FLOPPY CONTROLLER eee ettet e o teret xb ete e 13 KEYBOARD INTERFACE ie eite beers tereti sies 14 REAL TIME CLOCK CMOS RAM AND 14 CHIPS amp TECHNOLOGY GRAPHICS eee 15 DISPLAY CAPABILITIES
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4. diee ee E 15 STANDARD VIDEO MODES isni aiae r ei 16 EXTENDED VIDEO 17 HIGH REFRESH VIDEO 8 2 9 17 FLAT PANEL EXTENDED VIDEO 8 22 18 BIOS EE 19 SYSTEM SETUP UTILITY iie ett metet rti eni tents 19 PCI SUPPOR vu apes enitn eR A 19 Blue Chip Technology Ltd 127 191 doc CONTENTS ISA PLUG AND PLAY iani enero 19 AUTO CONFIGURATION CAPABILITIES seen 20 ADVANCED POWER MANAGEMENT eene 20 SLEEP MODE eite tie eee te tvi te eene Lo con 21 SECURITY FEATURES erre 21 VIDEO BIOS Re EDI ED EE EHE ERR 22 CONNECTING AN LCD TO SOLO ete rere 22 BACK PANEL 8 25 ON BOARD CONNECTORS 2 25 BUS CONNECTORS irissen iie fied eae eed ee edi e tree d tates 26 JUMPERS Hiss 27 CPU FREQUENCY SELECTION 75 27 ON BOARD VIDEO JO e pee UE EMI e 28 CMOS BATTERY SOURCE CLEAR CMOS Jl 29 TABLE OF JUMPERS sid teet 30 STATUS 32 USER INSTALLABLE 5 33 SYSTEM MEMORY et eire editae reet ee 33 REAL TIME CLOCK BATTERY 22 34 CPU UPGRADE sii tia gr Ree ei ee Ie
5. 2525 00900000000000009000 o90090090000000000900000 P t e e Le m e 25 KEY cee ZI cn m RST E o mete A JE 2 0 2 CPU 2a 2o 258 e 49 2 0 E tum cU e 5 Juse 3 5 2 Enid e 2 BIS HO ha eo lt DC o e ejsm Bc us fa e 2 DC J4 FUNCTION J5 FUNCTION eot Ht B FREQ A B MULTI DC l l l l ey se BE pc Mu nnm unm 2 25 o e e e _ A P 222 5 o BATTERY ES ege 3V BUTTON CELL heh te rcr o 1 ops e a Boe _ I CONT o AZ Hoo Bee aver oF a 4 1 1 1 1 o o F2 5v 996 Gub 2 VOLUME 11 Je ol QUON ax P Bo e er H1 oo ee PB AUDIO pm 2 e e ES1868 e gle e 12 oo oo gt o ojo o T 8331
6. 2C 2 3 34 3 38 29 3A 1 40 4 43 Page 78 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 79 CODE DESCRIPTION HEX the total system memory size for writing patterns to test memory base 640k memory below 1M memory of memory above 1M memory 4B Amount of memory above 1M found and verified Check for soft reset and going to clear memory below 1M for soft reset If power on go to check point 4Eh Memory below 1M cleared SOFT RESET Going to clear memory above 1M Memory above 1M cleared SOFT RESET Going to save the memory size Goto check point 52h 4 Memory test started SOFT RESET About to display the first 64k memory size Memory size display started This will be updated during memory test Going for sequential and random memory test Memory testing initialisation below 1M complete Going to adjust displayed memory size for relocation shadow 1M to follow information in real mode Shutdown successful CPU in real mode Going to disable gate 20 line and disable parity NMI A20 address line parity NMI disable successful Going to adjust memory size depending on relocation shadow message DMA and interrupt controller test DMA page register test passed To do DMA 1 base register test 4 F 50 51 52 53 54 DMA unit 1 2 programming over To Initialize 8259 interr
7. 34 40 50 60 72 75 7 fe eS 1 Flat panels cannot support Interlaced modes All modes are Non Interlaced The default panel size is 640x480 2 The Flat panel clock value clock value shown is for a 640x480 DD panel It may require different clock values for different Flat panel resolutions 3 VESA Modes are no linear modes Linear Addressing is disabled Page 18 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 19 Bios The SOLO single board PC uses an AMI System BIOS and an C amp T Video BIOS both of which are stored in EPROM In addition to the System and Video BIOSes the EPROM also contains the Setup utility Power On Self Tests POST and the PCI auto configuration utility This single board PC supports system BIOS shadowing allowing the BIOS to execute from 64 bit on board write protected DRAM The BIOS displays a sign on message during POST identifying the type of BIOS and a revision code SYSTEM SETUP UTILITY The ROM based Setup utility allows the configuration to be modified without opening the system for most basic changes The Setup utility is accessible only during the Power On Self Test POST by pressing the lt DEL gt key after the POST memory test has started and before boot begins A prompt may be enabled that informs users to press the lt DEL gt key to access Setup PCI SUPPORT The AMI BIOS supports Version 2 0 of the PCI BIOS specification
8. Blue Chip Technology Ltd 127 191 doc Page 13 14 USER GUIDE SOLO USER MANUAL KEYBOARD INTERFACE PS 2 keyboard mouse connectors are located on the back panel side of the single board PC A field exchangeable fuse protects the 5V lines to these connectors Care must be taken to turn off the system power before installing or removing a keyboard or mouse otherwise the fuse may rupture and result in a return to base repair The integrated 8042 microcontroller contains the AMI Megakey keyboard mouse controller code which besides providing traditional keyboard and mouse control functions supports Power On Reset POR password protection The POR password can be defined by the user in the Setup program The keyboard controller also provides the facility for a lt CTRL gt lt ALT gt lt DEL gt hot key sequence to perform a system software reset It performs this by jumping to the beginning of the BIOS code and running the POST operation REAL TIME CLOCK CMOS RAM AND BATTERY The integrated Real Time Clock RTC is DS1287 and MC146818 compatible and provides a time of day clock 100 year calendar with alarm features The RTC can be set via the BIOS SETUP program The RTC also supports 242 bytes of battery backed CMOS RAM in two banks which is reserved for BIOS use The CMOS RAM can be set to specific values or cleared to the system default values using the BIOS SETUP program Also the CMOS RAM values can be cleared to the system d
9. Enabled GLOBAL TRITON 2 ENABLE This option controls the enhanced functions of the Intel Triton chipset The settings are Enabled or Disabled The default and fail safe settings are Enabled MEMORY HOLE Use this option to specify an area in memory that cannot be addressed on the ISA bus The settings are Disabled 512 640K or 15 16 The default setting is Disabled Page 46 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 47 DRAM TIMINGS Specify the RAS access speed of the SIMMs installed in SOLO as system memory The settings 60nS 7015 and Manual The default is 70nS Caution If you have installed SIMMs with different speeds in SOLO select the speed of the slowest SIMM You must always use SIMMs that have the same speed IRQ12 M MOUSE FUNCTION Set this option to Enabled to specify that IRQ12 will be used for the mouse The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Enabled 8 BIT RECOVERY TIME SYSCLK This option specifies the length of the delay in units of SYSCLKs inserted between consecutive 8 bit I O operations The settings are 1 2 3 4 5 6 7 or 8 the Optimal and Fail Safe default settings are 8 16 BIT RECOVERY TIME SYSCLK This option specifies the length of the delay in SYSCLKs inserted between consecutive 16 bit I O operations The settings are 1 2 3 4 5 6 7 or 8 The Optimal and Fail Safe de
10. Support is also provided for Version 1 0 of the PCI bridge specification PCI to PCMCIA bridging can also be supported using third party expansion cards ISA PLUG AND PLAY The AMI BIOS incorporates ISA Plug and Play capabilities as defined by the Plug and Play Release 1 0A specification Plug and Play BIOS Version 1 0A ESCD Version 1 02 This allows auto configuration of Plug and Play ISA cards and resource management for non Plug and Play or legacy ISA cards when used in conjunction with Plug and Play aware operating systems such as Windows 95 Blue Chip Technology Ltd 127 191 doc Page 19 PAGE 20 USER GUIDE SOLO USER MANUAL AUTO CONFIGURATION CAPABILITIES The auto configuration utility operates in conjunction with the system Setup utility to allow the insertion and removal of PCI and ISA Plug and Play cards to the system without user intervention Plug amp Play When the system is turned on after adding a PCI or ISA Plug and Play card the BIOS automatically configures interrupts DMA channels I O space and memory space user does not have to configure jumpers or worry about potential resource conflicts Because PCI and ISA Plug and Play cards use the same interrupt resources as ISA cards the user can specify the interrupts used by ISA add in cards in the Setup utility If using Windows 95 the auto configuration utility only initialises the devices required to boot up Windows 95 initialises all the other
11. FF00 FF07 PCI Config Data Reg only accessible by DWORD accesses Page 60 127 191 doc Ultra I O configuration registers Edge Level INTR Control Reg PCI Config Address Reg OCF9 Turbo amp Reset control Reg Primary IDE Channel Gameport Joystick Parallel Port 2 Serial Port 4 Serial Port 2 Parallel Port 1 C amp T65545 8 Parallel Port 3 C amp T65545 8 Serial Port 3 Floppy Channel 1 Pri IDE Chan Cmnd Port Floppy Chan 1 Cmd Floppy Disk Chg Chan 1 Pri IDE Chan Status Port Serial Port 1 ECP regs LPT base 400h tary Bus MasterlDE regs 2ary Bus Master IDE regs IDE Bus Master Reg Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 61 PCI CONFIGURATION SPACE MAP The Triton chipset uses Configuration Mechanism 1 to access the PCI configuration space The PCI Configuration Address register is a 32 bit I O register located at OCF8h the PCI Configuration Data register is a 32 bit T O register located at OCFCh The PCI Configuration Address register is only accessible by a DWORD access the PCI Configuration Data register is accessible DWORD WORD or BYTE accesses ACCESS TO CONFIGURATION SPACE USING MECHANISM 1 1 Using a DWORD write command output the required I O configuration address to I O port CF8H 2 Using a DWORD read or write command read or write data from the port CFCH NOTE Any address output to CF8H is always on a 4 byte DWORD boundary You can read or wr
12. Host hub controller ntegrated fast IDE interface Support for up to four devices PIO Mode 4 transfers up to 16 MB sec Integrated 8 x 32 bit buffer for bus master PCI IDE burst transfers Bus master mode PCI 2 1 compliant Enhanced fast DMA controller nterrupt controller and steering Counters timers e SMI interrupt logic and timer with fast on off mode UNIVERSAL SERIAL Bus USB The SOLO single board PC features two USB ports as a factory installed option The ports permit the direct connection of two USB peripherals without an external hub If more devices are required an external hub can be connected to either of the built in ports The motherboard fully supports the standard universal host controller interface UHCI and uses standard software drivers that are UHCI compatible Blue Chip Technology Ltd 127 191 doc Page 11 12 USER GUIDE SOLO USER MANUAL Features of the USB include Self identifying hot pluggable peripherals e Automatic mapping of function to driver and configuration e Support for isochronous and asynchronous transfer types over the same set of wires Support for up to 127 physical devices Guaranteed bandwidth and low latencies appropriate for telephony audio and other applications e Error handling and fault recovery mechanisms built into protocol NOTE Computer systems that have an unshielded cable attached to the USB port might not meet FCC Class
13. PAGE 86 BOARD LAYOUT ERROR MESSAGES B EHoooooooooooooooo0o0 ooooocoooooooooooooc LT LT SE e Eoeoooooooooo0o0000900 ooooooooooooo000000 na a eqae000000000000000 Hoo Ta E eocooooooocoo0oo0oo000080 000000000000000000 5 00 NORM
14. option to the ISA EISA setting Onboard I O is configurable by AMIBIOS The DMA channels used by onboard I O are configured as PCI PnP Page 52 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 53 The provisional default settings are OPTIMAL FAILSAFE Channel 0 PnP PnP Channel 1 PnP PnP Channel 3 ISA EISA ISA EISA Channel 5 PnP PnP Channel 6 PnP PnP Channel 7 PnP PnP IRQ 3 4 5 7 9 10 11 14 15 These options specify the bus that the named interrupt request lines IRQs are used on These options allow you to specify IRQs for use by legacy ISA adapter cards These options determine if AMIBIOS should remove an IRQ from the pool of available IRQs passed to BIOS configurable devices The available IRQ pool is determined by reading the ESCD If more IRQs must be removed from the pool the end user can use these PCI PnP Setup options to remove the IRQ by assigning the option to the ISA EISA setting Onboard I O is configurable by AMIBIOS The IRQs used by onboard I O are configured as PCI PnP The provisional optimal and fail safe settings are OPTIMAL FAILSAFE IRQ3 ISA EISA ISA EISA IRQ 4 ISA EISA ISA EISA 5 PnP PnP IRQ7 ISA EISA 5 5 IRQ 9 PnP PnP IRQ 10 PnP PnP IRQ 11 PnP PnP IRQ 14 PnP PnP 15 PnP PnP Blue Chip Technology Ltd 127 191 doc Page 53 PAGE 54 ERROR MESSAGES SOLO USER MANUAL RESERVED MEMORY SIZE This option specifies the size of th
15. 34 GRAPHICS MEMORY UPGRADE sees 34 SOFTWARE DESCRIPTION 35 BIOS SETUP PROVISIONAL enrio n eene rennen 35 OVERVIEW OF THE SETUP MENU SCREENS 75 rrr 35 MAIN SCREEN see iie eti leche bae e dece e eere 35 OVERVIEW OF THE SETUP KEYS aa aaa aa tayna css 38 STANDARD teret e yobs etie tese eire Eee eee 39 ADVANCED SYSTEM SETUP 41 ADVANCED CHIPSET SETUP ee itii terne poe 46 POWER MANAGEMENT 48 PCI PNP SETUP isse eerta ERE Pb ree esie hens 51 PERIPHERAL SETUP 5 pex en 55 SOLID STATE DISK 02 2 2222 2 58 ADDRESS M ADBS eene ere prO eer ris 59 MEMORY MAP eU intr b ipi a 59 amu Uie eain 59 PCI CONFIGURATION SPACE sees eene 61 INTERRUPTS amp DMA 8 2 63 CONNECTORS 64 BACK PANEL CONNECTORS 64 127 191 doc Blue Chip Technology Ltd CONTENTS ECP EPP PARALLEL PORT P18 26 WAY 64 ETHERNET UTP CONNECTOR P22 8 WAY RJAS 66 INTERNAL IQ HEADERS 66 FLOPPY DISK DRIVE CONNECTOR P12 34 WAY HEADER 68 POWER CONNECTOR P4 34 WAY HEADER eee 69 BATTERY CONNECTOR 4 WAY 2 2 71 BUS CONNECTORS edoc
16. Device Disabled S M A R T HARD DRIVES This option allows the selection of SMART drive technology for the attached hard disks The Options are Enabled or Disabled The default is Disabled BOOT CPU SPEED Allows the system s boot speed to be set The options are Low and High The optimal setting is High the fail safe is Low If High is selected boot up occurs at full speed If Low 15 selected the board operates at a slower speed approximately equivalent to 25 MHz PC AT BOOT UP NUM LOCK Allows you to set the start up state of Num Lock on your keyboard The options are and Off The default is On FLOPPY DRIVE SWAP Set this option to Enabled to permit the BIOS to swap drives A and B The available options are Enabled and Disabled The default setting is disabled Page 42 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 43 FLOPPY DRIVE SEEK Set this option to specify floppy drive A will perform a seek operation on system boot are Enabled and Disabled The default setting is disabled MOUSE SUPPORT When this option is enabled the BIOS will support a PS 2 style mouse The options are Enabled and Disabled The default setting is enabled SYSTEM KEYBOARD This option specifies that a keyboard is attached to the computer The settings are Present or Absent The Optimal and Fail Safe default settings are Pre
17. Dual floppy interface EPP ECP bi directional parallel interface 4 on board RS232 powered serial ports One port selectable as RS422 485 Real time clock with on board battery PS 2 mouse and keyboard connectors Optional on board Solid State Disk Flash and SRAM Optional security microcontroller providing power monitoring and reset control or magstripe and Dallas Touchkey interfaces On board status LEDs Drive for up to 3 ISA or 3 PC 104 cards The SOLO single board PC is designed to operate with Pentium Processors running at 3 3 3 45 or 3 6 Volts An on board voltage regulator circuit provides the required voltage for the processor from the 5 volt output of a standard PC power supply On board jumpers enable the use of VRT specified processors Pentium processors which run internally at 75 90 100 120 133 150 166 180 and 200 MHz are supported Blue Chip Technology Ltd 127 191 doc Page 5 PAGE 6 USER GUIDE SOLO USER MANUAL The Pentium processor maintains full backward compatibility with the 8086 80286 1386 and Intel486 processors It supports both read and write burst mode bus cycles and includes separate 8 KB on chip code and 8 KB data caches which employ a write back policy Also integrated into the Pentium processor is an advanced numeric co processor which significantly increases the speed of floating point operations whilst maintaining backward compatibility with Intel486 math co processor and complying to ANSI IE
18. GreenPC feature Make BIOS code segment writeable To do any setup before Int vector init Interrupt vector initialisation about to begin To clear password if necessary Any initialisation before setting video mode to be done Going for monochrome mode and colour mode setting Different BUSes init system static output devices to start if present To give control for any setup required before optional video ROM check To look for optional video ROM and give control To give control to do any processing after video ROM returns control If EGA VGA not found then do display memory R W test EGA VGA not found Display memory R W test about to begin Display memory R W test passed About to look for the retrace checking Display memory R W test or retrace checking failed To do alternate Display memory R W test Alternate Display memory R W test passed To look for the alternate display retrace checking Video display checking over Display mode to be set next Display mode set Going to display the power on message Different BUSes init input IPL general devices to start if present Display different BUSes initialisation error messages New cursor position read and saved To display the Hit DEL message To prepare the descriptor tables To enter in virtual mode for memory test To enable interrupts for diagnostics mode N 10 i L 9 24 25 2 28 n ml B
19. The settings are Auto 3F8h 3E8h 2F8h 2E8h or Disabled The default setting is Auto ONBOARD PARALLEL PORT This option enables the parallel port on the board and specifies the parallel port based I O port address The settings are Auto 378h 278h 3BCh or Disabled The default setting is Auto PARALLEL PORT MODE This option specifies the parallel port mode ECP and EPP are both bi directional data transfer schemes that adhere to the IEEE P1284 specifications The settings are Blue Chip Technology Ltd 127 191 doc Page 55 PAGE 56 ERROR MESSAGES SOLO USER MANUAL SETTING DESCRIPTION The normal parallel port mode is used This is the default setting Use this setting to support bi directional transfers on the parallel port EPP The parallel port can be used with devices that adhere to the Enhanced Parallel Port EPP specification EPP uses the existing parallel port signals to provide asymmetric bi directional data transfer driven by the host device The parallel port can be used with devices that adhere to the Extended Capabilities Port ECP specification ECP uses the DMA protocol to achieve transfer rates of approximately 2 5Mbs ECP provides symmetric bi directional communications PARALLEL PORT IRQ Selects which IRQ is assigned to the parallel port Available options are Auto 5 or 7 The default is Auto PARALLEL PORT DMA This option is only available if the setting for the Parallel Port Mode option i
20. a supervisor password has been set CHANGE SUPERVISOR PASSWORD Allows the password for the supervisor level options to be changed Page 36 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 37 AUTO CONFIGURATION WITH OPTIMAL SETTINGS Resets the CMOS setup options to a high performance configuration The optimal default settings are best case values and should optimise the system performance If CMOS RAM is corrupted the optimal settings are loaded automatically AUTO CONFIGURATION WITH FAIL SAFE SETTINGS Resets the CMOS setup options to a lower performance but guaranteed working configuration The fail safe settings provide far from optimal system performance but are the most stable settings Use these settings as an diagnostics aid if the system is performing erratically SAVE SETTINGS AND EXIT When selected this allows you to save the change to CMOS and exit the Setup program You can also press the lt F10 gt key anywhere in the Setup program to do this EXIT WITHOUT SAVING When selected this allows you to exit the Setup program without saving any changes This means that any changes made while in the Setup program will be discarded and NOT SAVED Pressing the lt Esc gt key in any of the four main screens will do this Blue Chip Technology Ltd 127 191 doc Page 37 PAGE 38 ERROR MESSAGES SOLO USER MANUAL OVERVIEW OF THE SETUP KEYS SETUP KEY DESCRIPTION lt 1 gt Pressing the lt
21. always be Oh for DWORD access 1111 The table below lists the PCI bus and device numbers used by the single board PC It also lists the data range that must be written to the I O Configuration Address register to access the device DEVICE BUS DEVICE ID CONFIG ADDRESS FUNCTION SEL REGISTER 00 00 0 8000 0000 8000 00 07 0 8000 3800 8000 38 PIIIX IDE BUS 00 07 1 N A 8000 3900 8000 39FC MASTER C amp T65545 8 00 08 0 AD18 8000 4000 8000 40FC RTL8029 AS Ethernet 00 09 0 AD19 8000 4100 8000 41FC Page 62 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 63 INTERRUPTS amp DMA CHANNELS The following tables list the Interrupt and DMA Channel configuration options for on board devices The serial ports parallel ports and IDE controller can be configured using SETUP or any other Plug and Play resource manager such as the Windows 95 Device Manager The Graphics interrupt is assigned by the auto configure utility during boot up PT ES INTERRUPTS Interval Timer from slave PIC 6 Floppy Controller M Saige Micro if if present sl RESERVED Blue Chip Technology Ltd 127 191 doc Page 63 PAGE 64 CONNECTORS BACK PANEL CONNECTORS The back panel houses the following connect ERROR MESSAGES SOLO USER MANUAL Ors VIDEO CONNECTOR P18 15 WAY CONDENSED D TYPE Analogue RED Analogue GREEN Analogue
22. customisation and specialised system integration service is also available delivering innovative solutions to customers problems The company s success and reputation in this area has led to a number of large design and manufacturing projects for companies such as BNFL Aston Martin JaguarSport and British Gas British Standards Institute approval BS EN 9001 means that all of Blue Chip Technology s design and manufacturing procedures are strictly controlled ensuring the highest levels of quality reliability and performance Blue Chip Technology are also committed to the single European market and continue to invest in the latest technology and skills to provide high performance computer and electronic solutions for a world wide customer base 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL INTRODUCTION PAGE 1 INTRODUCTION MANUAL OBJECTIVES This manual describes in detail the Blue Chip Technology SOLO Single Board processor card We have tried to include as much information as possible but we have not duplicated information that is provided in the standard IBM Technical References unless it proved to be necessary to aid in the understanding of the SOLO The manual is sectioned and includes a User Guide which will help the non technical user to get the unit up and running A Troubleshooting Guide is also included to help when things go wrong We strongly recommend that you study this manual carefully before attempting
23. for further details POWER CONNECTOR P4 34 WAY HEADER PINNe SIGNAL 6 Ground 8 gru a s d Blue Chip Technology Ltd 127 191 doc Page 69 PAGE 70 ERROR MESSAGES SOLO USER MANUAL Note 1 This signal is normally used as POWER GOOD from the PSU On Solo this pin has been reserved for 24V connection which is re routed to a link selectable output on the serial ports It is required by some customers for powering external devices via the serial port The link options for these ports are 24V 12V 5V all fused at 2A or RI Ring Indicator If this option is not required then either leave the power pin on P4 disconnected or connect the POWER GOOD signal from the PSU as per the standard PC PSU and set the serial port jumpers to RI The RI signal will then appear on pin 9 of the COM port D type connectors UTILITY CONNECTOR P16 20 WAY HEADER PIN Ne SIGNAL SIGNAL 1 Audiowve 2 Audio ve 3 Reset ve 4 Resetve Groud 5 Watchdog LED ve 6 WatchdogLED ve eves 9 PowerLED ve 10 Power LED ve Ground External SMI External SMI ve Ground IDE LED ve IDE LED ve 5V fused 0 Volts Ground External 3 6 Volt 0 Volts Battery Ground Batter Keyboard Data Keyboard Clock COAST CACHE CONNECTOR This is an industry standard connector for Cache On A Stick The COAST connector is a 160 pin socket which i
24. in the UTILS header a keyboard hot key sequence or by a time out of the system inactivity timer Both the keyboard hot key and the inactivity timer are programmable in the BIOS setup timer is set to 10 minutes by default To re activate the system or Resume the user simply uses the keyboard or mouse or presses the sleep switch Note that mouse activity will only wake up the system if a mouse driver is loaded While the system is in Stand By or Sleep mode it is fully capable of responding to and servicing external interrupts even though the monitor will only turn on if a user interrupt occurs as mentioned above SECURITY FEATURES SUPERVISOR PASSWORD If enabled the supervisor password protects all sensitive Setup options from being changed by a user unless the password is entered see appendix If the password is forgotten it may be cleared by turning off the system and clearing the CMOS RAM USER PASSWORD The User Password feature provides access to all setup options that do not require the supervisor password The User Password feature also provides security during the boot process The User Password can be enabled using the Setup utility At boot up the system will complete the operating system boot up process but keyboard and mouse operation will be locked until the User Password is entered See the Security Menu section of the appendix for more details If the password is forgotten it can be cleared
25. to interface with SOLO or change the standard configurations Whilst all the necessary information is available in this manual we would recommend that unless you are confident you contact your supplier for guidance Please be aware that it is possible to create configurations within the CMOS RAM that make booting impossible If this should happen clear the CMOS settings see the description of the Jumper Settings for details If you have any suggestions or find any errors concerning this manual and want to inform us of these please contact our Customer Support department with the relevant details LIMITATIONS OF LIABILITY In no event shall Blue Chip Technology be held liable for any loss expenses or damages of any kind whatsoever whether direct indirect incidental or consequential arising from the design or use of this product or the support materials supplied with this product If this product proves to be defective Blue Chip Technology is only obliged to replace or refund the purchase price at Blue Chip Technology s discretion according to their Terms and Conditions of Sale Blue Chip Technology Ltd 127 191 doc Page 1 PAGE 2 INTRODUCTION SOLO USER MANUAL PRECAUTIONS It is imperative that precautions are taken to avoid electro static discharges or any maltreatment of the on board battery ELECTRO STATIC DISCHARGES The devices on this card can be totally destroyed by static electricity Ensure that you take necessary
26. 1 43 640 480 24bit linear 51 6 16 16 70 16 72 75 16 16 16 16 256 256 256 56 A 76 1280x1024 355 43 70 7 43 Note I denotes interlaced display mode N 40 41 50 78 79 E 46 16 1 45 7 46 72 75 Plana 16 128x48 1024x768 43 16 16 56 256 256 HIGH REFRESH VIDEO MODES MODE DISPLAY COLOURS TEXT PIXEL V HEX MODE DISPLAY RES FREQ HZ 80x30 640x480 Blue Chip Technology Ltd 127 191 doc Page 17 PAGE 18 USER GUIDE SOLO USER MANUAL FLAT PANEL EXTENDED VIDEO MODES MODE MODE RES CLOCK inear Packed Pixel 16 640x480 25 MHz 800600 25 MHz 1024x768 25 1280x1024 25 MHz 640480 25 MHz E j inear Packed Pixel near Packed Pixel 1 dc inear Packed Pixel 256 i ix 25 rS ro N r near Packed Pixel near Packed Pixel inear Packed Pixel r 16 16 256 256 256 25 MHz 25 MHz inear Packed Pixel 110 50 MHz 50 MHz 65 MHz 16 132 25 25MHz 16 132x50 25MHz 16 102 16 16 256 256 56 RICO S 46 46 64 70 16 102 800x600 25 MHz 72 75 Planr 16 104 1024768 25 MHz 16 256 256 76 25 MHz 79 25 MHz 25 MHz 25 MHz 2 2 24 28 30 32
27. 30 PCISet data sheet SMC 37C932 SUPER I O CONTROLLER Control for the integrated serial ports parallel port floppy drive RTC and keyboard controller is incorporated into a single component the SMC 37 932 This component provides Two powered NS16C550 compatible UARTs with send receive 16 byte FIFO Multi mode bi directional parallel port Standard mode IBM and Centronics compatible Enhanced Parallel Port EPP with BIOS Driver support High Speed mode Extended Capabilities Port ECP compatible Industry standard floppy controller with 16 byte data FIFO 2 88 MB floppy support Integrated Real Time Clock Integrated 8042 compatible keyboard controller The 37C932 is normally configured by the BIOS automatically however configuration of these interfaces is possible via the CMOS Setup program that can be invoked during boot up The serial ports can be enabled as COM1 2 or disabled The parallel port can be configured as normal extended EPP ECP or disabled The floppy interface is configurable Header connectors located near the top of the board allow cabling to use these interfaces FLOPPY CONTROLLER The 37C932 is software compatible with the DP8473 and 82077 floppy disk controllers The floppy interface can be configured for 360 KB or 1 2 MB 54 media for 720 KB 1 44 MB or 2 88 MB 3 media in the BIOS setup By default the Floppy A interface is configured for 1 44 MB and Floppy B is disabled
28. 4 PC AT CONNECTOR P9 40 WAY SOCKET SIDEC SIGNAL SIDED SIGNAL 6 RR Lais SR Laiz 6 SOLO USER MANUAL DIGITAL CONNECTOR P25 20 WAY HEADER Pin No Signal PinNo Signal 22R 22R Page 74 gital Out 1 g i D S 9 g 127 19 6 8 1 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 75 ERROR MESSAGES AMIBIOS ERROR BEEP CODES The BIOS performs a Power On Self Test POST after a reset or reboot If errors occur during the POST the microprocessor indicates the status of the test by writing codes to the I O port at address 80 Hex If the BIOS cannot find and configure the display controller then the errors are communicated through a series of audible beeps by the speaker drive circuit Fatal errors which prevent the system from continuing the boot process will produce beep codes Other errors are displayed textually For these see AMIBIOS Error Messages in the following subsection BEEPS ERROR MESSAGE DESCRIPTION 1long 3 Video failure A connection to a monitor was not detected short Refresh Failure The memory refresh circuitry on the single board PC is faulty Parity is not supported on this product will not occur Failure Memory failure in the first 64 KB of memory or Operational Timer 1 on the single board PC is not functioning The CPU on the single board PC gener
29. 6 1 32 1 64 or 1 128 The default setting is 1 8 DISPLAY ACTIVITY This option specifies if AMIBIOS is to monitor activity on the display monitor for power conservation purposes When this option is set to Monitor and there is no display activity for the length of time specified in the value in the Full On to Standby Timeout Min option the computer enters a power saving state The settings are Monitor or Ignore The default settings are Ignore Blue Chip Technology Ltd 127 191 doc Page 49 PAGE 50 ERROR MESSAGES IRQ 3 4 5 7 9 10 11 12 13 14 15 SOLO USER MANUAL These options enable event monitoring When the computer is in a power saving mode activity on the named interrupt request line is monitored by AMIBIOS When any activity occurs the computer enters Full On mode Each of these options can be set to Monitor or Ignore The provisional settings are IRQ 3 IRQ 4 IRQ 5 IRQ7 IRQ 9 IRQ 10 IRQ 11 IRQ 12 IRQ 13 IRQ 14 IRQ 15 Page 50 OPTIMAL _ FAIL SAFE Monitor Ignore Monitor Ignore Ignore Ignore Monitor Ignore Ignore Ignore Ignore Ignore Ignore Ignore Monitor Ignore Ignore Ignore Monitor Ignore Monitor Ignore 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES 51 PCI SETUP PLUG AND PLAY AWARE OS Set this option to Yes if the operating system installed in the computer is Plug and Play aware AMIBIOS only detects and enables PnP ISA adapter
30. 8 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 49 HARD DISK TIMEOUT MIN This option specifies the length of a period of hard disk inactivity When this period expires the hard disk drive enters the power conserving mode specified in the Hard Disk Power Down Mode option described above The settings are Disabled 1 Min minutes and all one minute intervals up to and including 15 Min The default settings are Disabled STANDBY TIMEOUT This option specifies the length of the period of system inactivity when the computer is in Full On mode before the computer is placed in Standby mode In Standby mode some power use is curtailed The settings are Disabled 1 Min 2 Min and all one minute intervals up to and including 15 Min The default settings are Disabled SUSPEND TIMEOUT This option specifies the length of the period of system inactivity when the computer is already in Standby mode before the computer is placed in Suspend mode In Suspend mode nearly all power use is curtailed The settings are Disabled 1 Min 2 Min and all one minute intervals up to and including 15 Min The default settings are Disabled SLOW CLOCK RATIO This option specifies the speed at which the system clock runs in power saving modes The settings are expressed as a ratio between the normal clock speed and the power down clock speed The settings are 1 1 1 2 half as fast as normal 1 4 the normal clock speed 1 8 1 1
31. B requirements even if no device or a low speed sub channel USB device is attached to the cable Use shielded cable that meets the requirements for high speed fully rated devices CONTROLLER IDE SUPPORT The SOLO single board PC provides two independent high performance bus mastering PCI IDE interfaces capable of supporting PIO Mode 3 and Mode 4 devices The system BIOS supports Logical Block Addressing LBA and Extended Cylinder Head Sector ECHS translation modes as well as AT API e g CD ROM devices on both IDE interfaces Detection of IDE device transfer rate and translation mode capability is automatically determined by the system BIOS In the Windows 95 environment a driver can allow the IDE interface to operate as a PCI bus master capable of supporting PIO Mode 4 devices with transfer rates up to 16 while minimising the system demands upon the processor Normally programmed I O operations require a substantial amount of CPU bandwidth In true multi tasking operating systems like Windows 95 the CPU bandwidth freed up by using bus mastering IDE can be used to complete other tasks while disk transfers are occurring Page 12 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 13 Microsoft will provide this driver for Windows 95 other software vendors may make drivers available for other operating systems Detailed information on the PClIset is available in the Intel 824
32. BLUE Not Used 0 Volts Ground 6 Volts Ground 7 OVolts Ground 8 Volts Ground 9 159 10 Volts Ground L Not Used ECP EPP PARALLEL PORT P18 TOP 26 WAY HEADER SIGNAL 11 21 15 17 zi E 1 26 8 PS 2 MOUSE PORT 21 BOTTOM 6 SIGNAL Initialise Select input Ground Ground Ground Ground Ground Ground Ground WAY MINI DIN PIN SIGNAL NO SIGNAL 5 Volts fused Mouse Clock 6 Not Used Page 64 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 65 PS 2 KEYBOARD PORT P21B TOP 6 WAY MINI DIN PIN NO SIGNAL PIN SIGNAL 1 Keyboard Data 2 NotUsed Ground 4 5Volt fused 5 Keyboard Clock 6 Not Used RS232 SERIAL PORT 1 P20A BOTTOM 9 WAY D TYPE SIGNAL PINNO SIGNAL 1 Data Carrier Detect 2 Receive Data 3 TransmitData 4 Data Terminal Ready ata St Ready 7 8 RS232 SERIAL PORT 2 20 9 WAY D TYPE SIGNAL NO SIGNAL Data Terminal Read 5 6 J DataSetRead Ready To Send 8 Clear To Send 9 Rlor POWER DUAL USB PORT 1 P19 A BOTTOM 8 WAY PIN NO SIGNAL PIN NO SIGNAL DATA1 DATA1 DUAL USB PORT 2 P19 B TOP 8 WAY P
33. EE standard 754 1985 PROCESSOR UPGRADE The SOLO single board PC has a 321 pin SPGA socket that provides users with an OverDrive processor upgrade path OverDrive processors being developed for use will provide performance beyond that delivered by the originally installed Pentium Processor MMX CPUs are also supported by SOLO SECOND LEVEL CACHE The Pentium processor s internal cache can be complemented by a second level cache using the COAST connector Pipeline Burst SRAM provides performance similar to expensive Synchronous Burst SRAMs for only a slight cost premium over the slower performing Asynchronous SRAMs With the Triton chipset the performance level of Pipeline Burst and Synchronous SRAMSs is identical SYSTEM MEMORY The SOLO single board PC provides two 72 pin SIMM sites for memory expansion The sockets support 1M x 32 4 MB 2M x 32 8 MB 4M x 32 16 MB and 8M x 32 32 MB single sided or double sided SIMM modules Minimum memory size is 8 MB and maximum memory size using two 8M x 32 SIMM modules is 64MB Memory timing requires 70 ns fast page devices or for optimum performance 60nS EDO DRAM If the memory bus speed is 60 MHz or slower 75MHz 90MHz 120MHz 150MHz or 180MHz Pentium Processor speed 70ns EDO DRAM may be used If the memory bus speed is 66 MHz 60 ns DRAM should be used Additionally 36 bit SIMM modules may be used to provide either standard parity operation or the parity circuitry can be used by th
34. ERATED CONTROLLER TXC The 82439HX provides all control signals necessary to drive a second level cache and the DRAM array including multiplexed address signals The TXC also controls access to memory and generates snoop controls to maintain cache coherency The TXC comes in a 324 pin BGA package and includes the following features Microprocessor interface control Integrated L2 write back cache controller Pipeline burst SRAM 256 KB direct mapped Integrated DRAM controller 64 bit path to memory Support for EDO and fast page DRAM Parity and non parity support Fully synchronous PCI bus interface 25 30 33 MHz bus speed PCI to DRAM gt 100 MB sec Up to four PCI masters in addition to the Page 10 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 11 PCI ISA IDE XCELERATOR PIIX3 The provides the interface between the on board PCI and ISA buses and integrates a dual channel fast IDE interface capable of supporting up to four devices The PIIX3 integrates seven DMA channels one 16 bit timer counter two eight channel interrupt controllers PCI to AT interrupt mapping circuitry NMI logic ISA refresh address generation and PCI ISA bus arbitration circuitry together onto the same device The PIIX3 comes in a 208 pin QFP package and includes the following features Interface between the PCI and ISA buses Universal Serial Bus controller
35. ESET STATUS The Red LED marked RST indicates the system reset status The LED is illuminated when in held in reset MONITOR MICROCONTROLLER STATUS The Yellow LED marked MF indicates the status of the monitor microcontroller if fitted The LED is illuminated when a fault condition has occurred WATCHDOG TIMER STATUS The Yellow LED marked WD indicates the watchdog time out status The LED is illuminated when a timeout has occurred Page 32 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 33 USER INSTALLABLE UPGRADES SYSTEM MEMORY The table shows the possible memory combinations SOLO will support both Fast Page DRAM or EDO DRAM SIMMs but they cannot be mixed within the same memory bank Parity generation and detection are supported and Error Correction can be invoked when using parity SIMMs x36 See BIOS Setup options SIMM requirements are 70ns Fast Page Mode 60nS EDO DRAM 70 ns EDO may be used with a 60 MHz or slower external CPU clock with tin lead connectors SIMM 1 2 BANK A TOTAL SYSTEM SIMM TYPE AMOUNT MEMORY 1M X 32 4 2M X 32 8 MB 16 MB 4M X 32 16 MB 32 MB 8M X 32 32 MB 64 MB Note SIMMs may be parity x 36 or non parity x 32 Blue Chip Technology Ltd 127 191 doc Page 33 PAGE 34 USER GUIDE SOLO USER MANUAL EDO DRAM Extended Data Out or Hyper Page DRAM is designed to improve the DRAM read performance EDO DRAM holds the memory data valid u
36. F1 gt key brings a help screen for the currently selected item lt Esc gt Pressing the lt Esc gt key takes you back to the previous screen Pressing it in the Main Advanced Security or Exit screen allows you to Exit Discarding Changes see later in this chapter lt PgUp gt Pressing either key moves the selection of the current item up or down lt PgDn gt the available options Pressing the up lt gt key changes the selection to the previous item option or option lt gt lt gt gt Pressing the left lt gt or right lt gt keys in the Main Advanced Security or Exit menu screens changes the menu screen Pressing either key in a subscreen does nothing Pressing the lt F5 gt key allows you to Load Setup Defaults see later in this chapter Pressing the lt F6 gt key allows you to Discard Changes see later in this chapter Pressing the lt F10 gt key allows you to Exit Saving Changes see later in this chapter Page 38 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 39 STANDARD SETUP This section describes the Setup options found on the standard setup screen SYSTEM DATE When selected this allows you to set the current date by specifying a date month and year SYSTEM TIME When selected this allows you to set the current time by entering values for hours minutes and seconds FLOPPY A TYPE When selected this allows you to cycle through the a
37. IN NO SIGNAL PIN NO SIGNAL DATA2 DATA2 Blue Chip Technology Ltd 127 191 doc Page 65 PAGE 66 ERROR MESSAGES SOLO USER MANUAL ETHERNET UTP CONNECTOR P22 8 WAY RJ45 PINNe SIGNAL 1 2 VETRANSMIT 7 INTERNAL I O HEADERS The board has a number of internal peripheral connectors PRIMARY E IDE CONNECTOR P13 40 WAY HEADER NO SIGNAL PIN NO SIGNAL Data bit 8 HD Databit6 HD 6 Data bit 9 HD _Data bit 5 HD 8 Databit 10 HD Data bit 11 HD 11 Data bit 12 HD 13 Data bit 13 HD 15 Data bit 14 HD 17 Data bit 15 HD 19 Not used 21 Ground 23 Ground Ground Not Used Ground Not Used 1 Kohm to Ground Address 2 HD Chip Select 1 HD Ground 2 22482 5 19 0351 2 29 33 35 25 27 29 31 33 35 37 39 66 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 67 LCD CONNECTOR P11 50 WAY 2MM HEADER NO SIGNAL PIN NO SIGNAL 5 SwichedVEE 6 7 Switched 5volts 8 Ground 9 Switched 5 volts 10 General Purpose1 of VSYNC AUDIO VOLUME CONTROL P6 4 WAY PIN HEADER Pin No Signal Pino Signal CD AUDIO INPUT P7 4 WAY PIN HEADER PinN PinN Signal CD Audio In Left Audio Ground CD Audio In Right Audio Ground Bl
38. O 23 pta2 B2 B2 Bo G B UB UBO 25 Daa3 up UD4 R3 UR2 URI 27 Daa4 UD B4 B4 Bo G2 1 LRO 29 5 up Go B11 G4 B2 LGO 31 Daas B12 R5 R3 LB1 LBo 33 ip up G B7 5 LR2 CERTOS 35 Daag Po Go Go sHctikU B3 uci 37 Daag Pt 644 R UBI 39 P2 ID G G cao G UR 41 Daai P3 G3 Ba 43 Daat2 P4 ID m Go R5 ci 45 Datais P5 we R G G5 Bi 47 Daat4 P6 tpi R Ge Gi2 B5 tn 49 15 __ ID R G Re 1027 5 Daaie J Ro Ro j 46 T J 42 Daai R Rb j patai9 Rs 34 20 S R R 30 Daai CE RS RH j 26 pData2 T J J R Ro 5 5 P pe on j ae j j es eee Blue Chip Technology Ltd 127 191 doc Page 23 24 USER GUIDE SOLO USER MANUAL In addition th
39. SOLO Single Board PC BLUE CHIP TECHNOLOGY User Manual SOLO User Manual Document Part N 127 191 Document Reference SOLO 127 191 doc Document Issue Level 0 5 Manual covers PCBs with the following Issue 1 x x is any alpha digit All rights reserved No part of this publication may be reproduced stored in any retrieval system or transmitted in any form or by any means electronic mechanical photocopied recorded or otherwise without the prior permission in writing from the publisher For permission in the UK contact Blue Chip Technology Information offered in this manual is believed to be correct at the time of printing Blue Chip Technology accepts no responsibility for any inaccuracies The information contained herein is subject to change without notice There are no express or implied licences granted herein to any intellectual property rights of Blue Chip Technology Ltd All trademarks and registered names acknowledged Blue Chip Technology Ltd Chowley Oak Tattenhall Chester Cheshire CH3 9EX Telephone 01829 772000 Facsimile 01829 772001 Amendment History Issue Issue Amendment Details Level Date 25 04 97 First Draft Issue CONTENTS INTRODUCTION aasawa 1 MANUAL OBJECTIVES e IP ERR nen 1 LIMITATIONS OF LIABILITY 1 PRECAUTIONS P ed Ee seas CREARE 2 ELECTRO STATIC 15
40. Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 85 PCI CONFIGURATION ERROR MESSAGES The following PCI messages are displayed as a group with bus device and function information lt NVRAM Checksum Error Cleared gt V String System Board Device Resource Conflict V String Primary Output Device Not Found V String Primary Input Device Not Found gt V String Primary Boot Device Not Found gt V String lt NVRAM Cleared By Jumper V String lt NVRAM Data Invalid Cleared gt V String Static Device Resource Conflict V String The following messages chain together to give a message such as PCI I O Port Conflict Bus 00 Device OD Function 01 If and when more than 15 PCI conflict errors are detected the log full message is displayed lt PCI I O Port Conflict gt String lt PCI Memory Conflict gt V String lt PCI IRQ Conflict gt V String lt Bus gt V String lt Device gt V String lt Function gt V String PCI Error Log is Full gt V String Floppy Disk Controller Resource Conflict gt V Text Primary IDE Controller Resource Conflict gt V Text Secondary IDE Controller Resource Conflict gt V Text Parallel Port Resource Conflict gt V Text Serial Port 1 Resource Conflict gt V Text Serial Port 2 Resource Conflict gt V Text Blue Chip Technology Ltd 127 191 doc Page 85
41. al CPU clock Speed Use in conjunction with J11 oo joorrr 46 J7 J8 30 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 31 Serial Port 4 pin 9 selection 5 volts fed to pin 9 of D type 12 volts fed to pin 9 of D type 24 volts fed to pin 9 of D type Ringing Indicator fed to pin 9 of D type 24 RI VEE output voltage polarity 1 2 ve voltage 2 3 ve voltage 5V J14 VEE Control Voltage Connect a 50K potentiometer voltage between 8 and 50 volts Fitted for 5V LCD panels In the table L indicates the presence of a link O the absence Blue Chip Technology Ltd 127 191 doc Page 31 PAGE 32 USER GUIDE SOLO USER MANUAL STATUS LEDS Along the top edge of the PCB on the reverse side is a row of LEDs These are arranged in groups to indicate the status of various board functions P O S T DISPLAY Red LEDs LSB to MSB inclusive display the Power On Self Test POST data byte The LED is illuminated when the POST data bit is 1 See the Appendix for details of the error codes POWER SUPPLY INDICATORS Five green LEDs marked 3 5 12 12 amp 5 adjacent to the power connector show the presence of the power supplies Each LED is illuminated when the appropriate voltage is present IDE ACTIVITY DISPLAY The Yellow LED marked SL indicates primary IDE activity Hard disk or CD ROM and is illuminated when active SYSTEM R
42. ated an error EI E The keyboard controller 8042 may be bad The Failure BIOS cannot switch to protected mode Interrupt Error END System video adapter is either missing or its memory Read Write Error is faulty This is not a fatal error Error encoded in BIOS 10 CMOS Shutdown The shutdown register for CMOS RAM failed Register Rd Wrt Error External Cache Bad Blue Chip Technology Ltd 127 191 doc Page 75 PAGE 76 ERROR MESSAGES SOLO USER MANUAL AMIBIOS ERROR CODES ON THE POST DISPLAY As the BIOS performs the POST after a reset or reboot the microprocessor indicates the status of the test by writing codes to the I O port at address 80 Hex SOLO provides an on board decode of this information displaying the code on on board LEDs It can also drive an optional POST display without modification The following codes indicate the progress of the microprocessor during the power on test UNCOMPRESSED INIT CODE CHECKPOINTS HEX Rq starting going to 4GB flat mode To start Memory sizing To come back to real mode Execute OEM patch Set stack D5 E000 ROM enabled Init code is copied to segment 0 and control to be transfered to segment 0 Control is in segment 0 To check lt CTRL gt lt HOMEs gt key and verify main BIOS checksum either lt CTRL gt lt HOMEs is pressed or main BIOS checksum is bad go to check point EO else goto check point D7 D7 Main BIOS runtime code is to be decompressed and contro
43. by turning off the system and clearing the CMOS RAM Blue Chip Technology Ltd 127 191 doc Page 21 22 USER GUIDE SOLO USER MANUAL VIDEO BIOS Both System and Video BIOSes are held in a Flash device As standard the BIOS shipped will be configured for a 640x480 Dual Scan LCD If this is not your chosen target panel then you will possibly need to reprogram the Flash Video BIOS with an alternative driver Please see the supplied Video configuration disk or contact Technical Services at Blue Chip Technology for further details CONNECTING AN LCD SOLO Unfortunately connecting an LCD panel to a PC is not as simple as it is for a CRT At the time of writing this manual there is still no universally accepted standard interface for LCDs We strongly recommend that if you in any doubt about connecting a LCD panel to SOLO you contact our Technical Services team before you switch on For general guidance on the allocation of data bits to the wide variety of panel types please see the following table Page 22 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 23 MONO MONO MONO COLOR COLOR COLOR COLOR COLOR COLOR COLOR 55 TFTHR STNSS STNSS STNDD STNDD 8 BIT 8 BIT 16 9 12 16 18 24 18 24 8 BIT 16 BIT 8 BIT 16 BIT 19 Daao upa uoz Bo Bo BO R R UR URO 21 Daai UD ub Bi Bt Gt UGt UQ
44. cards that are required for system boot The Windows 95 operating system detects and enables all other PnP aware adapter cards Windows 95 is PnP aware Set this option to No if the operating system such as DOS OS 2 Windows 3 x does not use PnP You must set this option correctly or PnP aware adapter cards installed in your computer will not be configured properly The settings are No or Yes The Optimal and Fail Safe default settings are No PCI LATENCY TIMER IN PCI CLOCKS This option sets latency of all PCI devices on the PCI bus The settings are in units equal to PCI clocks The settings are 32 64 96 128 160 192 224 or 248 The Optimal and Fail Safe default settings are 64 PCI VGA PALETTE SNOOP This option must be set to Enabled if any ISA adapter card installed in the computer requires VGA palette snooping The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Disabled PCI IDE BUS MASTER Set this option to Enabled to specify that the IDE controller on the PCI local bus has bus mastering capability The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Disabled Blue Chip Technology Ltd 127 191 doc Page 51 PAGE 52 ERROR MESSAGES SOLO USER MANUAL OFFBOARD PCI IDE CARD This option specifies if an offboard PCI IDE controller adapter card is used in the computer You must also specify the PCI expansion slot on SOLO where the offboard PCI IDE controller car
45. d is installed If an offboard PCI IDE controller is used the on board IDE controller on SOLO is automatically disabled The settings are Disabled Auto Slot1 Slot2 Slot3 or Slot 4 If Auto is selected AMIBIOS automatically determines the correct setting for this option The Optimal and Fail Safe default settings are Auto In the AMIBIOS for the Intel Triton chipset this option forces IRQ 14 and 15 to a PCI slot on the PCI local bus This is necessary to support non compliant PCI IDE adapter cards OFFBOARD PCI IDE PRIMARY IRQ This option specifies the PCI interrupt used by the primary IDE channel on the offboard PCI IDE controller The settings are Disabled INTA INTB INTC INTD or Hardwired The Optimal and Fail Safe default settings are Disabled OFFBOARD PCI IDE SECONDARY IRQ This option specifies the PCI interrupt used by the secondary IDE channel on the offboard PCI IDE controller The settings are Disabled INTA INTB INTC INTD or Hardwired The Optimal and Fail Safe default settings are Disabled DMA CHANNELS 0 1 3 5 6 7 These options specify the bus to which the DMA channel is allocated These options determine if AMIBIOS should remove a DMA channel from the available pool passed to BIOS configurable devices The available pool is determined by reading the ESCD If more DMA channels must be removed from the pool the end user can use these PCI PnP Setup options to remove the channel by assigning the
46. devices since it is a Plug and Play aware operating system ADVANCED POWER MANAGEMENT The SOLO AMI BIOS supports power management through System Management Mode SMM interrupts to the CPU and Advanced Power Management APM Version 1 1 In general power management capabilities will allow the system to be put into a power managed Stand by mode either by entering a user configurable hot key sequence on the keyboard or by the expiration of a hardware timer which detects system inactivity for a user configurable time When in the Stand by mode the SOLO single board PC reduces power consumption by using the power saving capabilities of the Pentium processor and also running down hard drives and turning off DPMS compliant monitors Add in cards supplied with APM aware drivers can also be put into a power managed state for further energy savings The ability to respond to external interrupts is fully maintained while in Stand by mode allowing the system to service requests such as in coming Fax s or network messages while unattended albeit slowly until the system wakes up Page 20 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 21 SLEEP MODE SUPPORT When Advanced Power Management APM is activated in the System BIOS and the Operating System s APM driver is loaded Sleep mode Stand By can be entered in one of three ways Sleep Resume may be activated by using either a momentary action sleep switch
47. e HX chipset to provide ECC correction EDO DRAM is designed to improve DRAM read performance Page 6 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL USER GUIDE PAGE 7 The two sockets are arranged in a bank which provides a 64 bit wide data path There are no jumper settings required for the memory size or type this is automatically detected by the system BIOS BUS EXPANSION SLOTS The SOLO is designed for use in an embedded application and provides expansion slots There may be up to three ISA bus expansion cards and three PC 104 PC 104 plus expansion cards ELECTROMAGNETIC COMPATIBILITY This product meets the requirements of the European EMC Directive 89 336 EEC and is eligible to bear the CE mark It has been assessed operating in a Blue Chip Technology PC However because the board can be installed in a variety of computers certain conditions have to be applied to ensure that the compatibility is maintained Subject to those conditions it meets the requirements for an industrial environment Class A product The board must be installed in a computer system chassis which provides screening suitable for an industrial environment Any recommendations made by the computer system manufacturer supplier must be complied with regarding earthing and the installation of boards The board must be installed with the optional backplate securely screwed to the chassis of the computer to ensure good metal to metal i e ear
48. e RS 232 base address Returned after RS 232 base address Going to do any initialisation before Coprocessor test Required initialisation before Coprocessor is over Going to Initialize the Coprocessor next Coprocessor initialised Going to do any initialisation after Coprocessor test keyboard keyboard ID and num lock Keyboard ID command to be NMI and parity enabled Going to do any initialisation required before giving control to optional ROM at E000 Initialisation before E000 ROM control over E000 ROM to get control next 9 9C 9E A2 A4 5 gt 80 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 81 Returned from E000 ROM control Going to do any initialisation required after E000 optional ROM control Initialisation after E000 optional ROM control is over Going to display the system configuration To uncompress DMI data and execute DMI POST init System configuration is displayed Going to copy any code to specific area Copying of code to specific area done Going to give control to INT 19 boot loader Blue Chip Technology Ltd 127 191 doc Page 81 82 ERROR MESSAGES SOLO USER MANUAL AMIBIOS ERROR MESSAGES Textual error messages are displayed in the following format ERROR Message Line 1 ERROR Message Line 2 For most displayed error messages there is only one message If a second message appears it is RUN SETUP If this me
49. e following signals may need connecting to the target LCD panel 6 HsYNC CRT HorizontalSync LCLK 15 MOD as BLANK or Display Enable for TFT displays 17 J FM First Line Marker LCD equivalent of VSYNC Always ensure maximum ground connections to the target LCD panel especially as the clock frequencies rise P11 pins 4 8 12 16 18 20 24 28 32 36 40 44 and 48 are provided as ground pins Page 24 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 25 CONNECTORS A selection of connectors is incorporated on the SOLO PC board These provide connectivity to standard external peripherals monitor keyboard etc in chassis peripherals disk drives etc and bus devices A complete table of the available connectors and their pin outs is given in the appendices The PC board layout at the end of the manual shows their positions BACK PANEL CONNECTORS The back panel provides external access to the CRT Parallel printer PS 2 mouse keyboard Serial 1 2 Ethernet and dual USB ports the connectors follow the industry standard The diagram shows the general location of the connectors ON BOARD CONNECTORS There are connectors on board for Floppy Disk Drive IDE LCD Serials 3 amp 4 RS422 485 PC 104 ISA Sound CD Audio Supervisory micro and utilities connector There are also sockets for SIMMs COAST cache Flash amp SRAM Solid State Dis
50. e memory area reserved for legacy ISA adapter cards The settings are Disabled 16K 32K or 64K The Optimal and Fail Safe default settings are Disabled RESERVED MEMORY ADDRESS This option specifies the beginning address in hex of the reserved memory area The specified ROM memory area is reserved for use by legacy ISA adapter cards The settings are C0000 C4000 C8000 CC000 20000 D4000 08000 DC000 The Optimal and Fail Safe default settings are C8000 Page 54 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 55 PERIPHERAL SETUP Peripheral Setup options are displayed by choosing the Peripheral Setup icon from the WINBIOS Setup main menu Peripheral Setup options are described in this section ONBOARD PCI IDE This option specifies the onboard IDE controller channels that will be used The settings are Primary Secondary Both or Disabled The Optimal and Fail Safe default settings are Primary ONBOARD FDC This option enables the floppy drive controller on the PC board The settings are Auto Enabled or Disabled The default setting is Auto ONBOARD SERIAL PORT1 This option enables serial port 1 on the board and specifies the based I O port address for serial port 1 The settings are Auto 3F8h 3E8h 2F8h 2E8h or Disabled The default setting is Auto ONBOARD SERIAL PORT2 This option enables serial port 2 on the board and specifies the base I O port address for serial port 2
51. echnology Ltd 127 191 doc Page 27 28 USER GUIDE SOLO USER MANUAL EXTERNAL CPU CLOCK SPEED J4 This jumper block sets the CPU s external operating frequency to memory at 50 60 or 66 MHz The default setting depends on the specific memory and type of Pentium processor installed It is used in conjunction with 15 EXTERNAL PAIR PAIR BUS FREQ A B SUMMARY OF LINK SETTINGS HOST CLK J5 J5 J4 J4 SCALING A B A B FACTOR 90 6 30 15 Open Open Link Open 100 66 33 15 j Open Open Open Link 120 6 30 2 Open Link Link Open 133 6 33 2 Open Link Open Link 150 6 30 25 Link Link Link Open 166 6 25 rink Link Open Link ON BOARD VIDEO J6 The SOLO is equipped with a link J6 to allow the user to disable the on board video when external video adapters are being used If a PCI video adapter is fitted into a system the on board video will be automatically disabled without having to fit a jumper on J6 J6 must be fitted when using ISA based VGA adapter boards in a SOLO based system Page 28 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 29 CMOS BATTERY SOURCE CLEAR CMOS J1 This jumper is used to clear the CMOS RAM in the event that the contents become corrupt It selects the source of backup power to the CMOS RAM and also allows the CMOS to be cleared down to the default setti
52. efaults by using a configuration jumper on the single board PC The appendix lists the jumper configurations An on board Lithium battery provides power to the RTC and CMOS memory The battery has an estimated lifetime of three years if the board remains unpowered When the system is powered up power is drawn from the power supply to extend the life of the battery SOLO is Year 2000 compliant Page 14 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 15 CHIPS amp TECHNOLOGY GRAPHICS SUBSYSTEM The SOLO single board PC is provided with a C amp T 6554 graphics controller with 1 MB of graphics memory Both CRT and LCD interfaces are provided SOLO supports a wide variety of monochrome and colour Single Panel Single Drive SS and Dual Panel Dual Drive DD passive STN and active matrix TFT MIM LCD EL and plasma panels SOLO supports panel resolutions of 800x600 1024x768 and 1280x1024 For monochrome panels up to 64 grey scales are supported Up to 226 981 different colours can be displayed on passive STN LCDs and up to 16M colours on 24 bit active matrix LCDs with SOLO The 6554X has a 32 bit graphics engine that provides acceleration for scaling the video display without compromising picture quality or frame rate Hardware acceleration for graphics functions such as line draws System to screen and screen to screen BitBLTs ROPs which optimise performance operation under Windows and other GUI en
53. eri eedem tiers 71 ERROR MESSAGES etn er 75 AMIBIOS ERROR BEEP 75 AMIBIOS ERROR CODES ON THE POST 76 AMIBIOS ERROR 55 90 82 ISA NMI MESSAGES 84 PCI CONFIGURATION ERROR 55 222022 85 BOARD e EE SE GEI 86 Blue Chip Technology Ltd 127 191 doc COMPANY PROFILE COMPANY PROFILE Blue Chip Technology is the leading specialist PC product manufacturer in UK Europe Blue Chip Technology provides innovation with quality design and manufacturing from a single source Based in the North West our purpose built complex contains one of the most advanced research and development facility engineering workshop and production lines Specialising in the provision of industrial computing and electronic solutions for a wide range of UK and European organisations Blue Chip Technology has one of the UK s largest portfolios of industrial PCs peripherals and data acquisition cards This extensive range of products coupled with our experience and expertise enables Blue Chip Technology to offer an industrial processing solution for any application The SOLO Single Board PC is the latest addition to our portfolio providing a cost effective product development and volume production tool for OEMs A unique
54. erican Megatrends Inc Intel is a registered trademark of the Intel Corporation All 80x86 and Pentium processors are registered trademarks of Intel Corporation MSDOS and WINDOWS are registered trademarks of the Microsoft Corporation PC 104 is a registered trademark of the PC 104 Consortium Blue Chip Technology Ltd 127 191 doc Page 3 PAGE 4 USER GUIDE SOLO USER MANUAL USER GUIDE OVERVIEW The Blue Chip Technology SOLO single board PC sets new standards for integration of the latest advances in processor memory and I O technologies The SOLO complies with the new A5 form factor providing ISA PCI and PC 104 bus interfaces on a single card The A5 PC is an ideal platform for the increasing requirements of today s and tomorrow s embedded applications The flexible design will accept Pentium processors operating at 75 90 100 120 133 150 166 and 200 MHz including MMX devices The user may install 256 KB of asynchronous Cache or 256 KB or 512 KB of Pipeline Burst Cache RAM in the form of a COAST Cache On A STick Module The memory sub system is designed to support up to 64MB of EDO DRAM for improved performance or standard Fast Page DRAM in standard 72 pin SIMM sockets An SPGA socket provides upgrades for future OverDrive processors The SOLO single board PC utilises Intel s Triton 82430HX PCIset to provide increased integration and performance over other single board PC designs The Triton PCIset contains an integ
55. faster execution Cache The contents of the named ROM area are written to the same address in system memory RAM for faster execution if an adapter ROM will be using the named ROM area Also the contents of the RAM area can be read from and written to cache memory Disabled The video ROM is not copied to RAM The contents of the video ROM cannot be read from or written to cache memory The default setting is Cache for and C400 disabled for the remainder In the AMIBIOS for the Intel Triton chipset the E000h page is used as ROM during POST but shadowing is disabled and the ROM CS signal is disabled to make the E000h page available on the local bus Blue Chip Technology Ltd 127 191 doc Page 45 46 ERROR MESSAGES SOLO USER MANUAL ADVANCED CHIPSET SETUP USB FUNCTION This option controls the operation of the USB ports on SOLO The options are Enabled or Disabled The default is Enabled the fail safe default is Disabled USB KEYBOARD MOUSE LEGACY SUPPORT This option allows the Triton chipset to emulate a standard 8042 interface for the keyboard and mouse functions when the operating environment does not support the USB keyboard and mouse functions directly The settings are Enabled and Disabled The default is Enabled USB PASSIVE RELEASE ENABLE This option controls the USB passive release function on SOLO The settings are Enabled or Disabled The default and fail safe settings are
56. fault settings are 4 Blue Chip Technology Ltd 127 191 doc Page 47 48 ERROR MESSAGES SOLO USER MANUAL POWER MANAGEMENT SETUP POWER MANAGEMENT APM Set this option to Enabled to enable the power management and APM advanced Power Management features The settings are Enabled Disabled or Inst On The default settings are Disabled INSTANT ON SUPPORT If this option is set in Power Management APM it allows the computer to go to full power on mode when leaving a power conserving state AMIBIOS uses the RTC Alarm function to wake the computer at a pre specified time The settings 1 to 14 minutes or Disabled The default settings are Disabled GREEN PC MONITOR POWER STATE This option specifies the power management state that the Green PC compliant video monitor enters after the specified period of display inactivity has expired The settings are Off Standby or Suspend The default settings are Standby VIDEO POWER DOWN MODE This option specifies the power management state that the video subsystem enters after the specified period of display inactivity has expired The settings are Disabled Standby or Suspend The default settings are Disabled HARD DISK POWER DOWN MODE This option specifies the power management state that the hard disk drive enters after the specified period of display inactivity has expired The settings are Disabled Standby or Suspend The default settings are Disabled Page 4
57. g up a subscreen After you have selected an item use the lt PgUp gt or lt PgDn gt keys to modify the setting MAIN SCREEN Shows the following menu Standard Setup Advanced CMOS Setup Advanced Chipset Setup Power Management Setup PCI PnP Setup Peripheral Setup Auto Detect Hard Disk Change User Password Change Supervisor Password Auto Configuration with Optimal Settings Auto Configuration with Fail Safe Settings Save Settings and Exit Exit without Saving Blue Chip Technology Ltd 127 191 doc Page 35 PAGE 36 ERROR MESSAGES SOLO USER MANUAL Their operation is as follows STANDARD SETUP For setting up and modifying basic items such as floppy disk drives hard drives and system time amp date ADVANCED CMOS SETUP For modifying the more advanced features of the PC e g system bootup options ADVANCED CHIPSET SETUP For modifying hardware level options POWER MANAGEMENT SETUP For specifying the Green PC features such as IDE and VGA timeouts PCI PNP SETUP For specifying Plug and Play options e g IRQ assignments PERIPHERAL SETUP For specifying the system peripheral options such as serial and parallel port modes AUTO DETECT HARD DISK Automatically determines the parameters of any IDE devices connected and sets up the parameters for USER DEFINED drives CHANGE USER PASSWORD Allows the password for the user level options to be set or changed This option cannot be changed unless
58. her L1 internal cache memory on the CPU or L2 secondary cache memory is disabled WriteBack Use the write back caching algorithm default WriteThru Use the write through caching algorithm EXTERNAL CACHE This option specifies the caching algorithm used for L2 secondary external cache memory The settings are SETTING DESCRIPTION Disabled L2 cache is disabled WriteBack L2 cache is write back WriteThru L2 cache is write through SYSTEM BIOS SHADOW CACHEABLE When this option is set to Enabled the contents of the F0000h system memory segment can be read from or written to L2 secondary cache memory The contents of the F0000h memory segment are always copied from the BIOS ROM to system RAM for faster execution Page 44 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 45 The settings are Enabled or Disabled The Optimal default setting is Enabled The Fail Safe default is Disabled Default is Enabled 000 16K Shadow C400 16K Shadow C800 16K Shadow 16K Shadow 0000 16K Shadow D400 16K Shadow D800 16K Shadow 00 16K Shadow These options control the location of the contents of the 16KB blocks of ROM beginning at the specified memory location If no adapter ROM is using the named ROM area this area is made available to the local bus The settings are SETTING DESCRIPTION Enabled The contents of C0000h C3FFFh are written to the same address in system memory RAM for
59. ing table lists the I O addresses used by single board PC devices Some of these devices e g graphics may not be present in all configurations Some devices serial ports parallel ports etc may be configured for various addresses or disabled These I O locations are listed in the Variable Resources column Blue Chip Technology Ltd 127 191 doc Page 59 PAGE 60 ERROR MESSAGES SOLO USER MANUAL ADDRESS SIZE FIXED RESOURCES VARIABLE HEX Bytes RESOURCES 0000 000 0020 0021 002 002 0040 0043 1 Interrupt Controller 1 Timer 1 0060 Keyboard Controller Data Byte 0061 NMI speaker control 0064 Kbd Controller CMD STAT Byte Enable NMI RTC Address RTC Data DMA Page Register Interrupt Controller 2 APM Control Status Interrupt Controller 2 DMA 2 Reset Numeric Error Reserved for Board Confign 0070 bit 7 0070 bits 6 0 0071 0080 008 00A0 00A1 00B2 00B3 A 00 0 00DE 00 0100 0107 0170 0177 01F0 01F7 0200 0207 0278 027 02E8 O2EF 02F8 2 0376 0377 0378 037F 03B0 03BB 03 0 03DF 03E8 5 03F6 03F7 Write 03F7 bit 7 03F7 bits 6 0 03F8 LPT 400h co co 0400 04D1 OCF8 OCFC OCFC OCFF FFAO FFA7 8 FFAF
60. ite any BYTE WORD or DWORD in the four byte range by using the correct offset as follows DWORD CFCh WORD CFCh or CFEh BYTE CFCh CFDh CFEh or CFFh CONFIGURATION ADDRESS REGISTER BIT DEFINITION BIT 30 24 RESERVED 23 16 BUS NUMBER 15 11 DEVICE NUMBER FUNCTION NUMBER REGISTER NUMBER 1 CONFIG SPACE ENABLE FLAG Bit 31 Always 1 to indicate I O access is to configuration space Blue Chip Technology Ltd 127 191 doc Page 61 62 ERROR MESSAGES SOLO USER MANUAL RESERVED Bits 30 24 Always 00h BUS NUMBER Bits 23 16 Always 00h unless a bridge card is installed in a PCI slot DEVICE NUMBER Bits 15 11 Used to indicate a specific PCI device The Triton TSC has a predefined device number of 00000h The PIIIX and four PCI slots also have specific device numbers that device number is determined by which PCI Address Data line is connected to the device s ID SEL pin Table E 1 details the specific mapping information FUNCTION NUMBER Bits 10 8 Used to indicate a specific function in multifunction PCI devices The PIIIX is the only multi function device on SOLO located on the single board PC Use 00h for the basic PIIIX device and Olh for the PCI IDE BUS MASTER FUNCTION For a multi function PCI add in card refer to the card s documentation to determine the allowable function numbers REGISTER NUMBER Bits 7 2 Defines one of 64 DWORD locations for a specific PCI device Note that Bits 1 and 0 must
61. ks and external battery In addition connectors provide for e Power supply connection e On board programming of the EPLD This is for manufacture only and is not a user connection UTILITY CONNECTOR The SOLO PC board provides connectors to support functions which would normally be located within the enclosure and also duplicate connections for some of the external interfaces System Speaker System Reset Switch Keyboard Power LED Hard Drive Activity LED and an External Battery SPEAKER No on board Piezo speaker is provided An off board speaker may be connected to the header P16 pins 1 amp 2 The speaker provides error beep code information during the Power On Self Test if the system cannot use the video interface Blue Chip Technology Ltd 127 191 doc Page 25 PAGE 26 USER GUIDE SOLO USER MANUAL RESET Two pins of header P16 pins 3 amp 4 may be connected to a momentary normally open SPST switch When the switch is closed the system will perform a hard reset and run the POST IDE LED Two pins of header P16 pins 13 amp 14 may be connected to an LED to provide a light when an IDE hard drive connected to the on board IDE controller is active BUS CONNECTORS The board incorporates the standard PC AT 16 bit ISA and PC 104 bus connectors for expansion See the appendices for the pin out details Page 26 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 27 JUMPERS Jumper
62. l to be passed to main BIOS in shadow RAM Page 76 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 77 BOOT BLOCK RECOVERY CODE CHECKPOINTS CODE DESCRIPTION HEX On Board Floppy Controller if any is initialised To start base 512K memory test EE Start looking for a diskette in drive A and read 1st sector of the diskette Start searching AMIBOOT ROM file in root directory AMIBOOT ROM file not present in root directory F2 Start reading FAT table and analyze FAT to find the clusters occupied by AMIBOOT ROM file Blue Chip Technology Ltd 127 191 doc Page 77 PAGE 78 ERROR MESSAGES SOLO USER MANUAL RUNTIME CODE IS UNCOMPRESSED 000 SHADOW CODE DESCRIPTION HEX 06 POST code to be uncompressed CMOS checksum calculation to be done next Any initialisation before keyboard BAT to be done Keyboard command byte to be written Going to issue Pin 23 24 blocking unblocking command Going to check pressing of lt INS gt lt gt key during power on To init CMOS if Init CMOS in every boot is set or lt END gt key is pressed Going to disable DMA and Interrupt controllers 21 display is disabled and port B is initialised Chipset init about to x timer test about to start About to start memory refresh test Memory Refresh line is toggling Going to check 15us ON OFF time To read 8042 input port and disable Megakey
63. mmediately from the IDE drive it is not configured as if it was absent The default is Disabled BOOTUP SEQUENCE This option specifies the sequence of the boot drives The options are 1 Boot Device 2 Boot Device 34 Boot Device Each of these options can be set to boot from the following list of peripherals Disabled On selection SOLO no boot device will be sought IDE 0 On selection SOLO will attempt to boot from the attached first physical E IDE drive IDE 1 On selection SOLO will attempt to boot from the attached second physical E IDE drive IDE 2 On selection SOLO will attempt to boot from the attached third physical E IDE drive IDE 3 On selection SOLO will attempt to boot from the attached fourth physical E IDE drive Floppy On selection SOLO will attempt to boot from the attached floppy drive Capacities from 360KB to 2 88MB are supported Blue Chip Technology Ltd 127 191 doc Page 41 42 ERROR MESSAGES SOLO USER MANUAL Floptical On selection SOLO will attempt to boot from the attached LS120 optical drive CDROM On selection SOLO will attempt to boot from the attached IDE CDROM drive SCSI On selection SOLO will attempt to boot from the SCSI Boot ROM fitted on your host SCSI adapter Network On selection SOLO will boot from the on board Ethernet Boot ROM where fitted The default setting is 1 Boot Device Floppy 27 Boot Device IDE 0 34 Boot
64. ngs Fitting the link to the CLR position with the power off allows on board capacitors to discharge and will reset the CMOS memory The jumper should then be returned to the NORM position to restore normal operation Blue Chip Technology Ltd 127 191 doc Page 29 PAGE 30 USER GUIDE SOLO USER MANUAL TABLE OF JUMPERS JUMPER AREA OF INFLUENCE LINK ACTION J1 CMOS Battery Support None Not Allowed CLR Clear CMOS RAM NORM Use on board batter J2 CPU Core Voltage Select Not Allowed 2V9 CPU core 3V3 CPU core 3 3V45 CPU core 3 6 3V6 CPU core 3 links STD Standard CPU J4 Select External Bus Frequency External Bus Frequency 50 MHz 60 MHz 66 MHz Reserved External CPU speed 1 5 x2 2 5 x3 Link Disabled Link RS485 Half Duplex selected Serial Port 2 pin 9 selection 5 5 volts fed to pin 9 of D type 12 volts fed to pin 9 of D type 24 volts fed to pin 9 of D type Ringing Indicator fed to pin 9 of D type Serial Port 1 pin 9 selection 5 volts fed to pin 9 of D type 12 volts fed to pin 9 of D type 24 volts fed to pin 9 of D type Ringing Indicator fed to pin 9 of D type Serial Port 3 pin 9 selection 5 volts fed to pin 9 of D type 12 volts fed to pin 9 of D type 24 volts fed to pin 9 of D type Ringing Indicator fed to pin 9 of D type J11 Serial Port 2 mode of operation 232 RS232 selected FUL RS422 485 Full duplex selected HLF RS485 Half duplex selected Use in conjunction with J1 Selects the intern
65. ntil the next CAS falling edge unlike standard fast page mode DRAM which tri states the memory data when CAS negates to precharge for the next cycle With EDO the CAS precharge overlaps the data valid time allowing CAS to negate earlier while still satisfying the memory data valid window time REAL TIME CLOCK BATTERY REPLACEMENT The on board battery may be replaced using a Varta CR2032 Li Mn 3 volt button cell or equivalent CPU UPGRADE A SPGA socket provides users with a performance upgrade path to the Pentium Overdrive Processors GRAPHICS MEMORY UPGRADE The SOLO single board PC has 1 MB of Fast Page DRAM installed for graphics No expansion is available Page 34 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 35 SOFTWARE DESCRIPTION BIOS SETUP PROVISIONAL This section details the BIOS CMOS Setup Utility The parameters described below are based on BIOS version 1 00 other BIOS versions may differ from the description below as new features are added OVERVIEW OF THE SETUP MENU SCREENS The Setup program initially displays the Main menu screen In each screen there are options for modifying the system configuration Select a sub menu screen by pressing the up T or down lt J gt arrow keys followed by Enter Within the menu use the up 1 or down lt gt keys to select an item then use lt PgUp gt or lt PgDn gt to modify it For certain items pressing Enter will brin
66. onnections after the system is powered down INTR 1 Error nterrupt channel 1 failed POST INTR 2 Error Interrupt channel 2 failed POST Invalid Boot The BIOS can read the disk in floppy drive A but cannot boot the system Use Diskette another boot disk Keyboard Is The keyboard lock on the system is engaged The system must be unlocked to Locked Unlock It continue Keyboard Error There is a timing problem with the keyboard Set the Keyboard option in Standard CMOS Setup to Not Installed to skip the keyboard POST routines KB Interface Error Off Board Parity Parity error in memory installed in an expansion slot The format is Error OFF BOARD PARITY ERROR ADDR HEX XXXX Where is the hex address where the error occurred On Board Parity Parity is not supported on this product this error will not occur Error Parity Error Parity error in system memory at an unknown address Blue Chip Technology Ltd 127 191 doc Page 83 84 ERROR MESSAGES SOLO USER MANUAL ISA NMI MESSAGES ISA NMI MESSAGE EXPLANATION Memory Parity Error at Memory failed XXXXX If the memory location can be determined it is displayed as XXXXX If not the message is Memory Parity Error Card Parity Error at An expansion card failed XXXXX If the address can be determined it is displayed as XXXXX If not the message is Card Parity Error 7 8 microseconds Page 84 127 191 doc Blue Chip
67. product may cause radio interference in which case the user may be required to take adequate measures 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL USER GUIDE PAGE 9 SPECIFICATION SOLO Power 5 5 Required for processor operation Requirement 12 5 Only required with security monitor micro controller option 43 3 V 5 Not required for board operation 5V 59 TheISA 104 amp PCI voltage 12V 5 rails are linked on board Typical System Consumption 35 Watts Pentium 100 16 MB RAM 256 KB L2 cache 3 2 FDD 540 MB HDD Temperature Non Operating 40 C to 70 C Operating 0 C to 55 C min airflow of 200 Shock Non Operating Half sine 2ms 1 m drop Vibration Non Operating 5 Hz 500 Hz 3 1 g RMS random Operating 10 Hz 500 Hz 1 0 g RMS random EMC Emissions 55022 A Immunity EN50082 2 in a Blue Chip ICON Industrial PC Chassis MTBF Estimated 40 000 Hrs Dimensions Board only 338 x 122 mm Power Consumption figures given are for a typical configuration This information is preliminary and is provided only as a guide to calculating approximate total system power usage when additional resources are added Blue Chip Technology Ltd 127 191 doc Page 9 PAGE 10 USER GUIDE SOLO USER MANUAL HARDWARE DESCRIPTION CHIPSET The Intel 82430HX PCIset consists of the 82439HX Xcelerated Controller and 82371SB PCI ISA IDE Xcelerator PIIX3 bridge chip 82439HX XCEL
68. rated PCI Bus Mastering IDE controller with a high performance IDE interface allowing up to two IDE devices such as hard drives CD ROM readers etc The SMC 37C932 Super I O controller integrates the standard PC I O functions floppy interface two FIFO serial ports one EPP ECP capable parallel port a Real Time Clock keyboard and mouse PS 2 controller The SOLO also provides for driving up to three external ISA 16 bit expansion slots In addition to superior hardware capabilities a full set of software drivers and utilities are available to allow advanced operating systems such as Windows 95 to take full advantage of the hardware capabilities Features such as bus mastering IDE Windows 95 ready Plug and Play Advanced Power Management APM are available for the SOLO Page 4 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL USER GUIDE PAGE 5 BOARD LEVEL FEATURES CPU SPGA socket supporting 75 200 MHz operation On board 3 3 V CPU voltage regulator Intel Triton 82430 PCISet chipset 82439HX Xcelerated Controller TXC PIIX3 PCI ISA IDE Accelerator PIIX3 bridge 256KB or 512 KB PipeLine Burst Level 2 cache or 256 KB Asynchronous Level 2 cache using plug in COAST connector Two SIMM sockets providing up to 64MByte of EDO or FPM DRAM C amp T 65545 8 PCI CRT LCD graphics controller with 1 MByte standard video memory ISA amp PC 104 expansion busses SMC 37C932 I O controller providing Dual PCI IDE interfaces
69. s ECP The settings are Auto None DMA DMA CH 1 DMA 2 or DMA CH 3 CH channel The default setting is Disabled HARDWARE IO PORT BASE ADDRESS This specifies the base address of the SOLO configuration and control registers The permissible options are To be advised SERIAL PORT 2 MODE Specifies whether the second serial port will be used as RS232 or RS485 Options are RS232 and RS485 The optimal and fail safe defaults are 5232 56 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 57 RS485 DUPLEX MODE Specifies whether the second serial port will be used as full or half duplex when running in RS485 mode This option is only available when the options Serial Port 2 Mode is set to RS485 The options are FULL or HALF The Optimal and Fail Safe defaults are FULL Blue Chip Technology Ltd 127 191 doc Page 57 PAGE 58 ERROR MESSAGES SOLO USER MANUAL SOLID STATE DISK SUPPORT SOLO supports the use of Solid State Disks SSD using either flash or SRAM devices fitted to the board using the DIL sockets adjacent to the BIOS EPROM socket Please contact Blue Chip Technology s Technical Services for details Page 58 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 59 ADDRESS Maps MEMORY MAP RANGE RANGE DESCRIPTION DECIMAL HEX not available for UMB open to ISA and PCI bus BIOS moveable by QEMM 386MAX VO MAP The follow
70. s are used on the board to select various options Some of the jumpers are factory set to suit particular semiconductor options These must not be disturbed or damage to the board may ensue Refer to the board layout drawing at the end of the manual for the positions of the various jumpers CPU FREQUENCY SELECTION J4 amp J5 The external CPU bus operates at frequencies of 50 60 and 66 MHz but is scaled up internally giving a range of CPU frequencies of 75 to 166 MHz There are four links in two locations involved in CPU frequency selection J4 and J5 Link J4 selects the host CPU operating frequency of 50 60 and 66 MHz Link J5 selects the clock scaling multiplying factor Link J5 is latched by the CPU on reset and used to configure the CPU phase locked loop oscillator This allows higher speed processors to be clocked down e g running a P133 as a P100 but over clocking processors is not recommended as it will degrade the reliability of the device over time Note also that there are internal differences between each of the CPU types i e there are register differences between a P100 and a P133 it is not simply silicon grading as was the case for 486 type CPUs INTERNAL CPU CLOCK SPEED J5 These jumpers sets the internal CPU clock speed to either 1 2 2 or 3 times that of the external CPU clock speed These jumpers should be configured depending on the speed of the processor CPU CLOCK PAIR PAIR MULTIPLIER A B Blue Chip T
71. s designed to prevent reversed fitting of the cache module Please note that each cache module is designed specifically for each chipset i e there are cache modules specific to the 430HX Triton chipset The available options for SOLO cache are 256kbyte asynchronous 256 or 512KByte of synchronous Pipeline burst or none Page 70 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 71 BATTERY CONNECTOR P1 4 WAY HEADER PinN Signal 43 6 Volts DC BUS CONNECTORS ISA BUS XT CONNECTIONS A Large gold fingers on main component side B Large gold fingers on reverse side PINNO SIGNAL PINNO SIGNAL 5805 B jio A6 85 B DREQ 7 A9 sbo B 2 Volts 56477 B A22 59 2 Blue Chip Technology Ltd 127 191 doc Page 71 72 ERROR MESSAGES SOLO USER MANUAL ISA BUS AT CONNECTIONS C Large gold fingers on main component side D Large gold fingers on reverse side PINNO U SIGNAL PINNO SIGNAL 19 95 LA7 DACKO MEMH D9 DREQO Page 72 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 73 PC 104 PC XT CONNECTOR P5 64 WAY SOCKET SIDEA SIGNAL SIDEB SIGNAL 10 4 48 SA12 SA11 IRQ7 6 S 8 9 19 Blue Chip Technology Ltd 127 191 doc Page 73 74 ERROR MESSAGES PC 10
72. sent PRIMARY DISPLAY This option specifies the type of display monitor and adapter in the computer The settings are Mono CGA40 CGA80 EGA VGA or Absent The Optimal and Fail Safe default settings are EGA VGA PASSWORD CHECK This option enables password checking every time the computer is powered on or every time Setup is executed If Always is chosen a user password prompt appears every time the computer is turned on If Setup is chosen the password prompt appears if Setup is executed BOOT TO OS 2 Set this option to Yes to permit AMIBIOS to run with IBM OS 2 The settings are Yes or No The default setting is No WAIT FOR F1 IF ERROR AMIBIOS POST error messages are followed by Press lt gt to continue If this option is set to Disabled AMIBIOS does not wait for you to press lt 1 gt key after an error message The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Enabled Blue Chip Technology Ltd 127 191 doc Page 43 44 ERROR MESSAGES SOLO USER MANUAL HIT DEL MESSAGE DISPLAY Set this option to Disabled to prevent Hit lt DEL gt if you want to run Setup from appearing on the first AMIBIOS screen when the computer boots The settings are Disabled or Enabled The Optimal and Fail Safe default settings are Enabled INTERNAL CACHE This option specifies the caching algorithm used for L1 internal cache memory The settings are SETTING DESCRIPTION Disabled Neit
73. ssage occurs press lt F1 gt to run Setup Utility The table of messages is shown on the next page Page 82 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 83 ERROR EXPLANATION MESSAGE 8042 Gate A20 Gate A20 on the keyboard controller 8042 is not working Replace the 8042 Error Cache Memory Cache memory is defective Replace it Bad Do Not Enable Cache CMOS Battery State CMOS is powered by a battery The battery power is low Replace the Low battery CMOS Checksum After CMOS RAM values are saved a checksum value is generated for error Failure checking The previous value is different from the current value Run AMIBIOS Setup Options Not Set Setup Type Mismatch Run AMIBIOS Setup Size Mismatch CMOS RAM Run AMIBIOS Setup CMOS Time and Run Standard CMOS Setup to set the date and time in CMOS RAM Date Not Set Diskette Boot he boot disk in floppy drive A is corrupt It cannot be used to boot the Failure system Use another boot disk and follow the screen instructions Display Switch Not The display jumper is not implemented on this product this error will not Proper occur DMA Error DMA 1 Error DMA 2 Error FDD Controller The BIOS cannot communicate with the floppy disk drive controller Check all Failure appropriate connections after the system is powered down HDD Controller The BIOS cannot communicate with the hard disk drive controller Check all Failure appropriate c
74. static precautions ideally wear an approved wrist strap or touch a suitable ground to discharge any static build up This should be repeated if the handling is for any length of time When carrying the board around please place it into the non conductive bag in which it came This will prevent any static electricity build up ON BOARD BATTERY This board is fitted with a Lithium battery Great care should be taken with this type of battery Under NO circumstances should the outputs be shorted be exposed to temperatures in excess of 100 C be burnt e be immersed in water e be unsoldered e be recharged be disassembled If the battery is mistreated in any way there is a very real possibility of fire explosion and harm Page 2 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL INTRODUCTION PAGE 3 RELATED PUBLICATIONS The following publications will provide useful information related to the Standard Personal Computer and can be used in conjunction with this manual e IBM Personal Computer AT Technical Reference 1502494 IBM 1984 e IBM Personal System 2 and Personal Computer BIOS Interface Technical Reference 15F0306 1987 e The Programmers PC Sourcebook Microsoft e The Winn L Rosch Hardware Bible Brady PC104 Consortium Technical Specification TRADEMARKS IBM PC AT and PS 2 are trademarks of International Business Machines Corporation IBM AMI Hi Flex BIOS is a trademark of Am
75. th contact Most EMC problems are caused by the external cabling to boards It is imperative that any external cabling to the board is totally screened and that the screen of the cable connects to the metal end bracket of the board and hence to earth It is recommended that round screened cables with a braided wire screen are used in preference to those with a foil screen and drain wire Use metal connector shells which connect around the full circumference of the screen they are far superior to those which earth the screen by a simple pig tail Blue Chip Technology Ltd 127 191 doc Page 7 8 USER GUIDE SOLO USER MANUAL The keyboard will play an important part in the compatibility of the processor card since it is a port into the board Similarly it will affect the compatibility of the complete system A fully compatible keyboard must be used otherwise the complete system could be degraded The keyboard itself may radiate or behave as if keys are pressed when subject to interference Under these circumstances it may be beneficial to add a ferrite clamp on the keyboard lead as close as possible to the connector A suitable type is the Chomerics type H8FE 1004 AS Ensure that the screens of any external cables are bonded to a good RF earth at the remote end of the cable Failure to observe these recommendations may invalidate the EMC compliance Page 8 Warning This is a Class A product In a domestic environment this
76. to the system It is configured exactly as described under Primary IDE Master above The default is Not Installed SECONDARY IDE SLAVE This reports if a secondary slave IDE hard disk is connected to the system It is configured exactly as described under Primary IDE Master above The default is Not Installed NUMBER OF CYLINDERS If Hard Disk Type is set to User Definable you must type the correct number of cylinders for your hard disk If Hard Disk Type is set to Auto Configured this reports the number of cylinders for your hard disk and cannot be modified NUMBER OF HEADS If Hard Disk Type is set to User Definable you must type the correct number of heads for your hard disk If Hard Disk Type is set to Auto Configured this reports the number of heads for your hard disk and cannot be modified NUMBER OF SECTORS If Hard Disk Type is set to User Definable you must type the correct number of sectors for your hard disk If Hard Disk Type is set to Auto Configured this reports the number of sectors for your hard disk and cannot be modified Page 40 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 41 ADVANCED SYSTEM SETUP QUICK BOOT Set this option to Enabled to instruct the BIOS to boot quickly If set to Enabled the BIOS does not test memory above 1 MB and the BIOS does not wait up to 40 seconds for a READY signal from the hard drive If the READY signal is not received i
77. ue Chip Technology Ltd 127 191 doc Page 67 PAGE 68 ERROR MESSAGES SOLO USER MANUAL AUDIO CONNECTOR P8 8 WAY HEADER PinNo Pino Signal 5 6 Not Used Audio Ground 8 Audio Ground 9 Line Out Left Line Out Right FLOPPY DISK DRIVE CONNECTOR P12 34 WAY HEADER PINNe SIGNAL SIGNAL 5 6 7 8 Index 9 Gowd 10 Motor RS485 SERIAL PORT 2 14 10 WAY HEADER NO SIGNAL PIN NO SIGNAL Rx FDX Term 10 K to 5V Rx FDX ELE Rx Tx HDX RX Tx HDX L 9 10 Gnd Page 68 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL ERROR MESSAGES PAGE 69 RS232 SERIAL PORT 3 P15 10 WAY HEADER Data Carrier Detect Data Set Read Ready To Send Transmit Data 6 Clear To Send Data Term Read 8 Rlor POWER 9 Ground 10S Notused RS232 SERIAL PORT 4 P17 10 WAY HEADER PinNo Signal Pino Signal 5 TrasmtDaa 6 7 DataTermReady 8 RlorPOWER P Ground 10 SUPERVISORY CONNECTOR P24 5 WAY 2MM HEADER e M Analogue 0 or Analogue 1 or Magstripe Clock Magstripe Data 3 Ground 4 Sots Card Present The usage of pins on this connector depends on the version of microcontroller fitted at the factory Please check with your supplier
78. upt controller Keyboard test started clearing output buffer checking for stuck key to issue keyboard reset command 81 Keyboard reset error stuck key found To issue keyboard controller interface test command 58 59 62 65 F 7 Blue Chip Technology Ltd 127 191 doc Page 79 PAGE 80 ERROR MESSAGES SOLO USER MANUAL CODE DESCRIPTION 82 Keyboard controller interface test over To write command byte and init circular buffer Command byte written Global data init done To check for lock key Lock key checking over To check for memory size mismatch with CMOS Memory size check done To display soft error and check for password or bypass setup 86 Password checked About to do programming before setup Programming before setup complete To uncompress SETUP code and execute CMOS setup 87 88 Returned from CMOS setup program and screen is cleared About to do programming after setup eee message Mouse check and extended BIOS data area allocation to be done Setup options programming after CMOS setup about to start 8D Going for hard disk controller reset Going to do any init before C800 optional ROM control control will be done next processing after optional ROM returns control and enable external cache Any initialisation required after optional ROM test over Going to setup timer data area and printer base address Return after setting timer and printer base address Going to set th
79. vailable options to specify the physical size and capacity of the diskette drive The options are Disabled 360 KB 5 25 inch 1 2 MB 5 25 inch 720 KB 3 5 inch 1 44 1 25 MB 3 5 inch 2 88 MB 3 5 inch The default is 1 44 MB 3 5 inch FLOPPY B TYPE When selected this allows you to cycle through the available options to specify the physical size and capacity of the diskette drive The options are Disabled 360 KB 5 25 inch 1 2 MB 5 25 inch 720 KB 3 5 inch 1 44 1 25 MB 3 5 inch 2 88 MB 3 5 inch The default is Disabled PRIMARY IDE MASTER This reports if a primary master IDE hard disk is connected to the system and allows for the configuration of drive parameters When selected this allows the manual configuration of the hard drive or have the system auto configure it The options are Auto Configured User Definable and Disabled There are also options for IDE CD ROM and 46 predefined hard drive types If you select User Definable then the Number of Cylinders Number of Heads and Number of Sectors can each be modified The default for this is Auto Blue Chip Technology Ltd 127 191 doc Page 39 PAGE 40 ERROR MESSAGES SOLO USER MANUAL PRIMARY IDE SLAVE This reports if a primary slave IDE hard disk is connected to the system It is configured exactly as described under Primary IDE Master above The default is Not Installed SECONDARY IDE MASTER This reports if a secondary master IDE hard disk is connected
80. vironments DISPLAY CAPABILITIES SOLO can support the following CRT LCD resolutions and colours simultaneously CRT MODE MONO LCD DD STN 9 BIT TFT SIMULTANEOUS RESOLUTION COLOUR GREY COLOURS COLOURS DISPLAY SCALES 320x200 256 256K 61 61 256 226 981 256 185 193 640x480 16 256K 16 61 16 226 981 16 185 193 640x480 256 256K 61 61 256 226 981 256 185 193 Yes 800x600 16 256K 16 61 16 226 981 16 185 193 800x600 256 256K 61 61 256 226 981 256 185 193 1024x768 16 256K 16 61 16 226 981 16 185 193 1024x768 256 256K 61 61 256 226 981 256 185 193 Blue Chip Technology Ltd 127 191 doc Page 15 PAGE 16 USER GUIDE SOLO USER MANUAL STANDARD VIDEO MODES s p qi HEX MODE DISPLAY RES FREQ HZ 40x25 320x350 40x25 320x200 2 3 16 80 25 720 400 31 5 70 80 25 640 350 80 25 640 200 40 25 320 200 40 25 320 200 80x25 640x200 Text Mono 80x25 720x400 31 5 70 80x25 720 350 Plana 16 40 25 20 200 4 16 3 16 256 Packed 255 40x25 320x200 Page 16 127 191 doc Blue Chip Technology Ltd SOLO USER MANUAL HARDWARE DESCRIPTION PAGE 17 EXTENDED VIDEO MODES MODE DISPLAY COLOURS TEXT PIXEL V HEX MODE DISPLAY RES FREQ HZ 20 4bitlinear 16 8050 640480 315 60 22 4bitlinear 16 10037 800x600 375 60 24 4bitlinear 16 128x48 1024x768 485 60 241 21 4bitlinear 466 7 1280x1024 355 43 30 32 34 34

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