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AP32287 - XMC1000/XMC4000 - Capture Compare Unit 4

1. 2 Output Pattern Generation with CCU4 2 1 The Principle Compare Blocks y 0 3 PRy Period Register Compare Register CRy DEV_CCUA_01_Compare_Principle_Blocks vsd Figure 13 The Compare Blocks 2 1 1 PWM Range 0 100 in Up Count Mode The Up Count Mode of Compare Rule is very simple As long as the timer register value is equal or greater than the compare register value the Status Bit CCST or even named CCU4xSTy is set to one Otherwise it is set to zero The dynamic PWM range can be set to any value from 0 up to 100 CR gt PR Period PR sHeaggsseesHSdsHSrsesneee sess desc gg ese ae soe t Sete ee en sees sone a aeaaeai Compare Level Timer TR CR time Duty Cycle 100 Status Bit PWM Duty Cycle 0 DEV_CCU4_01_Compare_PWM_Range_Edge_Aligned_in_Up_Count_Mode vsd Figure 14 PWM Range in Up Count Mode 2 1 2 PWM Range 0 100 in Down Count Mode The Down Count Mode of Compare Rule is the same as in Up Count Mode When the timer register value is equal or greater than the compare register value the Status Bit CCST CCU4xSTy is set to one Otherwise it is set to zero The dynamic PWM range can be set to any value from 0 to 100 Application Note 20 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 CR gt PR Panoa PR Aas Bess e N ana see 0 lt
2. ccsccesesssesscesecsseseeeseceeeeseeeecesecaeeeeeesecaaeeneeaees 12 1 7 3 Asymmetric Compare Events vey cscceessssssevssepvacersdesvessaveacssssueavesseedersssecedeyh E ETEei 13 1 7 4 Shadow Transfers in General Compound Shadow Transfers cccccsscsessesseesssesseessseeseeeseees 13 1 7 5 CCU4 Output State and Output Pin PASSIVE ACTIVE Level Control cccecsecsessessseeseeeseees 13 1 7 6 HOW toStarta TIMER meneen aene trestle tote E se ence E eens nea 13 1 7 7 Global Start Of CCU isc ccccseccieceveceesscszcecenssovteescesvcesnntosnecgetensecsetedsnccebaucuccebavebssebiaseceeselesessatbeotea ds 14 1 8 Example Use Case Periodically changing the PWM Duty Cycle ccscesscssessseescesecsteseessecsneeneeeees 15 1 8 1 Deriving the Period and Compare Values cscssssscessessesscesecseeescesecssessesseceaeeseesecesecseeeneeaeenes 15 1 8 2 Macro and variable Settings cccescssccssssscsescsseeseesecesecseesscsecsseeecesecseseaeaseceaeeseeseceeesseseneeaeenes 16 1 8 3 XMC Lib Peripheral Configuration Structure cccssesscssscseescesecssesseeescssecseseecesecseeeeeeeeseseneesees 16 1 8 4 Interrupt Service Routine Function Implementation ccscssesssesecseseseeceeeeseeescesecseeeeesseeaes 17 1 8 5 Main Function IMpleMentation ccccccsccsssesssecssecssecssecsseceecsssssesssesesesecsasesssecssecsuecsaeceascsseenes 17 1 8 6 Implementation to Start timer by Software 0 eeceseessesscssecseeseeesecsseeseese
3. External Event Up to 3 Events Function Timer Input Functions Target Event Source f Profile Selectable of Inputs that may be controlled Timer Sources Select Edge or Level Select by the Events 0 1 or 2 Slice Edge signal to start the timer Edge signal to stop the timer Period Reg Edge signal to capture into reg 0 amp 1 aaa Edge signal to capture into reg 2 amp 3 rue Level signal to gate the timer clock Level signal to up down count direction Timer Reg Edge signal to load the Timer i Edge signal to count events Status bit override with an input value Level signal to trap for fail safe op Level signal to modulate the output Compare Reg 3 Events Control Connect Matrix DEV_CCU4_02_Capture_External_Events_Control_Komplex vsd Figure 27 Capture by External Events Control 3 1 4 Timer Inputs from Capture There are 3 selectable input lines with configurable source event condition profiles available for Capture by external event control functions extendable in the CC4yTC register There is also a read access register ECRD that simplifies the administration of capture registers and full flags when more than 1 slice is used Capture mode Application Note 35 V1 0 2015 07 Capture Compare Unit 4 CCU4 C 1 AP32287 In Ineon Advanced Signal Measurement 3 1 5 External Control by Capture Event
4. ccuaosts ae es po INPUTS oo CR3 PWM 3 Selector CCU4OIN3 P A DEV_CCU4_00_CCU4xCC4y_Slices_rev1 vsd Figure3 The Four Capture Compare unit CCU40 CCU43 basic system for CAPCOM4 1 2 CCU4 Use Cases Here are some typical example use cases that demonstrate the various capabilities of the CAPCOM timer Slices of the CCU4 1 Simple Time Base with synchronization option by external events control 2 Power Conversion System PFC SMPS using Single Shot Mode Application Note 6 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 m Feedback Sensor Event monitoring and Revolution by Capture Count and Position Interface facilities POSIF Multi Signal Pattern on Output Pins created by parallel Multi Channel Control Drive amp Motor Control with Multi Phase System Phase Adjustment and Trap Handling 3 Level PWM for Inverters and Direct Torque Control DTC of AC Motors and High Precision Synchronous Motors External Events Control of Timer Input Functions by requests from external system units Dithering PWM or period for DC Level precision Reduced EMI Fractional Split of Reriods into Micro Step Auto Adjusting Time Base by Floating Prescaler for adaption of time measurement to a wide range of dynamics The same use cases are illustrated in the following figure
5. Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 Enable XMC_CCU4_Init MODULE Start the prescaler and restore cloc XMC_CCU4_StartPrescaler MODULE clock nabl T _PTR XMC_CCU4 SLICE E Enable clock enable prescaler block and configure global control prescaler block and configure global control MCMS ACTION TRANSFER PR CR ks to _PTR E Start of CCU4 configurations XMC_CCU4_ SetModuleClock MODULE Initialize the Slice XMC_CCU4_SLICE Program du XMC_CCU4_S XMC_CCU4_S XMC_CCU4 uint32_t XMC_CCU4_SHADOW_1 XMC_CCU4_SHADOW_TRANSF B ty cycle ICE _CompareInit SLICEO PTR ICE SetTimerCompareMatch SLIC _SetTimerPeriodMatch SLICEO PTR Ensure fCCU reaches CCU40 PTR XMC_CCU4_ Configure Slice s Functions Interrupts and Start up amp SLIC Enable shadow transfer EnableShadowTransfer MODULE _PTR slices CLOCK SCU EO config 33 33 at 1Hz frequency EO PTR comparevalue count 62499U TRANSF Enable XMC_CCU4_S XMC CCU4 SLICE EVENT 0 XMC_CCU4_SLICE XMC_CCU4_SLICE XMC_CCU4_SLIC External Start to ICE _ConfigureEven ER SLIC E O PR ESCAL ER Event 0 t SLICEO PTR amp S _St
6. Start the Timer for example controllable by external events via 3 selectable input lines with configurable source event profile conditions to the Timer Slices CC4y y 0 3 of a CCU4x unit for Start Stop Capture0 3 Gate Up Down Load Count Bit Override Trap and Modulate Output Control There are also some Extended Input Functions in the register CC4yTC for Extended Start Stop with Flush Start Flush Stop or Flush or Extended Capture Mode Together with a read access register ECRD these simplify the administration of capture registers and full flags when more than one slice is used in Capture mode 1 5 Capture Basics Each CAPCOM4 CCU4x has 4 timer slices Each slice has 4 capture value registers split into 2 pairs that capture on selected event control input CaptO or Capt1 according to 2 possible pair schemes either as 2 pairs for different events respectively to CaptO and Captl1 or cascaded for the same event via Capt1 CCU4x x 0 3 Service CC4y Multi Channel Period Shadow Reg Edge Patt 4 Service tion anem Request Lines Request Period Register Center Control Generation Lines Align Active Output Pin i z Singl i i Slice y Timer 16 bit A Forint Status Bit 4 x Capture 0 9 ees ri EAT Compare Shadow Reg S xinput Input Matrix ontro Floati i Function Control oating Compare Register PWM Selector by 16 Ext
7. Vpeak Offset OV E come ee es ie eee fe Ud ge ae ec Ca 0 90 180 270 360 degree Figure 24 Deriving the Sine Value with reference to Signal Voltage In this example the sinuoisodal waveform is divided into 24 sample points Each change in PWM duty cycle is the equivalent of one DAC sample The CCU4 period is fixed at 24 kHz The calculation for the look up table is as shown below Application Note 28 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Output Pattern Generation with CCU4 Signal frequency Duty Cycle Compare value Table 4 Calculated Look Up Table for Compare Values Signal frequency fpwm Number of Samples DC CCU A cea9 CRS 1 DC PRS 1 _ Sine Value with offset Signal Voltage Infineon Angle Step Sine Value Sine Value Duty Cycle Compare Value degree with Offset CRS 0 or 360 0 000 1 650 50 00 1333 15 0 259 2 077 62 94 988 30 0 500 2 475 75 00 667 45 0 707 2 817 85 36 390 60 0 866 3 079 93 30 179 T5 0 966 3 244 98 30 45 90 1 000 3 300 100 00 0 105 0 966 3 244 98 30 45 120 0 866 3 079 93 30 179 135 0 707 2 817 85 36 390 150 0 500 2 475 75 00 667 165 0 259 2 077 62 94 988 180 0 000 1 650 50 00 1333 195 0 259 1 223 37 06 1678 210 0 500 0 825 25 00 2000 225 0 707 0 483 14 64 2276 240 0 866 0 221 6 70 2487 255 0 966 0 056 1 70 2621 270 1
8. Interrupt Interrupt Edge Aligned Mode PWM generation Compare Time Measurement Capture Capture 0 gt 0 t to Reset Clear l mane PWM lt 1 r Gate Input to ti Counter Compare Single Shot Option Up Down Count Control Center Aligned Mode Symmetric or Asymmetric PWM Count Period 3 3 Period Sy et aE RES I 6 Asymmetric 5 i Compare Level II i Compare ie Symmetric 3 i Level I 2 i I 1 V o gt o i i gt 0 gt Time ot 1 Time Time Count Input MUU M 1m PWM ti to lt period gt U D Control Count D fg i Input T Gount up iT T2 T3 TA a x KS Start Stop DEV_CCU4_00_Basics vsd Figure 2 Application Note Basic functions of each Timer Slice V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 The CAPCOM4 RACK Timer Concatenation gt CC43 a ae Multi Channel a Edge Modula MCI3 PS3 PR3 Center
9. MODULE PTR Start of CCU4 configurations Ensure fCCU reaches CCU40 Dy XMC_CCU4_SetModuleClock MODULE_PTR Initialize the Slice XMC CCU4 CLOCK SCU Configure Slice s Functions Interrupts and Start up XMC CCU4 SLICE CompareInit SLICE0 PTR amp SLICEO config XMC CCU4 SLICE CaptureInit CAPTURE SLICE PTR amp capture_config Program duty cycle 33 3 and frequency 24 KHz XMC_CCU4 SLICE SetTimerCompareMatch SLICEO PTR 1777 XMC_CCU4 SLICE SetTimerPeriodMatch SLICEO PTR 2665U Enable shadow transfer for PWM and Capture Slices XMC_CCU4_ EnableShadowTransfer MODU uint32 t XMC CCU4 SHADOW E PTR TRANSFER SLICE 0 XMC_CCU4_SHADOW_TRANSFER_S Configure events XMC_CCU4 SLICE Capture0Config CAPT XMC CCU4 SLICE CapturelConfig CAPT XMC CCU4 SLICE ConfigureEvent CAPT TCE 1 URE SLICE PTR XMC CCU4 SLICE EVENT 0 URE SLICE PTR XMC CCU4 SLICE EVENT 1 URE SLICE PTR XMC CCU4 SLICE EVENT 0 amp capture_event0 config XMC CCU4 SLICE ConfigureEvent CAPT URE SLICE PTR XMC CCU4 SLICE EVENT 1 amp capture eventl config Enable events XMC_CCU4_SLICE EnableEvent CAPTURE SLICE PTR XMC_CCU4 SLICE IRQ ID EVENT1 Connect capt
10. uint32 t uint32 t false 0 0 0 XMC CCU4 SLICE uint32 t uint32 t uint32_t uint32_t 0 0 0 0 XMC CCU4 SLICE range 0 PRESCALER MODE NORMAL to 15 2 prescaler OUTPUT PASSIVE LEVEL LOW uint32_ t uint32 t 0 38 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Advanced Signal Measurement XMC Capture Compare Unit 4 CCU4 Configuration for Capture Capture Slice configuration XMC_CCU4_ SLICE CAPTURE CONFIG t capture config fifo enable false timer clear mod XMC CCU4 SLICE TIMER CLEAR MODE ALWAYS Same_event false ignore full flag true prescaler mod XMC_CCU4_ SLICE PRESCALER MODE NORMAL prescaler initval uint32 t 0 float_limit uint32 t 0 timer concatenation uint32 t 0 XMC_CCU4 SLICE EVENT CONFIG t capture _event0O config off time capture mapped input XMC_CCU4 SLICE INPUT C CAPTURE on P0 1 edge XMC_CCU4 SLICE EVENT EDGE SENSITIVITY RISING EDGE level XMC CCU4 SLICE EVENT LEVEL SENSITIVITY ACTIVE HIGH duration XMC CCU4 SLICE EVENT FILTER 7 CYCLES XMC_CCU4 SLICE EVENT CONFIG t capture _eventl_config on time capture mapped input XMC CCU4 SLICE INPUT C CAPTURE on P0 1 edge XMC CCU4 SLICE EVENT ED
11. 000 0 000 0 00 2666 285 0 966 0 056 1 70 2621 300 0 866 0 221 6 70 2487 315 0 707 0 483 14 64 2276 330 0 500 0 825 25 00 2000 345 0 259 1 223 37 06 1678 Application Note 29 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Cinfineon Output Pattern Generation with CCU4 2 2 4 Circuit Diagram and Signals To achieve DAC conversion the output of CAPCOM4 CCU40 0UTO is internally connected to the pull up register The RC low pass filter can be added externally as shown in the figure Another option is to use the internal RC filter that is built in in many oscilloscopes Internal Pull up XMC Duty Cycle Vary UU RC Low Pass Filter P0 0 CCU40 0OUTO Liisi oe ee ee Output Signal a Figure 25 Low Pass RC circuit with XMC CCU40 OUTO to attenuate high frequency 2 2 5 Macro and variable Settings XMC Lib Project includes include lt xmc_ccu4 h gt include lt xmc_gpio h gt include lt xmc_scu h gt Project Macro definitions define MODU define MODU define S E PTR define S E NUMBER EO PTR EO NUMBER define S EO OUTPUT Project Variables Definition volatile uint8 t count 0 uintl6 t comparevalue 24 Application Note 13330 988U 667U 390U 179U 45U OU 45U CCU40 0U ccu40_cc40 0U PO 0 30 sine table for duty cycle V1 0 2015 07 Captur
12. Edge signal to start the timer Edge signal to stop the timer Period Reg Edge signal to capture into reg 0 amp 1 aie Edge signal to capture into reg 2 amp 3 Level signal to gate the timer clock Level signal to up down count direction Timer Reg Edge signal to load the Timer i Edge signal to count events Status bit override with an input value Level signal to trap for fail safe op Level signal to modulate the output 3 Events Compare Reg Control Connect Matrix DEV_CCU4_02_Capture_External_Events_Control_Komplex vsd Figure 31 Single Shot Triggering on External Events 4 1 5 External Control by Single Shot Events Single Shot events trigger external actions via the Top Level Interconnection matrix or they can request an interrupt Each CAPCOM4 has four Service Request Lines and each slice has a dedicated output signal CC4ySR 3 0 selectable to a line via CC4ySRS Therefore Single Shot can act as a delayed trigger for ADC actions or interrupts 4 1 6 Top Level Control of Event Request to from a Timer in Single Shot Mode Top Level control also means conditional control of event requests between a slice and other action providers The Event Request Unit ERU1 and the Top Level Interconnect matrix could combine control and link event signal according to user defined request to action event patterns such
13. Hon CCU40MCSS CCU43 amp CC40 r r 1A Sonia SF A ccu42 witc lt CC40 n n Control O CCU41 GC40 i CCU40 CC40 aa ae Multi Channel i 4 Service Period Shadow FASO Edge Maule Pattern Update lt Request g Period PRO o Control D Transfer Request a Single Active OUTPUT40 Slice0 S Timer T40 Shot Control STATUSO Prescaler ia Compare Shadow CRSO SUT INPUTO n Floating Function Control 2 Prescaler i Compare CRO PWM 0 Selector by 16 External Event Sources a i Timer Concatenation Multi Channel iS gt CC41 S eee F CC41SR ERs Edge Modula MCH PS1 oO lon oc 3 0 e PR1 rine Control CCU40MCSS 8 6 single Actve n _Ccuaoourat cS 2 Slice1 5 T4 Shot Control CCU40ST1 cs x CRS1 T 3xinput INPUT1 2 ee o CRI PWM 1 Selector CCU4OIN1 oo i P A S3 o Timer Concatenation D T Multi Channel ie gt CC42 m e iei 5 eee ERSZ Edge Modula MCI2 PS2 i o CC42SR tion x g PR2 Center __1 CCU40MCSS z O 8 0 5 Align Control 5 6 Single Active CCU400UT42 ic Slice2 T42 Shot cose lug _ccusosT2 D kes CRS2 c So INPUT2 CC42PSC CR2 PWM 2 p CCU40IN2 5 LI Selector c oe P A O D fo tie 7p o ao e Align Control 2 Active CCU400UT43 Slice3 amp T43 Sigle Rassie
14. Single Shot Application Note V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Advanced Signal Measurement 3 2 1 Macro and variable Settings XMC Lib Project includes include lt xmc_ccu4 h gt include lt xmc_gpio h gt include lt xmc_scu h gt Project Macro definitions define MODULE PTR CCU40 define MODULE NUMBER OU define SLICEOQ PTR CCU40_CC40 define SLICEO NUMBER OU define SLICEO OUTPUT PO0_0 define CAPTURE SLICE PTR ccu40_CC41 define CAPTURE SLICE NUMBER 1U Project Variables Definition volatile float captureduty 3 2 2 XMC System Clock Unit SCU Configuration XMC Lib Peripheral Configuration Structure PWM period is calculated based on PCLK which is equivalent to 64 MHz XMC SCU CLOCK _ CONFIG t clock config pclk_ sre 2Ltc sre fdiv 0 idiv 1 F XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK XMC_SCU_CLOCK_RTCCLKSRC_DCO2 XMC Capture Compare Unit 4 CCU4 Configuration for PWM input XMC_CCU4_ SLICE COMPARE CONFIG t SLIC timer mode monoshot z3 shadow_xfer_clear dither timer period dither duty cycle prescaler mode mcm enable prescaler initval float_limit dither limit passive level timer concatenation Application Note uint32 t EO config XMC_CCU4 SLICE TIMER COUNT MODE EA uint32 t uint32 t uint32 t
15. as ADC triggering limited by time windows Application Note 45 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Event Trigger Delay by Single Shot 4 2 Example Use Case Triggering ADC Conversion using CCU4 Single Shot In this example based on XMC1200 a Push Button is connected to P0 0 to simulate a trigger event used to start a timer in Single Shot mode This starts the timer and a Period Match Event is generated at the end of the timer count This triggers an ADC Queue conversion request A conversion takes place on the selected pin once it is triggered The result is stored in the ADC result register corresponding to selected channel An interrupt is generated after the completion of a conversion CCU40 CC40 Period PR PMUS VADC GOCH1 Queue Conversion Channel Event PUSH BUTTON P0 0 POTENTIOMETER P2 5 SLICE Configuration XMC1200 System Clock 32MHz Peripheral Clock 64MHz PWM Frequency 24kHz Mode Edge aligned 1 A falling edge on PUSH BUTTON P0 0 triggers starts CCU40 40 timer on an external start event on Event 0 2 An period match event starts an ADC Queue Conversion on P2 5 At the end of the conversion a channel event is generated The value will be based on the ADC input value 3 A falling edge on PUSH BUTTON PO 0 is detected after the timer is started Since the external start event is configured as clears th
16. fpwm free and focus is calculated as shown below e focus is the frequency of the CCU4 peripheral clock It is the input to the PWM module e fic is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector In this example a prescaler factor of 10 is chosen This results in a prescaler value of 1024 resulting in a 16 us resolution e In order for fpwm frequency of the PWM signal to be 1Hz the CCU4_CC40 PRS register is loaded with value 62499 i fecu Timer frequency fems e Period value CCU4ccao PRS 2 1 fewm Compare value CCU4cc4o CRS 1 DC PRS 1 Table 2 Calculated Prescaler factor Period and Compare Values Type Calculated value Prescaler value 2 1024 Period 1Hz frequency 62499 Compare value 33 33 DC 41668 Compare value 66 67 DC 20831 Application Note 15 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 1 8 2 Macro and variable Settings XMC Lib Project includes include lt xmc_ccu4 h gt include lt xmc_gpio h gt include lt xmc_scu h gt Project Macro definitions define MODULE PTR CCU40 define MODULE NUMBER OU define SLICEO PTR CCU40_CC40 define SLICEO NUMBER OU define SLICEO OUTPUT PO 0 Project Variables Definition volatile uint8 t count 1 uintl6 t comparevalue Calculate
17. 1 0 2015 07 Application Note infir Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 1 7 3 Asymmetric Compare Events The benefit of shadow transfers on both Period Match and One Match is to allow asymmetric compare events to be provided in Center Aligned Mode The real time conditions are similar to handling shadow value updates in Edge Aligned Mode CR value2 by Shadow Transfer CRS value2 ySE 1 by Service Req Period PR s 5 54 ss4 sss se4 che soc Sassen see Asymm Comp Asymm Comp gt time Symm Compare 4 appo sy a5 pg 4 fo a l l l Asymm PWM y 0 3 DEV_CCU4_00_Basics_Asymmetric_PWM_by_SW_Center_Aligned vsd Figure10 Asymmetric Compare by Shadow Transfers on both Period Match and One Match 1 7 4 Shadow Transfers in General Compound Shadow Transfers Beside the Compare register CR values there is also the timer Period register PR and the PWM Active Passive control bit PSL that is updated simultaneously on the SySE flag Dithering or Floating Prescaler values are able to get a simultaneous update via the SyDSE and SyPSE request flags 1 7 5 CCU4 Output State and Output Pin PASSIVE ACTIVE Level Control The PASSIVE ACTIVE state of a slice s internal output CCUxSTy i e status bit CC4yST is controlled by the compare level and the External Modulation Mode The CC4yPSL Pass
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19. 2 Deriving the Period Value In this example the frequency of the sinusoidal waveform generated is fixed at 1 kHz with 24 sample points Therefore the PWM frequency is fixed at 24 kHz The clock relationship between fpwm ftcik and focus is calculated as shown below e focus is the frequency of the CCU4 peripheral clock It is the input to the PWM module e ftcix is the timer resolution used to increment a timer counter Each timer slice supports a dedicated prescaler value selector e In order for fpwm frequency of the PWM signal to be 24 kHz the CCU4_CC40 PRS register is loaded with value 2667 i 2 fecus Timer frequency ftcik a Period value CCUdccao PRS 2 1 fewm Table 3 Calculated Prescaler factor and Period values Type Calculated value Prescaler value 2 1 Period 24 kHz frequency 2665 2 2 3 Generating a Look Up Table DAC resolution is the smallest increment in the analog output voltage that corresponds to an increment in the DAC digital count In other words the finest increment of output voltage level is directly proportional to incrementing the CCU4 PWM duty cycle value In general the resolution increases with the increase of sample points in the PWM signal Angle Step Number of Sample points 24 gt lt 3BV4 erer rria e Angle Step 360 Number of Samples 15 degree Sine Value camel Sine Angel Step Signal Sine Value with Offset 4 Voltage Sine Value
20. 4yPR 60 CC4yPR 120 CC4yPR 120 Requests CC4yPSL 0 CC4yPSL 0 CC4yPSL 1 CC4yPSL 1 Cleared y 0 2 y 0 2 y 0 2 y 0 2 DEV_CCU4_01_Shadow_Transfer_in_General_v1 vsd Figure 19 Compound Shadow Transfer Mechanism with Coherent Update of PWM 2 1 5 CCU4 Output Control Compare Mode The Passive Active state of a slice internal output CCUxSTy status bit CC4yST is controlled by the compare level and External Modulation Mode The CC4yPSL Passive Active bit PSL controls whether the external output pin state CCU4xOUTy for example the PWM should be Passive Low Active High or vice versa 2 1 6 Event Request in Compare Mode A compare event can trigger external actions via the Top Level Interconnect matrix or by an interrupt Each CAPCOM4 has four Service Request Lines and each slice has a dedicated output signal CC4ySR 3 0 selectable to a specific line by CC4ySRS For example compare events can request for immediate ADC actions or interrupts Application Note 24 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 Top Level control also means conditional control of event requests between a slice and other action providers The Event Request Unit ERU1 can be combined with the Top Level Interconnect matrix to control and link event signals according to user defined request to action event patterns For example ADC triggering combined on I O events Aslice interfac
21. BIT sample_time_std_conv 3U conversion mode _emux XMC VADC CONVMODE 12BIT sampling phase emux channel 3U hy classl conversion mode standard XMC_VADC_CONVMODE_12BIT sample time std_conv 3U conversion mode _emux XMC_VADC_CONVMODE_12BIT sampling phase emux channel 3U hy data_reduction_ control 0 wait for read mod true vent_gen_enabl false boundary0 0 boundaryl 0 F Application Note 47 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Event Trigger Delay by Single Shot Initialization data of a VADC group XMC VADC GROUP CONFIG t g group handle XMC_VADC_CONVMODE_12BIT 3U XMC_VADC_CONVMODE_12BIT 3U XMC_VADC_CONVMODE_12BIT 3U XMC_VADC_CONVMODE_12BIT 3U XMC VADC GROUP ARBMODE ALWAYS Class0 conversion mode _ standard sample_time_std_conv conversion mode _emux sampling phase emux_ channel classl conversion mode standard sample time _std_conv conversion mode _emux sampling phase emux channel arbitration_round_length 0x0U arbiter mode boundary0 boundaryl emux config 0 Boundary O 0 Boundary 1 emux_ mode stce_ usage emux_ coding Starting external channel connected channel Identifier of the hardware group XMC VADC _ GROUP t g group identifier VADC_GROUP_PTR Channel configuration data XMC_VADC_CHANNEL CONFIG t g_chan
22. CR lt PR Compare Level Timer TR CR time Duty Cycle 100 Status Bit PWM Duty Cycle 0 DEV_CCU4_01_Compare_PWM_Range_Edge_Aligned_in_Down_Count_Mode vsd Figure 15 PWM Range in Down Count Mode 2 1 3 PWM Range 0 100 in Center Aligned Mode The Center Aligned Mode of Compare Rule is the same as Up or Down Count Modes When the timer register value is equal or greater than the compare register value the Status Bit CCST or CCU4xSTy is set to one Otherwise it is set to zero The PWM value can be varied from 0 to 100 CR gt PR Period PR Se sepsss sess pea ee ee a Se ee ia OS Recessed Compare Level y Timer TR NY M 22 Me gt time Duty Cycle Duty Cycle 100 Status Bit PWM Duty Cycle 0 DEV_CCU4_01_Compare_PWM_Duty_Cycle_Range_Center_Aligned_Mode vsd Figure 16 PWM Range 0 100 in Center Aligned Mode 2 1 4 Compare Reload with Shadow Transfer Rules A reload of registers by Shadow Transfers from the associated shadow registers occurs according to the following rules e Inthe next clock cycle after a Period Match while counting up e Inthe next clock cycle after a One Match while counting down e Immediately if the timer is stopped and a transfer request was triggered Application Note 21 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation w
23. EDGE level XMC CCU4 SLICE EVENT LEVEL SENSITIVITY ACTIVE HIGH duration XMC_CCU4 SLICE EVENT FILTER 3 CYCLES F XMC GPIO Configuration XMC GPIO CONFIG t SLICEO OUTPUT config mode XMC GPIO MODE OUTPUT PUSH PULL ALT4 input_hysteresis XMC_GPIO INPUT HYSTERESIS STANDARD output_level XMC_GPIO OUTPUT LEVEL LOW 1 8 4 Interrupt Service Routine Function Implementation The CCU40 interrupt handler function is created to periodically modify the timer compare match values to achieve a PWM duty cycle between 33 3 and 66 7 void CCU40 0 IRQHandler void Clear pending interrupt XMC_CCU4_ SLICE ClearEvent SLICEO PTR XMC_CCU4_ SLICE IRQ ID COMPARE MATCH UP Set new duty cycle value XMC_CCU4 SLICE SetTimerCompareMatch SLICEO PTR comparevalue count count if count 2 count 0 Enable shadow transfer for the new PWM value update XMC_CCU4_EnableShadowTransfer MODULE PTR XMC_CCU4_ SHADOW TRANSFER SLICE 0 1 8 5 Main Function Implementation Before the start and execution of the timer slice software for the first time the CCU4 must have been initialized appropriately using the following sequence e Setup the system clock Ensure clock frequency is set at 64MHz 2 MCLK XMC_SCU_CLOCK_Init amp clock_config Application Note 17 V1 0 2015 07
24. GE SENSITIVITY FALLING EDGE level XMC CCU4 SLICE EVENT LEVEL SENSITIVITY ACTIVE HIGH duration XMC CCU4 SLICE EVENT FILTER 7 CYCLES XMC GPIO Configuration XMC_GPIO CONFIG t SLICE0 OUTPUT_config mode XMC GPIO MODE OUTPUT PUSH PULL ALT4 input_hysteresis XMC GPIO INPUT HYSTERESIS STANDARD output_ level XMC GPIO OUTPUT LEVEL LOW 3 2 3 Interrupt Service Routine Function Implementation The CCU40 interrupt handler function reads the captured values to calculate the duty cycle on Event 1 Interrupt handler at event 1 to read the captured on time and off time to calculate the captured duty cycle value void CCU40 2 IRQHandler void uint32_t capturedvalue0 uint32_t capturedvaluel uint32_t capturedvalue2 Application Note 39 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Advanced Signal Measurement uint32 t capturedvalue3 uint32 t offtime uint32 t ontime uint32 t totalperiod Clear pending interrupt XMC_CCU4_ SLICE ClearEvent CAPTURE SLICE PTR XMC_CCU4 SLICE IRQ ID EVENTI Read the captured registered capturedvalueO XMC_CCU4 SLICE GetCaptureRegisterValue CAPTURE SLICE PTR OU capturedvaluel XMC_CCU4 SLICE GetCaptureRegisterValue CAPTURE SLICE PTR 1U capturedvalue2 XMC_CCU4 SLICE GetCaptureRegisterValue CAPTURE SLICE PTR 2U ca
25. Infineon XMC1000 XMC4000 32 bit Microcontroller Series for Industrial Applications Capture Compare Unit 4 CCU4 AP32287 Application Note About this document Scope and purpose This application note provides a brief introduction to the key features of the CCU4 module and typical application examples It also includes hints on its usage for users who wish to develop motor control application with XMC microcontroller family Intended audience This document is intended for engineers who are familiar with the XMC Microcontroller series Applicable Products e XMC1000 e XMC4000 e DAVE References The User s Manual can be downloaded from http www infineon com XMC DAVE and its resources can be downloaded from http www infineon com DAVE V1 0 1 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Table of Contents Table of Contents ABOUT this document io sc3csscsessiccsctesccoccoscecsvescevensvestanssevstereevsescsoseueceveed es Pon Ess ass sup vissero sbs 1 Table of Contents sisssssccsccssscscesscestedesestesssescssedecescosesessosesssossesssoseesssosebaseeteseceucesssoseeds rE EI E rt ao 2 1 introduction to the CCUS ss sssccciccsicscidsicessscccsscescesccssccsesedestessessecdsdesesdsesscossssccessesesessaeceesss 4 1 1 Basic Timer PUMCTIONS essorer eerie rosserie eae seie eee eeii esa enie aese Naeris i 4 1 2 CCUA USE CASO aeee ea e ie a NE EE a ei eE EERE E n e E Ei 6 1 3 Additional CCUA Fea
26. Routine Function Implementation The ADC interrupt handler function is created to read the ADC conversion result In this example the ADC result is stored to a local variable void VADCO Gl _ 0 IRQHandler void XMC_VADC RESULT SIZE t result Read the result register result XMC_VADC_GROUP_ GetResult g_ group _identifier RES REG NUMBER Clear result event XMC_VADC_GROUP_ClearResultEvent g group identifier RES REG NUMBER Acknowledge the interrupt XMC VADC GROUP QueueClearReqSrcEvent g_ group identifier result result Application specific code using ADC result can added 4 2 4 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU4 must be initialized appropriately using the following sequence e Setup the system clock Ensure clock frequency is set at 64MHz 2 MCLK XMC SCU CLOCK Init amp clock_ config e Enable clock enable prescaler block and configure global control Enable clock enable prescaler block and configure global control XMC_CCU4 Init MODULE PTR XMC CCU4 SLICE MCMS ACTION TRANSFER PR CR Start the prescaler and restore clocks to slices XMC_CCU4_StartPrescaler MODULE PTR Start of CCU4 configurations Ensure fCCU reaches CCU40 XMC_CCU4 SetModuleClock MODULE PTR XMC_CCU4 CLOCK SCU Applicatio
27. SSM Both the timer and its Run Bit TRB is cleared by a Timer Period End that occurs after the TSSM bit is set and the timer is stopped A time frame for example a Single Shot Delay is set by the timer start conditions selected counting mode and the period PR value Single Shot in Edge Aligned Mode Single Shot in Center Aligned Mode TCM 0 TCM 1 Timer is Running Timer is Timer is Running Timer is lt PR gt Stopped lt PR gt Stopped _ lt CR gt __ gt SS TRB gt TSSM a a gt PR Period TE CR Compare Register TRB Timer Run Bit Timer Single Shot Mode TCM Timer Counting Mode can be set anytime here CCST Status Bit DEV_CCU4_03_Single_Shot vsd Figure 29 Timer in Single Shot Mode for Edge Aligned and Center Aligned Mode Application Note 43 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Event Trigger Delay by Single Shot 4 1 2 Using Timer Single Shot Delay for Noise Rejection Control Signal Trigger Noise Trigger Noise Event J Event J Shunt Me Current A AN z Timer A i gt Start Start Single Single Shot Shot DEV_CCU4_03_Single_Shot_Usage_Example vsd Figure 30 Timer in Single Shot Mode for Noise Rejection in Shunt Current Measurement 4 1 3 Timer Start in Single Shot Mode by External Event Control Atimer start in Single Shot Mode can be linked to external trig
28. U40 OUTO P0 0 Figure 21 Example Generating a Sinusoidal Waveform Application Note 26 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 2 2 1 Theory of operation CCU40_CC40 A i ii T is the ON period Tpwmis the PWM period CR value oa Time PWM Ti Tewm a Duty Cycle am Figure 22 CCU4 PWM Signal with Variable Duty Cycle A given ON time T corresponds to an average DC voltage which is linearly proportional to the duty cycle In the implementation of DAC using CCU4 the duty cycle can be varied while fixing the period value or vice versa Theoretically if the duty cycle of CCU4 is varied with time the signal is filtered the output of the filter is an analog signal In fact passing the CCU4 PWM signal through a low pass filter LPF removes a reasonable amount of ripple A simple RC low pass filter circuit or built in LPF function in signal measurement equipments could be used to eliminate the inherent noise components 50 y h 0 0 15 58 83 69 25 20 33 24 8 1 0 Ki gt Time 50 v Analog i Filter gt Analog Time Figure 23 Process involves ADC to DAC conversion Application Note 27 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 2 2
29. artConfig SLIC START MO ti PTR ER SLICE ICEO event0 config XMC_CCU4 SLICE EVENT 0 O TIM ER START CLEAR E Enable compare match events _Enable Event SLIC EO PTR XMC_CCU4 SLICE IRQ ID COMPARE MATCH UP Connect compare match event to SRO XMC_CCU4_ SLICE SetInterruptNode SLICEO PTR XMC_CCU4 SLICE IRQ ID COMPARE MATCH UP XMC_CCU4 SLICE SR_ID 0 Set NVIC priority NVIC_SetPriority CCU40_0_IRQn 3U Enable IRQ NVIC_EnableIRQ CCU40_0 TROn Enable CCU4 PWM output XMC GPIO Init SLICE0 OUTPUT amp SLICE0 OUTPUT config Get the slice out of idle mode XMC_CCU4_ EnableClock MODULE PTR SLICEQ NUMBER Application Note 18 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Introduction to the CCU4 e Start Timer Running Create a low to high transition on SCU GSC40 to start timer XMC_SCU_SetCcuTriggerLow XMC_SCU_CCU_TRIGGER_CCU40 XMC_SCU_SetCcuTriggerHigh XMC_SCU_CCU_TRIGGER_CCU40 1 8 6 Implementation to Start timer by Software Alternatively the timer can be started directly by software setting the Timer Run Bit Set TRBS Start the TImer XMC_CCU4 SLICE StartTimer SLICEO PTR Application Note 19 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4
30. atch or One Match There is a global register GCSS carrying all enable flags that have to be preset by software to selectively activate the targeted Shadow Transfer Requests which will be cleared by hardware after the transfer The total real time correctness is achieved by the logic operations which is essential for safe power switching The compare values that are targeted for an update operation must be written into CC4yCRS shadow register and the corresponding slice Transfer Set Enable bit For example for an update operation to be completed SySE in GCSS must be preset before Period Match in Edge Aligned Mode or Period One Match in Center Aligned Mode Application Note 22 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 Shadow TrAnsfer No Shadow No Shadow snadow TrAnsTer on Period Match and REquest is on One Match Transfer since Transfer since and REquest is No request No request cleared by HW qu q cleared by HW Timer CC4y CC40CRS 10 CC40CRS 20 CC41CRS 20 CC41CRS 40 CC42CRS 30 CC42CRS 60 SySE 1 CC40CR 10 SySE 1 CC40CR 20 CC41CR 20 CC41CR 40 CC42CR 30 CC42CR 60 Shadow transfer mechanism Coherent update of compare registers by HW SW can write asynchronously to the timer state After all values are updated the shadow transfer is requested by setting SySE At every Period Match or One Match event the HW
31. ated on Port 0 0 This signal shall be connected manually to P0 1 which is the External Capture input for CCU40 41 slice This slice is configured as a capture slice where the timer is cleared on every capture event On a rising edge event a capture event stores the timer value to C2V or C3V On a falling edge event a capture event stores the timer value to COV or C1V The duty cycle for this waveform is calculated based on the values read Application Note 36 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Advanced Signal Measurement CCU40 CC41 Capture Slice CCcaptO COV C1V CCcapt1 C2V 3V E1AS Event 1 SR CCU40 CC40 PWM Input period _ captured duty based on the ontime and CV 33 33 DC CCU40 OUTO P0 0 SLICE Configuration XMC1200 System Clock 32MHz Peripheral Clock 64MHz Mode Edge aligned 1 A rising edge on the input PWM triggers Event0 for a capture event to store the captured timing in C2V C3V 2 Timer is cleared on a capture event 3 A falling edge on the input PWM triggers Event1 for a capture event to store the captured timing in COV C1V Also this triggers an interrupt event and enters the ISR to calculate the offtime Note INPUT PWM can be either a generated output from a function generator output or a CCU slice as shown in this example Figure 28 Example Triggering an ADC conversion using CCU4
32. can perform the transfer and clears the request DEV_CCU4_01_Shadow_Transfer_with_Compare_Registers vsd Figure 18 Shadow Transfer Mechanism with Compare Registers Beside the Compare CR values there are also the timer Period register PR and the PWM Active Passive control bit PSL that are updated simultaneously on the SySE flag Dithering or Floating Prescaler values can also be simultaneously updated by the SyDSE and SyPSE request flags Application Note 23 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Output Pattern Generation with CCU4 Shadow Shadow Shadow Transfers on Transfers on Transfers on No shadow Period Match One Match Period Match Transfers since and Requests and Requests and Requests No requests cleared by HW cleared by HW cleared by HW CC40CR 80 Timer CC4y CC40CR 20 CC40CR 10 gt time Status Bit CC40ST PWM out from Port Pin Output Passiv High Passive Level CC4yPSL Output Passiv Low New CC40CRS 40 CC40CRS 20 Shadow CC41CRS 50 CC41CRS 25 Values CC42CRS 60 CC42CRS 30 CC40CRS 80 SySE 1 CC4yPRS 120 SySE 1 Transfer CC4yPSL 1 Request SySE 1 Flags Only CC40CR has changed Registers ne CC40CR 10 CC40CR 40 CC40CR 20 CC40CR 80 Values CC41CR 20 CC41CR 50 CC41CR 25 CC41CR 25 amp CC42CR 30 CC42CR 60 CC42CR 30 CC42CR 30 Transfer CC4yPR 60 CC
33. ceeeeseesecsecseeeneeaeenes 19 2 Output Pattern Generation With CCU4 cccccsscsscsccscsscsccscescsccscescescscesccscescsscssescsees 20 2 1 The Principle Compare BLOCKS cccssesscessessesscesecseeeseesecssessessecssecseesecesecseesnessecseeeseseecaeeneseeeeaeeneeas 20 2 1 1 PWM Range 0 100 in Up Count Mod e ccesecssssscsseessesseesecseeescesecsseeseeseceaeesessecesesseseeeeaeenes 20 2 1 2 PWM Range 0 100 in Down Count MOde ce eseesceseessesscesecseesscesecsseesecsecaeeseeecesecseseneeaeenes 20 2 1 3 PWM Range 0 100 in Center Aligned Mode 2 eesssssssesececeseenseceeneseesessseseseseasensaseneneees 21 2 1 4 Compare Reload with Shadow Transfer Rules cceccesscssesscesecssesseseceeeeseeeceaecseesseesecseeeneeeees 21 2 1 5 CCU4 Output Control Compare Mode qu eeessesscsssessesecesecseesecaecseeesesseceseseeeceaecaeeeeesseseeeneesees 24 2 1 6 Event Request in Compare Mode 20 esccssesssesscssesseseecesecseesecsecaeesecesecaseesecsecaeeseeseceaecseeeneeseeaes 24 2 2 Example Use Case CCU4 as Digital to Analog Converter DAC ccsseescssecsseescesecseeeeeseeseeeeeesees 26 2 2 1 THEOFY OF operatio eeni tiesai snte a i eek Ne shades os bassete cuoteestatassasdeesfeseeuaoeeseowas 27 2 2 2 Deriving the Period Valsi sisirin n e E a 28 2 2 3 Generating a Look Up Table ssesssssseesssssssersessssssessrsssseseesrssesesesssseseeeesseseseesesessesreseeseseeeesessene 28 2 2 4 Circuit Diagram and Signals sic
34. d based on PCLK of 64MHz 20831U 66 67 duty cycle 41668U 33 33 duty cycle he 1 8 3 XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration PWM period is calculated based on PCLK which is equivalent to 64 MHz XMC SCU CLOCK _ CONFIG t clock config pclk_src XMC_SCU_CLOCK PCLKSRC_DOUBLE MCLK rtc src XMC_SCU CLOCK RTCCLKSRC DCO2 fdiv 0 1 idiv XMC Capture Compare Unit 4 CCU4 Configuration XMC CCU4 SLICE COMPARE CONFIG t SLICEO config timer mode uint32_t XMC_CCU4 SLICE TIMER COUNT MODE EA monoshot uint32 t false Shadow_xfer clear uint32 t 0 dither timer period uint32 t 0 dither duty cycle uint32 t 0 prescaler mode uint32_ t XMC_CCU4 SLICE PRESCALER MODE NORMAL mcm enable uint32 t 0 prescaler initval uint32_t 10 in this case prescaler 2 10 float_limit uint32_t 0 Application Note 16 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Introduction to the CCU4 dither limit uint32 t 0 passive level uint32_t XMC_CCU4 SLICE OUTPUT PASSIVE LEVEL LOW timer concatenation uint32 t 0 F XMC_CCU4_ SLICE EVENT CONFIG t SLICEO event0 config mapped input XMC_CCU4 SLICE INPUT I mapped to SCU GSC40 edge XMC_CCU4 SLICE EVENT EDGE SENSITIVITY RISING
35. de development and portability between applications The following image shows the main function blocks of one of the four CC4y slices on a CCU4x CCU4x x 0 3 Service Request Lines DMA Reset Power Control CC4y Period Shadow Reg Period Register 4 x Capture Compare Shadow Reg Compare Register Clock Control Multi Channel Pattern Generation Output Pin Status Bit Input Matrix Function Control by 16 External Event Sources DEV_CCU4_00_Basics_Slice vsd Figure1 The Timer Slice Block Diagram 1 1 Basic Timer Functions Each CCU4x has four 16 bit timer slices CC4y y 3 0 which can be concatenated up to 64 bits Each slice has e 1Timer e 4Capture registers e 1 Period register e 1Compare register Both the Period and Compare registers have shadow registers Each slice can work independently in different modes but they can also be synchronized even to other CCU4x slices They perform multichannel multi phase pattern generation with parallel updates Each timer slice can be configured to handle the basic functions illustrated in the figure below Application Note V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 Timer Compare Capture Free Running Mode Option Reset Gate
36. dentifier XMC_VADC_GROUP_POWERMODE NORMAL Perform calibration of the converter XMC VADC GLOBAL StartupCalibration VADC Application Note 52 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Cinfineon Revision History 5 Revision History Current Version is V1 0 2015 07 Page or Reference Description of change V1 0 2015 07 Initial Version Application Note 53 V1 0 2015 07 Trademarks of Infineon Technologies AG AURIX C166 CanPAK CIPOS CIPURSE CoolGaN CoolMOS CoolSET CoolSiC CORECONTROL CROSSAVE DAVE DI POL DrBLADE EasyPIM EconoBRIDGE EconoDUAL EconoPACK EconoPIM EiceDRIVER eupec FCOS HITFET HybridPACK ISOFACE IsoPACK i Wafer MIPAQ ModSTACK my d NovalithiIC OmniTune OPTIGA OptiMOS ORIGA POWERCODE PRIMARION PrimePACK PrimeSTACK PROFET PRO SIL RASIC REAL3 ReverSave SatRIC SIEGET SIPMOS SmartLEWIS SOLID FLASH SPOC TEMPFET thinQ TRENCHSTOP TriCore Other Trademarks Advance Design System ADS of Agilent Technologies AMBA ARM MULTI ICE KEIL PRIMECELL REALVIEW THUMB uVision of ARM Limited UK ANSI of American National Standards Institute AUTOSAR of AUTOSAR development partnership Bluetooth of Bluetooth SIG Inc CAT iq
37. different CCUs DEV_CCU4_00_StartTimer vsd Figure 11 External Event Control with Global Start Command Application Note 14 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 1 8 Example Use Case Periodically changing the PWM Duty Cycle This example uses a slice of CCU4 CCU40 Slice 0 to generate a PWM signal output to P0 0 The CCU4 slice is configured in edge aligned mode with a frequency of 1Hz An interrupt is generated on every compare match event which alternates the PWM duty cycle between 33 3 and 66 7 The CCU4 slice is started by an external start event on Event 0 connected to SCU GSC40 It is targeted for XMC1200 CCU40 CC40 SLICE Configuration Period PR XMC1200 5 System Clock 32MHz CR 33 33 DC Peripheral Clock 64MHz CR 66 67 DC PWM frequency 1Hz Mode Edge aligned 1 SCU GSC40 is connected to the CMUS input of Event 0 It is set high by software and starts CCU40 40 timer on Compare Match an external start event on Event 0 2 An interrupt is triggered on every compare match event In this ISR the compare value is updated between 33 33 and 66 67 duty cycle CCU40 OUTO P0 0 Note New compare value is updated at each period match event for this example SCU GSC40 Figure 12 Example Periodic duty cycle update 1 8 1 Deriving the Period and Compare Values The clock relationship between
38. e Compare Unit 4 CCU4 1 AP32287 In Ineon Output Pattern Generation with CCU4 179U 390U 667U 988U 13330 1678U 2000U 2276U 24870 2621U 2666U 2621U 24870 2276U 2000U 1678U F 2 2 6 XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration PWM period is calculated based on PCLK which is equivalent to 64 MHz XMC_SCU_CLOCK_ CONFIG t clock config pclk src XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK rtc_src XMC SCU CLOCK RTCCLKSRC DCO2 fdiv 0 idiv 1 XMC Capture Compare Unit 4 CCU4 Configuration XMC CCU4 SLICE COMPARE CONFIG t SLICEO config timer mode uint32_t XMC_CCU4 SLICE TIMER COUNT MODE EA monoshot uint32 t false Shadow_ xfer clear uint32 t 0 dither timer period uint32 t 0 dither duty cycle uint32 t 0 prescaler mode uint32_ t XMC_CCU4 SLICE PRESCALER MODE NORMAL mcm enable uint32 t 0 prescaler initval uint32_t 0 in this case prescaler 2 0 1 float limit uint32 t 0 dither limit uint32 t 0 passive level uint32_t XMC_CCU4 SLICE OUTPUT PASSIVE LEVEL LOW timer concatenation uint32 t 0 F XMC GPIO Configuration XMC_GPIO CONFIG t SLICEO OUTPUT config Application Note 31 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Output Pat
39. e timer and start timer The timer is cleared and restarted Figure 32 Example Triggering an ADC conversion using CCU4 Single Shot 4 2 1 Macro and variable Settings XMC Lib Project includes include lt xmc_ccu4 h gt include lt xmc_vadc h gt Project Macro definitions CCU4 Macros define MODULE PTR CCU40 define MODULE NUMBER 0U define SLICEO PTR Ccu40_CC40 define SLICEO NUMBER OU Application Note 46 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Event Trigger Delay by Single Shot VADC Macros define RES REG NUMBER 0 define CHANNEL NUMBER 7U define VADC GROUP PTR VADC_G1 P2 5 define VADC_GROUP_ID 1 define IRQ PRIORITY 10U 4 2 2 XMC Lib Peripheral Configuration Structure XMC System Clock Unit SCU Configuration PWM period is calculated based on PCLK which is equivalent to 64 MHz XMC_SCU_CLOCK_ CONFIG t clock config pclk_ sre XMC_SCU_CLOCK_PCLKSRC_DOUBLE_MCLK rtc src XMC_ SCU CLOCK RTCCLKSRC_DCO2 fdiv 0 1 idiv XMC Versatile Analog to Digital Converter VADC Configuration XMC VADC GLOBAL CONFIG t g global handle disable_sleep mode control false clock_config analog_clock divider 3 msb_conversion_clock 0 arbiter_ clock divider 1 hy classO conversion mode standard XMC VADC CONVMODE 12
40. e to ERU1 and to the Top Level Interconnect matrix can be represented by a simplified scheme To complete the picture of the possible interaction this scheme also shows how operations can be extended to involve DMA transfers by the GPDMA triggered by a handler DLR on the Service Request Lines SRn If an application requires ADC conversion to start on timer events under specific conditions rather than directly via a Top Level Interconnect matrix path then the ERU1 is able to offer an alternate signal path This may involve dependence on a port pin a time window from a second timer or a certain sequence of event patterns CHIP EXTERNAL EVENTS co ERU1_xA 3 0 SR5 8 JL TRIGGER K Multi Channel E CCU4xCC4y m Z Service ion Pattern i Requests Control Generation Tf Slice xy E Active Output Pin Ramones oI Passive Status Bit a oO Control x y 0 3 x Input Matrix Z v Function Control f iva Prescaler by 16 External S am Event Sources Z E O connect DEV_CCU4_01_Compare_Top_Level_Interconnect_with_CCU4_Slice_and_ERU vsd Figure 20 Using CCU4 and ERU1 for delayed ADC Start Controlled by an IO The above example shows CCU4xCC4y is a single shot delay timer Status Bit red is delayed and set by the compare event and delays an ADC start when triggered by a PWM timer blue on a GPIO
41. eeeees 44 4 1 5 External Control by Single Shot Events scscissscseccarvaaeiesrsnneumoredssnsaioaniulebeenmenensnaaes 45 4 1 6 Top Level Control of Event Request to from a Timer in Single Shot Mode cceecceteeseeeees 45 4 2 Example Use Case Triggering ADC Conversion using CCU4 Single Shot eeecseeseeseeeeeeeeeeees 46 4 2 1 Macro and variable Settings ii ci scinuccniarsiccyrwntoeucd cane entyseinesseaniuastseusncenecanianipuatensidanentantondencavonnetedes 46 4 2 2 XMC Lib Peripheral Configuration Structure esesssssesssssesesessereererssssssrsssssestsesrsrereesrsssenenessese 47 4 2 3 Interrupt Service Routine Function Implementation sssssssessssssesssssssssssssesereseeseresesssssesssssese 50 4 2 4 Main Function Implementation ccsccssssssssscssessessscesecseesecesecseesseesecaeessessecaeeseseeceaecaeeenseaeeats 50 5 Revision HIStory ssssccsscsuassssacnvsesscesnassdsuovnrsediensadeastinedssoteusadesvuensuss onsesdssusvensedivonsesauienssees 53 Application Note 3 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Introduction to the CCU4 1 Introduction to the CCU4 Cinfineon The CAPCOM4 CCU40 43 is a multi purpose timer unit for signal monitoring conditioning and Pulse Width Modulation PWM signal generation It is designed with repetitive structures and multiple timer slices that have the same base functionality The internal modularity of CCU4 translates into a software friendly system for fast co
42. er has a Full Flag that is set on a capture to the register and cleared on a read from the register At a Capture Input Event Capt1 or Capt0 each register captures data from the next higher indexed register only if that higher register is full and also a lower indexed register is empty The timer is seen as the highest index Application Note 34 V1 0 2015 07 Capture Compare Unit 4 CCU4 i AP32287 n n eon Advanced Signal Measurement Continuous capturing without any effect from any Full Flags is enabled by changing the bit CC4yTC CCS 1 When set registers capture data on the Capture Input Events without taking account of the Full Flag status 3 1 3 Capture by Externals Events Control This scenario involves linking the Capture0 or the Capturel register pairs to external trigger request from any of the following GPIO ERU POSIF CAN CCU4x USIC ADC CCU8x or SCU A connection pin table is given by the Top Level Interconnection Matrix CCU4x x 0 3 Service eee pennants Edge TENT a oa 5 i attern Request Lines Request o Period Register a eooni Generation ines 5 B Active i Q Output Pin li 5 A Single Passive d a O Timer 16 bit H Shot Control Status Bit a Presoaler ia Compare Shadow Reg SATT Eain Wels oating Com Regist PWM unction Contro Prescaler pare hegister Selector by 16 External Clock Control Event Sources
43. ernal Clock Control _Prescaler_ Event Sources DEV_CCU4_00_Basics_Slice_Capture vsd Figure6 Timer Slice with four Capture Registers Application Note 10 V1 0 2015 07 Capture Compare Unit 4 CCU4 C 1 AP32287 In Ineon Introduction to the CCU4 Capture reg 3 Capture reg 2 Capture Inputs CCycapt1 gt Capture Trigger Distribution amp Full Flag Handling Logic Empty Capture on T4 Different om y CCycapt0 gt Capture Trigger Distribution amp Full Flag Handling Logic Capture reg 1 Capture reg 0 Capture reg 3 Capture reg 2 Capture Input CCycapt1 Capture Trigger Distribution amp Full Flag Handling Logic Full Full Empty rene fou a jo gt lt e TH m gt Capture Trigger Distribution amp Full Flag Handling Logic Capture on Same Event and Edge DEV_CCU4_00_Capture_Logic vsd Capture reg 1 Capture reg 0 Figure 7 Basic Capture Mechanism setup in two possible scheme alternatives 1 6 CCU4 Output Control 1 6 1 External Control by Timer Events Atimer event can trigger external actions via the Top Level Interconnect matrix or on request for an Interrupt Each CAPCOM4 has four Service Request Lines and each slice has a dedicated output signal CC4ySR 3 0 selectable to a line by CC4ySRS This means timer slice events can request direct peripheral actions or an interrup
44. f Inputs that may be controlled Sources Select Edge or Level Select by the Events 0 1 or 2 _ Edge signal to start the timer _ Edge signal to stop the timer Period Reg Edge signal to capture into reg 0 amp 1 Evento Edge signal to capture into reg 2 amp 3 nue E 2 9 Level signal to gate the timer clock Evento 1 3 H Level signal to up down count direction Timer Reg O Edge signal to load the Timer Edge signal to count events LP Status bit override with an input value Level signal to trap for fail safe op 3 Events F a a Level signal to modulate the output Control Connect Matrix Compare Reg DEV_CCU4_00_Basics_External_Events_Control_Komplex vsd Figure5 External Control of Timer Input Functions on Events by an External Units 1 4 4 External Event Sources CCU4xCC4y input functions can be linked to external trigger requests from sources such as GPIO ERU POSIF CAN CCU4x USIC ADC CCU8x or SCU Signal connections are given by the top level interconnect matrix and the CC4yINS Input Select vector The CC4yCMC register is used for function selection Application Note 9 V1 0 2015 07 Capture Compare Unit 4 CCU4 C 1 AP32287 n n eon Introduction to the CCU4 1 4 5 External Event Input Functions There are 11 timer input functions such as
45. g Prescaler Mode individual in All Timers Sources _Select_ Edge or Level Slice E g How to achieve an average value of 28 9H A timer count Capture GPIO Na L en by a Buck Converter with 200 kHz sampling periods event ERU1 Ss NB stop rate performing 10 bit DC Level on average lt timer gt POSIF a ee capture 0 1 CAN true oa Vin o Vout EventO In zero ie Detect UP OOWN ltl L T a m lt timers eperiodrisxey T aT t ADC false F count D C capture next t apture i override bit PWM m kes PS Init PS Init CCU8x 3 Events TaD lat Dith L SCU Control Connec ee ither T 2 S x lt period gt 1 fccu lt PSIV gt 0 15 DEV_CCU4_00_Use_Cases vsd Figure4 Some features and Use Cases 1 9 characterizing an CAPCOM Unit CCU Features Ap plication Note V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Cinfineon Introduction to the CCU4 1 3 Additional CCU4 Features Table 1 Summary of additional CCU4 features Features Operation Single Shot If a slice is set in Timer Single Shot Mode CC4yTC TSSM the Timer and its Run Bit TRB is cleared by the Period One match that occurs next to when the TSSM bit was set As a result the timer is stopped Timer Concatenation Any timer slice can be concatenated with an adjacent timer slice by setting CC4yTC TCE 1 Dithering PWM It can be used with very slow control loops that cannot update the period compare values in a fast manner The precision ca
46. gers from sources such as GPIO ERU POSIF CAN CCU4x USIC ADC CCU8x or SCU Pin connections are given by the Top Level Interconnect matrix and the CC4yINS P A Input Select vector and Function Select by the CC4yCMC register 4 1 4 Timer Inputs for Start and Stop Facilities Atimer has 3 selectable function inputs with configurable source event condition profiles These 3 function inputs can each have up to 16 sources for External Events Control such as Timer Start or Stop The extended functions such as Flush Start Flush Stop or Flush only can also be added in Single Shot mode via the CC4yTC register Application Note 44 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 n n eon Event Trigger Delay by Single Shot CCU4x x 0 3 Compare Register PWM ane by 16 External Event Sources Service wis Period Shadow Reg Edge Modula ip ica i rn Request Lines Request o Period Register T e an Gerero Li 5 ign Sra ponve Output Pin Slicey 5 Timer 16 bit Shot Controt Status Bit Reset Power i Prescaler Compare Shadow Reg Input Matrix Control Floating Function Control Prescaler Clock Control External Event Up to 3 Events Function Timer Input Functions Event Source f Profile Selectable of Inputs that may be controlled Sources Select Edge or Level Select by the Events 0 1 or 2
47. ith CCU4 Count Direction CDIR CCTclk Tii en gt Period Period Period Period Value1 1 Period Value1 Timer One Match i i A i CCCM_D l i CCCM_U CCCM_D gt Interrupt l Interrupt Interrupt I T pen upper limit i i 5 Io 1 CCOM_D p er CCOM_D cccm_u i T CCCM_U CCPM UN Interrupt Interrupt N Interrupt l CCPM Ui Interrupt Interrupt inat rod 1 upper limit l upper limit Interrupt l 1 lt 1 i 5 Service Req SW 1 3 l i ip i am rN N Shadow Update t cla See t i SW Dead Lines x 4 a x x LA p i l LA lt z i l CCTelk In l CCTelk FAA 1 l l mal PNI l A Il P Y l e s Shadow Registers i Shadow Shadow T J Shadow Shadow meaw a Values Values 2 Values 3 A Values 2 E maaan l l l E S E e g CR PR PSL etc i 2 A 1 2 3 Service Req SW Shadow Updates A on Period Match a Shadow Updates on Compare Match asi UC Ie kyot DEV_CCU4_01_Compare_Schemes_Reload vsd Figure 17 Compare Reload Scheme in Detail Whatever the slice configuration whatever level of complexity whatever the signal patterns all the timer function parameters of the CAPCOM4 timers are assured coherent update by hardware They are updated from values in the shadow registers that on a global preset request are transferred simultaneously to all function registers at a Period M
48. ive Active bit PSL controls whether the external output pin state CCU4xOUTYy e g the PWM is Passive Low Active High or vice versa 1 7 6 How to Start a Timer There are two ways to start a timer e Directly by software by setting the Timer Run Bit Set TRBS e Indirectly by hardware when a specific event occurs in an external unit as determined by the Top Level Connection Matrix for External Events Control for CAN ADC USIC IO CCU4 8 ERU1 POSIF etc Application Note 13 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Introduction to the CCU4 1 7 7 Global Start of CCU4 To achieve a synchronized start the CCU4 uses either e Aglobal start by software with CCUx Global Start Control bits in the CCUCON Global Start Control register e Aglobal start by hardware indirectly with External Events Control using the CC4yINS and CC4yCMC registers The Global Start command enables almost an unlimited number of timers to be started independently of the CAPCOM unit they belong to The global start means that the timers are synchronized and all timing can be controlled in parallel with many different kinds of generated output patterns CCUCON GSC80 GSC41 GSC40 P T E pe a CC40INS Select Considered Source Event Profiles CC40CMC This mechanism allows synchronous start of different timer slices within one CCU but also different slices from
49. lse No timer mode he Queue Entry XMC VADC QUEUE ENTRY t g queue entry channel num CHANNEL NUMBER cefill needed true Refill is needed generate interrupt true Interrupt generation is needed external trigger true External trigger is required e XMC Capture Compare Unit 4 CCU4 Configuration XMC_CCU4_ SLICE COMPARE CONFIG t SLICEO config timer_ mode uint32 t XMC CCU4 SLICE TIMER COUNT MODE EA monoshot uint32 t true shadow xfer clear uint32 t 0 dither timer period uint32 t 0 dither duty cycle uint32 t 0 prescaler mode uint32_t XMC_CCU4_ SLICE _PRESCALER MODE NORMAL mcm_enable uint32 t 0 prescaler initval uint32 t 0 float limit uint32 t 0 dither limit uint32 t 0 passive level uint32_t XMC_CCU4_ SLICE OUTPUT PASSIVE LEVEL LOW timer concatenation uint32 t 0 Application Note 49 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Event Trigger Delay by Single Shot XMC_CCU4_ SLICE EVENT CONFIG t SLICEO event0O config mapped input XMC_CCU4 SLICE INPUT C P0 0 edge XMC_CCU4 SLICE EVENT EDGE SENSITIVITY FALLING EDGE level XMC CCU4 SLICE EVENT LEVEL SENSITIVITY ACTIVE HIGH duration XMC CCU4 SLICE EVENT FILTER 7 CYCLES 4 2 3 Interrupt Service
50. lv Parallel Control of Output Pins by single pattern Stall Detection via BEMF a Bipolar Stepper with Micro Steps 1 2 F i 3 Simple Time Base Single Shots in PFC amp SMPS Quadrature Encoder Interrupt Request on the Period Match Comprehensive Single Shots Handling Event Counting Synchronize on External Event Control Up Down Counting KTE 7 Revolution Monitoring 13 18 Velocity on Tick Velocity on Time Stamp ie Tick Compare i 1 Ton i Tott i 1 T ee I lp 1 i Vin O gt al O Vout Encoder H o A c f T C L POSE CCU48 Event 1 4 5 6 Multi Channel Control Multi Phase Control 3 Level PWM Asymm Comp 2 3 Phase Motor Control N Phase Power Supplies Asymmetric PWM CCU8x for Phase Shift Trap Compare at corals For Higher Resolution EMC quality amp Efficiency Event Controlled Timer Functions Synchronous Contro of Timers by other Units ray Compare 1 nE gt Ny PWM 3 L Oe ee Polarity2 litle PWM 1 _ 7 8 9 Dithering EMI Reduction by spectrum broadening Fractional Period Time Division into Micro Ticks Auto Adjusting Time Base Adaption to unknown measurement dynamics Reduction of the SW read activities a a eee aat DC Level average precision from 16 to 20 bits Floatin
51. ly be expected to cause the failure of that life support device or system or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body or to support and or maintain and sustain and or protect human life If they fail it is reasonable to assume that the health of the user or other persons may be endangered
52. n Note 50 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Event Trigger Delay by Single Shot e Configure Slice s Functions Interrupts and Start up Initialize the Slice XMC_CCU4_ SLICE CompareInit SLICEO PTR amp SLICEO config re 1777 2665U ty cycle 33 3 and frequency 24 KHz ICE SetTimerCompareMatch SLICEO PTR ICE SetTimerPeriodMatch SLICEO PTR Program du XMC_CCU4_S XMC_CCU4_S Enable shadow transfer for PWM Slice XMC_CCU4 EnableShadowTransfer MODULE PTR uint32 t XMC CCU4 SHADOW TRANSFER SLICE T Configur rnal Start XMC_CCU4 SLICE ConfigureEvent SLICE0_ PTR XMC CCU4 SLICE EVENT 0 amp S vents xt ICEO event0_ config XMC_CCU4 SLICE StartConfig SLICEO PTR XMC_CCU4_ SLICE EVENT 0 XMC_CCU4 SLICE START MODE XMC_CCU4_S Enable events iT CE T IRQ ID EVENTO _EnableEvent SLICEQ PTR XMC_CCU4 SLICE Connect t to SR2 to trigger an ADC conversion XMC_CCU4_S XMC_CCU4_ SLICE even ICE SetInterruptNode SLICEO PTR IRQ ID EVENTO XMC CCU4 SLICE SR ID 2 Get the slice out of idle mode XMC_CCU4_EnableClock MODULE PTR SLIC EO NUMB e Configure the ADC Initialize the VADC global regi
53. n be maintained on long run Dithering Period Time Micro ticks can be used in the Interpolation between sensor pulses to achieve higher precision position monitoring Floating Prescaler By successive changing of the timer clock frequency periodically no compare capture event the dynamic range is autonomously adapted to any time length External Modulation The output pin signal of a slice is modulated by external events Output State Override An external input signal source may override a slice s status bit CC4yST on an edge event by other external input signal source Multi Channel Control The output state of Timer Slices PWM signal s can be controlled in parallel by a single pattern External Load Each slice of CCU4 allows the user to select an external signal as a trigger for reloading the timer value with current compare period register value Trap Function The function forces PWM output into a predefined state preset in the active passive PSL bit The power device can then be safely switched off 1 4 1 4 1 CCU4 Input Control Synchronized Control of CAPCOM Units on External Events External Events Control distribution to CCUs including CCU8 starts for advanced applications with synchronized timer control For example in motor drive and power control where 3 Level Inverters might require 12 synchronized PWM The limits are the realizable topography or timing pattern c
54. nel_ handle XMC_ 0 XMC_ 0 0 VADC GROUP EMUXMODE SWCTRL VADC GROUP EMUXCODE BINARY channel_priority 1U input class XMC VADC CHANNEL CONV GROUP CLASS1 alias_channel uint8 t 1 DEL 0 vent_gen criteria XMC VADC CHANNEL EVGEN ALWAYS alternate_referenc XMC VADC CHANNEL REF INTREF result_reg_number uint8_t RES_REG_NUMBER sync_conversion false Sync Feature disabled result_ alignment XMC VADC RESULT ALIGN RIGHT use_global result false broken_wire_detect_channel false broken wire detect false Application Note 48 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 n n eon Event Trigger Delay by Single Shot Result configuration data XMC VADC RESULT CONFIG t g result handle post_processing_mode XMC VADC DMM REDUCTION MODE data_reduction_ control 0 part_of fifo false No FIFO wait for read mod true WES vent_gen_enabl false No result event he Queue hardware configuration data XMC VADC QUEUE CONFIG t g queue handle req src priority uint8 t 3 Highest Priority 3 Lowest 0 conv_start_mode XMC_VADC_STARTMODE WFS external trigger bool true External trigger enabled trigger signal XMC_CCU_40 SR2 trigger_edge XMC_VADC_TRIGGER_EDGE_FALLING gate_signal XMC VADC REQ GT A timer mode bool fa
55. of DECT Forum COLOSSUS FirstGPS of Trimble Navigation Ltd EMV of EMVCo LLC Visa Holdings Inc EPCOS of Epcos AG FLEXGO of Microsoft Corporation HYPERTERMINAL of Hilgraeve Incorporated MCS of Intel Corp IEC of Commission Electrotechnique Internationale IrDA of Infrared Data Association Corporation ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION MATLAB of MathWorks Inc MAXIM of Maxim Integrated Products Inc MICROTEC NUCLEUS of Mentor Graphics Corporation MIPI of MIPI Alliance Inc MIPS of MIPS Technologies Inc USA muRata of MURATA MANUFACTURING CO MICROWAVE OFFICE MWO of Applied Wave Research Inc OmniVision of OmniVision Technologies Inc Openwave of Openwave Systems Inc RED HAT of Red Hat Inc RFMD of RF Micro Devices Inc SIRIUS of Sirius Satellite Radio Inc SOLARIS of Sun Microsystems Inc SPANSION of Spansion LLC Ltd Symbian of Symbian Software Limited TAIYO YUDEN of Taiyo Yuden Co TEAKLITE of CEVA Inc TEKTRONIX of Tektronix Inc TOKO of TOKO KABUSHIKI KAISHA TA UNIX of X Open Company Limited VERILOG PALLADIUM of Cadence Design Systems Inc VLYNQ of Texas Instruments Incorporated VXWORKS WIND RIVER of WIND RIVER SYSTEMS INC ZETEX of Diodes Zetex Limited Last Trademarks Update 2014 07 17 www infineon com Edition 2015 07 Published by Infineon Technologies AG 81726 Munich Germany 20
56. oherent update by hardware They are updated from values in the shadow registers that on a global preset request are transferred simultaneously to all function registers at a Period Match or One Match 1 7 2 Shadow Transfer of Compare Register values The compare values that are targeted for an update operation have to be written into both the CC4yCRS shadow registers and the corresponding Slice Transfer Set Enable bits For example SySE in GCSS must be preset before Period Match in Edge Aligned Mode or Period One Match in Center Aligned Mode for an update operation to be completed Shadow TrAnsfer on One Match and REquest is cleared by HW Shadow TrAnsfer on Period Match and REquest is cleared by HW No Shadow Transfer since No request No Shadow Transfer since No request Timer CC4y CC40CRS 20 CC41CRS 40 CC42CRS 60 SySE 1 CC40CRS 10 CC41CRS 20 CC42CRS 30 SySE 1 CC40CR 20 CC41CR 40 CC42CR 60 CC40CR 10 CC41CR 20 CC42CR 30 Shadow transfer mechanism Coherent update of compare registers by HW SW can write asynchronously to the timer state After all values are updated the shadow transfer is requested by setting SySE At every Period Match or One Match event the HW can perform the transfer and clears the request DEV_CCU4_00_Shadow_Transfer_with_Compare_Registers vsd Figure9 Basic Shadow Transfer Mechanism for Compare Registers Values 12 V
57. omplexity range Application Note 8 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 n n eon Introduction to the CCU4 1 4 2 External Control Basics A slice has its input functions controlled by external sources The external source s active mode s and input function s should be mapped to the 3 inputs of the slice in the CC4yINS and CC4yCMC registers Function mode extension alternatives can be added by selecting them in the CC4yTC Timer Slice Control register 1 4 3 External Events Control An external event control request can be an edge or level signal from a peripheral unit or a GPIO It can be linked to the input selection stage of a CCU4xCC4y slice by using a comprehensive connection matrix A slice with any of its 3 events setup detects a considered source event input profile and can be function controlled remotely this way CCU4x x 0 3 Service ae EE Edge saii lel r i attern Request Lines Request o Period Register an cni Generation ines 5 B Active i Q Output Pin li w Single Passive ee Aay Oo Timer 16 bit H Shot Control Status Bit per prescaler ia Compare Shadow Reg EIT nes pas oating Com Regist PWM unction Contro Prescaler pare hegister Selector by 16 External Clock Control Event Sources External Event Up to 3 Events Function Timer Input Functions Event Source f Profile Selectable o
58. pturedvalue3 XMC_CCU4 SLICE GetCaptureRegisterValue CAPTURE SLICE PTR 3U Check if a new value is captured store value to offtime variable if capturedvalueO amp CCU4 CC4 CV_FFL Msk offtime capturedvalueO amp CCU4 CC4 CV CAPTV Msk else offtime capturedvaluel amp CCU4 CC4 CV CAPTV Msk Check if a new value is captured store value to ontime variable if capturedvalue2 amp CCU4_CC4 CV_FFL Msk ontime capturedvalue2 amp CCU4 CC4 CV CAPTV Msk ontime capturedvalue3 amp CCU4 CC4 CV CAPTV Msk Calculate the total period and capture duty cycle totalperiod offtime ontime captureduty float ontime float totalperiod 3 2 4 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU4 must have been initialized appropriately using the following sequence e Setup the system clock Ensure clock frequency is set at 64MHz 2 MCLK XMC_SCU_CLOCK_Init amp clock_ config e Enable clock enable prescaler block and configure global control Enable clock enable prescaler block and configure global control Application Note 40 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Advanced Signal Measurement XMC_CCU4_Init MODULE PTR XMC_CCU4 SLICE MCMS ACTION TRANSFER PR CR Start the prescaler and restore clocks to slices XMC_CCU4_StartPrescaler
59. s A capture event can trigger external actions via the Top Level Interconnect matrix or request for an interrupt Each CAPCOM4 has four Service Request Lines and each slice has a dedicated output signal CC4ySR 3 0 selectable to a line by using CC4ySRS For example a capture event may request action from some other unit for an interrupt 3 1 6 Top Level Control of Event Requests to from a Timer in Capture Mode Top Level control means conditional control of event requests between a slice and other action providers The event request unit ERU1 and the Top Level Interconnect matrix may combine control and link event signals according to user defined request to action event patterns For example capture on timer and other event status 3 2 Example Use Case CCU4 Capture Mode to Measure PWM Duty Cycle Each timer slice can make use of two or four capture registers By using only two capture registers one event is linked to a capture trigger To use four capture registers both capture triggers need to be mapped to an Event it can be same signal with different edge selection or two different signals The CC4yTC SCE needs to be set to one which enables the linking of the 4 capture registers The internal slice mechanism for capturing is the same for the capture trigger one or capture trigger zero In this example based on XMC1200 a PWM signal is generated on CCU40 40 slice for 24 kHz frequency with a 33 33 duty cycle The PWM output is gener
60. s ccsicscccesssesssssctecscsedsovescssvecedasidesssassdevesssscesesasceensdssscetessaetevesseodsveas 30 Application Note 2 V1 0 2015 07 Capture Compare Unit 4 CCU4 Infineon AP32287 Table of Contents 2 2 5 MACS and variable SCLUINES witerscsiaesavavcicdensaisncatsonnesnsbssinuts bouveiecwu seisear iise ea iiiaae Ena 30 2 2 6 XMC Lib Peripheral Configuration Structure esesssssssssssesesessssssrerssssssressssesesesesssrersssssesenssese 31 2 2 7 Interrupt Service Routine Function Implementation s sssssssssssseesssssssrsssssesereseeseresesrsssenessssese 32 2 2 8 Main Function Implementation cccccsscsssssscsessesscesecseesecesecaseesessecasessesseceaeeseesecesecaeeeeeeaeeats 32 3 Advanced Signal Measurement eseesesosesssosscssesecossossosssssesscossossossesseoscosssssossessesssoseos 34 3 1 Capture ModE a atioos ccdivestessunescssicods tnd ae aerea E Eea eE E NEEE NS EEE E eea SOE EENET EE SE E EERE eE 34 3 1 1 Slice Timer Setup in Capture Mode e sssssssessssesesessesseesesssssssssssststseststsstersrssstsessssssesesesesererersses 34 3 1 2 THe Capture ALSOP AM ecccsdviscvrstanecusaevwessusantataioncilensealioss Wuctacbersaiancas a a EEE EAEE EEEa 34 3 1 3 Capture by Externals Events Control sssssssssssessessseesssssssssssssrsesrsrsreterersssenessssssrstsrsesereesrssses 35 3 1 4 Timer INPUTS from CaptUrEsi cessisse i oeei eT EEEE anMieenece 35 3 1 5 External Control by Capture Events ssssessssessss
61. scaler MODULE PTR Start of CCU4 configurations Ensure fCCU reaches CCU40 XMC_CCU4 SetModuleClock MODULE PTR XMC_CCU4 CLOCK SCU Application Note 32 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 e Configure Slice s Functions Interrupts and Start up Initialize the Slice XMC_CCU4_ SLICE CompareInit SLICEO PTR amp SLICEQO config Program 100kHz frequency XMC_CCU4_ SLICE SetTimerCompareMatch SLICEO PTR comparevalue count XMC_CCU4 SLICE SetTimerPeriodMatch SLICEO PTR 2665U Enable shadow transfer XMC_CCU4_ EnableShadowTransfer MODULE PTR uint32_ t XMC_CCU4 SHADOW TRANSFER SLICE O XMC_CCU4_SHADOW TRANSFER PRESCALER_SLICE_0 Enable compare match event XMC_CCU4_ SLICE EnableEvent SLICEO PTR XMC_CCU4 SLICE IRQ ID COMPARE MATCH UP Connect compare ma tch event to SRO XMC_CCU4 SLICE SetInterruptNode SLICEO PTR XMC_CCU4 SLICE IRQ ID COMPAR Set NVIC priority NVIC_SetPriority CCU40_0_IRQn Enable IRQ NVIC_1 EnableIRQ CCU40_0 IROQn Enable CCU4 PWM output MATCH UP XMC_CCU4 SLICE SR _ID 0 Ei 3U amp SLICEO OUTPUT config XMC_GPIO_ Init SLICEO OUTPUT Get the slice ou
62. sessssresssssststsesssetsretsssssensssssestneseeseeeetstsssenenesese 36 3 1 6 Top Level Control of Event Requests to from a Timer in Capture Mode ssssesesssseseseeesssesee 36 3 2 Example Use Case CCU4 Capture Mode to Measure PWM Duty Cycle ssssssessesseesressssseeersessesreess 36 3 2 1 ACI and v iabl S ttihgs a scivasurcaveacmnatcontesduseussacunt wsuhennansnnt s kiatna esaii Nia 38 3 2 2 XMC Lib Peripheral Configuration Structure ssesssssssssssesesessssssrerssssssrsssesesesesessserersrsssesesssese 38 3 2 3 Interrupt Service Routine Function Implementation sssssssssssessesssssssrsssssesesesesseresessssssresessese 39 3 2 4 Main Function Implementation ccsccsscsssssscssessessscesecseesscesecseesscesecssessesseceaseseeeceaecseeesesaeeaes 40 4 Event Trigger Delay by Single Shot esssesssessesssesssssssssoosssosososssossseosssosssosssosssesosssosse 43 4 1 lNtrO JUCO Misereor arai eE TE ERNEK E SEN EEEN EASE EE aN AN SE EE 43 4 1 1 Timer Setup in Single Shot Mode sesssssssessesssssssssssssssssststsesrsseretssssssnessesesesesesssereesssssesensssese 43 4 1 2 Using Timer Single Shot Delay for Noise Rejection ssssssssssssssesesessssersssssesrresrsreereesrsssenensssese 44 4 1 3 Timer Start in Single Shot Mode by External Event Control 0 0 0 eesssseseseesesseseseceseeeeseseneees 44 4 1 4 Timer Inputs for Start and Stop Facilities ccc ceesscssccsseescesecseesseeeeceeecseeescesecsseeseesesseeen
63. state orange The ERU1 combines detects and links it all as a trigger green via the delay timer and the Top Level Interconnect matrix to the ADC Application Note 25 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Output Pattern Generation with CCU4 2 2 Example Use Case CCU4 as Digital to Analog Converter DAC Many embedded microcontroller applications require generation of analog signals Sometimes a dedicated DAC IC is used for this purpose In fact PWM signals can often be used to create DC and AC analog signals with CCU4 CCU4 can be used as a form of signal modulation where data is represented by the ratio of the ON time T to the period also known as the duty cycle In this example the CCU4 timer is used to generate a sinusoidal waveform of 1 kHz SLICE Configuration Number of Sample points 24 XMC1200 System Clock 32MHz Angle Step 360 Number of Samples Peripheral Clock 64MHz 15 degree PWM frequency 24Hz Mode Edge aligned 3 3V4 Settings for this example PWM frequency 24 KHz Generated sinusoidal frequency 1KHz based on 24 sample points in lookup table 1 65V H Lo Avec Sb Eh Sed 1 Based on a pre generated lookup 0 10 180 270 360 table the new compare value is loaded during a compare match event ISR OV CCU40 CC40 f ae 30 45 60 75 90 Period PR 2665 CMUS Compare Match CC
64. sters XMC_VADC_GLOBAL Init VADC amp g_global_handle Configure a conversion kernel XMC VADC GROUP Init g group identifier amp g group handle Configure the queu of the aforesaid conversion kernel XMC VADC GROUP QueueInit g group identifier request sourc amp g queue_handle Configure a channel belonging to the aforesaid conversion kernel XMC VADC GROUP ChannelInit g group _identifier CHANNEL NUMBER a result resourc Configur XMC VADC GROUP ResultInit g_group identifier RES REG NUMB ER Add the channel to the queue XMC VADC GROUP QueueInsertChannel g group identifier g queue entry Application Note 51 Infineon TIMER START CLEAR af amp g channel handle belonging to the aforesaid conversion kernel amp g_result handle V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Event Trigger Delay by Single Shot Set priority of NVIC node meant to connected to Kernel Request source event NVIC_SetPriority VADCO_G1_0 IRQn IRQ PRIORITY Connect RS Event to the NVIC nodes XMC VADC _ GROUP QueueSetRegSrcEventInterruptNode g_group_ identifier XMC VADC SR GROUP SRO Configure NVIC Set priority NVIC_SetPriority VADCO Gl 0 IRQn 3U Enable IRQ NVIC_EnableIRQ VADCO_G1_0_IRQn Enable the analog converters XMC VADC GROUP SetPowerMode g_ group i
65. t 1 6 2 Top Level Control of Event Request to from a Timer Slice Top Level control also means conditional control of event requests between a slice and other action providers The Event Request Unit ERU1 and the Top Level Interconnect matrix can combine control and link event signals according to user defined request to action event patterns For example they can invoke I O states Time Windowing etc Application Note 11 V1 0 2015 07 Capture Compare Unit 4 CCU4 AP32287 Introduction to the CCU4 1 7 Compare Basics Infineon CCU4x x 0 3 Service Request Lines DMA Reset Power Control Clock Control CC4y 4 Service Request Lines Floating Prescaler Prescaler 4 x Capture Period Shadow Reg Period Register Edge Center Align Timer 16 bit Single jH Shot tion Control Active Passive Control Compare Shadow Reg 3 x Input Compare Register PWM Multi Channel Pattern Generation Output Pin Status Bit Input Matrix Function Control by 16 External Event Sources DEV_CCU4_00_Basics_Slice_Compare vsd Figure8 Timer Slice Compare Registers and PWM related Blocks 1 7 1 CCU4 Shadow Transfers Whatever the slice configuration whatever level of complexity whatever the signal patterns all the timer function parameters of the CAPCOM4 timers are assured c
66. t re Seeonee neseser re EEA RE E EE EOE 8 1 4 CCUA Input Control sereis rine nessies E E EEA E E E EEE N 8 1 4 1 Synchronized Control of CAPCOM Units on External Events ssssessesssssseesessrserereesersessesrsessese 8 1 4 2 External Control BASICS 2c ccisccccasedecccesssceccosssescsostdenscesnteociosdecescovotccscessecesgesbuseeseodecesendsSuasscdibeessedeve 9 1 4 3 External Events Control wisieissessatevscedouscssaees ih dieedeisvsesvsetesazevsecdsees ob oS RESSE E ESEE ESEA A CERESE EE 9 1 4 4 External Ae OAU N Ae E ESE AEE E E AE EE EEE EAE EE E AET 9 1 4 5 External Event INput FUNCTIONS c cccecsesssessseessecssecssecesecesecsssssseesecessesesaseeseecasecsaecsaeceaseeseeaes 10 1 5 C pture BASICS scscccessiisses tysivecese vesa sesusaescedv adeysceiedsvesseecatasusdte ss NE E erae EEE E EEATT NE SEEEN 10 1 6 CCUA OUTPUT Control esseci iiei saa a E 11 1 6 1 External Control by Timer EVents csccsscsssssscssesseesscesecseesecesecsesenessecaseesesseceaeeseeseceaecaeseneeaeeats 11 1 6 2 Top Level Control of Event Request to from a Timer SLICC cece eesecssecssecssecesecesessseesseeesneesees 11 1 7 Compare BASICS is cccsgccevuecesiusiesthecveccesulesessacnvesnedusedeashesveanesuobessdeetecesesduateddsanecnsdecssanddeateanceaceuseCebumieess 12 1 7 1 CCUA Shadow Transterssecesseccdecvsccessesvectvssavstavcstsiescusesonntesecusucedatuuice esseuesdedacvessesevedide steaeeevseessoeese 12 1 7 2 Shadow Transfer of Compare Register values
67. t of idle mode XMC_CCU4_ E e Start Timer Running Start the TiImer XMC_CCU4 SLICE StartTimer SLIC Application Note EnableClock MODULE PTR SLICEO NUMBER EO PTR 33 V1 0 2015 07 Capture Compare Unit 4 CCU4 C 1 AP32287 In Ineon Advanced Signal Measurement 3 Advanced Signal Measurement 3 1 Capture Mode 3 1 1 Slice Timer Setup in Capture Mode Each CCU4x has 4 timer slices Each slice has 4 capture value registers split into 2 pairs that capture on selected event control input either CaptO or Capt1 according to 2 possible pair schemes either as 2 pairs for different events for Capt0 with respect to Capt1 or cascaded for the same event via Capt1 Capture Inputs Capture reg 3 Capture reg 2 COycaptt Capture on Different oa iy Events CC4yCOoV CCycapt0 Capture Trigger Distribution amp Full Flag Handling Logic Capture reg 1 Capture reg 0 Capture reg 3 Capture reg 2 Capture Input CCycapt1 Capture Trigger Distribution amp Full Flag Handling Logic Full Full Empty o Empty T4y gt CC4yC3V gt CC4yC2v Capture ee di on Same Event aC ko and Edge madim Am Full Empty m gt Capture Trigger Distribution amp Full Flag Handling Logic Capture reg 1 Capture reg 0 DEV_CCU4_02_Capture_Logic vsd Figure 26 Slice Capture Logic 3 1 2 The Capture Algorithm Each capture regist
68. tern Generation with CCU4 mode XMC GPIO MODE OUTPUT PUSH PULL ALT4 input_hysteresis XMC_GPIO INPUT HYSTERESIS STANDARD output_level XMC_GPIO OUTPUT LEVEL LOW F 2 2 7 Interrupt Service Routine Function Implementation The CCU40 interrupt handler function is created to update the timer compare match values to achieve a sine signal void CCU40 0 IRQHandler void Clear pending interrupt XMC_CCU4_ SLICE ClearEvent SLICEO PTR XMC_CCU4_ SLICE IRQ ID COMPARE MATCH UP Set new duty cycle value XMC_CCU4 SLICE SetTimerCompareMatch SLICEO PTR comparevalue count count if count 24 count 0 Enable shadow transfer for the new PWM value update XMC_CCU4_EnableShadowTransfer MODULE PTR XMC_CCU4_ SHADOW TRANSFER SLICE 0O 2 2 8 Main Function Implementation Before the start and execution of timer slice software for the first time the CCU4 must be initialized appropriately using the following sequence e Setup the system clock Ensure clock frequency is set at 64MHz 2 MCLK XMC_SCU_CLOCK_Init amp clock_ config e Enable clock enable prescaler block and configure global control Enable clock enable prescaler block and configure global control XMC_CCU4 Init MODULE PTR XMC_CCU4 SLICE MCMS ACTION TRANSFER PR CR Start the prescaler and restore clocks to slices XMC_CCU4_StartPre
69. ure on event 1 to SR2 XMC_CCU4_ SLICE SetInterruptNode CAPTURE SLICE PTR XMC CCU4 SLICE IRQ ID EVENT1 XMC CCU4 SLICE SR ID 2 Configure NVIC Set priority NVIC_SetPriority CCU40_2 IRQn 3U Enable IRQ NVIC_EnableIRQ CCU40_2 IRQn Enable CCU4 PWM output XMC_GPIO_Init SLICEO OUTPUT amp SLICEO_ OUTPUT config Application Note 41 V1 0 2015 07 Capture Compare Unit 4 CCU4 1 AP32287 In Ineon Advanced Signal Measurement Get the slices out of idle mode XMC_CCU4_EnableClock MODU E PTR SLICE 0 NUMBE R XMC_CCU4_EnableClock MODU E PTR CAPTURE SLICE NUMBER e Start Timer Running XMC CCU4 SLICE StartTimer SLICE0_ PTR XMC_CCU4_SLICE_StartTimer CAPTURE SLICE PTR Application Note 42 V1 0 2015 07 infir Capture Compare Unit 4 CCU4 AP32287 Infineon Event Trigger Delay by Single Shot 4 Event Trigger Delay by Single Shot 4 1 Introduction Atimer in Single Shot mode has a specific role for applications where a certain delay has to be invoked between trigger events and operations that should be triggered For example noise rejection in shunt current signal measurement Any CAPCOM4 timer could be setup in this mode to co operate with other timers ADC or other modules 4 1 1 Timer Setup in Single Shot Mode A slice can be set into Timer Single Shot Mode T

AP32287 - XMC1000/XMC4000 - Capture Compare Unit 4

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