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S Series User Manual - Artisan Technology Group

1. AIO ms P ao gt ad Anti AIO 46 Aljo Mux Anio Alasin 168 Be Lach Bata 6 ilter m AI FOU ai Anti y All 46 Alt ELM y Aliasing P 16 Bit 7 D Data 16 A1 Mux Filter ADC batch a Al2 Anti Al2 I i T ed p gt Aliasing Vg eit ep A2 Data 16 T A2 Mux Filter ADC Latch 1 K Contro gt Al2 ADC Bue Mini EC ed Anti ALS 1 S p Aliasing Y e seen Sep bh Data 16 m i A3 gt Filter ADC o 5 f ft O rP Calibration en E pE z c X o Trigger Ti Level 2 Analog IRQ n Ge es honor y DMA O Circuitry U Y 2 i 1 Analog Input M T T PFI Trigger Trigger riming Control 1 PMAIRQ Analog EEPROM DMA OSE E ed Control 1 Conto interface Counter Bus Pace e UE DAQ STC Timing Timing O DAQ STC interface Bus DIO Deu em I interface FIFO STC Digital VO 8 Digital Vo Analog Output RTSI Bus Aw L DIO ea Timing Control Interface Control Control interface Digital VO 8 mux FPGA Digital O 8 fi AO Control DAC r DACO Data 16 FIFO C Data 32 Calibration NU T NF Figure A 7 NI 6120 Block Diagram NI 6115 6120 Cables and Accessories This section describes some of the cable and accessory options for the NI 61
2. Oo pI ALO o PGIA 16 Bit all o gt ADC Channel Control 0 o gt Al 1 Al 1 Config Data 32 16 Bit EEPROM o ADC Address 32 Channel Control SCARAB o gt Al2 Cal o EEPROM 8 ZN a d 9 Al Control o Y elo Lars Lj loo Channel Control 3 FPGA gt E lo 0x Al 4 AI A PGIA 16 Bit STCA pop pl ADC x Channel Control DMA IRQ P Qo pl AI5 die 16 Bit Bk CPLD T Analog dis OH ADC m Trigger D DMAIIRQ Control Control5 fF ff np pore paa amp m Eoo AI 6 AL 6 Timing VO STC itorfic 16 Bit 4 L 4 Pa oL gt o ADC zx prar rai Bus Digital VO Timing Interface Control Contro P lo gt Fee Al7 Analog re ADC Q Trigger io E Circuitry Control 7 fo RTSI amp Connector PFI Trigger E Timing 2 e DigtalVO lt STC 3 Figure A 10 NI 6122 6123 Block Diagram Note AI lt 4 7 gt appear only on the NI 6123 National Instruments Corporation A 19 S Series User Manual Appendix A Device Specific Information NI 6122 6123 Cables and Accessories S Series User Manual This section describes some of the cable and accessory options for the NI 6122 6123 For more specific information about these products refer to ni com Using BNCs You can connect BNC cables to your DAQ device us
3. Language Program Function LabVIEW NI DAQmx DAQmx Export Signal vi and DAQmx Connect Terminals vi Traditional NI DAQ Legacy Route Signal vi C NI DAQmx Export Signal and DAOQmx Connect Terminals Traditional NI DAQ Legacy Select Signal ER Note For more information about routing signals in software refer to the NI DA Qmx Help or the LabVIEW 6 x Help S Series User Manual 10 8 ni com Real Time System Integration Bus RTSI NI DAQ devices use the Real Time System Integration RTSI bus to easily synchronize several measurement functions to a common trigger or timing event In a PCI system the RTSI bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ devices in the computer In a PXI system the RTSI bus consists of the RTSI bus interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system Refer to the KnowledgeBase document RTST Connector Pinout for more information RTSI Triggers The seven RTSI trigger lines on the RTSI bus provide a very flexible interconnection scheme for any device sharing the RTSI bus These bidirectional lines can drive or receive any of the timing and triggering signals shown below directly to or from the trigger bus The RTSI trigger lines connect to other devices throug
4. Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 3 18 ai SampleClock Timing Requirements Outputting the Al Sample Clock Signal You can configure the PFI 7 AI SAMP CLK pin to output the ai SampleClock signal The output pin reflects the ai SampleClock signal regardless of what signal you specify as its source Your DAQ device briefly pulses the PFI 7 AI SAMP CLK pin once for every occurrence of ai SampleClock Figure 3 19 shows the timing of pulse behavior of the PFI 7 AI SAMP CLK pin when the pin is an output ty gt ai SampleClock _ ty 50 to 100 ns Figure 3 19 PFI 7 Al SAMP CLK as an Output The PFI 7 AI SAMP CLK pin is configured as an input by default National Instruments Corporation 3 27 S Series User Manual Chapter 3 Analog Input Other Timing Requirements A counter on your device internally generates ai SampleClock unless you select some external source The ai StartTrigger signal starts this counter It is stopped automatically by hardware after a finite acquisition completes or manually through software When using an internally generated ai SampleClock in NI DAQmx you can also specify a configurable delay from the ai StartTrigger to the first ai SampleClock pulse By default this delay is two ticks of the ai SampleClockTimebase signal Figure 3 20 shows the relationship of the ai SampleClock signal to the ai StartTrigger si
5. s ALO 4 dr Ground Referenced 4 Signal Vs Source i il Al 0 Measured Common Voltage Mode Noise and Ground Vem Potential SIT o Al 0 GND 4 Al 0 Connections Shown 1 0 Connector Figure 3 3 Differential Connection for Ground Referenced Signals on Non Isolated Devices Figure 3 4 shows how to connect a ground referenced signal source to a channel on an isolated S Series device S Series User Manual 3 10 ni com Chapter 3 Analog Input Ground Referenced Signal Source Common Mode Noise and Ground Potential 1 0 Connector Isolated S Series Device 7 ri Isolation Instrumentation i AIO si Barrier Amplifier T Digital Measured Isolators Voltage dE jar d AI 0 Connections Shown National Instruments Corporation Figure 3 4 Differential Connection for Ground Referenced Signals on Isolated Devices With these types of connections the instrumentation amplifier rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as V in these figures Common Mode Signal Rejection Considerations The instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the device In addition the instrumentation amplifier can r
6. PFI Isolation Barrier Digital Digital Bus Isolators Routing Interface RTSI Bus Figure 1 3 Isolated S Series Block Diagram DAQ STC2 Isolated Devices The DAQ STC2 implements a high performance digital engine for S Series isolated data acquisition hardware Some key features of this engine include the following National Instruments Corporation Flexible AI and AO sample and convert timing Many triggering modes Independent AI AO DI and DO FIFOs Generation and routing of RTSI signals for multi device synchronization Generation and routing of internal and external timing signals Two flexible 32 bit counter timer modules with hardware gating Digital waveform acquisition and generation S Series User Manual Chapter 1 DAQ System Overview e Static DIO signals e True 5 V high current drive DO e PLL for clock synchronization e PCI PXI interface Independent scatter gather DMA controllers for all acquisition and generation functions Calibration Circuitry Calibration is the process of making adjustments to a measurement device to reduce errors associated with measurements Without calibration the measurement results of your device will drift over time and temperature Calibration adjusts for these changes to improve measurement accuracy and ensure that your product meets its required specifications DAQ devices ha
7. SH68 68 EP shielded cable e SH68 68R1 EP shielded cable with one right angle connector e RC68 68 unshielded cable Using SSR or ER Digital Signal Conditioning SSR and ER series provide per channel digital signal conditioning Using RTSI Use RTSI bus cables to connect the timing and synchronization signals on your DAQ device to other Measurement Vision Motion and CAN boards for PCI Custom Cabling Connectors Options The CA 1000 is a versatile connector enclosure system It allows the user to define I O connectors on a per channel basis Internally the system allows for flexible custom wiring configuration If you want to develop your own cable follow these guidelines for best results e Use shielded twisted pair wires for each differential AI pair Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals Mating connectors and a backshell kit for making custom 68 pin cables are available from NI National Instruments Corporation A 7 S Series User Manual Appendix A Device Specific Information NI recommends that you use one of the following connectors with the I O connector on your device Honda 68 position solder cup female
8. HEEL owe Counter Bus DAQ STC O Timing y Timing 1 0 DAQ STC interface 4 j Bus FPGA Pi A UID a p Interface 1 Analog Output Analog Digital VO 8 X Digital VO 1 Timing Cono renee Output ints 1 1 Control nterface Fa AO Control DACO K DAS Data 32 DAC K f E Calibration mme gt 4 DACs KA Figure A 4 NI 6111 Block Diagram NI 6110 6111 Cables and Accessories This section describes some of the cable and accessory options for the NI 6110 6111 For more specific information about these products refer to ni com Using BNCs You can connect BNC cables to your DAQ device using BNC accessories such as the BNC 2110 BNC 2120 and BNC 2090 To connect your DAQ device to a BNC accessory use one of the following cables SH68 68 EP shielded cable S Series User Manual SH68 68R1 EP shielded cable with one right angle connector RC68 68 unshielded cable A 6 ni com Appendix A Device Specific Information Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 68LP CB 68LPR low cost screw terminal block e SCB 68 shielded screw terminal block with breadboard areas e TBX 68 DIN rail mountable screw terminal block To connect your DAQ device to a screw terminal accessory use one of the following cables
9. NC Al 4 AI 5 AI 5 GND Al 6 AL 7 Al 7 GND NC NC D GND PO 0 PO 5 D GND PO 2 P0 7 P0 3 Al HOLD COMP EXT STROBE D GND PFI 2 Al CONV CLK PFI 3 CTR 1 SOURCE PFI 4 CTR 1 GATE CTR 1 OUT D GND PFI 7 Al SAMP CLK PFI 8 CTR 0 SOURCE D GND D GND NC No Connect Figure A 14 NI 6143 Pinout A 29 S Series User Manual Device Specific Information Appendix A Device Specific Information For a detailed description of each signal refer to the O Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 7 0 Connector NI 6143 Block Diagram Figure A 15 shows the NI 6143 block diagram S Series User Manual A 30 ni com Appendix A Device Specific Information CAL DustMITE P K Fol a A10 aro lt toni E PGIA 16 Bit Rd ADC gt a Address 14 PO PGIA 16 Bi aH cu lt mas eo ADC Flash Data 32 ion Al2 ayo E PGIA 16 Bit E oo ADC Fol Al3 AL3 zi PGIA 16 Bit Sms 2 3 z FPGA a x S b A4 LALA SICA a i PGIA 16 Bit Q 5 Eoo DC O ai DMA IRQ 2 o AIS UNT Plo PGIA 16 Bit AS I Analog Analog utpur D
10. eee emen 5 6 Getting Started with DIO Applications in Software 5 7 Chapter 6 Digital 1 0 for Isolated Devices Static DIO Isolated Devices aes de atene t tyi eine 6 2 T O Protection Isolated Devices 6 2 Connecting Digital I O Signals Isolated Devices 6 2 Getting Started with DIO Applications in Software Isolated Devices 6 4 Chapter 7 Counters Counter Tg Bering ree rte err ETE EE ERE deed 7 1 Start rig gero onse ba eo boat etate te tette o Mr tete e nee 7 2 Pause LIB Betu ue odes cous er ert e Pei Get Eee sped au 7 2 Counter Timing Signals iau ped ee e eer Wie ae 7 2 Counter 0Source Signal rieien ne NN eS 7 4 Counter 0 Gate Signal ccc ene de ee eR 7 5 Counter 0 Internal Output Signal 7 6 GTR O0 OUT Pis za eben ree ed 7 1 Counter 0 Up Down Signal 7 8 Counter Source Signal a oed tin tet ee 7 8 Counter Gate Signal oer ertet tO hier tes 7 9 Counter 1 Internal Output Signal 7 9 Counter 1 Up Down Signal 7 10 Frequency Output Signal ses 7 11 Master Timebase Signal serrr neei eter epi Hatte 7 11 Getting Started with Counter Applications in Software 7 12 Chapter 8 Programmable Function Interfaces PFI for Non Isolated Devices S Series User Manual X ni com Contents Chapter 9 Programmable Function Interfaces PFI for Isolated Devices Chapter 10 Digital Routing Timing Signal Routing for Non Isolated Devices eee 10 1 Timing Signal R
11. 5008 0 1 uF Al 0 GND SZ NU Al 0 Connections Shown S Series User Manual Figure 3 10 Pseudodifferential Connection for Non Referenced Signals on NI 6120 Devices The figures show a bias resistor connected between AI 0 and the floating signal source ground This resistor provides a return path for the bias current A value of 10 KQ to 100 KO is usually sufficient If you do not use the resistor and the source is truly floating the source is not likely to remain within the common mode signal range of the instrumentation amplifier so the instrumentation amplifier saturates causing erroneous readings You must reference the source to the respective channel ground Common mode rejection might be improved by using another bias resistor from the AI 0 input to AI 0 GND This connection gives a slight measurement error due to the voltage divider formed with the output impedance of the floating source but it also gives a more balanced input for better common mode rejection If a signal source is truly floating you can use a bias resistor with a smaller value to reduce noise You can further reduce noise by putting a capacitor in parallel with the bias resistor 3 18 ni com Chapter 3 Analog Input Field Wiring Considerations Environmental noise can seriously affect the measurement accuracy of the S Series device if you do not take proper care when running signal wires between signal sources an
12. MasterTimebase Figure 11 1 PCI RTSI Bus Signal Connection S Series User Manual 11 2 ni com National Instruments Corporation Chapter 11 Real Time System Integration Bus RTS Figure 11 2 shows the PXI RTSI bus signal connection PXI Star 6 gt _ gt PXI Trigger lt 0 5 gt PXI Bus Connector RTSI Switch DAQ STC lt _ _ gt ai StartTrigger amp e ai ReferenceTrigger amp 4 ao SampleClock 4 ao StartTrigger 3 CirdSource JM Cir0Gate 4 CtrOlnternalOutput amp CtroOut ai SampleClock e ai PauseTrigger m ai SampleClockTimebase P ao SampleClockTimebase L CtriSource c p CtriGate e ao PauseTrigger RTSI Trigger 7 Ad Switch amp 20MHzTimebase m MasterTimebase 4 Figure 11 2 PXI RTSI Bus Signal Connection Refer to the Timing Signal Routing for Non Isolated Devices section or Timing Signal Routing for Isolated Devices section of Chapter 10 Digital Routing for a description of the signals shown in the figures 11 3 S Series User Manual Chapter 11 Real Time System Integration Bus RTS Device and RTSI Clocks Many S Series device functions require a frequency timebase to generate the necessary timing signals for controlling A D conversions DAC
13. You can export the CtrOSource signal to the PFI 8 CTR 0 SOURCE pin even if another PFI is inputting the CtrOSource signal This output is set to high impedance at startup S Series User Manual 7 4 ni com Chapter 7 Counters Figure 7 3 shows the timing requirements for the CtrOSource signal l i vene tp 50 ns minimum tw 10 ns minimum Figure 7 3 CtrOSource Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency For most applications unless you select an external source the 20MHzTimebase signal or the 100kHzTimebase signal generates the CtrOSource signal NI 6154 Only On the NI 6154 PFI 0 5 can be selected as the Counter 0 Source signal You can export the CtrOSource signal to the PFI lt 6 9 gt pin Counter 0 Gate Signal You can select any PFI as well as many other internal signals like the Counter 0 Gate CtrOGate signal The CtrOGate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can export the gate signal connected to Counter 0 to the PFI 9 CTR 0 GATE pin even if another PFI is inputting the CtrOGate signal This output is set to hi
14. Control 2 m des s a aE S E O arte ac mS c gt DMA Q 752 MEE REY OEE EEE ae ee E E RE Trigger DAQ 5 a Interface Interrupt iud n STCII interface o um PGIA 16 Bit AN fell ee pain a a Counter i5 ital yo RTS Bus e T Timing VO igital Interface ISO Z N7 ISO ZN Voltage Regulation Figure A 17 NI 6154 Block Diagram NI 6154 Cables and Accessories This section describes some of the cable and accessory options for the NI 6154 For more specific information about these products refer to ni com Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 37F LP unshielded I O connector block with 37 pin D SUB e CB 37FH 37 pin screw terminal block horizontal DIN rail mount e CB 37FV 37 pin screw terminal block vertical DIN rail mount National Instruments Corporation A 37 S Series User Manual Appendix A Device Specific Information TB 37F 37CP 37 pin crimp amp poke terminals shell with strain relief TB 37F 37SC 37 pin solder cup terminals shell with strain relief CB 37F HVD 37 pin screw terminal block 150 V CAT II DIN rail mount To connect your DAQ device to a screw terminal accessory use one of the following cables SH37F 37M 2 37 pin f
15. Al two 24 bit two 16 bit counters e AO three 24 bit one 16 bit counter General purpose counter timer functions two 24 bit counters You can independently configure the groups for timing resolutions of 50 ns or 10 us With the DAQ STC you can interconnect a wide variety of internal timing signals to other internal blocks The interconnection scheme is flexible and completely software configurable The DAQ STC offers PFI lines to import external timing and trigger signals or to export internally generated clocks and triggers The DAQ STC also supports buffered operations such as buffered waveform acquisition buffered waveform generation and buffered period measurement It also supports numerous non buffered operations such as single pulse or pulse train generation digital input and digital output 1 2 ni com DAQ Hardware for Isolated Devices Chapter 1 DAQ System Overview DAQ isolated hardware incorporates all the data acquisition features of DAQ hardware while also including bank and channel to channel isolation Isolated DAQ hardware allows for increased protection against hazardous voltages rejection of common mode voltages and easier connection by reduction of ground loops and their associated noise Figure 1 3 shows the components common to isolated S Series devices 1 0 Connector Analog Input Analog Output Digital I O Counters
16. DMA is the default method of data transfer for DAQ devices that support it Interrupt Request IRQ Programmed 1 0 S Series User Manual IRQ transfers rely on the CPU to service data transfer requests The device notifies the CPU when it is ready to transfer data The data transfer speed is tightly coupled to the rate at which the CPU can service the interrupt requests If you are using interrupts to acquire data at a rate faster than the rate the CPU can service the interrupts your systems may start to freeze Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations 12 2 ni com Chapter 12 Bus Interface Changing Data Transfer Methods between DMA and IRQ There are a limited number of DMA channels per device refer to the specifications document for your device Each operation specifically AI AO and so on that requires a DMA channel uses that method until all of the DMA channels are used After all of the DMA channels are used you will get an error if you try to run another operation requesting a DMA channel If appropriate you can change one of the operations to use interrupts For NI DAQmx use the Data Transfer Mechanism property node For Traditional NI DAQ Legacy use the Set DAQ Device Information VI or function Nati
17. owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks National Instruments NI ni com and LabVIEW are trademarks of National Instruments Corporation Refer to the Terms of Use section on ni com 1egal for more information about National Instruments trademarks FireWire is the registered trademark of Apple Computer Inc Other product and company names mentioned herein are trademarks or trade names of their respective companies Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have n
18. updates or general purpose signals at the I O connector This timebase is also called the Master Timebase or Onboard Clock Refer to the Master Timebase Signal section of Chapter 7 Counters for more information Most S Series devices can use either their internal 20MHzTimebase signal or a timebase received over the RTSI bus The timebase can only be routed to or received from RTSI 7 or the RTSI clock The device uses this clock source whether local or from the RTSI bus as the primary frequency source If you configure the device to use the internal timebase you also can program the device to drive its internal timebase over the RTSI bus to another device that is programmed to receive this timebase signal The default configuration is to use the internal 20MHzTimebase signal without driving the timebase onto the RTSI bus Synchronizing Multiple Devices With the RTSI bus and the routing capabilities of the DAQ STC or the DAQ STC2 there are several ways to synchronize multiple devices depending on your application NI recommends that you use a common timebase as the MasterTimebase signal and share any common triggers in the application One device is designated as the master device and all other devices are designated as slave devices The 20MHzTimebase on the master device is the MasterTimebase signal for all devices The slave devices pull this signal from the master device across the RTSI trigger 7 line Slave devices also pull a
19. 19 I O connector 2 1 NI 6110 6111 A 6 NI 6115 6120 A 12 NI 6122 6123 A 20 NI 6132 6133 A 26 NI 6143 A 31 NI 6154 A 37 AI Pause Trigger signal 3 25 AI Reference Trigger signal 3 23 AI Sample Clock signal 3 26 AI Sample Clock Timebase signal 3 28 AI Start Trigger signal 3 21 analog input circuitry 3 2 data acquisition methods 3 5 fundamentals 3 1 overview 3 1 terminal configuration 3 3 timing signals 3 20 timing summary 3 20 triggering 3 7 National Instruments Corporation l 1 analog input signals AI Pause Trigger 3 25 AI Reference Trigger 3 23 AI Sample Clock 3 26 AI Sample Clock Timebase 3 28 AI Start Trigger 3 21 connecting 3 7 External Strobe 3 30 Master Timebase 3 29 analog output circuitry 4 2 connecting signals 4 5 data generation methods 4 3 fundamentals 4 1 minimizing glitches 4 3 NI 6110 6111 A 2 NI 6115 6120 A 9 NI 6154 A 33 overview 4 1 4 2 triggering 4 5 analog output signals AO Pause Trigger 4 11 AO Sample Clock 4 9 AO Sample Clock Timebase 4 11 AO Start Trigger 4 7 Master Timebase 4 12 analog triggering about 13 2 accuracy 13 7 types 13 4 ANSI C documentation xv AO Pause Trigger signal 4 11 AO Sample Clock signal 4 9 AO Sample Clock Timebase signal 4 11 AO Start Trigger signal 4 7 S Series User Manual Index block diagram NI 6110 A 5 NI 6111 A 6 NI 6115 A 11 NI 6120 A 12 NI 6122 6123 A 18 NI 6132 6133 A 25 NI 6143 A 30 N
20. 28 specifications A 33 working voltage range 3 5 NI 6154 A 37 block diagram A 36 cables and accessories A 37 digital I O 6 1 features A 33 National Instruments Corporation l 5 isolation barrier and digital isolators 3 3 4 3 specifications A 38 timing signal connections 10 7 timing signal routing 10 4 working voltage range 3 5 NI support and services B 1 NI DAQ documentation xii device documentation browser xvi NI DAQmx Base documentation xiii NI DAQmx for Linux documentation xii P PFI for isolated devices 9 1 PFI for non isolated devices about 8 1 inputs 8 1 outputs 8 2 pinouts 50 pin MIO I O connector A 4 A 17 A 24 NI 6110 6111 A 2 NI 6115 6120 A 9 NI 6122 6123 A 15 NI 6132 6133 A 22 NI 6143 A 28 NI 6154 A 34 polarity and reference selection 4 2 power source 2 7 power on states 5 6 programmable function interfaces for isolated devices 9 1 for non isolated devices 8 1 programmed I O 12 2 programming examples NI resources B 1 pseudodifferential connections for ground referenced signal sources 3 15 S Series User Manual Index for non referenced or floating signal sources 3 17 PXI with CompactPCI 12 1 R related documentation xii RTSI clocks 11 4 description 11 1 synchronizing multiple devices 11 4 triggers 11 1 S S Series devices A 1 specifications xvi sensors 1 5 signal conditioning 1 5 signal connections analog inpu
21. 45V 5V 35 36 Al HOLD COMP EXT STROBE 37 38 PFI O AI START TRIG PFI 1 Al REF TRIG 39 40 PFI 2 Al CONV CLK PFI 3 CTR 1 SOURCE 41 42 PFI 4 CTR 1 GATE CTR 1 OUT 43 44 PFI 5 AO SAMP CLK PFI 6 AO START TRIG 45 46 PFI 7 Al SAMP CLK PFI 8 CTR 0 SOURCE 47 48 PFI 9 CTR 0 GATE CTR 0 OUT 49 50 FREQ OUT 1 NC on NI 6111 Figure A 9 50 Pin 1 0 Connector Note Some hardware accessories may not yet reflect the NI DAQmx terminal names If you are using an S Series device in Traditional NI DAQ Legacy refer to Table 2 3 Terminal Name Equivalents for the Traditional NI DAQ Legacy signal names National Instruments Corporation A 17 S Series User Manual Appendix A Device Specific Information For a detailed description of each signal refer to the O Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 7 0 Connector NI 6122 6123 Block Diagram Figure A 10 shows the NI 6122 6123 block diagram S Series User Manual A 18 ni com Appendix A Device Specific Information l O Connector CAL MUX DustMITE 2 Address Data PCI PXI Bus
22. 7 D GND 13 47 PO 8 D GND 12 46 Al HOLD COMP PFI 0 AI START TRIG 11 45 EXT STROBE PFI 1 Al REF TRIG 10 44 D GND D GND 9 43 PFI 2 Al CONV CLK 5V 8 42 PFI 3 CTR 1 SOURCE D GND 7 41 PFI 4 CTR 1 GATE PFI 5 AO SAMP CLK 6 40 CTR 1 OUT PFI 6 AO START TRIG 5 39 D GND D GND 4 38 PFI 7 AI SAMP CLK PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1 35 D GND NC No Connect Figure A 5 NI 6115 6120 Pinout S Series User Manual A 10 ni com Appendix A Device Specific Information For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 I O Connector NI 6115 6120 Block Diagrams Figure A 6 shows the NI 6115 block diagram ax AIO gt AIO gt Anti AIO 12 AIO Mux amp Aliasing P 12 Bit 5P Latch Data 16 Al0 Filter ADC F mH Ali GT Ant Alt Lao Ald t Aliasing 12 Bit 5AP Data 16 A MX Filter ADC ux l I A2 gt 2 Ant A2 12 AI2 liasi Bi Data 16 no ve M Alssing PA 121 72 atc Pata O9
23. A 48 E wo 47 D 46 A 45 o 44 Ke 43 42 41 40 39 38 37 36 m COo Lj o o o 35 AI O AI 0 GND Alsi AI 2 AI 2 GND AI 3 NC Al4 1 AI 5 1 AI 5 GND 1 Al 6 1 AI7 AI 7 GND 1 NC NC D GND PO 0 PO 5 D GND P0 2 P0 7 P0 3 Al HOLD COMP EXT STROBE D GND PFI 2 Al CONV CLK PFI 3 CTR 1 SOURCE PFI 4 CTR 1 GATE CTR 1 OUT D GND PFI 7 Al SAMP CLK PFI 8 CTR 0 SOURCE D GND D GND NC No Connect 1 NC on NI 6122 6132 S Series User Manual Figure A 8 NI 6122 6123 Pinout 4 16 ni com Appendix A Device Specific Information For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 I O Connector 50 Pin MIO 1 0 Connector Pinout Figure A 9 shows the 50 pin I O connector that is available when you use the SH6850 cable assembly with some 68 pin S Series devices Al 0 3 GND 1 2 Al lt 0 3 gt GND AIO 3 4 AlO AI 1 5 6 AI1 AI 2 1 7 8 Al2 1 Al3 1 9 10 A13 1 PFI 0 AI START TRIG 11 12 NC NC 13 14 NC NC 15 16 NC NC 17 18 NC NC 19 20 AOO AO 1 21 22 NC AO GND 23 24 D GND PO 0 25 26 PO 1 P0 2 27 28 P0 3 P0 4 29 30 P0 5 P0 6 31 32 PO 7 D GND 33 34
24. AO START 2 6 ni com Chapter 2 1 0 Connector 5 V Power Source The 5 V pins on the I O connector supply 5 V power You can use these pins referenced to D GND to power external circuitry A self resetting fuse protects the supply from overcurrent conditions The fuse resets automatically within a few seconds after the overcurrent condition is removed Power rating most devices 4 65 to 5 25 VDC at 1 A To find your device s power rating refer to the specifications document for your device Caution Never connect these 5 V power pins to analog or digital ground or to any other voltage source on the S Series device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection NI 6154 Only The 5 V power source does not apply to the NI 6154 National Instruments Corporation 2 7 S Series User Manual Analog Input Figure 3 1 shows the analog input circuitry of each channel of an S Series non isolated device For more information refer to the Analog Input Circuitry section Input Instrumentation Coupling Amplifier Filter AH ADC AlI FIFO AI Data Al Mux CAL Analog Trigger Al Timing Signals Figure 3 1 S Series Non Isolated Device Analog Input Block
25. C68 S shielded VHDCI to SCSI II cable Using RTSI Use RTSI bus cables to connect the timing and synchronization signals on your DAQ device to other Measurement Vision Motion and CAN boards for PCI Custom Cabling Connectors Options The CA 1000 is a versatile connector enclosure system It allows the user to define I O connectors on a per channel basis Internally the system allows for flexible custom wiring configuration If you want to develop your own cable follow these guidelines for best results e Use shielded twisted pair wires for each differential AI pair Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals A 32 ni com Appendix A Device Specific Information Mating connectors and a backshell kit for making custom 68 pin cables are available from NI NI recommends that you use one of the following connectors with the I O connector on your device e Honda 68 position solder cup female connector e Honda backshell e AMP VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors NI 6143 Specifications Refer
26. Counter 1 gate signal Counter 1 output signal Counter 1 clock source signal Counter 1 up down signal Digital to analog Digital to analog converter an electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current See data acquisition DAQ A device that acquires or generates data and can contain multiple channels and conversion devices DAQ devices include plug in devices PCMCIA cards and DAQPad devices which connect to a computer USB or 1394 FireWire port SCXI modules are considered DAQ devices Data acquisition system timing controller an application specific integrated circuit ASIC for the system timing requirements of a general A D and D A system 1 Acquiring and measuring analog or digital electrical signals from sensors transducers and test probes or fixtures 2 Generating analog or digital electrical signals Decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts Decibel carrier level difference referenced to a carrier level c Direct current although the term speaks of current many different types of DC measurements are made including DC Voltage DC current and DC power G 4 ni com device D GND DI DIFF DIO DIP DMA DNL DO driver E earth ground EEPROM ESD National Instruments Corporation G 5 Glossary 1 An
27. GND 10 ko 40 pF for ranges gt 10 V SIT 50 Q 2 0 1 uF 1 0 Connector Al O Connections Shown S Series User Manual Figure 3 8 Pseudodifferential Connection for Ground Referenced Signals on NI 6120 Devices With this type of connection the instrumentation amplifier rejects both the common mode noise in the signal and the ground potential difference between the signal source and the device ground shown as Vom in these figures Common Mode Signal Rejection Considerations The instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the device In addition the instrumentation amplifier can reject common mode noise pickup in the leads connecting the signal sources to the device The instrumentation amplifier can reject common mode signals as long as V and V input signals are both within the working voltage range of the device Like any amplifier the common mode rejection ratio CMRR of the PGIA is limited at high frequency A common mode choke on each channel of the NI 6115 6120 compensates for this limitation 3 16 ni com Chapter 3 Analog Input NI 6115 Only The purpose of the 10 nF capacitance on the AI lt 0 3 gt connection of the NI 6115 is to provide an impedance for this choke to work against at high frequency which improves the high frequency CMRR Depending on your application and the type of common noise
28. Ge c w N nmN O O1 ND NI COIN N M o C2 o 9S C2 N C2 C Co 35 Al 0 NC Al 1 Al 2 NC Al 3 AO 0 NC AO 1 AO 2 NC AO 3 PFI 0 P0 0 D GND PFI 3 P0 3 D GND PFI 6 P1 0 D GND PFI 9 P1 3 NC No Connect Figure A 16 NI 6154 Pinout For a detailed description of each signal refer to the O Connector Signal Descriptions for Isolated Devices section of Chapter 2 I O Connector S Series User Manual A 34 ni com Appendix A Device Specific Information NI 6154 Isolation and Digital Isolators The NI 6154 is an isolated data acquisition device As shown in Figure 1 3 Isolated S Series Block Diagram the analog input analog output and PFI static DIO circuitry are referenced to separate isolated grounds for each circuit The bus interface circuitry RTSI digital routing and clock generation are all referenced to a non isolated ground Table A 1 shows the ground symbols referenced in Figure 1 3 Table A 1 Ground Symbols Ground Symbol Isolated Ground V7 Non Isolated Ground d The non isolated ground is connected to the chassis ground of the PC or chassis where the device is installed The isolated ground is not connected to the chassis ground of the PC or chassis The isolated ground can be at a higher or lower voltage relative to the
29. Internally the system allows for flexible custom wiring configuration If you want to develop your own cable follow these guidelines for best results e Use shielded twisted pair wires for each differential AI pair Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals National Instruments Corporation A 13 S Series User Manual Appendix A Device Specific Information Mating connectors and a backshell kit for making custom 68 pin cables are available from NI NI recommends that you use one of the following connectors with the I O connector on your device Honda 68 position solder cup female connector e Honda backshell e AMP VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors NI 6115 6120 Specifications NI 6122 6123 Refer to the NI 6115 6120 Specifications for more detailed information about the devices S Series User Manual The NI 6122 6123 is a Plug and Play multifunction analog digital and timing I O device for PCI and PXI bus computers The NI 6122 features e four simultaneously sampling analo
30. Programs National Instruments NI DAQmx Base Documentation Getting Started Guide The NI DAQmx Base Readme lists which devices are supported by this version of NI DAQmx Base Select Start All Programs National Instruments NI DAQmx Base DAQmx Base Readme The NI DAQmx Base VI Reference Help contains VI reference and general information about measurement concepts In LabVIEW select Help NI DAQmx Base VI Reference Help The NI DAQmx Base C Reference Help contains C reference and general information about measurement concepts Select Start All Programs National Instruments NI DAQmx Base Documentation C Function Reference Help LabVIEW If you are a new user use the Getting Started with LabVIEW manual to familiarize yourself with the LabVIEW graphical programming environment and the basic LabVIEW features you use to build data acquisition and instrument control applications Open the Getting Started with LabVIEW manual by selecting Start All Programs National Instruments LabVIEW LabVIEW Manuals or by navigating to the labview manuals directory and opening LV Getting Started pdf Use the LabVIEW Help available by selecting Help Search the LabVIEW Help in LabVIEW to access information about LabVIEW programming concepts step by step instructions for using LabVIEW and reference information about LabVIEW VIs functions palettes menus and tools Refer to the following locations on the Contents tab of the LabVIEW Hel
31. RTSI Clocks section of Chapter 11 Real Time System Integration Bus RTSI for information about routing this signal Connecting Timing Signals for Non Isolated Devices UN Caution Exceeding the maximum input voltage ratings which are listed in the specifications document for each S Series device can damage your device and the computer NI is not liable for any damage resulting from such signal connections National Instruments Corporation 10 5 S Series User Manual Chapter 10 Digital Routing The 10 programmable function interface PFI pins labeled PFI lt 0 9 gt route all external control over the timing of the S Series device These PFIs are bidirectional as outputs they are not programmable and reflect the state of many analog input waveform generation and counter timing signals There are five other dedicated outputs for the remainder of the timing signals As inputs the PFI signals are programmable and can control all analog input waveform generation counter timing signals All digital timing connections are referenced to D GND Figure 10 3 shows this reference and how to connect an external AI START TRIG source and an external AI SAMP CLK source to two PFI pins PFI 0 AI START TRIG PFI 7 Al SAMP CLK Al START TRIG Al SAMP CLK Source Source D GND ZO X l O Connector S Series Device Figure 10 3 Conn
32. Series User Manual 3 12 ni com Chapter 3 Analog Input Isolated S Series Device Isolation Barrier Instrumentation Floating Amplifier Signal Vs Digital Source 4 Isolators Measured jth Voltage Al 0 Connections Shown Figure 3 6 Differential Connection for Non Referenced Signals on Isolated Devices DC Coupled Low Source Impedance You must reference the source to AI GND The easiest way to make this reference is to connect the positive side of the signal to the positive input of the instrumentation amplifier and connect the negative side of the signal to ALGND as well as to the negative input of the instrumentation amplifier without using resistors This connection works well for DC coupled sources with low source impedance less than 100 Q DC Coupled High Source Impedance For larger source impedances this connection leaves the DIFF signal path significantly off balance Noise that couples electrostatically onto the positive line does not couple onto the negative line because it is connected to ground Hence this noise appears as a DIFF mode signal instead of a common mode signal and the instrumentation amplifier does not reject it In this case instead of directly connecting the negative line to AI GND connect the negative line to AI GND through a resistor that is about 100 times the equivalent source impedance The resistor puts the signal p
33. Series device uses the RTSI bus to interconnect timing signals between devices and it uses the programmable function interface PFI pins on the I O connector to connect the device to external circuitry These connections are designed to enable the S Series device to both control and be controlled by other devices and circuits You can control the following timing signals internal to the DAQ STC by an external source e AI Start Trigger Signal e Al Reference Trigger Signal e AI Sample Clock Signal e AI Pause Trigger Signal e AI Sample Clock Timebase Signal National Instruments Corporation 10 1 S Series User Manual Chapter 10 Digital Routing S Series User Manual e AO Start Trigger Signal e AO Sample Clock Signal e AO Pause Trigger Signal e AO Sample Clock Timebase Signal e DI Sample Clock Signal e DO Sample Clock Signal e Counter 0 Source Signal e Counter 0 Gate Signal e Counter 0 Up Down Signal e Counter 1 Source Signal e Counter 1 Gate Signal e Counter 1 Up Down Signal e Master Timebase Signal You also can control these timing signals by signals generated internally to the DAQ STC and these selections are fully software configurable Figure 10 1 shows an example of the signal routing multiplexer controlling the ai SampleClock signal 10 2 ni com Chapter 10 Digital Routing EE RTSI Trigger lt 0 6 gt I ai Sample Clock PFI lt 0 9 gt Onboard Clock
34. VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors NI 6132 6133 Specifications Refer to the NI 6132 6133 Specifications for more detailed information about the devices National Instruments Corporation A 27 S Series User Manual Appendix A Device Specific Information NI 6143 The NI 6143 is a Plug and Play multifunction analog digital and timing I O device for PCI and PXI bus computers The NI 6143 features e eight simultaneously sampling analog inputs with one 16 bit A D converter ADC per channel e eight lines of TTL compatible DIO e two general purpose 24 bit counter timers Because the NI 6143 has no DIP switches jumpers or potentiometers it can be easily calibrated and configured in software NI 6143 1 0 Connector Pinout S Series User Manual Figure A 14 shows the pin assignments for the 68 pin I O connector on the NI 6143 A 28 ni com Appendix A National Instruments Corporation AIO Al 1 Al 1 GND AI 2 Al3 Al 3 GND Al 4 Al 4 GND AI 5 AI 6 Al 6 GND AI 7 NC NC NC P0 4 D GND PO 1 P0 6 D GND 45V D GND D GND PFI 0 AI START TRIG PFI 1 Al REF TRIG D GND 5V D GND PFI5 PFI6 D GND PFI 9 CTR 0 GATE CTR 0 OUT FREQ OUT nc AIO AI 0 GND Al 1 AI 24 AI 2 GND AI 3
35. amplitude National Instruments Corporation G 9 S Series User Manual Glossary rms RSE RTSI bus RTSI OSC S s scatter gather SCXI sensor settling time signal conditioning SOURCE system noise S Series User Manual Root mean square Referenced single ended mode all measurements are made with respect to acommon reference measurement system or a ground Also called a grounded measurement system Real Time System Integration bus the National Instruments timing bus that connects DAQ devices directly by means of connectors on top of the devices for precise synchronization of functions RTSI Oscillator RTSI bus master clock Seconds Samples Samples per second Used to express the rate at which a digitizer or D A converter or DAQ device samples an analog signal The term used to describe very high speed DMA burst mode transfers that are made only by the bus master and where noncontiguous blocks of memory are transparently mapped by the controller to appear as a seamless piece of memory Signal Conditioning eXtensions for Instrumentation The National Instruments product line for conditioning low level signals within an external chassis near sensors so that only high level signals are sent to DAQ devices in the noisy PC environment SCXI is an open standard available for all vendors A device that responds to a physical stimulus heat light sound pressure motion flow and so on and
36. analog output A 9 cables and accessories A 12 correlated DIO examples in Traditional NI DAQ Legacy 5 7 DI Sample Clock signal 5 4 digital waveform acquisition 5 4 digital waveform generation 5 2 DO Sample Clock signal 5 3 features A 8 high speed digital waveform acquisition 5 1 high speed digital waveform generation 5 1 T O connector pinout A 9 input coupling 3 2 pseudodifferential inputs 3 3 pseudodifferential non referenced or floating signals 3 17 specifications A 14 ni com Index NI 6120 block diagram A 12 NI 6122 6123 A 20 A 21 I O connector pinout A 34 isolation and digital isolators A 35 block diagram A 18 cables and accessories A 20 DI Sample Clock signal 5 4 digital waveform acquisition 5 4 digital waveform generation 5 2 DO Sample Clock signal 5 3 features A 14 high speed digital waveform acquisition 5 1 high speed digital waveform generation 5 1 I O connector pinout A 15 specifications A 21 NI 6132 6133 A 26 A 28 block diagram A 25 cables and accessories A 26 DI Sample Clock signal 5 4 digital waveform acquisition 5 4 digital waveform generation 5 2 DO Sample Clock signal 5 3 features A 21 high speed digital waveform acquisition 5 1 high speed digital waveform generation 5 1 I O connector pinout A 22 specifications A 27 NI 6143 A 31 A 33 block diagram A 30 cables and accessories A 31 features A 28 I O connector pinout A
37. before driving the analog trigger circuitry If you configure the AI channel to have a small input range you can trigger on very small voltage changes in the input signal Software calibrate the analog trigger circuitry No hardware calibration is provided for the analog trigger circuitry In addition the propagation delay from when a valid trigger condition is met to when the analog trigger circuitry emits the Analog Comparison Event may have an impact on your measurements if the trigger signal has a high slew rate If you find these conditions have a noticeable impact on your measurements you can perform software calibration on the analog trigger circuitry by configuring your task as normal and applying a known signal for your analog trigger Comparing the observed results against the expected results you can calculate the necessary offsets to apply in software to fine tune the desired triggering behavior 13 7 S Series User Manual Device Specific Information This appendix includes device specific information about the following S Series devices e NI6110 6111 e NI 6115 6120 e NI 6122 6123 e NI 6132 6133 e NI6143 e NI 6154 NI 6110 6111 The NI 6110 6111 is a Plug and Play multifunction analog digital and timing I O device for PCI bus computers The NI 6110 features e four simultaneously sampling analog inputs with one 12 bit A D converter ADC per channel e two 16 bit D A converters DACs with voltage outp
38. device to a screw terminal accessory use one of the following cables SH68 68 EP shielded 68 conductor cable SH68 68R1 EP shielded right angle 68 conductor cable e SH6868 shielded 68 conductor cable e R6868 68 conductor ribbon cable Using RTSI Use RTSI bus cables to connect the timing and synchronization signals on your DAQ device to other Measurement Vision Motion and CAN boards for PCI A 26 ni com Appendix A Device Specific Information Custom Cabling Connectors Options The CA 1000 is a versatile connector enclosure system It allows the user to define I O connectors on a per channel basis Internally the system allows for flexible custom wiring configuration If you want to develop your own cable follow these guidelines for best results e Use shielded twisted pair wires for each differential AI pair Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals Mating connectors and a backshell kit for making custom 68 pin cables are available from NI NI recommends that you use one of the following connectors with the I O connector on your device e Honda 68 position solder cup female connector e Honda backshell AMP
39. does not support hardware analog triggering Analog Trigger Types Level Triggering S Series User Manual You can configure the analog trigger circuitry to different triggering modes You can configure the analog trigger circuitry to detect when the analog signal is below or above a level you specify In below level analog triggering mode the trigger is generated when the signal value is less than Level 13 4 ni com Chapter 13 Triggering Analog Comparison Event j Figure 13 3 Below Level Analog Triggering Mode In above level analog triggering mode the trigger is generated when the signal value is greater than Level Analog Comparison Event Figure 13 4 Above Level Analog Triggering Mode Level Triggering with Hysteresis Hysteresis adds a programmable window above or below the trigger level that a valid trigger signal must pass through and is often used to reduce false triggering due to noise or jitter in the signal When using Hysteresis with a rising slope the trigger asserts when the signal starts below Level and then crosses above Level The trigger deasserts when the signal crosses below Level minus hysteresis National Instruments Corporation 13 5 S Series User Manual Chapter 13 Triggering Hysteresis Analog Comparison Event Figure 13 5 High Hysteresis When using Hysteresis with a falling slope the
40. gt o Cantal ChannelControl5 JJ Foo fp pore DAQ on E 1 us DE E o o x ancl 1 LL Ll OO 1 Analog 1 gt gt o D Digital VO 1 Tuoi i ara Channel Control 6 Control gt E ar e Trigger eo 2 Circuitry Channel Control 5 RTSI Ira Connector PFi Trigger 2 Timing S Buffer o lt DigtalVO lt STC Figure A 13 NI 6132 6133 Block Diagram National Instruments Corporation A 25 S Series User Manual Appendix A Device Specific Information B Note AI lt 4 7 gt appear only on the NI 6133 NI 6132 6133 Cables and Accessories S Series User Manual This section describes some of the cable and accessory options for the NI 6132 6133 For more specific information about these products refer to ni com Using BNCs You can connect BNC cables to your DAQ device using BNC accessories such as the BNC 2110 BNC 2120 and BNC 2090 To connect your DAQ device to a BNC accessory use one of the following cables SH68 68 EP shielded 68 conductor cable SH68 68R1 EP shielded right angle 68 conductor cable e SH6868 shielded 68 conductor cable e R6868 68 conductor ribbon cable Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 68LP CB 68LPR low cost screw terminal block e SCB 68 shielded screw terminal block with breadboard areas TBX 68 DIN rail mountable screw terminal block To connect your DAQ
41. in the presence of a large common mode signal Some advantages of isolation are as follows Improved rejection Isolation increases the ability of the measurement system to reject common mode voltages Common mode voltage is the signal that is present or common to both the positive and negative input of a measurement device but is not part of the signal to be measured e Improved accuracy Isolation improves measurement accuracy by physically preventing ground loops Ground loops a common source of error and noise are the result of a measurement system having multiple grounds at different potentials e Improved safety Isolation creates an insulation barrier so you can make floating measurements while protecting against large transient voltage spikes NI 6154 Block Diagram Figure A 17 shows the NI 6154 block diagram S Series User Manual A 36 ni com Appendix A Device Specific Information CAL Circuit j Alo CAL AIO MUX AK 168i X yp ADC ISO zo SF J S ISO AO 1 0 1 p 5 PGIA 16 Bit eC 2 DAC ef Analog Analog S LL I AI2 AL Output Input Bus CAL ER Timing Timing Interface o z MUX tect 8 Control
42. inpul i us oo ADC Timing Timing Interface Control Control Trigger DAQ DMA gg a S uis LLL IE nene C UE O cz Poy i i ADC pee liming VO Digital Vo ret Fol Al7 A17 E PGIA 16 Bit Be ADC lt PFI Trigger 5 lt Timing 9 o lt Digital VO_ amp lt STC DIO Figure A 15 NI 6143 Block Diagram NI 6143 Cables and Accessories This section describes some of the cable and accessory options for the NI 6143 For more specific information about these products refer to ni com National Instruments Corporation A 31 S Series User Manual Appendix A Device Specific Information S Series User Manual Using BNCs You can connect BNC cables to your DAQ device using BNC accessories such as the BNC 2110 BNC 2120 and BNC 2090 To connect your DAQ device to a BNC accessory use one of the following cables e SHC68 68 EP shielded VHDCI to SCSI II cable SH68 C68 S shielded VHDCI to SCSI II cable Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 68LP CB 68LPR low cost screw terminal block e SCB 68 shielded screw terminal block with breadboard areas e TB 2706 PXI screw terminal block with metal housing TBX 68 DIN rail mountable screw terminal block To connect your DAQ device to a screw terminal accessory use one of the following cables SHC68 68 EP shielded VHDCI to SCSI II cable SH68
43. instrument or controller you can access as a single entity that controls or monitors real world I O points A device often is connected to a host computer through some type of communication network 2 See DAQ device and measurement device Digital ground signal Digital input Differential mode an analog input mode consisting of two terminals both of which are isolated from computer ground whose difference is measured Digital input output Dual inline package Direct memory access a method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory Differential nonlinearity a measure in least significant bit of the worst case deviation of code widths from their ideal value of 1 LSB Digital output Software unique to the device or type of device and includes the set of commands the device accepts A direct electrical connection to the earth which provides a reference voltage level called zero potential or ground potential against which all other voltages in a system are established and measured Also referred to as building ground Electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed Electrostatic Discharge A high voltage low current discharge of static electricity that can damage sensitive electroni
44. more counters to do so The maximum allowed frequency for the MasterTimebase is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The two possible sources for the MasterTimebase signal are the internal 20MHzTimebase signal or an external signal through RTSI 7 Typically the 20MHzTimebase signal is used as the MasterTimebase unless you wish to synchronize multiple devices in which case you should use RTSI 7 Refer to Chapter 11 Real Time System Integration Bus RTSI for more information about which signals are available through RTSI Figure 3 22 shows the timing requirements for MasterTimebase tp 50 ns minimum ty 23 ns minimum Figure 3 22 MasterTimebase Timing Requirements National Instruments Corporation 3 29 S Series User Manual Chapter 3 Analog Input External Strobe Signal External Strobe is an output only signal on the EXT STROBE pin that generates either a single pulse or a sequence of eight pulses in the hardware strobe mode An external device can use this signal to latch signals or to trigger events In the single pulse mode software controls the level of the External Strobe External Strobe is used for signal conditioning with SCXI and is not available for use with NI DAQmx Getting Started with Al Applications in Software You can use the S Series device in the following analog input applications e Simultaneo
45. non isolated ground All analog measurements are made relative to the isolated ground signal The isolated ground is an input to the NI 6154 device The user must connect this ground to the ground of the system being measured or controlled For more information refer to the following e The Connecting Analog Input Signals section of Chapter 3 Analog Input e Figure 3 2 S Series Isolated Device Analog Input Block Diagram e The Connecting Analog Output Signals section of Chapter 4 Analog Output e Figure 4 2 S Series Isolated Device Analog Output Block Diagram e The Connecting Digital I O Signals Isolated Devices section of Chapter 6 Digital I O for Isolated Devices e Figure 6 1 S Series Isolated Devices Digital I O Block Diagram e Chapter 9 Programmable Function Interfaces PFI for Isolated Devices National Instruments Corporation A 35 S Series User Manual Appendix A Device Specific Information Digital Isolation The NI 6154 uses digital isolators Unlike analog isolators digital isolators do not introduce any analog error in the measurements taken by the device The A D converter used for analog input is on the isolated side of the device The analog inputs are digitized before they are sent across the isolation barrier Similarly the D A converters used for analog output are on the isolated side of the device Benefits of an Isolated DAQ Device With isolation engineers can safely measure a small voltage
46. occurs the sample counter value decrements until the specified number of posttrigger samples have been acquired For more information about start and reference triggers refer to the Analog Input Triggering section In order to provide all of the timing functionality described throughout this section the DAQ STC provides an extremely powerful and flexible timing engine For more information about all of the clock routing and timing options that the analog input timing engine provides refer to the NI DAQmx Help or the LabVIEW 8 x Help S Series devices feature the following analog input timing signals e AI Start Trigger Signal e AI Reference Trigger Signal e AI Pause Trigger Signal e Al Sample Clock Signal e AI Sample Clock Timebase Signal e Master Timebase Signal e External Strobe Signal Al Start Trigger Signal You can use the AI Start Trigger ai StartTrigger signal to begin a measurement acquisition A measurement acquisition consists of one or more samples If you do not use triggers you begin a measurement with a software command After the acquisition begins you can configure the acquisition to stop National Instruments Corporation 3 21 S Series User Manual Chapter 3 Analog Input S Series User Manual e when a certain number of points are sampled in finite mode e after a hardware reference trigger in finite mode with a software command in continuous mode Using a Digital Source To use ai StartT
47. of Chapter 13 Triggering Outputting the AO Start Trigger Signal You can configure the PFI 6 AO START TRIG pin to output the ao StartTrigger signal The output pin reflects the ao StartTrigger signal regardless of what signal you specify as its source The output is an active high pulse Figure 4 7 shows the timing behavior of the PFI 6 AO START TRIG pin when the pin is an output tw 50 100 ns Figure 4 7 PFI 6 AO START TRIG Timing Behavior The PFI 6 AO START TRIG pin is configured as an input by default 4 8 ni com Chapter 4 Analog Output AO Sample Clock Signal You can use the AO Sample Clock ao SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs The source of the ao SampleClock signal can be internal or external You can specify whether the DAC update begins on the rising edge or falling edge of the ao SampleClock signal Using an Internal Source By default ao SampleClock is created internally by dividing down the ao SampleClockTimebase Several other internal signals can be routed to the sample clock Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Using an External Source You can use a signal connected to any PFI or RTSI lt 0 6 gt pin as the source of ao SampleClock Figure 4 8 shows the timing requirements of the ao SampleClock source Rising Edge Polarity Falling Edge Pola
48. output signals on your device 7 2 ni com Chapter 7 Counters Vin SOURCE tgsu bn out Source Clock Period tsc 50 ns minimum Source Pulse Width tsp 10 ns minimum Gate Setup Time lggu 10 ns minimum Gate Hold Time tgh 0 ns minimum Gate Pulse Width tgw 10 ns minimum Output Delay Time tout 80 ns maximum Figure 7 2 Gate and Source Input Timing Requirements The gate and out signal transitions shown in Figure 7 2 are referenced to the rising edge of the source signal This timing diagram assumes that the counters are programmed to count rising edges The same timing diagram but with the source signal inverted and referenced to the falling edge of the source signal applies when you program the counter to count falling edges The gate input timing parameters are referenced to the signal at the source input or to one of the internally generated signals on your device Figure 7 2 shows the gate signal referenced to the rising edge of a source signal The gate must be valid either high or low for at least 10 ns before the rising or falling edge of a source signal so the gate can take effect at that source edge as shown by tesu and tn The gate signal is not required after the active edge of the source signal If you use an internal timebase clock you cannot synchronize the gate signal with the clock In this case gates applied close to a source edge take effect eit
49. pin PFI 0 AI START TRIG Pin This pin is an analog input when configured as an analog trigger Therefore it is susceptible to crosstalk from adjacent pins resulting in false triggering when the pin is unconnected To avoid false triggering ensure that this pin is connected to a low impedance signal source less than 1 kQ source impedance if you plan to enable this input using the application software National Instruments Corporation 13 3 S Series User Manual Chapter 13 Triggering Analog Input Channel You can select any analog input channel to drive the instrumentation amplifier The instrumentation amplifier amplifies the signal as determined by the input mode and the input polarity and range The output of the instrumentation amplifier then drives the analog trigger detection circuit By using the instrumentation amplifier you can trigger on very small voltage changes in the input signal For more information refer to the Analog Trigger Accuracy section Analog Trigger Actions The output of the Analog Trigger Detection circuit is the Analog Comparison Event signal You can program your DAQ device to perform an action in response to the Analog Comparison Event signal The action can affect the following e analog input acquisitions e analog output generation counter behavior iyi Note Refer to Timing and Triggering in the NI DAQmx Help or the LabVIEW 8 x Help for more information NI 6154 Only The NI 6154
50. product could be subject to restrictions in the FCC rules In Canada the Department of Communications DOC of Industry Canada regulates wireless interference in much the same way Digital electronics emit weak signals during normal operation that can affect radio television or other wireless products All Class A products display a simple warning statement of one paragraph in length regarding interference and undesired operation The FCC rules have restrictions regarding the locations where FCC Class A products can be operated Consult the FCC Web site at www fcc gov for more information FCC DOC Warnings This equipment generates and uses radio frequency energy and if not installed and used in strict accordance with the instructions in this manual and the CE marking Declaration of Conformity may cause interference to radio and television reception Classification requirements are the same for the Federal Communications Commission FCC and the Canadian Department of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial envi
51. signals this pin is the source for the hardware analog trigger This is the default input for the ai StartTrigger signal For more information on PFI signals refer to the Connecting Timing Signals for Non Isolated Devices section and the Connecting Timing Signals for Isolated Devices section of Chapter 10 Digital Routing Output AI Start Trigger Signal As an output this pin emits the ai StartTrigger signal A low to high transition of this signal indicates the start of an acquisition For more information refer to the AJ Start Trigger Signal section of Chapter 3 Analog Input PFI 1 AI REF TRIG D GND Input PFI 1 As an input this is a general purpose input terminal This is the default input for the ai ReferenceTrigger signal Output AI Reference Trigger Signal As an output this pin emits the ai ReferenceTrigger signal This is a low to high transition signal For more information refer to the A7 Reference Trigger Signal section of Chapter 3 Analog Input PFI 2 AI SAMP CLK D GND Input PFI 2 As an input this pin is a general purpose input terminal Output AI Sample Clock Signal As an output this pin emits the ai SampleClock signal Output polarity is selectable For more information refer to the AJ Sample Clock Signal section of Chapter 3 Analog Input S Series User Manual 2 2 ni com Chapter 2 1 0 Connector Table 2 1 Non Isolated 1 0 Connector S
52. to the NI 6143 Specifications for more detailed information about the device NI 6154 The NI 6154 is an isolated Plug and Play multifunction analog digital and timing I O device for PCI bus computers The NI 6154 features e four differential 16 bit analog inputs e four 16 bit analog output channels e tenlines of DIO 6 DI and 4 DO e isolation for each AI and AO channel from the chassis and from one another e bank isolation for DIO from the chassis Because the NI 6154 has no DIP switches jumpers or potentiometers it can be easily calibrated and configured in software NI 6154 Analog Output The NI 6154 supplies four channels of AO voltage at the I O connector The range is fixed at bipolar 10 V The AO channels on the NI 6154 contain 16 bit DACs that are capable of 250 kS s for each channel The AO channels are isolated from each other from the AI channels and from the chassis Refer to the NI 6154 National Instruments Corporation A 33 S Series User Manual Appendix A Device Specific Information Specifications for more detailed information about the AO capabilities of the NI 6154 NI 6154 1 0 Connector Pinout Figure A 16 shows the pin assignments for the 37 pin I O connector on the NI 6154 Al 0 Al 1 NC Al 2 Al 3 NC AO 0 AO 1 NC AO 2 AO 3 NC PFI 1 PO 1 PFI 2 P0 2 PFI 4 P0 4 PFI 5 P0 5 PFI 7 P1 1 PFI 8 P1 2 N C D ER
53. trigger asserts when the signal starts above Level and then crosses below Level The trigger deasserts when the signal crosses above Level plus hysteresis Hysteresis Analog Comparison Event Figure 13 6 Low Hysteresis Window Triggering A window trigger occurs when an analog signal either passes into enters or passes out of leaves a window defined by two voltage levels Specify the levels by setting the window Top value and the window Bottom value Figure 13 7 demonstrates a trigger that asserts when the signal enters the window S Series User Manual 13 6 ni com Chapter 13 Triggering Analog Comparison Event L l Figure 13 7 Window Trigger Analog frigger Accuracy The analog trigger circuitry compares the voltage of the trigger source to the output of programmable trigger DACs When you configure the level or the high and low limits in window trigger mode the device adjusts the output of the trigger DACs Refer to the specifications document for your device to find the accuracy and resolution of the analog trigger DACs To improve accuracy you can National Instruments Corporation Use an AI channel with a small input range instead of PFI 0 AI START TRIG as your trigger source The DAQ device does not amplify the PFI 0 AI START TRIG signal When using an AI channel the PGIA amplifies the AI channel signal
54. 15 6120 For more specific information about these products refer to ni com Using BNCs You can connect BNC cables to your DAQ device using BNC accessories such as the BNC 2110 BNC 2120 and BNC 2090 To connect your DAQ device to a BNC accessory use one of the following cables SH68 68 EP shielded cable SH68 68R1 EP shielded cable with one right angle connector S Series User Manual A 12 ni com Appendix A Device Specific Information e SH6868 shielded 68 conductor cable e RC68 68 unshielded cable Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 68LP CB 68LPR low cost screw terminal block e SCB 68 shielded screw terminal block with breadboard areas e TBX 68 DIN rail mountable screw terminal block To connect your DAQ device to a screw terminal accessory use one of the following cables SH68 68 EP shielded cable e SH68 68R1 EP shielded cable with one right angle connector e RC68 68 unshielded cable Using SSR or ER Digital Signal Conditioning SSR and ER series provide per channel digital signal conditioning Using RTSI Use RTSI bus cables to connect the timing and synchronization signals on your DAQ device to other Measurement Vision Motion and CAN boards for PCI Custom Cabling Connectors Options The CA 1000 is a versatile connector enclosure system It allows the user to define I O connectors on a per channel basis
55. 7 also can control the up down input of general purpose Counters 0 and 1 respectively The up down control signals Counter 0 Up Down and Counter 1 Up Down are input only and do not affect the operation of the DIO lines For more information refer to Chapter 7 Counters NI 6154 Only For information on static DIO for isolated S Series devices refer to Chapter 6 Digital I O for Isolated Devices Digital Waveform Generation S Series User Manual NI 6115 6120 NI 6122 6123 NI 6132 6133 Only These S Series devices can generate digital waveforms This behavior is also referred to as correlated digital I O because there is no dedicated clock source for the digital operation Refer to the DO Sample Clock Signal section for a list of possible sources The DO waveform generation FIFO stores the digital samples These S Series devices can use DMA transfers to move data from the system memory to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal do SampleClock Refer to Chapter 12 Bus Interface for more information about DMA transfers You can configure each DIO line to be an input a static output or a digital waveform generation output 5 2 ni com Chapter 5 Digital 1 0 for Non Isolated Devices DO Sample Clock Signal NI 6115 6120 NI 6122 6123 NI 6132 6133 Only Use the DO Sample Clock do SampleClock signal to update the DO pi
56. AQmx Help contain API overviews The NI DAQmx Help also contains general information about measurement concepts The Traditional NI DAQ Legacy Function Reference Help and the NI DAQmx C Reference Help describe the C functions and attributes Select Start All Programs National Instruments NI DAQ and the document title for the NI DAQ API you are using NET Languages without NI Application Software With the Microsoft NET Framework version 1 1 or later you can use NI DAQmx to create applications using Visual C and Visual Basic NET without Measurement Studio You need Microsoft Visual Studio NET 2003 or Microsoft Visual Studio 2005 for the API documentation to be installed The installed documentation contains the NI DAQmx API overview measurement tasks and concepts and function reference This help is fully integrated into the Visual Studio NET documentation To view the NI DAQmx NET documentation go to Start Programs National Instruments NI DAQ NI DAQmx NET Reference Help Expand NI Measurement Studio Help NI Measurement Studio NET Class Library Reference to view the function reference Expand NI Measurement Studio Help NI Measurement Studio NET Class Library Using the Measurement Studio NET Class Libraries to view conceptual topics for using NI DAQmx with Visual Cft and Visual Basic NET To get to the same help topics from within Visual Studio go to Help Contents Select Measurement Studio from the Filter
57. DAQ Hardware for Non Isolated Devices 1 1 DACQESTG a ieee ik bin Si Me eet 1 2 DAQ Hardware for Isolated Devices 1 3 DAQ STC2 Isolated Devices 1 3 Calibration Circuitry ai ed e d etd v das era 1 4 Internal or Self Calibration esses eene 1 4 External Calibrations 22 uc e e EE en OI dee 1 5 Signal Conditioning 5 ee ra ert eap ORE I IER E tan 1 5 sensors ard Tr nsducets Re etae datae te ten 1 5 Programming Devices in Software 1 6 Chapter 2 1 0 Connector I O Connector Signal Descriptions for Non Isolated Devices 2 1 I O Connector Signal Descriptions for Isolated Devices 2 4 Tetminal Name Bquivalents tege e RED e nt RS 2 5 FIV POWer SOUECe 5 iebpiet n med aec eq op e ect e Ren 2 7 Chapter 3 Analog Input Analog Input Circuit Ver tenant an din ee be eedem 3 2 Muse ste ne o ome eir t tds 3 2 Input Coupling dene emere Hemd etenim 3 2 Instrumentation Amplifier eene 3 2 Filter er er t d ep olei ta t ete ete e ns 3 2 A D Converters teet eee hod a ES 3 2 ATOS ttr n eH EA ee 3 2 Analog Trig pets ash tata Ana a tl in tea ed ec uen 3 3 AT iming signals ed esheets soa cee cote reete e nente 3 3 Isolation Barrier and Digital Isolators eee 3 3 Analog Input Terminal Configuration sss 3 3 National Instruments Corporation vij S Series User Manual Contents Input Polarity and
58. DAQ S Series S Series User Manual February 2007 7 NATIONAL 3707816 01 D INSTRUMENTS Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 Worldwide Offices Australia 1800 300 800 Austria 43 662 457990 0 Belgium 32 0 2 757 0020 Brazil 55 11 3262 3599 Canada 800 433 3488 China 86 21 5050 9800 Czech Republic 420 224 235 774 Denmark 45 45 76 26 00 Finland 385 0 9 725 72511 France 33 0 1 48 14 24 24 Germany 49 89 7413130 India 91 80 41190000 Israel 972 3 6393737 Italy 39 02 413091 Japan 81 3 5472 2970 Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand 662 278 6777 Turkey 90 212 279 3031 United Kingdom 44 0 1635 523545 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the info code feedback 2004 2007 National Instruments Corporatio
59. Diagram Figure 3 2 shows the analog input circuitry of an S Series isolated device For more information refer to the Analog Input Circuitry section Isolation Instrumentation Barrier i Amplifier Filter i 1 Al ADC u Al FIFO AI Data Digital AE Mux Isolators Al Timing Signals CAL Figure 3 2 S Series Isolated Device Analog Input Block Diagram National Instruments Corporation 3 1 S Series User Manual Chapter 3 Analog Input Analog Input Circuitry Mux Input Coupling On S Series devices each channel uses its own instrumentation amplifier FIFO multiplexer mux and A D converter to achieve simultaneous data acquisition By default the mux is set to route AI signals to the analog front end When you calibrate your device the state of the mux switches You can manually switch the state of the mux to measure AI GND NI 6110 6111 and NI 6115 6120 Only You can configure these S Series devices for either AC or DC input coupling on a per channel basis Use AC coupling when the AC signal contains a large DC component If you enable AC coupling you remove the large DC offset for the input amplifier and amplify only the AC component This configuration makes effective use of the ADC dynamic range Instrumentation Amplifier Filter A D Converter Al FIFO S Series User Manual The instrumentation amplifier can amplify or attenuate an AI signal to ensure that you get the maximum r
60. I 6154 A 36 bus interface 12 1 C cables NI 6110 6111 A 6 NI 6115 6120 A 12 NI 6122 6123 A 20 NI 6132 6133 A 26 NI 6143 A 31 NI 6154 A 37 calibration 1 4 calibration certificate NI resources B 2 clocks 11 4 common mode input range 3 3 noise differential ground referenced signals 3 11 differential non referenced or floating signals 3 13 pseudodifferential ground referenced signals 3 16 pseudodifferential non referenced or floating signals 3 18 pseudodifferential signals 3 3 3 11 rejection 3 19 signal range differential non referenced or floating signals 3 12 S Series User Manual I 2 pseudodifferential non referenced or floating signals 3 17 signal rejection considerations differential ground referenced signals 3 11 pseudodifferential ground referenced signals 3 15 CompactPCI 12 1 connecting signals analog input 3 7 analog output 4 5 digital I O S Series isolated devices NI 6154 6 2 S Series non isolated devices 5 6 timing S Series isolated devices NI 6154 10 7 S Series non isolated devices 10 5 conventions used in the manual xi counter timing signals Counter 0 Gate 7 5 Counter 0 Internal Output 7 6 Counter 0 Source 7 4 Counter 0 Up Down 7 8 Counter 1 Gate 7 9 Counter 1 Internal Output 7 9 Counter 1 Source 7 8 Counter 1 Up Down 7 10 Frequency Output 7 11 Master Timebase 7 11 summary 7 2 counters 7 1 D DAC FIFO 4 2 DACs 4 2 DAQ hardware for isola
61. I 6154 Specifications for more information Al Data Acquisition Methods When performing analog input measurements there are several different data acquisition methods available You can either perform software timed or hardware timed acquisitions Hardware timed acquisitions can be buffered or non buffered Software Timed Acquisitions With a software timed acquisition software controls the rate of the acquisition Software sends a separate command to the hardware to initiate each ADC conversion In NI DAQmx software timed acquisitions are referred to as having On Demand timing Software timed acquisitions are also referred to as immediate or static acquisitions and are typically used for reading a single point of data National Instruments Corporation 3 5 S Series User Manual Chapter 3 Analog Input Hardware Timed Acquisitions S Series User Manual With hardware timed acquisitions a digital hardware signal controls the rate of the acquisition This signal can be generated internally on your device or provided externally Hardware timed acquisitions have several advantages over software timed acquisitions e The time between samples can be much shorter e The timing between samples can be deterministic e Hardware timed acquisitions can use hardware triggering For more information refer to Chapter 13 Triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in the comp
62. I bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard implementation for CompactPCI does not include these sub buses The PXI S Series device works in any standard CompactPCI chassis adhering to the PICMG CompactPCI 2 0 R3 0 core specification National Instruments Corporation 12 1 S Series User Manual Chapter 12 Bus Interface PXI specific features are implemented on the J2 connector of the CompactPCI bus The PXI device is compatible with any CompactPCI chassis with a sub bus that does not drive the lines used by that device Even if the sub bus is capable of driving these lines the PXI device is still compatible as long as those pins on the sub bus are disabled by default and never enabled A Caution Damage can result if these lines are driven by the sub bus NI is not liable for any damage resulting from improper signal connections Data Transfer Methods There are three primary ways to transfer data across the PCI bus Direct Memory Access DMA Interrupt Request IRQ and Programmed I O Direct Memory Access DMA DMA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fastest available data transfer method National Instruments uses DMA hardware and software technology to achieve high throughput rates and to increase system utilization
63. ISA It offers a theoretical maximum transfer rate of 132 Mbytes s G 8 ni com pd PFI PGIA physical channel port ppm pseudodifferential channels pu PXI Q quantization R range referenced signal sources rise time Glossary Pull down Programmable function interface Programmable gain instrumentation amplifier See channel 1 A communications connection on a computer or a remote controller 2 A digital port consisting of four or eight lines of digital input and or output Parts per million Pseudodifferential channels are all referred to a common ground but this ground is not directly connected to the computer ground Often this connection is made by a relatively low value resistor to give some isolation between the two grounds Pull up PCI eXtensions for Instrumentation PXT is an open specification that builds off the CompactPCI specification by adding instrumentation specific features The process of converting an analog signal to a digital representation Normally performed by an analog to digital converter A D converter or ADC The maximum and minimum parameters between which a sensor instrument or device operates with a specified set of characteristics Signal sources with voltage signals that are referenced to a system ground such as the earth or a building ground Also called ground signal sources The time for a signal to transition from 10 to 90 of the maximum signal
64. Ke gt gt ADC Sue Mini EC T FIFO Data 32 gt interface MITE interface rL 3 t Anti ALS MS Je AS Vy aiiasingK __p gt 12 8 13 pI AS Data ct m A13 Filter ADC i n 5 A N 5 o ea o r P Calibration Al Control c m Mu EEPROM o i z 2 nalog Oo Trigger gt gaer eel Ap Trigger i Circuitry Y O T T Q Ti Analog Input DMA IRQ T Y A PFI Trigger nigger Timing Control 1 Analog EEPROM DMA MIT END a NM hp 1 Control Interface Counter Bus F basic r 4 Timing y Timing vo DAQ STC interface Bus FPGA Do cd a se aC LECHE MK interface m 1 Analog Output RTSI Bus Analog Dio 770 71 STC Digital VO 8 Digital VO 1 Timing Control Interface Qupd i0 Control noie FPGA Digital 1 0 8 docs t JE Data 12 I DAC1 Calibration DACs Data 32 QNS gt National Instruments Corporation Figure A 6 NI 6115 Block Diagram A 11 S Series User Manual Appendix A Device Specific Information Figure A 7 shows the NI 6120 block diagram
65. LabVIEW 8 x Help Working Voltage Range S Series User Manual On most S Series devices the PGIA operates normally by amplifying signals of interest while rejecting common mode signals under the following three conditions e The common mode voltage V m which is equivalent to subtracting AI lt 0 7 gt GND from AI lt 0 7 gt must be less than 10 V This V is a constant for all range selections 3 4 ni com Chapter 3 Analog Input e The signal voltage V which is equivalent to subtracting AI lt 0 7 gt from AI lt 0 7 gt must be less than or equal to the range selection of the given channel If V is greater than the range selected the signal clips and information are lost e The total working voltage of the positive input which is equivalent to Vem V or subtracting AI lt 0 7 gt GND from AI lt 0 7 gt must be less than 11 V If any of these conditions are exceeded the input voltage is clamped until the fault condition is removed 3 Note All inputs are protected at up to 42 V NI 6143 Only The instrumentation amplifier operates normally by amplifying signals of interest while rejecting common mode signals under one condition The total voltage Vem V present at the positive and negative input terminals must be less than the working voltage which is 7 V NI 6154 Only The isolation features of the NI 6154 improve the working voltage range in your applications Refer to the N
66. NI DAQmx virtual channels outside a task global or inside a task local Configuring virtual channels is optional in Traditional NI DAQ Legacy and earlier versions but is integral to every measurement you take in NI DAQmx In Traditional NI DAQ Legacy you configure virtual channels in MAX In NI DAQmx you can configure virtual channels either in MAX or in a program and you can configure channels as part of a task or separately Any connection back to the protective conductor earth ground See also earth ground Centimeter Complementary metal oxide semiconductor Common mode rejection ratio A measure of the capability of an instrument to reject a signal that is common to both input leads A Eurocard configuration of the PCI bus for industrial applications A feature that allows you to clock digital I O on the same clock as analog I O A circuit that counts external pulses or clock pulses timing The manner in which a signal is connected from one circuit to another When applied to instrument products or DAQ cards it refers to the input signal coupling technique Counter signal Counter 0 gate signal Counter 0 output signal S Series User Manual Glossary CTR 0 SOURCE CTR 0 UP DOWN CTR 1 GATE CTR 1 OUT CTR 1 SOURCE CTR 1 UP DOWN D D A DAC DAQ DAQ device DAQ STC data acquisition DAQ dB dBc DC S Series User Manual Counter 0 clock source signal Counter 0 up down signal
67. O Sample Clock Signal section of Chapter 4 Analog Output PFI 6 AO START D GND TRIG Input PFI 6 As an input this pin is a general purpose input terminal This is the default input for the ao StartTrigger signal Output AO Start Trigger Signal As an output this pin emits the ao StartTrigger signal A low to high transition of this signal indicates the start of a generation For more information refer to the AO Start Trigger Signal section of Chapter 4 Analog Output PFI 7 AI SAMP D GND CLK Input PFI 7 As an input this pin is a general purpose input terminal Output AI Sample Clock Signal As an output this pin emits the ai SampleClock signal A low to high transition of this signal indicates the start of the sample For more information refer to the AJ Sample Clock Signal section of Chapter 3 Analog Input National Instruments Corporation 2 3 S Series User Manual Chapter 2 1 0 Connector Table 2 1 Non Isolated 1 0 Connector Signal Descriptions Continued I O Connector Pin Reference Direction Signal Description PFI 8 CTR 0 D GND Input PFI 8 As an input this pin is a general purpose input SOURCE terminal and can also be used to route signals directly to the RTSI bus This is the default input for the CtrOSource signal Output Counter 0 Source Signal As an output this pin emits the CtrOSource signal This signal reflects the actual source signal
68. Polarity and Range Input range refers to the set of input voltages that an analog input channel can digitize with the specified accuracy On some S Series devices you can individually program the input range of each AI channel The input range affects the resolution of the S Series device for an AI channel Resolution refers to the voltage of one ADC code For example a 16 bit ADC converts analog inputs into one of 65 536 2 codes meaning one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 5 V to 5 V the voltage of each code of a 16 bit ADC is VEN 153 uV 2 S Series devices support bipolar input ranges A bipolar input range means that the input voltage range is between Vef and Vef The instrumentation amplifier applies a different gain setting to the AI signal depending on the input range Gain refers to the factor by which the instrumentation amplifier multiplies amplifies the input signal before sending it to the ADC On S Series devices with programmable input ranges choose an input range that matches the expected input range of your signal A large input range can accommodate a large signal variation but reduces the voltage resolution Choosing a smaller input range improves the voltage resolution but may result in the input signal going out of range For more information about programming these settings refer to the NJ DAQmx Help or the
69. RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Compliance Compliance with FCC Canada Radio Frequency Interference Regulations Determining FCC Class The Federal Communications Commission FCC has rules to protect wireless communications from interference The FCC places digital electronics into two classes These classes are known as Class A for use in industrial commercial locations only or Class B for use in residential or commercial locations All National Instruments NI products are FCC Class A products Depending on where it is operated this Class A
70. RTSI 11 1 with a digital source 13 1 with an analog source 13 2 troubleshooting NI resources B 1 National Instruments Corporation Index W waveform generation timing signals AO Pause Trigger 4 11 AO Sample Clock 4 9 AO Sample Clock Timebase 4 11 AO Start Trigger 4 7 Master Timebase 4 12 summary 4 7 Web resources B 1 wiring 3 19 working voltage range 3 4 S Series User Manual
71. Range toc tec eph een nee ER ERR hd eA Working Voltage Range ti e mde e ea ER rr eed AI Data Acquisition Methods Software Timed Acquisitions s Hardware Timed Acquisitions Buffered cate Aa a Gaia A eaae Non Buffered etat RR aline needs Analog Input Tre Serine entrer RE ERR DUE CERE R E Connecting Analog Input Signals ss Types of Signal Sources code teet idle epe iq eese tite Floating Signal Sources seen Ground Referenced Signal Sources Differential Connections for Ground Referenced Signal Sources Common Mode Signal Rejection Considerations Differential Connections for Non Referenced or Floating Signal Sources DC Coupled Low Source Impedance sees DC Coupled High Source Impedance sss AC Coupled 4 ee euh OR ele ego ege Pseudodifferential Connections for Ground Referenced Signal Sources NI 6115 6120 Only nei itte ate eds Common Mode Signal Rejection Considerations Pseudodifferential Connections for Non Referenced or Floating Signal Sources NI 6115 6120 Only ss Field Wiring Considerations Minimizing Drift in DIFF Mode Analog Input Timing Signals ss AI Start Trigger Signal etate ette e Here Re terea Using a Digital Source ettet rette Usin
72. System Overview Figure 1 1 shows a typical DAQ system setup which includes transducers signal conditioning cables that connect the various devices to the accessories the S Series device and the programming software Refer to Appendix A Device Specific Information for a list of devices and their compatible accessories 1 Sensors and Transducers 4 DAQ Hardware 2 Signal Conditioning 5 Personal Computer and DAQ Software 3 Cable Assembly Figure 1 1 Typical DAQ System DAQ Hardware for Non Isolated Devices DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and controls digital I O signals The following sections contain more information about specific components of the DAQ hardware National Instruments Corporation 1 1 S Series User Manual Chapter 1 DAQ System Overview Figure 1 2 shows the components common to most non isolated S Series devices Analog Input I Analog Output la Digital I O Digital Bus Routing Interface 1 O Connector Counters RTSI DAQ STC S Series User Manual Figure 1 2 Non Isolated S Series Block Diagram S Series devices use the National Instruments DAQ system timing controller DAQ STC for time related functions The DAQ STC consists of the following three timing groups e
73. TR 1 OUT 43 PFI 5 AO SAMP CLK PFI 6 AO START TRIG 45 PFI 7 Al SAMP CLK PFI 8 CTR 0 SOURCE 47 PFI 9 CTR 0 GATE CTR 0 OUT 49 FREQ OUT NC on NI 6111 Figure A 2 50 Pin 1 0 Connector Note Some hardware accessories may not yet reflect the NI DAQmx terminal names If you are using an S Series device in Traditional NI DAQ Legacy refer to Table 2 3 Terminal Name Equivalents for the Traditional NI DAQ Legacy signal names S Series User Manual A 4 ni com Appendix A Device Specific Information For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 I O Connector NI 6110 6111 Block Diagrams Figure A 3 shows the NI 6110 block diagram I O Connector 0 gt gt AIO ATO 12 Alo k o Mux H gt lt 12 Bit anc 7 9 Latch Data 16 gt 1 sa gt Al 1 Al 12 Alt eam 1 Mux Ye Ci aoo 79 Latch Data 19 P EE s el Al 2 AI 2 12 AI2 pata te Al2 Mux H 12 Bi ADC 79 Latch Pata 16 Control t i ADC Generic Mini PCI Bus B A 35 FIFO Data 32 Iritartaca MTE te
74. Timebase is divided down to provide the Onboard Clock source for the ao SampleClock You specify whether the samples begin on the rising or falling edge of ao SampleClockTimebase You might use the ao SampleClockTimebase signal if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample clock signal but do not need to divide the signal then you should use the ao SampleClock signal rather than the ao SampleClockTimebase If you do not specify an external sample clock timebase NI DAQ uses the Onboard Clock National Instruments Corporation 4 11 S Series User Manual Chapter 4 Analog Output Figure 4 11 shows the timing requirements for the ao SampleClockTimebase signal tp 50 ns minimum ty 23 ns minimum Figure 4 11 ao SampleClockTimebase Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency Unless you select an external source either the 20MHzTimebase or 100kHzTimebase generates the ao SampleClockTimebase signal Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which all other internally generated clocks and timebases on the board are derived It controls the timing for the analog input analog output and counter subsystems It is available as an output on the I O connector b
75. V 14 48 PO 7 D GND 13 47 P0 3 D GND 12 46 AL HOLD COMP PFI 0 AI START TRIG 11145 EXT STROBE PFI 1 Al REF TRIG 10 44 D GND D GND 9 43 PFI 2 AI CONV CLK 5V 8 42 PFI 3 CTR 1 SOURCE D GND 7 41 PFI 4 CTR 1 GATE PFI 5 AO SAMP CLK 6 40 CTR 1 OUT PFI 6 AO START TRIG 5 39 D GND D GND 4 38 PFI 7 AI SAMP CLK PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1 35 D GND PE i NC No Connect 1 NC on NI 6111 Figure A 1 NI 6110 6111 Pinout National Instruments Corporation A 3 S Series User Manual Appendix A Device Specific Information For a detailed description of each signal refer to the O Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 7 0 Connector 50 Pin MIO 1 0 Connector Pinout Figure A 2 shows the 50 pin I O connector that is available when you use the SH6850 cable assembly with some 68 pin S Series devices Al lt 0 3 gt GND 1 2 Al lt 0 38 gt GND AlO 3 4 A10 AI 1 5 6 AI1 AI 2 1 7 18 AI2 AI 3 1 9 10 A13 PFI O AI START TRIG 11 NC NC 13 NC NC 15 NC NC 17 NC NC 19 AO 0 AO 1 21 NC AO GND 23 D GND PO 0 25 PO 1 PO 2 27 P0 3 PO 4 29 PO 5 PO 6 31 PO 7 D GND 33 45V 45V 35 Al HOLD COMP EXT STROBE 37 PFI 0 AI START TRIG PFI 1 Al REF TRIG 39 PFI 2 Al CONV CLK PFI 3 CTR 1 SOURCE 41 PFI 4 CTR 1 GATE C
76. ampleClock and ao StartTrigger S Series User Manual 4 10 ni com Chapter 4 Analog Output AO Pause Trigger Signal You can use the AO Pause trigger signal ao PauseTrigger to mask off samples in a DAQ sequence That is when ao PauseTrigger is active no samples occur The ao PauseTrigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample This signal is not available as an output Using a Digital Source To use ao Pause Trigger specify a source and a polarity The source can be an external signal connected to any PFI or RTSI lt 0 6 gt pin The source can also be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Also specify whether the samples are paused when ao PauseTrigger is at a logic high or low level Using an Analog Source When you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high level For more information refer to the Triggering with an Analog Source section of Chapter 13 Triggering iyi Note The NI 6154 does not support pause triggering A0 Sample Clock Timebase Signal You can select any PFI or RTSI pin as well as many other internal signals as the AO Sample Clock Timebase ao SampleClockTimebase signal This signal is not available as an output on the I O connector The ao SampleClock
77. and negative inputs can carry signals of interest For more information about DIFF input refer to the Connecting Analog Input Signals section which contains diagrams showing the signal paths for DIFF input mode NI 6110 6111 and NI 6115 6120 Only The channels on these S Series devices are pseudodifferential inputs The input signal of each channel AI lt 0 X gt is connected to the positive input of the instrumentation amplifier and each reference signal AI lt 0 X gt is connected to the negative input of the instrumentation amplifier The inputs are differential only in the sense that ground loops are broken The reference signal AI lt 0 X gt is not intended to carry signals of interest but only to provide a DC reference point for AI lt 0 X gt that may be different from ground Pseudodifferential signal connections reduce noise pickup and increase common mode noise rejection This connection type also allows input signals to float within the common mode limits of the PGIA UN Caution Exceeding the differential and common mode input ranges distorts the input signals Exceeding the maximum input voltage rating can damage the device and the computer NI is not liable for any damage resulting from such signal connections The maximum input voltage ratings can be found in the specifications document for each S Series device National Instruments Corporation 3 3 S Series User Manual Chapter 3 Analog Input Input
78. at your source it is possible to gain further common noise rejection by placing a 0 1 uF ceramic bypass capacitor between AI and AI 0 GND Pseudodifferential Connections for Non Referenced or Floating Signal Sources NI 6115 6120 Only Figure 3 9 shows how to connect a floating signal source to a channel on the NI 6115 Common Mode e AC Coupling I Tl AIO Choke been L Instrumentation Floating 1 re Amplifier Signal vs m c ME 100 pF E x Source ES 00 pF 1M fist Lu x Measured 5 m Voltage Bias Al O Current 10 nF Return Paths Z Bias Pi Resistor see text 10 kQ 40 pF for ranges x10 V AI 0 GND WV 1 0 Connector Al 0 Connections Shown Figure 3 9 Pseudodifferential Connection for Non Referenced Signals on NI 6115 Devices National Instruments Corporation 3 17 S Series User Manual Chapter 3 Analog Input Figure 3 10 shows how to connect a floating signal source to a channel on the NI 6120 Floating Signal Source e AC Coupling Instrumentation Q Bias Current Return Paths Bias 7 Resistor see text 1 0 Connector ALORE T ee cS Amplifier AAA 100pF 1M PGIA i i d Measured l _ Voltage AlO Mme High Frequency Common Mode Choke o _ 10 kQ 40 pF for ranges gt 10 V
79. ath nearly in balance so that about the same amount of noise couples onto both connections yielding better rejection of electrostatically coupled noise This configuration does not load down the source other than the very high input impedance of the instrumentation amplifier National Instruments Corporation 3 13 S Series User Manual Chapter 3 Analog Input S Series User Manual You can fully balance the signal path by connecting another resistor of the same value between the positive input and AI GND This fully balanced configuration offers slightly better noise rejection but has the disadvantage of loading the source down with the series combination sum of the two resistors If for example the source impedance is 2 KQ and each of the two resistors is 100 kQ the resistors load down the source with 200 kQ and produce a 1 gain error AC Coupled Both inputs of the instrumentation amplifier require a DC path to ground in order for the instrumentation amplifier to work If the source is AC coupled capacitively coupled the instrumentation amplifier needs a resistor between the positive input and AI GND If the source has low impedance choose a resistor that is large enough not to significantly load the source but small enough not to produce significant input offset voltage as a result of input bias current typically 100 kQ to 1 MQ In this case connect the negative input directly to AI GND If the source has high output imp
80. base Onboard RTSI 0 6 Clock L 200 L Divisor Figure 4 5 Analog Output Engine Routing Options S Series devices feature the following waveform generation timing signals e AO Start Trigger Signal e AO Sample Clock Signal e AO Pause Trigger Signal e AO Sample Clock Timebase Signal e Master Timebase Signal AO Start Trigger Signal You can use the AO Start Trigger signal ao StartTrigger to initiate a waveform generation If you do not use triggers you begin a generation with a software command Using a Digital Source To use ao StartTrigger specify a source and an edge The source can be an external signal connected to any PFI or RTSI 0 6 pin The source can also be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information National Instruments Corporation 4 7 S Series User Manual Chapter 4 Analog Output S Series User Manual Figure 4 6 shows the timing requirements of the ao StartTrigger digital source Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 4 6 ao StartTrigger Timing Requirements Using an Analog Source When you use an analog trigger source the waveform generation begins on the first rising edge of the Analog Comparison Event signal For more information refer to the Triggering with an Analog Source section
81. c components Electrostatic discharge voltage can easily range from 1 000 to 10 000 V S Series User Manual Glossary EXT STROBE FIFO floating signal sources FPGA FREQ OUT G gain GATE grounded signal sources H S Series User Manual External strobe signal Farad a measurement unit of capacitance First in first out memory buffer A data buffering technique that functions like a shift register where the oldest values first in come out first Many DAQ products use FIFOs to buffer digital data from an A D converter or to buffer the data before or after bus transmission Signal sources with voltage signals that are not connected to an absolute reference of system ground Also called nonreferenced signal sources Some common examples of floating signal sources are batteries transformers and thermocouples Field programmable gate array Frequency output signal The factor by which a signal is amplified often expressed in dB Gain as a function of frequency is commonly referred to as the magnitude of the frequency response function Gate signal Signal sources with voltage sources that are referenced to a system ground such as the earth or building ground Also called referenced signal sources Hour Hertz G 6 ni com I O in INL LED LSB m master measurement device module MSB mux Glossary Input output the transfer of data to from a computer system inv
82. ce NI has several signal conditioning solutions for digital applications requiring high current drive e Do not drive any DI line with voltages outside of its normal operating range The PFIor DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Connecting Digital 1 0 Signals Isolated Devices S Series User Manual The DIO signals P0 0 5 and P1 lt 0 3 gt are referenced to D GND P0 0 5 are inputs and P1 lt 0 3 gt are outputs Figure 6 2 shows digital inputs P0 0 5 and digital outputs P1 lt 0 3 gt Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 6 2 6 2 ni com Chapter 6 Digital 1 0 for Isolated Devices 45V A X 2 A A Isolation LED NZ LT Barrier NV P1 0 3 o i oKt ia CREER Digital Do Isolators TTL Signal sls P0 0 5 I Y obo 5 V MW op Switch i D GND 1 0 Connector a 3 Isolated S Series Device Figure 6 2 Digital 1 0 Signal Connections on S Se
83. ces B 1 External Strobe 3 30 F features NI 6110 6111 A 1 NI 6115 6120 A 8 NI 6122 6123 A 14 NI 6132 6133 A 21 NI 6143 A 28 NI 6154 A 33 field wiring considerations 3 19 FIFO 3 2 filter 3 2 G glitches 4 3 S Series User Manual Index H help technical support B 1 T O connector 50 pin MIO I O connector A 4 A 17 A 24 NI 6110 6111 A 2 NI 6115 6120 A 9 NI 6122 6123 A 15 NI 6132 6133 A 22 NI 6143 A 28 NI 6154 A 34 signal descriptions for isolated devices 2 4 signal descriptions for non isolated devices 2 1 I O protection 5 5 input coupling 3 2 input polarity and range 3 4 instrument drivers NI resources B 1 instrumentation amplifier 3 2 interrupt request IRQ 12 2 IRQ 12 2 isolation NI 6154 A 35 digital isolation A 36 K KnowledgeBase B 1 L LabVIEW documentation xiii LabWindows CVI documentation xiv Master Timebase signal 3 29 4 12 7 11 Measurement Studio documentation xiv S Series User Manual l 4 minimizing glitches on the output signal 4 3 MITE and DAQ PnP 12 1 mux 3 2 National Instruments support and services B 1 NI 6110 block diagram A 5 NI 6110 6111 A 6 analog output A 2 cables and accessories A 6 features A 1 T O connector pinout A 2 input coupling 3 2 pseudodifferential inputs 3 3 specifications A 8 NI 6111 block diagram A 6 NI 6115 common mode signal rejection 3 17 NI 6115 block diagram A 11 NI 6115 6120 A 12 A 14
84. ch includes access to hundreds of Application Engineers worldwide in the NI Discussion Forums at ni com forums National Instruments Application Engineers make sure every question receives an answer For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electronic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification B 1 S Series User Manual Appendix B Technical Support and Professional Services e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you ne
85. com Chapter 3 Analog Input Ground Referenced Signal Sources A ground referenced signal source is connected in some way to the building system ground and is therefore already connected to a common ground point with respect to the device assuming that the computer is plugged into the same power system as the source Non isolated outputs of instruments and devices that plug into the building power system fall into this category The difference in ground potential between two instruments connected to the same building power system is typically between 1 mV and 100 mV but the difference can be much higher if power distribution circuits are improperly connected If a grounded signal source is incorrectly measured this difference can appear as measurement error Follow the connection instructions for grounded signal sources to eliminate this ground potential difference from the measured signal Isolated devices have isolated front ends that are isolated from ground reference signal sources and are not connected to building system grounds Isolated devices require the user to provide a ground reference terminal to which its input signals are referenced Differential Connections for Ground Referenced Signal Sources Figure 3 6 shows how to connect a ground referenced signal source to a channel on a non isolated S Series device National Instruments Corporation 3 9 S Series User Manual Chapter 3 Analog Input S Series Device
86. connected to Counter 0 For more information refer to the Counter 0 Source Signal section of Chapter 7 Counters PFI 9 CTR 0 GATE D GND Input PFI 9 As an input this pin is a general purpose input terminal and can also be used to route signals directly to the RTSI bus This is the default input for the CtrOGate signal Output Counter 0 Gate Signal As an output this pin emits the Ctr0Gate signal This signal reflects the actual gate signal connected to Counter 0 For more information refer to the Counter 0 Gate Signal section of Chapter 7 Counters CTROOUT D GND Input Counter 0 Output Signal As an input this pin can be used to route signals directly to the RTSI bus For more information refer to the Counter 0 Internal Output Signal section of Chapter 7 Counters Output As an output this pin emits the CtrOInternalOutput signal FREQ OUT D GND Output Frequency Output Signal This output is from the frequency generator For more information refer to the Frequency Output Signal section of Chapter 7 Counters 1 0 Connector Signal Descriptions for Isolated Devices Table 2 2 describes the signals found on the I O connectors of S Series isolated devices Table 2 2 Isolated Devices 1 0 Connector Signal Descriptions I O Connector Pin Reference Direction Signal Description AI lt 0 3 gt AI lt 0 3 gt Input Analog Input Channels 0 through 3 These pins are rou
87. connector e Honda backshell e AMP VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors NI 6110 6111 Specifications NI 6115 6120 Refer to the NI 6110 6111 Specifications for more detailed information about the devices S Series User Manual The NI 6115 6120 is a Plug and Play multifunction analog digital and timing I O device for PCI and PXI bus computers The NI 6115 features e four simultaneously sampling analog inputs with one 12 bit A D converter ADC per channel e two 12 bit D A converters DACs with voltage outputs e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers e increased common mode noise rejection through pseudodifferential signal connection The NI 6120 features e four simultaneously sampling analog inputs with one 16 bit A D converter ADC per channel e two 16 bit D A converters DACs with voltage outputs e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers e increased common mode noise rejection through pseudodifferential signal connection Because the NI 6115 6120 has no DIP switches jumpers or potentiometers it can be easily calibrated and configured in software A 8 ni com Appendix A Device Specific Information NI 6115 6120 Analog Output The NI 6115 6120 supplies two chan
88. counts up when it is at a logic high If you do not enable externally controlled count direction the PO 7 pin is free for general use S Series User Manual NI 6154 Only On the NI 6154 you can externally input the Counter 1 Up Down signal on the PFI lt 0 5 gt pin 7 10 ni com Chapter 7 Counters Frequency Output Signal The frequency generator is a four bit counter that can divide the output timebase by a number you select from 1 to 16 The frequency output can be software selectable from the internal 10 MHz and 100 KHz timebases This signal is available at any PFI lt 0 9 gt or RTSI lt 0 7 gt terminal The frequency output signal also can be routed to DO Sample Clock and DI Sample Clock NI 6154 Only This signal is available at any output PFI lt 6 9 gt or RTSI lt 0 7 gt terminal Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which all other internally generated clocks and timebases on the board are derived It controls the timing for the analog input analog output and counter subsystems It is available as an output on the I O connector but you must use one or more counters to do so The maximum allowed frequency for the MasterTimebase is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The two possible sources for the MasterTimebase signal are the internal 20MHzTimebase signal or an external sig
89. d the device The following recommendations apply mainly to AI signal routing although they also apply to signal routing in general Minimize noise pickup and maximize measurement accuracy by taking the following precautions e Use differential AI connections to reject common mode noise e Use individually shielded twisted pair wires to connect AI signals to the device With this type of wire the signals attached to the AI and AI inputs are twisted together and then covered with a shield You then connect this shield only at one point to the signal source ground This kind of connection is required for signals traveling through areas with large magnetic fields or high electromagnetic interference Route signals to the device carefully Keep cabling away from noise sources The most common noise source in a PCI DAQ system is the video monitor Separate the monitor from the analog signals as far as possible e Separate the signal lines of the S Series device from high current or high voltage lines These lines can induce currents in or voltages on the signal lines of the S Series device if they run in close parallel paths To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other e Donotrun signal lines through conduits that also contain power lines Protect signal lines from magnetic fields caused by electric motors welding e
90. differential AI pair Connect the shield for each signal pair to the ground reference at the source e Route the analog lines separately from the digital lines e When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals Mating connectors and a backshell kit for making custom 68 pin cables are available from NI NI recommends that you use one of the following connectors with the I O connector on your device e Honda 68 position solder cup female connector e Honda backshell e AMP VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors NI 6122 6123 Specifications NI 6132 6133 Refer to the NI 6122 6123 Specifications for more detailed information about the devices The NI 6132 6133 is a Plug and Play multifunction analog digital and timing I O device for PCI and PXI bus computers The NI 6132 features e four simultaneously sampling analog inputs with one 14 bit A D converter ADC per channel e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers National Instruments Corporation A 21 S Series User Manual Appendix A Device Specific Information The NI 6133 features e eight simultaneously sampling analog inputs w
91. e NC No Connect 1 NC on NI 6122 6132 Figure A 11 NI 6132 6133 Pinout National Instruments Corporation A 23 S Series User Manual Appendix A Device Specific Information For a detailed description of each signal refer to the O Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 7 0 Connector 50 Pin MIO 1 0 Connector Pinout Figure A 12 shows the 50 pin I O connector that is available when you use the SH6850 cable assembly with some 68 pin S Series devices Al lt 0 3 gt GND 1 2 Al lt 0 3 gt GND AIO 3 4 AlO AI 1 5 6 AI1 AI 2 1 7 8 AI12 AI 3 1 9 10 A13 1 PFI O AI START TRIG 11 12 NC NC 13 14 NC NC 15 16 NC NC 17 18 NC NC 19 20 AOO AO 1 21 22 NC AO GND 23 24 D GND PO 0 25 26 PO 1 P0 2 27 28 P0 3 PO 4 29 30 P0 5 P0 6 31 32 PO 7 D GND 33 34 5V 5 V 35 36 Al HOLD COMP EXT STROBE 37 38 PFI 0 AI START TRIG PFI 1 AI REF TRIG 39 40 PFI 2 Al CONV CLK PFI 3 CTR 1 SOURCE 41 42 PFI 4 CTR 1 GATE CTR 1 OUT 43 44 PFI 5 AO SAMP CLK PFI 6 AO START TRIG 45 46 PFI 7 Al SAMP CLK PFI 8 CTR 0 SOURCE 47 48 PFI 9 CTR 0 GATE CTR 0 OUT 49 50 FREQ OUT 1 NC on NI 6111 Figure A 12 50 Pin 1 0 Connector Note Some hardware accessories may not yet reflect the NI DAQmx terminal names If you are using an S Serie
92. e an analog trigger source the acquisition stops on the first rising edge of the Analog Comparison Event signal For more information refer to the Triggering with an Analog Source section of Chapter 13 Triggering Outputting the Al Reference Trigger Signal You can configure the PFI 1 AI REF TRIG pin to output the ai ReferenceTrigger signal The output pin reflects the ai ReferenceTrigger signal regardless of what signal you specify as its source The output is an active high pulse Figure 3 17 shows the timing behavior of the PFI 1 AI REF TRIG pin when the pin is an output tw 50 to 100 ns Figure 3 17 PFI Al REF TRIG Timing Behavior The PFI 1 AI REF TRIG pin is configured as an input by default Al Pause Trigger Signal You can use the AI Pause Trigger ai PauseTrigger signal to pause and resume a measurement acquisition This signal is not available as an output Using a Digital Source To use ai PauseTrigger specify a source and a polarity The source can be an external signal connected to any PFI or RTSI lt 0 6 gt pin The source can also be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Also specify whether the measurement sample is paused when ai PauseTrigger is at a logic high or low level National Instruments Corporation 3 25 S Series User Manual Chapter 3 Analog Input Us
93. e fast enough Refer to the device specifications for the maximum sampling rate for your device National Instruments Corporation 5 8 S Series User Manual Chapter 5 Digital 1 0 for Non Isolated Devices Digital Waveform Acquisition NI 6115 6120 NI 6122 6123 NI 6132 6133 Only These S Series devices can acquire digital waveforms This behavior is also referred to as correlated digital I O because there is no dedicated clock source for the digital operation Refer to the DI Sample Clock Signal section for a list of possible sources The DI waveform acquisition FIFO stores the digital samples These S Series devices can use DMA transfers to move data from the DI waveform acquisition FIFO to system memory The DAQ device samples the DIO lines on each rising or falling edge of a clock signal di SampleClock Refer to Chapter 12 Bus Interface for more information about DMA transfers You can configure each DIO line to be an output a static input or a digital waveform acquisition input DI Sample Clock Signal S Series User Manual NI 6115 6120 NI 6122 6123 NI 6132 6133 Only Use the DI Sample Clock di SampleClock signal to sample the P0 0 7 terminals and store the result in the DI waveform acquisition FIFO Because there is no dedicated internal clock for timed digital operations you can use an external signal or one of several internal signals as the DI Sample Clock You can correlate digital and analog samples in t
94. eaches zero and all desired samples have been acquired ai StartTrigger ai SampleClock DENM EN Li N a Sample Counter i4 3 i2 4 io Figure 3 11 Typical Posttriggered DAQ Sequence An acquisition with pretrigger data allows you to view data that is acquired before the trigger of interest in addition to data acquired after the trigger Figure 3 12 shows a typical pretrigger DAQ sequence The ai StartTrigger signal can be either a hardware or software signal If ai StartTrigger is set up to be a software start trigger an output pulse appears on the AI START TRIG line when the acquisition begins When the ai StartTrigger pulse occurs the sample counter is loaded with the number of pretrigger samples in this example four The value decrements with each pulse on ai SampleClock until the value reaches zero The sample counter is then loaded with the number of posttrigger samples in this example three 3 20 ni com Chapter 3 Analog Input ai StartTrigger 3 ai Reference Trigger Don t Care NG Jl ai SampleClock Sample Counter 3 2 1 0 2 2 2 1 0 Figure 3 12 Typical Pretriggered DAQ Sequence If an ai ReferenceTrigger pulse occurs before the specified number of pretrigger samples are acquired the trigger pulse is ignored Otherwise when the ai ReferenceTrigger pulse
95. ecting Al START TRIG and Al SAMP CLK to Two PFI Pins on a Non Isolated Device S Series User Manual 10 6 ni com Chapter 10 Digital Routing Connecting Timing Signals for Isolated Devices Caution Exceeding the maximum input voltage ratings which are listed in the NJ 6154 Specifications can damage your device and the computer NI is not liable for any damage resulting from such signal connections NI 6154 Only The NI 6154 has 10 programmable function interface PFI pins Six of these pins PFI lt 0 5 gt are inputs and can route external control signals into the NI 6154 while the other four PFI lt 6 9 gt are outputs and can route internal NI 6154 signals outward All digital timing connections are referenced to D GND Figure 10 4 shows this reference and how to connect an external AI START TRIG source and an external AI SAMP CLK source to two PFI pins PFI lt 0 5 gt PFI lt 0 5 gt AI START TRIG AI SAMP CLK Source Source D GND v 1 0 Connector r v4 S Series Isolated Device Figure 10 4 Connecting Al START TRIG and Al SAMP CLK to Two PFI Pins on an National Instruments Corporation Isolated Device S Series User Manual Chapter 10 Digital Routing Routing Signals in Software Table 10 1 lists the basic functions you can use to route signals Table 10 1 Signal Routing in Software
96. ed contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events S Series User Manual B 2 ni com Glossary Symbol Prefix Value p pico 10 2 n nano 10 u micro 10 6 m milli 103 k kilo 10 M mega 106 Symbols o Degree I A D AC Greater than Less than Negative of or minus Ohms Per Percent Plus or minus Positive of or plus Amperes the unit of electric current Analog to digital Alternating current National Instruments Corporation G 1 S Series User Manual Glossary ADC ADE Al AI 0 GND AI GATE AI SAMP CLK aliasing AO AO 0 AO 1 AO GND ASIC bipolar building ground S Series User Manual Analog to digital converter an electronic device often an integrated circuit that converts an analog voltage to a digital number Application Development Environment A software environment incorporating the development debug and analysis tools for software development LabVIEW Measurement Studio and Visual Studio are examples 1 Analog input 2 Analog input channel signal Analog input channel ground signal Analog input gate si
97. ed By drop down list and follow the previous instructions National Instruments Corporation XVii S Series User Manual About This Manual Device Documentation and Specifications Training Courses NI DAQmx includes the Device Document Browser which contains online documentation for supported DAQ and SCXI devices such as documents describing device pinouts features and operation You can find view and or print the documents for each device using the Device Document Browser at any time by inserting the CD After installing the Device Document Browser device documents are accessible from Start All Programs National Instruments NI DAQ Browse Device Documentation If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course or obtain a detailed course outline refer to ni com training Technical Support on the Web For additional support refer to ni com support or zone ni com 3 Note You can download these documents at ni com manuals S Series User Manual DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resources xviii ni com DAQ
98. edance balance the signal path as previously described using the same value resistor on both the positive and negative inputs be aware that there is some gain error from loading down the source 3 14 ni com Chapter 3 Analog Input Pseudodifferential Connections for Ground Referenced Signal Sources NI 6115 6120 Only Figure 3 7 shows how to connect a ground referenced signal source to a channel on the NI 6115 Common Mode AC Coupling AO x Choke ether ee Instrumentation Ground 4 j Amplifier Referenced i i E HCI mop fiw Source T A NOSE zA Measured e e AIO e Voltage Common 10nF Mode em Noise and Ground V Potential 4 7 re ot 10 KQ 40 pF for ranges gt x10 V Al 0 GND 1 0 Connector DV AIO Connections Shown Figure 3 7 Pseudodifferential Connection for Ground Referenced Signals on NI 6115 Devices Figure 3 8 shows how to connect a ground referenced signal source to a channel on the NI 6120 National Instruments Corporation 3 15 S Series User Manual Chapter 3 Analog Input E AC Coupling Instrumentation AlO ifi F Jee Amplifier Referenced 1 Uw 100 pF 1M s i i E Signal d ppt e p Measured Source i Vm 5 Voltage Common AIO mme Mode _____ __ High Frequency N7 Noise and Yen Common Mode Choke Ground Potential Al 0
99. eject common mode noise pickup in the leads connecting the signal sources to the device The instrumentation amplifier can reject common mode signals as long as V and V in input signals are both within the working voltage range of the device 3 11 S Series User Manual Chapter 3 Analog Input Differential Connections for Non Referenced or Floating Signal Sources Figure 3 5 shows how to connect a floating signal source to a channel on a non isolated S Series device S Series Device AI O Lo Instrumentation Floating Amplifier Signal s Source Al 0 Measured Bias Voltage Current Return Paths Bias Resistor Al 0 GND C4 Y 1 0 Connector Al 0 Connections Shown Figure 3 5 Differential Connection for Non Referenced Signals on Non Isolated Devices Figure 3 5 shows a bias resistor connected between AI 0 and the floating signal source ground This resistor provides a return path for the bias current A value of 10 kO to 100 kQ is usually sufficient If you do not use the resistor and the source is truly floating the source is not likely to remain within the common mode signal range of the instrumentation amplifier so the instrumentation amplifier saturates causing erroneous readings You must reference the source to the respective channel ground Figure 3 6 shows how to connect a floating signal source to a channel on an isolated S Series device S
100. emale to male shielded I O cable 150 V 2 m non EMI shielding SH37F 37M 1 37 pin female to male shielded I O cable 150 V m non EMI shielding SH37F P 4 37 pin female to pigtails shielded I O cable 4 m R37F 37M 1 37 pin female to male ribbon I O cable 1 m DB37M DB37F EP 37 pin male to female enhanced performance shielded I O cable 1 m EMI shielding For more information about optional equipment available from National Instruments refer to the National Instruments catalog or visit the National Instruments Web site at ni com NI 6154 Specifications Refer to the NI 6154 Specifications for more detailed information about the device Not recommended for EMC sensitive applications S Series User Manual A 38 ni com Technical Support and Professional Services Visit the following sections of the National Instruments Web site at ni com for technical support and professional services National Instruments Corporation Support Online technical support resources at ni com support include the following Self Help Resources For answers and solutions visit the award winning National Instruments Web site for software drivers and updates a searchable KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Free Technical Support All registered users receive free Basic Service whi
101. er 1 DAQ System Overview External Calibration External calibration is a process to adjust the device relative to a traceable high precision calibration standard The accuracy specifications of your device change depending on how long it has been since your last external calibration National Instruments recommends that you calibrate your device at least as often as the intervals listed in the accuracy specifications For a detailed calibration procedure for S Series devices refer to the E S M B Series Calibration Procedure for NI DAQmx by selecting Manual Calibration Procedures at ni com calibration Signal Conditioning Many sensors and transducers require signal conditioning before a computer based measurement system can effectively and accurately acquire the signal The front end signal conditioning system can include functions such as signal amplification attenuation filtering electrical isolation simultaneous sampling and multiplexing In addition many transducers require excitation currents or voltages bridge completion linearization or high amplification for proper and accurate operation Therefore most computer based measurement systems include some form of signal conditioning in addition to plug in data acquisition DAQ devices Sensors and Transducers Sensors can generate electrical signals to measure physical phenomena such as temperature force sound or light Some commonly used sensors are strain gages ther
102. esolution of the ADC Some S Series devices provide programmable instrumentation amplifiers that allow you to select the input range The filter on the S Series device minimizes high frequency noise without attenuating signals of interest within the Nyquist bandwidth The analog to digital converter ADC digitizes the AI signal by converting the analog voltage into a digital number A large first in first out FIFO buffer holds data during A D conversions to ensure that no data is lost S Series devices can handle multiple A D conversion operations with DMA interrupts or programmed I O 3 2 ni com Chapter 3 Analog Input Analog Trigger For information about the trigger circuitry of S Series devices refer to the Analog Input Triggering section Al Timing Signals For information about the analog input timing signals available on S Series devices refer to the Analog Input Timing Signals section Isolation Barrier and Digital Isolators NI 6154 Only The digital isolators across the isolation barrier provide a ground break between the isolated analog front end and the chassis ground For more information on isolation and digital isolators refer to the NJ 6754 Isolation and Digital Isolators section of Appendix A Device Specific Information Analog Input Terminal Configuration S Series devices support only differential DIFF input mode The channels on S Series devices are true differential inputs meaning both positive
103. fault When acquisitions use a start trigger without a reference trigger they are posttrigger acquisitions because data is acquired only after the trigger The device also uses ai StartTrigger to initiate pretrigger DAQ operations In most pretrigger applications a software trigger generates ai StartTrigger Refer to the AJ Reference Trigger Signal section for a complete description of the use of ai StartTrigger and ai ReferenceTrigger in a pretrigger DAQ operation Al Reference Trigger Signal You can use the AI Reference Trigger ai ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desired is the buffer size minus the number of pretrigger samples When the acquisition begins the DAQ device writes samples to the buffer After the DAQ device captures the specified number of pretrigger samples the DAQ device begins to look for the reference trigger condition If the reference trigger condition occurs before the DAQ device captures the specified number of pretrigger samples the DAQ device ignores the condition If the buffer becomes full the DAQ device continuously discards the oldest samples in the buffer to make space for the next sample You can access this data with some limitations before the DAQ de
104. g DMA or interrupts before it is written to the DACs one sample at a time Buffered generations typically allow for much faster transfer rates than non buffered generations because data is moved in large blocks rather than one point at a time For more information on DMA and interrupts refer to the Data Transfer Methods section of Chapter 12 Bus Interface One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode generation refers to the generation of a specific predetermined number of data samples When the specified number of samples has been written out the generation stops Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there After the data is downloaded new data cannot be wri
105. g an Analog Source Outputting the AI Start Trigger Signal AI Reference Trigger Signal Using a Digital Source nein Using an Analog Source Outputting the AI Reference Trigger Signal sssse AI Pause Trigger Signal ss ce tenete eH re tenetis Using Digital Source sine Using an Analog Source AT Sample Clock Signal eee cente tetto Using an Internal Source ss Using an External Source ss Outputting the AI Sample Clock Signal Other Timing Requirements ss AI Sample Clock Timebase Signal Master Timebase Signal ertet e e Pe a S Series User Manual Viii ni com Contents External Strobe Signal eee tpe d Maud a does 3 30 Getting Started with AI Applications in Software 3 30 Chapter 4 Analog Output Analog Output Circuitry iier e rr P o e e Ee eH ade Led rupe 4 2 DACS ease RR te qe e eise 4 2 DAC FIFO ete cete Ent et ree etit RR ERE 4 2 AO Sample Clock e deett te patebat 4 2 Isolation Barrier and Digital Isolators Isolated Devices 4 3 Minimizing Glitches on the Output Signal seen 4 3 AO Data Generation Methods deep HU E FU RENS ERI sonntereeses 4 3 Software Timed Generations 4 3 Hardware Timed Generations essere 4 3 Buffered x4 ate Mestad Ma ota s 4 4 Non Buffer d sms ot t o E RR 4 5 Analog Outpu
106. g inputs with one 16 bit A D converter ADC per channel e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers The NI 6123 features e eight simultaneously sampling analog inputs with one 16 bit A D converter ADC per channel e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers Because the NI 6122 6123 devices have no DIP switches jumpers or potentiometers they can be easily calibrated and configured in software A 14 ni com Appendix A Device Specific Information NI 6122 6123 1 0 Connector Pinout Figure A 8 shows the pin assignments for the 68 pin I O connector on the NI 6122 6123 National Instruments Corporation A 15 S Series User Manual Appendix A Device Specific Information AlO AIME AI 1 GND ApS Al3 AI 3 GND Al4 1 AI 4 GND AL 5 1 Al6 1 AI 6 GND AT NC NC NC P0 4 D GND PO 1 PO 6 D GND 5V D GND D GND PFI 0 AI START TRIG PFI 1 Al REF TRIG D GND 5 V D GND PFI5 PFI6 D GND PFI 9 CTR 0 GATE CTR 0 OUT FREQ OUT wo 68 C2 wo 67 C2 N 66 wo A 65 C2 o 64 D oO 63 D 62 ND 61 ND o 60 ND O1 59 D BR 58 M 57 N N 56 hv A 55 D o 54 Er o 53 E 52 Er N 51 o 50 oa 49 A
107. gacy has the same VIs and functions and works the same way as NI DAQ 6 9 x You can use both Traditional NI DAQ Legacy and NI DAQmx on the same computer which is not possible with NI DAQ 6 9 x See sensor Trigger signal Source clock period Source pulse width S Series User Manual Glossary TTL V V Voc Von VDC VI virtual instrument Vit Vin Vou VoL Vout Vins Vs virtual channel S Series User Manual Transistor transistor logic a digital circuit composed of bipolar transistors wired in a certain manner A typical medium speed digital technology Nominal TTL logic levels are 0 and 5 V Volts Nominal 5 V power supply provided by the PC motherboard Common mode noise and ground potential Volts direct current 1 A combination of hardware and or software elements typically used with a PC that has the functionality of a classic stand alone instrument 2 A LabVIEW software module VI which consists of a front panel user interface and a block diagram program Volts input high Volts input low Volts in Measured voltage Volts output high Volts output low Volts out Volts root mean square Ground referenced signal source See channel G 12 ni com Index Symbols NET languages documentation xv Numerics 50 pin MIO I O connector A 4 A 17 A 24 A A D converter 3 2 AC coupling about 3 2 connections 3 12 accessories field wiring considerations 3
108. gh impedance at startup Figure 7 4 shows the timing requirements for the CtrOGate signal National Instruments Corporation 7 5 S Series User Manual Chapter 7 Counters Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 7 4 Ctr Gate Timing Requirements NI 6154 Only On the NI 6154 PFI lt 0 5 gt can be selected as the Counter 0 Gate signal You can export the gate signal connected to Counter 0 to the PFI lt 6 9 gt pin Counter 0 Internal Output Signal The Counter 0 Internal Output CtrOInternalOutput signal is the output of Counter 0 This signal reflects the terminal count TC of Counter 0 The counter generates a terminal count when its count value rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options Figure 7 5 shows the behavior of the CtrOInternalOutput signal CtrOSource CtrOInternalOutput Pulse on TC CtrOInternalOutput i f Toggle Output on TC Figure 7 5 CtrOInternalOutput Signal Behavior You can use CtrOInternalOutput in the following applications e In pulse generation mode the counter drives CtrOInternalOutput with the generated pulses To enable this behavior software configures the counter to toggle CtrOInternalOutput on TC S Series User Manual 7 6 ni co
109. gnal ai SampleClockTimebase ai StartTrigger g ai SampleClock Ao C Delay From Start Trigger Figure 3 20 ai SampleClock and ai StartTrigger Al Sample Clock Timebase Signal S Series User Manual Any PFI can externally input the AI Sample Clock Timebase ai SampleClockTimebase signal which is not available as an output on the I O connector The ai SampleClockTimebase is divided down to provide the Onboard Clock source for the ai SampleClock You can configure the polarity selection for ai SampleClockTimebase as either rising or falling edge The maximum allowed frequency is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The 20MHzTimebase or the 100kHzTimebase generates ai SampleClockTimebase unless you select some external source Figure 3 21 shows the timing requirements for ai SampleClockTimebase 3 28 ni com Chapter 3 Analog Input tp 50 ns minimum ty 23 ns minimum Figure 3 21 ai SampleClockTimebase Timing Requirements Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which all other internally generated clocks and timebases on the board are derived It controls the timing for the analog input analog output and counter subsystems It is available as an output on the I O connector but you must use one or
110. gnal Analog input sample clock signal The consequence of sampling that causes signals with frequencies higher than half the sampling frequency to appear as lower frequency components in a frequency spectrum Analog output Analog channel 0 output signal Analog channel output signal Analog output ground signal Application Specific Integrated Circuit a proprietary semiconductor component designed and manufactured to perform a set of specific functions A signal range that includes both positive and negative values for example 5 to 5 V See earth ground Celsius G 2 ni com CalDAC channel chassis ground cm CMOS CMRR CompactPCI correlated DIO counter timer coupling CTR CTR 0 GATE CTR 0 OUT National Instruments Corporation G 3 Glossary Calibration DAC 1 Physical a terminal or pin at which you can measure or generate an analog or digital signal A single physical channel can include more than one terminal as in the case of a differential analog input channel or a digital port of eight lines The name used for a counter physical channel is an exception because that physical channel name is not the name of the terminal where the counter measures or generates the digital signal 2 Virtual a collection of property settings that can include a name a physical channel input terminal connections the type of measurement or generation and scaling information You can define
111. gnals are AO 0 AO 1 and AO GND AO 0 is the voltage output signal for AO channel 0 AO 1 is the voltage output signal for AO channel 1 AO GND is the ground reference for the AO channels Figure 4 3 shows how AO 0 and AO 1 are wired on a non isolated S Series device National Instruments Corporation 4 5 S Series User Manual Chapter 4 Analog Output L AO 0 101 Channel 0 Load VOUT 0 AO GND Load VOUT 1 AO 1 tot Channel 1 Analog Output Channels T S Series Device Figure 4 3 Analog Output Connections for Non Isolated S Series Devices Figure 4 4 shows how AO 0 is wired on an isolated S Series device Isolation AO Barrier Lo DAC Digital Load VOUT Analog Output Channel Isolators ss AO Zv T Isolated S Series Device N7 ith 2 S Series User Manual Figure 4 4 Analog Output Connections for Isolated S Series Devices 4 6 ni com Chapter 4 Analog Output Waveform Generation Timing Signals There is one AO Sample Clock that causes all AO channels to update simultaneously Figure 4 5 summarizes the timing and routing options provided by the analog output timing engine RTSI 7 20 MHz Timebase Master Timebase PFI 0 9 CtriinternalOutput ao SampleClock Onboard RTSI 0 6 ao SampleClock PFI 0 9 Clock Time
112. gt CtrOInternalOutput bee Figure 10 1 Signal Routing Multiplexer on Non Isolated Devices Figure 10 1 shows that ai SampleClock can be generated from a number of sources including the external signals RTSI lt 0 6 gt PCI and PXI buses only and PFI 0 9 and the internal signals Onboard Clock and CtrOInternalOutput On PCI and PXI devices many of these timing signals are also available as outputs on the PFI pins iyi Note The Master Timebase signal can only be accepted as an external signal over RTSI Refer to the Device and RTSI Clocks section of Chapter 11 Real Time System Integration Bus RTSI for information about routing this signal National Instruments Corporation 10 3 S Series User Manual Chapter 10 Digital Routing Timing Signal Routing for Isolated Devices S Series User Manual NI 6154 Only The DAQ STC2 provides a flexible interface for connecting timing signals to other devices or external circuitry The isolated S Series device uses the RTSI bus to interconnect timing signals between devices and it uses the programmable function interface PFI pins on the I O connector to connect the device to external circuitry These connections are designed to enable the isolated S Series device to both control and be controlled by other devices and circuits You can control the following timing signals internal to the DAQ STC2 by an external source e AI Start Trigger Signal e Al Reference T
113. h the PXI bus on the PXI backplane or through a special ribbon cable that must be installed for PCI The following figures show the PCI signal connection scheme and the PXI connection scheme In PCI you can access RTSI lt 0 6 gt through the RTSI cable With PXI S Series devices RTSI 0 5 connects to PXI Trigger lt 0 5 gt respectively through the S Series device backplane RTSI 6 connects to the PXI star trigger line allowing the device to receive triggers from any star trigger controller plugged into Slot 2 of the chassis For more information about the star trigger refer to the PXI Hardware Specification Revision 2 1 National Instruments Corporation 11 1 S Series User Manual Chapter 11 Real Time System Integration Bus RTS Figure 11 1 shows the PCI RTSI bus signal connection ae Trigger lt 0 6 gt RTSI Bus Connector RTSI Trigger 7 N7 a RTSI Switch DAQ STC ai StartTrigger 4 ai ReferenceTrigger ao SampleClock ao StartTrigger amp CtroSource CirdGate 4 CtrOlnternalOutput CtroOut 3 ai SampleClock m ai PauseTrigger m ai SampleClockTimebase gt ao SampleClockTimebase I Ctri Source gt CtriGate m ao PauseTrigger Switch lt _ 20MHzTimebase m
114. hapter 13 Triggering Figure 13 1 shows a falling edge trigger 5V Digital Trigger OV Falling edge initiates acquisition Figure 13 1 Falling Edge Trigger You can also program your DAQ device to perform an action in response to a trigger from a digital source The action can affect the following e analog input acquisitions e analog output generation e counter behavior Triggering with an Analog Source Some S Series devices can generate a trigger on an analog signal Figure 13 2 shows the analog trigger circuitry S Series User Manual 13 2 ni com Chapter 13 Triggering ADC T i AlO PGIA ADC 1 Al 1 PGIA T ADC i Al 2 PGIA 1 ADC AI 3 PGIA Mux Pax is O PGIA PFI 0 AI START TRIG F AL 4 PGIA ail ADC AL5 PGIA ADC Y l Al6 PGIA ADC AL7 gt Analog Trigger Detection Analog Comparison Event m Al Circuitry Analog Trigger Circuitry Output W AO Circuitry B Counter Circuitry Figure 13 2 Analog Trigger Circuitry You must specify a source and an analog trigger type The source can be any analog input channel On the NI 6110 6111 and NI 6115 6120 the source can also be the PFI 0 AI START TRIG
115. her on that source edge or on the next one This arrangement results in an uncertainty of one source clock period with respect to unsynchronized gating sources The output timing parameters are referenced to the signal at the source input or to one of the internally generated clock signals on your device National Instruments Corporation 7 3 S Series User Manual Chapter 7 Counters Figure 7 2 shows the out signal referenced to the rising edge of a source signal Any out signal state changes occur within 80 ns after the rising or falling edge of the source signal For information about the internal routing available on the DAQ STC counter timers refer to Counter Parts in NI DAQmx in the NI DAQmx Help or the LabVIEW 8 x Help S Series devices feature the following counter timing signals e Counter 0 Source Signal e Counter 0 Gate Signal e Counter 0 Internal Output Signal e Counter 0 Up Down Signal e Counter 1 Source Signal e Counter 1 Gate Signal e Counter 1 Internal Output Signal e Counter 1 Up Down Signal e Frequency Output Signal e Master Timebase Signal Counter 0 Source Signal You can select any PFI as well as many other internal signals as the Counter 0 Source CtrOSource signal The CtrOSource signal is configured in edge detection mode on either the rising or falling edge The selected edge of the CtrOSource signal increments and decrements the counter value depending on the application the counter is performing
116. hermocouples Plug in instruments with Signal conditioning with isolated non isolated outputs outputs Input Battery devices Non Isolated Differential Ovi am cT TS ao DIFF Ou Mo R Isolated 7 7 Differential Al Isolation Al Isolation V Barrier N Barrier DIFF E T DIFF ONE gt J a gt 1 Refer to the Analog Input Terminal Configuration section for descriptions of the input modes Types of Signal Sources When configuring the input channels and making signal connections first determine whether the signal sources are floating or ground referenced Floating Signal Sources A floating signal source is not connected in any way to the building ground system and instead has an isolated ground reference point Some examples of floating signal sources are outputs of transformers thermocouples battery powered devices optical isolators and isolation amplifiers An instrument or device that has an isolated output is a floating signal source You must connect the ground reference of a floating signal to the AI ground of the device to establish a local or onboard reference for the signal Otherwise the measured input signal varies as the source floats outside the common mode input range S Series User Manual 3 8 ni
117. ignal Descriptions Continued I O Connector Pin Reference Direction Signal Description PFI 3 CTR 1 D GND SOURCE Input PFI 3 As an input this pin is a general purpose input terminal This is the default input for the Ctr1 Source signal Output Counter 1 Source Signal As an output this pin emits the selected Ctr1Source signal This signal reflects the actual source signal connected to Counter 1 For more information refer to the Counter 1 Source Signal section of Chapter 7 Counters PFI 4 CTR 1 GATE D GND Input PFI 4 As an input this pin is a general purpose input terminal This is the default input for the Ctr1Gate signal Output Counter 1 Gate Signal As an output this pin emits the selected Ctr1Gate signal This signal reflects the actual gate signal connected to Counter 1 For more information refer to the Counter 1 Gate Signal section of Chapter 7 Counters CTR 1 OUT DGND Output Counter 1 Output Signal This pin emits the Ctrl InternalOutput signal For more information refer to the Counter 1 Internal Output Signal section of Chapter 7 Counters PFI 5 A0 SAMP DGND CLK Input PFI 5 As an input this pin is a general purpose input terminal Output AO Sample Clock Signal As an output this pin emits the ao SampleClock signal A high to low transition of this signal indicates a new sample is being generated For more information refer to the A
118. igure 6 1 shows the circuitry of one bank isolated DIO line i i Isolation Barrier PFI 5 i o oe a Digital 2 PFI Isolators 8 Static DO Q RN Figure 6 1 S Series Isolated Devices Digital 1 0 Block Diagram National Instruments Corporation 6 1 S Series User Manual Chapter 6 Digital 1 0 for Isolated Devices Static DIO Isolated Devices Isolated devices have unidirectional digital lines that are either static digital inputs DI or static digital outputs DO You can use DI and DO lines to monitor or control digital signals All samples of static DI lines and updates of DO lines are software timed All DO lines are controlled by the same output enable When a digital output line is enabled all other digital output lines will also be enabled and driven to a default value of 0 You can select the up down control input of general purpose counters 0 and from any of the six digital input lines 1 0 Protection Isolated Devices NI 6154 Only Each DIO and PFI signal is protected against over voltage under voltage and over current conditions as well as ESD events However you should avoid these fault conditions by following these guidelines e Do not connect any DO line to any external signal source ground signal or power supply e Understand the current requirements of the load connected to DO signals Do not exceed the specified current output limits of the DAQ devi
119. ilable You can either perform software timed or hardware timed generations Hardware timed generations can be non buffered or buffered Software Timed Generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each DAC conversion In NI DAQmx software timed generations are referred to as On Demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant DC voltage Hardware Timed Generations With a hardware timed generation a digital hardware signal controls the rate of the generation This signal can be generated internally on your device or provided externally National Instruments Corporation 4 3 S Series User Manual Chapter 4 Analog Output S Series User Manual Hardware timed generations have several advantages over software timed generations e The time between samples can be much shorter The timing between samples can be deterministic e Hardware timed generations can use hardware triggering For more information refer to Chapter 13 Triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for acquired or to be generated samples Buffered In a buffered generation data is moved from a PC buffer to the DAQ device s onboard FIFO usin
120. ime by choosing the same signal as the source of the DI Sample Clock AI Sample Clock or DO Sample Clock If the DAQ device receives a di SampleClock when the FIFO is full the DAQ device reports an overflow error to the host software Using an Internal Source To use di SampleClock with an internal source specify the signal source and the polarity of the signal The source can be any of the following signals e ATI Sample Clock e NI 6115 6120 Only AO Sample Clock e Counter 0 Out Program the DAQ device to sample the DIO terminals on the rising edge or falling edge of di SampleClock 5 4 ni com Chapter 5 Digital 1 0 for Non Isolated Devices Using an External Source You can use a signal connected to any RTSI lt 0 6 gt pin as the source of di SampleClock You can sample data on the rising or falling edge of di SampleClock Any PFI line that can be routed to RTSI can also be used as the clock source Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 6 x Help for more information You must ensure that the time between two active edges of the di SampleClock is not too short If the time is too short the DI waveform generation FIFO is not able to store the sample fast enough Refer to the device specifications for the maximum sampling rate for your device 1 0 Protection Each DIO and PFI signal is protected against over voltage under voltage and over current conditions as well as ESD events However
121. ing BNC accessories such as the BNC 2110 BNC 2120 and BNC 2090 To connect your DAQ device to a BNC accessory use one of the following cables SH68 68 EP shielded 68 conductor cable SH68 68R1 EP shielded right angle 68 conductor cable e SH6868 shielded 68 conductor cable e R6868 68 conductor ribbon cable Using Screw Terminals You can connect signals to your DAQ device using a screw terminal accessory such as e CB 68LP CB 68LPR low cost screw terminal block e SCB 68 shielded screw terminal block with breadboard areas TBX 68 DIN rail mountable screw terminal block To connect your DAQ device to a screw terminal accessory use one of the following cables SH68 68 EP shielded 68 conductor cable SH68 68R1 EP shielded right angle 68 conductor cable e SH6868 shielded 68 conductor cable e R6868 68 conductor ribbon cable Using RTSI Use RTSI bus cables to connect the timing and synchronization signals on your DAQ device to other Measurement Vision Motion and CAN boards for PCI Custom Cabling Connectors Options The CA 1000 is a versatile connector enclosure system It allows the user to define I O connectors on a per channel basis Internally the system allows for flexible custom wiring configuration A 20 ni com Appendix A Device Specific Information If you want to develop your own cable follow these guidelines for best results e Use shielded twisted pair wires for each
122. ing an Analog Source When you use an analog trigger source the internal sample clock pauses when the Analog Comparison Event signal is low and resumes when the signal goes high or vice versa For more information refer to the Triggering with an Analog Source section of Chapter 13 Triggering ER Note Pause triggers are only sensitive to the level of the source not the edge B Note The NI 6154 does not support pause triggering Al Sample Clock Signal S Series User Manual You can use the AI Sample Clock ai SampleClock signal to initiate a measurement Your S Series device samples the AI signals on all channels once for every occurrence of ai SampleClock A measurement acquisition consists of one or more samples The source of the ai SampleClock signal can be internal or external You specify whether the measurement sample begins on the rising edge or falling edge of the ai SampleClock signal Using an Internal Source By default ai SampleClock is created internally by dividing down the ai SampleClockTimebase Several other internal signals can be routed to the sample clock Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 6 x Help for more information 3 26 ni com Chapter 3 Analog Input Using an External Source You can use a signal connected to any PFI or RTSI lt 0 6 gt pin as the source of ai SampleClock Figure 3 18 shows the timing requirements of the ai SampleClock source tw i
123. irectly initiate these actions by routing the Analog Comparison Event from a triggered analog input or output task to the counter as a digital trigger The Start Trigger and Pause Trigger sections contain information about the counter trigger signals Refer to Chapter 13 Triggering for more information about triggers National Instruments Corporation 7 1 S Series User Manual Chapter 7 Counters Start Trigger Pause Trigger A start trigger begins a finite or continuous pulse generation After a continuous generation is initiated the pulses continue to generate until you stop the operation in software The specified number of pulses are generated for finite generations unless the retriggerable attribute is used The retriggerable attribute causes the generation to restart on a subsequent start trigger You can use pause triggers in edge counting and continuous pulse generation applications For edge counting acquisitions the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generations the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa iyi Note The NI 6154 does not support pause triggering Counter Timing Signals S Series User Manual Figure 7 2 shows the timing requirements for the gate and source input signals and the timing specifications for the
124. ith one 14 bit A D converter ADC per channel e eight lines of TTL compatible correlated DIO e two general purpose 24 bit counter timers Because the NI 6132 6133 devices have no DIP switches jumpers or potentiometers they can be easily calibrated and configured in software NI 6132 6133 1 0 Connector Pinout Figure A 11 shows the pin assignments for the 68 pin I O connector on the NI 6132 6133 S Series User Manual A 22 ni com Appendix A Device Specific Information d nn AlO 34 68 AlO Al1 33 67 AIO GND Al 1 GND 32 66 A11 Al2 31165 AI24 AI 3 30 64 Al2 GND AI 3 GND 29163 A13 Al4 1 28 62 NC Al 4 GND 1 27161 A14 1 Al5 1 26 60 AI5 AI 6 25 59 AI5 GND 1 AI 6 GND 1 24 58 Are 1 AIT 23 57 AI7 NC 22156 AI7 GND NC 21 55 NC NC 20 54 NC PO 4 19 53 D GND D GND 18 52 Po o PO 1 17 1511 Pos PO 6 16 50 D GND D GND 15 491 Po 2 5V 14 48 Po 7 D GND 13 47 P0 3 D GND 12 46 Al HOLD COMP PFI 0 AI START TRIG 11 45 EXT STROBE PFI 1 Al REF TRIG 10 44 D GND D GND 9 43 PFI2 Al CONV CLK 5V 8 42 PFI 3 CTR 1 SOURCE D GND 7 41 PFI 4 CTR 1 GATE PFI 5 6 40 CTR 1 OUT PFI 6 5 39 D GND D GND 4 38 PFI 7 AI SAMP CLK PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1135 D GND e
125. ition NI 6115 6120 Only For correlated DIO examples in Traditional NI DAQ Legacy refer to the KnowledgeBase document Performing Hardware Timed Buffered Digital Operations with the NI 6115 6120 and the NI 6731 6733 yi Note For more information about programming digital I O applications and triggers in software refer to the NI DA Qmx Help or the LabVIEW 8 x Help NI 6154 Only You can use the NI 6154 device only in Static Digital Input and Static Digital Output digital I O applications For more information refer to Chapter 6 Digital I O for Isolated Devices National Instruments Corporation 5 7 S Series User Manual Digital 1 0 for Isolated Devices NI 6154 Only S Series isolated devices contain ten lines of unidirectional DIO signals The digital I O port is comprised of six digital inputs and four digital outputs all bank isolated Each digital line has the functionality of a PFI line Input PFI lines can be used to input trigger signals to the different function modules of the DAQ STC2 ASIC The PFI pins also can be used as static digital inputs when not used to input triggers Output PFI lines can export internal signals generated in any internal function module as well as signals present in the RTSI bus The PFI pins also can be used as static digital outputs when not used as trigger lines The voltage input and output levels and the current drive levels of the DIO lines are listed in the M 6154 Specifications F
126. ld text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from the keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions operations variables filenames and extensions Text in this font denotes a specific platform and indicates that the text following it applies only to that platform National Instruments Corporation xiii S Series User Manual About This Manual Related Documentation Each application software package and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQ 8 1 or later and where applicable version 7 0 or later of the NI application software NI DAQ for Windows The DAQ Getting Started Guide describes how to install your NI DAQmx for Windows software how to install your NI DAQmx supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQ DAQ Getting Started Guide The NI DAQ Readme lists which devices are supported b
127. lue rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options Figure 7 9 shows the behavior of the Ctr1InternalOutput signal National Instruments Corporation 7 9 S Series User Manual Chapter 7 Counters CtrOSource CtrOInternalOutput Pulse on TC CtrOInternalOutput Toggle Output on TC Figure 7 9 CtriInternalOutput Behavior You can use CtrlInternalOutput in the following applications In pulse generation mode the counter drives Ctr1InternalOutput with the generated pulses To enable this behavior software configures the counter to toggle Ctr1InternalOutput on TC NI 6110 6111 Only Ctr1InternalOutput can control the timing of analog output acquisitions by driving ao SampleClock Counter 0 and 1 can be daisy chained together by routing Ctrl InternalOutput to CtrOGate Ctr1InternalOutput drives the CTR 1 OUT pin to trigger or control external devices Ctr1InternalOutput can drive other internal signals Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Counter 1 Up Down Signal You can externally input this signal on the PO 7 pin but it is not available as an output on the I O connector When you enable externally controlled count direction Counter 1 counts down when this pin is at a logic low and
128. m Chapter 7 Counters CtrOInternalOutput can control the timing of analog input acquisitions by driving ai SampleClock ai StartTrigger ai ConvertClock Counter 0 and 1 can be daisy chained together by routing CtrOInternalOutput to Ctr1Gate CtrOInternalOutput can drive any of the RTSI lt 0 6 gt signals to control the behavior of other devices in the system CtrOInternalOutput drives the CTR 0 OUT pin to trigger or control external devices CtrOInternalOutput can drive other internal signals Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 6 x Help for more information CTR 0 OUT Pin When the CTR 0 OUT pin is an output the CtrOInternalOutput signal drives the pin As an input CTR 0 OUT can drive any of the RTSI lt 0 6 gt signals CTR 0 OUT is set to high impedance at startup Figure 7 6 shows the relationship of CTR 0 OUT and CtrOInternalOutput Can Drive RTSI lt 0 6 gt ai SampleClock ai StartTrigger or other signals CtroGate CtrOSource Counter 0 CtrOInternalOutput L CTROOUT CtrOUp Down u CtrOOut Can Drive RTSI lt 0 6 gt National Instruments Corporation Figure 7 6 CTR 0 OUT and CtrOInternalOutput 7 7 S Series User Manual Chapter 7 Counters Counter 0 Up Down Signal You can externally input this signal on the PO 6 pin but it is not available as an output on the I O connector When y
129. m MAX or from within Visual Studio NET You can generate the configuration code based on your task or channel in Measurement Studio Refer to the DAQ Assistant Help for additional information about generating code You also can create channels and tasks and write your own applications in your ADE using the NI DAQmx API For help with NI DAQmx methods and properties refer to the NI DAQmx NET Class Library or the NI DAQmx Visual C Class Library included in the NI Measurement Studio Help For general help with programming in Measurement Studio refer to the N Measurement Studio Help which is fully integrated with the Microsoft Visual Studio NET help To view this help file in Visual Studio NET select Measurement Studio NI Measurement Studio Help The Measurement Studio Reference contains the Traditional NI DAQ Legacy API overview measurement concepts and function reference In Visual Studio NET select Measurement Studio Measurement Studio Reference Xvi ni com About This Manual To create an application in Visual C Visual C or Visual Basic NET follow these general steps 1 In Visual Studio NET select File New Project to launch the New Project dialog box 2 Find the Measurement Studio folder for the language you want to create a program in 3 Choose a project type You add DAQ tasks as a part of this step ANSI C without NI Application Software The Traditional NI DAQ Legacy User Manual and the NI D
130. memory buffer between the computer and the DACs that allows you to download all the points of a waveform to your board without host computer interaction AO Sample Clock The DAC reads a sample from the FIFO with every cycle of the AO Sample Clock signal and generates the AO voltage For more information refer to the AO Sample Clock Signal section S Series User Manual 4 2 ni com Chapter 4 Analog Output Isolation Barrier and Digital Isolators Isolated Devices NI 6154 Only The digital isolators across the isolation barrier provide a ground break between the isolated analog front end and the chassis ground For more information on isolation and digital isolators refer to the NI 6154 Isolation and Digital Isolators section of Appendix A Device Specific Information Minimizing Glitches on the Output Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit MSB of the DACcode switches You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more information about minimizing glitches AO Data Generation Methods When performing an analog output operation there are several different data generation methods ava
131. ment environment ADE such as LabVIEW to program all the features of an NI measurement device such as configuring acquiring and generating data from and sending data to the device The latest NI DAQ driver with new VIs functions and development tools for controlling measurement devices The advantages of NI DAQmx over earlier versions of NI DAQ include the DAQ Assistant for configuring channels and measurement tasks for your device for use in LabVIEW LabWindows CVI and Measurement Studio increased performance such as faster single point analog I O and a simpler API for creating DAQ applications using fewer functions and VIs than earlier versions of NI DAQ An undesirable electrical signal Noise comes from external sources such as the AC power line motors generators transformers fluorescent lights CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive Nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground Output pin a counter output pin where the counter can generate various TTL pulse waveforms Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and E
132. mocouples thermistors angular encoders linear encoders and resistance temperature detectors RTDs To measure signals from these various transducers you must convert them into a form that a DAQ device can accept For example the output voltage of most thermocouples is very small and susceptible to noise Therefore you may need to amplify or filter the thermocouple output before digitizing it The manipulation of signals to prepare them for digitizing is called signal conditioning National Instruments Corporation 1 5 S Series User Manual Chapter 1 DAQ System Overview For more information about sensors refer to the following documents e For general information about sensors visit ni com sensors e Ifyou are using LabVIEW refer to the LabVIEW Help by selecting Help Search the LabVIEW Help in LabVIEW and then navigate to the Taking Measurements book on the Contents tab e Ifyouare using other application software refer to Common Sensors in the NI DAQmx Help or the LabVIEW 8 x Help Programming Devices in Software S Series User Manual National Instruments measurement devices are packaged with NI DAQ driver software an extensive library of functions and VIs you can call from your application software such as LabVIEW or LabWindows CVI to program all the features of your NI measurement devices Driver software has an application programming interface API which is a library of VIs functions classes attributes a
133. n All rights reserved Important Information Warranty S Series devices are warranted against defects in materials and workmanship for one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist Nati
134. n be used as static digital inputs when not used to input triggers Output PFI lines can export internal signals generated in any internal function module as well as signals present in the RTSI bus The PFI pins also can be used as static digital outputs when not used as trigger lines The PFI pins are shared between the Port 0 and Port 1 of the digital I O interface and the trigger routing functionality National Instruments Corporation 9 1 S Series User Manual Digital Routing The digital routing circuitry manages the flow of data between the bus interface and the acquisition subsystems AI circuitry AO circuitry digital I O and the counters The digital routing circuitry includes the DAQ STC for non isolated S Series devices and DAQ STC2 for isolated S Series devices functionality and uses FIFOs if present in each subsystem to ensure efficient data movement The digital routing circuitry also routes timing and control signals The acquisition subsystems use these signals to manage acquisitions These signals can come from e your S Series device e Other devices in your system via RTSI e user input via the PFI pins For a detailed description of which routes are possible on your device refer to Device Routes in Measurement amp Automation Explorer Timing Signal Routing for Non Isolated Devices The DAQ STC provides a flexible interface for connecting timing signals to other devices or external circuitry The S
135. n this document are usually similar to the names they replace Table 2 3 lists the Traditional NI DAQ Legacy terminal names and their NI DAQmx equivalents Tahle 2 3 Terminal Name Equivalents Traditional NI DAQ Legacy NI DAQmx ACH Al ACH Al ACH AI ACHGND AI GND ACK PFI AIGND AI GND AISENSE AI SENSE AISENSE2 AI SENSE 2 AOGND AO GND CONVERT AI CONV CLK or AI CONV DACOOUT AO 0 DACIOUT AO 1 2 5 S Series User Manual Chapter 2 S Series User Manual 1 0 Connector Table 2 3 Terminal Name Equivalents Continued Traditional NI DAQ Legacy NI DAQmx DGND D GND DIO_ PO DIO PO DIOA DIOB DIOC PO P1 P2 EXTREF AO EXT REF or EXT REF EXT_STROBE EXT STROBE EXT_TRIG EXT TRIG EXT_CONV EXT CONV FREQ OUT FREQ OUT or F OUT GPCTRO GATE CTR 0 GATE GPCTRO_OUT CTR 0 OUT GPCTRO_SOURCE CTR 0 SOURCE or CTR 0 SRC GPCTRI_GATE CTR 1 GATE GPCTRI_OUT CTR 1 OUT GPCTR1_SOURCE CTR 1 SOURCE or CTR 1 SRC PA PB PC PO P1 P2 PFI PFI PFI_ PFI PCLK PFI REQ PFI SCANCLK AI HOLD COMP or AI HOLD SISOURCE AI Sample Clock Timebase STARTSCAN AISAMP CLK or AI SAMP STOPTRIG PFI TRIGI AISTART TRIG or AI START TRIG2 AI REF TRIG or REF TRIG UISOURCE AO Sample Clock Timebase UPDATE AO SAMP CLK or AO SAMP WFTRIG AO START TRIG or
136. nal through RTSI 7 Typically the 20MHzTimebase signal is used as the MasterTimebase unless you wish to synchronize multiple devices in which case you should use RTSI 7 Refer to Chapter 11 Real Time System Integration Bus RTSI for more information about which signals are available through RTSI Figure 7 10 shows the timing requirements for MasterTimebase tp 50 ns minimum ty 23 ns minimum Figure 7 10 MasterTimebase Timing Requirements National Instruments Corporation 7 11 S Series User Manual Chapter 7 Counters Getting Started with Counter Applications in Software You can use the S Series device in the following counter based applications Counting Edges Frequency Measurement Period Measurement Pulse Width Measurement Semi Period Measurement Pulse Generation You can perform these measurements through DMA interrupt or programmed I O data transfer mechanisms The measurements can be finite or continuous in duration Some of the applications also use start triggers and pause triggers iyi Note For more information about programming counter applications and triggers in software refer to the NI DAQmx Help or the LabVIEW 6 x Help S Series User Manual 7 12 ni com Programmable Function Interfaces PFI for Non Isolated Devices Inputs The 10 Programmable Function Interface PFD pins allow timing signals to be routed to and from the I O connector
137. nd properties for creating applications for your device NI DAQ 7 x includes two NI DAQ drivers Traditional NI DAQ Legacy and NI DAQmx Each driver has its own API hardware configuration and software configuration Refer to the DAQ Getting Started Guide for more information about the two drivers Traditional NI DAQ Legacy and NI DAQmx each include a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW and LabWindows CVI examples open the National Instruments Example Finder n LabVIEW select Help Find Examples In LabWindows CVI select Help NI Example Finder Measurement Studio Visual Basic and ANSI C examples are in the following directories e NI DAQmx examples for Measurement Studio supported languages are in the following directories MeasurementStudioNVCNETN Examples NNIDaq MeasurementStudio DotNET Examples NIDaq 1 6 ni com Chapter 1 DAQ System Overview Traditional NI DAQ Legacy examples for Visual Basic are in the following two directories NI DAQ Examples Visual Basic with Measurement Studio directory contains a link to the ActiveX control examples for use with Measurement Studio NI DAQ Examples VBasic directory contains the examples not associated with Mea
138. nels of AO voltage at the I O connector The range is fixed at bipolar 10 V The AO channels on the NI 6115 contain 12 bit DACs that are capable of 4 MS s for one channel or 2 5 MS s for each of two channels The NI 6120 DACs are 16 bit and they have the same AO capabilities as the NI 6115 Refer to the NI 6115 6120 Specifications for more detailed information about the AO capabilities of the NI 6115 6120 3 Note The AO channels do not have analog or digital filtering hardware and do produce images in the frequency domain related to the update rate The NI 6115 6120 includes high density memory modules allowing for long waveform generations NI 6115 6120 1 0 Connector Pinout Figure A 5 shows the pin assignments for the 68 pin connector on the NI 6115 6120 National Instruments Corporation A 9 S Series User Manual Appendix A Device Specific Information AlO 34 68 AIO AI 1 33 67 AIO GND Al 1 GND 32 66 Ali AI 2 31 65 Al2 AI 3 30 64 Al 2 GND Al 3 GND 29 63 AI3 NC 28 62 NC NC 27 61 NC NC 26 60 NC NC 25 59 NC NC 24 58 NC NC 23 57 NC AO 0 22 56 NC AO 1 21 55 AO GND NC 20 54 AO GND P0 4 19 53 D GND D GND 18 52 PO 0 P0 1 17 51 P0 5 P0 6 16 50 D GND D GND 15 49 PO 2 5V 14 48 PO
139. ns with the next sample from the DO waveform generation FIFO Because there is no dedicated internal clock for timed digital operations you can use an external signal or one of several internal signals as the DO Sample Clock You can correlate digital and analog samples in time by choosing the same signal as the source of the DO Sample Clock AI Sample Clock or DI Sample Clock If the DAQ device receives a do SampleClock when the FIFO is empty the DAQ device reports an underflow error to the host software Using an Internal Source To use do SampleClock with an internal source without making any external connections specify the signal source and the polarity of the signal The source can be one of the following signals e Al Sample Clock e NI 6115 6120 Only AO Sample Clock e Counter 0 Out Program the DAQ device to update the DIO pins on the rising edge or falling edge of do SampleClock Using an External Source You can use a signal connected to any RTSI 0 6 pin as the source of do SampleClock You can generate samples on the rising or falling edge of do SampleClock Any PFI line that can be routed to RTSI can also be used as the clock source Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information You must ensure that the time between two active edges of the do SampleClock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sampl
140. ny shared triggers across an available RTSI trigger line from the master device When you start all of the slave devices before starting the master device you have successfully synchronized your application across multiple devices S Series User Manual 11 4 ni com Bus Interface Each S Series device is designed on a complete hardware architecture that is deployed on either the PCI or PXI platform Using NI DAQ driver software you have the flexibility to change hardware platforms and operating systems with little or no change to software code MITE and DAQ PnP PCIand PXI S Series devices use the MITE application specific integrated circuit ASIC as a bus master interface to the PCI bus PCI and PXI S Series devices are inherently Plug and Play PnP compatible On all devices the operating system automatically assigns the base address of the device Using PXI with CompactPCl Using PXI compatible products with standard CompactPCI products is an important feature provided by PXI Hardware Specification Revision 2 1 If you use a PXI compatible plug in module in a standard CompactPCI chassis you cannot use PXI specific functions but you can still use the basic plug in device functions For example the RTSI interface on the S Series device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPC
141. o agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products refer to the appropriate location Help Patents in your software the patents txt file on your CD or ni com patents WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE
142. of a device An external timing signal can be input on any PFI pin and multiple timing signals can simultaneously use the same PFI pin This flexible routing scheme reduces the need to change the physical connections to the I O connector for different applications Refer to the Timing Signal Routing for Non Isolated Devices section of Chapter 10 Digital Routing for more information When using the PFI pin as an input you can individually configure each PFI for edge or level detection and for polarity selection You can use the polarity selection for any of the timing signals but the edge or level detection depends upon the particular timing signal being controlled The detection requirements for each timing signal are listed within the section that discusses that signal In edge detection mode the minimum pulse width required is 10 ns This applies for both rising edge and falling edge polarity settings There is no maximum pulse width requirement in edge detect mode In level detection mode there are no minimum or maximum pulse width requirements imposed by the PFI signals but there can be limits imposed by the particular timing signal being controlled National Instruments Corporation 8 1 S Series User Manual Chapter 8 Programmable Function Interfaces PFI for Non Isolated Devices Outputs You can also individually enable each PFI pin to output a specific internal timing signal For example if you need the Counter 0 S
143. og Trig set ACCUFACy nine ere RO SHE FER pH te HE SHE tete 13 7 National Instruments Corporation Xi S Series User Manual Contents Appendix A Device Specific Information Appendix B Technical Support and Professional Services Glossary Index S Series User Manual Xii ni com About This Manual Conventions The S Series User Manual contains information about using the National Instruments S Series data acquisition DAQ devices with NI DAQ 8 1 and later lt gt bold italic monospace Platform The following conventions appear in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference document for information about precautions to take Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bo
144. olving communications channels operator interface devices and or data acquisition and control interfaces Inches Integral nonlinearity for an ADC deviation of codes of the actual transfer function from a straight line Current output high Current output low Interrupt request Light emitting diode a semiconductor light source Least significant bit Meter A functional part ofa MXI VME V XIbus device that initiates data transfers on the backplane A transfer can be either a read or a write DAQ devices such as the E Series multifunction I O MIO devices SCXI signal conditioning modules and switch modules A board assembly and its associated mechanical parts front panel optional shields and so on A module contains everything required to occupy one or more slots in a mainframe SCXI and PXI devices are modules Most significant bit Multiplexer A switching device with multiple inputs that sequentially connects each of its inputs to its output typically at high speeds in order to measure several signals with a single analog input channel National Instruments Corporation G 7 S Series User Manual Glossary NC NI NI DAQ NI DAQmx noise NRSE OUT PCI S Series User Manual Normally closed or not connected National Instruments Driver software included with all NI measurement devices NI DAQ is an extensive library of VIs and functions you can call from an application develop
145. onal Instruments Corporation 12 3 S Series User Manual Triggering A trigger is a signal that causes a device to perform an action such as starting an acquisition You can program your DAQ device to generate triggers on any of the following e a software command e a condition on an external digital signal e a condition on an external analog signal You can also program your DAQ device to perform an action in response to a trigger The action can affect the following e analog input acquisitions e analog output generation counter behavior For more information on analog input triggering refer to Chapter 3 Analog Input For more information on analog output triggering refer to Chapter 4 Analog Output For more information on counter triggering refer to Chapter 7 Counters 3 Note Not all S Series devices support analog triggering For information about the triggering capabilities of your device refer to the specifications document for your device Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the input PFIs or RTSI lt 0 6 gt signals The edge can be either the rising edge or falling edge of the digital signal A rising edge is a transition from a low logic level to a high logic level A falling edge is a high to low transition National Instruments Corporation 13 1 S Series User Manual C
146. onal Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions
147. ou enable externally controlled count direction Counter 0 counts down when this pin is at a logic low and counts up when it is at a logic high If you are using an external signal to control the count direction do not use the PO 6 pin for output If you do not enable externally controlled count direction the PO 6 pin is free for general use NI 6154 Only On the NI 6154 you can externally input the Counter 0 Up Down signal on the PFI lt 0 5 gt pin Counter 1 Source Signal S Series User Manual You can select any PFI as well as many other internal signals as the Counter 1 Source Ctr1Source signal The Ctr1Source signal is configured in edge detection mode on either rising or falling edge The selected edge of the Ctrl Source signal increments and decrements the counter value depending on the application the counter is performing You can export the Counter 1 signal to the PFI 3 CTR 1 SOURCE pin even if another PFI is inputting the Ctr1 Source signal This output is set to high impedance at startup Figure 7 7 shows the timing requirements for the Ctr1 Source signal r E T Lf ue to 50 ns minimum ty 10 ns minimum Figure 7 7 CtriSource Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency For most applications unless you select an external source the 20MHzTimebase signal or the 100kH
148. ource signal as an output on the I O connector software can turn on the output driver for the PFI 8 CTR 0 SRC pin This signal however cannot be output on any other PFI pin Not all timing signals can be output PFI pins are labeled with the timing signal that can be output on it For example PFI 8 is labeled PFI 8 CTR 0 Source The timing signals that can be output on PFI pins are e AI Start Trigger Signal e AI Reference Trigger Signal e AI Sample Clock Signal e AO Start Trigger Signal e AO Sample Clock Signal e Counter 0 Source Signal e Counter 0 Gate Signal e Counter 1 Source Signal e Counter 1 Gate Signal For more information on analog input signals refer to Chapter 3 Analog Input For more information on analog output signals refer to Chapter 4 Analog Output For more information on counter signals refer to Chapter 7 Counters A Caution Do not drive a PFI signal externally when it is configured as an output For more information about PFI lines refer to the Power On States section of Chapter 5 Digital I O for Non Isolated Devices S Series User Manual 8 2 ni com Programmable Function Interfaces PFI for Isolated Devices The Programmable Function Interface bus is comprised of 10 equivalent directional pins Each PFI line is independently configured as an input or output Input PFI lines can be used to input trigger signals to the different function modules of the DAQ STC2 ASIC The PFI pins also ca
149. outing for Isolated Devices 10 4 Connecting Timing Signals for Non Isolated Devices eee 10 5 Connecting Timing Signals for Isolated Devices see 10 7 Routing Signals in Software ss 10 8 Chapter 11 Real Time System Integration Bus RTSI RES TT TS t M es 11 1 Device and RESTO OCES neo hee ee ate estes 11 4 Synchronizing Multiple Devices ss 11 4 Chapter 12 Bus Interface MITE and DAQ PnP cei HERE E ERR HAE LEEREN AGREE Ye ia 12 1 Using PXI with CompactPCT 2 ertet ete ire t teri Ser a ede apta 12 1 Data Transfer Methods tete tetto eee ead T te Revi it pe Ea 12 2 Direct Memory Access DMA ss 12 2 Interrupt Request URO Jre iet tree ot lea oe er Ped e Eh 12 2 Programmed l O n ut p egt 12 2 Changing Data Transfer Methods between DMA and IRQ 12 3 Chapter 13 Triggering Triggering with a Digital Source ss 13 1 Triggering with an Analog Source 13 2 PFLO AUSTART TRIG Pin nono eet dh 13 3 Analog Input Channel eti deu n es dessein 13 4 Analog Trigger ACODS uicti gerere de qr des 13 4 Analog Trigger Types nece m e dt ha nte insert 13 4 Level T ggerlng se tune tete Teo o E IR a ERR 13 4 Level Triggering with Hysteresis 13 5 Window TIriggering eere rtt ei tre eee Pe deba 13 6 Anal
150. p for information about NI DAQmx Getting Started Getting Started with DAQ Includes overview information and a tutorial to learn how to take an NI DAQmx measurement in LabVIEW using the DAQ Assistant National Instruments Corporation XV S Series User Manual About This Manual VI and Function Reference Measurement I O VIs and Functions Describes the LabVIEW NI DAQmx VIs and properties e Taking Measurements Contains the conceptual and how to information you need to acquire and analyze measurement data in LabVIEW including common measurements measurement fundamentals NI DAQmx key concepts and device considerations LabWindows CVI The Data Acquisition book of the LabWindows CVI Help contains measurement concepts for NI DAQmx This book also contains Taking an NI DAQmx Measurement in LabWindows CVI which includes step by step instructions about creating a measurement task using the DAQ Assistant In LabWindows CVI select Help Contents then select Using LabWindows CVI Data Acquisition The NI DAQmx Library book of the LabWindows CVI Help contains API overviews and function reference for NI DAQmx Select Library Reference NI DAQmx Library in the LabWindows CVI Help Measurement Studio S Series User Manual If you program your NI DAQmx supported device in Measurement Studio using Visual C Visual C or Visual Basic NET you can interactively create channels and tasks by launching the DAQ Assistant fro
151. perations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be generated Non Buffered In non buffered acquisitions data is read directly from the FIFO on the device Typically hardware timed non buffered operations are used to read single samples with known time increments between them and small latency Analog Input Triggering Analog input supports three different triggering actions start reference and pause An analog or digital hardware trigger can initiate these actions All S Series devices support digital triggering and some also support analog triggering To find your device s triggering options refer to the specifications document for your device The AI Start Trigger Signal AI Reference Trigger Signal and AI Pause Trigger Signal sections contain information about the analog input trigger signals Refer to Chapter 13 Triggering for more information about triggers Connecting Analog Input Signals Table 3 1 summarizes the recommended input configuration for different types of signal sources for S Series devices National Instruments Corporation 3 7 S Series User Manual Chapter 3 Analog Input Table 3 1 S Series Analog Input Signal Configuration Floating Signal Sources Not Connected to Earth Ground Ground Referenced Signal Sources Examples Example Ungrounded t
152. produces a corresponding electrical signal The amount of time required for a voltage to reach its final value within specified limits The manipulation of signals to prepare them for digitizing Source signal A measure of the amount of noise seen by an analog circuit or an ADC when the analog inputs are grounded G 10 ni com task terminal count THD THD N thermocouple tote t out tp Traditional NI DAQ Legacy transducer TRIG tsc tsp National Instruments Corporation G 11 Glossary NI DAQmx a collection of one or more channels timing and triggering and other properties that apply to the task itself Conceptually a task represents a measurement or generation you want to perform The highest value of a counter Gate hold time Gate setup time Gate pulse width Total harmonic distortion The ratio of the total rms signal due to harmonic distortion to the overall rms signal in dB or percent Signal to THD plus noise The ratio in decibels of the overall rms signal to the rms signal of harmonic distortion plus noise introduced A temperature sensor created by joining two dissimilar metals The junction produces a small voltage as a function of the temperature An offset delayed pulse the offset is t nanoseconds from the falling edge of the AI CONV CLK signal Output delay time Period of a pulse train An upgrade to the earlier version of NI DAQ Traditional NI DAQ Le
153. quipment breakers or transformers by running them through special metal conduits Refer to the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for more information Minimizing Drift in DIFF Mode If the readings from the DAQ device are random and drift rapidly you should check the ground reference connections The signal can be referenced to a level that is considered floating with reference to the device ground reference Even though you are in DIFF mode you must still National Instruments Corporation 3 19 S Series User Manual Chapter 3 Analog Input reference the signal to the same ground level as the device reference There are various methods of achieving this reference while maintaining a high common mode rejection ratio CMRR These methods are outlined in the Connecting Analog Input Signals section AI GND is an AI common signal that routes directly to the ground connection point on the devices You can use this signal if you need a general analog ground connection point to the device Analog Input Timing Signals S Series User Manual An acquisition with posttrigger data allows you to view data that is acquired after a trigger event is received A typical posttrigger DAQ sequence is shown in Figure 3 11 The sample counter is loaded with the specified number of posttrigger samples in this example five The value decrements with each pulse on ai SampleClock until the value r
154. ration 4 13 S Series User Manual Digital 1 0 for Non Isolated Devices S Series devices contain eight lines of bidirectional DIO signals that support the following features Direction and function of each terminal individually controllable e NI 6115 6120 NI 6122 6123 and NI 6132 6133 Only High speed digital waveform generation e NI 6115 6120 NI 6122 6123 and NI 6132 6133 Only High speed digital waveform acquisition Figure 5 1 shows the circuitry of one DIO line DO Waveform Generation FIFO DO Sample Clock Weak Pull Up Static DO Buffer I O Protection e PO x DO x Direction Control Static DI lt DI Waveform Measurement FIFO DI Sample Clock Figure 5 1 S Series Digital 1 0 Block Diagram The DIO terminals are named P0 0 7 on the I O connector National Instruments Corporation 5 1 S Series User Manual Chapter 5 Digital 1 0 for Non Isolated Devices Static DIO NI 6154 Only For information on digital I O functionality for isolated S Series devices refer to Chapter 6 Digital I O for Isolated Devices Each DIO line can be used as a static DI or DO line You can use static DIO lines to monitor or control digital signals Each DIO can be individually configured as a digital input DI or digital output DO All samples of static DI lines and updates of DO lines are software timed P0 6 and P0
155. renced to D GND You can individually program each line as an input or output Figure 5 2 shows P0 0 3 configured for digital input and P0 lt 4 7 gt configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 5 2 5 V LED A PO lt 4 7 gt D TTL Signal PO lt 0 3 gt 9 9 o o y 5V WWW Switch Y o D GND 1 0 Connector S Series Device Figure 5 2 Digital 1 0 Signal Connections S Series User Manual 5 6 ni com Chapter 5 Digital 1 0 for Non Isolated Devices Caution Exceeding the maximum input voltage ratings which are listed in the specifications document for each S Series device can damage the DAQ device and the computer NI is nof liable for any damage resulting from such signal connections NI 6154 Only For information on connecting digital I O signals to an isolated S Series device refer to Chapter 6 Digital I O for Isolated Devices Getting Started with DIO Applications in Software You can use the S Series device in the following digital I O applications e Static Digital Input e Static Digital Output e Digital Waveform Generation e Digital Waveform Acquis
156. rface AI 3 AT3 12 A3 Data 16 p Al3 Mux H 12 Bit ADC Latch 16 remi n fl Calibration s gt Mux Y t 7 Analog PES Trigger Trigger Level 2 Tri O Le igger lt lt lt gt dacs Circuitry Q i Analog Input PFI Trigger y Bo Timing Control ee da EEPROM DMA Counter Bus Control Control Interface Tei j eo DEAC RIE ipsus FPGA 1 Analog Output RTSI Bus Digital 1 0 8 Digital VO 1 Timing Control Interface Analog SESS Control Us AO Control DACO Data 16 DAG Data 32 xo klf RTSI Bus Calibration 4 DACs National Instruments Corporation Figure A 3 NI 6110 Block Diagram A 5 S Series User Manual Appendix A Device Specific Information Figure A 4 shows the NI 6111 block diagram ALO y T AIO AIO Al O 12 AIO i Alo Mux Amplifier gt lt 12 Bit ADC 7 Latch i Control gt ADC nent Mini pel Al 1 a FIFO Data 82 5 82 A interface MITE Interface a 12 Jatt n Ye ei apc 7 9 Laicn Data 16 id i ma tL Calibration Al Control p Mux Y EEPROM i F Analo IRQ Trigger nigger uet 2 Trigger DMA o Circuitry o 3 r r U Ww 2 fes PFI Ti Analog Input Analog EEpROM DMA m S rigger Trigger 1 Timing Control DMA IRQ gout 1 Control Interface o Gl l 0 QBMILI e
157. ries Isolated Devices N Caution Exceeding the maximum input voltage ratings which are listed in the NJ 6154 Specifications can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections National Instruments Corporation 6 3 S Series User Manual Chapter 6 Digital 1 0 for Isolated Devices Getting Started with DIO Applications in Software Isolated Devices NI 6154 Only You can use the S Series isolated device in the following digital I O applications Static Digital Input e Static Digital Output B Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW 8 x Help S Series User Manual 6 4 ni com Counters Figure 7 1 shows a counter on the S Series device Source Out Gate Software Registers Figure 7 1 Counter Block Diagram Counters 0 and each have two inputs source and gate one output and two software registers which are used to perform different operations Counter functionality for S Series non isolated devices is built into the DAQ STC and the DAQ STC2 for isolated S Series devices For more information on DAQ STC refer to Chapter 1 DAQ System Overview Counter Triggering Counters support two different triggering actions start and pause A digital trigger can directly initiate these actions An analog trigger can ind
158. rigger Signal e AI Sample Clock Signal e AIT Pause Trigger Signal e AI Sample Clock Timebase Signal e AO Start Trigger Signal e AO Sample Clock Signal e AO Pause Trigger Signal e AO Sample Clock Timebase Signal e DI Sample Clock Signal e DO Sample Clock Signal e Counter 0 Source Signal e Counter 0 Gate Signal e Counter 0 Up Down Signal e Counter 1 Source Signal e Counter 1 Gate Signal e Counter 1 Up Down Signal Master Timebase Signal You also can control these timing signals by signals generated internally to the DAQ STC2 and these selections are fully software configurable Figure 10 2 shows an example of the signal routing multiplexer controlling the ai SampleClock signal on an isolated S Series device 10 4 ni com Chapter 10 Digital Routing 22 9 RTSI Trigger lt 0 6 gt L ai Sample Clock PFI lt 0 5 gt Onboard Clock 3 CtrOInternalOutput uet Figure 10 2 Signal Routing Multiplexer on Isolated Devices This figure shows that ai SampleClock can be generated from a number of sources including the external signals RTSI lt 0 6 gt PCI and PXI buses only and PFI 0 5 and the internal signals Onboard Clock and CtrOInternalOutput On PCI and PXI devices many of these timing signals are also available as outputs on the PFI pins 3 Note The Master Timebase signal can only be accepted as an external signal over RTSI Refer to the Device and
159. rigger with a digital source you specify a source and an edge The source can be an external signal connected to any PFI or RTSI lt 0 6 gt pin The source can also be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Also specify whether the measurement acquisition begins on the rising edge or falling edge of the ai StartTrigger signal Figure 3 13 shows the timing requirements of the ai StartTrigger source Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 3 13 ai StartTrigger Timing Requirements Using an Analog Source When you use an analog trigger source the acquisition begins on the first rising edge of the Analog Comparison Event signal For more information refer to the Triggering with an Analog Source section of Chapter 13 Triggering Outputting the AI Start Trigger Signal You can configure the PFI 0 AI START TRIG pin to output the ai StartTrigger signal The output pin reflects the ai StartTrigger signal regardless of what signal you specify as its source The output is an active high pulse Figure 3 14 shows the timing behavior of the PFI 0 AI START TRIG pin when the pin is an output 3 22 ni com Chapter 3 Analog Input ty 50 to 100 ns Figure 3 14 PFI O AI START TRIG as an Output The PFI 0 AI START TRIG pin is configured as an input by de
160. rity ty 10 ns minimum Figure 4 8 ao SampleClock Timing Requirements Outputting the AO Sample Clock Signal You can configure the PFI 5 AO SAMP CLK pin to output the ao SampleClock signal The output pin reflects the ao SampleClock signal regardless of what signal you specify as its source National Instruments Corporation 4 9 S Series User Manual Chapter 4 Analog Output The output is an active high pulse Figure 4 9 shows the timing behavior of the PFI 5 AO SAMP CLK pin when the pin is an output ty 50 75 ns Figure 4 9 PFI 5 A0 SAMP CLK as an Output The PFI 5 AO SAMP CLK is configured as an input by default Other Timing Requirements A counter on your device internally generates ao SampleClock unless you select some external source The ao StartTrigger signal starts this counter Itis stopped automatically by hardware after a finite acquisition completes or manually through software When using an internally generated ao SampleClock in NI DAQmx you can also specify a configurable delay from the ao StartTrigger to the first ao SampleClock pulse By default this delay is two ticks of the ao SampleClockTimebase signal Figure 4 10 shows the relationship of the ao SampleClock signal to the ao StartTrigger signal ao SampleClockTimebase ao StartTrigger ao SampleClock c9 Delay From Start Trigger Figure 4 10 ao S
161. ronment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user is required to correct the interference at their own expense Canadian Department of Communications This Class A digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulations Cet appareil num rique de la classe A respecte toutes les exigences du R glement sur le mat riel brouilleur du Canada Compliance with EU Directives Users in the European Union EU should refer to the Declaration of Conformity DoC for information pertaining to the CE marking Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column The CE marking Declaration of Conformity contains important supplementary information and instructions for the user or installer Contents About This Manual CONv ntiOns 355555 bis bas hee ces cages esti cub os new E cues ben Leche doses dead nn let neue den xi Related Documentation hiina eene nn nnns nnns sanas sein xii Chapter 1 DAQ System Overview
162. s device in Traditional NI DAQ Legacy refer to Table 2 3 Terminal Name Equivalents for the Traditional NI DAQ Legacy signal names S Series User Manual A 24 ni com Appendix A Device Specific Information For a detailed description of each signal refer to the 7 0 Connector Signal Descriptions for Non Isolated Devices section of Chapter 2 1 0 Connector NI 6132 6133 Block Diagram Figure A 13 shows the NI 6132 6133 block diagram CAL MUX Address Data gt DustMITE ae AO no gt PGIA 14 Bi Ix leo ADC 4T Channel Control 0 gt Data 32 loo Al 1 Config 32 gt EEPROM FOR EE Address 32 Channel Control 1 gt SCARAB lt i Al2 Gal PQ S ZX gt o Channel Control 2 Al Control gt OL Al 3 Al3 gt a PGIA 14 Bi o L lo gt ADC a 2 amp Channel Control 3 a c c Pie Al4 Li x o 2 STCA A O gt o gt gt o O o Channel Control 4 d DMA IRQ ou gt WY MA YV o l AI5 CPLD 1 Analog 1 gt o B Tigger Put DMAIRQ
163. surement Studio NI DAQmx examples for ANSI C are in the NI DAQ Examples DAQmx ANSI C Dev directory Traditional NI DAQ Legacy examples for ANSI C are in the NI DAQ Examples Visualc directory For additional examples refer to zone ni com National Instruments Corporation 1 7 S Series User Manual 1 0 Connector This chapter contains information about the S Series I O connector Refer to Appendix A Device Specific Information for the I O connector pinout for your device 1 0 Connector Signal Descriptions for Non Isolated Devices Table 2 1 describes the signals found on the I O connectors for non isolated S Series devices For more information about these signals refer to the specifications for your device Table 2 1 Non Isolated 1 0 Connector Signal Descriptions I O Connector Pin Reference Direction Signal Description AI lt 0 7 gt GND Analog Input Channels 0 through 7 ground These pins are the bias current return point for differential measurements AI lt 0 7 gt AI lt 0 7 gt GND Input Analog Input Channels 0 through 7 These pins are routed to the terminal of the respective channel amplifier AI lt 0 7 gt AI lt 0 7 gt GND Input Analog Input Channels 0 through 7 These pins are routed to the terminal of the respective channel amplifier AO 0 AO GND Output Analog Output Channel 0 This pin supplies the voltage outpu
164. t 3 7 analog output 4 5 digital I O for isolated devices 6 2 digital I O for non isolated devices 5 6 timing for isolated devices 10 7 timing for non isolated devices 10 5 signal descriptions S Series isolated devices NI 6154 2 4 S Series non isolated devices 2 1 signal sources 3 8 software AI applications 3 30 AO applications 4 13 counter applications 7 12 DIO applications for isolated devices 6 4 DIO applications for non isolated devices 5 7 programming devices 1 6 routing signals in 10 8 S Series User Manual I 6 software NI resources B 1 specifications NI 6110 6111 A 8 NI 6115 6120 A 14 NI 6122 6123 A 21 NI 6132 6133 A 27 NI 6143 A 33 NI 6154 A 38 static DIO S Series isolated devices NI 6154 6 2 S Series non isolated devices 5 2 support technical B 1 synchronizing multiple devices 11 4 system timing controller DAQ STC non isolated devices 1 2 DAQ STC2 isolated devices 1 3 T technical support xvi B 1 terminal name equivalents 2 5 timing signal routing 10 1 device and RTSI clocks 11 4 RTSI triggers 11 1 timing signals connecting 10 5 counter 7 2 power on states 5 6 routing for isolated devices NI 6154 10 4 routing for non isolated devices 10 1 waveform generation 4 7 training xvi training and certification NI resources B 1 transducers 1 5 triggering analog input 3 7 analog output 4 5 analog trigger types 13 4 counter 7 1 ni com overview 13 1
165. t Triggering ses 4 5 Connecting Analog Output Signals ss 4 5 Waveform Generation Timing Signals eene 4 7 AO Start Treger Signal z se ote tte RS 4 7 Using a Digital Source ease eg eR 4 7 Using an Analog Source ss 4 8 Outputting the AO Start Trigger Signal 4 8 AO Sample Clock Signal teet t Es 4 9 Using an Internal Source 4 9 Using an External Source 4 0 Outputting the AO Sample Clock Signal 4 0 Other Timing Requirements esee 4 10 AO Pause Trigger Signal eee eene fee ben eie 4 11 Using a Digital Source oie ertt e etsi trente 4 11 Using an Analog Source ss 4 11 AO Sample Clock Timebase Signal 4 11 Master Timebase Signal sn 4 12 Getting Started with AO Applications in Software 4 13 Chapter 5 Digital 1 0 for Non Isolated Devices Static DIO ei ep EG PET D E IMS 5 2 Digital Waveform Generation ss 5 2 DO Sample Clock Signal 5 3 Using an Internal Source 5 3 Using an External Source 5 3 National Instruments Corporation ix S Series User Manual Contents Digital Waveform Acquisition sisi 5 4 DI Sample Clock Signal eter ide ettet 5 4 Using an Internal Source ts 5 4 Using an External Source oett teet erede 5 5 T O Protection sisse ed e ei EU e ee Pe gv E eee eie oet 5 5 Power On States ee de ei edat tiet one treten 5 6 Connecting Digital I O Signals
166. t of Analog Output channel 0 AO 1 AO GND Output Analog Output Channel 1 This pin supplies the voltage output of Analog Output channel 1 AO GND Analog Output Ground The AO voltages and the external reference voltage are referenced to these pins D GND Digital Ground These pins supply the reference for the digital signals at the I O connector and the 5 VDC supply National Instruments Corporation 2 1 S Series User Manual Chapter 2 1 0 Connector Table 2 1 Non Isolated 1 0 Connector Signal Descriptions Continued I O Connector Pin Reference Direction Signal Description PO lt 0 7 gt D GND Input or Output Digital I O signals You can individually configure each signal as an input or output P0 6 and P0 7 can also control the up down signal of Counters 0 and 1 respectively 5 V D GND Output 5 Power Source These pins provide 5 V power For more information refer to the 5 V Power Source section EXT STROBE D GND Output External Strobe Signal This output can be toggled under software control to latch signals or trigger events on external devices This signal is not available for use with NI DAQmx For more information refer to the External Strobe Signal section of Chapter 3 Analog Input PFI 0 AI START TRIG D GND Input PFI 0 As an input for digital signals this pin is a general purpose input terminal As an input for analog
167. ted devices 1 3 hardware for non isolated devices 1 1 ni com system overview 1 1 DAQ PnP 12 1 DAQ STC 1 2 DAQ STC2 1 3 data generation methods 4 3 data transfer methods changing 12 2 DC coupling about 3 2 connections 3 12 Declaration of Conformity NI resources B 1 device and RTSI clocks 11 4 DI Sample Clock signal 5 4 diagnostic tools NI resources B 1 DIFF mode about 3 3 connections for ground referenced signal sources 3 9 connections for non referenced or floating signal sources 3 12 minimizing drift 3 19 differential connections for ground referenced signal sources 3 9 for non referenced or floating signal sources 3 12 digital isolation NI 6154 A 36 routing 10 1 triggering 13 1 waveform acquisition 5 4 generation 5 2 digital I O for isolated devices connecting signals 6 2 T O protection 6 2 overview 6 1 software 6 4 static DIO 6 2 digital I O for non isolated devices connecting signals 5 6 digital waveform acquisition 5 4 digital waveform generation 5 2 National Instruments Corporation 1 3 Index T O protection 5 5 overview 5 1 power on states 5 6 software 5 7 static DIO 5 2 digital I O signals DI Sample Clock 5 4 DO Sample Clock 5 3 direct memory access DMA 12 2 DMA 12 2 DO Sample Clock signal 5 3 documentation conventions used in manual xi NI resources B 1 related documentation xii drivers NI resources B 1 E examples NI resour
168. ted to the terminal of the respective channel amplifier AO lt 0 3 gt AO lt 0 3 gt Output Analog Output Channels 0 through 3 These pins supply the voltage output of Analog Output channels 0 through 3 S Series User Manual 2 4 ni com Chapter 2 1 0 Connector Table 2 2 Isolated Devices 1 0 Connector Signal Descriptions Continued I O Connector Pin Reference Direction Signal Description PFI lt 0 5 gt P0 lt 0 5 gt D GND Input Digital Input signals These digital inputs can serve as either static digital input lines or as PFI input routing resource lines As PFI inputs PFI lt 0 5 gt you may use these signals to route Analog Input Analog Output or counter control signals into the NI 6154 PFI lt 6 9 gt P1 lt 0 3 gt DGND Output Digital Output signals These digital outputs can serve as either digital static output lines or as PFI output routing resource lines As PFI outputs PFI lt 6 9 gt you may use these signals to route Analog Input Analog Output and counter control signals into the NI 6154 NC No connect Do not connect signals to these terminals Terminal Name Equivalents National Instruments Corporation With NI DAQmx National Instruments has revised its terminal names so they are easier to understand and more consistent among National Instruments hardware and software products The revised terminal names used i
169. tten to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO size The advantage of using FIFO regeneration is that it 4 4 ni com Chapter 4 Analog Output does not require communication with the main host memory after the operation is started thereby preventing any problems that may occur due to excessive bus traffic With non regeneration old data will not be repeated New data must be continually written to the buffer If the program does not write new data to the buffer at a fast enough rate to keep up with the generation the buffer will underflow and cause an error Non Buffered In hardware timed non buffered generations data is written directly to the FIFO on the device Typically hardware timed non buffered operations are used to write single samples with known time increments between them and good latency Analog Output Triggering Analog output supports two different triggering actions start and pause An analog or digital hardware trigger can initiate these actions All S Series devices support digital triggering and some also support analog triggering To find your device s triggering options refer to the specifications document for your device The AO Start Trigger Signal and AO Pause Trigger Signal sections contain information about the analog output trigger signals Refer to Chapter 13 Triggering for more information about triggers Connecting Analog Output Signals The AO si
170. us Sampling e Single Point Analog Input Finite Analog Input e Continuous Analog Input You can perform these applications through DMA interrupt or programmed I O data transfer mechanisms Some of the applications also use start reference and pause triggers iyi Note For more information about programming analog input applications and triggers in software refer to the NJ DAQmx Help or the LabVIEW 6 x Help S Series User Manual 3 30 ni com Analog Output Figure 4 1 shows the analog output circuitry of a non isolated S Series device AO 0 DACO AO FIFO m AO Data AO 1 DAC1 AO Sample Clock Polarity Select Reference Select Figure 4 1 S Series Non Isolated Device Analog Output Block Diagram ER Note Analog output is not a feature on the NI 6122 6123 6132 6133 6143 devices National Instruments Corporation 4 1 S Series User Manual Chapter 4 Analog Output Figure 4 2 shows the analog output circuitry of an isolated S Series device Isolation Barrier i i i AO DACO AO FIFO AO Data Digital AO Sample Clock Isolators Figure 4 2 S Series Isolated Device Analog Output Block Diagram Analog Output Circuitry DACs Digital to analog converters DACs convert digital codes to analog voltages DAC FIFO The DAC FIFO enables analog output waveform generation It is a first in first out FIFO
171. ut you must use one or more counters to do so The maximum allowed frequency for the MasterTimebase is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The two possible sources for the MasterTimebase signal are the internal 20MHzTimebase signal or an external signal through RTSI 7 Typically the 20MHzTimebase signal is used as the MasterTimebase unless you wish to synchronize multiple devices in which case you should use RTSI 7 Refer to Chapter 11 Real Time System Integration Bus RTSI for more information about which signals are available through RTSI S Series User Manual 4 12 ni com Chapter 4 Analog Output Figure 4 12 shows the timing requirements for MasterTimebase t 50 ns minimum ty 23 ns minimum Figure 4 12 MasterTimebase Timing Requirements Getting Started with AO Applications in Software You can use the S Series device in the following analog output applications e Single Point Generation Finite Generation e Continuous Generation e Waveform Generation You can perform these generations through DMA interrupt or programmed I O data transfer mechanisms Some of the applications also use start triggers and pause triggers 3 Note For more information about programming analog output applications and triggers in software refer to the NI DA Qmx Help or the LabVIEW 8 x Help National Instruments Corpo
172. uter memory where acquired samples are stored Buffered In a buffered acquisition data is moved from the DAQ device s onboard FIFO memory to a PC buffer using DMA or interrupts before it is transferred to ADE memory Buffered acquisitions typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time For more information on DMA and interrupts refer to the Data Transfer Methods section of Chapter 12 Bus Interface One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode acquisition refers to the acquisitions of a specific predetermined number of data samples After the specified number of samples has been collected into the buffer the acquisition stops If you use a reference trigger you must use finite sample mode Refer to the A7 Reference Trigger Signal section for more information Continuous acquisition refers to the acquisition of an unspecified number of samples Instead of acquiring a set number of data samples and stopping a continuous acquisition continues until you stop the operation A continuous acquisition is also referred to as double buffered or circular buffered acquisition 3 6 ni com Chapter 3 Analog Input If data cannot be transferred across the bus fast enough the data in the FIFO will be overwritten and an error will be generated With continuous o
173. uts e eight lines of TTL compatible DIO e two general purpose 24 bit counter timers The NI 6111 features e two simultaneously sampling analog inputs with one 12 bit A D converter ADC per channel e two 16 bit D A converters DACs with voltage outputs e eight lines of TTL compatible DIO e two general purpose 24 bit counter timers Because the NI 6110 6111 has no DIP switches jumpers or potentiometers it can be easily calibrated and configured in software National Instruments Corporation A 1 S Series User Manual Appendix A Device Specific Information NI 6110 6111 Analog Output The NI PCI 6110 6111 supplies two channels of AO voltage at the I O connector The range is fixed at bipolar 10 V NI 6110 6111 1 0 Connector Pinout Figure A 1 shows the pin assignments for the 68 pin connector on the NI 6110 6111 S Series User Manual A 2 ni com Appendix A Device Specific Information Ce Al0O0 34 68 AlO Al 1 33 67 AIO GND AI 1 GND 32166 Al1 AI 2 1 31165 Al2 1 AL3 30 64 AI 2 GND AI 3 GND 29 63 A13 1 NC 28 62 NC NC 27 161 NC NC 26 60 NC NC 25 59 NC NC 24158 NC NC 23157 NC AO 0 22 56 NC AO 1 21 55 AO GND NC 20 54 AO GND P0 4 19 53 D GND D GND 18 52 Po o PO 1 17 51 Po 5 PO 6 16 50 D GND D GND 15 49 PO 2 5
174. ve high precision analog circuits that must be adjusted to obtain optimum accuracy in your measurements Calibration determines what adjustments these analog circuits should make to the device measurements During calibration the value of a known high precision measurement source is compared to the value your device acquires or generates The adjustment values needed to minimize the difference between the known and measured values are stored in the EEPROM of the device as calibration constants Before performing a measurement these constants are read out of the EEPROM and are used to adjust the calibration hardware on the device NI DAQ determines when this is necessary and does it automatically If you are not using NI DAQ you must load these values yourself You can calibrate S Series devices in two ways through internal or self calibration or through external calibration Internal or Self Calibration S Series User Manual Self calibration is a process to adjust the device relative to a highly accurate and stable internal reference on the device Self calibration is similar to the autocalibration or autozero found on some instruments You should perform a self calibration whenever environmental conditions such as ambient temperature change significantly To perform self calibration use the self calibrate function or VI that is included with your driver software Self calibration requires no external connections 1 4 ni com Chapt
175. vice discards it Refer to the KnowledgeBase document Can a Pretriggered Acquisition be Continuous for more information National Instruments Corporation 3 23 S Series User Manual Chapter 3 Analog Input S Series User Manual When the reference trigger occurs the DAQ device continues to write samples to the buffer until the buffer contains the number of posttrigger samples desired Figure 3 15 shows the final buffer Reference Trigger Pretrigger Samples Posttrigger Samples EE T Complete Buffer Figure 3 15 Reference Trigger Final Buffer Using a Digital Source To use ai ReferenceTrigger with a digital source specify a source and an edge The source can be an external signal connected to any PFI or RTSI lt 0 6 gt pin The source can also be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW 8 x Help for more information Also specify whether the measurement acquisition stops on the rising edge or falling edge of the ai ReferenceTrigger signal Figure 3 16 shows the timing requirements of the ai ReferenceTrigger source 1 tw 1 4 r Rising Edge j Polarity Falling Edge Polarity ty 10 ns minimum Figure 3 16 ai ReferenceTrigger Source Timing Requirements 3 24 ni com Chapter 3 Analog Input Using an Analog Source When you us
176. y this version of NI DAQ Select Start All Programs National Instruments NI DAQ NI DAQ Readme The NI DAQmx Help contains general information about measurement concepts key NI DAQmx concepts and common applications that are applicable to all programming environments Select Start All Programs National Instruments NI DAQ NI DAQmx Help The Traditional NI DAQ Legacy User Manual contains an API overview and general information about measurement concepts Select Start All Programs National Instruments NI DAQ Traditional NI DAQ Legacy User Manual NI DAQmx for Linux S Series User Manual The DAQ Getting Started Guide describes how to install your NI DAQmx supported DAQ device and confirm that your device is operating properly The NI DAQ Readme for Linux lists supported devices and includes software installation instructions frequently asked questions and known issues The C Function Reference Help describes functions and attributes The NI DAQmx for Linux Configuration Guide provides configuration instructions templates and instructions for using test panels xiv ni com About This Manual B Note All NI DAQmx documentation for Linux is installed at usr local natinst nidaqmx docs NI DAQmx Base The NI DAQmx Base Getting Started Guide describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly Select Start All
177. you should avoid these fault conditions by following these guidelines e Ifyou configure a PFI or DIO line as an output do not connect it to any external signal source ground signal or power supply e If you configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive e Ifyou configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals e Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it NI 6154 Only The DIO lines are unidirectional For more information refer to Chapter 6 Digital I O for Isolated Devices National Instruments Corporation 5 5 S Series User Manual Chapter 5 Digital 1 0 for Non Isolated Devices Power On States At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs The DAQ device does not drive the signal high or low Each line has a weak pull up resistor connected to it as described in the specifications document for your device Connecting Digital 1 0 Signals The DIO signals P0 0 7 are refe
178. zTimebase signal generates the Ctrl Source signal 7 8 ni com Chapter 7 Counters NI 6154 Only On the NI 6154 PFI lt 0 5 gt can be selected as the Counter 1 Source signal You can export the CtriSource signal to the PFI lt 6 9 gt pin Counter 1 Gate Signal You can select any PFI as well as many other internal signals like the Counter 1 Gate Ctr1 Gate signal The Ctr1 Gate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can export the gate signal connected to Counter 1 to the PFI 4 CTR 1 GATE pin even if another PFI is inputting the Ctr1Gate signal This output is set to high impedance at startup Figure 7 8 shows the timing requirements for the Ctrl Gate signal Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 7 8 CtriGate Timing Requirements NI 6154 Only On the NI 6154 PFI lt 0 5 gt can be selected as the Counter 1 Gate signal You can export the gate signal connected to Counter 1 to the PFI 6 9 pin Counter 1 Internal Output Signal The Counter 1 Internal Output CtrOInternalOutput signal is the output of Counter 1 This signal reflects the terminal count TC of Counter 1 The counter generates a terminal count when its count va

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