Application Module Student Learning Kit Users Guide featuring the
Contents
1. 14 Table 7 Serial Monitor Memory 15 REVISION August 25 2006 A Initial release Freescale Semiconductor 3 Cautionary Notes Electrostatic Discharge ESD prevention measures should be used when handling this product ESD damage is not a warranty repair item Axiom Manufacturing does not assume any liability arising out of the application or use of any product or circuit described herein neither does it convey any license under patent rights or the rights of others EMC Information on the APS12C32SLK module This product as shipped from the factory with associated power supplies and cables has been verified to meet with requirements of CE and the FCC as a CLASS B product This product is designed and intended for use as a development platform for hardware or software in an educational or professional laboratory In a domestic environment this product may cause radio interference in which case the user may be required to take adequate prevention measures Attaching additional wiring to this product or modifying the products operation from the factory default as shipped may effect its performance and cause interference with nearby electronic equipment If such interference is detected suitable mitigating measures should be taken TERMINOLOGY This module uses option selection jumpers and cut traces to setup default configuration Terminology for application of2. The module comes with a serial cable power supply and an embedded monitor for stand alone operation Support software for this module is provided for Windows 95 98 NT 2000 XP operating systems Application development may be performed by using the embedded monitor or any compatible BDM cable with supporting host software The embedded monitor provides an effective low cost debug method Note that when a BDM cable is used for debugging the BDM pod should be powered from an external supply GETTING STARTED Please refer to the APS12C32SLK Quick Start Users Guide to quickly setup the stand alone application module or PBS12C32SLK Quick Start Users Guide to get started with the microcontroller project board PBMCUSLK Operation The APS12C32SLK module provides input and output features designed to assist embedded application development Access to the MCU port signals is available through module connector J1 This connector may also be used to input power to the module or to output power to attached modules RS 232 communications signals may also be input through connector J1 Care must be exercised when using the J1 to power the module as only regulated voltage in the range of 3 3V to 5V should be supplied to this connection The on board regulator provides a fixed 5V voltage to the module Five user option jumpers and 3 cut traces control module operation Enabling a user option requires installing a jumper across the associated header
3. and pushbutton reset services for the module At power on LV1 holds the MCU in reset for 150 ms after Vcc reaches approximately 4 35V During normal operation LV1 asserts RESET when Vcc falls below 4 35V and holds RESET true for 150 ms after VCC returns to normal The push button operation is described in the paragraph above Use of connector J1 to supply 3 3V to the module requires disabling LV1 LV1 may be disabled by opening the cut trace CT1 Simply remove the circuit trace between the cut trace pads to open the circuit To restore the circuit functionality install a 1206 size 0 ohm resistor or a short piece of wire across the cut trace pads Timing A ceramic resonator Y1 provides a 16 0 MHz base operating frequency to the MCU This supports a default 8 0 MHz internal operating frequency Higher frequencies are possible using the embedded PLL The resonator output is routed to the MCU only and is not available at the MCU Port connector J1 The MCU ECLK output is available to the user at connector J1 if enabled Communications APS12C32SLK module provides a single RS 232 communications port An RS 232 transceiver U2 provides RS 232 signal level to TTL CMOS logic level translation RS232 signals TXD and RXD are routed between the transceiver and the MCU These signals are also routed to connector J1 RS 232 communication signals input on J1 must be TTL CMOS logic levels no translation support is provided through this path
4. 12 DEVELOPMENT SUPPORT sasisissstis iaeiaeua inene inanan nis aenean 12 ASCIl MONITOR OPERATION 12 12 MONITOR COMMANDS 13 INTERRUPT SUPRORT 13 INTERRUPT VECTOR TABLE Hr ar Ha ERAT ERR A ERRAT 14 SERIAL MONITOR OPERATION 455 606 lea tete etd 15 SERIAL MONITOR MEMORY 15 PORT HEADER wssicintesuccintaicitionciatianteinndintuiandiatedwtciadasaaciatasaidindakantauaiandioiiaadatnnantiann 16 2 Freescale Semiconductor FIGURES EPEE nnn nen met nee dou c p ED RUD SE 8 Figure e OESTE 10 Figure 3 MCU PORT GOHPe OE ci dci ende 11 Figure 4 BDM PORT coste ee A Ad Ri 16 TABLES Table 1 Serial COM Signals s thoi f p hora boa on bo eei E 10 Table 2 User Option Jumper SOltllntjs ecco eoe ex rone dude 11 4 Monitor Commands vox 13 Table 5 Monitor Memory Map iei C E cet SEE 12 Table 6 MON12 Interrupt Vector
5. Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor Hong Kong Ltd Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po N T Hong Kong 800 2666 8080 support asia freescale com For Literature Requests Only Freescale Semiconductor Literature Distribution Center P O Box 5405 Denver Colorado 80217 1 800 441 2447 or 303 675 2140 Fax 303 675 2150 LDCForFreescaleSeminconductor hibbertgroup com Design and or Manufacturing services for this product provided by Axiom Manufacturing 2813 Industrial Lane Garland Tx 75041 Phone 972 926 9303 Web www axman com Email sales axman com SLK0101UG Rev 0 09 2006 Information in this document is provided solely to enable system and Software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability aris
6. OXOF8A 0x0FFF see Table 3 below The vectors remain the same order as the default hardware table The Reset vector is reserved user should use autostart to start applications from reset ASCII Monitor Memory Table 3 Monitor Memory Map 0000 Registers 1K bytes 03FF Reserved 0800 Internal RAM 1 5K bytes 0DFF 0E00 Monitor Reserved 0F8B 0F8A Relocated Interrupt Vector Table Dyes OFFF Reserved 8000 User Program Memory 16K bytes BFFF 000 Protected Monitor Space 16K bytes FFFF 12 Freescale Semiconductor Monitor Commands Table 4 Monitor Commands BF lt StartAddress gt lt EndAddress gt lt data gt Block Fill memory range with data BR lt Address gt Set Display user breakpoints CALL lt Address gt Call user subroutine at lt Address gt GO lt Address gt Begin continue execution of user code HELP Display the Mon12 command summary LOAD P Load S Records into memory P Paged S2 MD lt StartAddress gt lt EndAddress gt Memory Display Bytes MM lt Address gt Modify Memory Bytes 8 bit values T lt count gt MW lt Address gt Modify memory Words 16 bit values MOVE lt StartAddress gt lt EndAddress gt Move a block of memory lt DestAddress gt RD Display all CPU registers OFFSET arg Offset for download Proceed Continue program execution RM Modif
7. The transceiver output may also be driven off module if the signals are suitably buffered As added development support hardware flow control signals RTS and CTS are available on the logic side of U2 These signals are routed to vias located near the transceiver U2 RTS has been biased properly to support 2 wire RS 232 communications Freescale Semiconductor 9 Use of the J1 connector to input RS 232 signals requires disabling the on board RS 232 transceiver Otherwise signal corruption may occur Disabling the on board transceiver is accomplished by opening cut traces CT1 and CT2 Simply remove the circuit trace between the cut trace pads to open the circuit To restore the circuit functionality install a 1206 size 0 ohm resistor or a short piece of wire across the cut trace pads Table 1 Serial COM Signals COM Signal MCU Port Connector Disable TXD PS1 TXD J1 5 CT5 RXD PSO RXD J1 7 CT4 COM Connector A standard 9 pin D Sub connector provides external connections for the COM port The COM port is configured as a DCE device Component U2 provides RS 232 translation services The figure below shows the DB9 connector Figure 2 COM Connector 1 Los 6 TXD 2 m 7 RTS RXD 3 8 CTS 4 9 NC GND 5 Female DB9 connector that interfaces to the DCE serial port via an RS232 transceiver It provides simple 2 wire asynchronous serial communications without fl
8. pins Removing the jumper disables the associated option An option enabled by a cut trace can be disabled by removing the circuit trace between the cut trace component pads Use a sharp knife to cut the embedded circuit trace Be careful not to damage adjacent circuitry To re enable the option simply install a 1206 sized 0 resistor or piece of wire across the cut trace component pads Freescale Semiconductor 7 Power Power is supplied to the module through a 2 0mm barrel connector at location PWR for stand alone operation The module may also be powered through connector J1 when connected to the PBMCUSLK Power may be sourced off module through connector J1 to external circuitry Power routing on the module is determined by the PWR_SEL jumper PWR The PWR connector accepts a 2 1mm center positive barrel plug that allows the module to be powered from a wall plug transformer or from a desktop power supply Input voltage should be limited to between 7V and 20V Input voltage of 9VDC is typical This input supplies the on board 5V regulator that powers the module Connector J1 Power may be supplied to the module through the pins J1 1 and J1 2 Use of this option requires a regulated voltage input limited to the range of 3 3VDC to 5VDC This input is connected directly to the module power and ground planes Care should be exercised not to over drive this input Use of connector J1 to supply 3 3V to the module requires disabling
9. section provides a brief description of this serial monitor operation Refer to application note AN2548 for complete details on the serial monitor operation This application note may be found on the Support CD received with the module or from the Freescale web site Serial Monitor Memory Map Table 6 Serial Monitor Memory Map 0x0000 Registers 1K bytes Reserved 0x3800 Internal RAM 2K bytes Ox3FFF Relocated Reserved 0x8000 Fixed Flash EEPROM Block 1 16K bytes OxBFFF visible at RESET 0 000 Fixed Flash EEPROM Block 2 OxF780 User Vectors Relocated OxF7FF User Reset Vector F7FE F7FF OxF800 Vectors Protected eases OxFFFF NOTE Although the monitor does not support external memory the user can enable external memory accesses in the unfilled areas of the memory map The 2K byte serial monitor program provides an RS 232 serial interface to a host PC Serial data rate is 115 2K bps The monitor is compatible with Metrowerks CodeWarrior Freescale Semiconductor 15 Development Studio and other serial monitor interface IDE s The serial monitor is not compatible with ASCII interface programs such as HyperTerm or AxIDE The monitor supports 23 primitive commands to control the target MCU To allow a user to specify the address of each interrupt service routine this monitor redirects interrupt vectors to an unprotected portion of FLASH To boot to the serial mon
10. the voltage supervisor LV1 by opening cut trace CT 1 See the Low Voltage Detect section below To re enable the low voltage supervisor install a 1206 sized 0 resistor at CT1 Connector J1 may also be used to source 5V power from the on board regulator to external modules attached to connector J1 The PWR_SEL option header determines how power is routed to the module PWR_SEL Jumper The PWR_SEL jumper is a 4 position option header that configures power routing on the APS12C32SLK module The module may be powered by an external transformer connected to the PWR connector or through connector J1 The module may also source power to auxiliary modules connected to the connector J1 Damage may occur if the J1 power input pins are over driven Refer to the Figure 1 to determine correct PWR_SEL jumper setting Figure 1 PWR_SEL 10 Source power input from barrel connector PWR 2 1 Source power input from connector J1 2 0 0 1 ES Source power from barrel connector PWR and supply power to external 2 a circuitry connected to J1 8 Freescale Semiconductor Reset Switch The RESET switch provides an asynchronous reset input to the MCU Pressing the RESET switch produces a low voltage level on the RESET input to the MCU The low voltage supervisor LV1 holds the RESET line low for approximately 150 ms after the pushbutton is released Low Voltage Detect A 051813 LV1 provides POR low voltage detect
11. the option jumpers is as follows Jumper a plastic shunt that connects 2 terminals electrically Jumper on in or installed jumper is installed such that 2 pins are connected together Jumper off out or idle jumper is installed on 1 pin only It is recommended that jumpers be idled by installing on 1 pin so they will not be lost Cut Trace a circuit trace connection between component pads The circuit trace may be cut using a razor knife to break the default connection To reconnect the circuit simply install a suitably sized 0 resistor or attach a wire across the pads Freescale Semiconductor FEATURES The APS12C32SLK is an educational application module for the Freescale Semiconductor MC9S12C32 microcontroller Application module SLK s include components for out of box operation and are preprogrammed with a serial monitor to make application development quick and easy A background DEBUG port is provided for development tool use and is compatible with HCS12 BDM interface cables and software The 40 pin connector allows the APS12C32SLK module to be connected to an expanded evaluation environment such as the Microcontroller Project Board Student Learning Kit PBMCUSLK or user s custom PCB Features MC9S12C32 MCU 48 QFP 32K Byte Flash EEPROM 2K Bytes RAM l 31 lines CE Timer PWM Wes SCI and SPI Communications Ports Key Wake up Port BDM DEBUG Port CAN 2 0 Module Analog Comparator 8 MHz Inter
12. 2DGV1 pdf 9512032 ZIP zip APS12C32SLKQSUG pdf APS12C328LKSW zip AN2548 pdf APS12C32SLK Application Module Schematic APS12C32SLK User Guide MC9S12C32 Device User Guide Zip file containing Device Block User Guides Quick Start Guide for use with stand alone module CodeWarrior project for use with APS12C32SLK_QSUG Serial Monitor Program for HCS12 MCU s The following reference documents are for using the application module in conjunction with the Freescale Microcontroller Project Board Student Learning Kit PBS12C32SLKQSUG pdf PBS12C32SLKSW zip Quick Start Guide for application module use with PBMCUSLK CodeWarrior project for use with PBS12C32SLK QSUG Visit www freescale com universityprogram for current product information reference materials and updates Freescale Semiconductor INTRODUCTION Before using this module the user should be familiar with the hardware and software operation of the target MCU Refer to the MC9S12C32 User Manual and MC9S12C32 Reference Manual for details on MCU operation The module s purpose is to promote the features of the 9512 32 and to assist the user in quickly developing an application in a known working environment Users should be familiar with memory mapping memory types and embedded software design for quick successful application development The APS12C32SLK Educational Module is a fully assembled fully functional module supporting Freescale MC9S12C32 microcontroller
13. Freescale Semiconductor SLK0101UG User Guide Rev 0 9 2006 Application Module Student Learning Kit Users Guide featuring the Freescale MC9S12C32 For use with the following part numbers CSM 12C32 APS12C32SLK PBS12C32SLK Freescale Semiconductor Inc 2006 All rights reserved 2 freescale semiconductor CONTENTS CAUTIONARY NOTES lt ccssistiusescatissaanseiensanseduacavatteaeancndaanannainsaneceienuaaeleaeauseguacanmansgaueaneagngendalend 4 PEA TURES A n 8 5 REFERENCES m M 6 INTRODUCTION rone cox ri ox ms eei e e mox i c ce XP dal bin Ra e d 7 GETTING STARMED em E 7 cud Rcx du ert ca pr D FRE Br FR REN 7 POWER MEC Cv 8 PWR MTM HERE 8 CONNECTOR d Tous tinea eon nena raa dnce 8 PWR SEL JUMPER andar das dr uada v Wa ue m eu vr ada rra 8 RESET e AM ut 9 LOW VOLTAGE DETECT ulis uia 9 Ice 9 COMMU NIGAT IONS det re x e an nne te xr aL 9 COM CONNECTOR ui diit vi tr epi Rer khe tuber ete rer ctim eor chess ute uv e Pd cusa rid ute 10 CONNECTOR JI wet a M ME M MM MEE M ME M MM EM M CMM 11 USER OPTIONS pU 11 GIN lm 11 JEU DAEA E E E E E E ENG
14. ble LED1 Disable LED1 PAO User 4 Enable LED2 Disable LED2 PB4 Switches Two push button switches provide momentary active low input to the MCU for user applications Pressing a switch provides a momentary low logic level input tot the MCU SW1 and SW2 provide input to MCUI O ports PEO and PP5 respectively Freescale Semiconductor 11 LED s Two LED s provide active low visual output for user applications A low voltage level driven out on the appropriate MCU port causes the LED to light MCU ports PAO and 4 drive LED1 and LED2 respectively Development Support The APS12C32SLK ships from the factory with a serial monitor installed in FLASH An ASCII monitor is also installed to provide quick and easy debug access to the user The text monitor is available out of RESET The serial monitor is available by pressing and holding SW1 as the module exits RESET In the discussion below the terms text and ASCII are used interchangeably ASCII Monitor Operation The debug monitor provides a simple application development platform for developing application code The debug monitor allows the user to quickly and easily develop and debug RAM based application code The debug monitor is accessible through the COM port using an ASCII terminal program such as HyperTerminal or AxIDE The terminal should be configured for 9600 8 N 1 with no flow control The monitor relocates the hardware interrupt vector table from OxFF8A 0xFFFF to
15. ddress Source OF8A FF8A 02 LVI OF8C FF8C 04 PWME OF8E FF8E 06 PTPI OF90 FF90 08 C4TX OF92 FF92 OA C4RX OF94 FF94 0C C4ERR OF96 FF96 OE C4WU 0 98 FF98 10 C3TX OF9A FF9A 12 C3RX OF9C FF9C 14 C3ERR OF9E FF9E 16 C3WU OFAO 18 C2TX OFA2 FFA2 1A C2RX OFA4 FFA4 1C C2ERR OFA6 FFA6 1E C2WU OFA8 FFA8 20 C1TX OFAA FFAA 22 C1RX OFAC FFAC 24 C1ERR OFAE FFAE 26 C1WU OFBO FFBO 28 COTX OFB2 FFB2 2A CORX OFB4 FFB4 2C COERR OFB6 FFB6 2E COWU OFB8 FFB8 30 FEPRG OFBA FFBA 32 EEPRG OFBC FFBC 34 SPI2 OFBE FFBE 36 SPI OFCO FFCO 38 2 OFC2 FFC2 3A BDLC OFC4 FFC4 3C CRGC OFC6 FFC6 3E CRGL OFC8 FFC8 40 PACBO OFCA FFCA 42 MCNT OFCC FFCC 44 PTHI OFCE FFCE 46 PTJI OFDO FFDO 48 ADC1 OFD2 FFD2 4A ADCO OFD4 FFD4 4C SCI1 OFD6 FFD6 4E SCIO OFD8 FFD8 50 SPIO OFDA FFDA 52 PACAI OFDC FFDC 54 PACAO OFDE FFDE 56 TOF OFEO FFEO 58 TC7 OFE2 FFE2 5A TC6 Freescale Semiconductor Ram Interrupt Vector MCU Interrupt Vector TRAP code Vector Address Address Source OFE6 FFE6 5E TC4 OFE8 FFE8 60 TC3 OFEA FFEA 62 TC2 OFEC FFEC 64 TC1 OFEE FFEE 66 TCO OFFO FFFO 68 RTI OFF2 FFF2 6A IRQ OFF4 FFF4 6C XIRQ OFF6 FFF6 6E SWI OFF8 FFF8 70 TRAP OFFA FFFA 72 COP OFFC FFFC 74 CLM OFFE FFFE 76 RESERVED Serial Monitor Operation A serial binary monitor is loaded in the MCU internal flash memory Press and hold SW1 while pressing the RESET button or applying power This
16. ing out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor
17. itor the user simply pressed and holds SW1 while pressing the RESET switch or applying power The status of SW1 is read only during the rising edge of RESET To load user application on start up the user is responsible for programming the pseudo reset vector OxF7FE 0xF7FF Pressing SW1 after the MCU exits reset will not access the serial monitor After exiting reset pressing SW1 has effect as defined in the user application BDM_PORT Header BDM access is gained through the BDM_PORT header This is a 6 pin header that allows connection of a compatible HCS12 BDM cable Refer to the documentation for the specific BDM cable used for details on its use The figure below shows the pin out for the DEBUG header Figure 4 BDM_PORT MODC BKGD 1 2 GND See the HC12 Reference Manual for complete 3 4 RESET DEBUG documentation 5 6 VDD 16 Freescale Semiconductor How to Reach Us Home Page www freescale com E mail support freescale com USA Europe or Locations Not Listed Freescale Semiconductor Technical Information Center CH370 1300 N Alma School Road Chandler Arizona 85224 1 800 521 6274 or 1 480 768 2130 support freescale com Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French support freescale com
18. nal Bus Operation Default are 25 MHz Bus Operation using internal PLL ND USER e 3 3VDC to 5VDC operation RTS CTS Power Input Selection Jumper 1412 5V PWR UE PWR SEL sole CSM 12C32 9 9 9 9 9 9 9 999 01 144 1 On board regulated 5V power supply O 02 Optional power input output from Connector J1 l 16 MHz Ceramic Resonator E RS 232 Serial Port w DB9 Connector 4S m 8 Ch 10 bit Analog Comparator with rail to rail operation and external trigger capability 8 Channel 16 bit Timer with Input Capture Output Compare and PWM capabilities User Components Provided 3 Push Button Switches 2 User RESET 3LED Indicators 2 User VDD Jumpers Disable User Components Power Select Connectors 40 connector provides access to most MCU I O signals 2 0mm Barrel Connector Power Input DEBUG BDM Connector DB9 Communications Connector Supplied with DB9 Serial Cable Documentation CD Manual and Wall plug type power supply 99999 R8 R12 et Specifications Module Size 2 2 x 1 6 Power Input 9VDC 9 200 mA typical 6 to 16VDC range Freescale Semiconductor 5 References Reference documents are provided on the support CD in Acrobat Reader format More information can be found in the Application Notes section of the Freescale Web site APS12C32SLKSCHEM pdf APS12C32SLKUG pdf 9S12C3
19. ow control A straight through serial cable may be connected to a DTE device such a PC Pins 1 4 and 6 are connected together Freescale Semiconductor Connector J1 Connector J1 provides access to APS12C32SLK I O port signals Figure 3 MCU_PORT Connector Vx GND PS1 TXD PSO RXD PP5 KWP5 PEO XIRQ PTO PWO IOCO PT1 PW1 IOC1 PM4 MOSI PM2 MISO PM5 SCK PM3 SS PE4 ELCK PE7 XCLKS 2 02 PADOS ANOS 04 4 PADO5 AN05 PADO06 ANOG PADO7 ANO7 User Options PE1 IRQ RESET MODC BKGD 00 1 PB4 PAO PM1 TXCAN PMO RXCAN PT2 PW2 IOC2 PT3 PW3 lIOC3 PT4 PW04 lIOC4 PT5 IOC5 PT6 IOC6 PT7 OC7 Default Signal Assignments MCU PORT Signal Disable PS1 TXD COM1 TXD CT 5 PSO RXD COMI1RXD CT 4 PE1 IRQ Swi User PP5 KWP5 SW2 User2 PAO LED1 User3 PB4 LED2 User4 Note Default signal assignment should be disabled to use the signal at connector J1 User options include 2 LED s and 2 pushbutton switches Each user option may be enabled individually using the USER option header When the appropriate USER option jumper is installed the associated user option is enabled Removing a jumper disables the associated user option Table 2 User Option Jumper Settings Jumper On Off MCU Signal User 1 Enable SW1 Disable SW1 PEO XIRQ User 2 Enable SW2 Disable SW2 5 KWP5 User 3 Ena
20. was negligent regarding the design or manufacture of the part Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2006 All rights reserved e 2 freescale semiconductor
21. y CPU Register Contents STOPAT lt Address gt Trace until address Trace count instructions NOTE Items in Italics are not implemented at this time Interrupt Support All interrupt services under are provided through the relocated vector table see Table 5 below Each location in the table is initialized to a value of 0000 to cause the trap of an unscheduled interrupt Any nonzero value will allow the interrupt to proceed to the user s service routine that should be located at the address indicated The interrupt service delay is 21 cycles over the standard interrupt service To use vectors specified in the table the user must insert the address of the interrupt service routine during software initialization into the ram interrupt table For an example for the IRQ vector the following is performed Example IRQ Service routine label IRQ SRV Ram Vector Table address is defined in table below IRQ vector definition VIRQ EQU 0FF2 define ram table vector location Place IRQ service routine address in the table IRQ_SRV VIRQ MOVW This vector initialization will remain in effect until a RESET is invoked Freescale Semiconductor Interrupt Vector Table Table 5 12 Interrupt Vector Table Ram Interrupt Vector MCU Interrupt Vector TRAP code Vector Address A
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