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Modicon 984 Programmable Controller Systems Manual

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1. 1 1 1 0 0 Zu o o o R gt T poco dq SR Py 0 sT O 1 1 BLKM 1 0 0 FIN 1 0 1 FOUT 1 1 0 SRCH ESTAT 1 1 41 0 4 e eue 0 0 0 AND 0 0 1 OR 0 1 0 CMPR O 1 1 SENS 1 0 0 MBIT 1 0 1 2COMP 1 1 0 XOR 1 1 1 BROT 1 1 1 1 0 fee 0 0 0 READ 0 0 1 WRIT 0 1 o 1 1 For Loadable Options j d 9 1 id 0 i 39 86 984 Opcode Assignments GM 0984 SYS 6 2 2 How the x and z Bits Are Used in 24 Bit Nodes In the 24 bit CPUs the three most significant x bits are used to indicate the type of DX function 24 Bit Node Format for DX Functions X x xi 1 1 1 0 0 Z Z Z o 00 R gt T o 0 0 7d eR o 0 1 0 1 STT 0 1 0 O 1 1 BLKM O 1 1 1 0 0 FIN i 1 4d ROUT 1 0 4 1 1 0 SRCH 1 ia 1 1 1 STAT tT a 4 x xx t1 1 0 1 ZZ z 0 00 AND 0 0 0 0 1 e2OR 0 0 1 0 1 0 CMPR o 3 0 1 1 SENS Qj a 1 1 0 0 MBIT 1 0 0 1 0 1 COMP 1 0 1 1 1 0 XOR 1 iu 1 1 1 BROT t 3 4 X x x 1 ya 110 Zu d at 0 00 READ 0 0 0 0 0 1 WRIT 0 0 1 0 1 0 0 1 0 7 4 7 7 1 0 0 1 0 0 1 0 4 For Loadable Options io qd a 1 id 7 a Y ded al The z bits which simply echo the three most significant x bits may be ign
2. DERIVATIVE Xn CONTRIBUTION Xn 1 3 3 Xn 4x 6 8 I 4x 6 8 N AP Ax PV y gt nc Me ona ibe dies b 4 RGL Ts 4x13 Zn z E E SP b 4 PROPORTIONAL Gaiaa pases CONTRIBUTION 4x11 4x12 PB GE T Output Bias T Clamp Mn 4x8 x Integral 4x17 4x2 Feedback INTEGRAL 4x18 Mn 1 CONTRIBUTION n 1 Floc 4x16 M Qn Preload Integral Tioc Mode C 4x20 Hi Al ii Ko Ts 600000 In 1 In In 4 gt In 4x 3 4 5 PID2 Algorithm Block Diagram 278 984 Enhanced Instructions GM 0984 SYS where E error expressed in raw analog units SP set point in the range 0 4095 PV process variable in the range 0 4095 X filtered PV Kp integral mode gain constant expressed in 0 01 min 1 Kg derivative mode gain constant expressed in hundredths of a minute RGL rate gain limiting filter constant in the range 2 30 Ts solution time expressed in hundredths of a second PB proportional band in the range 5 500 bias loop output bias factor in the range O 4095 M loop output GE gross error the proportional derivative contribution to the loop output Z derivative mode contribution to GE Qn unbiased loop output F feedback value in the range 0 4095 l integral mode contribution to the loop output low anti reset windup low SP in the range 0 4095 Ihigh anti reset windup high SP in the range 0 4095 Note The integral mode contribution calculation
3. ON specified LAB ON error constant subroutine value activated The node indicates that this is a LAB function and contains a unique constant val ue identifying the subroutine you are about to run it may range from 1 255 If more than one subroutine network has the same LAB value the network with the lowest number is used as the starting point for the subroutine Note The LAB block also functions as a default return from the sub routine in the preceding networks If you have been executing a series of subroutine networks and you encounter a network that begins with a LAB block the system assumes that the desired subroutine is finished and it returns the logic scan to the node immediately following the most recently executed JSR block 240 Ladder Logic Subroutines GM 0984 SYS 19 4 RET The RET instruction may be used to conditionally return the logic scan to the node immediately following the most recently executed JSR block This node can be implemented only from within a subroutine network in the last unscheduled segment of user logic RET is a one node function block ON return to HET calling logic 00001 ON error The bottom node indicates that this is a RET function and contains the constant value 00001 When the ENABLE input is energized the RET block returns the logic scan to the node immediately following the most recently executed JSR block If a subroutine does not
4. The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 GM 0984 SYS 984 Enhanced Instructions 249 The middle node comprises six consecutive 4x registers Oo 4x and 4x 1 hold the second operand value in the range 0 99 999 999 o 4x 2 and 4x 3 hold the double precision subtraction result o 4x 4 indicates whether or not the operands are in the valid range 1 out of range and 0 in range g 4x 5 is not used in this calculation but must exist in state RAM Double Precision Multiplication ON operand 1 operand 1 ON operation performed multiplied by oper successfully and 2 and result placed in designated registers operand 2 ON an operand is out of and destination range EMTH 3 The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers o 4x and 4x 1 hold the second operand value in the range 0 99 999 999 oO 4x 2 4x 3 4x 4 and 4x 5 hold the double precision multiplication result 250 984 Enhanced Instructions GM 0984 SYS Double Precision Division ON operand 1 is divided by operand 2 and the result is placed in designated registers ON remainder stored as a fraction in 4x 4 OFF remainder stored
5. sse 102 MOVE Functions i e Ry edd dade eer d 102 Matrix Functions eresie creaa RR ERR apa EID UR EYEN UE Rc 102 How Ladder Logic Is Solved cece cece 103 Scan Time s asd pR dw bp RC RR d nive ERE TA 104 Logic Solve Time oer mainie ine a p e meh 104 l O Servicing Cos IRSE IE eS es 104 Overhead olde ek adque PE Ea Re PER 105 How to Measure Scan Time 00 cee 106 Maximizing Throughput sssssssseee III 108 The Ideal Throughput Situation 00 cece eee 108 The Order of Solve cues eus Meek eae RUE RET 110 Using the Segment Scheduler to Improve Critical I O Throughput 112 Using the Segment Scheduler to Improve System Performance 114 Table of Contents GM 0984 SYS Using the Segment Scheduler to Improve Comm Port Servicing 115 Sweep Functions taiate ka ea eee eee 116 Constant Sweep ssl EVER RERO dip ee eee 116 Single Sweep wk tet eh 117 Chapter 8 Contacts Shorts and Coils 119 Relay Contacts osii m asian orte op Det mp EP DES 120 Vertical and Horizontal Shorts 0 ees 122 An Either Or Example ssssesssseeeeee nh 122 Normal and Latched Coils 0 cece ees 124 Coils in a Logic Network 000s cee n e 125 Enable Disable Capabilities for Discrete Values 125 Forcing Discretes ON and OFF 0c eee eee eee 125 Chapter 9 Counters and Timers 127 U
6. GM 0984 SYS Ladder Logic Subroutines 243 19 6 Some Cautionary Notes About Subroutines You should always keep your subroutine logic as straightforward as possible for debugging purposes The power flow displayed on your programming panel is in valid in the subroutine networks and is therefore more difficult to troubleshoot Note We recommend that you debug your ladder logic programs be fore making them subroutines For transitionals to work properly within a subroutine the subroutine must be ex ecuted at the appropriate time to see the state change To use a negative transi tional within the subroutine the subroutine must be called once when the contact is ON then called again on the scan when the contact is turned OFF To use a positive transitional within a subroutine the subroutine must be called while the contact is OFF then called again on the scan when the contact is turned ON Counters also work on a state change basis when the top input transitions from OFF to ON Timers do not function properly from within a subroutine unless that subroutine is executed on every scan Note Multiple scan functions do not function from within a subroutine A Caution We strongly recommend that you do not control real world outputs from within a ladder logic subroutine Control of such coils would be possible only when the subroutine was executed 244 Ladder Logic Subroutines GM 0984 SYS Chapter 20 984 Enhanced Instructions
7. Pointer to reset feed back If you leave this as zero the PID2 function auto matically supplies a pointer to the loop output register If the actual output 40500 could be changed from the value supplied by PID2 then this regis ter should be set to 500 40500 to calculate the integral properly Output clamp high 0 4095 Normally set to maximum Output clamp low 0 4095 Normally set to minimum 984 Enhanced Instructions 289 40119 0015 Rate Game Limit Constant 2 30 Normally set to about 15 The actual value depends on how noisy the input signal is Since we are not using de rivative mode this has no effect on the PID2 function 40120 0000 Pointer to track input Used only if the PRELOAD feature is used If the PRELOAD is not used this is normally 0 The values in the registers in the 40200 destination block are all set by the PID2 block 290 984 Enhanced Instructions GM 0984 SYS Chapter 21 984 Loadable Instructions o Loadable Software Packages for 984 Controllers o The 984 Hot Standby Loadable o The HSBY Status Register o An HSBY Reverse Transfer Example o CALL Blocks for the 984 Coprocessors o MBUS and PEER Transactions for Modbus II o The MBUS Get Statistics Function o Designing Custom Loadable Functions o Sequential Control Functions o Extended Math Loadables o The EARS Loadable GM 0984 SYS 984 Loadable Instructions 291 21 1 Loadable Software Packages for 984 Controllers T
8. ru Retry Counter Command Not Supported by Drop Invalid Sequence Number Drop Just Powered Up Not Used Addressed Drop Did Not Respond CRC Error From Addressed Drop Character Overrun From the Addressed Drop Not Used 190 Monitoring System Status GM 0984 SYS 14 8 The S908 Status Table The 277 words in the S908 status table are organized in three sections the first 11 words for controller status the next 160 words for I O module health and the last 106 words for I O communication health DECIMAL 173 176 179 182 185 188 272 275 175 WORD 1 ONDA OI 172 178 181 184 187 190 274 277 Controller Status Hot Standby Status Controller Status RIO Status Controller Stop State Number of Ladder Logic Segments End of logic Pointer Address RIO Redundancy and Timeout Memory Sizing Word for Panel in the 984 145 Compact Controller ASCII Message Status Run Load Debug Status Not used Drop 1 Rack 1 Drop 1 Rack 2 Drop 1 Rack 3 Drop 1 Rack 4 Drop 1 Rack 5 Drop 2 Rack 1 Drop 2 Rack 2 Drop 32 Rack 4 Drop 32 Rack 5 S908 Startup Error Code Cable A Errors Cable B Errors Global Communication Errors Drop 1 Errors Health Status and Retry Counters in the Compact 984 Controllers Drop 2 Errors Drop 3 Errors Drop 31 Errors Drop 32 Errors GM 098
9. 20 10 Ladder Logic for the PID2 Example The liquid is dumped from the tank to maintain a constant level The control ob jective is to maintain a constant level in the separator The phases must be sepa rated before processing separation is the role of the inlet separator PV 1 If the level controller LSH 1 fails to perform its job the inlet separator could fill caus ing liquids to get into the gas stream this could severely damage devices such as gas compressors The level is controlled by device LC 1 a 984 controller connected to an analog in put module I P 1 is connected to an analog output module We can implement the control loop with the following 984 ladder logic 30001 40102 0 0 SUB SUB 40113 40500 40100 00101 40200 00102 PID2 00030 00103 The first SUB block is used to move the analog input from LT 1 to the PID2 ana log input register 40113 The second SUB block is used to move the PID2 output M to the traffic copped output I P 1 Coil 00101 is used to change the loop from AUTO to MANUAL mode if desired For AUTO mode it should be ON Specify the set point in mm for input scaling EU The full input range will be 0 4000 mm for 0 4095 raw analog Specify the register content of the top node in the PID2 block as follows 288 984 Enhanced Instructions GM 0984 SYS 40100 40101 2000 40102 0000 40103 3500 40104 1000 40105 0100 40
10. GM 0984 SYS Bypassing Networks with SKP 205 15 1 SKP With the SKP instruction you can bypass networks in your ladder logic program and not solve the skipped logic SKP functions allow you to reduce scan time and in effect establish subroutines in the logic The SKP instruction is a one node function block ON acti SKP vate number of blocks skip function to be skipped The node indicates that this is a SKP function and specifies the number of net works to be skipped this number must include the network that contains the SKP instruction The number can be o A decimal ranging from 1 999 o An input register 3x o A holding register 4x When the node is powered SKP is performed on every scan This causes the rest of the network containing the SKP block to be skipped this counts as one network skipped the CPU continues to skip networks until the total number of networks skipped equals the value specified in the function block A SKP operation cannot pass the boundary of a segment No matter how many extra networks you schedule to be skipped the instruction will stop if it reaches the end of a segment Note A SKP instruction can be activated only if you specify in the configurator editor that skips are allowed 206 Bypassing Networks with SKP GM 0984 SYS 15 1 1 A Simple SKP Example Network 42 Rung 1 10003 00193 U Rung 7 H4 S 00002 10001 Network 43 10002 0011
11. NETWORK 1 START NETWORK 2 sem NEXT NETWORK 4 The controller begins solving logic within a network at the top of the leftmost col umn and proceeds down then moves to the top of the next column and proceeds down Each node is solved in the order it is encountered in the logic scan Power flow within the network is always down each column from left to right never from bottom to top and never from right to left GM 0984 SYS Ladder Logic Overview 103 7 6 Scan Time The time it takes a controller to solve a complete ladder logic program and update all I O modules is called scan time Scan time comprises the time it takes the 984 controller to solve all scheduled logic i e logic solve time service I O drops and perform system overhead servicing communication ports and option processors executing intersegment transfer IST and system diagnostics 7 6 1 Logic Solve Time Logic solve time is the time it takes to solve a complete logic program indepen dent of the time it takes to service I O or carry out any system overhead tasks Logic solve times are different in different types of 984 controllers the various times measured in ms Kwords of logic are given in the chart in Section 1 2 Input Input Input Segment 1 A Segment 2 S Segment 3 S OVHD Logic Networks 1 Logic Networks T Logic Networks 1 Output Output Output PS One Scan
12. Number of modules in drop Drop already configured Port already configured More than 1024 output points More than 1024 input points Module slot address Module rack address Number of output bytes Number of input bytes First reference number Second reference number No input or output bytes Discrete not on 16 bit boundary Unpaired odd output module Unpaired odd input module Unmatched odd module reference 1x reference after 3x register Dummy module reference already used 3x module not a dummy 4x module not a dummy Dummy then real 1x module Real then dummy 1x module Dummy then real 3x module Real then dummy 3x module 175 are Cable A error words GM 0984 SYS Word 173 High byte bits 1 8 Framing error count Low byte bits 9 16 DMA receiver overrun count Word 174 High byte Receiver error count Low byte Bad drop reception count Word 175 Displays the last received LAN error code If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 13 14 15 16 Not Used CRC Error No End Of Frame Alignment Error Short Frame Overrun Error Words 176 178 are Cable B error words Word 176 High byte Framing error count Low byte bits 9 16 DMA receiver overrun count Word 177 High byte Receiver error count Low byte Bad drop reception count Word 178 Last Recei
13. ON operation performed log of error types en successfully countered since last invocation logged error _ 1 presence of nonzero values information in error log register 0 all bits set to O in error log EMTH register 38 The top node requires the assignment of two consecutive 4x registers but they are not used in the operation The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 contains the error log data and 4x 3 is set to O Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since these registers must be assigned but are not used Middle Node Register 4x 2 If the bit is set to 1 then the specific error condition exists for that bit 1 2 3 4 5 6 7 8 Function Code of Not Used Last Error Logged 9 10 n 12 13 14 15 16 Integer FP Conversion Error Exponential Function Power Too Large Invalid FP Value or Operation FP Overflow FP Underflow GM 0984 SYS 984 Enhanced Instructions 275 20 6 A Closed Loop Control System An analog closed loop control system is one in which the deviation from an ideal process condition is measured analyzed and adjusted in an attempt to obtain and maintain zero error in the process condition Provided with the Enhanced Instruc
14. When ON ON with bottom input preset accumulated time timer preset enabled O reset 11 0 T0 1 T 01 WhenON 1 enabled accumulated accumulated time lt timer preset time The timer preset in the top node can be Oo A decimal ranging from 1 999 in 16 bit CPUs and 1 9999 in 24 bit CPUs o An input register 3x o A holding register 4x The bottom node indicates that the timer is incrementing as a T1 0 TO 1 or T 01 counter and contains a holding register 4x that stores accumulated time A Caution If you cascade T1 0 timers with presets of 1 the timers will time out together to avoid this problem change the presets to 10 and substitute a TO 1 timer The same holds true for a TO 1 timer in which case you can substitute a T 01 timer 130 Counters and Timers GM 0984 SYS I 00005 10001 00107 NJ mH T1 0 40040 M 10002 00108 The example above assumes that 10002 is closed timer enabled and that the value contained in register 40040 is 0 Because 40040 does not equal the timer preset 5 coil 00107 is OFF and coil 00108 is ON When 10001 is closed 40040 begins to accumulate counts at 1 s intervals until it reaches 5 Atthat point 00107 is ON and 00108 is OFF When 10002 is opened 40040 resets to 0 coil 00107 goes OFF and 00108 goes ON Note Ifthe accumulated time value is less than the timer preset val ue the bottom output will pass power even though no inpu
15. mable controller by accessing the STAT block Procedures for accessing the STAT block are described in Sections 14 4 and 14 10 the types of statistics avail able from the STAT block are described in detail in Section 14 5 14 7 for an 901 RIO network and Sections 14 11 14 13 for other 984 I O networks GM 0984 SYS Optional and Peripheral Control Devices 19 2 3 The Hot Standby Option Modules The Hot Standby capability has been designed for applications that demand fault tolerant high availability performance Two identically configured 984 con trollers communicate with each other through two Hot Standby option modules one in each controller Each controller has the HSBY loadable software function block installed in the first segment of ladder logic described in Chapter 21 2 3 1 How a Hot Standby System Functions AM R911 000 Hot Standby option modules are designed for use in a system in volving two identically configured chassis mount controllers AS S911 800 Hot Standby option modules are designed for use in a system involving two identically configured 984 680 685 780 or 785 slot mount controllers Upon powering up a 984 Hot Standby system one of the two identically confi gured 984 controllers acts as the primary controller it reads input data from re mote I O drops executes the stored user programs from memory and sends ap propriate output commands to the drops The primary controller updates the standby cont
16. ms 4 Ref Seg Drop Drop Number Type Number Sense ment Input Output Nr 1 CONTINUOUS 01 01 01 2 CONTINUOUS 02 02 02 3 CONTINUOUS 03 03 03 4 EOL A Default Order of Solve Table for a Three Segment Logic Program 112 Ladder Logic Overview GM 0984 SYS 7 10 Using the Segment Scheduler to Improve Critical I O Throughput Suppose that your logic program is three segments long and that segment 3 con tains logic that is critical to your application for example monitoring a proximity switch to verify part presence Segments 1 and 2 are running noncritical logic such as part count analysis and statistic gathering The program is running in the standard order of solve mode and you are finding that the controller is not able to read critical inputs with the frequency desired thereby causing unexceptable sys tem delay Using the segment scheduler editor you can improve the throughput for the criti cal I O at drop 3 by scheduling segment 3 to be solved two or more times in the same scan Drop 3 Drop 2 Drop 3 Drop 1 Input Input Input Input Segment 1 Segment 3 Segment 2 I Segment 3 ova Logic Networks 2 Logic Networks z Logic Networks 3 Logic Networks z Drop 3 Drop 1 Drop 3 Drop 2 Output Output Output Output lt One Scan gt By rescheduling the order of solve table you actually increase the scan time but more
17. o Moving Blocks to Tables and Tables to Blocks o Capabilities of the EMTH Block o Double Precision Math Functions o Integer Math Functions o Floating Point Arithmetic Functions o A Closed Loop Control System o The PID2 Block o Top Node Values o Middle Node Values o PID2 Error Codes o Process Square Root GM 0984 SYS 984 Enhanced Instructions 245 20 1 Moving Blocks to Tables and Tables to Blocks The block to table BLKT and table to block TBLK instructions can be thought of as functions that combine the R gt T T R instructions with the BLKM instruc tion BLKT moves large quantities of holding registers from a fixed source block to a destination block within a table TBLK moves a large number of consecutive registers from a table to a fixed destination block A BLKT or a TBLK function is accomplished in one scan They are both three node function blocks ON move source Operation completed initiated destination Error Move Hold pointer pointer not possible BLKT TBLK Reset pointer block length The top node source must be the first 4x holding register in the block to be moved The middle node is the destination pointer it is a movable 4x pointer that indicates the first register in the destination block or table The destination block itself be gins with register 4x 1 and runs to the end of the block length specified in the bottom node The bottom node indicates that t
18. parable to those in the EMTH instruction Section 20 2 Note The BLKM TBLK PID2 functions included in the loadables li brary are functionally identical to the functions of the same names de scribed in Chapter 20 The CKSM function in the loadables library is functionally identical to the function described in Chapter 18 21 10 1 MATH The MATH function performs any one of four integer math operations MATH is a three node function block Activate the MATH operand Operation operation successful result is Error invalid operand MATH function code 1 4 The top node requires either two consecutive 4x registers or one 3x register The selected operation is performed on the value held in the register s The four dif ferent operation types as specified by code number in the bottom node each has specific limits on the operand value allowed in the register s o For integer square root functions the value stored in each register cannot ex ceed 9999 permitting a maximum stored value of 99 999 999 in the 4x regis ters and a maximum stored value of 9 999 in the 3x register 312 984 Loadable Instructions GM 0984 SYS oO For process square root functions the value in the 3x or 4x register must be lt 4095 thus only one register is used Oo For logarithm functions the value stored in each register cannot exceed 9999 permitting a maximum stored value of 99 999 999 in the 4x registers and a maxim
19. 0021 RGL below 2 4x19 0022 RGL above 30 4x19 0023 Track F pointer out of range 4x20 and middle input ON 0024 Track F pointer is zero 4x20 and middle input ON 0025 Node locked out short of scan time None NOTE If lockout occurs often and the parameters are all valid increase the maxi mum number of loops scan Lockout may also occur if the counting registers in use are not cleared as required 0026 Loop counter pointer is zero 4x14 and 4x15 0027 Loop counter pointer out of range 4x14 and 4x15 Activated by maximum loop feature i e only if 4x15 p O Activated only if the track feature is ON i e the middle input of the PID2 block is receiving power while in AUTO mode 286 984 Enhanced Instructions GM 0984 SYS 20 9 A Level Control Example Here is a simplified P amp I diagram for an inlet separator in a gas processing plant There is a two phase inlet stream liquid and gas Blowdown Vent b is T Inlet Vent Plant Inlet FCV Inlet Block LT 1 Qo 4 Gas C5 PV 1 naf o ah 7 qx LT 1 4 20 mA level transmitter P 1 4 20 mA current to pneumatic converter LV 1 control valve fail CLOSED LSH 1 high level switch normally closed LSL 1 low level switch normally open LC 1 level controller P 1 M to control the flow into tank T 1 Condensat GM 0984 SYS 984 Enhanced Instructions 287
20. 10 1 ADD The ADD instruction adds value 1 to value 2 and stores the sum in a holding reg ister ADD is a three node function block ON add value value 1 1 and value 2 value 2 ADD sum M OVERFLOW sum gt 9999 The top node and middle node contain value 1 and value 2 respectively they can be CPU o Input registers 3x Oo Holding registers 4x o Decimals ranging from 1 999 in a 16 bit CPU and from 1 9999 in a 24 bit The bottom node indicates that this is an ADD function and contains a holding register 4x where the sum of the addition is stored 134 Standard Calculate Functions GM 0984 SYS 10 2 SUB The SUB instruction performs an absolute subtraction without signs of value 1 value 2 and stores the result in a holding register It can be used as a comparator identifying whether value 1 is greater than equal to or less than val ue 2 SUB is a three node function block ON value2 value 1 I value 1 gt value 2 subtracted from value 1 value 2 I value 1 value 2 SUB L value 1 lt value 2 result The top node and middle node are value 1 and value 2 respectively they can be o Decimals ranging from 1 999 in a 16 bit CPU and from 1 9999 in a 24 bit CPU o Input registers 3x o Holding registers 4x The bottom node indicates that this is a SUB function and contains a holding reg ister 4x where the result of the
21. 22 CALL function for 984 coprocessors 24 CALL loadable function 298 part numbers 292 capacities of 984 controllers 4 CKSM function in ladder logic 233 clearing bits in a DX matrix 164 closed loop control 276 CMPR function 162 coils Ox 74 as displayed in ladder logic 97 latched 124 normal 124 Index 321 common logarithm calculation in floating point 274 COMP function 160 comparison bit patterns in DX matrices 162 floating point 264 floating point and integer values 260 complementing a bit pattern 160 conditional segments as defined by seg ment scheduler 114 configuration parameters 81 configuration table 78 configurator editor 78 constant sweep 116 contacts negative transitional 121 normally closed 120 normally open 120 positive transitional 121 controller performance characteristics 4 conversion degrees to radians 271 floating point and integer values 256 261 radians to degrees 271 coprocessor option modules AM C986 004 22 AM C996 802 23 AM C996 804 23 cosine calculation in floating point 267 counters down 128 up 128 CRC 16 checksum in ladder logic 234 custom loadable function design 306 D D908 processor 66 Data Access Panel AS P965 000 18 DCTR function 128 deferred DX operations with a coprocessor option 25 298 degree to radian conversion in floating point 271 derivative control in a PID2 function 277 disable discrete values in ladder logic 125
22. If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Not Used Single Sweeps Exiting DIM AWARENESS Constant Sweep Times Exceeded Start Command Pending First Scan 184 Monitoring System Status GM 0984 SYS Word 4 Displays the status of the S901 Remote I O Processor If the bit is set to 1 then the condition is TRUE S901 Timeout S901 Bad 1 2 3 4 5 6 7 8 9J 10 11 12 13 14 15 16 Not Used RIO Error 901 Memory Failure see Legena S901 Loopback Failure RIO ERRORS 000 RIO did not respond 001 No response on loopback 010 Failed loopback data check 011 Timeout while awaiting a response 100 RIO did not accept message Word 5 Displays the controller s stop state conditions If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Peripheral Port Stop GM 0984 SYS CPU Failed Bad Config Coil Disabled in RUN Mode Logic chksm Invalid Node Invalid Traffic Cop Real Time Clock Error Watchdog
23. as an 8 digit whole num ber right justified operand 1 operand 2 and destination EMTH 4 ON operation performed successfully ON an operand out of range ON operand 2 is O The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers C 4x and 4x 1 hold the second operand value in the range 0 99 999 999 Since division by 0 is illegal a O value causes an error an error trapping rou tine sets the remaining middle node registers to 0000 and turns the bottom out put ON o 4x 2 and 4x 3 hold an eight digit result the quotient o 4x 4 and 4x 5 hold the remainder if the remainder is expressed in whole numbers it is eight digits long and both registers are used if the remainder is expressed as a decimal it is four digits long and only register 4x 4 is used GM 0984 SYS 984 Enhanced Instructions 251 20 4 Integer Math Functions Square Root ON block performs _ source L ON operation performed standard V operation successfully result ON top node value out of range EMTH 5 The top node comprises either two consecutive 4x holding registers or one 3x in put register If the source value is five to eight digits long in the range 10 000 99 999 998 it is stored in the two consecutive 4x
24. cee eee ees 78 Assigning a Battery Coil 79 Assigning a Timer Register 0 0 eee eee eee eee 79 The Time of Day Clock cece eects 79 The Traffic Cop Table 0 a eee II 82 Determining the Size of the Traffic Cop Table 05 82 Writing Data to the Traffic Cop Table ccc eee eee eee 82 Chapter 6 984 Opcode Assignments 83 Translating Ladder Logic Elements in the System Memory Database 84 Translating Logic Elements and Non DX Functions 84 Translating DX Functions in the System Memory Database 86 How the x and z Bits Are Used in 16 Bit Nodes 86 How the x and z Bits Are Used in 24 Bit Nodes 87 How the y Bits are Utilized for DX Functions 5 89 Opcode Assignments for Other Functions 000eeeeeeee 90 How to Handle Opcode Conflicts 0 0c cee eee eee 91 Extra Opcodes Available in 24 Bit CPUs cece eee eee 92 Chapter 7 Ladder Logic Overview 95 The Structure of Ladder Logic 0 0 cece eee eee ees 96 Ladder Logic Segments 0 0 c cece cece ete ees 96 Ladder Logic Networks 00 e cece eee e naaa 96 Ladder Logic Elements and Standard Instructions 98 Additional Ladder Logic Instructions 0 0 e eee e eee eee 100 DX MOVE and DX Matrix Functions
25. connected to My i e as the PID2 output varies from 0 4095 so should F vary from 0 4095 Output Clamp High The value entered in this register determines the upper limit of My this is normally 4095 282 984 Enhanced Instructions GM 0984 SYS Register Function 4x18 Output Clamp Low The value entered in this register determines the lower limit of My this is normally 0 4x19 Rate Gain Limit RGL Constant The value entered in this register determines the effective degree of derivative filtering the range is from 2 30 the smaller the value the more filtering takes place 4x20 Pointer to Track Input The value entered in this register points to the holding register containing the track input T value drop the 4 from the tracking register and enter the remaining four digits in register 4x20 the value in the T register is connected to the input of the integral lag whenever the auto bit and track bit are both true GM 0984 SYS 984 Enhanced Instructions 283 Middle Node Register Function 4x Loop Status Register Twelve of the 16 bits in this register are used to define loop status 1 2 3 4 6 7 8 9 10 11 12 13 14 15 16 Integral ape Windup NOTE Integral Wind up Limit Negative Values _ in the equation Bottom Input Status direct reverse acting Middle Input Status tracking mode Top Input Status Rev B or higher M
26. discrete inputs 1x 74 discrete outputs Ox 74 distributed control processing 66 distributed control processors AS D908 110 27 AS D908 120 27 322 Index DIV function 137 division floating point 263 floating point and integer values 258 259 integer 137 DMTH loadable function part number 293 double precision addition using DMTH 314 using EMTH 249 double precision division using DMTH 315 using EMTH 251 double precision multiplication using DMTH 315 using EMTH 250 double precision subtraction using DMTH 314 using EMTH 249 DRUM loadable function 308 part numbers 293 E E See error measurement EARS loadable function 317 EARS loadable function block part num bers 293 EMTH functional listing 248 overview 247 environment for programming 984 custom loadables 307 error measurement in a PID2 function 276 event alarm warning system 317 examples a default segment scheduler 111 a Modbus Il sample layout 65 a Modbus Plus sample layout 63 a scan time evaluation circuit 106 CMPR matrix function 163 COMP matrix function 161 components of scan time 104 Fahrenheit to Centigrade conversion 139 ideal throughput 108 momentary pushbutton switch 120 one second timer 131 real time clock 132 recipe storage 153 reporting current system status 167 searching for bit values 151 simple table averaging 168 GM 0984 SYS skipping nodes in a network 207 standard division 138 subroutine in lad
27. gt Logic Solve Time 7 6 2 I O Servicing In order to optimize system throughput the 984 control architecture coordinates the solution of ladder logic segments by the controller s CPU with the servicing of I O drops by the controller s I O processor Typically a particular logic segment is coordinated with a particular I O drop for example the logic networks in segment 2 correspond to the real world I O points at drop 2 Inputs are read during the pre vious segment and outputs are written during the subsequent segment This method of I O servicing assures that the most recent input status is available for logic solve and that outputs are written as soon as possible after logic solve 104 Ladder Logic Overview GM 0984 SYS It ensures predictability between the 984 controller and the process it is control ling Drop 2 Input Input Input Segment 1 Segment 2 l Segment 3 l Logic Networks s Logic Networks Logic Networks 2 OVHD Drop 2 Output Output Output r One Scan __ Time to Service I O Drop 2 7 6 3 Overhead An intersegment transfer occurs between each segment at which time data are exchanged between the I O processor and the state RAM previous inputs are transferred to state RAM and the next outputs are transferred to the I O processor The logic scan and I O servicing for each
28. m How the System Protects Volatile Memory u The Configuration Table m The Traffic Cop Table Q Loadable Function Storage m User Logic Q Executive Firmware GM 0984 SYS 984 Memory Allocation 71 5 1 User Memory User memory is the space provided in the controller for your logic program and for system overhead Optional user memory sizes varying from 1 5K 64K words are available depending on controller type and model Each word in user memory is stored on page 0 in the controller s memory structure words may be either 16 or 24 bits long depending on the controller s CPU size A page 0 A A A CKSM Diagnostics Configuration Table Loadables Traffic Cop Segment Scheduler 129 words Overhead STAT Block Tables up to 277 words System Diagnostics Approximately 888 Words User x Y Logic User Application Program 5 1 1 System Overhead System overhead comprises a set of tables that define the system s size struc ture and status Some tables in system overhead have a predetermined amount of memory space allocated to them for example the configuration table always contains 128 words and the order of solve table or segment scheduler always contains 129 words Other tables such as the traffic cop may consume a large but nonpredetermined amount of memory Optional pieces of system overhead such as a loadables table may or may not consume memory depending o
29. put the READ WRIT function continues from where it was interrupted unless there has been some communication at the port during the pause If there has been communication the message transaction starts at the beginning When the bottom input receives power the READ WRIT function is aborted The middle output error condition detected passes power for one scan then loads the four most significant bits of the register specified in the top node with error code 6 user initiated abort To restart an ASCII READ WRIT function after an abort the top input must be cycled from low to high GM 0984 SYS ASCII READ WRITE Functions 175 13 5 ASCII Error Status When an ASCII message is aborted because of a communication error an error code gets stored in the 984 To retrieve the error code for an aborted ASCII block use your programming panel or DAP to display the contents of the register holding the error word To retrieve an aborted READ block go to the first register of the source node to retrieve an aborted WRIT block go to the first register of the des tination node 15 14 13 12 1110 9 8 7 6 5 4 3 2 1 0 Port Number assigned J812 J892 Drop Error Controller Error to each ASCII block range 1 32 Bits 15 12 Controller Error HEX 1 An error has been detected in the input to the RIO int
30. setpoint in a PID2 function 276 setting a bit in a DX matrix 164 SFC 10 shorts horizontal 122 vertical 122 sine calculation in floating point 266 single sweep 117 skipping networks in ladder logic 206 SKP function 206 software media for industry standard computers 17 for MODSOFT 17 for P190 17 for P230 16 SP See setpoint square root floating point 264 square root calculation using EMTH 252 using MATH 312 SRCH function 150 STAT function 180 state RAM minimum configuration 77 state RAM capacities of 984 controllers 5 SUB function 135 subroutines in ladder logic 238 subtraction floating point 262 floating point and integer values 257 259 integer 135 sweep functions 116 system overhead in user memory 72 System status how the STAT block works 180 326 Index 1 T 01 function 130 T0 1 function 130 T1 0 function 130 table to register move 144 table to table move 146 tangent calculation in floating point 268 TBLK function 246 terminating connectors for Modbus Plus 61 throughput 108 time of day clock assignment in the confi gurator 79 timer register assignment in the configura tor 79 timers 130 TOD assignment in the configurator 79 traffic cop table 82 types of 984 controllers 4 U UCTR function 128 user logic in user memory 73 user logic sizes 5 user memory 72 CMOS RAM storage 73 WwW W911 cable for hot standby systems 21 watchdog tim
31. 0 99 999 999 Oo 4x 2 indicates whether an overflow condition exists 1 overflow o 4x 3 and 4x 4 hold the double precision addition result g 4x 5is not used in this calculation but must exist in state RAM Double Precision Subtraction ON operand 2 subtracted operand 1 ON operand 1 gt operand 2 from operand 1 and abso lute value placed in desig nated registers operand 2 ON operand 1 operand 2 and destination DMTH ON operand 1 lt operand 2 2 The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers Oo 4x and 4x 1 hold the second operand value in the range 0 99 999 999 Oo 4x 2 and 4x 3 hold the double precision subtraction result o 4x 4 indicates whether the operands are in the valid range 1 out of range and 0 in range Oo 4x 5 is not used in this calculation but must exist in state RAM 314 984 Loadable Instructions GM 0984 SYS Double Precision Multiplication ON operand 1 multiplied by operand 1 ON operation performed operand 2 and result placed successfully in designated registers operand 2 ON an operand is out of and destination range DMTH 3 The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9
32. 00001100 oC Nonretentive coil 01101 00001101 oD Retentive coil 01110 00001110 0E Constant quantity skip function 01111 00001111 OF Register quantity skip function 10000 00010000 10 Constant value storage 10001 00010001 11 Register reference 10010 00010010 12 Discrete group reference 10011 00010011 13 Down counter DCTR function 10100 00010100 14 Up counter UCTR function 10101 00010101 15 One second timer T1 0 function 10110 00010110 16 0 1 second timer T0 1 function 10111 00010111 17 0 01 second timer T 01 function 11000 00011000 18 Add ADD math function 11001 00011001 19 Subtract SUB math function 11010 00011010 1A Multiply MULT math function 11011 00011011 1B Divide DIV math function Note The opcodes for these standard ladder logic elements and in GM 0984 SYS structions are hard coded in the system firmware and they cannot be altered 984 Opcode Assignments 85 6 2 Translating DX Functions in the System Memory Database 6 2 1 How the x and z Bits Are Used in 16 Bit Nodes When you are using a 16 bit CPU you are left with only four more x bit combina tions 11100 11101 11110 and 11111 with which to express opcodes for 18 DX functions To gain the necessary bit values the system uses the three least sig nificant z bits along with the x bits to express the opcodes 16 Bit Node Format for DX Functions
33. 16 transactions simulta neously Transactions include incoming unsolicited messages as well as out going MBUS PEER messages Thus the number of MBUS PEER message initiations a controller can manage at any time is 16 4 of incoming messages A transaction cannot be initiated unless the S975 has enough resources for the entire transaction to be performed Once a transaction has been initiated it runs until a reply is received an error is detected or a timeout occurs A second trans action cannot be started in the same scan that the previous transaction completes unless the middle input is ON a second transaction cannot be initiated by the same MBUS PEER block until the first transaction has completed 21 6 1 MBUS MBUS is a three node function block Enable an i MBUS controlblock Transaction complete transaction Repeat transaction data block Transaction in progress or new Msama sgan transaction starting MBUS Reset number of clears system words reserved Error detected in transaction statistics for data block The top node is the first of seven 4x registers in the MBUS control block 300 984 Loadable Instructions GM 0984 SYS Control Block Register Function 4x Address of destination device range O 246 4x 1 Not used 4x 2 Function code for requested action 01 Read discretes 02 Read registers 03 Write discrete outputs 04 Write register outputs 255 Get system s
34. 2 3 4 5 6 7 8 9J 10 11 12 13 14 15 16 Not Used Single Sweeps Exiting DIM AWARENESS Constant Sweep Times Exceeded Start Command Pending First Scan Word 4 Displays the status of the I O processor in the 984 controller If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Not Used I O Error IOP Memory Failure 000 1 0 did not respond 001 No response on loopback IOP Loopback Failure 010 Failed loopback data check IOP Timeout 011 Timeout while awaiting a IOP Bad response GM 0984 SYS 100 I O did not accept message Monitoring System Status 195 Word 5 Displays the controller s stop state conditions If the bit is set to 1 then the condition is TRUE CPU Logic Solver Failed for chassis mount _ IOP Failure controllers or Coil Use Table for other controllers Invalid Node If the bit 1 in a chassis mount controller the r Logic chksm internal diagnostics have detected a CPU fail Ani ni ure If the bit 1 in any controller other than a Coi Disabled n chassis mount then the Coil Use table does Mod not match the coils in user logic Bad Config 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Rea
35. 22 are cleared Modbus Plus Network Statistics Word Byte Meaning 00 Node type I D Unknown node type Standard programmable controller node Bridge MUX Host Bridge Plus Peer I O akWwWOnN Oo 01 Communications processor version First release is version 1 00 and displays as 0100 hex 02 Network address for this station 03 MAC state variable 0 Power up state 1 Monitor offline state 2 Duplicate offline state 3 Idle state 4 Use token state 5 Work response state 6 Pass token state 7 Solicit response state 8 Check pass state 9 Claim token state 10 Claim response state 04 Peer status LED code provides status of this unit relative to the network 0 Monitor link operation 32 Normal link operation 64 Never getting token 96 Sole station 128 Duplicate station continued on next page GM 0984 SYS Modbus Plus Master Function 229 Modbus Plus Network Statistics continued Word Byte Meaning 05 Token pass counter increments each time this station gets the token 06 Token rotation time in ms 07 LO Data master failed during token ownership bit map HI Program master failed during token ownership bit map 08 LO Data master token owner work bit map HI Program master token owner work bit map 09 LO Data slave token owner work bit map HI Program slave token owner work bit map 10 LO Data master get master response transfer request bit map HI Data slave get slave command transfer request bit map 11 LO Program mas
36. 256 any mix 1L 984 145 Compact 4 25 16 bits 8K 1920 2048 any mix 512 in 512 out 512 in 512 out 256 any mix 1L 984 130 Compact 4 25 16 bits 4K 1920 2048 any mix 512 in 512 out 512 in 512 out 256 any mix 1L 984 120 Compact 4 25 16 bits 1 5K 1920 2048 any mix 512 in 512 out 512 in 512 out 256 any mix 1L Micro 984 Micro 5 0 16 bits 4K 1920 2048 any mix 64 in 64 out 64 in 64 out 112 any mix 1L 112 total 112 total The 984B offers extended memory XMEM in 32K 64K and 96K sizes total memory can be up to 128K with up to 64K devoted to user logic UL e 32K 32K UL 64K 64K UL or 32K UL 32K XMEM 96K 32K UL 64K XMEM or 64K UL 32K XMEM 128K 32K UL 96K XMEM or 64K UL 64K XMEM Approximately 1K words of user logic are used for system overhead utilizes one word node for user logic e g a normally open contact uses one word of user logic memory R Remote L Local State RAM in these 24 bit CPUs may be allocated as 8192 discrete I O 9999 registers or as 8192 discrete in 8192 discrete out 8500 registers A096 registers are available if you use an Extended Register cartridge AS E685 914 or AS E680 914 otherwise 1920 registers are available 1 3 How a 984 System Provides Application Control A 984 programmable controller is a special purpose computer with digital processing capabilities designed for real time control in industrial and manufactur ing applications In essence a programm
37. 32K words 64K words and 96K words Each 6x register uses one word of extended memory The total memory available may be up to 128K words with either 32K words or 64K words allocated for user logic memory so that oO A 984B with 32K words of memory has no extended memory o A 984B with 64K words of memory may use all 64K for user logic or 32K of user logic and 32K words of extended memory o A 984B with 96K words of memory may use 32K for user logic and 64K for ex tended memory or 64K for user logic and 32K for extended memory a A 984 with 128K words of memory may use 32K for user logic and 96K for ex tended memory or 64K for user logic and 64K for extended memory 210 Extended Memory Capabilities GM 0984 SYS 16 2 How Extended Memory Is Stored in User Memory Extended Memory consists of a bank of memory registers located on pages 1 3 in system memory these registers may be used as mass storage area for 984 holding registers or as a buffer for input registers You can store additional state RAM data not being used in a particular application here lt 16 bits gt Z page F P paged Executive PROM Extended Memory page 2 IOP Address Space Extended Memory page 1 Optional User Logic or fee Extended Memory State RAM P 24 ZI page 0 User Logic Executive Scratchpad ASCII Message Table Loadable Instructions 16 bits Traffic Cop Table Se
38. 38 046 26 amp 39 047 27 40 050 28 41 051 29 42 052 2A 43 053 2B 44 054 2C 45 055 2D 46 056 2E 47 057 2F 48 060 30 0 49 061 31 1 50 062 32 2 51 063 33 3 52 064 34 4 53 065 35 5 54 066 36 6 55 067 37 7 56 070 38 8 57 071 39 9 58 072 3A 59 073 3B 60 074 3C 61 075 3D 62 076 3E gt 63 077 3F Dec Octal Hex Symbol 64 100 40 65 101 41 A 66 102 42 B 67 103 43 C 68 104 44 D 69 105 45 E 70 106 46 F 71 107 47 G 72 110 48 H 73 111 49 l 74 112 4A J 75 113 4B K 76 114 4C L 77 115 4D M 78 116 4E N 79 117 4F O 80 120 50 P 81 121 51 Q 82 122 52 R 83 123 53 S 84 124 54 T 85 125 55 U 86 126 56 V 87 127 57 W 88 130 58 X 89 131 59 Y 90 132 5A Z 91 133 5B 92 134 50 93 135 5D 94 136 5E A 95 137 5F 96 140 60 f 97 141 61 a 98 142 62 b 99 143 63 c 100 144 64 d 101 145 65 e 102 146 66 f 103 147 67 g 104 150 68 h 105 151 69 i 106 152 6A j 107 153 6B k 108 154 6C l 109 155 6D m 110 156 6E n 111 157 6F o 112 160 70 p 113 161 71 q 114 162 72 r 115 163 73 S 116 164 74 t 117 165 75 u 118 166 76 V 119 167 7T w 120 170 78 x 121 171 79 y 122 172 7A Z 123 173 7B 124 174 7C 125 175 7D 126 176 7E 197 177 7F DEL delete Chapter 14 Monitoring System Status m The STAT Function Q Troubleshooting with the STAT Function u Accessing Status Registers from Your Programming Panel m Accessing Status Registers with a DAP u
39. 7 The ASCII device is off line it has been turned off disconnected put into off line operation or has activated normal handshaking Check the cabling to the device 6 An ASCII message has terminated early keyboard mode only GM 0984 SYS ASCII READ WRITE Functions 177 ASCII Character Code Chart Dec Octal Hex Name 0 000 00 NUL null 1 001 01 SOH start of heading 2 002 02 STX start of text 3 003 03 ETX end of text 4 004 04 EOT end of transmission 5 005 05 ENQ enquiry 6 006 06 ACK acknowledge 7 007 07 BEL bell or audio tone 8 010 08 BS backspace 9 011 09 HT horizontal tab 10 012 0A LF line feed 11 013 OB VT vertical tab 12 014 oc FF form feed 13 015 oD CR carriage return 14 016 0E SO shift out red ribbon 15 017 OF SI shift in black ribbon 16 020 10 DLE data link escape 17 021 11 DC1 device control 1 X ON 18 022 12 DC2 device control 2 aux ON 19 023 13 DC3 device control 3 X OFF 20 024 14 DCA device control 4 aux OFF 21 025 15 NAK negative acknowledge error 22 026 16 SYN synchronous file 23 027 17 ETB end of transmission block 24 030 18 CAN cancel 25 031 19 EM end of medium 26 032 1A SUB substitute 27 033 1B ESC escape 28 034 1C FS file separator 29 035 1D GS group separator 30 036 1E RS record separator 31 037 1F US unit separator 32 040 20 SP space 33 041 21 34 042 22 K 35 043 23 36 044 24 37 045 25
40. Dec 16 Dec 91 Dec 9 Dec 25 Dec 30 Dec GM 0984 SYS Configuration Data Overview Data Default Notes and Type Format Setting Exceptions Configuration Size of coils Even multiple of 16 16 of discrete inputs Even multiple of 16 16 of register outputs 01 of register inputs 01 of I O drops Up to 32 depending on controller type 01 Used only when I O is configured in drops of I O modules Up to 1024 depending on controller type 00 Not displayed by editor used by system to calculate Traffic Cop words of logic segments Generally equal to of drops 00 Add one additional segment for subroutines of I O channels Even number from 02 32 02 Used only when I O is configured in channels Memory size 32K or 64K 32K 64K can be used only on a 984B Controller Modbus RS 232C Port Parameters Communication mode ASCII or RTU RTU Baud rate 50 75 110 134 5 150 300 600 1200 1800 2000 2400 3600 4800 7200 9600 19200 9600 Parity ON OFF EVEN ODD ON EVEN Stop bit s 1or2 2 Device addresss 001 247 001 Delay time in ms 01 20 representing 10 200 ms 01 10 ms ASCII Message Table of messages Up to 9999 00 If your controller doesn t support remote I O Size of message area Decimal gt 0 difference between mem it cannot support ASCII devices ory size 82K or 64K and sys overhead 1 word 2 ASCII characters 00 of ASCII ports Two per drop up to 32 00 ASCII port parameters Baud rate 1200 Parity ON EV
41. Length Write number of registers to be sent to slave Read number of registers to be read from slave 4x 3 Slave device Specifies starting 4x register in the slave to be data area read from or written to 1 40001 49 40049 4x 4 4 5 Routing 1 2 3 Designates the first through fifith routing path 6 7 8 4 5 addresses respectively the last nonzero byte in the routing path is the destination device If you attempt to program the MSTR function to Read or Write its own station ad dress an error will be generated in the second register of the MSTR control block It is possible to attempt a Read Write operation to a nonexistent register in the slave device The slave will detect this condition and report it this may take sev eral scans Note You need to understand Modbus Plus routing path procedures before programming an MSTR block A full discussion of routing path structures is given in Modbus Plus Network Planning and Installa tion Guide GM MBPL 001 222 Modbus Plus Master Function GM 0984 SYS 17 4 Get Local Statistics MSTR Function The Get local statistics function obtains operational information related to the local node where the MSTR function has been programmed This operation takes one scan to complete and does not require a data master transaction path 17 4 1 Control Block Utilization The contents of the first four registers in the top node of the MSTR block are used when you implement a Get local sta
42. ON depending on power flow in the logic program When a coil is ON it may either pass power to a discrete output circuit on the shop floor or change the state of an internal relay contact in state RAM There are two types of coils Normal Coil A normal coil is turned OFF if power at the controller is removed Latched Coil If a latched coil has been energized at the time of a controller power loss the coil will come back up in the same state for one scan once power has been restored Physical Ladder Physical Input Logic Output iN 1 Input Output 2 aet 10001 Module E Module 00001 E 10001 00001 Closing the Turns ON Pushbutton the Light 124 Contacts Shorts and Coils GM 0984 SYS 8 3 1 Coils in a Logic Network Each network can contain a maximum of seven coils Each Ox reference number can be used as a coil only once but it can be referenced to any number of relay contacts 8 3 2 Enable Disable Capabilities for Discrete Values Via panel software you may disable a logic coil or a discrete input in your logic program A disable condition will cause the input field device to have no control over its assigned 1x logic and the logic to have no control over the disabled Ox value The MEMORY PROTECT switch on your 984 controller must be OFF before you disable or enable a coil or a discrete input A Caution There is an important exception you need to be aware o
43. Slot 7 Slot 6 Slot 5 Slot 4 Slot 3 Slot 2 Slot 1 188 Monitoring System Status GM 0984 SYS If a specified slot is inhibited in the traffic cop the bit is O If the slot contains an input module or an input output module the bit is 1 If the slot contains an output module and the module s COMM ACTIVE LED is ON the bit is 0 if slot contains an output module and the module s COMM ACTIVE LED is OFF the bit is 1 Note These indicators are valid only when scan time gt 30 ms GM 0984 SYS Monitoring System Status 189 14 7 901 RIO Communication Status Words RIO system communication status is given in words 44 75 Two words are used to describe each of up to 16 drops If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9J 10 11 12 13 14 15 16 L l l Busy 1 Send Sequence Cable B Receive Sequence Busy 0 Not Used Current Message Not Supported Byte Count Underrun Sequence Number Invalid Function Scheduled 000 Normal I O 001 Restart Comm Reset 010 Restart Application Reset 011 is unassigned 100 Inhibit 101 unassigned 110 unassigned 111 unassigned If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8j 9 10 11 12 13 14 15 16
44. The P965 Data Access Panel si pire tori ramita ride daai ba enses Physical Design cet a pea eee ER How the P965 Can Be Used 0 cc cece tees The Hot Standby Option Modules 000 c cece e eee teens How a Hot Standby System Functions 000cee eee eee Controller Compatibilities 0 eee eee The Coprocessing Option Modules 0 cece eee eee ees The C986 Copro for Chassis Mount 984s 000 00 cece eee The C996 Copros for Slot Mount 984S seules Enhancing Your Processing Environment with a Copro Application Mode csse cede RS Rel eR e RE Ad ER HERI ER Immediate DX Processing sssseseeee teens Deferred DX Processing ee tak ba bie ee aye e va Optional Communication Modules 0 0c cece eee eee GM 0984 SYS Table of Contents vi Modbus Modems et exe RE decade Mc PER weer ad 26 Modbus II Modu les 31e RR RED dE EY a wd 26 The Modbus Plus Options 0 eee 27 The Distributed Communications Option 0 0 0 27 Chapter 3 984 I O Subsystems 29 l O Subsystetms eue tete bETE UR GU EEIeraT ERES 30 Input and Output Modules sssssseeeeee nn 30 VO Module Types v 23 nere eene ere ee ak Hans 30 Local and Remote I O 0 iaa eee eect eens 31 Locall Qt seines idmere ds teorie dete oa s gg dye turis 32 Remote l O iius teen ven dena tre e vc CRY RR 33
45. The Status Table m Controller Status m I O Module Health Status Q I O Communication Status GM 0984 SYS Monitoring System Status 179 14 1 The STAT Function The STAT instruction lets you access the 984 status table in system memory here vital system diagnostic information is written into a table of registers or discretes as specified in the destination node This information includes a Controller status o Possible error conditions in the I O modules r1 Input to controller to output communication status STAT is a two node function block ON access destination Operation completed status table STAT table length The top destination node where the first word of system status is written may be rj The first Ox in a table of discrete output references o The first 4x in a table of holding registers A Caution We recommend that you do not use discretes in the STAT destination node because of the excessive number required to contain status information The bottom node indicates that this is a STAT function and specifies the number of registers in the table where status information will be written The table length ranges from 1 75 for controllers using the S901 RIO protocol and 1 277 for controllers using the S908 protocol The table length that can actually be read by the STAT block depends on the addressing capabilities of the controller a 16 bit CPU can access only up to the fi
46. The traffic cop table provides that link 5 5 1 Determining the Size of the Traffic Cop Table The traffic cop directs data flow between the input output signals and the user log ic program it tells the controller how to implement inputs in user logic and pro vides a pathway down which to send signals to the output modules The traffic cop table which is stored on page 0 in system memory consumes a large but not predetermined amount of system overhead Its length is a function of the number of discrete and register I O points your system has implemented and is defined by the type of I O modules you specify in the configuration table The minimum al lowable size of the traffic cop table is nine words 5 5 2 Writing Data to the Traffic Cop Table With your programming panel software you can access a traffic cop editor that al lows you to define oO The number of drops in the 984 I O system Oo The number of discretes registers that may be used for input and output t The number type and slot location of the I O modules in the drop o The reference numbers that link the discretes registers to the I O modules o Drop hold up time for each I O drop o ASCII port addresses if used for any drop 82 984 Memory Allocation GM 0984 SYS Chapter 6 984 Opcode Assignments o Translating Ladder Logic Elements in the System Memory Database o Translating DX Functions in the System Memory Database o Opcode Assignments for Other Funct
47. Timer Expired No End Of Logic State RAM Test Failed Start of Node Did Not Start Segment Segment Scheduler Invalid Illegal Peripheral Intervention Controller in DIM AWARENESS Extended Memory Parity Error Monitoring System Status 185 Word 6 Displays the number of logic segments 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Number of Segments expressed as a binary number Word 7 Displays the end of logic EOL pointer 1 2 3 4 5 6 7 8 9J 10 11 12 13 14 15 16 EOL Pointer Word 8 Holds a RIO redundancy flag and displays an RIO timeout constant 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RIO Redundancy Flag RIO Timeout Constant Word 9 Displays the ASCII message status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 67 8 9 10 11 12 13 14 15 16 Mismatch Between Number of Messages and Pointers Invalid Message Pointer Invalid Message Message Chksm Error 186 Monitoring System Status GM 0984 SYS Word 10 Uses its two most significant bits to display the RUN load
48. Used Not Used 0 Swap Modbus port 1 address during switchover 1 Do not swap Modbus port 1 address during switchover 0 Swap Modbus port 2 address during switchover 1 Do not swap Modbus port 2 address during switchover 0 Swap Modbus port 3 address during switchover 1 Do not swap Modbus port 3 address during switchover The middle node is a 4x register that is the first register in the nontransfer area in state RAM The first three registers in the nontransfer area are special registers 4x and 4x 1 are the reverse transfer registers for passing information from the standby to the primary controller and 4x 2 is the HSBY status register The total size of the nontransfer area is specified in the bottom node The bottom node indicates that this is an HSBY function and defines the size of the nontransfer area in state RAM The nontransfer area must contain at least four registers In a 16 bit CPU the size may range from 4 255 registers in 24 bit CPUs the size may range from 4 8000 registers GM 0984 SYS 984 Loadable Instructions 295 21 3 The HSBY Status Register The HSBY status register register 4x 2 in the nontransfer area specified in the middle node of the block contains six bits that describe the current status of the primary and standby controllers attached to is in primary standby or OFFLINE mode programs tached
49. actually integrates the difference of the output and the integral sum this is effectively the same as integrating the error GM 0984 SYS 984 Enhanced Instructions 279 20 8 PID2 The PID2 instruction implements an algorithm that performs proportional inte gral derivative operations PID2 is a three node function block 0 Manual Mode Either invalid user parameter or 1 Auto mode Source Loop ACTIVE but not being solved 0 Tracking OFF destination PV gt high alarm limit 1 Tracking ON 0 Output increases as E increases PID2 1 Output decreases PV gt low alarm limit as E increases solution interval The top source node indicates the first of 21 consecutive holding registers ranging from 4x0 4x20 The contents of registers 4x5 4x6 4x7 and 4x8 in the top node determine whether the operation will be P PI or PID Function 4x5 4x6 4x7 4x8 P v v PI v v PID v v v Y A non zero value within the permissible range The middle node contains nine additional holding registers 4x 4x 8 which are used by the PID2 block for calculations You do not need to load anything into these registers The bottom node indicates that this is a PID2 function and contains a number ranging from 1 255 indicating how often the function should be performed The number represents a time value in tenths of a second for example the number 17 indicates that the PID function should be performed
50. an error or value out of range EMTH The top node is a single 4x holding register or 3x input register The source value stored here is in the fixed decimal format 1 234 and must be in the range 0 7 999 the largest antilog value that can be calculated is 99770006 The result is stored in two consecutive 4x holding registers in the middle node in the fixed decimal format 12345678 where the most significant bits are in 4x and the least significant bits are in 4x 1 254 984 Enhanced Instructions GM 0984 SYS 20 5 Floating Point Arithmetic Functions To make use of the FP capability the standard four digit integer values used in standard 984 instructions must be converted to the IEEE floating point format All calculations are then performed in FP format and the results must be converted back to integer format 20 5 4 The IEEE Floating Point Standard EMTH floating point functions require values in 32 bit IEEE floating point format Each value has two registers assigned to it the eight most significant bits repre senting the exponent and the other 23 bits plus one assumed bit representing the mantissa and the sign of the value It is virtually impossible to recognize an FP representation on the programming panel Therefore all numbers should be converted back to integer format before you attempt to read them 20 5 2 Dealing with Negative Floating Point Numbers Standard 984 integer math does not handle negative nu
51. and immediate DX processing Up to ten tasks can be supported In deferred DX mode DX processing begins with a call and continues until it is fin ished even if its processing runs longer than one scan A typical deferred DX function might be reading bar code input to a serial port 984 CPU COPRO gt How the C986 Copro Handles Deferred DX Processing GM 0984 SYS Optional and Peripheral Control Devices 25 2 6 Optional Communication Modules 984 Controllers may be interconnected in various kinds of local area and in some cases long distance networks The following 984 controller option modules that allow you to establish the network connections are described here overall net working capabilities are described in more detail in Chapter 4 2 6 1 Modbus Modems The AM S978 000 Dual Modbus Modem is an option module that allows a chassis mount 984 controller to be used as a slave processor in a Modbus network The AS J878 000 is an option module that provides similar capability in a slot mount 984 controller These Modbus modems allow you to create Modbus networks up to 15 000 ft 4572 m long and comprising up to 247 slave nodes These modems are electrically compatible with all Modbus products and are sized to fit in one slot in a 984 chassis in the case of the S978 and in an 800 Series I O primary housing in the case of the J878 The S978 module contains two mo dems which are connected via cable to Modbus port
52. are not used 4x 2 and 4x 3 contain the integer result of the conversion This value should be the largest integer value possible that is the FP value for example the FP value 3 5 is converted to the integer value 3 while the FP value 3 5 is converted to the integer value 4 Note Ifthe resultant integer is too large for 984 double precision inte ger format gt 99 999 999 the conversion still occurs but an error is logged in EMTH function 38 Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used GM 0984 SYS 984 Enhanced Instructions 261 FP Addition ON block performs FP value1 ON operation performed FP addition successfully FP value 2 and sum EMTH 18 The top node comprises two consecutive 4x registers that contain one FP value The middle node contains four consecutive 4x registers registers 4x and 4x 1 contain a second FP value 4x 2 and 4x 3 contain the FP sum of the addition FP Subtraction ON block subtracts FP value1 ON operation performed FP value 2 from FP successfully value 1 FP value 2 and difference EMTH 19 The top node comprises two consecutive 4x registers that contain one FP value The middle node contains four consecutive 4x registers registers 4x and 4x 1 contain a second FP value which will be
53. benchmarks Event A where the inputs from drop 3 are available to the I O processor Event B where the I O processor transfers data to state RAM Event C where the segment 3 logic networks which correspond to drop 3 1 0 are solved Event D where data are transferred from state RAM to the I O processor Event E where the output data are written to the output modules at drop 3 110 Ladder Logic Overview GM 0984 SYS 7 9 The Order of Solve You specify the number of segments and I O drops with the configurator editor in your panel software package The default order of solve condition is segment 01 through segment nn consecutively and continuously once per scan with the cor responding I O drops serviced in like order You are able to change the order of solve using the segment scheduler editor in your panel software package There may be times when you can modify the order of solve to improve overall system performance The segment scheduler can be used effectively to Oo Improve throughput for critical I O oO Improve overall system performance oO Optimize the servicing of communication ports GM 0984 SYS Ladder Logic Overview 111 Here is what a standard order of solve table might look like as seen in the MODSOFT segment scheduler editor Service Comm Insert Delete CnstSwp MinScan Quit F1 F2 F3 F4 F5 F6 E7 F8 F9 L SEGMENT SCHEDULER Number of Drops 3 Min Register Constant Sweep OFF Scan Time
54. byte 984 Loadable Instructions 305 21 8 Designing Custom Loadable Functions Modicon offers a custom loadable software package SW AP98 GDA that allows you to design your own function blocks for operation with slot mount controllers The operational unit for the custom loadable support software is a three node block FNxx the package allows you to create up to 99 unique FNxx blocks Within each block you may design a large number of subfunctions up to 8192 Top input _ subfunction Top out required ID number put optional first register Middle input in subfunction Middle output optional table optional Bottom input FNxx __ Bottom output optional table length optional The top node may be either a 4x holding register or a constant value it is used to identify a subfunction ID number Valid ID numbers range from O 9999 and as many as 8192 different subfunctions may be designed within a block When multi ple subfunctions are designed within an FNxx block each subfunction within the block must have a unique ID number but those numbers do not have to be con secutive The middle node is the first 4x register in a table of registers to be used by the subfunction The table may be used to pass data to the subfunction and store re sults The table format may be customized for your requirements and each sub function developed within the function block may have its own format The botto
55. contain a RET block either a LAB block or the end of log ic whichever comes first serves as the default return from the subroutine GM 0984 SYS Ladder Logic Subroutines 241 19 5 A Subroutine Example The example below shows a series of three user logic networks the last of which is used for an up counting subroutine Segment 3 has been removed from the or der of solve table in the segment scheduler Scheduled Logic Flow Segment 001 Network 00001 Network 00002 000014 JSR 10001 00001 Segment 002 Network 00001 i LL E N Subroutine Segment Segment 003 Network 00001 RET LAB 40256 40256 gt 00001 00001 40256 ADD SUB 40256 40256 40257 00010 SUB 00001 40999 JSR 00001 00001 7 242 Ladder Logic Subroutines GM 0984 SYS When input 10001 to the JSR block in network 2 of segment 1 transitions from OFF to ON the logic scan jumps to subroutine 1 in network 1 of segment 3 The subroutine will internally loop on itself ten times counted by the ADD block The first nine loops end with the JSR block in the subroutine network 1 of seg ment 3 sending the scan back to the LAB block Upon completion of the tenth loop the RET block sends the logic scan back to the scheduled logic at the JSR node in network 2 of segment 1
56. debug status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Debug 0 0 Run O 1 Load 1 0 Word 11 Displays the address of the table of status word pointers 1 23 4 5 6 7 8 9J 10 11 12 13 14 15 16 Pointer to the Table of Status Word Pointers GM 0984 SYS Monitoring System Status 187 14 6 901 I O Module Health Status Words Words 12 43 display the health of the I O modules in the odd and even channels 12 Channel 1 Input Channel 2 Input oc 13 Channel 3 Input Channel 4 Input oD 14 Channel 5 Input Channel 6 Input 0E 26 Channel 29 Input Channel 30 Input 1B 27 Channel 31 Input Channel 32 Input 1C 28 Channel 1 Output Channel 2 Output 1D 29 Channel 3 Output Channel 4 Output 1E 30 Channel 5 Output Channel 6 Output 1F 42 Channel 29 Output Channel 30 Output 2A 43 Channel 31 Output Channel 32 Output 2B Each of these 32 status words is organized as follows r Odd Channels gt lt Even Channels gt 1 23 4 5 7 8 10 11 12 13 14 15 16 Slot 8 Slot 7 Slot 6 Slot 5 Slot 4 Slot 3 Slot 2 Slot 1 Slot 8
57. far 4x 4 status of solve 4x 5 unassigned 4x 6 checksum of registers O 5 170 ASCII READ WRITE Functions GM 0984 SYS The destination register in the middle node is the first in a table of 4x holding registers whose length is determined by the value in the bottom node Variable data in a READ message are written into this table Consider this READ message please enter password AAAAAAAAAA Embedded Text Variable Data Note An ASCII READ message may contain the embedded text placed inside quotation marks as well as the variable data in the for mat statement i e the ASCII message The 10 character ASCII field AAAAAAAAAA is the variable data field variable data must be entered via an ASCII input device The bottom node indicates that this is an ASCII READ function and it contains a number specifying ength of the destination table Table length may range from 1 255 in a 16 bit CPU and from 1 999 in a 24 bit CPU GM 0984 SYS ASCII READ WRITE Functions 171 13 2 WRIT The WRIT instruction provides the ability to send a message from the 984 control ler over the RIO communications link to an ASCII device WRIT is a three node function block Activates WRIT Source m Block active ASCII Power pauses WRIT control block Error condition detected function for one scan Power aborts WRIT WRIT function table length WRIT complete for one scan A Caution Make sure that
58. followed by end delimiter Receive frames too long Discarded frames because there is no receive buffer Receive overruns Token pass failures Retries on request with response frames All retries performed and no response received from unit Bad transmit request Negative transmit confirmation Message sent but no application response Invalid MBUS PEER logic Command not executable Data not available Device not available Function not implemented Request not recognized Syntax error Unspecified error Data request out of bounds Request contains invalid 984 address Request contains invalid data type None of the above Invalid MBUS PEER request Number of unsupported MMFS message types received Unexpected response or response received after timeout Duplicate application responses received Response from unspecified device Number of responses buffered to be pro cessed in the least significant byte Number of MBUS PEER requests to be processed in the most significant byte Number of received requests to be pro cessed in the least significant byte Number of transactions in process in the most significant byte S975 scan time in 10 microsecond increments Version level of fixed software PROMs major version number in most significant byte minor version number in least significant byte Version of loadable software EEPROMs major version number in most significant byte minor version number in least significant
59. fraction 1 4x 5 For Internal Use Integral fraction 2 4x 6 P x 8 Filtered This register stores the result of the filtered analog in put from register 4x14 multiplied by 8 this value is useful in derivative control operations 4x T Absolute Value of E This register which is updated after each loop solution contains the absolute value of SP PV bit 8 in register 4x 1 indicates the sign of E 4x 8 For Internal Use Current solution interval GM 0984 SYS 984 Enhanced Instructions 285 PID2 Error Codes Displayed in Middle Node Register 4x 1 Code Explanation Check These Registers 0000 No errors all validations OK None 0001 Scaled SP above 9999 4x1 0002 High alarm above 9999 4x3 0003 Low alarm above 9999 4x4 0004 Proportional band below 5 4x5 0005 Proportional band above 500 4x5 0006 Reset above 99 99 r min 4x6 0007 Rate above 99 99 min 4x7 0008 Bias above 4095 4x8 0009 High integral limit above 4095 4x9 0010 Low integral limit above 4095 4x10 0011 High engineering unit scale above 9999 4x11 0012 Low engineering unit scale above 9999 4x12 0013 High E U below low E U 4x11 and 4x12 0014 Scaled SP above high E U 4x1 and 4x11 0015 Scaled SP below low E U 4x1 and 4x12 0016 Maximum loops scan 9999 4x15 0017 Reset feedback pointer out of range 4x16 0018 High output clamp above 4095 4x17 0019 Low output clamp above 4095 4x18 0020 Low output clamp above high output clamp 4x17 and 4x18
60. importantly you improve throughput for the critical I O supported by logic in segment 3 Throughput is the better measure of system performance GM 0984 SYS Ladder Logic Overview 113 Here is how the MODSOFT segment scheduler would show the resulting or der of solve table F1 F2 F3 F4 F5 F6 F7 SEGMENT SCHEDULER Service Comm Insert Delete CnstSwp MinScan Quit F8 F9 l oem Number of Drops 3 Min Register Constant Sweep OFF Scan Time ms 4 Ref Seg Drop Drop Number Type Number Sense ment Input Output Nr 1 CONTINUOUS 01 01 01 2 CONTINUOUS 03 03 03 3 CONTINUOUS 02 02 02 4 CONTINUOUS 03 03 03 5 EOL An Order of Solve Table Rescheduled for Critical I O 114 Ladder Logic Overview GM 0984 SYS 7 11 Using the Segment Scheduler to Improve System Performance When certain areas of a ladder logic program do not need to be solved continually on every scan for example an alarm handling routine a data analysis routine some diagnostic message routines they can be designated as controlled seg ments by the segment scheduler editor Based on the status of an I O or internal reference a controlled segment may be scheduled to be skipped thereby reduc ing scan time and improving overall system throughput For example suppose that you have some alarm handling logic in segment 2 of a three segment logic program You can use the segment scheduler editor to con trol segment 2 based on t
61. in ladder logic Note Remember that no opcodes residing in EPROM firmware can be modified GM 0984 SYS 984 Opcode Assignments 91 6 4 Extra Opcodes Available in 24 Bit CPUs Because the 24 bit CPUs provide eight x bits per node 28 256 combinations are available for opcode assignments The 984B chassis mount Controller is the ex ception it is design limited to the x bit assignments described in Section 6 2 2 in order to enforce conformance with the 16 bit CPUs The other 24 bit CPUs e g the 984 780 785 the Q984 can use all opcodes in the hexadecimal range 00 FF for loadables and user defined function blocks The matrix on the following page shows how the opcode assignments indicating which codes are reserved which codes may be flexibly assigned in either 16 bit or 24 bit CPUs and which are available for 24 bit CPUs only 92 984 Opcode Assignments GM 0984 SYS GM 0984 SYS 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F Standard Ladder Logic DX Move Instructions nd Non DX Functions vr EL vall DX Matrix Instructions Only to 24 Bit CPUs exception 984B Assigned or Re served Codes Note f you assign an opcode to an instruction and that opcode is a combination available only to a 24 bit CPU any programs you creat
62. indicate which table position the rele vant data has been copied from or moved to This register is called a pointer The pointer value must never exceed the table length Zero is a valid pointer val ue typically indicating that the next operation of the function block will be to copy data from or read data to the first table position See examples in Chapter 11 7 4 2 Matrix Functions A matrix is a sequence of data bits formed by consecutive 16 bit words derived from tables DX matrix functions operate on bit patterns within tables The minimum table length is 1 i e one word or one register The maximum table length depends on the DX function and on the type of controller 16 or 24 bit CPU Groups of 16 discretes can also be placed in tables The reference number used is the first discrete in the group and the other 15 are implied The number of the first discrete must be of the first of 16 type 00001 10001 0017 10017 00033 10033 etc See examples in Chapter 12 102 Ladder Logic Overview GM 0984 SYS 7 5 How Ladder Logic Is Solved The controller s CPU scans the ladder logic program sequentially in this manner Oo Segments are scanned according to their arrangement in the order of solve table i e the segment scheduler in system memory o Networks 01 through nn within each segment are scanned o Nodes within each network are scanned top to bottom left to right in the following manner
63. it do not power down the other nodes The network protocol automatically by passes a node when it is removed and includes it when it is reconnected Con nectors are built with internal termination resistors and do not have to be GM 0984 SYS 984 Communications Capabilities 61 connected to a device You should cover its pins to prevent damage and contami nation 62 984 Communications Capabilities GM 0984 SYS 4 8 Joining Modbus Plus Networks For applications requiring a large number of nodes you can use the BP85 Bridge Plus device to join multiple Modbus Plus networks The BP85 has two port con nectors and two sets of address switches and is connected as a node on two Modbus Plus networks The Bridge operates as an independent node on each network receiving and passing tokens according to each network s address se quence Network A Up to 64 Nodes Node 5 M Node Node Node Node 15 BP85 Node 10 Network B Up to 64 Nodes Node 20 BP85 Node Node Terminating Connector Inline Connector The illustration on the following page shows an example of a Modbus Plus system topology The Bridge Plus provides the benefit of faster communications on individual net works Each network maintains faster communication between devices for time critical control applications while the bridge facilitates intercommunication between t
64. logic program Service Comm Insert Delete CnstSwp MinScan Quit EI F2 F3 F5 F6 F7 F8 F9 L SEGMENT SCHEDULER Number of Drops 3 Min Register Constant Sweep OFF Scan Time ms 4 Ref Seg Drop Drop Number Type Number Sense ment Input Output Nr 1 CONTINUOUS 01 01 01 2 WDT RESET 3 CONTINUOUS 02 02 02 4 WDT RESET 5 CONTINUOUS 03 03 03 6 EOL An Order of Solve Table Rescheduled for Three Comm Port Servicings per Scan 116 Ladder Logic Overview GM 0984 SYS 7 13 Sweep Functions Sweep functions allow you to scan a logic program at fixed intervals They do not make the controller solve logic faster or terminate scans prematurely 7 13 1 Constant Sweep Constant Sweep allows you to set target scan times from 10 200 ms in multi ples of 10 A target scan time is the time between the start of one scan and the start of the next it is not the time between the end of one scan and the beginning of the next Constant Sweep is useful in applications where data must be sampled at constant time intervals If a Constant Sweep is invoked with a time lapse smaller than the actual scan time the time lapse is ignored and the system uses its own normal scan rate The Constant Sweep target scan time encompasses logic solving I O and Modbus port servicing and system diagnostics If you set a target scan of 40 ms and the logic solving I O servicing and diagnostics require only 30 ms the con trolle
65. no two ASCII READ WRIT function blocks are active in the same segment at the same time such a condition will cause the block to return an error or return bad data The source register in the top node may be either the first 3x input register or the first 4x holding register in a table whose length is specified in the bottom node This table will contain the data required to fill the variable field in a message Consider the following WRIT message vessel 1 temperature is III The 3 character ASCII field rrr is the variable data field variable data are loaded typically via DX moves into a table of variable field data 172 ASCII READ WRITE Functions uod dub The ASCII control block register specified in the middle node is the first of seven consecutive 4x holding registers Register Definition 4x bits 0 5 port number 1 32 bits 6 15 error codes 4x 1 message number 4x 2 number of registers required to satisfy format 4x 38 number of registers transmitted thus far 4x 4 status of solve 4x 5 unassigned 4x 6 checksum of registers O 5 The bottom node indicates that this is an ASCII READ function and it contains a number specifying length of the source table Table length may range from 1 255 in a 16 bit CPU and from 1 999 in a 24 bit CPU GM 0984 SYS ASCII READ WRITE Functions 173 13 3 ASCII Message Handling The ASCII READ and WRIT function blocks provide the routines necessary f
66. out 4096 in 4096 out 4096 in 4096 out 16 R S901 984 780 785 Slot mount 1 5 24 bits 16K 32K 9999 8192 512 in 512 out 16384 in 16384 out 8192 in 8192 out 1L 31R Q984 Host Based 2 0 24 bits 12K 9999 8192 512 in 512 out 3584 in 3584 out 3584 any mix 7R 984A Chassis mount 0 75 16 bits 16K 32K 1920 2048 any mix 1024 in 1024 out 32768 any mix 2048 any mix 32 R S908 256 in 256 out 4096 in 4096 out 2048 any mix 16 R S901 984X Chassis mount 0 75 16 bits 8K 1920 2048 any mix 512 in 512 out 3584 in 3584 out 2048 any mix 1L 6R 984 685 Slot mount 2 0 16 bits 8K 16K 4096 2048 any mix 512 in 512 out 16384 in 16384 out 2048 any mix 1L 31R 984 680 Slot mount 3 0 16 bits 8K 16K 4096 2048 any mix 512 in 512 out 16384 in 16384 out 2048 any mix 1L 31R AT 984 Host Based 1 5 16 bits 8K 1920 2048 any mix 512 in 512 out 3584 in 3584 out 2048 any mix 7R MC 984 Host Based 1 5 16bits 8K 1920 2048 any mix 512 in 512 out 3584 in 3584 out 2048 any mix 7R 984 485 Slot mount 3 0 16 bits 4K 8K 1920 2048 any mix 512 in 512 out 3584 in 3584 out 1024 any mix 1L 6R 984 480 Slot mount 5 0 16 bits 4K 8K 1920 2048 any mix 512 in 512 out 3584 in 3584 out 1024 any mix 1L 6R 984 385 Slot mount 3 0 16 bits 4K 6K 1920 2048 any mix 512 in 512 out 512 in 512 out 512 any mix 1L 984 381 Slot mount 5 0 16 bits 1 5K AK 6K 1920 2048 any mix 512 in 512 out 512 in 512 out 512 any mix 1L 984 380 Slot mount 5 0 16 bits 1 5K AK 6K 1920 2048 any mix 512 in 512 out 512 in 512 out
67. pointer increments ICMP moves through its data table in lock step with DRUM As ICMP moves through each new step it compares bit for bit the live input data to the expected status of each point in its data table ICMP is a three node function block Enables the input compare step pointer Copies top input state operation This comparison and all pre A cascading input telling the _ step data vious cascaded ICMPs are block that previous ICMP TE good comparisons were all good ICMP max of Error a validation steps check has failed The top node contains one 4x register used to hold the current step number value The value is referenced by ICMP each time the instruction is solved the value in this register must be controlled externally by a DRUM function or by other user logic The same register must be used in the top node of all ICMP and DRUM blocks that are to be solved as a single sequencer The middle node contains the first 4x register in an implied register table of step data information the first eight registers in the table hold constant and variable data required to solve the block Reference Register Name Description 4x raw input data Loaded by user from a group of sequential inputs to be used by ICMP for current step 4x 1 current step data Loaded by ICMP each time the block is solved con tains a copy of data in the step pointer causes the block logic to automatically calcul
68. programmable controllers All 984 controllers regardless of their particular hardware implementation use a common processing architecture they are all programmed with ladder logic a powerful and graphical language that emulates relay equivalent symbology and they share common instructions drawn from a large set of calculation data transfer DX matrix and special application functions Modicon also provides you with various networking strategies allowing you to interconnect multiple controllers and other devices for increased appli cation control and data exchange 1 1 1 The 984 Family 984 controllers are available in four generic hardware classes o Large rugged high performance chassis mount controllers o Rugged midrange performance slot mount controllers which reside in a primary housing beside 800 Series I O modules o Host based controllers built on various industry standard computer cards designed to reside in and execute control logic from a host computer o Low cost easy to install compact controllers for applications with less demanding environmental and performance requirements The family approach to 984 controller design allows you to make choices based on controller capacity the number of discrete and analog register points available for application programming the number of I O drops it supports throughput the rate at which it solves logic and updates I O modules and environmental hard ness the desig
69. rack and can be monitored at bit 4 of the appropri ate status word A PanelMate on RIO occupies slot 1 in rack 1 of the drop and can be monitored at bit 1 of the first status word for the drop Note The ASCII Keypad s communication status can be monitored with the error codes in the ASCII READ WRIT blocks see Section 13 5 GM 0984 SYS Monitoring System Status 199 14 13 908 I O Communication Status Words Status words 172 277 contain the I O system communication status Words 172 181 are global status words Among the remaining 96 words three words are dedicated to each of up to 32 drops depending on the type of 984 controller you are using Word 172 S908 Startup Error Code This word is always 0 when the system is running If an error occurs the controller does not start it generates a stop state code of 10 word 5 Traffic Cop Validation Soft Error Codes Words 173 200 Monitoring System Status BADTCLEN BADLNKNUM BADNUMDPS BADTCSUM BADDDLEN BADDRPNUM BADHUPTIM BADASCNUM BADNUMODS PRECONDRP PRECONPRT TOOMNYOUT TOOMNYINS BADSLTNUM BADRCKNUM BADOUTBC BADINBC BADRF1MAP BADRF2MAP NOBYTES BADDISMAP BADODDOUT BADODDIN BADODDREF BAD3X1 XRF BADDMYMOD NOT3XDMY NOT4XDMY DMYREAL1X REALDMY1X DMYREAL3X REALDMYSX Traffic Cop length Remote I O link number Number of drops in Traffic Cop Traffic Cop checksum Drop descriptor length I O drop number Drop holdup time ASCII port number
70. re quested node if global data are currently available the operation completes in a single scan No master transaction path is required 17 7 1 Control Block Utilization The contents of the first five registers in the top node of the MSTR block are used when you implement a Read global data function Control Block MSTR Register Register Function Content 4x Operation type 6 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2 Length Specifies the number of words of global data to be requested from the comm processor designated by the routing 1 parameter the value of the length must be gt 0 lt 32 and must not exceed the size of the data area 4x 3 Available words Contains the number of words available from the re quested node the value is automatically updated by internal software 4x 4 Routing 1 The low byte specifies the address of the node whose global data are to be returned a value be tween 1 64 if this is the second of two local nodes set the high byte to a value of 1 226 Modbus Plus Master Function GM 0984 SYS 17 8 Get Remote Statistics MSTR Function The Get remote statistics function obtains operational information relative to re mote nodes on the network This operation may require multiple scans to com plete and does not require a master data transaction path 17 8 1 Control Block Utilization The contents of the nine registers in the top node of t
71. subtraction is stored GM 0984 SYS Standard Calculate Functions 135 10 3 MUL The MUL instruction multiplies value 1 by value 2 and stores the result in two holding registers MUL is a three node function block ON value 1 __ value 1 Top input is powered multiplied by value 2 value 2 MUL result DE EE EY high order low order The top node and middle node are value 1 and value 2 respectively they can be o A decimal ranging from 1 999 in a 16 bit CPU and from 1 9999 in a 24 bit CPU o An input register 3x o A holding register 4x The bottom node indicates that this is a MUL function and contains two consecu tive a holding registers 4x and 4x 1 where the result of the multiplication is stored The higher order digits are stored in the register specified in the bottom node and the lower order digits are stored in the next sequential register For example if the top node value is 8000 and the middle node value is 2 the result 16 000 is stored in two sequential registers 4x contains the higher order digits 0001 and 4x 1 contains the lower order digits 6000 136 Standard Calculate Functions GM 0984 SYS 10 4 DIV The DIV instruction divides value 7 by value 2 and stores the result and the re mainder in two consecutive holding registers DIV is a three node function block ON value 1 value t t division successful divided by value 2 y high or
72. the host will go to remove data rj The low byte of register 4x 2 contains the Q put pointer the pointer to the register in the circular buffer where the EARS block will begin to place the next state change data the high byte of register 4x 2 contains the last transaction number received Oo 4x 3 contains the Q count a value indicating the number of words currently in the circular buffer Oo 4x 4 contains status error codes o 4x 5 is the first register in the circular buffer where event change data are stored each detected change in event status produces two consecutive regis ters of information Event Data Register 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Event Number 1 992 Reserved 0 Negative Transition Event Type Four Most Significart BLSE Her BENG Type Event Data Register 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 GM 0984 SYS Sixteen Least Significant Bits of Event Time Stamp 984 Loadable Instructions 319 The time stamp is encoded in 20 bits as a binary weighted value that represents the time in an increment of 0 1 s starting from midnight of the day on which the status change was detected 1 hour 3 600 sec
73. this document No part of this document may be reproduced in any form or by any means electronic or mechanical without the express written permission of Modicon Inc Industrial Automation Systems All rights reserved The following are trademarks of Modicon Inc Modbus Modbus Plus Modbus II 984 984A 984B 984X 984 785 984 780 984 685 984 680 984 485 984 480 984 385 984 381 984 380 Micro 984 984 120 984 130 984 145 Compact 984 AT 984 MC 984 Q984 P190 P230 BP85 SM85 SA85 MODSOFT is a registered trademark of Modicon Inc IBM is a registered trademark of International Business Machines Corporation IBM AT IBM XT Micro Channel Personal System 2 and NetBIOS are trademarks of International Business Machines Corporation Microsoft and MS DOSQ are registered trademarks of Microsoft Corporation Copyright 1991 by Modicon Inc All rights reserved Printed in U S A GM 0984 SYS Preface iii Chapter 1 The 984 Programmable Controllers o Modicon s Family of 984 Programmable Controllers o 984 Controller Performance and Capacity Characteristics o How a 984 System Provides Application Control o P190 Style Panel Software Support o MODSOFT Panel Software Support o Overview of the 984 Instruction Set GM 0984 SYS The 984 Programmable Controllers 1 1 1 Modicon s Family of Programmable Controllers Modicon offers a wide range of compact midsize and high performance CPUs with its 984 family of
74. to has its toggle switch set to position A or position B This controller in OFFLINE mode 0 This controller running in primary mode 0 This controller running in standby mode 1 The other controller in OFFLINE mode O 1 The other controller running in primary mode O 1 The other controller running in standby mode 1 1 Controllers have matching logic 0O Controllers do not have matching logic 1 This controller s toggle switch set to A 0 This controller s toggle switch set to B 1 1 1 1 1 2 3 4 s e v e e 10 12 19 14 15 16 L 4 Not Used The HSBY Status Register Register 4x 2 in Nontransfer Area 296 984 Loadable Instructions Oo The combined states of bits 15 and 16 tells you whether the controller you are rj The combined states of bits 13 and 14 tell you whether the other controller in the Hot Standby system is in primary standby or OFFLINE mode oO Bit 12 tells you whether both controllers are using identical application logic Oo Bit 11 tells you whether the R911 S911 module in the controller you are at GM 0984 SYS 21 4 An HSBY Reverse Transfer Example The two networks below are for a primary controller that monitors two fault lamps and a reverse transfer that sends status data from the standby controller to the primary controller The first network must be network 2 of segment 1 the second network must not be
75. v v v Links discrete and register reference num bers to locations in the I O subsystems Programmer VW v v Generates edits monitors ladder logic and accesses controller operations ASCII v v v Generates and edits ASCII formatted Programmer messages LRV v v Loads programs from disk to controller records 984 memory to disk compares pro grams on disk and in memory Tape Loader v Records user logic on tape loads programs to 984 memory compares programs on tape and in memory Ladder Lister VW v Generates hard copy of user logic program Annotated v v Prints user comments along with hard copy Ladder Lister of the user logic program Utility v Accesses controller memory prints ladder listing accesses controller operations Executive v v Overview menu for PC programming software There is no editor feature comparable to the Annotated Ladder Lister in the P190 Panel Software package 8 The 984 Programmable Controllers GM 0984 SYS 1 4 2 Special Loadable Software Additional loadable software is available to support optional controller hardware and special purpose applications Software 3 5 in 5 25 in P190 Program Loadable Diskette Diskette Tape Description HSBY v v v Enables switchover of controller functions to a back up controller without downtime CALL v v v Expands controller s processing capabilities by calling C functions from a Coprocessor library MBUS PEER w v v Enables peer to peer communications via Modbu
76. value is 500 the range must be given as a positive integer between 0001 9999 corresponding to a raw analog input value of 4095 Low Engineering Range Load this register with the lowest value for which the measurement device is spanned the range must be given as a positive integer between 0 9998 and it must be less than the value in register 4x11 it corresponds to a raw analog input value of 0 Raw Analog Measurement The logic program loads this register with PV the measurement must be scaled and linear in the range 0 4095 Pointer to Loop Counter Register The value you load in this register points to the register that counts the number of loops solved in each scan the entry is determined by discarding the most significant digit in the register where the controller will count the loops solved scan e g if the controller does the count in register 41236 load 1236 into 4x14 the same value must be loaded into the 4x14 register in every PID2 block in the logic program Maximum Number of Loops Solved In a Scan If register 4x14 con tains a non zero value you may load a value in this register to limit the number of loops to be solved in one scan Pointer To Reset Feedback Input The value you load in this register points to the holding register that contains the value of feedback F drop the 4 from the feedback register and enter the remaining four digits in register 4x16 integration calculations depend on the F value being
77. words are reserved for each of up to 32 drops one word for each of up to five possible racks I O housings in each drop Each rack may contain up to 11 I O modules bits 1 11 in each word represent the health of the associated I O module in each rack If the bit is set to 1 then the condition is TRUE 198 Monitoring System Status 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 m Not Used Slot 10 Slot 9 Slot 8 Slot 7 Slot 6 Slot 5 Slot 4 Slot 3 Slot 2 Slot 1 GM 0984 SYS Four conditions must be met before an I O module can indicate good health rj The slot must be traffic copped o The slot must contain a module with the correct personality rj Valid communications must exist between the module and the RIO interface at remote drops o Valid communications must exist between the RIO interface at each remote drop and the I O processor in the controller 14 12 1 Converting from Word to Drop and Rack Word 12 5 Quotient Remainder where Drop Quotient 1 Rack Remainder 1 14 12 2 Converting from Drop and Rack to Word Word Drop x 5 Rack 6 14 12 3 Status Words for the MMI Operator Panels The status of the 32 Element Pushbutton Panels and PanelMate units on an RIO network can also be monitored with an I O health status word The Pushbutton Panels occupy slot 4 in an I O
78. 0001 passes power the bit matrix formed by registers 40600 and 40601 are ANDed with the bit matrix formed by registers 40604 and 40605 The result is copied into registers 40604 and 40605 overwriting the previous bit pattern If you want to keep the original bit pattern of registers 40604 and 40605 copy the information into another table before performing an AND operation using a BLKM ORing Example source matrix 40600 40600 1111111100000000 40601 1111111100000000 10001 destination matrix 40606 40606 1111111111111111 40607 0000000000000000 OR ORed destination 00002 40606 11111111111111111 40607 1111111100000000 Whenever 10001 passes power the bit matrix formed by registers 40600 and 40601 is ORed with the bit matrix formed by 40606 and 40607 The result is co pied into registers 40606 and 40607 Caution Outputs and coils cannot be turned OFF with the OR instruction 158 DX Matrix Functions GM 0984 SYS XORing Example source matrix 40600 40600 1111111100000000 40601 444444400000000 10001 destination matrix 40608 40608 1111111111111111 40609 0000000000000000 XOR XORed destination 00002 40608 0000000011111111 40609 1111111100000000 When 10001 passes power the bit matrix formed by registers 40600 and 40601 is XORed with the bit matrix formed by 40608 and 40609 The result is copied into registers 40608 and 40609 G
79. 1 are used to initiate communications MBUS writes infor mation to or reads information from a single controller PEER writes register information to up to 16 controllers simultaneously 2 6 3 The Modbus Plus Options Several 984 controllers have a Modbus Plus capability built directly into the con troller i e the slot mount 984 385 984 485 984 685 and 984 785 Controllers the Compact 984 145 Controller and the host based AT 984 and MC 984 Controllers For the chassis mount controllers and for the slot mount controllers that accept option modules the 984 68x and 78x various S985 Modbus Plus Adapter cards are available as option modules An S985 comes with a loadable version of the MSTR function block described in Chapter 17 which allows you to initiate Modbus Plus communication functions in 984 controllers with built in Modbus Plus capabilities the MSTR function is part of the standard executive firmware The AM S985 000 card is used with a 984X Controller the AM S985 020 is used with a 984A Controller with an S908 RIOP and the AM S985 040 is used with the 984B Controller with an S908 RIOP 2 6 4 The Distributed Communications Option The AS D908 110 and AS D908 120 Distributed Control Processors allow you to extend programmable control capabilities over the S908 remote I O link These option modules allow entire 984 control systems CPU and I O to appear as re mote I O drops on a higher level remote I O link The di
80. 106 0500 40107 0000 40108 0000 40109 4095 40110 0000 40111 4000 40112 0000 40113 40114 0000 40115 0000 40116 0102 40117 4095 40118 0000 GM 0984 SYS Scaled PV mm PID2 writes this Scaled SP mm Set this to 2000 mm half full initially Loop output 0 4095 PID2 writes this keep it set to O just to be safe Alarm High Set Point mm If the level rises above 3500 mm coil 00102 goes ON Alarm Low Set Point mm If the level drops below 1000 mm coil 00103 goes ON PB The actual value used here depends on the process dynamics Integral constant 5 00 repeats min This actual value used here depends on the process dynamics Rate time constant per minute Setting this to 0 turns off the derivative mode Bias 0 4095 This is set to 0 since we have a integral term High windup limit 0 4095 Normally set to the maximum Low windup limit 0 4095 Normally set to the minimum High engineering range mm The scaled value of the process variable when the raw input is at 4095 Low engineering range mm The scaled value of the process variable when the raw input is at 0 Raw analog measure 0 4095 A copy of the input from the analog input module register 30001 copied by the first SUB block in the ladder logic Offset to loop counter register Zero disables this feature Normally this is not used Max loops solved per scan see 40114
81. 255 0 no transaction requested e The Modbus port 3 address of the 16th of the receiving devices address range 1 255 GM 0984 SYS The middle node is the first 4x register in a data block to be transmitted by the PEER function The bottom node contains a constant value defining the number of holding regis ters to be written starting with the 4x register defined in the middle node the range is 1 249 GM 0984 SYS 984 Loadable Instructions 303 21 7 The MBUS Get Statistics Function Function code 255 in register 4x 2 in the MBUS control block allows you to ob tain a copy of the Modbus II local statistics which stores errors and system condi tions in a series of 46 consecutive locations When using MBUS for a get statis tics operation set the constant value in the bottom node to 46 any value less than 46 will return an error the bottom output will go ON and any value greater than 46 will reserve extra registers that cannot be used For example Enable 40101 Transaction complete transaction 4100 0 Clear system mae eH EN MBUS __ Error length specified in bottom statistics 46 node is less than 46 Register 40101 is the first register in the MBUS control block making register 40103 the control register that defines the MBUS function code By entering a value of 255 in register 40103 you implement a get statistics function Registers 41000 41045 are then filled with the following s
82. 353 001 24VDC True Low 8 AS B355 001 220VAC 8 AS B357 001 24VDC True High 8 AS B359 001 24VAC 8 3 11 2 300 Series Discrete Output Modules Voltage Number Model Range of Outputs AS B350 001 115VAC 8 AS B352 001 24VDC True Low 8 AS B354 001 220VAC 8 AS B356 001 24VDC True High 8 AS B358 001 24VAC 8 AS B360 001 Dry Contact Relay NO 6 AS B360 002 Dry Contact Relay NC 6 48 984 I O Subsystems GM 0984 SYS 3 11 3 300 Series Analog I O Modules Application Model Range Words I O AS B373 001 0 10VDC 2 0 AS B374 001 1 5VDC A4 20mA 0 2 AS B375 001 1 5VDC 4 20mA 2 0 3 11 4 300 Series BCD Register I O Modules Application Model Range Words I O AS B370 001 0 5VDC 3 digits 0 2 AS B371 001 0 5VDC 3 digits 2 0 GM 0984 SYS 984 I O Subsystems 49 Chapter 4 984 Communications Capabilities mi mi Oo Modbus Capabilities Modbus Port Pinouts for the P230 Programming Panel Modbus Port Pinouts for the P190 Programming Panel Modbus Port Pinouts for an IBM XT A Modbus Network A Modbus Plus Network Bridging Modbus Plus Networks A Modbus II Network Distributed Control Processing Network Topology Overview GM 0984 SYS 984 Communications Capabilities 51 4 1 Modbus Capabilities A Modbus communications capability is resident in all chassis mount slot mount and micro 984 controllers Modbus may be used as the connection for a host de vice such as a programming panel or data ac
83. 4 SYS Monitoring System Status HEX WORD 01 02 03 04 06 07 08 09 0A 0B oC oD 0E OF 10 11 12 AB AC AD AF BO B2 B6 B8 B9 BB BC BE 110 112 113 115 191 14 9 Accessing S908 Status Data with a Programming Panel When accessing the status table from your programming panel words 1 11 are found in sequential memory locations 65 6F hex The I O health status table is kept in 160 sequential memory locations the communication status table is kept in 106 sequential memory locations The actual memory locations that hold these two tables will vary with different 984 mainframe models Use pointers to locate the first word in the I O module health status table and the communication status table The pointers are always found at the same locations in absolute memory go I O module health pointer location 46 hex go 1 0 communication pointer location 33 hex If the most significant hex digit of the pointer is 8 add E8000 to the pointer as follows Pointer Address 8xxx fOxxx 9xxx f1xxx axxx f2xxx XXX last three digits of the bxxx f3xxx pointer become the last three CXXX faxxx digits of the address dxxx f5xxx exxx fexxx For example pointer B984 becomes fxxx f7xxx address F3984 To find the address of an I O health status word subtract OC hex from the status word number then add the result to the I O health pointer To find the address of a comm
84. 4 bit CPUS specifying the actual num ber of steps to be solved the number must be the table length in the bottom node of the ICMP block The remaining registers contain data for each step in the sequence The bottom node contains a constant value used to calculate the maximum num ber of registers allocated to the step data table the number may range from 1 255 in 16 bit CPUs and 1 999 in 24 bit CPUs The maximum number of registers is the specified constant 8 The specified constant must be gt the value placed in the steps used register in the middle node 21 9 3 Cascaded DRUM ICMP Blocks A series of DRUM and or ICMP blocks may be cascaded to simulate a mechani cal drum up to 512 bits wide Programming the same 4x register reference into the top node of each related block causes them to cascade and step as a grouped unit without the need of any additional application logic All DRUM ICMP blocks with the same register reference in the top node are automatically synchronized The must also have the same constant value in the bottom node and must be set to use the same value in the steps used register in the middle node GM 0984 SYS 984 Loadable Instructions 311 21 10 Extended Math Loadables Included in the loadables library provided for chassis mount controllers are two extended math instructions MATH and DMTH which provide you with double precision math square root process square root log and antilog functions com
85. 5 o Analog out which convert numerical data generated by the controller s logic solving into analog output signals to be used by output field devices such as heaters or pumps Oo Special purpose designed for unique field applications such as multiplexing high speed counting and temperature reading n Intelligent designed for unique field applications requiring bidirectional in out capabilities and on board processing power 3 1 3 Local and Remote I O I O subsystems may be ocal located together with or in close proximity to the controller or remote located at distances up to 15 000 ft 4 5 km from the con troller depending on the cable type GM 0984 SYS 984 I O Subsystems 31 3 2 Local I O When local I O is supported it consists of one drop only always designated as drop 1 in your system configuration Your controller restricts you to one specific series of I O modules at the local drop 984 Controllers that Support Local I O Local I O Supported 1 O to Controller Connectivity Local Devices Supported 984X 984 780 785 984 680 685 984 480 485 984 380 381 385 Micro 984 984 120 130 145 800 Series O 800 Series I O 800 Series I O 800 Series I O 800 Series I O 300 Series I O A120 Series I O I O in secondary 800 Series housings up to 12 ft from control ler connected by W929 cable In the primary 800 Series I O housing with controller In t
86. 5 000 5 5V included 10 10V 38 984 1 0 Subsystems GM 0984 SYS 3 6 5 800 Series Special Purpose I O Modules Power Draw mA Addressable Model Description 5 0V 4 3V 5 0V Registers l o Connector AS B846 001 MUX 65 1 0 0 1 AS 8535 000 16 Voltage Inputs AS B846 002 MUX 65 1 0 0 1 AS 8535 000 16 Current Inputs AS B864 001 TTL Register 220 180 0 0 8 AS 8535 000 8 outputs 8 common AS B865 001 TTL Register 400 600 0 8 0 AS 8535 000 8 inputs 8 common AS B882 239 High Speed 188 0 0 2 2 AS 8533 005 Counter Included 2 UpCounts 0 30kHz AS B883 001 High Speed 680 0 0 3 3 52 0325 000 Counter Included 2 Up Down Counts 0 50kHz Internal Clock AS B883 200 Reads ten 300 0 0 3 3 52 0325 000 Thermocouple Included Inputs Types B E J K R S T N or linear mV AS B883 201 Reads8RTD 400 5 0 3 3 52 0325 000 Inputs 2 or Included 3 wire American or European 100 2 Platinum GM 0984 SYS 984 I O Subsystems 39 3 6 6 800 Series Intelligent I O Modules Intelligent I O modules perform tasks that require special on board processing capabilities Power Draw mA Addressable Model Description 5 0V 4 3V 5 0V Registers I O Connector AS B883 101 CAM Emulator 1000 0 0 3 3 52 0325 000 Absolute Included Encoder Input 8 Discrete Outputs AS B883 111 CAM Emulator 1000 0 0 3 3 52 0325 000 w Velocity Included Compensation AS B884 002 PID 2 Loops 50 0 0 4 4 AS 8644 000 Cascadable Included Standal
87. 58 Network Capacity s ren ia e cette eens 58 Communication Media 0 ccc eects 58 Communication Parameters 0 0 c cece eee ees 58 A Modbus Plus Network 60 Network Capacity 0 cece eet eens 60 The Logical Network n tme nenne dee n 61 The Physical Network 0 cece e eee III 61 Adding and Deleting Nodes from the Network 05 61 Joining Modbus Plus Networks 0 cee eee eee eee ees 62 A Modbus II Network 2 5 0 0 6 02 cee a ke ek herr oe e 64 Modbus II Software cece eee eens 64 Distributed Control Processing 0 e cece eee eee 66 Distributed Control Applications 0 eee 67 Network Topology Overview 0 0 eect e eee 68 Chapter 5 984 Memory Allocation 71 UserMemory uel IR REMPORTE ERR RYGGU RA RM NERA 72 System Overhead i ve MGE ENARRARE ELE 72 User Logic ikeRUISeS eee ee ene ed p X d e NUES 73 User Memory Storage 0 cece eee eens 73 State RAM Values 2i b eR ERI RE led wha OE aed 74 A Referencing System for Inputs and Outputs 005 74 How Discrete and Register Data Are Stored in State RAM 75 State RAM Structure 2 0 ccc e nnn 76 The Required Minimum State RAM Values 00 e ee eee 77 GM 0984 SYS Table of Contents vii viii Storing History and Disable Bits for Discrete Values 77 The Configuration Table 0
88. 6 When 10001 is closed the remainder of network 42 and all of network 43 are skipped The power flow display for these two networks becomes invalid and your system displays an information message to that effect Coil 00193 is still controlled by contact 10003 because the solution of coil 00193 occurs before the SKP instruction Coil 00116 will remain in whatever state it was in when network 43 was skipped GM 0984 SYS Bypassing Networks with SKP 207 Chapter 16 Extended Memory Capabilities o Extended Memory File Structure o How Extended Memory Is Stored in System Memory o Extended Memory Control Table o Extended Memory Write Function o Extended Memory Read Function GM 0984 SYS Extended Memory Capabilities 209 16 1 Extended Memory File Structure The 984B chassis mount Controller provides an optional capability for supporting extended memory Extended memory is used for massive data storage in a group of files made up of storage registers These extended memory storage registers use 6x reference numbers on pages 1 3 in system memory Extended memory provides up to ten files and each file can contain as many as 10 000 registers ranging from 60000 69999 File 1 File 2 File 10 60000 60000 60000 60001 60001 60001 60002 60002 60002 e e e e e e e e e e e e 69999 69999 69999 Extended Memory File Structure Three optional sizes of extended memory are available
89. 60 001 90 150VDC AS B564 001 20 60VAC AS B592 001 115VAC Reed Relay NO AS B596 001 115VAC Reed Relay NC MPNMNNP Separate Commons 2 Separate Commons A HAH HAHAH Separate Commons 44 984 I O Subsystems GM 0984 SYS 3 9 3 500 Series Special Purpose I O Modules Number Model Description of Inputs Words I O AS B570 001 Output Register MUX 16 0 8 Or 0 16 16 three digit Latch on High LEDs AS B571 001 Input Register MUX 16 8 0 or 16 0 16 three digit 9 s complement Thumbwheels AS B572 001 D A Converter 2 0 2 0 10V AS B581 001 Absolute Encoder 12 bits 1 0 Module GM 0984 SYS 984 I O Subsystems 45 3 10 A120 Series I O Modules A120 Series I O modules are used as local I O with the 120 130 and 145 Com pact 984 Controllers they cannot be used in remote I O configurations The A120 Series provides discrete in discrete out analog in analog out and special pur pose I O modules 3 10 1 A120 Discrete Input Modules Voltage Disc Power Draw Opto isolation Model Range Ins Internal 5 V from I O Bus AS BDEP 208 230 VAC 8 lt 50 mA Yes AS BDEP 209 120 VAC 8 lt 30 mA Yes AS BDEP 216 120 VAC 16 lt 15 mA Yes AS BDEO 216 24VDC 16 lt 15 mA No AS BDEP 220 24VDC 16 lt 15 mA Yes 3 10 2 A120 Discrete Output Modules Voltage Power Draw Opto isolation Model Range Outs Internal 5V External 24 V from I O Bus AS BDAP 204 24VDC or 4relays lt 25mA lt 150 mA Yes 220 VAC AS BDAP 20
90. 8 MBUS arid PEER uci RR bea eRe Bete DEA are f 300 MBUS bye eE aaa a a rubr pe VERA eg 300 PEER an 6Rsv RICH EDO tan tenet RIS RED CRI M V ER 302 The MBUS Get Statistics Function 0 eee 304 Designing Custom Loadable Functions 0c eee eee eee 306 Programming Considerations 0 ccc ees 307 Sequential Control Functions 0 cece eee eee eee 308 DRUM udeekernned eee RRERUPRAS EG E E Vnd do E Ed eas 308 IGMP o o Louer Eius Re REA Gee aad ae Olas 310 Cascaded DRUM ICMP Blocks 0 e eens 311 Extended Math Loadables 0 cece eee eee 312 MATH 75g ERR dere ERN eee ates 312 DMTEU 5 E E E T ERR SEDE DURUM 313 2The EARS Loadable sssssssseeee eene 317 984 Functions in an Event Alarm Recording System 317 Host lt gt Controller Interaction sssssseesssseeerrrns 317 The EARS Block sselesescevbbeeRer egere kV gu Ru Deka x Red un 318 Index aiu Ne pU ota boe tace dried 321 GM 0984 SYS Table of Contents xiii Preface The data and illustrations found in this book are not binding We reserve the right to modify our products in line with our policy of continuous product improvement Information in this document is subject to change without notice and should not be construed as a commitment by Modicon Inc Industrial Automation Systems Modicon Inc assumes no responsibility for any errors that may appear in
91. 8 24VDC or 8 relays lt 60 mA lt 150 mA Yes 220 VAC AS BDAP 209 120 VAC 8 disc lt 88 mA Yes AS BDAP 216 24VDC 16disc lt 50 mA Yes 3 10 3 A120 Combo Modules Voltage Ins Power Draw Opto isolation Model Range Outs Internal 5 V External 24 V from I O Bus AS BDAP 212 24 VDC 8disc 25mA lt 150 mA Yes 4 relays AS BDAP 220 24VDC 8disc lt 25 mA Yes 8 disc 46 984 I O Subsystems GM 0984 SYS 3 10 4 A120 Analog Input Modules Application Range Analog Power Draw Opto isolation Model Recommended Ins Internal 5 V from I O Bus AS BADU 204 500 mV 500mV 4 lt 30 mA No Pt 100 RTD AS BADU 205 10 V 10 V or 4 lt 30 mA No 20 mA 20 mA 3 10 5 A120 Analog Output Module Application Range Analog Power Draw Opto isolation Model Recommended Outs Internal External from I O Bus AS BDAU 202 10V 10V or 2 60mA lt 150mA Yes 20 mA 20 mA 3 10 6 A120 Special Purpose Module Voltage Power Draw Opto isolation Model Application Range Internal 5 V External 24 V from I O Bus AS BZAE 201 Positioner or 24 VDC 100 mA 30 mA Yes Counter GM 0984 SYS 984 I O Subsystems 47 3 11 300 Series I O Modules 300 Series I O modules are used in conjunction with the Micro 984 Controller The 300 Series provides discrete in discrete out analog and BCD register I O modules 3 11 4 300 Series Discrete Input Modules Voltage Number Model Range of Inputs AS B351 001 115VAC 8 AS B
92. 99 0 block not configured all blocks belonging to same machine configuration have the same ma chine ID number 4x 4 profile ID number Identifies profile data currently loaded to the se quencer value range 0 9999 0 block not con figured all blocks with the same machine ID num ber must have the same profile ID number 4x 5 steps used Loaded by user before using the block DRUM will not alter steps used contents during logic solve contains between 1 255 for 16 bit CPUs and 1 999 for 24 bit CPUs specifying the actual num ber of steps to be solved the number must be the table length in the bottom node of the DRUM block The remaining registers contain data for each step in the sequence The bottom node contains a constant value used to calculate the maximum num ber of registers allocated to the step data table the number may range from 1 255 in 16 bit CPUs and 1 999 in 24 bit CPUs The maximum number of registers is the specified constant 6 The specified constant must be gt the value placed in the steps used register in the middle node GM 0984 SYS 984 Loadable Instructions 309 21 9 2 ICMP ICMP input compare provides logic for verifying the correct operation of each step processed by a DRUM block Errors detected by ICMP may be used to trig ger additional error correction logic or to shut down the system ICMP and DRUM are synchronized through the use of a common step pointer register As the
93. 999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers Oo 4x and 4x 1 hold the second operand value in the range 0 99 999 999 oO 4x 2 4x 3 4x 4 and 4x 5 hold the double precision multiplication result Double Precision Division ON operand 1 is divided by operand 2 and the re operand 1 ON operation performed sult is placed in designated successfully registers ON remainder stored as Operand 2 QN an operand out of a fraction in 4x 4 and destination range OFF remainder stored as an 8 digit whole number right justified DMTH f ON operand 2 is 0 4 The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers C 4x and 4x 1 hold the second operand value in the range 0 99 999 999 Since division by 0 is illegal a O value causes an error an error trapping rou tine sets the remaining middle node registers to 0000 and turns the bottom out put ON o 4x 2 and 4x 3 hold an eight digit result the quotient GM 0984 SYS 984 Loadable Instructions 315 og 4x 4 and 4x 5 hold the remainder if the remainder is expressed in whole numbers it is eight digits long and both registers are used if the remainder is expressed as a decimal it is four digi
94. AN AUTO Sign of E in 4x 6 02 and 1 4x14 Register Referenced by 4x15 is Valid Loop in AUTO mode but not being solved Wind down Mode for Rev B or higher Loop in AUTO mode and time since last solution solution interval Bottom Output Status Low Alarm Middle Output Status High Alarm Top Output Status Node Lockout or Parameter Error NOTE Bit 16 is set after initial startup or installation of the loop If you clear the bit the following actions take place in one scan e The loop status register is reset The current value in the real time clock is stored in register 4x 1 Registers 4x 3 4x 4 and 4x 5 are set to zero The value 4x13 x 8 is stored in register 4x 6 Registers 4x 7 and 4x 8 are cleared 4x 1 Error E Status Bits This register displays PID2 error codes as de scribed in previous table 284 984 Enhanced Instructions GM 0984 SYS Middle Node Register Function 4x 2 Loop Timer Register This register stores the real time clock reading on the system clock each time the loop is solved the difference be tween the current clock value and the value stored in the register is the elapsed time if elapsed time gt solution interval 10 times the value given in the bottom node of the PID2 block then the loop should be solved in this scan 4x 3 For Internal Use Integral integer portion 4x 4 For Internal Use Integral
95. AS 8534 000 AS B832 016 24VDC 16 8 32 235 0 AS 8534 000 AS B836 016 12 250VDC 16 1 50 603 0 AS 8535 000 AS B838 032 24VDC 32 8 160 1 0 AS 8535 000 AS B840 108 Reed Relay 8 1 67 400 0 AS 8534 000 AS B881 108 120 VAC 8 optional 285 240 0 AS 8535 000 AS B882 032 24 VDC 32 8 300 10 0 AS 8535 000 When all outputs are ON power draw at 5 V is 285 mA maximum on the B881 108 when all outputs are OFF power draw at 5 V is210 mA maximum When all outputs are ON power draw at 5 V is 300 mA on the B882 032 when all outputs are OFF power draw is 200 mA GM 0984 SYS 984 I O Subsystems 37 3 6 3 800 Series Analog Input Modules Application Analog Power Draw mA Model Ranges Inputs 5 0V 4 3V 5 0V Connectors AS B873 001 4 20mA 4 300 300 0 AS 8533 002 1 5V Included AS B873 002 1 10V 4 300 300 O AS 8533 002 Included AS B875 002 4 20mA 4 300 300 O AS 8533 002 1 5V Included AS B875 012 10 410V 4 300 300 O AS 8533 002 Included AS B875 101 4 20mA 8 650 975 0 AS 8533 004 10 10 Included 5 5V 0 10V 0 5V 1 5V AS B875 111 0 5V 1 5V 8 Differential 500 900 0 AS 8535 000 5 5V 16 Single ended included 0 10V 10 10V 0 2mA 0 4 2mA 2 42MA 3 6 4 800 Series Analog Output Modules Application Analog Power Draw mA Model Ranges Outputs 5 0V 4 3V 5 0V Connectors AS B872 100 4 20mA 4 800 5 0 AS 8535 000 included AS B872 200 0 5V 0 10V 4 800 5 0 AS 853
96. BUS PLN The requirements for other arrange ments depend on the type of commercial facilities selected 4 6 3 Communication Parameters All communications on a Modbus network are initiated by the Modbus master The master device may be a host computer a dedicated programming panel such as a P190 or a Modicon programmable controller with ASCII RIO communica tion capability Communications may be of the query response type where the master addresses only one slave or of the broadcaste no response type where the master simultaneously addresses all slaves 58 984 Communications Capabilities GM 0984 SYS Commonly used functions over the Modbus network are READ coil status 0x READ input status 1x READ WRIT holding register 4x READ input register 3x and FORCE coil ON or OFF A library of C functions is available from Modicon Modcom IIC SW APPD IDC It allows you to design custom Modbus applications The master communicates at a set baud to all slaves on the network The Mod bus ports on all slave devices must be set to a uniform set of communication pa rameters this means that if some controllers have a more limited selection of bauds the entire network is constrained to those selections GM 0984 SYS 984 Communications Capabilities 59 4 7 A Modbus Plus Network Modbus Plus is a local area network that allows host computers programmable controllers and other data sources to communicate as peers throughout an
97. Constant Load this register to add integral action to the calculation enter a value between 0000 9999 to represent a range of 00 00 99 99 repeats min the larger the number the larger the integral contribution a value lt 9999 or gt 0000 stops the PID2 calculation Rate Time Constant Load this register to add derivative action to the calculation enter a value between 0000 9999 to represent a range of 00 00 99 99 repeats min the larger the number the larger the deriva tive contribution a value lt 9999 or gt 0000 stops the PID2 calculation Bias Load this register to add a bias to the output the value must be between 000 4095 and added directly to My 984 Enhanced Instructions 281 Register Function 4x9 4x10 4x11 4x12 4x13 4x14 4x15 4x16 4x17 Top Node High Integral Windup Limit Load this register with the upper limit of the output value between 0 4095 where the anti reset windup takes effect the updating of the integral sum is stopped if it goes above this value this is normally 4095 Low Integral Windup Limit Load this register with the lower limit of the output value between 0 4095 where the anti reset windup takes effect this is normally 0 High Engineering Range Load this register with the highest value for which the measurement device is spanned e g if a resistance tem perature device ranges from O 500 degrees C the high engineering range
98. Copro register database from 984 f dbread 528 Read Copro register database from 984 System Deferred DX Functions Name Code Function f config 500 Obtain Copro configuration data not used but must be present f d dbwr 501 Write Copro register database from 984 fd dbrd 502 Read Copro register database from 984 f dgets 515 Issue dgets on comm line f dputs 516 Issue dputs on comm line f sprintf 518 Generate a character string f sscanf 519 Interpret a character string f egets 520 IEEE 488 gets function f eputs 521 IEEE 488 puts function f_ectl 522 IEEE 488 error control function A CALL block runs a deferred DX when the middle input is enabled and an imme diate DX when no middle input is programmed The 4x register in the middle node is the first in a block of registers to be passed to the Copro for processing the number of registers in the block is defined in the bottom node GM 0984 SYS 984 Loadable Instructions 299 21 6 MBUS and PEER The S975 Modbus II Interface option modules use two loadable function blocks MBUS and PEER MBUS is always used to initiate a single transaction with another device on the Modbus II network PEER may initiate identical message transactions with as many as 16 devices on Modbus II at one time In an MBUS transaction you are able to read or write discrete or register data ina PEER transaction you may only write register data Controllers on a Modbus II network can handle up to
99. Discrete Input Modules cece eee eee 44 500 Series Discrete Output Modules 00 cee e eee eee 44 500 Series Special Purpose I O Modules 200 00e0ees 45 A120 Series I O Modules 000s cee eee ete ees 46 A120 Discrete Input Modules esee 46 A120 Discrete Output Modules 0 cece eee eee eee 46 A120 Combo Modules 0 cent teeta 46 A120 Analog Input Modules 0 eee e eee eee 47 A120 Analog Output Module 00 cece eee eee 47 Table of Contents GM 0984 SYS A120 Special Purpose Module 0 cece eee eee eee 47 300 Series I O Modules sssseessseese eens 48 300 Series Discrete Input Modules 2 0 cece eee eee 48 300 Series Discrete Output Modules 000 c cece eee 48 300 Series Analog I O Modules ccc cece eee esses 49 300 Series BCD Register I O Modules 00ceeeeeeees 49 Chapter 4 984 Communications Capabilities 51 Modbus Capabilities 0 0 ete 52 The Modbus Port Parameters 00 cece eee ee eee 52 Modbus Port Pinouts for the P230 Programming Panel 54 Modbus Port Pinouts for the P190 Programming Panel 55 Modbus Port Pinouts for an IBM XT 0 c cette eee 56 Modbus Port Pinouts for a Modicon Comm Modem 57 A Modbus Network eee epe ean be ee eased ere e e
100. EN of stop bits 01 of data bits per character 08 Presence of a keyboard NONE Simple ASCII input A 4x value representing the first Only a 984B Controller supports simple of 32 registers for simple ASCII input NONE ASCII input Simple ASCII output A 4x value representing the first Only 984A and 984B Controllers support of 32 registers for simple ASCII output NONE simple ASCII output Special Functions SKIP functions allowed YES NO NO Battery coil A Ox reference reflecting the Once a battery coils is placed in a Configura status of battery backup system 00000 tion Table it cannot be removed Timer register A 4x register set aside to hold a number of 10 ms clock cycles NONE TOD clock A 4x register the first of eight reserved for time of day values NONE Loadables Instructions Install loadable PROCEED or CANCEL Various 984 controllers support different kinds Delete loadable s DELETE ALL DELETE ONE CANCEL of loadable instruction sets Make sure that your loadables and controller are compatible Writing Configurator Data to System Memory Write data as specified PROCEED or CANCEL NONE PROCEED will overwrite any previous Configuration Table data 5 5 The Traffic Cop Table Just as a programmable controller needs to be physically linked to I O modules in order to become a working control system the references in user logic need to be linked in the system architecture to the signals received from the input modules and sent to the output modules
101. ER OLLU Sy O68 gu u tame HOB EIE 1 01 3 060 Beeen 2 1 3 Using Industry standard PCs as Programming Panels A set of 5 25 in and 3 5 in disks is available to emulate the P190 software on a standard DOS based PC and the integrated MODSOFT package is also available on both 5 25 in and 3 5 in distribution disks These software packages can be run on any IBM AT or true AT compatible PC GM 0984 SYS Optional and Peripheral Control Devices 17 2 2 The P965 Data Access Panel The AS P965 000 Data Access Panel DAP is a hand held troubleshooting de vice It connects to a Modbus port or ASCII DAP port on a 984A or 984B on any Modicon controller that supports Modbus communication 2 2 1 Physical Design The P965 DAP is a lightweight device with a 64 character liquid crystal display LCD screen and a keypad with alphanumeric and function keys vovve 18 Optional and Peripheral Control Devices GM 0984 SYS 2 2 2 How the P965 Can Be Used A P965 DAP is a very effective tool for monitoring and troubleshooting the control ler With it you can Oo Start and stop the controller r1 Monitor the register and discrete values in user memory and state RAM rj Enable disable and force discrete inputs and coils o Display and modify the contents of holding registers o Display and set communication parameters for the Modbus ports The P965 can be used on the shop floor to monitor the status of a 984 program
102. F ON OFF ON ON 1 gt 2 1 lt 2 1 2 The top node comprises two consecutive 4x registers that contain one FP value The middle node contains four consecutive 4x registers registers 4x and 4x 1 contain the second FP value which will be compared to the top node value 4x 2 and 4x 3 are not used FP Square Root ON block performs FP V on FP value in top node FP value FP result EMTH 23 ON operation performed successfully The top node comprises two consecutive 4x registers that contain an FP value The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the result of the FP square root operation 264 984 Enhanced Instructions GM 0984 SYS Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Change Sign ON block changes the FP value ON operation performed sign of FP value in top successfully node FP value EMTH 24 The top node comprises two consecutive 4x registers that contain an FP value The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the negative of the top node FP value Load FP Value of x ON operation performed successfully ON block
103. I O Channels 1 and 2 Second Word 49 74 Remote I O Channels 3 and 4 First Word 4A 75 Remote I O Channels 3 and 4 Second Word 4B GM 0984 SYS Monitoring System Status 181 14 3 Accessing S901 Status Data with a Programming Panel Status words 1 11 can be found in sequential memory starting at absolute memory location 65 hex The system keeps a status block pointer in absolute memory location 6F hex it points to a table of addresses 76 words long Ad dresses 2 76 point to status words 1 75 respectively Procedure Locating a Status Word with a Programming Panel Step 1 Read the pointer stored in location 6F Step 2 Add the status word number to the pointer Step 3 If the most significant hex digit of the pointer is gt 8 add E8000 to the pointer as follows Pointer Address 8xxx FOxxx 9xxx F1xxx Axxx F2xxx Xxx last three digits of the Bxxx F3xxx pointer become last three Cxxx FAxxx digits of the address Dxxx F5xxx Exxx F6xxx For example pointer B984 becomes Fxxx F7xxx address F3984 Step 4 Read the pointer from the pointer table Step 5 Ifthe most significant hex digit of the pointer is gt 8 convert the address using the procedure described in Step 3 Step 6 Read the status word from system memory 182 Monitoring System Status GM 0984 SYS 14 4 Accessing S901 Status Data with a P965 DAP Status words 1 11 can be found in sequential memory starting at absolute memory location 300101 decimal The s
104. IELD 1 SHIELD 1 TX 2 RX 2 RX 3 TX 3 RTS 4 DTR 4 CTS 5 GROUND 5 DSR 6 DSR 6 GROUND 7 RTS 7 DTR 20 CTS 8 Each of these RIO Interface devices can support two ASCII devices As many as 32 ASCII devices can be run from a 984 controller two drop from up to 16 drops 3 4 2 ASCII Device Programming Two three node function blocks READ and WRIT are provided in the Executive PROM of all 984 controllers with RIO capabilities The function blocks are im plemented in user logic to handle ASCII message passing between the remote devices and controller memory 34 984 I O Subsystems GM 0984 SYS ASCII messages may be written to 984 system memory from an ASCII input de vice a keyboard a bar code reader a pushbutton panel at a remote drop viaa READ function the controller may send messages to an ASCII display device a CRT a printer via a WRIT function 984 Controller 1211311 with S908 ASCII Input Keyboard E and Display Terminal 800 Series I O m P S NOOC 800 Series I O I 200 Series I O aj v o OU P453 with J290 000 Y ASCII Paper Printer An ASCII editor in your panel software allows you to create edit and manage a li brary of ASCII messages to be read or written over the RIO communication link These ASCII messages reside in a table that occu
105. Ladder Logic Subroutines GM 0984 SYS 19 2 JSR The JSR instruction causes the logic scan to jump to a specified subroutine in the last unscheduled segment of user logic JSR is a two node function block ON enable source the source subroutine JSR 2222 Copies current state of the top input ON error The top node contains a source that indicates the subroutine to which the logic scan is to jump It may be specified as o A constant value useful in the range 1 255 o A single holding register 4x containing a value between 1 255 The bottom node indicates that this is a JSR function and contains a string of four question marks you must insert the constant value 1 in this node GM 0984 SYS Note You can use a JSR block anywhere in user logic even within a subroutine The process of calling one subroutine from another sub routine is called nesting The system allows you to nest up to 100 subroutines however we recommend that you use no more than three nesting levels You may also perform a recursive form of nesting called ooping wherein the subroutine recalls itself Ladder Logic Subroutines 239 19 3 LAB The LAB instruction is used to label the starting point of a subroutine in the last unscheduled segment of user logic This instruction must be programmed in row 1 column 1 of a network in the last unscheduled segment of user logic LAB is a one node function block
106. M Reset the step __ max of Error a validation pointer to 0 steps check has failed 308 984 Loadable Instructions GM 0984 SYS The top node contains one 4x register used to hold the current step number The maximum number of steps allowed is specified in the bottom node The value in this register is referenced by the DRUM instruction each time it is solved If the middle input to the block is ON the contents of the register in the top node are in cremented to the next step in the sequence before the block is solved The middle node contains the first 4x register in an implied register table of step data information the first six registers in the table hold constant and variable data required to solve the block Reference Register Name Description 4x masked output data Loaded by DRUM each time the block is solved contains the contents of the current step data regia ter masked with the output mask register 4x 1 current step data Loaded by DRUM each time the block is solved contains data from the step pointer causes the block logic to automatically calculate register offsets when accessing step data in the step data table 4x 2 output mask Loaded by user before using the block DRUM will not alter output mask contents during logic solve contains a mask to be applied to the data for each sequencer step 4x 3 machine ID number Identifies DRUM ICMP blocks belonging to a specif ic machine configuration value range 0 99
107. M 0984 SYS tion table is specified in the bottom node A value of 0 in the pointer equals the first register in the table The bottom node indicates that the function is a register to table transfer instruc tion and specifies the table length it may range from 1 255 in 16 bit CPUs and from 1 999 in 24 bit CPUs An R gt T Example 30001 10001 40340 10002 00135 AEA pointer 10003 40340 source destination 30001 40341 40342 40343 max length 255 999 40344 40345 The first transition of 10001 copies 30001 to 40341 and increments the pointer value stored in 40340 to 1 its second transition copies 30001 to 40342 and incre ments the pointer value to 2 and so on through five transitions At the fifth transi tion which copies 30001 to 40345 and increments the pointer value to the table length the middle output passes power energizing coil 00135 No R T opera tions are possible while these two values are equal If after the second transition 10002 were to be energized the pointer value could not be changed All subsequent transitions of 10001 would cause the value in 30001 to be copied to 40343 When 10008 is energized the pointer will be reset to 0 GM 0984 SYS DX Move Functions 143 11 1 2 Table to Register Move The TR instruction copies the bit pattern of a register or 16 discretes located within a table to a spe
108. M 0984 SYS DX Matrix Functions 159 12 3 COMP The COMP instruction complements the bit pattern of one matrix changes all 0 s to 1 s and all 1 s to 0 s then copies the result into a second matrix all in the same scan COMP is a three node function block ON comple source Copies current state ment of the bit values in the top input the top node destination COMP matrix length The matrix specified in the top node is the data source it may be rj The first Ox in a table of output references rj The first 1x in a table of input references o The first 3x in a table of input registers oO The first 4x in a table of holding registers The matrix specified in the middle node is the destination for the complemented data it may be rj The first Ox in a table of output references oO The first 4x in a table of holding registers If the middle node entry is a Ox it counts as the one and only time that the refer enced coils may be used The bottom node indicates that this is a COMP function and specifies a matrix length that can range from 1 100 160 DX Matrix Functions GM 0984 SYS 12 3 1 A COMP Example a 40600 10001 s matrix a 40602 40600 1111111100000000 40601 1111111100000000 COMP matrix b before COMP 40602 1111111111111111 40603 0000000000000000 00002 matrix b after COMP 40602 0000000011111111 40603 0000000011111111 Whe
109. MWT Writes Extended Memory data Available in 984s with Modbus Plus Capabilities MSTR Reads writes and gets status of MB network operations Available in 984s with Subroutines Capabilities JSR Jumps the CPU from scheduled logic to a ladder logic subroutine LAB Labels the entry point for a ladder logic subroutine RET Returns the CPU from a subroutine to scheduled ladder logic Unavailable in Chassis Mount Controllers EMTH Performs extended math functions square root process square root log antilog and floating point functions Unavailable in Controllers that Support Modbus Plus CKSM Performs CRC 16 LRC straight or binary add checksum functions The following are available as loadables in some controllers Instruction Meaning HSBY Supports a Hot Standby control system MBUS PEER Supports Modbus I read write status capabilities CALL Supports C986 C996 Coprocessor capabilities DRUM ICMP Support drum sequencer applications MATH DMTH Perform some extende math functions in 984s that don t use EMTH FNxx Supports a user developed library of custom loadable functions EARS Supports an event alarm reporting system For more details regarding loadable instructions see Chapter 21 GM 0984 SYS The 984 Programmable Controllers 13 Chapter 2 Optional and Peripheral Control Devices o Programming Panels o The P965 Data Access Panel o The Hot Standby Option Modules o The Coprocessing Option Modules o Optional Communica
110. Modicon 984 Programmable Controller Systems Manual GM 0984 SYS Rev B May 1991 MODICON Inc Industrial Automation Systems One High Sireet North Andover Massachusetts 01845 DOK Table of Contents Chapter 1 The 984 Programmable Controllers Modicon s Family of Programmable Controllers 05 Phe 984 Family 1 251 cocco pre t PROPOS es Controller Compatibility sseessse eee 984 Controller Performance and Capacity Characteristics How a 984 System Provides Application Control sssssssss The 984 Control Architecture An Overview ellus Reliability and Maintainability 0 cee eee eee P190 Style Panel Software Support 0 cece eee ee eee Standard Panel Software Editors 0 cece cece eee Special Loadable Software 000 c cece cece cnet eees MODSOFT Panel Software Support 0 0c cece eee eee ee Sequential Function Charts sasse 0c cece cece eects MODSOFT Macro 4 535 dtes eed ale tum dnte Rb oe ds MODSOFT Operating Modes 0 ccc eee eee eee Overview of the 984 Instruction Set 0 cece cee eee Chapter 2 Optional and Peripheral Control Devices Programming Panels 2 00 cece eee teen eee eee TIheP290 adh Phileas a ud eed een E The P190 Panels usce Rel RE Rr MEER ead EUR Using Industry standard PCs as Programming Panels
111. O Queue go SRCH o BLKM o A Recipe Storage Example GM 0984 SYS DX Move Functions 141 11 1 Moving Registers and Tables The 984 standard instruction set provides three function blocks for moving register and table data one for moving register values to a table R T one for moving table values to a single register T R and one for moving values from one table to another T T Each of these register transfer instructions is a three node function block and the system can accommodate the transfer of one register per scan 11 1 1 Register to Table Move The R T instruction copies the bit pattern of a register or of 16 discretes to a specific register located in a table ON move data and increment pointer source I Copies top input maximum pointer value table length register ON freezes the pointer pointerto pointer table length destination table ON resets the pointer RT table length The top node can be rj The first Ox in a table of coils or discrete outputs rj The first 1x in a table of discrete inputs rj The first 3x in a table of input registers rj The first 4x in a table of holding registers The value in the middle node is a pointer to the register in the destination table where data will be moved in this scan The pointer is a 4x register and the first register in the destination table is 4x 1 The number of registers in the destina 142 DX Move Functions G
112. OFF and stores the number of hundredths of seconds it has taken for the counter to transition 500 times 1000 scans in register 40003 The value stored in 40002 40003 in the DIV block is then divided by 100 and the result which represents logic solve time in ms is stored in register 40005 Note 10001 is controlled via a DISABLE or a hard wired input if you are running the program in optimized mode a hard wired input is re quired to toggle 10001 GM 0984 SYS Ladder Logic Overview 107 Note The maximum amount of time allowed for a scan is 250 ms if the scan has not completed in that amount of time a watchdog timer in the controller s CPU stops the application and sends a timeout error message to the programming panel display The maximum limit on scan time protects the controller from entering into infinite loops 108 Ladder Logic Overview GM 0984 SYS 7 8 Maximizing Throughput The way that the 984 architecture simultaneously solves logic and services I O drops optimizes system throughput Throughput is the time it takes for a signal received at a field sensing device to be sent as an input to the controller pro cessed in ladder logic and returned as an output signal to a field working device Throughput time may be longer or shorter than a single scan it gives you a realis tic measure of the system s actual performance 7 8 1 The Ideal Throughput Situation If the default order of solve table is in place the syste
113. ON operation performed sion successfully integer value FP value and result EMTH 10 The top node comprises two consecutive 4x registers that contain a double preci sion integer value to be added to a FP number The middle node comprises four consecutive 4x registers 4x and 4x 1 contain the FP number to be added in the operation and 4x 2 and 4x 3 contain the FP sum of the operation Integer FP ON block subtracts double preci ON operation performed FP value from integer sion successfully value integer value FP value and difference EMTH 11 The top node comprises two consecutive 4x registers that contain a double preci sion integer value from which an FP number is to be subtracted The middle node comprises four consecutive 4x registers 4x and 4x 1 contain the FP number that is subtracted from the integer value in the top node and 4x 2 and 4x 3 contain the FP difference of the operation GM 0984 SYS 984 Enhanced Instructions 257 Integer x FP ON block multiplies double preci ON operation performed integer and FP values sion successfully integer value FP value and product EMTH 12 The top node comprises two consecutive 4x registers that contain a double preci sion integer value to be multiplied by an FP number The middle node comprises four consecutive 4x registers 4x and 4x 1 contain the FP number that multiplies the i
114. Remote I O Drop Interfaces 0 cee cece eee 33 ASCII Communication at the Remote I O Drops 0000 34 RIO Interfaces that Support ASCII Communication 34 ASCII Device Programming 60 0 eee e cece eee eee 34 The ASCII Operator Keypad 0 cece eee e eee eee 35 Overview of I O Support for 984 Controllers 000 cee eee 36 800 Series I O Modules 0 0 teen eee eee 37 800 Series Discrete Input Modules cece eee ees 37 800 Series Discrete Output Modules 0c cece eee eee 37 800 Series Analog Input Modules 0 cece eee eee ees 38 800 Series Analog Output Modules cece eee ees 38 800 Series Special Purpose I O Modules 202 00e0ees 39 800 Series Intelligent I O Modules 0000 c cece eee eens 40 800 Series MMI Operator Panels 0020 e cece eeeeees 40 Power Supplies for Local and Remote 800 Series I O Drops 4 200 Series I O Modules 0 2 0 c cece cette eene 42 200 Series Discrete Input Modules 2 cece cece ees 42 200 Series Discrete Output Modules 0c cece eee eee 42 200 Series Analog Input Modules 0 0 cece eee eee 43 200 Series Analog Output Modules eee e eee eee 43 200 Series Special Purpose I O Modules 000 00e0ees 43 500 Series I O Modules 0 eae 44 500 Series
115. SYS Second Word Drop Cumulative Error Counter Cable A High byte bits 1 8 At least one error has occurred in words 173 175 Low byte bits 9 16 No response count Third Word Drop Cumulative Error Counter Cable B High byte At least one error has occurred in words 176 178 Low byte No response count For any 984 controller where drop 1 is reserved for local I O status words 182 184 are used as follows Word 182 Displays local drop status 1 2 3 4 5 6 7 8 9J 10 11 12 13 14 15 16 Always 0 Number of times a Module has All Modules Healthy been seen as Unhealthy Counter Rolls Over at 255 Word 183 Used as a 16 bit I O bus error counter Word 184 Used as a 16 bit I O bus retry counter 14 13 1 Converting a Word to a Drop or Word word 182 3 quotient and remainder quotient 1 drop remainder 1 word 14 13 2 Converting a Drop or Word to a Word drop x 3 word 178 word GM 0984 SYS Monitoring System Status 203 Chapter 15 Bypassing Networks with SKP Warning SKP is the most dangerous instruction in the 984 instruction set and it should be used carefully If inputs and outputs that normally effect control are unintentionally skipped or not skipped the result can create hazardous conditions for personnel and application equipment
116. TX RTS 4 4 DTR CTS 5 5 GROUND DSR 6 6 DSR GROUND 7 4 7 RTS NC 8 8 CTS DTR 20 9 NC GM 0984 SYS 984 Communications Capabilities 57 4 6 A Modbus Network A Modbus network is a master slave network and all communications are initiated by a single Modbus master device The master device requires a modem such as the J478 which transforms digital data into an FM analog signal and the net work slave controllers each require a receptor modem such as a J878 a S978 or another J478 to demodulate FM to digital 4 6 1 Network Capacity A Modbus network has one master device that originates all communications to as many as 247 slave nodes throughout the plant or in remote locations the to tal number of nodes supported depends on the communications equipment used A Modicon J478 master modem for example may support up to 32 slaves over a twisted pair cable network Additional J478s may be used as repeaters to extend the number of slave nodes on the network beyond 32 4 6 2 Communication Media Slave nodes may be linked via four wire twisted pair cable in a local installation up to 15 000 ft 4572 m long They may also be linked via common carrier phone line radio microwave over remote distances or linked locally via other dedicated lines A well defined set of network guidelines is available for systems that use Modicon modems and Belden 8777 twisted pair cable see Modbus System Planning User s Manual ML M
117. Unassigned The m subfield in error code 6mss is an index into the routing information indicating where an error has been detected a value of 0 indicates the local node a 2 the second device on the route etc The ss subfield in error code 6mss is ss Hex Value Meaning GM 0984 SYS No response received Program access denied Node offline and unable to communicate Exception response received Router node data paths busy Slave device down Bad destination address Invalid node type in routing path Slave has rejected the command Initiated transaction forgotten by slave device Unexpected master output path received Unexpected response received Modbus Plus Master Function 221 17 3 Read and Write MSTR Functions An MSTR Write function transfers data from a master source device to a specified slave destination device on the network An MSTR Read function transfers data from a specified slave source device to a master destination device on the net work Read and Write use one data master transaction path and may be com pleted over multiple scans 17 3 1 Control Block Utilization The contents of the nine registers in the top node of the MSTR block contain the following information when you implement a Read or Write function Control Block MSTR Register Register Function Content 4x Operation type 1 Write 2 Read 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2
118. X operation is 999 GM 0984 SYS 984 Opcode Assignments 89 6 3 Opcode Assignments for Other Functions Several 984 controllers have additional instructions in their System Executive These instructions use the following opcodes Opcode Representations for Other Executive Instructions Binary Hexadecimal Instruction 01011110 5E PID2 11011110 DE JSR 10111110 BE LAB 11111110 FE RET 01111111 7F EMTH 10011111 9F BLKT 10111111 BF CKSM or MSTR 11011111 DF TBLK MSTR and CKSM share the same opcode and are mutually exclusive EPROM based in structions MSTR is included in the Executive of any 984 controller that employs Modbus Plus and the CKSM instruction is not included on these Executives CKSM is provided in several 984 controllers that do not implement Modbus Plus Note If your controller contains these additional functions in its Sys tem Executive the opcodes are hard coded in the system firmware and they cannot be altered The PID2 BLKT TBLK MSTR and CKSM instructions are also avail able as loadable instructions for some 984 controllers when a control ler does not support these functions in any version of its Executive firmware The loadable versions of these instructions are assigned the same opcodes Various ladder logic instructions are available only in loadable software packages When instructions are loaded to a controller they are stored in RAM on page 0 in system memory They are not resident on th
119. a matrix of holding registers The middle node is the destination which can be rj The first Ox in a matrix of output references o The first 4x in a matrix of holding registers The bottom node indicates that the function is a BROT operation and specifies a matrix length that may range from 1 100 Warning BROT will override any disabled coils within a destina tion table without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the BROT instruction 166 DX Matrix Functions GM 0984 SYS 12 7 How to Report Status Information A simple ladder logic construction of a STAT block and a SENS block allows you to report system status information as part of your User Logic program In this ex ample bit 12 of register 40201 is being checked All other bits may be checked using the same method 40201 4 00012 STAT 40201 43 a SENS 00003 00001 The top input to the STAT block receives power on every scan because it is at tached to the power rail Status information is recorded in registers 40201 40243 Register 40201 holds the controller status which needs to be in terpreted Since each bit s state represents different information you can use a SENS block to report incoming bit status Connect the top output of the STAT block to the top input of the SENS block This construction lets you check and report th
120. able controller monitors the state of field devices by receiving signals from its input modules solves a user logic program via its CPU component and directs further field device activity by sending control signals to its output modules 1 3 1 The 984 Control Architecture An Overview All controllers in the 984 family share a common processing architecture which comprises o A memory section that stores user logic state RAM and system overhead in battery backed CMOS RAM and holds the system s Executive firmware in nonvolatile ROM o A CPU section that solves the user logic program based on the current input values in state RAM then updates the output values in state RAM o An O processing section that directs the flow of signals from input modules to state RAM and provides a path over which output signals from the CPU s logic Solve are sent to the output modules o A communications section that provides one or more port interfaces These in terfaces allow the controller to communicate with programming panels host computers hand held diagnostic tools and other peripheral master devices as well as with additional controllers and other nodes on a communications network 6 The 984 Programmable Controllers GM 0984 SYS 984 Controller CPU Memory State RAM User Logic Register Ins Ladder logic Register Outs networks amp Io Discrete Ins segmen
121. ack 0 eee ee eee 199 Table of Contents GM 0984 SYS Converting from Drop and Rack to Word 0 cece eee eee 199 Status Words for the MMI Operator Panels susueues 199 908 I O Communication Status Words 00 cece eee eee 200 Converting a Word to a Drop or Word 10 2 2 cece eee 203 Converting a Drop or Word to a Word 02 000 eee eee eee 203 Chapter 15 Bypassing Networks with SKP 205 cli REV POVERI nate an cviva on aan E 206 A Simple SKP Example ssssssseeeeee teens 207 Chapter 16 Extended Memory Capabilities 209 Extended Memory File Structure 0 e eee ees 210 How Extended Memory Is Stored in User Memory 211 Extended Memory Control Table 0 eens 212 Format of the Extended Memory Status Word 00005 213 Extended Memory Write Function 0 c cee eee eee 214 Extended Memory Read Function cc eee eee eee eee 215 Chapter 17 Modbus Plus Master Function 217 MSTR Block Overview 00 cece cece eee es 218 MSTR Function Error Codes 00 ccc e eect eee esses 220 Read and Write MSTR Functions 00 eee eee eee eee eee 222 Control Block Utilization s s nnana c ccc cence eens 222 Get Local Statistics MSTR Function 0 0 cece eee eee 223 Control Block Utilization 0 cc cece eee ees 223 Cle
122. alue in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Arcsine of an Angle in Radians ON block calculates FP value ON operation performed the arcsine of FP value successfully in top node arcsine of FP value EMTH 29 The top node comprises two consecutive 4x registers that contain an FP value in dicating the sine of an angle between 71 2 1 2 radians This value the sine of an angle must be in the range of 1 0 1 0 if not oO The arcsine is not computed g An invalid result is returned o An error is flagged in EMTH function 38 268 984 Enhanced Instructions GM 0984 SYS The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the arcsine in radians of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Arc Cosine of an Angle in Radians ON block calculates FP value ON operation performed the arc cosine of FP successfully value in top node arc cosine of FP value EMTH 30 The top node comprises two consecutive 4x registers that contain an FP value in dicating the cosine
123. and 4x 1 contain the integer value that divides the FP value in the top node and 4x 2 and 4x 3 contain the FP quotient of the operation GM 0984 SYS 984 Enhanced Instructions 259 Integer FP Comparison ON block compares _ double preci integer and FP values sion integer value ON operation performed successfully L ON integer value gt FP value FP value when bottom out is OFF EMTH ON integer value lt FP value 16 when middle out is OFF Middle Bottom Value Output Relationship ON OFF FP OFF ON lt FP ON ON FP The top node comprises two consecutive 4x registers that contain a double preci sion integer value to be compared with an FP number The middle node comprises four consecutive 4x registers 4x and 4x 1 contain an FP value to be compared with the integer value in the top node and the other two nodes are not used The result of the comparison is displayed by the state of the middle and bottom outputs 260 984 Enhanced Instructions GM 0984 SYS FP to Integer Conversion ON block converts FP Ep value 1 ON operation performed value to integer value successfully integer value 0 positive integer value EMTH 1 negative integer value 17 The top node comprises two consecutive 4x registers that contain an FP value in 32 bit FP format The middle node contains four consecutive 4x registers 4x and 4x 1
124. ar Local Statistics MSTR Function 000e cece cease 224 Control Block Utilization 0 00 c eects 224 Write Global Data MSTR Function n sssaaa saene eee e eee eens 225 Control Block Utilization 0 c ccc eens 225 Read Global Data MSTR Function 0 ccc cece e eee 226 Control Block Utilization 0 0c cece teens 226 Get Remote Statistics MSTR Function 000e cece eee 227 Control Block Utilization nsaan cece ete 227 Clear Remote Statistics MSTR Function 000 0ee ceca 228 Control Block Utilization 0c cc cece eens 228 Network Statistics iiare eese es 229 GM 0984 SYS Table of Contents xi xii Chapter 18 CKSM ser tx pa n ER x 233 OKSM cae dee awe eae UN EST 234 Chapter 19 Ladder Logic Subroutines 237 Using Ladder Logic Subroutines 0 00 cece eee eee 238 The Value of Subroutines 0 cece eee 238 Where to Store Subroutines in Ladder Logic 005 238 JSR e a aiea aa lt eed Caled ei atn a etm E noce en DOSE 239 LAB uitheteeRTesREPCR RUM PW Ret eub 240 RET a eeschaetuads aat et de ue eat do TOL 241 A Subroutine Example ssssssseessee eene 242 Some Cautionary Notes About Subroutines 0000000 244 Chapter 20 984 Enhanced Instructions 245 Moving Blocks to Tables and Tables to Blocks 00005 246 Capabilities of the EMTH Bl
125. ary aux 120 220VAC 5000 5000 300 7500 mA AS P802 001 primary aux 120 220AC 2500 10100 500 9500 mA AS P884 001 primary aux 120 220VAC 5000 10100 500 11000 mA AS P800 003 primary aux 120 22VAC 2500 10100 500 9500 mA AS P890 000 primary inan 115 230VAV 3000 3000 250 N A AS P892 000 RIO interface 24VDC AS P830 000 auxiliary only a i 5000 6000 500 N A 24VD Total maximum of 5V I O 4 3V I O and 5V Interface cannot exceed 13500 mA Total maximum of 5V I O and 4 3V I O cannot exceed 5000 mA Total maximum of 5V I O 4 3V I O and 5V Interface cannot exceed 16100 mA Total maximum of 5V I O and 4 3V I O cannot exceed 3000 mA Total maximum of 5V I O and 4 3V I O cannot exceed 6000 mA A slot mount 984 controller provides the primary power supply for its local I O drop auxiliary power supplies listed above may be used in secondary housings Primary Power Supplies for a Local 800 Series I O Drop I O Power in mA Total Maximum Model Voltage 5V 4 3V 5V Power in mA PC 0984 785 120 220VAC 8000 6000 500 8000 780 685 680 24VDC PC 0984 485 120 220VAC 3000 3000 250 3000 480 385 381 380 24VDC 984 I O Subsystems 41 GM 0984 SYS 3 8 200 Series I O Modules 200 Series I O modules may be used at remote I O drops in conjunction with any chassis mount slot mount or host based 984 controller they cannot be used at local drops The 200 Series provides discrete in discrete out ana
126. at increments in seconds TO 1 Timer that increments in tenths of a second T 01 Timer that increments in hundredths of a second Data Transfer DX Move Functions R T Register to table move T R Table to register move TT Table to table move BLKM Block move FIN First in operation to a queue FOUT First out operation from a queue SRCH Table search STAT Programmable controller health status DX Matrix Functions AND OR XOR COMP CMPR MBIT SENS BROT SKP Logical AND of two matrices Logical inclusive OR of two matrices Logical exclusive OR of two matrices Logical complement of one matrix Logical compare of two matrices Logical bit modify Logical bit sense Logical bit rotate A skip function 12 The 984 Programmable Controllers GM 0984 SYS The following instructions may be available in standard executive loadable or executive upgrade form depending on controller type Instruction Meaning TBLK Moves a block of data from a table to another specified block area BLKT Moves a block of registers to specified locations in a table PID2 Performs proportional integral derivative control functions The following are standard in some Executives and unavailable in others Instruction Meaning Available with 984s that Support Remote I O READ Reads data from an ASCII device to 984 memory WRIT Sends data from a 984 to an ASCII device Available in 984s with Extended Memory XMRD Reads function for 984s with Extended Memory X
127. ate register offsets when accessing step data in the step data table 4x 2 input mask Loaded by user before using the block contains a mask to be ANDed with raw input data for each step masked bits will not be compared masked data are put in the masked input data register 310 984 Loadable Instructions GM 0984 SYS Reference Register Name Description 4x 3 masked input data Loaded by ICMP each time the block is solved con tains the result of the ANDed input mask and raw input data 4x 4 compare status Loaded by ICMP each time the block is solved con tains the result of an XOR of the masked input data and the current step data unmasked inputs that are not in the correct logical state cause the associated register bit to go to 1 non zero bits cause a mis compare and middle output will not go ON 4x 5 machine ID number Identifies DRUM ICMP blocks belonging to a specif ic machine configuration value range 0 9999 0 block not configured all blocks belonging to same machine configuration have the same ma chine ID number 4x 6 profile ID number Identifies profile data currently loaded to the se quencer value range 0 9999 0 block not con figured all blocks with the same machine ID num ber must have the same profile ID number 4x 7 steps used Loaded by user before using the block DRUM will not alter steps used contents during logic solve contains between 1 255 for 16 bit CPUs and 1 999 for 2
128. ating point integer subtraction 257 259 GM 0984 SYS floating point integer comparison 260 FNxx function block 306 FNxx loadable function block part number 293 forcing OFF a discrete value in ladder logic 125 forcing ON a discrete value in ladder logic 125 FOUT function 148 function codes for the CALL instruction 298 G get Modbus II statistics with MBUS 304 H holding registers 4x 74 Hot Standby function 294 hot standby option modules AM R911 000 20 AS S911 800 20 HSBY command register 295 loadable instruction 294 part numbers 292 status register 296 HSBY function for Hot Standby option mod ules 20 l 1 0 bits per drop 5 per system 5 1 O modules analog in 31 200 Series 43 300 Series 49 800 Series 38 analog out 31 200 Series 43 300 Series 49 BCD register 300 Series 49 combo A120 Series 46 discrete in 30 200 Series 42 300 Series 48 500 Series 44 800 Series 37 A120 Series 46 47 discrete out 30 200 Series 42 Index 323 300 Series 48 500 Series 44 800 Series I O 37 A120 Series 46 47 intelligent 31 800 Series 40 local 31 32 remote 31 33 special purpose 31 200 Series 43 500 Series 45 800 Series 39 ICMP loadable function 310 part numbers 293 immediate DX operations with a coproces sor option 25 inline connectors for Modbus Plus 61 instruction set enhanced set listing 101 select standard listing 100 standard listing 99 instruct
129. bles 246 moving tables to registers 246 MSTR function 218 for Modbus Plus communications 27 for Modbus Plus logical network 61 MSTR loadable function part number 292 MUL function 136 multiplication floating point 263 floating point and integer values 258 integer 136 mv See manipulated variable GM 0984 SYS N natural logarithm calculation in floating point 273 negative numbers in a floating point calcu lation 255 265 negative transitional contacts 121 network Modbus Plus communication 61 node in ladder logic 84 nodes in ladder logic 96 on a Modbus Plus network 60 normally closed contacts 120 normally open contacts 120 O opcodes 84 for enhanced and loadable functions 90 91 for ladder logic elements and non DX functions 85 for standard DX functions 88 in custom loadable designs 307 OR function 156 order of solve table 108 overhead services as a part of scan time 105 P P190 Programming Panels 17 P965 Modbus DAP 18 PEER 64 PEER loadable function 27 302 part numbers 292 performance characteristics 4 performance characteristics for 984s 5 Pi loading the floating point value of 265 PID2 algorithm 278 function 280 positive transitional contact 121 power supplies for remote I O drops 41 primary power supply modules for remote O drops 41 process square root calculation using EMTH 253 using MATH 313 process variable in a PID2 function 276 programming panel
130. cess panel or as the port to a multi controller master slave network where a single master device can initiate commu nications with up to 247 slave nodes 4 1 1 The Modbus Port Parameters All chassis mount slot mount and micro controllers provide at least one Modbus port as a serial communications capability The communication parameters for your Modbus port s may be set by switches on the controller or via the panel soft ware depending on your controller type There are three communication parame ters oO Communication mode the protocol or bit structure of the message transmis sions either ASCII or RTU Remote Terminal Unit Oo Baud the data transmission speed measured in bits s rj Parity a method of verifying the accuracy of a data transmission using an ad ditional bit in the message to make the sum of the 7 bits EVEN or ODD 4 1 1 1 Communication Modes In ASCII mode a Modbus port handles messages composed of bytes containing one start bit seven data bits one parity bit and two stop bits ASCII Mode _ _ detabits logic 1 start arity stop stop bit 1 2 3 4 5 6 7 pany P logic 0 bit 172 52 984 Communications Capabilities GM 0984 SYS ASCII mode uses a restricted character set and character based message fram ing and may be used for communicating with computers operating systems packet networks or other networking devices tha
131. ch follow the state RAM table on page F in system memory The history disable tables are generated from the bottom up in the fol lowing manner Word 0001 Output History Bits Input History Bits Output DISABLE Bits Input DISABLE Bits Word 2048 GM 0984 SYS 984 Memory Allocation 77 5 4 The Configuration Table The configuration table is one of the key pieces of overhead contained in system memory It comprises 128 consecutive words and provides a means of accessing information defining your control system capabilities and your user logic program With your programming panel software you can access the configurator editor which allows you to specify the configuration parameters such as those shown on the following page for your control system A Caution When you make a change in an existing 984 configura tion table and write the change to system memory you may erase your ladder logic traffic cop and ASCII message table This may occur if you change the number of Discrete inputs e Discrete outputs Input registers Holding registers e I O drops O modules Logic segments Modbus ports e ASCII messages Total ASCII message words Back up your application program and ASCII messages before writing the new configuration information Reenter your traffic cop then relocate the backed up logic and ASCII message table to the newly configured system memory When a controller s m
132. cific holding register ON move data and increment pointer source maximum pointer value table length table pointer to ON freezes the pointer source table T R table length ON resets the pointer I Copies top input pointer table length The top node can be rj The first Ox in a table of coils or discrete outputs rj The first 1x in a table of discrete inputs rj The first 3x in a table of input registers rj The first 4x in a table of holding registers The value in the middle node is a pointer to the register in the source table that will be moved in this scan The pointer is a 4x register and the destination regis ter is 4x 1 A value of 0 in the pointer equals the first register in the table The bottom node indicates that the function is one of the three register transfer in structions and specifies the length of the source table in the range 1 255 in 16 bit CPUs and 1 999 in 24 bit CPUs The number specifies the total number of registers to be transferred 144 DX Move Functions GM 0984 SYS A T R Example 40371 10001 40376 10002 00136 T R 00005 pointer 10003 40376 destination Source 40377 40371 40372 40373 40374 40385 The first transition of 10001 copies the contents of 40371 to register 40377 and in crements the pointer value stored in 40376 to 1 Th
133. circular buffer where they can be off loaded to a host MMI This message contains o A time stamp representing the time span from midnight to 24 00 hours in tenths of a second o A transition flag indicating that the event is either a positive or negative transi tion with respect to the event state o A number indicating which event has occurred 21 11 2 Host Controller Interaction The host MMI device must be able to read and write 984 data registers via the Modbus protocol A handshake protocol maintains integrity between the host and the circular buffer running in the 984 this enables the the host to receive events GM 0984 SYS 984 Loadable Instructions 317 asynchronously from the buffer at a speed suitable to the host while the controller detects event changes and load the buffer at its faster scan rate 21 11 3 The EARS Block EARS is a three node function block ON Handshake performed if state table Data in the buffer needed validation check performed pointer and and EARS operations proceed history table OFF Handshake performed if ON for one scan following needed and outstanding trans implied regs communications acknowl actions are completed and buffer A edgment from host table EARS Buffer Reset event table and top of registers Buffer full no events can node pointers are clearedto0 usedinbuffer e added until host off loads some or until Buffer Reset The top node contains t
134. contact passes power when its referenced coil or input is ON Normally Closed NH A normally closed contact passes power when its referenced coil or input is OFF Here is an example of how you might use two sets of normally open and normally closed contacts to create logic for a momentary pushbutton switch Physical Ladder Inputs Logic Input Module 10001 eral 10001 No Power Flow Pushbutton Open 10001 Passes Power 10002 Passes Power Input al 10002 Module Pushbutton Closed 10002 No Power Flow 120 Contacts Shorts and Coils GM 0984 SYS Positive Transitional 4th A positive transitional contact passes power for only one scan as the contact or coil transitions from OFF to ON ON _ OFF Controller State CLOSE ee a k Power Flow One Scan Negative Transitional AYE A negative transitional contact passes power for only one scan as the contact or coil transitions from ON to OFF ON OEE Controller State CLOSE ORF lt 1 Power Flow One Scan GM 0984 SYS Contacts Shorts and Coils 121 8 2 Vertical and Horizontal Shorts Shorts are simply straight line connections between contacts and or function blocks A vertical short connects contacts or function blocks one above the other in a net work column Vertical shorts can also be used to connect inputs or outputs in a function block to create either or conditions When two contacts are conne
135. cted by vertical shorts power is passed when one or both contacts receive power A ver tical short does not consume any user memory Horizontal shorts are used in combination with vertical shorts to expand logic with in a network without breaking the power flow A horizontal short consumes one word of memory in a 16 bit CPU and 1 5 words in a 24 bit CPU 8 2 1 An Either Or Example Horizontal and vertical shorts can be combined with relay contacts to create an either or condition in ladder logic Ladder Logic for an Either Or Example e Q 10001 10002 00001 lt The vertical short is part of i the node in which 10002 is 10003 programmed Horizontal short 122 Contacts Shorts and Coils GM 0984 SYS One line of logic contains two contacts 10001 and 10002 and the line below it contains one contact 10003 A horizontal short is placed beside contact 10003 and a vertical short connects the second line with the first line Power will pass through to energize coil 00001 if either contacts 10001 and 10002 are energized or if contact 10003 is energized GM 0984 SYS Contacts Shorts and Coils 123 8 3 Normal and Latched Coils A coil is a discrete output value represented by a Ox reference number Because output values are updated in State RAM by the controller s CPU a coil may be used internally in the logic program or externally via the Traffic Cop to a discrete output module Coils are either OFF or
136. cture Words are entered into the state RAM table from the top down in the following order Word 0001 ____ Always begins on a 16 word boundary 3x n Saas Always begins on a 16 word ae boundary 4x n Coil History Up Downcounter History Discrete DISABLE Word 2048 The discrete words come first in the top down entry procedure first the Ox words followed immediately by the 1x words The register values follow the blocks of 3x and 4x register values must each begin at a word that is a multiple of 16 For ex ample if you allocate five words for eighty Ox references and five words for eighty 1x references 5 words x 16 bits word 80 you have used words 0001 0010 Words 0011 0016 are then left empty so that the first 3x reference begins at word 0017 76 984 Memory Allocation GM 0984 SYS 5 3 1 The Required Minimum State RAM Values In a minimum configuration you must allocate Oo 48 Ox discrete references three words ir MODSOFT 16 0x discrete references one word in P190 P190 emulation software g 16 1x discrete references at least one word Hj One 3x register reference one word o Three 4x register references three words in MODSOFT One 4x register reference one word in P190 P190 emulation software 5 3 2 Storing History and Disable Bits for Discrete Values For each discrete word allocated in state RAM two words are allocated in the his tory disable tables whi
137. d FP value raised to pow successfully er of integer value integer value and FP result EMTH 34 The top node comprises two consecutive 4x registers that contain a floating point value The middle node contains four 4x registers register 4x must be 0 register 4x 1 contains an integer value 4x 2 and 4x 3 contain the FP result of the FP value being raised to the power of the integer value FP Exponential Function ON block calculates FP vale ON operation performed the exponential value of successfully FP value in top node FP result EMTH 35 The top node comprises two consecutive 4x registers that contain an FP value in the range 87 34 88 72 If the value is out of range the result will either be O or the maximum value but no error will be flagged The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the IEEE floating point format of the value in the top node 272 984 Enhanced Instructions GM 0984 SYS Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Natural Logarithm ON block calculates LlL ON operation performed the natural log of FP EP valle successfully value in top node natural log of FP value EMTH 36 The top node comprises two consec
138. d counter 52 LO Program slave input path C5 command processed counter HI Program slave input path C6 command processed counter 53 LO Program slave input path C7 command processed counter HI Program slave input path C8 command processed counter 232 Modbus Plus Master Function GM 0984 SYS Chapter 18 CKSM 984 slot mount and micro controllers that do not support Modbus Plus come with a standard checksum CKSM instruction The CKSM instruction has the same opcode as the MSTR function and is not provided in executive firmware with the 984 controllers that support Modbus Plus GM 0984 SYS CKSM 233 18 1 CKSM CKSM allows you to program four types checksum calculations in ladder logic Oo Straight check o Binary addition check g Cyclical redundancy check CRC 16 o Longitudinal redundancy check LRC All checksum algorithms handle both 8 bit and 16 bit data if 8 bits are used the high order byte in the register must be 0 In a straight checksum calculation all bytes high and low are summed and the least significant eight bits are returned A binary checksum calculation is a 16 bit sum of all registers An LRC is a straight checksum that is then two s complemented A CRC 16 calculation is a 16 bit cyclical checksum performed on the least significant bytes of the source regis ters The CKSM instruction is a three node function block Calculate cksm of source Calculation complete source table k isdi result a
139. ddress assigned to the timer register Therefore when you assign the timer register you must choose a 4x register ad dress that has the next 5 50 registers free for this kind of applica tion 5 4 3 The Time of Day Clock When a 4x holding register assignment is made in the configurator for the time of day TOD clock that register and the next seven consecutive registers 4x 4x 7 are set aside in the configuration to store TOD information The block of registers is implemented as follows GM 0984 SYS 984 Memory Allocation 79 4x The control register 3 4 5 6 7 8 9 10 12 15 16 L 1 error 1 all clock values have been set 1 clock values are being set 4x 1 4x 2 Ax 3 4X 4 4x 45 4x 6 4x 7 1 clock values are being read Day of the week Sunday 1 Monday 2 etc Month of the year Jan 1 Feb 2 etc Day of the month 1 31 Year 00 99 Hour in military time 0 23 Minute 0 Second 0 59 59 Not used For example if you configured register 40500 for your TOD clock set the bits ap propriately as shown above then read the clock values at 9 25 30 on Tuesday July 16 1991 the register values displayed in decimal format would read 40500 40501 40502 50503 40504 40505 40506 40507 80 984 Memory Allocation 0110000000000000 3 Dec 7
140. de function block ON initiate source search 0 search from beginning pointer 1 search from last match SRCH table length Copies top input Match found The top node specifies the source table to be searched it may be rj The first 3x in a table of input references oO The first 4x in a table of holding registers The middle node must be a holding register 4x It is a pointer to the table being searched as specified in the top node The next consecutive register 4x 1 contains the value or bit pattern being searched for The bottom node indicates that this is a SRCH function and specifies a table length which may range from 1 100 150 DX Move Functions GM 0984 SYS 11 3 1 A SRCH Example Here we search a five register table for the register that contains the value 3333 40421 10001 40430 pasta ein cea sce cL Ur CR Q 10002 RCH 00142 00005 table to be searched 40421 1111 40430 pointer 40422 2222 404831 3333 value searched for 40423 3333 40424 4444 40425 5555 The source table is searched for a 3333 on every scan where 10001 transitions from OFF to ON If 10002 is OFF the SRCH function finds a match at register 40423 and stops searching for the remainder of the scan It sets the pointer value to 3 for one scan indicating that a match exists in table po
141. del Range of Channels Words l O AS B260 005 1 5VDC 4 0 4 AS B260 010 0 10VDC 4 0 4 AS B262 001 1 5VDC 4 20VDC 4 0 4 3 8 5 200 Series Special Purpose I O Modules Number Model Description of Inputs Words I O AS B239 001 Dual High Speed 2 2 2 Counter AS B258 101 16 to 1 Analog 16 0 1 MUX used with a B243 Module AS B281 001 Thermocouple 10 10 0 Module AS B283 001 RTD Input 8 8 0 Module GM 0984 SYS 984 I O Subsystems 43 3 9 500 Series I O Modules 500 Series I O modules may be used at remote I O drops in conjunction with any chassis mount slot mount or host based 984 controller they cannot be used at local drops The 500 Series provides discrete in discrete out and special pur pose I O modules 3 9 1 500 Series Discrete Input Modules Voltage Number Number Model Range of Inputs per Common AS B531 001 5 28VDC 4 Latched 2 AS B551 001 115VAC 4 Separate Commons AS B553 001 9 56VDC 4 True High 2 AS B557 001 5VDC TTL 4 2 AS B559 001 9 56VDC 4 True Low 2 Current Sink AS B561 001 290 150VDC 4 Separate Commons AS B565 001 18 30VAC 4 Separate Commons AS B569 001 30 60VAC 4 Separate Commons AS B583 001 Proximity 8 2 Switch Intrinsically Safe 3 9 2 500 Series Discrete Output Modules Voltage Number Number Model Range of Outputs per Common AS B550 001 115VAC AS B552 001 9 56VDC AS B554 001 220VAC AS B556 001 5VDC TTL AS B558 001 9 56VDC Current Sink AS B5
142. der logic 242 up counter 129 using a segment scheduler to improve throughput 112 using a segment scheduler to increase port service 115 using asegment scheduler for controlled segments 114 using multiple networks for material han dling 69 exclusive OR function 156 exponential calculation in floating point 272 extended memory control table 212 in a 984B Controller 210 storage in user memory 211 F FIFO queues in a DX table 148 FIN function 148 floating point addition 262 floating point arccosine calculation 269 floating point arcsine calculation 268 floating point arctangent calculation 270 floating point common logarithm calculation 274 floating point comparison 264 floating point conversion degrees to radians 271 radians to degrees 271 floating point cosine calculation 267 floating point division 263 floating point error reporting 275 floating point exponential calculation 272 floating point format standard 255 floating point multiplication 263 floating point natural logarithm calculation 273 floating point number to integer power 272 floating point Pi 265 floating point sign change 265 floating point sine calculation 266 floating point square root 264 floating point subtraction 262 floating point tangent calculation 268 floating point integer addition 257 floating point integer conversion 261 floating point integer division 258 259 floating point integer multiplication 258 flo
143. der low order 0 fractional remainder value 2 overflow if the result gt 9999 1 decimal remainder a 0 value is returned DIV r value 2 0 result remainder The top node value 7 can be o A decimal ranging from 1 999 in a 16 bit CPU and from 1 9999 in a 24 bit CPU oO Two consecutive input registers 3x for the higher order digits and 3x 1 for the lower order digits Oo Two consecutive holding registers 4x for the higher order digits and 4x 1 for the lower order digits The middle node value 2 can be o A decimal ranging from 1 999 in a 16 bit CPU and from 1 9999 in a 24 bit CPU o An input register 3x o A holding register 4x The bottom node indicates that this is a DIV function and contains two holding registers 4x and 4x 1 The result of the division is stored in the first register and the remainder is stored in the second register The remainder may be ex pressed as a fraction or a decimal depending on whether the middle input is a 1 or a O GM 0984 SYS Standard Calculate Functions 137 10 5 A DIV Example Here is an example of a DIV operation where value 7 105 is divided by value 2 25 The result is stored in register 40270 and the remainder is stored in register 40271 00105 10001 00025 10002 DIV 40270 The result 4 is stored in register 40270 and the remainder 5 is stored in regis ter 40271 If 10002 is
144. devices isolates these signals from the controller and converts them into acceptable voltage levels that update the controller s State RAM An output module accepts electrical signals from the controller s state RAM iso lates these signals from the field and converts them into voltage or current levels necessary to activate working devices or indicator displays on the factory floor 3 1 2 I O Module Types Input and output modules are wired to industrial field devices that send or receive application data When you plan your I O layout match the electrical signal used in the I O modules with the signal used by the field device to which it is wired Modicon offers a wide range of I O modules a Discrete in which convert signals coming from field input devices such as pres sure switches limit and proximity switches or photo sensors into voltage levels that can be used by the controller o Discrete out which convert voltage levels generated by the controller s logic solving into output signals used by output field sensing devices such as relays lamps or solenoids Discrete input and output modules are available to support AC DC and TTL field input devices O Analog in which convert analog input signals coming from field input devices such as pressure level temperature or weight sensors into numerical data 30 984 I O Subsystems GM 0984 SYS that can be used by the controller this numerical data ranges from 0000 to 409
145. ding discretes using 16 bit CPUs up to 16 discretes word GM 0984 SYS 984 Loadable Instructions 301 21 6 2 PEER PEER is a three node function block that writes 4x registers to multiple nodes on the network up to 16 Enable a PEER transaction Repeat transaction in same scan control block data block PEER number of words to be read written I Transaction complete Transaction in progress or new transaction starting Error detected in transaction The top node is the first of 19 4x registers in the PEER control block Control Block Register Function 4x 4x 1 4x 2 4x 3 4x 4 4x 18 302 984 Loadable Instructions Indicates the status of the transactions at each device the leftmost bit being the status of device 1 and the rightmost bit the status of device 16 0 OK 1 transaction error Defines the reference to the first 4x register to be written to in the receiving device a 0 in this field is an invalid value and will produce an error the bottom output will go ON Time allowed for a transaction to be completed before an error is declared expressed as a multiple of 10 ms e g 100 indicates 1000 ms the default timeout is 250 ms The Modbus port 3 address of the first of the receiv ing devices address range 1 255 0 2 no transaction requested The Modbus port 3 address of the second of the receiving devices address range 1
146. e using that instruction cannot be ported to a 16 bit CPU or to a 984B Controller 984 Opcode Assignments 93 Chapter 7 Ladder Logic Overview o The Structure of Ladder Logic o Ladder Logic Elements and Standard Instructions o Additional Ladder Logic Instructions o DX MOVE and DX Matrix Functions o How Ladder Logic Is Solved o Scan Time o How to Measure Scan Time o Maximizing Throughput o The Order of Solve o Using the Segment Scheduler to Improve Critical I O Throughput o Using the Segment Scheduler to Improve System Performance o Using the Segment Scheduler to Improve Comm Port Servicing o Sweep Functions GM 0984 SYS Ladder Logic Overview 95 7 1 The Structure of Ladder Logic Ladder logic is a highly graphical easy to use programming language that uses relay equivalent symbology Its major structural components are segments net works and elements 7 1 1 Ladder Logic Segments A ladder logic program is a collection of segments As a rule the number of seg ments equals the number of I O drops being driven by the controller although in many cases there may be more segments than drops never more drops than segments A segment is made up of a group of networks There is no pre scribed limit on the number of networks in a segment the size is limited only by the amount of User Memory available and by the maximum amount of time avail able for the CPU to scan the logic 250 ms You can modify the order
147. e EPROM The loadable functions have the following opcodes 90 984 Opcode Assignments GM 0984 SYS Opcode Representations for 984 Loadable Instructions Binary Hexadecimal Loadable Instruction 11111111 FF HSBY 01011111 5F CALL FNxx or EARS non chassis mount 00011111 1F MBUS 00111111 3F PEER 11011110 DE DMTH 10111110 BE MATH or EARS for chassis mount only 11111110 FE DRUM 01111111 7F ICMP Note No two instructions with the same opcode can coexist on a controller As you can see several loadables have conflicting op codes ICMP is also in conflict with EMTH DMTH is in conflict with JSR DRUM is in conflict with RET and MATH is also in conflict with LAB 6 3 1 How to Handle Opcode Conflicts The easiest way to stay out of trouble is to never employ two loadables with con flicting opcodes in your user logic If you are using MODSOFT panel software it allows you to change the opcodes for loadable instructions The odutil utility in the Modicon Custom Loadable Software package SW AP98 GDA also allows you to change loadable opcodes this software package is not available for all 984 controllers see Section 21 1 A Caution If you modify any loadables so that their opcodes are different from the ones shown in this chapter you must use cau tion when porting user logic to or from your controller The op code conflicts that can result may hang up the target controller or cause the wrong function blocks to be executed
148. e com plete bit status on every scan GM 0984 SYS DX Matrix Functions 167 12 8 A Simple Table Averaging Example 40101 40202 40201 10006 40208 40204 00001 TR ADD ADD 00084 40202 40201 40201 40200 00003 40203 40201 DIV XOR AVERAGE 40301 40302 40301 00003 When input 10006 receives power the top input to the T R block receives power and the value in the first register in the table of registers 40101 40184 is copied into the middle node 40204 of the first ADD block The middle node 40203 in the DIV block holds the pointer value Because the top output of the T R block is passing power the first ADD block receives power causing the value copied to 40204 to be added to 40202 Register 40202 equals 0 to start This routine continues until the pointer value in the T R block 40203 equals the table length 84 The middle output in the T R block then passes power and the DIV block receives power The values in registers 40201 and 40202 are di vided by 84 the value in the middle node of the DIV block The result is placed in register 40301 and the remainder is placed in register 40302 Because the middle input of the DIV block is receiving power the remainder is expressed as a decimal The top output of the DIV block passes power and the XOR block receives power By using the XOR function to exclusively OR the values in mat
149. e second transition of 10001 copies 40372 to 40377 and increments the pointer value to 2 the third transition copies 40373 to 40377 and increments the pointer value to 3 the fourth transition copies 40374 to 40377 and increments the pointer value to 4 The fifth transition of 10001 copies 40375 to 40377 and increments the pointer value to 5 Because the pointer value now equals the table length the middle output passes power energizing coil 00136 No T R operations are possible while these two values are equal If after the second transition of 10001 10002 were to be energized the pointer value could not be changed All subsequent transitions of 10001 would cause the value in 40343 to be copied to 40377 When 10003 is energized the pointer is reset to 0 GM 0984 SYS DX Move Functions 145 11 1 3 Table to Table Move The T fT instruction copies the bit pattern of a register or 16 discretes from a po sition within one table to the same position in a second table of holding registers ON move data and increment pointer source table Copies top input maximum pointer value table length ON freezes the pointer pointerto pointer table length destination table ON resets the pointer TT table length The top node can be o The first Ox in a source table of coils or discrete outputs rj The first 1x in a source table of discrete inputs oO The first 3x in a source table of input registe
150. e station table bit map nodes 57 64 27 LO Token station table bit map nodes 1 8 HI Token station table bit map nodes 9 16 28 LO Token station table bit map nodes 17 24 HI Token station table bit map nodes 25 32 29 LO Token station table bit map nodes 33 40 HI Token station table bit map nodes 41 48 30 LO Token station table bit map nodes 49 56 HI Token station table bit map nodes 57 64 31 LO Global data present table bit map nodes 1 8 HI Global data present table bit map nodes 9 16 32 LO Global data present table bit map nodes 17 24 HI Global data present table bit map nodes 25 32 33 LO Global data present table bit map nodes 33 40 HI Global data present table bit map nodes 41 48 34 LO Global data present table bit map nodes 49 56 HI Global data present table bit map nodes 57 64 35 LO Receive buffer in use bit map buffer 1 8 HI Receive buffer in use bit map buffer 9 16 36 LO Receive buffer in use bit map buffer 17 24 HI Receive buffer in use bit map buffer 25 32 37 LO Receive buffer in use bit map buffer 33 40 HI Station management command processed initiation counter continued on next page GM 0984 SYS Modbus Plus Master Function 231 Modbus Plus Network Statistics concluded Word Byte Meaning 38 LO Data master output path 1 command initiation counter HI Data master output path 2 command initiation counter 39 LO Data mast
151. eds replacing Nine pin D shel subminiature receptacles that can be configured for RS 232C or RS 422 22 Optional and Peripheral Control Devices GM 0984 SYS 2 4 2 The C996 Copros for Slot Mount 984s Two coprocessor models are available for use with slot mount controllers the AM C996 802 Copro with two expansion slots and the AM C996 804 Copro with four expansion slots These copros are DOS based computer systems with a pro prietary high speed interface to 984 controller memory The C996 Copros can perform parallel application processing and immediate DX processing but not def erred DX processing see Section 2 5 The AM C996 802 consumes one and a half slots in a slot mount controller hous ing and the AM C996 804 consumes two and a half slots in the housing TA Green READY LED goes ON after power up to indicate that the device driver is loaded other uses of this LED are application dependent Green STATUS LED is application dependent Two 9 pin serial ports fully programmable for asynchronous communication A 37 pin floppy drive interface A keyboard port programmed to support a serial interface to an AT or AT compatible keyboard o AM C996 802 AM C996 804 The expansion slots can support various commercially available option cards The depth dimension of the C996 expansion slots limits your choice of option cards to half size IBM XT cards GM 0984 SYS Optional and Peripheral Control Devices 23 2 5 Enhancin
152. egisters in state RAM XMRD is a three node function block Activates read control block XMRD transfer active operation 0 clears offset to 0 destination 4 does not clear offset Error condition detected 0 abort on error XMRD 1 do not aborton 1 Passes power when XMRD complete error The top node is the first of six consecutive 4x registers to be used as the ex tended memory control block as described in Section 16 3 If you are in multi scan mode these six registers should be unique to this function block The middle node is the first 4x holding register in a table of registers that receive the transferred data from the 6x extended memory storage registers The bottom node identifies the function as an extended memory read and always contains the constant value 1 which cannot be changed GM 0984 SYS Extended Memory Capabilities 215 Chapter 17 Modbus Plus Master Function o MSTR Block Overview o MSTR Function Error Codes o Read and Write MSTR Functions o Get Local Statistics MSTR Function o Clear Local Statistics MSTR Function o Write Global Data MSTR Function o Read Global Data MSTR Function o Get Remote Statistics MSTR Function o Clear Remote Statistics MSTR Function o Network Statistics GM 0984 SYS Modbus Plus Master Function 217 17 1 MSTR Block Overview All 984 controllers that support a Modbus Plus communications capability have a special master MSTR instructio
153. emory is empty in a state called DIM AWARENESS you are not able to write a traffic cop or a user logic program Therefore the first pro gramming task you must undertake with a new controller is to write a valid config uration table using your configurator editor 78 984 Memory Allocation GM 0984 SYS 5 4 1 Assigning a Battery Coil A Ox coil can be set aside in the configuration to reflect the current status of the controller s battery backup system If this coil has been set and is queried it dis plays a discrete value of either 0 indicating that the battery system is healthy or 1 indicating that the battery system is not healthy 5 4 2 Assigning a Timer Register A 4x register can be set aside in the configuration as a synchronization timer It stores a count of clock cycles in 10 ms increments If this register is set and queried it displays a free running value that ranges from 0000 to FFFF hex with wrap around to 0000 Note f you are doing explicit address routing in bridge mode ona Modbus Plus network the location of the explicit address table in the configuration is dependent on the timer register address i e a timer register must be assigned in order to create the explicit address table The explicit address table can consist of from 0 10 blocks each block containing five consecutive 4x registers The address of first block in the explicit address table begins with the 4x register immedi ately following the a
154. eout constant 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RIO Redundant Cables 0 NO 1 YES RIO Timeout Constant In the Compact 984 145 Controller word 8 is used to store a numerical value that defines the upper limit of memory lo cations on page 0 where user logic can be placed This value is not user configurable and is used only by the pro gramming panel Word 9 Uses its four least significant bits to display ASCII message status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 Q 10 11 12 13 14 15 16 Mismatch Between Number of Messages and Pointers Invalid Message Pointer Invalid Message Message cksm Error Word 10 Uses its two least significant bits to display RUN LOAD DEBUG status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 I Debug 0 0 Run 0 1 Load 1 0 Word 11 is not used GM 0984 SYS Monitoring System Status 197 14 12 908 I O Module Health Status Words Status words 12 171 display I O module health status 170 171 Drop 1 Rack 1 Drop 1 Rack 2 Drop 1 Rack 3 Drop 1 Rack 4 Drop 1 Rack 5 Drop 2 Rack 1 Drop 2 Rack 2 Drop 32 Rack 4 Drop 32 Rack 5 Five
155. er 107 WRIT function 35 for ASCII communications 172 X XMRD function 215 XMWT function 214 XOR function 156 GM 0984 SYS
156. er output path 3 command initiation counter HI Data master output path 4 command initiation counter 40 LO Data master output path 5 command initiation counter HI Data master output path 6 command initiation counter 41 LO Data master output path 7 command initiation counter HI Data master output path 8 command initiation counter 42 LO Data slave input path 41 command processed counter HI Data slave input path 42 command processed counter 43 LO Data slave input path 43 command processed counter HI Data slave input path 44 command processed counter 44 LO Data slave input path 45 command processed counter HI Data slave input path 46 command processed counter 45 LO Data slave input path 47 command processed counter HI Data slave input path 48 command processed counter 46 LO Program master output path 81 command initiation counter HI Program master output path 82 command initiation counter 47 LO Program master output path 83 command initiation counter HI Program master output path 84 command initiation counter 48 LO Program master command initiation counter HI Program master output path 86 command initiation counter 49 LO Program master output path 87 command initiation counter HI Program master output path 88 command initiation counter 50 LO Program slave input path C1 command processed counter HI Program slave input path C2 command processed counter 51 LO Program slave input path C3 command processed counter HI Program slave input path C4 command processe
157. eration performed value 1 to FP value 2 FP valued successfully FP value 2 EMTH 32 The top node comprises two consecutive 4x registers that contain an FP repre sentation of the value of an angle in radians 270 984 Enhanced Instructions GM 0984 SYS The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the FP representation of the top node val ue converted to degrees Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Conversion of Degrees to Radians ON block converts FP pp value ON operation performed value 1 to FP value 2 successfully FP value 2 EMTH 33 The top node comprises two consecutive 4x registers that contain an FP repre sentation of the value of an angle in degrees The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the FP representation of the top node val ue converted to radians Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used GM 0984 SYS 984 Enhanced Instructions 271 FP Number Raised to an Integer Power ON block calculates FP value ON operation performe
158. erface from the ASCII device 2 An exception response from the RIO interface indicates bad data 3 A sequenced number from the addressed RIO interface differs from the expected value 4 There is a user register checksum error often caused by altering READ WRIT registers while the block is active An invalid port or message number has been detected A user initiated abort is indicated the bottom input of the READ WRIT block is energized No response from the drop indicates a communication error A node has aborted because of the use of the SKP function The ASCII message area has been scrambled Reload memory A port has not been configured in the traffic cop J892 only This error indicates an illegal ASCII request J892 only An unknown response has been received from the ASCII port J892 only An illegal ASCII element has been detected in user logic e g Duplicate Block The S901 or S908 RIO processor in the 984 is down 0 OU o00 4 oo Er 176 ASCII READ WRITE Functions eee Bits 11 6 J812 J892 Drop Error 11 The input from the ASCII device is not compatible with the specified format 10 There is an input buffer overrun data are being received too quickly at the J812 J892 RIO interface 9 A USART error has been detected a bad byte has been received at the J812 J892 RIO interface 8 An illegal format has been processed the format has not been received properly by the J812 J892 RIO interface
159. ers so that they may be used as inputs in PID2 oper ations see Section 20 8 For example if a value of 2000 is in a 30300 top node then v2000 0044 72 which is then multiplied by 63 9922 yielding a result of 2861 63 This result is placed in registers 40030 and 40031 in the middle node 40030 2861 40031 6300 Logarithm base 10 ON block performs source ON operation performed log x operation successfully result ON either an error or value out of range EMTH GM 0984 SYS 984 Enhanced Instructions 253 The top node comprises either two consecutive 4x holding registers or one 3x in put register If the source to be logged is five to eight digits long in the range 10 000 99 999 99 it is stored in the two consecutive 4x registers If the source is less than five digits long in the range 0 9 999 it is stored in register 4x 1 If you specify a 3x register in the top node the log calculation is done on only regis ter 3x a second register is implied but not used The middle node contains a single 4x holding register where the result is stored The result is expressed in a fixed decimal format 1 234 and is truncated after the third decimal position The largest number that can be calculated is 7 999 which is stored in the register as value 7999 Antilogarithm base 10 ON block performs source ON operation performed antilog x operation successfully result ON either
160. ers to be read or writ ten in a scan when the appropriate function block is powered range 0 9999 not to exceed number specified in maximum registers 4x 5 4x 4 offset Keeps a running total of the number of registers transferred thus far 4x 5 maximum registers Specifies the maximum number of registers that may be transferred when the function block is pow ered range O 9999 212 Extended Memory Capabilities GM 0984 SYS 16 3 1 Format of the Extended Memory Status Word The 16 bit values in the first word in the control table provide you with diagnostic information regarding extended memory O No power up error found 1 Power up diagnostic error Oz No parity error found 1 Parity error in extended memory 0 Extended memory exists 1 Nonexistent extended memory 0 Transfer not running 1 Busy r 0 Transfer in progress 1 Transfer completed 0 File boundary maintained 1 File boundary crossed O offset parameter OK 1 offset parameter too large 1 2 3 4 5 6 7 8 9j 10 11 12 13 14 15 16 Not used 0 State RAM OK 1 Nonexistent state RAM 0 No maximum registers parameter errors found 1 2 maximum registers parameter error 0 No offset parameter errors found 1 offset parameter error 0 No count parameter errors found 1 count para
161. es Multiport taps may be installed at each drop with additional ports for future device expansion at the drops A tap port terminator is used at each currently unused port 4 10 Distributed Control Processing You can establish a distributed control processing capability using an AS D908 1x0 module in an S908 style of remote I O communication system The D908 provides the interface to the high speed 1 5 Mbits s communication link A distributed architecture provides a tightly integrated system that transfers data and control information between the supervisor and the distributed controllers for inter locking and data collection A D908 module plugs into an option slot in a distributed 984 68x or 78x Control ler It communicates over the coaxial link with an S908 or S929 RIO Processor in the supervisor Up to 32 distributed controllers may be linked to the supervisory controller depending on that supervisor s RIO capabilities Supervisory 984 with 908 RIOP Distributed 984 Distributed 984 diu with D908 120 with D908 120 EVEL RE MEEI AMIEL 800 Se 800 Se ries ries O NUS yo gt i T i gt Distributed 984 Remote I O Drop with D908 120 with P810 amp J890 800 Se 800 Se ries ries 1 0 1 0 The supervisory controller sees the distribu
162. es 3 6 1 800 Series Discrete Input Modules Voltage Disc Number Power Draw mA Model Range Ins Common 5 0V 4 3V 5 0V Connector AS B803 008 115VAC 8 1 27 1 2 AS 8534 000 AS B805 016 115VAC 16 8 40 1 14 AS 8535 000 AS B807 032 115VAC 32 8 80 2 0 AS 8535 000 AS B809 016 230VAC 16 8 42 1 15 AS 8534 000 AS B817 116 115VAC 16 1 25 25 8 AS 8535 000 AS B817 216 230VAC 16 1 25 25 8 AS 8535 000 AS B821 008 10 60VDC 8 2 27 1 0 AS 8534 000 AS B825 016 24VDC 6 8 27 2 0 AS 8534 000 AS B827 032 24VDC 32 32 30 1 0 AS 8535 000 AS B829 116 5V TTL 16 16 27 1 0 AS 8534 000 AS B833 016 24VDC 16 8 27 2 0 AS 8534 000 AS B837 016 24VAC DC 16 8 40 1 15 AS 8534 000 AS B849 016 48VAC DC 16 8 40 1 15 AS 8534 000 AS B853 016 115VAC 16 8 40 1 15 As 8534 000 125VDC AS B881 001 24VDC 16 16 30 1 0 As 8534 000 The B881 Module must be addressed as one register IN 3x and one register OUT 4x 3 6 2 800 Series Discrete Output Modules Voltage Disc Number Power Draw mA Model Range Outs Common 5 0V 4 3V 5 0V Connector AS B802 008 115VAC 8 2 76 240 0 AS 8534 000 AS B804 016 115VAC 16 8 76 480 0 AS 8534 000 AS B806 032 115VAC 32 8 210 1 N A AS 8535 000 AS B808 016 230VAC 16 8 76 480 0 AS 8534 000 AS B810 008 115VAC 8 1 50 240 0 AS 8534 000 AS B814 108 Relay 8 1 107 800 0 AS 8534 000 AS B820 008 10 60VDC 8 2 90 80 0 AS 8534 000 AS B824 016 24VDC 16 8 32 260 0 AS 8534 000 AS B826 032 24VDC 32 32 90 1 0 AS 8535 000 AS B828 016 5V TTL 16 16 32 220 0
163. es coil 00137 No T T opera tions are possible while these two values are equal If after the second transition of 10001 10002 were to be energized the pointer value would be locked to 2 and all subsequent transitions of 10001 would cause the value in 30003 to be moved to register 40383 GM 0984 SYS DX Move Functions 147 11 2 Two Functions for Building a FIFO Queue The standard 984 instruction set provides two function blocks that are used to pro duce a first in first out queue The FIN instruction copies the bit pattern of any register or 16 discretes to the first register in a table of holding registers this reg ister is at the top of the queue FIN FIN FIN 1111 gt 1111 2222 2222 3333 gt 3333 Source Source 1111 Source 2222 1111 Stack Stack Stack The FOUT instruction moves the bit pattern of a holding register within a table to a destination register or to 16 discrete outputs the oldest data in the queue is moved first FOUT should be placed before FIN to ensure that the oldest data are removed from a full queue before the newest data are entered If the FIN block were to appear first the attempt to enter the new data would be ignored if the queue were full FIN 3333 4444 4444 2222 FOUT Source 3333 1111 1111 2222 Stack Desti
164. et 162 A CMPR Example broth Uie pb nated eae pev rr 163 Sensing and Modifying Bits in a Matrix 0 cee eee 164 Rotating a Bit Pattern i ceed eed ner e ee Rr et 166 How to Report Status Information 0 c cece eee ees 167 A Simple Table Averaging Example 0 cece cence ees 168 Chapter 13 ASCII READ WRITE Functions 169 READ Blades Seanad Murs Xe ae aM ee Dene eet 170 WRIT gt 2020 eienen E A edd b EPUM vada rd un 172 ASCII Message Handling sssssesss eese 174 How the READ WRIT Blocks Handle ASCII Messages 175 ASCI Error Status oes Ree kx e d EAR oe ede 176 Chapter 14 Monitoring System Status 179 The STAT FUNCOM oos ote e Lore dade dier bep uv dade 180 The S901 Status Table eee eee 181 Accessing S901 Status Data with a Programming Panel 182 Accessing S901 Status Data with a P965 DAP 000 183 901 Controller Status Words 0 cee eects 184 901 I O Module Health Status Words 00sec eee ee 188 901 RIO Communication Status Words 00 eee ee eee 190 The S908 Status Table eee 191 Accessing S908 Status Data with a Programming Panel 192 Accessing S908 Status Data with a P965 DAP 000 193 908 Controller Status Words 0c cece eee 194 908 I O Module Health Status Words 000 c eee eee ee 198 Converting from Word to Drop and R
165. every 1 7 s 280 984 Enhanced Instructions GM 0984 SYS Top Node Register Function 4x0 4x1 4x2 4x3 4x4 4x5 4x6 4x7 4x8 Top Node GM 0984 SYS Scaled PV Loaded by the block each time it is scanned a linear scaling is done on register 4x13 using the high and low ranges in 4x11 and 4x12 x13 4095 Truncate the resulting number at the decimal point discard all digits to the right of the decimal point and do not round off Scaled PV x 4x11 4x12 4x12 SP You must specify the set point in engineering units the value must be gt 4x11 and gt 4x12 My Loaded by the block every time the loop is solved it is clamped to a range of 0 4095 making the output compatible with an analog out put module the manipulated variable register may be used for further CPU calculations such as cascaded loops High Alarm Limit Load a value in this register to specify a high alarm for PV at or above SP enter the value in engineering units within the range specified by 4x11 and 4x12 Low Alarm Limit Load a value in this register to specify a low alarm for PV at or below SP enter the value in engineering units within the range specified by 4x11 and 4x12 Proportional Band Load this register with the desired proportional constant in the range 5 500 the smaller the number the larger the proportional contribution a valid number is required in this register for PID2 to operate Reset Time
166. f discrete outputs or coils discrete inputs input registers and holding registers available for application control These inputs and outputs are placed in a table of 16 bit words in an area of sys tem memory called state RAM 5 2 1 A Referencing System for Inputs and Outputs The system displays the various types of inputs and outputs using a reference numbering system Each reference number has a leading digit that identifies its data type followed by a string of digits that defines it unique location in state RAM Ox Adiscrete output or coil It can be used to drive a real output through an output module or to set one or more in ternal coils in State RAM A specific Ox reference may be used only once as a coil in a logic program its status may be used multiple times to drive contacts 1x Adiscrete input Its ON OFF status is controlled by an in put module It can be used to drive contacts in the logic program 3x Aninput register This register holds numerical inputs from an external source for example a thumbwheel entry an analog signal or data from a high speed counter A 3x reg ister can hold 16 consecutive discrete signals which may be entered into the register in either binary or binary coded decimal BCD format 4x An output holding register It may be used to store nu merical decimal or binary information in State RAM or to send the information to an output module 6x Used to store binary information i
167. f two local nodes set the high byte to a value of 1 See Section 17 10 for the listing of available network statistics 224 Modbus Plus Master Function GM 0984 SYS 17 6 Write Global Data MSTR Function The Write global data function transfers data to the comm processor in the current node so that it can be sent over the network when the node gets the token All nodes on the local network link can receive this data This operation takes one scan to complete and does not require a data master transaction path 17 6 1 Control Block Utilization The contents of the first three registers in the top node of the MSTR block are used when you implement a Write global data function Control Block MSTR Register Register Function Content 4x Operation type 5 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2 Length Specifies the number of registers from the data area to be sent to the comm processor the value of the length must be lt 32 and must not exceed the size of the data area 4x 4 Routing 1 If this is the second of two local nodes set the high GM 0984 SYS byte to a value of 1 Modbus Plus Master Function 225 17 7 Read Global Data MSTR Function The Read global data function gets data from the comm processor in any node on the local network link that is providing global data This operation may require multiple scans to complete if no global data are currently available from the
168. f when disabling coils data transfer functions that allow coils in their destination nodes recognize the current ON OFF state of all coils whetheer they are disabled or not and cause the logic to respond accordingly If you are expecting a disabled coil to re main disabled in the DX function your application may experi ence unexpected and undesireable effects 8 3 3 Forcing Discretes ON and OFF The panel software also provides FORCE ON and FORCE OFF capabilities When a coil or discrete input has been disabled the only way you can change its state from OFF to ON is with FORCE ON and the only way to change from ON to OFF with FORCE OFF When a coil or input is enabled it cannot be forced ON or forced OFF GM 0984 SYS Contacts Shorts and Coils 125 Chapter 9 Counters and Timers o Up Counters and Down Counters o Three Kinds of Timers o A Real Time Clock Example GM 0984 SYS Counters and Timers 127 9 1 Up Counters and Down Counters Two counter instructions are available UCTR and DCTR for up counting and down counting Both are designed to count control input transitions from OFF to ON either up to or down from a counter preset value Each is a two node function block structured as follows OFF ON t counter accumulated count 0 for DCTR initiates counter preset accumlated count counter preset for UCTR O reset accumulated count gt 0 for DCTR 1 enabled DOTHIUCTR accumulated count counter pre
169. fied proportional integral derivative function Enhanced Math Three Node Function EMTH Performs 38 math operations including floating point math oper ations and extra integer math operations such as square root Enhanced DX Move Instructions Three Node Functions TBLK Moves a block of data from a table to another specified block area BLKT Moves a block of registers to specified locations in a table The PID2 TBLK and BLKT blocks are available in the 984A B X chassis mount con trollers only as loadable functions not in firmware In controllers that offer these instructions as standard features the instructions are stored in the system Executive firmware GM 0984 SYS Ladder Logic Overview 101 7 4 DX MOVE and DX Matrix Functions 7 4 1 MOVE Functions DX MOVE functions copy 16 bit words of data from one memory area to another The copied data can then be operated on and the original data remain intact A group of consecutive 16 bit registers is called a table The minimum table length is 1 i e one word or one register The maximum table length depends on the DX function and on the type of controller 16 or 24 bit CPU Groups of 16 discretes can also be placed in tables The reference number used is the first discrete in the group and the other 15 are implied The number of the first discrete must be of the first of 16 type 00001 10001 00017 10017 00033 10088 etc Some DX move functions use a register to
170. first followed by the 16 bit CPUs The capacity of a controller is a function of the number of discrete and register points available in state RAM a discrete point uses one bit while a register analog point requires 16 bits Notice that the discretes and registers are implemented in two different areas of system memory in state RAM and in real world I O locations as defined by the 984 traffic cop The registers and discretes available in state RAM may be used for programming I O internal coils and data registers the registers and discretes available through the traffic cop can be used only for programming local or remote I O points In some of the smaller cpacity controllers the traffic cop limits the maximum number of I O bits and the total number of discrete I O points to num bers below what is available in state RAM The additional discretes and registers from state RAM may be used in the logic program for internal coils and data stor age buffers but they cannot be mapped to I O points 4 The 984 Programmable Controllers GM 0984 SYS 984 Programmable Controller Performance and Capacity Characteristics 984 Hardware Logic Solve CPU User State RAM Maximum I O Maximum I O Total Max Drops Model Implementation ms Kword Size Logic Size Regs Discretes Bits per Drop Bits System Discrete I O per System 984B Chassis mount 0 75 24 bits 32K 64K 9999 8192 1024 in 1024 out 32768 in 32768 out 8192 in 8192 out 32 R S908 256 in 256
171. g Your Processing Environment with a Copro Both the VRTX based C986 Copro and the DOS based C996 Copros can com municate with the controller in two different modes application mode and imme diate DX mode Only the C986 Copro can communicate with the controller in deferred DX mode 2 5 1 Application Mode The C986 and C996 Copros can run programs in application mode in parallel with the 984 CPU exchanging data with the controller at the end of scan EOS SCAN 1 SCAN gt 984 CPU COPRO Logic Scanning Application Processing How a Copro Handles Application Processing in Parallel with the 984 CPU 2 5 2 Immediate DX Processing The C986 and C996 Copros can run standard and customized C routines that are initiated or called by ladder logic a loadable CALL function block described in Chapter 21 is provided for this purpose 24 Optional and Peripheral Control Devices GM 0984 SYS When a Copro suspends application processing for a short interval and dedicates itself to the solution of a CALL function it is performing in immediate DX mode A typical immediate DX function might be a floating point math calculation SCAN 1 COPRO gt How a Copro Handles Immediate DX Processing 2 5 3 Deferred DX Processing Because of the multitasking capability inherent of the VRTX Operating System the C986 can also call deferred DX functions simultaneously with application
172. g them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the BLKM instruction 152 DX Move Functions GM 0984 SYS 11 5 A Recipe Storage Example You can use ladder logic to write specific process programs or recipes store each in a unique table then write a general process program and store it in anoth er working table The recipe tables must be structured with similar information in corresponding registers if a heating temperature is in the third register in one recipe table it should be in the third register in all recipe tables Recipes can be pulled into the generic process program with BLKM functions LENNY e 10101 10102 10103 40201 BLKM 00008 e 40109 10102 10101 10103 40201 BLKM 00008 no N N 40117 101 10101 10102 0103 1010 010 40201 BLKM 00008 The process is controlled with three input switches 10101 10102 and 10103 To run process A turn on 10101 and leave 10102 and 10103 off When input 10101 is energized it passes power through normally closed contacts 10102 and 10103 A BLKM function moves the recipe for process A from registers 40101 40108 to registers 40201 40208 This table of registers is a working table with each register controlling a part of the general process By using one working table you can control the output for three separate processes with only one p
173. gment Scheduler Status Tables Other Diagnostics Configuration Table Data Exchange Code 24 bits _ The 984B can be configured for either 32K or 64K words of user logic using the configurator editor in your panel software If you use 64K pages 0 and 1 which contain 24 bit words are used if you choose 32K only page 0 is used If page 1 is not used for optional user logic in a 984B it may be used for Extended Memory along with pages 2 and 3 Note Pages 2 and 3 contain 16 bit words as do all pages except pages 0 and 1 in a 24 bit machine GM 0984 SYS Extended Memory Capabilities 211 16 3 Extended Memory Control Table Two additional three node instructions are included in the 984B executive firm ware to be used for manipulating extended memory files XMWT for writing data into extended memory files and XMRD for reading data from extended memory to state RAM Both these instructions use a table of six 4x holding registers called the extended memory control table Reference Register Name Description 4x status word Contains diagnostic information about extended memory see illustration on next page 4x 1 file number Specifies which of the extended memory files is currently in use range 1 10 4x 2 start address Specifies which 6x storage register in the current file is the starting address 0 60000 9999 69999 4x 3 count Specifies the number of regist
174. he MSTR block contain the following information when you implement a Get remote statistics function Control Block MSTR Register Register Function Content 4x Operation type 7 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2 Length Starting from an offset the number of words of statistics to be obtained from a remote node the value of the length must be gt 0 lt total number of statistics available 54 and must not exceed the size of the data area 4x 3 Offset Specifies an offset value relative to the first available word in the statistics table the value must not ex ceed the number of statistic words available 4x 4 5 Routing 1 2 3 Designates the first through fifith routing path 6 7 8 4 5 addresses respectively the last nonzero byte in the routing path is the destination device The remote comm processor always returns its complete statistics table when a request is made even if the request is for less than the full table The MSTR function then copies only the amount of words you have requested to the desig nated 4x registers Note You need to understand Modbus Plus routing path procedures before programming an MSTR block A full discussion of routing path structures is given in Modbus Plus Network Planning and Installa tion Guide GM MBPL 001 GM 0984 SYS Modbus Plus Master Function 227 17 9 Clear Remote Statistics MSTR Function The Clear remote
175. he first of 64 consecutive 4x registers The first two of these registers contain values that specify the location and size of the current state table The the remaining 62 registers are available to contain the history table oO 4x is the indirect pointer to the current state table e g if the register contains a value of 5 then the state table begins at register 40005 Oo 4x 1 contains a value in the range 1 62 that specifies the number of regis ters in the current state table o 4x 2 is the first register of the history table and the remaining registers allo cated to the top node may be used in the table as required the history table can provide monitoring for as many as 992 contiguous events if 16 bits in all the 62 available registers are used If all 62 registers are not required for the history table the extra registers may be used elsewhere in the program for other purposes but they will still be found by a Modbus search in the top node of the EARS block 318 984 Loadable Instructions GM 0984 SYS The middle node contains the first in another series of consecutive 4x registers The first five registers are implied and the rest contain the circular buffer The cir cular buffer uses an even number of registers in the range 2 100 Oo 4x contains a value that defines the maximum number of registers the circular buffer may occupy Oo 4x 1 contains the Q take pointer the pointer to the next register where
176. he middle node is the first word or register in the data table it may be rj The first Ox in a table of output references o The first 4x in a table of holding registers The bottom node indicates that the function is either a SENS or MBIT operation and specifies a matrix length that may range from 1 255 in 16 bit CPUs and from 1 600 in 24 bit CPUs The number represents registers or groups of 16 discretes for example 200 3200 bits Warning MBIT will override any disabled coils within a destina tion group without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the MBIT instruction GM 0984 SYS DX Matrix Functions 165 12 6 Rotating a Bit Pattern The BROT instruction rotates or shifts the bit pattern of a matrix The bits shift one position per scan BROT is a three node function block ON shift bit position source Copies the current state in source matrix of the top input 0 register starts at the left 1 register starts at the right destination Sense of exiting bit 0 exiting bit falls out of the register BROT 1 exiting bit wraps to the start matrix length of the rigister The top node is the source node which can be rj The first Ox in a matrix of output references o The first 1x in a matrix of input references o The first 3x in a matrix of input registers o The first 4x in
177. he network 4 7 2 The Logical Network Nodes on a Modbus Plus network function as peer members of a logical ring gaining access to the network upon receipt of a token frame When a node holds a token it can initiate message transactions with selected destinations mes sages may be addressed to any node on the network The vehicle for initiating a message is the MSTR instruction an instruction that is standard on 984 control lers that support Modbus Plus With the MSTR block you define source and des tination routing information for each message 4 7 3 The Physical Network The network medium is two wire twisted pair shielded cable laid out in a sequen tial multidrop path directly between successive nodes Use Belden type 9841 cable available from Modicon in rolls of 100 ft 97 9841 100 500 ft 97 9841 500 and 1000 ft 97 9841 01K Taps and splitters are not allowed A connector is attached to the cable at each node site and is plugged into a 9 pin Modbus Plus port on each node Use AS MBKT 185 terminating connectors at the two ends of a link and AS MBKT 085 inline connectors at all other node sites These connectors are available from Modicon 4 7 4 Adding and Deleting Nodes from the Network If your 984 controller is a new or replacement node device on an active Modbus Plus network you do not need to disable other devices on the network in order to install the new device Simply disconnect the local drop cable and reconnect
178. he primary 800 Series I O housing with controller In the primary 800 Series I O housing with controller In the primary 800 Series I O housing with controller Built in I O bus with side to side connec tors between controller and other modules In primary DTA hous ing with controller Up to five housings supported Up to five housings supported Up to five housings supported Up to two housings supported Up to two housings supported Up to 14 I O modules supported Up to 18 I O modules supported in up to four DTA housings Because the I O modules reside in a separate housing from the 984X Controller the I O modules must receive their power from one or more independent slot mount power sup ply modules 32 984 I O Subsystems GM 0984 SYS 3 3 Remote I O When remote I O is supported the 984 controller may support several drops in some cases as many as 32 In aremote I O configuration an RIO processor in the controller is connected via a coaxial cable system to an RIO interface device at each remote drop All 984 controllers that support remote I O have been designed to drive 800 Se ries I O at the remote drops Several option modules and or field modification kits are available that allow you to drive installed bases of 200 and 500 Series I O at remote drops as well 3 3 1 Remote I O Drop Interfaces At each remote drop is a remote I O RIO interface device that communicates over the coa
179. he status of a coil 00056 if the coil is ON segment 2 logic will be activated in the scan and if the coil is OFF the segment will not be solved in the scan I O servicing is still performed regardless of the conditional status Here is how the MODSOFT segment scheduler would show the resulting or der of solve table Service Comm Insert Delete CnstSwp MinScan Quit Fl F2 F3 F4 F5 F6 F7 F8 F9 L SEGMENT SCHEDULER Number of Drops 3 Min Register Constant Sweep OFF Scan Time ms 4 Ref Seg Drop Drop Number Type Number Sense ment Input Output Nr 1 CONTINUOUS 01 01 01 2 CONTINUOUS 03 03 03 3 CONTROLLED 00056 ON 02 02 02 4 CONTINUOUS 03 03 03 5 EOL An Order of Solve Table Rescheduled for a Controlled Logic Segment GM 0984 SYS Ladder Logic Overview 115 7 12 Using the Segment Scheduler to Improve Comm Port Servicing When you find that the frequency of standard end of scan servicing of communi cation ports option processors or system diagnostics is inadequate for your application requirements you can increase service frequency by inserting one or more reset watchdog timer routines in the order of solve table Each time this routine is encountered by the CPU it causes all communication ports to be serv iced and causes the system diagnostics to be run Here is how the MODSOFT segment scheduler would show an order of solve table where the comm ports are serviced after each segment in the
180. hers Standard Instructions for Select 984s Instruction Meaning ASCII Communication Instructions Three Node Functions Standard with All 984s that Support Remote I O Drops READ Reads data entered at an ASCII device into 984 Memory WRIT Sends a message from the 984 controller to an ASCII device Ladder Logic Subroutine Instructions One and Two Node Functions Standard with Slot Mount and Micro 984s JSR Jumps from scheduled logic scan to a ladder logic subroutine LAB Labels the entry point of a ladder logic subroutine RET Returns from the subroutine to scheduled logic Checksum Instruction Three Node Function Standard on Slot Mount and Micro 984s that Don t Provide Modbus Plus CKSM Calculates any of four types of checksum operations CRC 16 LRC straight CKSM and binary add Network Communication Initiation Instruction Three Node Function Standard with All 984s that Provide Modbus Plus MSTR Specifies a function from a menu of networking operations The MSTR block is available in the 984A B X chassis mount controllers only as a load able function not in firmware All standard elements and instructions are stored in the system Executive firmware 100 Ladder Logic Overview GM 0984 SYS Additional instructions are available for some 984 controllers on an Enhanced Executive PROM Enhanced Instructions for Select 984 Controllers Instruction Meaning PID Instruction Three Node Function PID2 Performs a speci
181. his is a BLKT or TBLK function and specifies a number of 4x registers in a destination block within the table The range is from 1 100 the overall size of the destination table is a function of the number of 4x registers currently available Warning BLKT is a powerful function If your logic does not confine the pointer to a desired range all the registers in your 984 controller may be corrupted by the data in the source node 246 984 Enhanced Instructions GM 0984 SYS 20 2 Capabilities of the EMTH Block EMTH provides you with double precision math capabilities additional integer math capabilities such as square root and logarithm calculations and a set of floating point FP arithmetic functions In all the block allows you to select 38 ex tended math functions using a code number in the bottom node EMTH is a three node function block Top In top node Top Out Middle In middle node Middle Out EMTH Bottom In function code Bottom Out 1 38 The top node requires two consecutive registers usually 4x holding registers but in the integer math cases either 4x or 3x registers The middle node requires either two four or six consecutive registers depending on the function you are implementing Use 4x holding registers The bottom node identifies the block as the EMTH function and provides a func tional selection mechanism for the block Enter a constant value in the range 1 38 to i
182. in segment 1 40102 00801 BLKM 00001 40100 00815 00816 star 00001 Network 2 Must be segment 1 40100 00813 00814 00705 BLKM 00001 F e 00715 00813 00208 ie Co 00716 00813 00209 Network must not be in Segment 1 The first BLKM function transfers the HSBY status register 40102 to internal coils 00801 The STAT block which is enabled if the other controller is in stand by mode sends one status register word from the standby controller to a reverse transfer register 40100 in the primary controller GM 0984 SYS 984 Loadable Instructions 297 21 5 CALL Blocks for the 984 Coprocessors A CALL instruction activates an immediate or deferred DX function from a library of functions defined by function codes The Copro copies the data and function code into its local memory processes the data and copies the results back to Controller memory see Section 2 4 CALL is a three node function block Enable an function r Immediate DX function complete immediate code DX CALL source table 984 should continue CALL to scan CALL block length of Error in immediate DX function regardless of Copro source table state An Immediate DX CALL Block Enable a deferred function I Deferred DX function complete DX CALL code Deferred DX mode selected source table Deferred DX function active CALL leng
183. in which logic is solved with the segment scheduler an editor available with your panel software that allows you to adjust the or der of solve table in system memory With some 984 controllers you may also create an unscheduled segment that contains one or more ladder logic subrou tines which can be called from the scheduled segments via the JSR function 7 1 2 Ladder Logic Networks The networks that comprise the ladder logic segment s have a clearly defined structure Each network is a small ladder diagram bounded on the left by a power rail and on the right by a rail which by convention is not displayed Within the rails the network holds seven rungs or rows and eleven columns The 77 intersections of the rungs and columns are called nodes Logic elements contacts coils horizontal and vertical shorts and function block instructions are inserted in the nodes of a network Logic elements and instructions which are the fundamental building blocks of ladder logic can occupy the whole 77 node network area or just a portion of it 96 Ladder Logic Overview GM 0984 SYS T 10 Element columns maximum BE Coils 1 2 3 4 5 6 7 8 9 10 11 A UU v 7 Rungs Any mix of relays contacts M Linkedin timers counters math or matrix function blocks Ly v y 3 In some panel software programming packages the seven nodes in the 11th col umn are reserved for di
184. indus trial plant via twisted pair cable A Modbus Plus network operates at a data trans fer rate of one million bits s Modbus Plus networks may be used for oO Data transfer between controllers rj Data transfer between controllers and host computers u Programming of controllers Uploading downloading and archiving of application programs from a host u 4 7 1 Network Capacity The network comprises one or more communication links one comm link may support up to 32 peer devices nodes by using an RR85 Repeater you can join two links to support up to a maximum of 64 Modbus Plus nodes on a network One communication link may be up to 1500 ft 450 m long Additional repeaters up to three between any two nodes may be used to extend the network dis tance the maximum cable length between any two nodes is 6000 ft 1800 m ina linear configuration The minimum cable length between nodes is 10 ft per Link Max End RR85 Ea RR85 End Node Repeater Ea Repeater Node I 6000 ft 1800 m 64 Nodes per Network Max gt lt 32 Nodes gt Maximum Linear Configuration in a Modbus Plus Network 60 984 Communications Capabilities GM 0984 SYS Each node on the network must be assigned a unique address in the range 1 64 the address is generally set via a special DIP switch located on the controller or on the Modbus Plus Adaptor card inserted in a host computer Repeaters do not use addresses on t
185. ion set compatibility 3 integer to floating point conversion 256 integral control in a PID2 function 277 intersegment transfer IST as a part of scan time 104 IST 105 J J878 Modbus Modem 26 JSR function 239 jump to a subroutine 239 L LAB function 240 labeling the start of a subroutine 240 ladder logic structure 96 latched coils 124 loadable functions developing your own custom blocks 306 loadable functions for 984 controllers 292 logarithm base 10 calculation using EMTH 254 using MATH 313 logic elements 98 logic solve time 4 as a part of scan time 104 logic solve times 5 LRC checksum in ladder logic 234 324 Index M MA 0186 100 line splitter 21 macros 11 manipulated variable in a PID2 function 276 MATH loadable function part number 293 MBIT function 164 MBUS 64 MBUS loadable function 27 300 part numbers 292 Modbus chassis mount pinouts 54 55 56 57 media 58 network capacity 58 nine pin pinouts 54 55 56 57 port parameters 52 58 Modbus Il 64 Modbus Il functions MBUS 300 PEER 302 Modbus Il local statistics 304 Modbus I option modules AM S975 100 26 AM S975 820 27 Modbus modems AS J878 000 26 Modbus Plus MSTR function 218 network capacity 60 Modbus Plus option modules AM S95 000 27 AM S985 020 27 AM S985 040 27 MODSOFT macros 11 sequential function chart 10 move functions 142 moving a block of data in DX tables 152 moving registers to ta
186. ions o Extra Opcodes Available in 24 Bit CPUs GM 0984 SYS 984 Opcode Assignments 83 6 1 Translating Ladder Logic Elements in the System Memory Database A 984 automatically translates symbolic ladder elements and function blocks into database nodes that are stored on page 0 in system memory A node in ladder logic is a 16 or 24 bit word an element such as a contact translates into one da tabase node while an instruction such as an ADD block translates into three data base nodes The database format differs for 16 bit and 24 bit nodes 16 BIT NODE FORMAT X x x XIX ylyly y Yl y Yly 2 2 2 24 BIT NODE FORMAT xixxixixixixixiyiylyiyiylyilyiyiyiyiyilyiyjizizi 2 The five most significant bits in a 16 bit node and the eight most significant bits in a 24 bit node the x bits are reserved for opcodes An opcode defines the type of functional element associated with the node for example the code 01000 specifies that the node is a normally open contact and the code 11010 specifies that the node is the third of three nodes in a multiplication function block 6 1 1 Translating Logic Elements and Non DX Functions When the system is translating standard ladder logic elements and non DX func tion blocks it uses the remaining y and z bits as pointers to register or bit loca tion
187. l Time Clock Error Watchdog Timer Expired Invalid Traffic Cop State RAM Test Failed Start of Node Did Not Start Segment Segment Scheduler Invalid Illegal Peripheral Intervention Controller in DIM AWARENESS Extended Memory Parity Error for chassis mount controllers or Traffic Cop S90t Error for other controllers If the bit 1 in a 984B Controller an error has been detected in extended memory the controller will run but the error output will be ON for XMRD XMWT functions Ifthe bit 1 for any controller other than a chassis mount then either c traffic cop error has been detected or the S908 is missing from a multi drop configuration Peripheral Port Stop Word 6 Displays the number of segments in ladder logic a binary number is shown 1 2 3 4 5 6 7 8j 9 10 11 12 13 14 15 16 Number of Segments expressed as a binary number Word 7 Displays the address of the end of logic EOL pointer 1 2 3 4 5 6 A 8 9 10 12 13 14 15 16 EOL Pointer Address 196 Monitoring System Status GM 0984 SYS Word 8 ncontrollers that support remote I O word 8 uses its most significant bit to display whether or not redundant coaxial cables are run to the remote I O drops and it uses its four least significant bits to display the remote I O tim
188. led logic to a subroutine the LAB function la bels the starting point of the subroutine and the RET function returns you from the subroutine network to the regular scheduled user logic program 19 1 1 The Value of Subroutines Ladder logic subroutines allow you to save memory space in the user logic table in cases where you need to implement the same logic functions multiple times in a single scan You need only create the logic once store it in the logic segment re served for subroutines and call it from user logic with the JSR block as often as you need it within a scan Subroutines can also be helpful in reducing total scan time Portions of logic that require only infrequent solution in logic scans can be placed in the subroutine seg ment and called from user logic only on those scans where it is needed 19 1 2 Where to Store Subroutines in Ladder Logic All ladder logic subroutines must be built in the ast segment of user logic This segment must be removed from the segment scheduler it is not part of the regu lar order of solve table Note This means that you must specify at least one more segment than is required for regular user logic in the configuration table Controllers that support subroutines provide as many as 255 address locations for subroutine ladder logic Each subroutine must start at the beginning of a network in the last logic segment There is no set limit on the number of networks in the segment 238
189. ler Status Words Words 1 11 display the controller status words Word 1 Displays the following aspects of the controller s status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 LL dd Not Used Not Used Battery Failed Memory Protect OFF Run Light OFF AC Power ON 1 16 Bit User Log ic Enafle gage SreebIWelay Enable C nstant Sweep Word 2 Displays the Hot Standby status for 984 controllers that use S911 R911 Modules If the bit is set to 1 then the condition is TRUE 1 2 8 4 5 6 7 8 9 10 11 12 13 14 15 16 Not Used S911 R911 Present and Healthy 0 Controller Toggle Set to A 1 Controller Toggle Set to B 0 Controllers have Matching Logic 1 Controllers do not have Matching Logic Remote System State see Legend 00 Not Used Local System State 01 Off Line see Legend 10 Primary 11 Standby 194 Monitoring System Status GM 0984 SYS Word 3 If the bit is set to 1 then the condition is TRUE Displays more aspects of the controller status 1
190. loads FP zt value to middle node not used FP value of n EMTH 25 The top node contains two consecutive 4x registers that are not used The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the FP value of m GM 0984 SYS 984 Enhanced Instructions 265 Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since these registers must be assigned but are not used FP Sine of an Angle in Radians ON block calculates FP value ON operation performed the sine of FP value in successfully top node sine of FP value EMTH 26 The top node comprises two consecutive 4x registers that contain an FP value in dicating the value of an angle in radians The magnitude of this value must be lt 65536 0 if not rj The sine is not computed g An invalid result is returned o An error is flagged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the sine of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used 266 984 Enhanced Instructions GM 0984 SYS FP Cosine of an Angle in Radians ON block calcula
191. log in analog out and special purpose I O modules 3 8 1 200 Series Discrete Input Modules Voltage Number Number Model Range of Inputs per Common AS B225 001 24VDC True High 16 1 AS B231 501 115VAC 16 4 AS B233 501 24VDC 16 4 AS B235 501 220VAC 16 4 AS B237 001 5VDC TTL 16 4 AS B245 001 220VAC Isolated 8 Separate Commons AS B247 001 115VAC 8 Separate Commons AS B271 001 36 60VAC 16 4 AS B273 001 12VDC 16 4 Intrinsically Safe AS B275 501 10 60VDC 16 4 AS B279 001 18 30VAC 16 4 3 8 2 200 Series Discrete Output Modules Voltage Number Number Model Range of Outputs per Common AS B224 001 24VDC True High 16 1 AS B230 501 115VAC 16 4 AS B232 501 24VDC 16 4 AS B234 501 220VAC 16 4 AS B236 501 5VDC TTL 16 4 AS B238 001 24VDC True Low 16 4 AS B244 101 230VAC Isolated 8 Separate Commons AS B246 501 115VAV Isolated 8 Separate Commons AS B248 501 10 60VDC 16 4 AS B266 501 115VAC 8 Separate Commons Reed Relay NO AS B268 001 230VAC 8 Separate Commons Reed Relay NO AS B270 001 48VAC 16 4 AS B274 001 115VAV Relay NC 8 Separate Commons AS B276 001 230VAC Relay NC 8 Separate Commons AS B278 001 10 60VAC 16 4 42 984 I O Subsystems GM 0984 SYS 3 8 3 200 Series Analog Input Modules Application Number Model Range of Channels Words l O AS B243 105 1 5VDC 4 4 0 4 20MADC AS B243 110 0 10VDC 4 4 0 10 410VDC 3 8 4 200 Series Analog Output Modules Application Number Mo
192. m automatically solves the logic starting at segment 01 and moving sequentially through segment nn Throughput is optimized when logic referring to real world I O is contained in the segment that corresponds to that I O drop For instance if you are using I O in drop 1 of a three drop system to control a pushbutton that starts a motor the ideal condition is for logic segment 1 to contain all the appropriate logic 984 Controller 10001 Segment 1 ou 10 Drop 1 10001 00001 00001 Drop 2 Drop 3 GM 0984 SYS Ladder Logic Overview 109 When all logic segments are coordinated with all physical I O drops in such a manner the throughput for a given logic segment can be less than one scan lt Scan 1 gt lt Scan 2 gt Drop 2 Drop 3 Drop 1 Drop 2 Input Input Input Input Segment 1 l Segment 2 Segment 3 l ovup Segment 1 Logic Networks 2 Logic Networks 2 Logic Networks S Logic Networks Drop 3 Drop 1 Drop 2 Drop 3 Output Output Output Output A B C D E Throughput The illustration above shows the throughput for drop 3 the time beginning with field input data being read by the input modules in drop 3 and ending with the out p b d mi mi ut modules at drop 3 being updated with data from the CPU Throughput in this est case example is about 75 of total scan time Five events are shown as rop 3 throughput
193. m node defines the function number which may range from FNO1 FN99 and uses a constant value to define the number of 4x registers in the subfunction table the table length range may be from 1 255 in a 16 bit CPU and from 1 999 in a 24 bit CPU 306 984 Loadable Instructions GM 0984 SYS 21 8 1 Programming Considerations 21 8 4 1 Programming Environment This development package is for experienced C or Assembly Language program mers and the development environment is outside the standard ladder logic pro gramming environment Custom loadable function blocks may be developed on IBM AT or compatible computers running MS DOS Rev 3 2 or greater The re sulting blocks may be downloaded to a standard disk based programming panel and used in ladder logic programs 21 8 1 2 Creating a Subfunction Library Each subfunction built into an FNxx loadable block is comparable to a standard three node DX function and requires a certain amount of user logic memory upon installation A large number of subfunctions can be written and stored in a sub function library in the development environment and the size of this library can be far in excess of available memory in the target controller Only particular subfunc tions for immediate use can be pulled from the library and compiled in the FNxx function as it is built The controller needs only enough extra memory to support the installed subfunctions 21 8 1 3 Naming Subfunctions In additio
194. maxi mum number of registers in the data area area size must be a constant value ranging from 1 100 GM 0984 SYS Modbus Plus Master Function 219 17 2 MSTR Function Error Codes If an error occurs during any one of the eight MSTR operations a hexadecimal error code will be displayed in register 4x 1 in the control block The form of the code is Mmss where a M represents the major code a m represents the minor code O ss represents a subcode 220 Modbus Plus Master Function GM 0984 SYS Hex Error Code Meaning 1001 2001 2002 2003 2004 2005 2006 2007 2008 2009 200A 30ss User initiated abort Invalid operation type User parameter changed Invalid length Invalid offset Invalid length offset Invalid slave device data area Invalid slave device network area Invalid slave device network routing Route equal to your own address Attempting to obtain more global data words than available Modbus slave exception response Inconsistent Modbus slave response Inconsistent network response Routing failure Slave rejected long duration program command ss Hex Value The ss subfield in error code 30ss is Meaning 08 255 Slave device does not support the requested operation Nonexistent slave device registers requested Invalid data value requested Unassigned Slave has accepted long duration program command Function can t be performed now a long duration command in effect
195. mbers explicitly The only way to identify negative values is by noting that the SUB function block has turned the bottom output ON If such a negative number is being converted to floating point perform the Inte ger to FP conversion EMTH function 9 then use the Change Sign function EMTH function 424 to make it negative prior to any other FP calculations GM 0984 SYS 984 Enhanced Instructions 255 Integer to FP Conversion ON block converts in _ double preci ON operation performed teger value to FP value sion successfully integer value result EMTH The top node comprises two consecutive 4x registers that contain a double preci sion integer value to be converted to 32 bit FP format Note Ifan invalid integer value value gt 9999 is placed in either of the two top node registers the FP conversion will be performed but an error will be reported and logged in EMTH function 38 The result of the conversion may not be correct The middle node contains four consecutive 4x registers 4x and 4x 1 are not used 4x 2 and 4x 3 are used to store the result of the FP conversion Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used 256 984 Enhanced Instructions GM 0984 SYS Integer FP ON block adds inte e ger value and FP value double preci
196. meter error ES 0 No starting address parameter errors found 1 starting address parameter error 0 No file number errors parameter found 1 file number parameter error zu GM 0984 SYS Extended Memory Capabilities 213 16 4 Extended Memory Write Function The XMWT instruction is used to write data from a block of input registers or hold ing registers in state RAM to a block of 6x registers in an extended memory file It is a three node function block Activates write source XMWT transfer active operation 0 clears offset to 0 control block Error condition detected 1 does not clear offset 0 abort on error XMWT 1 do not aborton 1 Passes power when XMWT complete error The top node may be a 3x input register or 4x holding register that specifies the first register in the block of registers to be written to extended memory The middle node is the first of six consecutive 4x registers to be used as the ex tended memory control block as described in Section 16 3 If you are in multi scan mode these six registers should be unique to this function block The bottom node identifies the function as an extended memory write and always contains the constant value 1 which cannot be changed 214 Extended Memory Capabilities GM 0984 SYS 16 5 Extended Memory Read Function The XMRD instruction is used to copy a table of 6x extended memory registers to a table of 4x holding r
197. modules 42 special purpose modules 43 300 Series I O analog input modules 49 analog output modules 49 BCD register modules 49 discrete input modules 48 discrete output modules 48 500 Series I O discrete input modules 44 discrete output modules 44 special purpose modules 45 800 Series I O analog input modules 38 discrete input modules 37 discrete output modules 37 intelligent modules 40 special purpose I O modules 39 984 Controllers standard architecture 6 A A120 Series I O combo module 46 discrete input modules 46 47 discrete output modules 46 47 ADD function 134 addition floating point 262 floating point and integer values 257 integer 134 alarm event warning system 317 AND function 156 antilogarithm base 10 calculation using EMTH 254 using MATH 313 arccosine calculation in floating point 269 GM 0984 SYS arcsine calculation in floating point 268 arctangent calculation in floating point 270 AS MBKT 085 connectors for Modbus Plus 61 AS MBKT 185 connectors for Modbus Plus 61 ASCII character chart 178 ASCII communication mode 52 ASCII device support at remote I O drops 34 ASCII error status word 176 auxiliary power supply modules for remote I O drops 41 B battery coil assignment in the configurator 79 binary addition checksum in ladder logic 234 BLKM function 152 BLKT function 246 Boolean operations 156 BROT function 166 C C986 Coprocessor
198. n 10001 passes power the bit value complements in the source matrix regis ters 40600 and 40601 are copied into the destination matrix registers 40602 and 40603 Warning COMP will override any disabled coils within the desti nation matrix without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the COMP instruction GM 0984 SYS DX Matrix Functions 161 12 4 CMPR The CMPR instruction compares the bit pattern of one matrix against the bit pat tern of a second matrix for discrepancies CMPR is a three node function block ON compare bits matrix a Copies current state in matrix a of against bits in the top input matrix b 0 start function at last miscompare pointer 1 start function at the beginning to 5 Miscompare detected reset pointer matrix b CMPR D f mi matrix length State of miscompared bit in matrix a The matrix in the top node specifies the source data to be compared it may be rj The first Ox in a table of output references o The first 1x in a table of input references o The first 3x in a table of input registers rj The first 4x in a table of holding registers The middle node must be a holding register 4x it is the pointer to a particular bit in the matrix starting with 4x 1 The bottom node indicates that this is a CMPR function and specifies a matrix length that can ra
199. n block ON initiate source Copies current state operation of the top input destination AND OR or XOR matrix length The top node source may be rj The first Ox in a table of output references rj The first 1x in a table of input references rj The first 3x in a table of input registers o The first 4x in a table of holding registers The middle node destination may be rj The first Ox in a table of output references o The first 4x in a table of holding registers If you specify a Ox in the middle node it counts as the one and only time that the referenced coils may be used The bottom node indicates which type of Boolean function to implement and spec ifies a matrix length that may range from 1 100 words i e a length of 2 indi cates 32 bits Warning These Boolean functions will override any disabled coils within the destination group without enabling them This can cause personal injury if a coil has disabled an operation for maintenance or repair because the coil s state can change as a result of the Boolean operation GM 0984 SYS DX Matrix Functions 157 12 2 Some Boolean Examples ANDing Example source matrix 40600 40600 1111111100000000 40601 1111111100000000 10001 destination matrix 40604 40604 1111111111111111 40605 0000000000000000 AND ANDed destination 00002 40604 1111111100000000 40605 0000000000000000 When 1
200. n extended memory area available only in the 984B Controller see Chap ter 16 74 984 Memory Allocation GM 0984 SYS 5 2 2 How Discrete and Register Data Are Stored in State RAM State RAM data are always 16 bit words and are stored on page F in System Memory The state RAM table is followed immediately by a discrete history table that stores the state of the bits at the end of the previous scan and by a table of the current ENABLE DISABLE status of all the discrete Ox and 1x values in state RAM page F 0000 State RAM ENABLE DISABLE Tables Discrete History Tables 4x History Table EOL Pointers Crash Codes Executive ID Executive Rev l lt 16 bits gt Each Ox or 1x value implemented in user logic is represented by one bit in a word in state RAM by a bit in a word in the history table and by a bit in a word in the DISABLE table In other words for every discrete word in the state RAM table there is one corresponding word in the history table and one corresponding word in the DISABLE table Counter input states for the previous scan are represented on page F in an upcounter downcounter history table Each counter register is represented by a single bit in a word in the table a value of 1 indicates that the top input was ON in the last scan and a value of 0 indicates that the top input was OFF in the last scan GM 0984 SYS 984 Memory Allocation 75 5 3 State RAM Stru
201. n standards its hardware implementation must meet 2 The 984 Programmable Controllers GM 0984 SYS 1 1 2 Controller Compatibility A major advantage of the family approach to 984 controller design is product compatibility Regardless of its computational capacity performance characteris tics or hardware implementation each 984 controller is architecturally consistent with other 984s The 984 instruction set the functional capabilities of the controller part of the sys tem firmware stored in executive PROM comprises logic functions common to other 984s This means that user logic created on a midrange or high perform ance unit such as a 984 685 or a 984B can be relocated to a smaller controller such as a 984 145 assuming sufficient memory in the smaller machine and that logic created on a smaller controller is upwardly compatible to a larger unit As your application requirements increase it is relatively easy to upgrade your con troller hardware without having to rewrite control logic Also training costs and learning curves can be reduced since users familiar with one 984 model automatically have a strong understanding of others GM 0984 SYS The 984 Programmable Controllers 3 1 2 984 Controller Performance and Capacity Characteristics The table on the following page gives you an overview of 984 programmable con troller characteristics The 984 controller models are listed by capacity in de scending order the 24 bit CPUs
202. n the requirements of your application 72 984 Memory Allocation GM 0984 SYS 5 1 2 User Logic The amount of space available for application logic is calculated by subtracting the amount of space consumed by system overhead from the total amount of user logic System overhead in a relatively conservative system configuration can be expected to consume around 1000 words system configurations with moderate or large traffic cops will require more overhead 5 1 3 User Memory Storage User memory is stored in CMOS RAM In the event that power is lost CMOS RAM is backed up by a long life typically 12 month lithium battery Ladder logic requires one word of either 16 bit or 24 bit memory to uniquely identify each node in an application program Contacts and coils each occupy one node and therefore one word Function blocks which usually comprise two or three nodes require two or three words respectively Other elements that con trol program scanning start of a network SON beginning of a column BOC and horizontal shorts use one word of user logic memory as well A vertical short does not use any user logic memory words SON BOC BOC BOC a Be A v d zu SON 1 p a BOC 3 4h 3 Su cm 8 words GM 0984 SYS 984 Memory Allocation 73 5 2 State RAM Values As part of the 984 configuration process using the Configurator editor in the panel software you will specify a certain number o
203. n to an individual ID number each subfunction in a customized function block is assigned a name by the programmer The name may contain from one to four alphabetical characters either upper or lower case The programmer creates a separate file the subfunction list file where a subfunction ID number is linked to each subfunction name and the name can be used by utility tools to access and display the subfunction and its specific characteristics 21 8 1 4 Assigning Opcodes to Functions Each FNxx function must be assigned an opcode that is in the valid range of Mo dicon opcodes and that is not used by any other function block currently installed in the programmable controller see Chapter 6 If you have designed multiple custom loadable functions but intend to download only some of them together at any one time then you need only assign as many unique opcodes as there are custom functions downloaded at any one time However you must inform the user how to change opcodes using the odutil utility as one function is withdrawn and replaced by another The fact that you are able to create so many subfunc tions within one function allows you to work around the finite limit of available op codes GM 0984 SYS 984 Loadable Instructions 307 21 9 Sequential Control Functions Modicon provides a drum sequencer software package for use with 984 chassis mount controllers which can be used in sequential control applications where si multaneous con
204. n with which nodes on the network can initiate message transactions The MSTR function allows you to initiate one of eight pos sible operations over the Modbus Plus network MSTR Function Code Write data Read data Get local statistics Clear local statistics Write global database Read global database Get remote statistics Clear remote statistics OANOOARWNM Up to four MSTR blocks may be simultaneously active in a ladder logic program More than four MSTR blocks may be programmed to be enabled by the logic flow as one active MSTR block releases the resources it has been using and be comes deactivated the next MSTR function encountered in logic may be activated The MSTR instruction is a three node function block Enables the selected control block Operation is MSTR function active Terminates an active data area Operation has MSTR operation terminated unsuccessfully MSTR Operation has area size been completed successfully 218 Modbus Plus Master Function GM 0984 SYS The top node which must be a 4x register is the first of nine consecutive holding registers that form the MSTR control block 4x Identifies one of the eight MSTR operations 4x 1 Displays error status 4x 2 Displays length 4x 3 Displays MSTR function dependent information 4x 4 The Routing 1 register uses the bit value of the low byte to designate the address of the destination device if you are using a controlle
205. nation Stack Both instructions are three node function blocks ON insert bit source Copies current pattern in queue state of the top input pointer r Queue full FIN Queue empty queue length 148 DX Move Functions GM 0984 SYS ON remove bit pointer Copies current pattern from queue state of the top input destination Queue full FOUT Queue empty queue length The source which is specified in the top node of the FIN block may be o The first of 16 logic coils 0x o The first of 16 discrete inputs 1x o An input register 3x o A holding register 4x The pointer which is specified in the middle node of the FIN block and the top node of the FOUT block is a holding register 4x A pointer indicates where in the table the data will be taken from or written to The bottom node indicates that the block is either an FIN or FOUT instruction and specifies the queue length which may range from 1 100 and which represents the number of registers in the queue Warning FOUT will override any disabled coils within a destina tion table without enabling them This can cause injury if a coil has been disabled for repair or maintenance because the coil s state can change as a result of the FOUT operation GM 0984 SYS DX Move Functions 149 11 3 SRCH The SRCH instruction searches a table of registers for a specific bit pattern SRCH is a three no
206. nd Error cksm select 1 impli j TR Koi dad implied register count length or implied register count 0 CKSM cksm select 2 length of source table The top node contains the first 4x register in the source table The checksum cal culation is performed on the registers in this table The middle node contains two 4x registers 4x stores the result of the checksum calculation and 4x 1 specifies the number of registers selected from the source table used as input to the calculation The value in 4x 1 must be lt length of source table 234 CKSM GM 0984 SYS The bottom node identifies the block as CKSM and contains an integer value in the range 1 255 specifying the number of 4x registers in the source table The three inputs to the block are used to indicate the type of checksum calculation to be performed CKSM Input Calculation Top Mid Bottom Straight Check ON OFF ON Binary Addition Check ON ON ON CRC 16 ON ON OFF LRC ON OFF OFF GM 0984 SYS CKSM 235 Chapter 19 Ladder Logic Subroutines o Using Ladder Logic Subroutines o JSR o LAB o RET o A Subroutine Example o Some Cautionary Notes About Subroutines GM 0984 SYS Ladder Logic Subroutines 237 19 1 Using Ladder Logic Subroutines Several 984 instruction sets provide three standard function blocks in the EPROM firmware that allow you to set up ladder logic based subroutines The JSR func tion jumps from the regular schedu
207. ndicate the extended math function you want to employ Inputs to and outputs from the EMTH block may be ACTIVE or INACTIVE de pending on the function called in the bottom node GM 0984 SYS 984 Enhanced Instructions 247 EMTH Functions Code Active Inputs Active Outputs Double Precision Math Addition 01 Top only Top Middle Subtraction 02 Top only Top Middle Bottom Multiplication 03 Top only Top Middle Division 04 Top Middle Top Middle Bottom Integer Math Square Root 05 Top only Top Middle Process Square Root 06 Top only Top Middle Logarithm 07 Top only Top Middle Antilogarithm 08 Top only Top Middle Floating Point Arithmetic Integer to FP Conversion 09 Top only Top only Integer FP 10 Top only Top only Integer FP 11 Top only Top only Integer x FP 12 Top only Top only Integer FP 13 Top only Top only FP Integer 14 Top only Top only FP Integer 15 Top only Top only Integer FP Comparison 16 Top only Top only FP to Integer Conversion 17 Top only Top Bottom Addition 18 Top only Top only Subtraction 19 Top only Top only Multiplication 20 Top only Top only Division 21 Top only Top only Comparison 22 Top only Top Middle Bottom Square Root 23 Top only Top only Change Sign 24 Top only Top only Load Value of 7t 25 Top only Top only Sine in Radians 26 Top only Top only Cosine in Radians 27 Top only Top only Tangent in Radians 28 Top only Top only Arcsine in Radians 29 Top only Top only Arccosine in Radians 30 Top only Top
208. nge from 1 100 162 DX Matrix Functions GM 0984 SYS 12 4 1 A CMPR Example 40620 10001 40622 10002 CMPR 00143 00002 00144 matrix a 40620 0000000000000000 40621 1000000000000001 pointer 40622 matrix b 40623 0000000000000000 40624 0000000000000000 If 10002 is energized matrix a is compared against matrix b on every scan that 10001 receives power Matrix b has all bits cleared to 0 The comparison is done bit by bit This finding of a miscompare is accomplished in one scan In this example the comparison continues until bit 17 where matrix a 1 and ma trix b 0 At this point when 40622 17 the function stops 00143 and 00144 energize for one scan On the second transition of 10001 the function starts again at bit 1 and stops again when 40622 17 If 10002 is de energized the first transition of 10001 will stop the function at 40622 17 00143 and 00144 will energize for one scan On the second transi tion of 10001 the function will stop at 40622 32 00143 and 00144 will energize for one scan Coil 00144 indicates the sense of the bit in the source matrix when a miscompare occurs GM 0984 SYS DX Matrix Functions 163 12 5 Sensing and Modifying Bits ina Matrix The standard 984 instruction set provides two function blocks that allow you to ex amine and modify current bit values inside data tables in a matrix The SENS in struction e
209. nteger value in the top node and 4x 2 and 4x 3 contain the FP product of the operation Integer FP ON block divides inte double preci ON operation performed ger value by FP value sion successfully integer value FP value and quotient EMTH 13 The top node comprises two consecutive 4x registers that contain a double preci sion integer value to be divided by an FP number The middle node comprises four consecutive 4x registers 4x and 4x 1 contain the FP number that divides the integer value in the top node and 4x 2 and 4x 3 contain the FP quotient of the operation 258 984 Enhanced Instructions GM 0984 SYS FP Integer ON block subtracts __ I ON operation performed integer value from FP EE valge sudeeee tilly value integer value and FP difference EMTH 14 The top node comprises two consecutive 4x registers that contain an FP number The middle node comprises four consecutive 4x registers 4x and 4x 1 contain the integer value to be subtracted from the FP value in the top node and 4x 2 and 4x 3 contain the FP difference of the operation FP Integer ON block divides FP FP value i ON operation performed value by integer value successfully integer value and FP quotient EMTH 15 The top node comprises two consecutive 4x registers that contain an FP number The middle node comprises four consecutive 4x registers 4x
210. ock 0 0 cece eee eee eee 247 Double Precision Math Functions 0 e cece eee eee 249 Integer Math Functions tis piai ia mi a eee III 252 Floating Point Arithmetic Functions 00 eee eee eee 255 The IEEE Floating Point Standard 0 00 cece eee eee 255 Dealing with Negative Floating Point Numbers 255 A Closed Loop Control System 0 cee eee ee 276 Set Point and Process Variable 0c cee eee eee eee 276 Proportional Control rotanga ia pa eects 276 Proportional Integral Control 000s cece ee eee 277 Proportional Integral Derivative Control 000ee eee eee 277 Phe PID2 Algoritlim 2 5 rr tr eget ette Te Be eal 278 PID24 0 deb IR nude Ad eU De aded et datei 280 A Level Control Example 000s cece eee ees 287 Ladder Logic for the PID2 Example 0 0 cece eee eee eee 288 Chapter 21 984 Loadable Instructions 291 Loadable Software Packages for 984 Controllers 292 Loadable Support for Controller Option Modules 292 Other 984 Loadable Functions 0 cece eee eee 293 The 984 Hot Standby Loadable 00 cece cece eens 294 Table of Contents GM 0984 SYS The HSBY Status Register 0 0 cece eects 296 An HSBY Reverse Transfer Example sssesesseessssss 297 CALL Blocks for the 984 Coprocessors 0 cece ee eee 29
211. of an angle between 0 x radians This value must be in the range of 1 0 1 0 if not rj The arc cosine is not computed g An invalid result is returned o An error is flagged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the arc cosine in radians of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used GM 0984 SYS 984 Enhanced Instructions 269 FP Arc Tangent of an Angle in Radians ON block calculates L ON operation performed the arc tangent of FP FR walls successfully value in top node arc tangent of FP value EMTH 31 The top node comprises two consecutive 4x registers that contain an FP value in dicating the tangent of an angle between 7 2 1 2 radians Any valid FP value is allowed The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the arc tangent in radians of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Conversion of Radians to Degrees ON block converts FP L ON op
212. ol equation t My Ky E Ko J EAt 0 Proportional integral control Pl eliminates offset by integrating E as a function of time K is the integral constant expressed as rep min As long as E 0 the inte grator increases or decreases its value adjusting My This continues until the offset error is eliminated 20 6 4 Proportional Integral Derivative Control You may want to add derivative functionality to the control equation to minimize the effects of frequent load changes or to override the integral function in order to get to the SP condition more quickly Mya KE ke f E KE At Proportional integral derivative PID control can be used to save energy in the process or as a safety valve in the event of a sudden unexpected change in pro cess flow Kg is the derivative time constant expressed as min APV is the change in the process variable over a time period of At GM 0984 SYS 984 Enhanced Instructions 277 20 7 The PID2 Algorithm Modicon s algorithm for PID2 tunes the closed loop operation in a manner similar to traditional pneumatic and analog electronic loop controllers It uses a rate gain limiting RGL filter on the PV as it is used for the derivative term only thereby fil tering out higher frequency PV noise sources random and process generated
213. onds 36 000 tenths of a second and 24 hours 86 400 seconds 864 000 tenths of a second The following table shows binary weighted values for the time stamp where n is the relative bit position in the 20 bit time scheme Event Data Register 1 Event Data Register 2 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 2n n 2n n 2n n 1 0 256 8 65536 16 2 1 512 9 131072 17 4 2 1024 10 262144 18 8 3 2048 11 524288 19 16 4 4096 12 32 5 8192 13 64 6 16384 14 128 7 32768 15 Note The real time clock in the chassis mount controllers has a tenth of a second resolution but the other 984s have real time clock chips resolve only to a second An algorithm is used in EARS to pro vide a best estimate of tenth of a second resolution it is accurate in the relative time intervals between events but it may vary slightly from the real time clock The bottom node displays an even constant value in the range 2 100 which represents the actual number of registers allocated for the circular buffer Each event requires two registers for data storage therefore if you wish to trap up to 25 events at any given time in the buffer assign a value of 50 in the bottom node 320 984 Loadable Instructions GM 0984 SYS index Numbers 200 Series I O analog input modules 43 analog output modules 43 discrete input modules 42 discrete output
214. one 11 Total I O AS B885 002 ASCII BASIC 500 1760 0 6 6 N A 64K RAM 2 RS232 422 Ports AS B984 100 Discrete High 0 0 0 4 4 or 8 8 AS 8533 004 Speed Logic Included Solver 3 6 7 800 Series MMI Operator Panels A variety of prepackaged man machine interface MMI devices may also be connected to the RIO network Two types of 32 Element Pushbutton Panels may be installed and traffic copped like I O at remote S908 S929 drops The MM 32SD 000 Panel is connected via a W801 cable to an 800 Series I O drop being driven by an S908 compatible RIO interface device By adding an MM 32PR 000 Primary Option board to this opera tor panel you create a primary device that can be connected directly to the S908 RIO network A PanelMate Plus Video Control Panel may also be installed as a drop on an RIO network PanelMate Plus is traffic copped like a D908 Distributed Control Proces Sor see Section 4 10 40 984 I O Subsystems GM 0984 SYS 3 7 Power Supplies for Local and Remote 800 Series I O Drops To determine the power requirements of a drop add the individual power draws of each module in the drop A primary power supply is required in the first slot of the primary housing in a remote I O drop an auxiliary power supply may be installed in the first slot of a secondary housing Power Supplies for a Remote 800 Series I O Drop 1 0 Power in mA RIO Interface Model Description Voltage 5V 4 3V 5V Power 5V AS P810 000 prim
215. only Arctangent in Radians 31 Top only Top only Radians to Degrees 32 Top only Top only Degrees to Radians 33 Top only Top only FP to an Integer Power 34 Top only Top only Exponential Function 35 Top only Top only Natural Log 36 Top only Top only Common Log 37 Top only Top only Report Errors 38 Top only Top Middle 248 984 Enhanced Instructions GM 0984 SYS 20 3 Double Precision Math Functions Double Precision Addition ON add operands and place result in desig nated registers operand 1 operand 2 and destination EMTH 1 ON operation per formed successfully ON an operand is out of range or invalid The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers Double Precision Subtraction ON operand 2 sub tracted from operand 1 and absolute value placed in designated registers o 4x and 4x 1 hold the second operand value in the range 0 99 999 999 Oo 4x 2 indicates whether an overflow condition exists 1 overflow o 4x 3 and 4x 4 hold the double precision addition result g 4x 5 is not used in this calculation but must exist in state RAM operand 1 operand 2 and destination EMTH 2 ON operand 1 gt operand 2 ON operand 1 operand 2 f ON operand 1 lt operand 2
216. open the remainder is expressed as a fraction 0005 If 10002 is closed the remainder is expressed as a decimal 2000 138 Standard Calculate Functions GM 0984 SYS 10 6 A Fahrenheit to Centigrade Conversion Example 30001 41201 41202 00032 00005 00009 SUB MUL DIV 41201 41202 40001 00011 Note The vertical short to coil 00011 must be to the left of the vertical shorts linking the three SUB block outputs We want to implement the formula C F 32 x 5 9 When the top input of the SUB function block receives power the number 32 is subtracted from the value in register 30001 which represents some number of de grees Fahrenheit The result is placed in register 41201 The top input to the MUL function block then receives power whether the SUB re sult is positive negative or 0 If the SUB result is negative coil 00011 is ener gized to indicate a negative value The value in register 41201 is then multiplied by 5 and the result is placed in reg ister 41202 The top input of the DIV function block is then energized and the val ue in register 41202 is divided by 9 The result which is the temperature conver sion in degrees Centigrade is placed in register 40001 GM 0984 SYS Standard Calculate Functions 139 Chapter 11 DX Move Functions o Moving Registers and Tables o Moving Blocks to Tables and Tables to Blocks o Two Functions for Building a FIF
217. or communication between the ASCII message table in 984 system memory and an RIO interface module that supports ASCII at your RIO drops such as a J812 J892 P892 or P453 These routines verify correct ASCII parameters for exam ple port and message lengths of variable data fields error detection and re cording and RIO interface status Each function requires two tables of registers one to retrieve and store variable data and the other to identify which port and message numbers are to be used The port and message table contains seven registers and the size of the variable data table needs to be specified The balance of the registers is used for housekeeping The 984 provides support logic to monitor the status of a READ or WRIT function detect errors and enable you to take corrective action Two basic errors that re quire action are declared detected errors and timeout errors 174 ASCII READ WRITE Functions GM 0984 SYS 13 4 How the READ WRIT Blocks Handle ASCII Messages Once a READ or WRIT block has been activated power transitioned from low to high at the top input you may remove power from the node the block remains active for as many scans as are necessary to complete the message transaction Power at the middle or bottom input will stop the function When the middle input receives power the READ WRIT function pauses i e the middle input deactivates the function When power is removed from the middle in
218. ored in the 24 bit nodes GM 0984 SYS 984 Opcode Assignments 87 Opcode Representations for Standard 984 DX Functions Binary Hexadecimal DX Instruction 00011100 1C R T 00111100 3C T R 01011100 5C TT 01111100 7C BLKM 10011100 9C FIN 10111100 BC FOUT 11011100 DC SRCH 11111100 FC STAT 00011101 1D AND 00111101 3D OR 01011101 5D CMPR 01111101 7D SENS 10011101 9D MBIT 10111101 BD COMP 11011101 DD XOR 11111101 FD BROT 00011110 1E READ 00111110 3E WRIT 01111110 7E XMWT 10011110 9E XMRD XMWT and XMRD are used for extended memory capabilities available only in the 984B chassis mount Controller They are not installed in other 24 bit controllers 88 984 Opcode Assignments Note The opcodes for these standard ladder logic elements and in structions are hard coded in the system firmware and they cannot be altered GM 0984 SYS 6 2 3 How the y Bits are Utilized for DX Functions The y bits in a database node holding DX function data contain a binary number that expresses the number of registers being transferred in the function A 16 bit database node has eight y bits A 16 bit CPU is therefore machine lim ited to no more than 255 transfer registers per DX operation A 24 bit database node has 13 y bits A 24 bit CPU is therefore capable of reaching a theoretical machine limit of 8191 transfer registers per DX operation practically however the greatest number of transfer registers allowed in a 24 bit D
219. p Counters and Down Counters 128 Three Kinds of Timers ce Rete eR ees 130 A Real Time Clock Example 000s eect teen eens 132 Chapter 10 Standard Calculate Functions 133 ADD L uae nd hae eel eaten das 134 SUB xoecopebenmdos EAR E ae Medie dy tpe tossed gas 135 MUL Genesin Gee a e de e er t hee id 136 DIV oe deste tb abiti n eter be ditalotadan ibi auti e d 137 A DIV Example nopea eoe Rash a conga db eR pe ner 138 A Fahrenheit to Centigrade Conversion Example ssue 139 Chapter 11 DX Move Functions 141 Moving Registers and Tables 2 cece eee eens 142 Register to Table Move 2 cece eee ee eee 142 Table to Register Move cc eee eee ete tte 144 Table to Table Move 0 cece eee II 146 Two Functions for Building a FIFO Queue 0c eee eee 148 SRGH gt 5 So eats aden EOM UE 150 GM 0984 SYS Table of Contents ix X A SRCH Example 2 eR EM wun Ga IMMENSE 151 BEKM ueenneb AERU uda y dd ERR e eva Solana a 152 A Recipe Storage Example 000s cee ete eens 153 Chapter 12 DX Matrix Functions 155 Three Boolean Functions 0 cee eee eee eens 156 Some Boolean Examples sss cece teen eee eee 158 COMP o 6 PAE I EE EED D EE RE eaves 160 A COMP Example cues er eek use e eee nce bie 161 CMPR 4 En aint Suc Det eee at a sa oS mo
220. pies space in user logic memory 3 4 3 The ASCII Operator Keypad An ASCII Operator Keypad with an AS KPPR 000 option board can be connected directly to an S908 RIO network and can be cofigured as a drop on that network This keypad has two ASCII ports associated with it one as the keypad interface and one that can be connected to another external device GM 0984 SYS 984 I O Subsystems 35 3 5 Overview of I O Support for 984 Controllers 984 1 0 RIO RIO Drop Type Series Local RIO Processor Interface ASCII 984A 800 v S908 J890 P890 No 984B J892 P892 Yes 901 J810 No J812 Yes 200 v S908 P451 amp J291 No P453 amp J290 Yes 901 P451 No P453 Yes 500 v S908 P451 amp J291 w J540 No 453 amp J290 w J540 Yes S901 P451 w J540 No P453 w J540 Yes 984X 800 v v 929 J890 P890 No J892 P892 Yes 200 v S929 P451 w J291 No P453 w J290 Yes 500 v 929 P451 w J540 amp J291 No P453 w J540 amp J290 Yes 984 785 800 v v S908 J890 P890 No 984 780 J892 P892 Yes 984 685 200 v S908 P451 w J291 No 984 680 P453 w J290 Yes 984 485 500 v S908 P451 w J540 amp J291 No 984 480 P453 w J540 amp J290 Yes 984 385 984 381 984 380 800 v N A N A No AT 984 800 v N A J890 P890 No MC 984 J892 P892 Yes Q984 200 v S908 P451 w J291 No P453 w J290 Yes 500 v S908 P451 w J540 amp J291 No P453 w J540 amp J290 Yes 984 120 A120 v N A N A No 984 130 984 145 Micro 984 300 v N A N A No 36 984 I O Subsystems GM 0984 SYS 3 6 800 Series I O Modul
221. r EJ 800 5 k 8 Series 60 0513 75 Feed through Terminator F 7i 9 I O 2 EE TR 75F75 C Cable Terminator EF MA 0186 100 Line Splitter Vea MA 0185 100 Line T d P F TEUER Ea 200 E 5 Series k E m2 1 0 with m J290 GM 0984 SYS Optional and Peripheral Control Devices 21 2 4 The Coprocessing Option Modules Modicon offers two types of integrated control processors Copros the C986 for use with chassis mount 984 controllers and the C996 for use with s ot mount 984 controllers that support option modules These option modules extend the pro cessing capabilities of your controller providing alternative programming solutions for problems that are difficult or inefficient to handle via ladder logic 2 4 1 The C986 Copro for Chassis Mount 984s The AM C986 004 Copro resides in a single option slot in a 984A 984B or 984X chassis It uses the flexible multitasking VRTX Operating System which allows it to perform parallel application processing immediate DX processing and deferred DX processing see Section 2 5 Programs developed in Microsoft C either by you or by Modicon can be downloaded to the Copro and run in parallel with the 984 CPU INTERGRATED CONTROL PROCESSOR Green READY LED indicates the system is scanning Green STATUS 1 LED goes ON when the 984 is communicating with the C986 Green STATUS 2 LED goes ON when the C986 is under user software control Red BATTERY LOW LED indicates that the battery ne
222. r area in system state RAM an area that protects a serial group of registers in the standby controller from being modified by the primary controller Through the HSBY instruction you can access two registers a command register and a status register that allow you to monitor and control Hot Standby opera tions The status register is the third register in the nontransfer area you specify HSBY is a three node function block Execute HSBY __ command Hot Standby system ACTIVE unconditionally register A 984 controller cannot Enable command nontransfer area register communicate with its in state RAM R911 S911 module HSBY Enable nontransfer length of area of state RAM nontransfer area The top node contains a 4x holding register used as the HSBY command register eight bits in this register may be configured and controlled via your panel soft ware 294 984 Loadable Instructions GM 0984 SYS Disable keyswitch override 0 Enable keyswitch override 2 1 7 Controller A in OFFLINE mode 0 Controller A in RUN mode 1 Controller B in OFFLINE mode 0 Controller B in RUN mode 1 Force standby offline if there is a logic mismatch 0 Do not force standby offline if there is a logic mismatch 1 5 Allow exec upgrade only after application stops 0 Allow exec upgrade without stopping application 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ertum pr Ee Not
223. r will wait 10 ms on each scan Consult your programming documentation for procedures to invoke a Constant Sweep function GM 0984 SYS Ladder Logic Overview 117 7 13 2 Single Sweep The Single Sweep function allows your controller to execute a fixed number of scans from 1 15 and then to stop solving logic but continue servicing I O This function is useful for diagnostic work it allows solved logic moved data and performed calculations to be examined for errors Warning The Single Sweep function should not be used to de bug controls on machine tools processes or material handling systems when they are active Once a specified number of scans has been solved all outputs are frozen in their last state Since no logic solving is taking place the controller ignores all input in formation This can result in unsafe hazardous and destructive operation of the machine or process connected to the controller Consult your programming documentation for procedures to invoke Single Sweep functions 118 Ladder Logic Overview GM 0984 SYS Chapter 8 Contacts Shorts and Coils o Relay Contacts o Vertical and Horizontal Shorts o Normal and Latched Coils GM 0984 SYS Contacts Shorts and Coils 119 8 1 Relay Contacts The relay contact is the basic programming element It can be referenced to a logic coil Ox or a discrete input 1x There are four types of relay contacts Normally Open H A normally open
224. r with just one Mobbus Plus port the value of the high byte should be set to 0 M high byte J3 destination address gt 0 0 0 O O O O O 0 x x xixixi xix binary value between 1 64 If you are using a controller with two Modbus Plus ports e g using two S985 cards in a chassis mount controller the value of the high byte for one port must be set to O and the high byte for the other port must be set to 1 leaving an offset of 256 between the destination node address and the register value K high byte J3 destination address 3 0 0 0 O O O O 1 O x x Xx X X xix indicating a second MBP port binary value between 1 64 4x 5 The Routing 2 register 4x 6 The Routing 3 register 4x 7 The Routing 4 register 4x 8 The Routing 5 register The middle node which must also be a 4x register designates the first register in the data area For operations that provide the communication processor with da ta such as a Write operation the data area is the source of the data For oper ations that acquire data from the communication processor such as a Read op eration the data area is the destination of the data The bottom node indicates that this is an MSTR function and specifies the
225. registers If the source is less than five digits long in the range O 9 999 it is stored in register 4x 1 If you specify a 3x register in the top node the square root calculation is done on only register 3x a second register is implied but not used The middle node comprises two consecutive 4x registers where the result of the standard square root operation is stored Data are stored in a fixed decimal for mat 1234 5600 where register 4x stores the most significant data to the left of the first decimal point and register 4x 1 stores the four digit value to the right of the first decimal point Numbers after the second decimal point are truncated no roundoff calculations are performed 252 984 Enhanced Instructions GM 0984 SYS Process Square Root ON block performs __ source ON operation performed process V operation successfully linearized ON top node value out of result range EMTH 6 The process square root function implements the standard square root function and tailors it for closed loop analog control applications It takes the result of the standard square root operation multiplies it by 63 9922 the square root of 4095 and stores that linearized result in the middle node registers In order to generate values that have meaning the value entered in the top node 4x or 3x register must not exceed 4095 Process square root linearizes signals from differ ential pressure flow transmitt
226. rix 40201 40203 with themselves you clear the matrix to O The top output of the XOR block passes power to coil 00003 indicating that the current table averaging operation is complete and that a new one should start 168 DX Matrix Functions GM 0984 SYS Chapter 13 ASCII READ WRITE Functions o ASCII Message Handling o READ o WRIT o ASCII Error Status o How the READ WRIT Blocks Handle ASCII Messages o The ASCII Character Set GM 0984 SYS ASCII READ WRITE Functions 169 13 1 READ The READ instruction provides the ability to read data entered at an ASCII device through the RIO interface and into 984 Memory READ is a three node function block Activates READ ASCII I Block active control block Power pauses READ destination Error condition detected function for one scan Power aborts READ READ table length READ complete for one scan function A Caution Make sure that no two ASCII READ WRIT function blocks are active in the same segment at the same time such a condition will cause the block to return an error or return bad data The first register in the ASCII control block is specified in the top node It is the first of seven consecutive 4x holding registers Register Definition 4x bits 0 5 port number 1 32 bits 6 15 error code 4x t 1 message number 4x 2 number of registers required to satisfy format 4x 38 number of registers transmitted thus
227. ro gram GM 0984 SYS DX Move Functions 153 Chapter 12 DX Matrix Functions m Three Boolean Logic Functions Q Some Boolean Examples go COMP o CMPR m Sensing and Modifying Bits in a Matrix Q Rotating a Bit Pattern m How to Report Status Information Q A Simple Table Averaging Example GM 0984 SYS DX Matrix Functions 155 12 1 Three Boolean Functions The standard 984 instruction set provides three function blocks that perform AND OR and Exclusive OR Boolean operations The AND instruction logically ANDs each bit in a source matrix with corresponding bits in a destination matrix The re sult is placed in the destination matrix overwriting the previous contents source 0 1 1 0 ANDing Operation 0 0 0 0 1 IE o destination The OR instruction logically ORs each bit in a source matrix with corresponding bits in a destination matrix source 0 1 1 0 ORing 22 E 2 Operation gt gt gt destination O yi 0 0 1 1 1 1 il The XOR instruction performs a logical Exclusive OR function on each bit in a source matrix with corresponding bits in a destination matrix source 0 1 1 0 3 D Dp destination O0 o 0 1 1 0 1 1 XORing Operation 156 DX Matrix Functions GM 0984 SYS Each of these instructions is a three node functio
228. roller with current system and state RAM status information at the end of each scan The standby controller only reads this information it does not execute control functions and does not interfere with primary control operations It will assume primary system control in 13 48 ms if the primary controller fails 2 3 2 Controller Compatibilities The S911 and R911 Hot Standby modules are devices designed to be installed in option slots with their host controllers They work in conjunction with 984 control lers that use S908 Remote I O Processor modules The R911 modules work with the 984A 984B and 984X chassis mount Controllers the S911 modules work with 984 68x and 984 78x slot mount Controllers All hardware and firmware in the primary and standby controllers must be identical 20 Optional and Peripheral Control Devices GM 0984 SYS The two Hot Standby modules in a system are interconnected by a AS W911 0xx cable and the coaxial cables running from the two S908 RIO Processors pass through self terminating connectors before being joined by an MA 0186 100 line splitter S S R 984 Control 984 Control 9 9 ler ler 0 1 Primary Stanaby 8 1 E W911 Coax n ur J 800 b z 8 Series 4 9 VO koe 52 0370 000 75 G2 Self terminating Connecto
229. rom a preset value to 0 T1 0 Timer that increments in seconds TO 1 Timer that increments in tenths of a second T 01 Timer that increments in hundredths of a second Calculation Instructions Three Node Functions ADD Adds top node value to middle node value SUB Subtracts middle node value from top node value MUL Multiplies top node value by middle node value DIV Divides top node value by middle node value DX Move Instructions Three Node Functions RT Moves register values to a table T R Moves specified table values to a register ToT Moves a specified set of values from one table to another table BLKM Moves a specified block of data FIN First in operation to a queue FOUT First out operation from a queue SRCH Performs a table search STAT Displays status registers from status table in system memory DX Matrix Instructions Three Node Functions AND Logically ANDs two matrices OR Does logical inclusive OR of two matrices XOR Does logical exclusive OR of two matrices COMP Performs the logical complement of values in a matrix CMPR Logically compares the values in two matrices MBIT Logical bit modify SENS Logical bit sense BROT Logical bit rotate Skip Node Instruction One Node Function SKP Skips a specified number of networks in a ladder logic program GM 0984 SYS Ladder Logic Overview 99 7 3 Additional Ladder Logic Instructions Some special instructions are standard in some 984 controllers but are unavail able in ot
230. rs rj The first 4x in a source table of holding registers The value in the middle node is a pointer to the register in the source table to be moved in the scan and to the register in the destination table where the source register will go The pointer is a 4x register and the first register in the destination table is 4x 1 The length of the two tables must be equal and this length is spe cified in the bottom node A value of 0 in the pointer equals the first register in the table The bottom node indicates that the function is a table to table register transfer in struction and specifies the table length for both the source and destination tables The length may range from 1 255 in 16 bit CPUs and 1 999 in 24 bit CPUs 146 DX Move Functions GM 0984 SYS A TT Example 30001 10001 40380 10002 00137 TT 00003 pointer dud 40380 source destination 30001 gt 40381 30002 40382 30003 40383 The first transition of 10001 moves the contents of 30001 to register 40381 and in crements the pointer value stored in 40380 to 1 and the second transition moves the contents of 30002 to register 40382 and increments the pointer value to 2 The third transition of 10001 moves the contents of 30003 to register 40383 and increments the pointer value to 3 Because the pointer value now equals the table length the middle input passes power and energiz
231. rst 255 words in the STAT table whereas a 24 bit CPU can access all 277 words 180 Monitoring System Status GM 0984 SYS 14 2 The S901 Status Table The 75 words in the S901 status table are divided into three sections the first 11 words for controller status information the next 32 words for I O module health in formation and the last 32 words for I O communications information DECIMAL HEX WORD WORD 1 Controller Status 01 2 Unused 02 3 Controller Status 03 4 901 Status 04 5 Controller Stop State 05 6 Number of Segments in User Logic 06 7 Address of End Of Logic Pointer 07 8 RIO Redundancy and Timeout 08 9 ASCII Message Status 09 10 Run Load Debug Status 0A 11 Address of Status Word Pointer Table 0B 12 Channel 1 Input Channel 2 Input oC 18 Channel 3 Input Channel 4 Input oD 14 Channel 5 Input Channel 6 Input 0E 27 Channel 29 Input Channel 30 Input 1B 28 Channel 31 Input Channel 32 Input 1C 29 Channel 1 Output Channel 2 Output 1D 30 Channel 3 Output Channel 4 Output 1E 31 Channel 5 Output Channel 6 Output 1F 42 Channel 29 Output Channel 30 Output 2A 43 Channel 31 Output Channel 32 Output 2B 44 Remote I O Channels 5and6 First Word 2C 45 Remote I O Channels 5 and6 Second Word 2D 46 Remote I O Channels 7 and8 First Word 2E 47 Remote I O Channels 7 and8 Second Word 2F 70 Remote I O Channels 31 and 32 First Word 46 71 Remote I O Channels 31 and 32 Second Word 47 72 Remote I O Channels 1 and 2 First Word 48 73 Remote
232. s AS P190 212 17 AS P190 222 17 AS P230 000 16 GM 0984 SYS proportional control in a PID2 function 276 PV See process variable Q queue building functions in a DX table 148 R R911 Hot Standby options for 984 chassis mount controllers 20 radian to degree conversion in floating point 271 READ function 35 for ASCII communications 170 reference numbering system 74 register inputs 3x 74 register outputs 4x 74 register to table move 142 remote I O drop interfaces 33 support for ASCII devices 34 reset watchdog timer routine 115 RET function 241 returning from a subroutine 241 reverse transfer function in Hot Standby systems 297 rotating a bit pattern in a DX matrix 166 RTU communication mode 53 S S911 Hot Standby options for 984 slot mount controllers 20 978 Dual Modbus Modem 26 985 Modbus Plus Adaptor 27 985 Modbus Plus Adaptor modules 27 scan time 104 scan time evaluation circuit 106 scanning logic segments 103 search for bit pattern in a DX table 150 segment scheduler 96 110 defining order of logic solution 103 improving overall system performance 114 improving overhead servicing frequency 115 improving throughput for critical I O 112 segments in ladder logic 96 SENS function 164 sense of a bit 164 sequential control functions cascaded blocks 311 Index 325 DRUM 308 ICMP 310 sequential function chart 10 servicing I O drops as a part of scan time 105
233. s II PID2 v v v Enables configuring tuning and monitoring of closed loop control system MSTR v v Provides Modbus Plus capabilities via the S985 option module DRUM ICMP VW v v Simplifies implementation of sequential step oriented logic Advanced v v v Provides enhanced math and data transfer Math DX capabilities EARS v v Provides an event alarm reporting system that detects and time stamps changes in events and places the data in a controller buffer where it can be accessed by a host computer or high speed network Advanced math functions include log antilog square root process square root and double precision math advanced DX functions include table to block and block to table moves and checksum PID2 MSTR and the advanced math DX functions are provided as loadables for the chassis mount controllers only comparable functionality is provided as standard in other controllers see Section 1 6 For more details on the loadable software packages see Chapter 21 GM 0984 SYS The 984 Programmable Controllers 9 1 5 MODSOFT Panel Software Support MODSOFT is an integrated software tool for programming testing and docu menting application logic for 984 controllers that may be used on a P230 Pro gramming Panel or on an IBM XT AT or compatible Personal Computer All the editor functions available in the P190 and P190 emulation packages are combined in MODSOFT along with enhanced features MODSOFT compri
234. s Port Pinouts for the P190 Programming Panel Here are the Modbus port pinouts for the P190 Programming Panel P190 to Modbus Pinouts 25 Pin Male 25 Pin Male P190 984 SHIELD 1 SHIELD TX 2 TX RX 3 RX RTS 4 RTS CTS 5 CTS DSR 6 DSR GROUND 7 GROUND CD 8 l CD DTR 20 20 DTR 25 Pin Male 9 Pin Male P190 984 SHIELD SHIELD TX RX RX TX RTS DTR CTS GROUND DSR DSR GROUND RTS NC CTS DTR NC GM 0984 SYS 984 Communications Capabilities 55 4 4 Modbus Port Pinouts for an IBM XT Here are the Modbus port pinouts for an IBM XT Personal Computer IBM XT to Modbus Pinouts 25 Pin Female 25 Pin Male IBM XT 984 SHIELD SHIELD TX TX RX RX RTS RTS CTS CTS DSR DSR GROUND GROUND CD CD DTR DTR 25 Pin Female 9 Pin Male IBM XT 984 SHIELD SHIELD TX RX RX TX RTS DTR CTS GROUND DSR DSR GROUND RTS NC CTS DTR NC 56 984 Communications Capabilities GM 0984 SYS 4 5 Modbus Port Pinouts for a Modicon Comm Modem Here are the Modbus port pinouts for the J478 S978 Modicon Modems Comm Modem to Modbus Pinouts 25 Pin Male 25 Pin Male J478 S978 984 SHIELD 1 1 SHIELD TX 2 A 2 TX RX 3 LA 3 RX RTS 4 um 4 RTS CTS 5 5 CTS DSR 6 6 DSR GROUND 7 7 GROUND CD 8 8 CD DTR 20 T 20 DTR 25 Pin Male 9 Pin Male J478 S978 984 SHIELD 1 1 SHIELD TX 2 2 RX RX 3 3
235. s in State RAM associated with the discretes or registers used in your ladder logic program With a 16 bit node 11 bits are available as state RAM pointers giving you a total addressing capability of 2048 words The maximum number of configurable regis ters in most 16 bit machines is 1920 with the balance occupied by up to 128 words 2048 bits of discrete reference disable and history bits An exception is the 984 680 685 Controllers which have an extended registers option that sup ports 4096 registers in state RAM 84 984 Opcode Assignments GM 0984 SYS With a 24 bit node 16 bits are available as state RAM pointers The maximum number of configurable registers in a 24 bit machine is 9999 Opcodes are generally expressed by their hex values Opcodes for Standard Ladder Logic Elements and Non DX Instructions 16 BitNodes 24 Bit Nodes Ladder Logic Binary Binary Hex Element Instruction 00000 00000000 00 Beginning of a column in a network 00001 00000001 01 Beginning of a column in a network 00010 00000010 02 Beginning of a column in a network 00011 00000011 03 Beginning of a column in a network 00100 00000100 04 Start of a network 00101 00000101 05 I O exchange End of Logic 00110 00000110 06 Null Element 00111 00000111 07 Horizontal short 01000 00001000 08 Normally open contact 01001 00001001 09 Normally closed contact 01010 00001010 0A Positive transitional contact 01011 00001011 0B Negative transitional contact 01100
236. s on the comm processor module in the controller the J878 module contains one modem An S978 Modem accepts digital data from the slave controller in which it resides and modulates the data into an FM analog signal a form of transmission suited to four wire cable It transmits the analog FM signal to the host s Modbus Master device where it is demodulated to digital data Conversely the Modbus Master transmits digital data which is modulated to an FM analog signal on its way back to the S978 Modem The S978 demodulates the analog signal to digital data and sends the data to the slave controller in which it resides For more information about Modbus network capabilities see Section 4 6 2 6 2 Modbus II Modules The S975 Modbus II Interfaces are option modules that allows a 984 controllers to be used as a processing node in the Modbus II network The AM S975 100 mod 26 Optional and Peripheral Control Devices GM 0984 SYS ule may be used with any chassis mount controller and the AM S975 820 module may be used with 984 685 780 or 785 slot mount controllers Modbus II provides peer to peer communication capabilities between 984 control lers and other Modbus II devices over a local area network For more information about Modbus II networking see Section 4 9 Special software must be loaded into the controller to program Modbus II commu nications in ladder logic Two loadable function blocks MBUS and PEER de scribed in Chapter 2
237. sed Loadables SW AP9x DxA includes MATH chassis mounts Library DMTH TBLK BLKT CKSM and PID2 PID2 SW AP9x 2xa PID2 closed loop chassis mounts control software EARS SW AP9D EDA Event alarm record All 984 controllers ing system When the x in the above software part numbers is a T the medium is a P190 tape when the x is a D the software media are 5 25 in and 3 5 in diskettes TBLK BLKT CKSM and PID2 are functionally identical to those instructions of the same name provided in firmware for the 984 385 485 685 785 Controllers This chapter describes all the loadable functions that support option modules ex cept MSTR which is described in Chapter 17 It also describes the sequence control loadables DRUM and ICMP the EARS function block and the custom loadable function block model FNxx The MATH and DMTH functions which do double precision math square root log and antilog functions similar to those in EMTH see Chapter 20 are also de scribed here For descriptions of TBLK BLKT and PID2 refer to Chapter 20 for a description of the CKSM function refer to Chapter 18 GM 0984 SYS 984 Loadable Instructions 293 21 2 The 984 Hot Standby Loadable HSBY is a loadable DX function that manages a Hot Standby control system This function block must be placed in network 1 of segment 1 in the application logic for both the primary and standby controllers This function allows you to pro gram a nontransfe
238. segment are coordinated in this fashion Using direct memory access DMA ISTs typically take less than 1 ms segment At the end of each scan input messages to the communication ports Modbus Modbus Plus Modbus II are serviced The maximum time allotted for comm port servicing is 2 5 ms scan typical servicing times are less than 1 ms scan If the controller is using any option processors C986 Coprocessors or D908 Distributed Communications Processors they are also serviced at the end of each scan and typically require less than 1 ms scan System diagnostics take from 1 2 ms scan to run depending on controller type GM 0984 SYS Ladder Logic Overview 105 Drop 2 Drop 3 Drop 1 Input Input Input Segment 1 Segment 2 l Segment 3 l Logic Networks 3 Logic Networks 2 Logic Networks s OVHD Drop 3 Drop 1 Drop 2 Output Output Output me One Scan gt Overhead Support Time 106 Ladder Logic Overview GM 0984 SYS 7 7 How to Measure Scan Time The following ladder logic circuit may be entered into your program to evalute sys tem scan time 01000 00500 01000 UCTR 00999 40001 10001 T 01 40003 10001 40002 100 DIV 40005 The upcounter counts 1000 scans as it transitions 500 times When the counter has transitioned 500 times the T 01 timer turns
239. ses a set of source code editors for programs and for symbolic information The source pro grams are subdivided into SFC language and ladder logic 1 5 1 Sequential Function Charts SFC is an optional feature that allows you to generate new programs arranged in blocks rather than the linear sequence of straight ladder logic A sequential func tion chart can solve multiple networks in a parallel link block or one in a choice of several networks in a selective link block 7 Initial Ste gt S011 P S Step 1 T Transition T 011 Parallel Link S021 S022 S023 S024 2 2 2 T 021 031 1 rL o31 woos rt J 0o33 Selective Link soar s042 S043 6 3 i T 041 T 042 T 043 V s011 Reference goto 10 The 984 Programmable Controllers GM 0984 SYS Logic is solved within a block until a specified transition event informs the CPU to move to the next step SFC allows application software to be created in a format that more closely emulates an actual machining procedure or process flow it can help improve system throughput by solving only those networks specified by tran sition events rather than moving linearly through each network in the program on every scan 1 5 2 MODSOFT Macros MODSOFT provides a macro feature that can simplify the task of generating and updating large number of repetitive network struct
240. set for UCTR accumulated count The counter preset in the top node can be o A decimal ranging from 1 999 in 16 bit CPUs and 1 9999 in 24 bit CPUs o An input register 3x o A holding register 4x The bottom node signifies the DCTR or UCTR function and contains a holding register 4x that stores the accumulated count 128 Counters and Timers GM 0984 SYS Here is an example of an up counter 00100 10027 00077 NI UCTR 40007 00077 00055 When contact 10027 is energized CONTROL IN receives power and since con tact 00077 is also receiving power UCTR is enabled Each time contact 10027 transitions from OFF to ON the accumulated count val ue increments 1 When the value reaches 100 when contact 10027 has transi tioned 100 times the top output passes power Coil 00077 is energized and coil 00055 is de energized Contact 00077 loses power when coil 00077 is energized and the accumulated count value is reset to 0 on the next scan On the next scan coil 00077 is de energized Contact 00077 is then re energized and the UCTR function is enabled GM 0984 SYS Counters and Timers 129 9 2 Three Kinds of Timers Three timer instructions are available for timing an event or creating a delay They measure time in seconds T1 0 in tenths of a second TO 1 and in hun dredths of a second T 01 Each timer is a two node function block Time accumulates when timer
241. sition 3 Coil 00142 is energized for one scan When 10001 is transitioned a second time it starts again at 40421 and searches for a match It will find it again at 40423 When 10002 is energized and 10001 transitions from OFF to ON the source table is searched for a 3333 The SRCH function finds a match at register 40423 and stops the SRCH It sets the pointer value to 3 indicating that a match exists in table position 3 Coil 00142 is energized for one scan GM 0984 SYS DX Move Functions 151 11 4 BLKM BLKM is the block move instruction in one scan it copies the entire contents of one table to another table of outputs or holding registers BLKM is a three node function block ON move source Copies current state of initiated the top input destination BLKM table length The top node source may be rj The first Ox in a table of output references rj The first 1x in a table of input references o The first 3x in a table of input registers o The first 4x in a table of holding registers The middle node destination may be o The first Ox in a table of coils or output registers the one and only time that the referenced coils may be used o The first 4x in a table of holding registers The bottom node indicates that this is a BLKM function and specifies a table size that can range from 1 100 Warning BLKM will override any disabled coils within a destina tion table without enablin
242. splaying coils If your software treats coil usage this way then no other logic elements may be displayed in the 11th column and the re maining 70 nodes may not be used for coils Although coils may be automatically displayed in the 11th column they are not al ways solved there The column in which coil 00101 is solved is determined by the position of its controlling logic 30101 00200 TON 10033 00101 40101 40005 SUB 00102 40102 00103 Coil 00103 is solved immediately after the UCTR function block and coil 00102 is solved immediately after the normally open contact 10033 Coil 00101 is the last coil to be solved in this network GM 0984 SYS Ladder Logic Overview 97 7 2 Ladder Logic Elements and Standard Instructions There are six standard one node ladder logic elements contacts and coils in all 984 Controller firmware packages Standard One Node Ladder Logic Elements Symbol Meaning A normally open contact N A normally closed contact A positive transitional contact l A negative transitional contact XU A normal coil aca A latched coil 98 Ladder Logic Overview GM 0984 SYS There are 26 standard block instructions available in a 984 Controller firmware packages Standard Instructions for All 984s Instruction Meaning Counter and Timer Instructions Two Node Functions UCTR Counts up from 0 to a preset value DCTR Counts down f
243. statistics function clears operational statistics related to a re mote network node from the data area in the local node This operation may re quire multiple scans to complete and uses a single data master transaction path 17 9 1 Control Block Utilization The contents of seven registers in the top node of the MSTR block contain the fol lowing information when you implement a Clear remote statistics function Control Block MSTR Register Register Function Content 4x Operation type 8 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2 and 4x 3 Not used 4x 4 4 5 Routing 1 2 3 Designates the first through fifith routing path 6 7 8 4 5 addresses respectively the last nonzero byte in the routing path is the destination device Note You need to understand Modbus Plus routing path procedures before programming an MSTR block A full discussion of routing path structures is given in Modbus Plus Network Planning and Installa tion Guide GM MBPL 001 See Section 17 10 for the listing of available network statistics 228 Modbus Plus Master Function GM 0984 SYS 17 10 Network Statistics The following table presents statistics available on the Modbus Plus network You may acquire this information by using the appropriate MSTR logic function or by using Modbus function code 8 Note When you issue the Clear local or Clear remote statistics func tions only words 13
244. stributed link is described in Section 4 10 GM 0984 SYS Optional and Peripheral Control Devices 27 The D908 modules may be used with a 984 680 685 780 and 785 slot mount controllers installed at remote locations and connected to a higher level 984 con troller via the S908 remote I O cable The higher level controller sees this distrib uted controller as a J890 remote I O drop The D908 110 option module supports one cable connection the D908 120 supports two connections 28 Optional and Peripheral Control Devices GM 0984 SYS Chapter 3 984 I O Subsystems o O Subsystems 3 Local I O o Remote I O o ASCII Communication at Remote I O Drops o Overview of I O Support for 984 Controllers 3 800 Series I O Modules o Power Supplies for Local and Remote 800 Series I O Drops 3 200 Series I O Modules 3 500 Series I O Modules q A120 Series I O Modules o 300 Series I O Modules GM 0984 SYS 984 I O Subsystems 29 3 1 I O Subsystems The application logic that is stored in and solved by the controller is implemented on the factory floor by input and output modules These I O modules are field wired to sensing or switching devices on the shop floor and linked to the controller over an I O bus to create a complete control system Modicon provides several series of I O modules that may be implemented by different 984 controllers 3 1 1 Input and Output Modules An input module accepts electrical signals from field sensing
245. subtracted from the top node value 4x 2 and 4x 3 contain the FP difference of the subtraction 262 984 Enhanced Instructions GM 0984 SYS FP Multiplication ON block multiplies FP value 1 ON operation performed FP value 1 by FP successfully value 2 FP value 2 and product EMTH 20 The top node comprises two consecutive 4x registers that contain one FP value which will be multiplied by the middle node value The middle node contains four consecutive 4x registers registers 4x and 4x 1 contain a second FP value 4x 2 and 4x 3 contain the FP product FP Division ON block divides FP FPyalue1 ON operation performed value in top node by FP successfully value in middle node FP value 2 and quotient EMTH 21 The top node comprises two consecutive 4x registers that contain one FP value which will be divided by the middle node value The middle node contains four consecutive 4x registers registers 4x and 4x 1 contain the second FP value 4x 2 and 4x 3 contain the FP quotient GM 0984 SYS 984 Enhanced Instructions 263 FP Comparison ON block compares FP value 2 to FP value 1 FP value 1 FP value 2 EMTH 22 L ON operation performed successfully ON value 1 value 2 when bottom output is OFF ON value 1 lt value 2 when middle output is OFF Middle Output Bottom Value Relationship ON OF
246. t may restrict the message con tent or timing In RTU mode a Modbus port handles messages composed of bytes containing eight data bits and either one parity bit and one stop bit or no parity bit and two stop bits RTU Mode data bits logic 1 start arity stop bit 1 2 3 4 5 6 7 8 pary B logic 0 bit bit RTU mode packs data bits more compactly in order to increase speed GM 0984 SYS 984 Communications Capabilities 53 4 2 Modbus Port Pinouts for the P230 Programming Panel The chassis mount controllers provide one or more 25 pin Modbus ports and the other controllers provide nine pin ports Here are the pinouts for for the P230 Panel with these ports The same pinouts apply to an IBM AT Personal Computer and to a FactoryMate Plus Operator Panel P230 to Modbus Pinouts CTS clear to send NC no connection 9 Pin Female 25 Pin Male P230 984 CD r 1 1 SHIELD RX 2 A 2 TX TX 3 3 RX DTR 4 4 RTS GROUND 5 5 CTS DSR 6 6 DSR RTS 7 7 GROUND CTS 8 8 CD 20 DTR 9 Pin Female 9 Pin Male P230 984 NC 1 1 SHIELD RX 2 2 RX TX 3 3 TX DTR 4 4 DTR GROUND 5 5 GROUND DSR cJ COP 6 DSR RTS ej C 7 RTS CTS 8 8 CTS 9 NC TX transmitted data DSR data set ready RX received data DTR data terminal ready RTS request to send CD carrier detect 54 984 Communications Capabilities GM 0984 SYS 4 3 Modbu
247. tatistics see Section 21 7 4x 3 Discrete or register reference type 0 Discrete output 0x 1 Discrete input 1x 3 Input register 3x 4 Holding register 4x 4x 4 Reference number e g if you placed a 4 in register 4x 3 and you place a 23 in this register the reference will be holding register 40023 4x 5 Number of words of discrete or register references to be read or written the length limits are Read register 251 registers Write register 249 registers Read coils 7848 discretes Write coils 7800 discretes 4x 6 Time allowed for a transaction to be completed before an error is declared expressed as a multiple of 10 ms e g 100 indicates 1000 ms the default timeout is 250 ms The middle node is the first 4x register in a data block to be transmitted or re ceived in the MBUS transaction The number of words reserved for the data block is entered as a constant value in the bottom node This number does not imply a data transaction length but it can restrict the maximum allowable number of register or discrete references to be read or written in the transaction The maximum number of words that may be used in the specified transaction is oO 251 for reading registers one register word O 249 for writing registers one register word Oo 490 for reading discretes using 24 bit CPUs 255 for reading discretes using 16 bit CPUs up to 16 discretes word O 487 for writing discretes using 24 bit CPUs 255 for rea
248. ted controller as a J890 I O drop with input and output addresses Traffic Copped to it A special D908 Traffic Cop screen is used in the panel software GM 0984 SYS 984 Communications Capabilities 67 Distributed processing means that system control development can be broken up into smaller programs at individual distributed stations while the supervisor con trols the interlocking and collects the process information Smaller programs mean better throughput and easier troubleshooting 4 10 1 Distributed Control Applications Distributed processing systems are well suited to transfer line control and material handling applications In certain cell applications a supervisory 984 controller with a C986 Coprocessor can act as the cell controller doing data collection data logging and program uploading downloading and archiving when process changes are required new data can be downloaded via the D908s to quickly change parameters and resume production Supervisory 984 with 908 and C986 Copro l Program Upload Download Network Mass Storage Device Distributed 984 Distributed 984 Distributed 984 with D908 110 with D908 110 with D908 110 RIO Network 68 984 Communications Capabilities GM 0984 SYS 4 11 Network Topology Overview The illustration on the following page shows in simplified form how multiple net works types may be interconnected in a 984 control s
249. ter get master rsp transfer request bit map HI Program slave get slave command transfer request bit map 12 LO Program master connect status bit map HI Program slave automatic logout request bit map 13 LO Pretransmit deferral error counter HI Receive buffer DMA overrun error counter 14 LO Repeated command received counter HI No Try counter nonexistent station 15 LO Receiver collision abort error counter HI Receiver alignment error counter 16 LO Receiver CRC error counter HI Bad packet length error counter 17 LO Bad link address error counter HI Transmit buffer DMA underrun error counter 18 LO Bad internal packet length error counter HI Bad mac function code error counter 19 LO Communication retry counter HI Communication failed error counter 20 LO Good receive packet success counter HI No response received error counter 21 LO Exception response received error counter HI Unexpected path error counter 230 Modbus Plus Master Function GM 0984 SYS Modbus Plus Network Statistics continued Word Byte Meaning 22 LO Unexpected response error counter HI Forgotten transaction error counter 23 LO Active station table bit map nodes 1 8 HI Active station table bit map nodes 9 16 24 LO Active station table bit map nodes 17 24 HI Active station table bit map nodes 25 32 25 LO Active station table bit map nodes 33 40 HI Active station table bit map nodes 41 48 26 LO Active station table bit map nodes 49 56 HI Activ
250. tes FP value ON operation performed the cosine of FP value successfully in top node cosine of FP value EMTH 27 The top node comprises two consecutive 4x registers that contain an FP value in dicating the value of an angle in radians The magnitude of this value must be lt 65536 0 if not rj The cosine is not computed g An invalid result is returned o An error is flagged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the cosine of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used FP Tangent of an Angle in Radians ON block calculates L ON operation performed the tangent of FP value EP valve successfully in top node tangent of FP value EMTH 28 GM 0984 SYS 984 Enhanced Instructions 267 The top node comprises two consecutive 4x registers that contain an FP value in dicating the value of an angle in radians The magnitude of this value must be lt 65536 0 if not o The tangent is not computed g An invalid result is returned o An error is flagged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the tangent of the FP v
251. th of Error in deferred DX function source table A Deferred DX CALL Block The top node specifies as a constant or in a 4x holding register containing a func tion code to be executed The codes fall into two ranges numbers 0 499 are available for user definable DXs and numbers 500 9999 are system DXs pro vided by Modicon 298 984 Loadable Instructions GM 0984 SYS System Immediate DX Functions Name Code Function f_config 500 Obtain Copro configuration data f 2md fl 501 Convert a two register long integer to 64 bit floating point ffl 2md 502 Convert floating point to two register long integer f 4md fl 503 Convert a four register long integer to floating point ffl 4md 504 Convert floating point to four register long integer f tmd fl 505 Convert a one register long integer to floating point ffl 1md 506 Convert floating point to one register long integer f exp 507 Exponential function f log 508 Natural logarithm f log10 509 Base 10 logarithm f pow 510 Raise to a power f sqrt 511 Square root f cos 512 Cosine f sin 513 Sine f tan 514 Tangent f atan 515 Arc tangent x f_atan2 516 Arc tangent y x f_asin 517 Arc sine f_acos 518 Arc cosine f_add 519 Add f sub 520 Subtract f mult 521 Multiply f div 522 Divide f deg rad 523 Convert degrees to radians f rad deg 524 Convert radians to degrees f swap 525 Swap byte positions within a register f comp 526 Floating point compare f dbwrite 527 Write
252. tion Modules GM 0984 SYS Optional and Peripheral Control Devices 15 2 1 Programming Panels Modicon offers two kinds of industrially hardened programming panels the P230 and the P190 These panels may be used to o Start and stop the controller rj Enter modify and archive ladder logic programs r1 Monitor the register and discrete values in user memory and state RAM rj Enable disable and force discrete inputs and coils o Display and modify the contents of holding registers o Display and set communication parameters for the communication ports o Provide on line monitoring of power flow 2 1 1 The P230 The AS P230 000 is a portable programming panel with a 40 Mbyte hard disk for matted and installed with MS DOS and GW BASIC interpreter software It sup ports both MODSOFT and P190 emulation software either of which may be loaded from the unit s a 3 5 in disk drive The P230 power supply is 115 230 VAC user selectable Modicon P230 Programmer AE 16 Optional and Peripheral Control Devices GM 0984 SYS 2 1 2 The P190 Panels The P190 is a Modicon proprietary portable programming panel software with a set of specially designed digital tapes see section 1 4 for use specifically in this panel The P190 does not support the MODSOFT There are two types of P190 Panels available the AS P190 212 which operates on 115 VAC and the AS P190 222 which operates on 220 VDC MODICON P190 iN seu8806888 Be CEELELLELLELL
253. tion Set is a proportional integral derivative function block called PID2 which allows you to establish closed loop or negative feedback control in ladder logic 20 6 1 Set Point and Process Variable The desired zero error control point which you will define in the PID2 block is called the set point SP The conditional measurement taken against SP is called the process variable PV The difference between the SP and the PV is the devi ation or error E E is fed into a control calculation that produces a manipulated variable M used to adjust the process so that PV SP and therefore E 0 CONTROL END DEVICE gt PROCESS PY PROCESS TRANSMITTER k SU DUE Py INPUT CONTROL grs CALCULATION sp 20 6 2 Proportional Control With proportional only control P you can calculate the manipulated variable by multiplying error by a proportional constant K4 then adding a bias My KqE bias 276 984 Enhanced Instructions GM 0984 SYS However process conditions in most applications are changed by other system variables so that the bias does not remain constant the result is offset error where PV is constantly offset from the SP This condition limits the capability of proportional only control 20 6 3 Proportional Integral Control To eliminate this offset error without forcing you to manually change the bias an integral function can be added to the contr
254. tistics function Control Block MSTR Register Register Function Content 4x Operation type 3 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 2 Length Starting from offset the number of words of statis tics from the local processor s statistics table the length must be gt 0 the size of the data area 4x 38 Offset An offset value relative to the first available word in the local processor s statistics table if the offset is specified as 1 the function obtains statistics starting with the second word in the table 4x 4 Routing 1 If this is the second of two local nodes set the high byte to a value of 1 See Section 17 10 for the listing of available network statistics GM 0984 SYS Modbus Plus Master Function 223 17 5 Clear Local Statistics MSTR Function The Clear local statistics function clears operational statistics relative to the local node where the MSTR function has been programmed This operation takes one scan to complete and does not require a data master transaction path 17 5 1 Control Block Utilization The contents of the first two registers in the top node of the MSTR block are used when you implement a Clear local statistics function Control Block MSTR Register Register Function Content 4x Operation type 4 4x 1 Error status Displays a hex value indicating an MSTR error when relevant see 17 2 4x 4 Routing 1 If this is the second o
255. trol of multiple devices e g motors valves solenoids at differ ent steps in a process is required The package consists of two loadable instruc tions DRUM and ICMP along with a DOS based user interface The DRUM instruction uses software to emulate a Tenor drum in ladder logic The ICMP in struction is an input compare function used with DRUM to verify the correct opera tion of each step in the drum sequence 21 9 1 DRUM The DRUM function operates on a table of 4x registers containing data represent ing the desired status of 16 outputs for each step in a sequence The number of these registers associated with a DRUM block is dependent upon the number of steps required in the sequence You may pre allocate registers used to store data for each step in the sequence thereby allowing you to add future sequencer steps without having to modify appli cation logic DRUM blocks incorporate an output mask that allows you to selectively mask bits in the register data before writing it to coils This is particularly useful when all physical sequencer outputs are not contiguous on the output module Masked bits are not altered by the DRUM instruction and may be used by logic unrelated to the sequencer DRUM is a three node function block Enables the 1 step pointer Copies the top input state DRUM sequencer Increment the step step data __ Last step step pointer pointer to next step table steps used register DRU
256. ts Application Discrete Outs Sensing Devices Input 1 0 Processor Output Modules Modules gt to Applicati Communications Processor Switching K Devices Peripheral Other Nodes Host Devices on a Network 1 3 2 Reliability and Maintainability Modicon designs fault protection and isolation features into all 984 controllers Orderly system startup and shutdown procedures help protect system memory state RAM and system hardware from damage due to external power failures Long life lithium batteries back up system memory and state RAM in the event of an unexpected power failure When power has been restored a series of internal controller checksum diagnostics validate that RAM data are consistent with the values that were active at the time of power down GM 0984 SYS The 984 Programmable Controllers 7 1 4 P190 Style Panel Software Support Modicon provides P190 panel software SW CS9T OTB on specially constructed cassette tapes and P190 emulation software on 5 25 in SW CS9D 5DA and 3 5 in SW CS9D 3DA diskettes for the P230 Programming Panel or for IBM XT AT or compatible Personal Computers 1 4 1 Standard Panel Software Editors Standard panel software packages contain the following editors Software 3 5 in 5 25 in P190 Editor Editor Diskette Diskette Tape Description Configurator VW v v Defines control and communication para meters allocates memory accesses con troller operations Traffic Cop
257. ts long and only register 4x 4 is used 316 984 Loadable Instructions GM 0984 SYS 21 11 The EARS Loadable The EARS block is loaded to a 984 controller being used in an alarm event re cording system An EARS system requires that the 984 work in conjunction with a man machine interface MMI host device that runs a special off line software package The controller monitors a specified group of events for any changes in state and logs change data into a buffer the data are then removed by the host over a high speed network such as Modbus II or Modbus Plus The two devices comply with a defined handshake protocol that ensures that all data detected by the 984 controller are accurately represented in the host 21 11 1 984 Functions in an Event Alarm Recording System When a 984 controller is employed in an EARS environment it is set up to main tain and monitor two tables of 4x registers one containing the current state of a set of user defined events and one containing the history of the most recent state of these events Event states are stored as bit representations in the 4x regis ters a bit value of 1 signifying an ON state and a bit value of 0 signifying an OFF state Each table can contain up to 62 registers allowing you to monitor the states of up to 992 events When the controller detects a change between the current state bit and the history bit for an event the EARS function block prepares a two word message and places it in a
258. ts to the block are present GM 0984 SYS Counters and Timers 131 9 3 A Real Time Clock Example mE creo reer 0 00001 T1 0 40053 00060 fei erent ees ar USE O 00002 UCTR 40052 00024 e LI E O 00003 UCTR 40051 The first function block above is a T1 0 instruction programmed as a one minute timer When logic solving begins coil 00001 is OFF both the top and bottom in puts of the timer receive power Register 40053 starts incrementing time in seconds After 60 increments the top output passes power and energizes coil 00001 Register 40053 is reset Register 40052 in the first up counter block increments by 1 indicating that one minute has passed Because the T1 0 block is no longer equal to the preset coil 00001 is de ener gized and the timer resumes incrementing seconds When the value in 40052 reaches 60 the top output in the first up counter passes power and energizes coil 00002 Register 40052 is reset and the accumulated count in the second up counter register 40051 increases by 1 indicating that one hour has passed The correct time of day can be read in registers 40051 indicating hours 40052 indicating minutes and 40053 indicating seconds 132 Counters and Timers GM 0984 SYS Chapter 10 Standard Calculate Functions o ADD o SUB o MUL o DIV o A DIV Example o A Fahrenheit to Centigrade Conversion Example GM 0984 SYS Standard Calculate Functions 133
259. um stored value of 9 999 in the 3x register the register value must not be less than 1 o For antilogarithm functions the value stored in the 3x or 4x register must be in the range 0 7999 a maximum value of 7 999 with an implied decimal point The middle node is the first of two consecutive 4x holding registers The result of the operation is stored in these two registers The bottom node provides the functional selection mechanism for the block En ter a constant value in the range 1 4 to indicate the integer math function you want to employ Code Number Math Function decimal square root process square root logarithm antilogarithm Bom 21 10 2 DMTH The DMTH function performs any one of four double precision math operations DMTH is a three node function block with input and output lines that vary depend ing on the selected operation Double Precision Addition ON add operands and operand 1 ON operation per place result in designated formed registers successfully operand 2 ON an operand is out of and destination range or invalid Operation not performed DMTH 1 GM 0984 SYS 984 Loadable Instructions 313 The top node comprises two consecutive 4x registers each register holds a value in the range 0000 9999 for a combined value range of up to 99 999 999 The middle node comprises six consecutive 4x registers o 4x and 4x 1 hold the second operand value in the range
260. unication status word subtract OAC hex from the status word number then add the result to the I O communication pointer 192 Monitoring System Status GM 0984 SYS 14 10 Accessing S908 Status Data with a P965 DAP If you are accessing the status table with a P965 DAP words 1 11 can be found in absolute memory locations 300101 300111 decimal The I O health status table is kept in 160 sequential memory locations the communication status table is kept in 106 sequential memory locations The actual memory locations that hold these two tables will vary with different 984 controllers Use pointers to locate the first word in the I O module health status table and the communication status table The pointers are always found at the same locations in absolute memory o I O module health pointer location 300070 p 1 0 communication pointer location 300051 Add 300000 to the pointer as follows Pointer Address XXXXX SXXXXXX where the last five digits xxxxx of the pointer become the last five digits of the address For example pointer 00984 becomes address 300984 To find the address of an I O health status word subtract 12 from the status word number then add the result to the I O health status pointer To find the address of a communication status word subtract 172 from the status word number then add the result to the I O communication pointer GM 0984 SYS Monitoring System Status 193 14 11 S908 Control
261. ures Using the macro feature you can create the repeating structure once then specify the node values using macro parameters rather than standard 984 reference numbers Each macro can contain up to 66 macro parameters by using wild card characters in your nam ing scheme you can actually create thousands of parameters macro 1 5 3 MODSOFT Operating Modes You may operate in three modes in MODSOFT Oo Offline where programming and programming modification can be done with out using a 984 controller linked to the programming device Oo Online where the application is communicating with the controller and any changes made to the program are reflected in the controller rj Debug where any changes made to the logic program are saved simulta neously in the 984 controller and in the offline program file and where SFC can be monitored for power flow GM 0984 SYS The 984 Programmable Controllers 11 1 6 Overview of the 984 Instruction Set The following instructions are standard in all 984 System Executives Instruction Meaning Normally open contact Normally closed contact t Positive transitional contact i Negative transitional contact E Coil BE Latch coil Calculations Functions ADD Addition SUB Subtraction greater than less than and equal to MUL Multiplication DIV Division Counting amp Timing Functions UCTR Up counter from 0 to a preset DCTR Down counter from a preset to 0 T1 0 Timer th
262. utive 4x registers that contain an FP value gt 0 If the value lt 0 an invalid result will be returned in the middle node and an er ror will be logged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the natural logarithm of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used GM 0984 SYS 984 Enhanced Instructions 273 FP Common Logarithm ON block calculates FP value ON operation performed the common log of FP successfully value in top node common log of FP value EMTH 37 The top node comprises two consecutive 4x registers that contain an FP val ue gt 0 If the value lt 0 an invalid result will be returned in the middle node and an error will be logged in EMTH function 38 The middle node contains four consecutive 4x registers registers 4x and 4x 1 are not used 4x 2 and 4x 3 contain the common logarithm of the FP value in the top node Note f you want to preserve registers you may make registers 4x and 4x 1 in the middle node 4x and 4x 1 in the top node since the first two middle node registers are not used 274 984 Enhanced Instructions GM 0984 SYS FP Error Report Log ON block retrieves a not used
263. ved LAN Error Code see Word 175 above Word 179 Displays global communication status If the bit is set to 1 then the condition is TRUE 1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 EIE C Cumulative Retry Counter Lost Communication Counter Not Used Cable B Status Cable A Status Comm Health GM 0984 SYS Monitoring System Status 201 Word 180 Global Cumulative Error Counter Cable A High byte bits 1 8 Detected error count Low byte bits 9 16 No response count Word 181 Global Cumulative Error Counter Cable B High byte Detected error count Low byte No response count For controllers that support remote I O words 182 277 are used to describe re mote I O drop status three status words are used for each drop Words 182 184 Assigned to drop 1 Words 185 187 Assigned to drop 2 etc Words 275 277 Assigned to drop 32 Each group of RIO drop status word is organized as follows First Word Displays communication status If the bit is set to 1 then the condition is TRUE 1 2 3 4 5 e v e 9 10 1 12 13 14 15 16 eee Cumulative Retry Counter Lost Communications Counter Not Used Cable B Status Cable A Status Communication Health 202 Monitoring System Status GM 0984
264. wo networks GM 0984 SYS 984 Communications Capabilities 63 Host Computer Modbus Bridge Station 1 x Modbus Plus Using Modbus Plus Networks in a Multi Cell Manufacturing Area FactoryMate Plus MMI w SA85 PS 2 w SM85 Terminating Connector Inline Connector IBM AT w SA85 984 385 Controllers at Individual Cell Stations Station 3 Dom EC eea e primi IL T X Station 5 C a rec pr rer IL T UW idge 984 785 Controller used ET 984 385 Controllers at Individual Cell Stations T EI eat WT IL T Station 2 Station 4 Station 1 Station 3 Station 5 984 385 Controllers at Individual Cell Stations ul a fcr co mamal ae rmi IL T d i Bridge 984 785 Controller used Y fai i 984 385 Controllers at Individual Cell Stations EnA i Li mmi I Station 2 Station 4 4 9 A Modbus II Network For communication intensive and time critical applications the Modbus II option delivers highly reliable real time response It operates at 5 Mbits s and supports up to 50 nodes Modbus II is a peer to peer network A Modbus II network ma
265. wo types of software loadable functions are available for 984 programmable con trollers function blocks that support optional controller modules such as the co processing and Hot Standby capabilities and function blocks that support special application or programming requirements such as drum sequencing and the event alarm recording system EARS 21 1 1 Loadable Support for Controller Option Modules Loadable Part Controller Controller Types Functions Number Option Module Supported HSBY SW AP9X RXA AM R911 000 chassis mounts SW AP98 RXA AS S911 800 984 680 685 780 785 slot mounts host based CALL SW AP9X CXB AM C986 004 chassis mounts MBUS PEER SW AP9X AXA AM S975 100 chassis mounts SW AP98 AXA AM S975 820 984 685 780 785 slot mounts host based MSTR SW AP9X MBP AM S985 0x0 chassis mounts When the X in the above software part numbers is a T the medium is a P190 tape when the X is a D the software media are 5 25 in and 3 5 in diskettes The MSTR function that is a loadable for the chassis mount controllers is functionally identical to the MSTR block provided in firmware for the 984 385 485 685 785 Controllers 292 984 Loadable Instructions GM 0984 SYS 21 1 2 Other 984 Loadable Functions Loadable Part Software Controller Types Functions Number Capability Supported DRUM ICMP SW SAx9 001 Sequence control chassis mounts SW AP98 SxA slot mounts host based FNxx SW AP98 GDA Custom loadable slot mounts host ba
266. xamines and reports the sense 1 or 0 of specific bits within a matrix The MBIT instruction modifies a specific bit within a matrix a 0 bit is set to 1 ora 1 bit is cleared to 0 One bit may be sensed or modified per scan Both instruc tions are three node function blocks ON report pointer Copies the current state sense to of of bits in matrix matrix the top input Increment pointer L after bit sensing BIDS Copy or sensen bit SENS j ointer gt matrix length Reset pointer to 1 matrix length p gt g ON change pointer Copies the current state of sense to the top input of bits in matrix matrix 0 clear bit __ data table i i 1 sef bit Copy of middle input MBIT Increment pointer f pointer gt matrix length after modification matrix length Note The differences in each of the function blocks are in the way the middle and bottom inputs are treated the block nodes themselves are essentially the same The top node is a pointer to a value to be sensed or modified in the data table it may be 164 DX Matrix Functions GM 0984 SYS o A constant when the value falls in the range 1 999 in 16 bit CPUs or 1 9600 in 24 bit CPUs go An input register 3x that may hold a value in the range 1 4080 in 16 bit CPUS or 1 9600 in 24 bit CPUs o A holding register 4x that may hold a value in the range 1 4080 in 16 bit CPUS or 1 9600 in 24 bit CPUs T
267. xial cable with the RIO processor in the controller The RIO interface passes data to and from the I O modules in the drop over the I O housing back plane and passes data to and from the 984 controller over the RIO cable system An RIO interface also contains a set of switches that you use to address all the drops in your system There are various kinds of RIO Interfaces you can use depending on the I O Se ries in the drop and the type of RIO processor in the controller According to your application requirements you may select RIO Interfaces that provide the drop with ASCII device support For a detailed discussion of the planning installing and testing an RIO cable sys tem refer to the Modicon Remote I O Cable System Planning Guide GM 0984 RIO GM 0984 SYS 984 I O Subsystems 33 3 4 ASCII Communication at the Remote 1 0 Drops A 984 Controller that communicates with remote I O allows you to connect ASCII data entry and data display devices at as many as 16 drop sites Special types of remote I O interface devices must be used at drops when ASCII devices are used 3 4 1 RIO Interfaces that Support ASCII Communication The J812 and J892 Remote I O Interfaces for 800 Series I O and P453 Remote I O Interface for 200 and 500 Series I O have 25 pin female ASCII ports the P892 RIO Interface for 800 Series I O has 9 pin female ASCII ports 25 Pin Male 9 Pin Male RIO ASCII Port RIO ASCII Port J812 J892 P453 P892 SH
268. y be used for rj Data transfer between controllers rj Data transfer between controllers and host computers Oo Programming of controllers Oo Uploading downloading and archiving of application programs from a host Modbus II communications are conducted over the same type of cable media used in MAP networks 4 9 1 Modbus II Software Modbus II network applications are programmed using two loadable instructions MBUS and PEER MBUS allows your application to read or write registers or dis cretes across the network PEER allows you to write registers simultaneously to as many as 16 nodes on the network providing rapid updating of common appli cation and process values Any node on the network may initiate data transfers across the network using these two instructions CRC 32 error checking diagnostics automatically assure you of reliable data transfer GM 0984 SYS 984 Communications Capabilities 65 A Modbus II Network FactoryMate Plus MMI w SA75 m3 om E E a Self terminating F Adapter 4 port Tap Trunk Cable Terminator Self terminating F Adapter 984B w S975 100 modiule 4 port Tap E Self terminating F Adapter FactoryMate Plus MMI w SA75 m m m m a Self terminating F Adapter 2 portTap Trunk Cable o Terminator Self terminating F Adapter 984 780 Controllers w S975 820 Modul
269. ystem It shows networked hierarchy for controlling a material handling environment A D908 based distributed processing is used to link a string of 984 680 Control lers at pick locations along with a standard drop of 800 Series I O for high speed sorting Above the distributed network in the control hierarchy is a Modbus Plus network used for data acquisition and management It Modbus Plus bridge MUX links the Modbus Plus network via a Modbus interface to the host computer that resides at the top of the control hierarchy GM 0984 SYS 984 Communications Capabilities 69 Host Computer Modbus Bridge X Modbus Plus Using Multiple Networks In a Material Handling Environment FactoryMate Plus MMI w SA85 PS 2 w SM85 IBM AT w SA85 984B with S985 MBPL Adaptor and S908 Remote I O Processor Controlling a High Speed Sorter Modbus Plus Used for Data Acquisition and Management i D908 Distributed Control Used for Application Control J890 Remote O Drop with P810 P S and 800 Series 1 O for High Speed Sorting 984 680s with D908 Distributed Control Processors at each Pick Location T Pick Location 1 Pick Location 2 Pick Location 3 Chapter 5 984 Memory Allocation m User Memory State RAM Q
270. ystem keeps a status block pointer in absolute memory location 300111 decimal it points to a table of addresses 76 words long Addresses 2 76 point to status words 1 75 Procedure Locating a Status Word with a P965 DAP Step 1 Read the pointer stored in location 300111 Step 2 Add the status word number to the pointer Step 3 Add 300000 to the pointer as follows Pointer Address XXXXX SXXXXXX where the last five digits xxxxx of the pointer become the last five digits of the address For example pointer 00984 becomes address 300984 Step 4 Read the pointer from the pointer table Step 5 Convert the address using the procedure described in Step 3 Step 6 Read the status word from system memory GM 0984 SYS Monitoring System Status 183 14 5 901 Controller Status Words Words 1 11 display the controller status words Word 1 Displays the following aspects of the controller s status If the bit is set to 1 then the condition is TRUE 1 2 3 G 7 8 9 10 11 12 13 14 15 16 M Not Used Not Used Battery Failed Memory Protect OFF Run Light OFF AC Power ON 1 16 Bit User Logic 0 24 Bit User Logic Enable Single Sweep Delay Enable Constant Sweep Word 2 is not used and therefore all bit values are 0 Word 3 Displays the following aspects of the controller s status
271. ystem statistics Type of Statistic Counter Register Type of Information Token bus controller 41000 Number of tokens passed by this station TBC 41001 Number of tokens sent by this station 41002 Number of time the TBC has failed to pass token and has not found a successor 41003 Number of times the station has had to look for a new successor Software maintained 41004 TBC detected error frames receive statistics 41005 Invalid request with response frames 41006 Applications message too long 41007 Media access control MAC address out of range 41008 Duplicate application frames 41009 Unsupported logical link control LLC mes sage types 41010 Unsupported LLC address 304 984 Loadable Instructions GM 0984 SYS Type of Statistic Counter Register Type of Information TBC maintained error counters Software maintained transmit errors Software maintained receive errors User logic transaction errors Manufacturing message format standard MMFS errors Background statistics Software revision GM 0984 SYS 41011 41012 41013 41014 41015 41016 41017 41018 41019 41020 41021 41022 41023 41024 41025 41026 41027 41028 41029 41030 41031 41032 41033 41034 41035 41036 41037 41038 41039 41040 41041 41042 41043 41044 41045 Receive noise bursts no start delimiter Frame check sequence errors E bit error in end delimiter Fragmented frames received start delimiter not

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