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1771-6.5.74, Very High-Speed Counter Module User Manual

1. sslussellseesuses SOC 1 New Information 0 0 00 c cece eee eens SOC 1 Updated Information 00cc cece ec eee eens SOC 1 Change Bars cooled balde tae hates es eke x SOC 1 Using This Manual leere P 1 Purpose of This Manual 0000 cee eeeeeaee P 1 AUNE P PP C m P 1 Vocabulary 2 0 ccc tenet nee P 1 Manual Organization 0 00 0 cece eee eee es P 1 Related Products cc ucadhede seceded E ER EXE E EA EA URGE P 2 Product Compatibility 0 00 cece eee eee eee P 2 Related Publications 0 00sec eee e eee eee eens P 2 Overview of the Very High Speed Counter Module 1 1 Chapter Objectives 0 00 cece eee eee eee 1 1 Module Description 0 0 0 c cece cee eee eens 1 1 Features ofthe Module 00 ccc cence eee eees 1 1 Operation in Encoder or Counter Mode _1 2 Counter Mode x xcs sse Qos site Sacer ox Pes eru _1 3 Encoder Mode iure eset does dona Shae ies aot s _1 4 Preset VANE 4 once quu keene ekume deh UID st bath sees 2 _1 6 Rollover Vale prrs seeren inner nnne aE Yd mews _1 7 Software Reset P 1 7 Gate Reset Input 0 cee cee cee eee eens 1 7 Operation in Period Rate Mode nunnana 1 9 Continuous Rate Mode nnn nananana annann 1 12 Operation in Rate Measurement Mode 1 12 DUIDUIS soe cakes ei es RENNES eX PRENNE EPI PEE _1 14
2. communication between module and controller 1 17 block transfers _ 3 1 Compatibility use of data table P 2 configuration block transfer write BTW 4 2 features 4 1 configuration jumpers setting the _ 2 4 connecting wiring field wiring arm _2 5 continuous rate mode _1 12 counter mode block diagram _1 3 operation _1 3 D default configuration _1 16 diagnostic indicators _2 8 diagnostics codes returned by module 6 2 Index E electrostatic discharge _ 2 2 EMC directive _2 1 encoder phase relationship _1 6 encoder mode block diagram 1 4 direction of count 1 5 operation 1 2 encoder X4 1 3 G gate reset input _ 1 7 grounding _2 6 H handshaking bits _ 1 16 indicator lights interpreting _2 8 indicators using for troubleshooting _ 6 1 input cabling capacitance C 9 impedance C 9 length and frequency C 9 input devices 12 to 24V single ended driver C 5 5V line driver C 4 electromechanical limit switch _C 7 open collector C 6 selecting C 1 types of C 1 installing the module 2 7 K keying bands location 2 3 keying your module 2 3 L low voltage directive 2 1 Index module description _ 1 1 module features _ 1 1 module installation _ 2 7 module location _ 2 2 0 operation of outputs continuous rate mode E 4 period rate mode E 3 output circuit C 7 circuit diagram _C 7 outputs assigning to counters
3. 1000 N22 104 N22 103 is count 0 MSD VHSC BTR F23 0 1000 count 0 Done Bit N21 0 MUL 1 MULTIPLY 13 SOURCEA N22 103 SOURCE B 1000 000 721 DEST F23 0 3000 000 SOURCE A F23 0 3000 000 SOURCE B N22 104 721 DEST F23 1 3721 000 This rung illustrates how to disassemable 1 floating point word into 2 integer words that are used as the MSD and LSD for preset count 0 This same technique can be used for the rollover value as well as the output values MSD TRUNCATE FLTPNT 1000 N22 13 TRUNCATE F23 2 1000 while LSD FLTPNT MSD 1000 N22 14 F23 2 N22 13 1000 VHSC BTR FLT POINT PRESET Done Bit STORE WORD N21 5 DIV 1 DIVIDE 13 SOURCE A F23 2 2789 000 SOURCE B 1000 000 DEST F23 3 2 789000 INTEGER PRESET STORE WORD MOV MOVE SOURCE A F23 3 2 789000 DEST N24 0 2 INTEGER PRESET INTEGER PRESET STORE WORD STORE WORD GRT SUB GREATER THAN SUBTRACT SOURCEA N24 0 SOURCEA N24 0 2 2 SOURCE B F23 3 SOURCE B 1 id DEST N24 0 TO NEXT PAGE 2 TONEXT PAGE FROM PREVIOUS PAGE USER DEFINED PRESET EVENT 1 001 E 00 Sample Programs B 3 FROM PREVIOUS PAGE N22 13 COUNT 0 PRESET MSD MOV MOVE SOURCEA N24 0 2 DEST N22 13 2 FLT POINT STORE WORD MUL MULTIPLY SOURCE A N22 13 2 SOURCE B 1000 000 DEST F23 4 2000 000 N22 14 COUNT 0 PRESET LSD SUB SUBTRACT SOURCE A F23 2 2 789000 SOURCE B F23 4 2000 000 DEST N22 14 789 When the module receive
4. Allen Bradley Very High Speed Counter Module User Manual Cat No 1771 VHSC Series B Important User Information Because of the variety of uses for the products described in this publication those responsible for the application and use of this control equipment must satisfy themselves that all necessary steps have been taken to assure that each application and use meets all performance and safety requirements including any applicable laws regulations codes and standards The illustrations charts sample programs and layout examples shown in this guide are intended solely for example Since there are many variables and requirements associated with any particular installation Allen Bradley does not assume responsibility or liability to include intellectual property liability for actual use based upon the examples shown in this publication Allen Bradley publication SGI 1 1 Safety Guidelines For The Application Installation and Maintenance of Solid State Control available from your local Allen Bradley office describes some important differences between solid state equipment and electromechanical devices which should be taken into consideration when applying products such as those described in this publication Reproduction of the contents of this copyrighted publication in whole or in part without written permission of Allen Bradley Company Inc is prohibited Throughout this manual we make notes
5. 1 14 enabling and forcing _ 1 14 isolation 1 15 operation of 1 14 tying to counters _ 1 16 P period rate mode operation _ 1 9 power requirements _ 2 2 pre installation considerations _2 1 prerequisite knowledge for using manual Ped programming PLC 3 example _3 3 PLC 5 example 4 PLC 5 250 example _3 5 Q questions and answers D 1 R rate measurement connection to counter inputs 1 14 rate measurement mode 1 12 revision B changes E 2 rollover value 1 7 S sample period 1 14 sample program PLC 2 _ 3 2 sample programs PLC 2 B 1 PLC 5 B 2 B 4 scaler in period rate and continuous rate modes Et operation _1 11 scaler error E 1 scaling input _1 7 software reset 1 7 specifications A 1 store count mode 1 1 7 mode 2 _1 8 mode 3 _1 8 mode 4 _1 8 T totem pole outputs C 8 troubleshooting diagnostic codes _6 2 troubleshooting chart _ 6 1 W wiring field wiring arm connections _ 2 6 grounding _2 6 9 Rockwell Automation Allen Bradley a Rockwell Automation Business has been helping its customers improve productivity and quality for more than 90 years We design manufacture and support a broad Allen Bradley range of automation products worldwide They include logic processors power and motion control devices operator interfaces sensors and a variety of software Rockwell is one of the world s leading technology companies Worldwide re
6. C41 Voltage Jumpers R97 40 2 3 R98 40 2 VANNNN e R31 Lig We R36 SY e lt e SWITCH POWER SUPPLY 12 TO il R 1 3 K JPR8 JPR9 o Voltage Jumpers Q3 JPR6 JPR10 JPR11 R4 150 C43 Filter Jumpers D3 R100 R101 40 2 40 2 JPR7 o GROUND peje ace ea ne aca Se Se qus e m See emm o um i v cac C42 i l 10692 1 Output Circuits Drive Circuit Application Considerations C 7 Electromechanical Limit Switch When using an electromechanical limit switch the lower circuit in Figure C 3 you must connect the low speed limit capacitor C4 using jumper JPR11 The RC time constant of R31 and C4 will filter out switch contact bounce However this limits the frequency response to around 100Hz This circuit would be similar when using dc proximity switches but bounce should not occur unless severe mechanical vibration is present In either case source impedance is very low If you are using a 12 to 24V power supply keep jumper JPR8 in the circuit to add the additional 1K impedance ATTENTION While the transistor protection circuit limits the optoisolator current to a safe value make certain that the voltage range jumper JPR9 is not in the circuit With JPR9 in you can exceed the 1 Watt dissipation rating on the 150 ohm resistor R4 and cau
7. board The position of the keying bands on the backplane connector must correspond to these slots to allow insertion of the module You can key any connector in an I O chassis to receive these modules except for the leftmost connector reserved for adapter or processor modules Place keying bands between the following numbers labeled on the backplane connector Figure 2 1 e Between 24 and 26 e Between 28 and 30 You can change the position of these bands if subsequent system design and rewiring makes insertion of a different type of module necessary Use needlenose pliers to insert or remove keying bands Figure 2 1 Keying Positions Upper Connector 14288 2 4 Installing the Very High Speed Counter Module Setting the Configuration Jumpers The VHSC module has user selectable jumpers for each input channel These jumpers consist of one each e filter or high speed operation jumper e 5V or 12 24V operation jumper Each counter has a total of 6 jumpers associated with it Channel A filter high speed jumper Channel A voltage jumper Channel B filter high speed jumper Channel B voltage jumper e Gate reset filter high speed jumper e Gate reset voltage jumper These jumpers can be set independent of each other You can select the filter action and voltage for each channel and for the gate reset input independently The high speed operation is the preferred mode of operation for the 1771 VHSC module Use this mode when
8. CountO lower limit Count 0 CountQ upper limit i d Ro 333 lt s urs e e H Ee 281 01 When counting up this rung will go true first Bit 405 00 will be set when count 0 is equal to the MSDLL and greater than or equal to the LSDLL Count 0 MSDLL LSDLL Count 0 MSD Store MSD Store LSD Store bit CountO lowerlimit lower limit LSD Count 0 Count 0 LSDLL lo LSD ae 0 281 When counting up this rung will go true last Bit 405 02 will be set when count 0 is equal to the MSDUL and less than or equal to the LSDUL Count 0 MSDUL Count 0 lt LSDUL MSD Store MSD Store bit Count 0 limit Store LSD E upper imll LSD Count 0 upper limit Count 0 LSDUL d 403 405 Ji 1 429 Store LSD 02 281 upper limit 403 429 When using all 3 storage bits bit 405 4 represents when count 0 is within the specified range In this particular case when the count is between 9 309 NIME Store bit count 0 gt LSDLL Store bit count 0 within desired range 405 405 8 00 04 Store bit count 0 between MSDLL and MSDUL 405 01 Store bit count 0 lt LSDUL 405 02 B 2 Sample Programs Sample Program for PLC 5 Family Processors This rung illustrates how to assemble the count MSD and LSD into one floating point word that can be used throughout the program F23 0 is an intermediate storage value and F23 1 contains the total count 0 value Total count MSD 1000 LSD F23 1 N22 103
9. Enabling and Forcing Outputs 000 cee aee _1 14 Assigning Outputs to Counters 000000 e ee eee _1 14 Operation of Outputs ei bs der rre Rene ms 1 15 Handshaking 00 00 c cece cece eee eens _1 16 Default Configuration 2 450506 c0ssebetsesae be ddan ce ee _1 16 How the Module Communicates with a Programmable Controller 1 17 Chapter Summary i ves sa deUURE REX EDRER CETERAE 1 18 Table of Contents Installing the Very High Speed Counter Module Chapter Objectives cxx Ebr Rer ceres European Union Directive Compliance llis EMC Directive icczossiusrkeER RUE ED RARE EE qudd Low Voltage Directive n n nananana Electrostatic Damage nunnan eee esee Power Requirements 00 000 cece cece eee eene Module Location in the I O Chassis 000000ees Module Keying 00 00 cece ce eee n me Setting the Configuration Jumpers 00 eee e eens Connecting Wiring gz sie rue uw dee SE Shes ie ee ee Grounding the VHSC Module Wiring 000005 Installing the Module 0 0 0 ccc cece eee eas Interpreting the Indicator Lights 0 0 eee aee Chapter Summary ce bodes viens dunce RENE KORR RGRER Module Programming Lees Chapter Objectives otis sue Dre bx tras ber Re aer era Block Transfer Programming 000eceeeeeeee PLC 2 Program Example 0000 c cece
10. G2 G3 OUTPUTS 00 02 04 06 Output Indicators 01 03 05 07 FAULT Fault Indicator 10690 I Chapter Summary In this chapter you learned how to install your input module in an existing programmable controller system and how to wire to the field wiring arm Chapter Objectives Block Transfer Programming Chapter 3 Module Programming In this chapter we describe block transfer programming sample programs in the PLC 2 PLC 3 and PLC 5 processors Your module communicates with the processor through bidirectional block transfers This is the sequential operation of both read and write block transfer instructions The following example programs accomplish this handshaking routine These are minimum programs all rungs and conditioning must be included in your application program You can disable BTRs or add interlocks to prevent writes if desired Do not eliminate any storage bits or interlocks included in the sample programs If interlocks are removed the program may not work properly Optionally the block transfer write BTW instruction is initiated when the module is first powered up and subsequently only when the programmer wants to write a new configuration to the module At all other times the module is basically in a repetitive block transfer read BTR mode Your module will work with a default configuration of all zeroes entered in the configuration block See the configuration default section to understand wh
11. count will go to 999 999 the frequency will go to 0 and the new data bit will be set The outputs are updated dynamically on the module as the 4MHz count increases If less than the scaler number of pulses occurs in 250ms but at least 1 2 scaler 1 pulses occur in 250ms the operation of 4MHz count and frequency will be accurate but may appear intermittent due to left over pulses The outputs will always update every scaler number of pulses regardless of the update of the 4MHz count Note Left over pulses are pulses that occur that are not divisible by the scaler i e With a scaler of 4 if 6 pulses occur there are 2 left over pulses The following waveforms illustrate the difference between period rate and continuous rate All waveforms were initiated by applying a 50Hz signal at the gate reset terminal of a counter configured for either period rate or continuous rate The output configuration remained constant with an ON value of 20 000 counts and an OFF value of 80 000 counts Only the scalar mode was varied to show the operation of the two modes Examples of Period Rate and Continuous Rate Figure E 1 Operation of Outputs in Period Rate and Continuous Rate with Scaler 1 50Hz at Gate Reset Coun 50 Duty Cycle e Scaler 1 Counter times width of pulse 4MHz count 40 000 CHANNEL IN PERIOD RATE 4MHz Count 40 000 Scaler 1 ON at 20 000 OFF at 80 000 CHANNEL IN CONTINUOUS RATE 4MHz Count 4MH
12. count by resetting the reset bit bits 0 4 in BTW word 1 Rollover and preset are inactive Refer to appendix E for additional information 1 8 shows a diagram of the module used in the period rate mode 1 10 Overview of the Very High Speed Counter Module Figure 1 8 Period Rate Mode A Not used 1771 VHSC From user s encoder pulse generator B Not used zb sb Gate Reset Terminal From internal 4MHz clock scaler Incoming pulse train at gate reset terminal Sampled pulses 4MHz internal clock 10684 1 In 1 8 the incoming pulse train from the gate reset terminal is used to sample pulses from the 4 MHz internal clock As the frequency of the incoming pulse train at the gate reset terminal increases the number of sampled pulses from the 4 Mhz clock decreases This relationship is shown in Table 1 A Since accuracy is related to the number of pulses received over the sample period the accuracy will decrease with increasing input frequencies at the Gate Reset terminal To some extent the decrease in accuracy can be lessened by scaling the input frequency through the use of a scaler A scaler value of 1 will only return an accurate input frequency if incoming pulses have a 50 duty cycle If frequency exceeds 500KHz the number 999 999 is returned Overview of the Very High Speed Counter Module 1 11 Table 1 A Relationship Between Sampled Pulses and Input Frequency Input Frequency at Gate Reset Sampled P
13. counters You can assign as many as 8 outputs to a given counter However an output may be assigned only once to a counter it is not possible to use the same output with 2 different counters Refer to words 25 30 35 40 45 50 55 60 of the BTW initialization file in chapter 4 Output turns on at count value of 2000 Output remains energized for 3000 additional counts Overview of the Very High Speed Counter Module 1 15 Operation of Outputs When the outputs for the VHSC module are enabled and assigned to a counter they operate in an ON OFF fashion For example assume that the module were programmed to turn ON an output when a count value of 2000 was reached Further assume that the user desired to have the output remain energized for a period of 3000 counts and then turn OFF The end result would be that the outputs would turn ON at count of 2000 would remain energized for 3000 additional counts and would turn OFF at 5000 counts The ON and OFF values are circular around zero In the rate measurement mode the On and Off values associated with each output represent a frequency value instead of a count value The maximum frequency value which may be entered in an On or Off value is 500 000Hz Refer to 1 11 Figure 1 11 On Off Operation of Output Output remains energized for 3000 additional counts x Output turns off at count value of 5000 10686 I Refer to 1 12 Using output 0 as an example when the value in w
14. ee eee eeees PLC 3 Program Example 0 00 c cece ee eee eeees PLC 5 Program Example 0000s ee ee eee ee aeees PLC 5 250 Program Example 00000 c cece eens Chapter Summary 0 0 00 ccc cece e eee nee Configuring Your Module LLeeeeee Chapter Objectives 00 0 eee e ee eee eee Configuring the VHSC Module 022 000eeee Configuration Block for a Block Transfer Write Bit Word Descriptions 0 0 00 cece eee ee eee Chapter Summary 000 0 ccc ee eee e eee eee Module Status and Input Data Chapter Objectives 0 0 cece eee eee eee Reading Data from the Module 0000eeeuee Block Transfer Read for the 1771 VHSC Module Bit Word Description for Block Transfer Read Chapter Summary Pues deeeSeckee ea dees FEES T T in kh T in no T no i ro T eo iw AB D e T e T Ng co in co T r in T no T eo T AB T e T e T T T a Az PO T eo i nN k n T T T eo ie AB Table of Contents Troubleshooting 242 2 dasa rn mr my anh nnn ewes Chapter Objectives rud e Leere euer bn eed ee eat amp Using the Indicators for Troubleshooting Troubleshooting Cha
15. etc and return them to the programmable controller as a binary or BCD number 0 999 999 In counter mode the module accepts only one channel feedback Use the encoder modes if you need the module to read incoming quadrature pulses and return them to the programmable controller as a binary or BCD number 0 999 999 In these modes the module accepts two phase quadrature feedback and counts up or down depending upon the condition of the phase B input for each counter The operation of the module in the encoder counter modes is as follows Overview of the Very High Speed Counter Module 1 3 counter mode channel B is tied high or low Channel A input is used for pulse The count is unidirectional with the direction determined by channel B encoder X1 This is a bidirectional count mode counting up or down using quadrature input signals e encoder X4 This is a bidirectional count mode using quadrature input signals with 4 times the resolution of X1 Each of the counters in encoder counter mode has values associated with it These are preset value rollover value e gate reset input output Counter Mode The counter mode allows the module to read incoming pulses and return them to the programmable controller processor as a binary or BCD number 0 999 999 In the counter mode direction up counting or down counting is determined by the phase B input which can be a random signal If Phase B is high the co
16. handling the module e Touch a grounded object to rid yourself of electrostatic charge before handling the module e Handle the module from the front away from the backplane connector Do not touch backplane connector pins e Keep the module in its static shield bag when not in use or during shipment Your module receives its power through the 1771 I O chassis backplane from the chassis power supply The maximum current drawn by the module from this supply is 650mA 3 25 Watts Add this value to the requirements of all other modules in the I O chassis to prevent overloading the chassis backplane and or backplane power supply Place your module in any slot of the I O chassis except for the extreme left slot This slot is reserved for processors or adapter modules When using You can place your module in any module group with any 8 bit or block transfer module 1 slot addressing place your module in any module group with any 8 bit 16 bit or block transfer module 1 2 slot addressing no restrictions on module location After determining the module s location in the I O chassis connect the wiring arm to the pivot bar at the module s location Module Keying Keying Bands Installing the Very High Speed Counter Module 2 3 Use the plastic keying bands shipped with each I O chassis for keying the I O slot to accept only this type of module The module is slotted in two places on the rear edge of the circuit
17. on e features of the VHSC module how the module communicates with programmable controllers how the module operates Module Description The VHSC module performs high speed counting for industrial applications The module is an intelligent block transfer I O module that interfaces signals with any Allen Bradley programmable controller that has block transfer capability Block transfer programming moves module status data from the module s memory to a designated area in the processor data table It also moves configuration words from the processor data table to the module memory The VHSC module is a single slot module that does not require an external power supply Note The outputs do require a power supply After scanning the inputs and updating the outputs the input data is converted to a specified data type in a digital format to be transferred to the processor s data table on request Command and configuration data is sent from the programmable controller data table to the module with a BTW instruction Features of the Module The VHSC module counts pulses from encoders such as Allen Bradley Bulletin 845H K F P E and L pulse generators or mechanical limit switches proximity switches etc and returns either a count or frequency in binary or BCD format The module s features include e 4input channels configurable for encoder mode counter mode period rate mode and continuous rate mode 8 outputs isolated in gr
18. present If you power up with a block transfer length of 64 words to configure the module and later change to 2 words the module will behave in the manner prescribed in the 64 word transfer It will do this until you power down and power back up This configuration is not affected by switching your processor from RUN to PROG mode How do I know what length to make my BTW file There are 3 approaches to consider speed functionality and occasional usage When considering speed you would want to configure the module once and then have access to certain BTW data only You would power up with a configuration word length of 64 words for access to all data and then change the length to just 2 words allowing you to access specific commands such as preset or enable outputs This would save BTW time by not sending data which is not changing In the second approach functionality you might not be using your outputs so you would not need to have a 64 word BTW length For example if you just needed to preset counter 3 you would only need 20 words You could then perform presets without sending unnecessary words Using the occasional usage approach you could do BTWs only on occasion such as when you needed to change output values You could reanable the BTW long enough to send new data and disable it thereafter Any or all of these approaches can be used to best suit your individual needs General Appendix E Period Rate and C
19. pulses less than the scaler number that occurred at any time will effect the module update For example with a scaler of 4 and applying six pulses every 300ms at the gate reset terminal the module will do an update every other burst of six pulses because there are left over pulses from the previous burst 4 If scaler 1 and Number of pulses occurring in 250ms gt 1 5 scaler The outputs 4MHz count frequency and new data bit will be updated on the leading edge not inverted of the scaler 1 number pulse In all cases if the incoming pulses stop the 4MHz count will go to 999 999 the frequency will go to 0 the new data bit will be set and the outputs will be updated accordingly 250 260ms after the last pulse If the pulses have stopped for more than 250ms the first time that the output should be updated it will occur within 1 5ms 3ms in BCD of the actual pulse The totalized count is updated every scaler number of pulses but due to left over pulses may increment by more than the total number of pulses that occurred For example with a scaler of 2 and the gate reset terminal receiving 3 pulses every 300ms the total count will increment by 4 every fourth burst of pulses E 4 Period Rate and Continuous Rate Examples Operation of Outputs in Continuous Rate Mode Note Left over pulses are pulses that occur that are not divisible by the scaler 1 e With a scaler of 4 if 6 pulses occur there are 2 left
20. reset terminal Scaling allows the incoming pulses at gate reset to be divided by a number in the range of 1 2 4 8 16 32 64 and 128 Refer to words 21 to 24 in the BTW file chapter 4 Store Count The store count feature allows the module to store the current count value of any or all of the four counters The store count feature is triggered by the state of the gate reset terminal on the module The stored count of each counter is placed in a separate word in the Block Transfer Read file words 11 18 respectively The stored count value will remain in the block transfer read file until a new trigger pulse is received at the Gate Reset terminal When a new trigger pulse is received the old count value will be overwritten by the new value The store count feature is selected by words 3 and 4 of the block transfer write initialization file Refer to chapter 4 for further details Overview of the Very High Speed Counter Module In mode 1 store continue 1 4 the leading edge of a pulse input on the gate reset terminal will cause the current value in the counter to be read and stored The counter will continue counting The stored count will be available in the block transfer read file The stored count information will remain in the block transfer read file until it is overwritten by new data Figure 1 4 Store Continue Read Store Count and continue counting 10680 I In mode 2 store wait resume 1 5 the gate reset term
21. the incoming frequency is returned in words 11 18 The total count equals the number of pulses received during the sample period The operation of rate measurement mode is shown below in 1 10 Figure 1 10 Operation of the Rate Measurement Mode From user s encoder pulse generator NE ER ee a Channel A 1771 VHSC Module Channel B not used Gate Reset terminal not used From user s encoder pulse generator User selectable sample time 10685 1 Example In 1 10 three counts have been accumulated during the user selected time period If you had selected 50 milliseconds as the sample period the frequency returned to the programmable controller processor in words 11 12 would be Frequency Counts Sample period 3 counts 50 milliseconds 60 Hz You would read 60 Hz as the frequency in the Block Transfer Read file words 11 and 12 Words 3 and 4 would contain the value 3 Since the default configuration for the VHSC module is the Counter mode the user must select the rate measurement mode through the block transfer write initialization file This is done by setting the appropriate bits in words 3 and 4 of the block transfer write initialization file chapter 4 If frequency exceeds 500KHz the number 999 999 is returned 1 14 Outputs Overview of the Very High Speed Counter Module Sample Period You can set the sample period used in the frequency calculation in the rate measurement
22. to the point of termination Important The shield should extend to the termination point exposing just enough cable to adequately terminate the inner conductors Use heat shrink or another suitable insulation where the wire exits the cable jacket 10689 I When using shielded cable ground the foil shield and drain wire only at one end of the cable We recommend that you wrap the foil shield and drain wire together and connect them to a chassis mounting bolt Figure 2 4 At the opposite end of the cable tape exposed shield and drain wire with electrical tape to insulate it from electrical contact Installing the Module Installing the Very High Speed Counter Module 2 7 Figure 2 4 Cable Grounding 30000 p s O al al s d NE I NEKA Ground Shield at 1 0 chassis mounting bolt RR PT T4170 414 tit nas e Li H Ld r Shield and drain twisted into single strand Field Wiring Arm 17798 Refer to Wiring and Grounding Guidelines publication 1770 4 1 for additional information When installing your module in an I O chassis 1 First turn off power to the I O chassis ATTENTION Remove power from the 1771 I O chassis backplane and wiring arm before removing or installing an I O module Failure to remove power from the backplane could cause injury or equipment damage due to possible unexpected operation Failure to remove power from the backplane or wiring arm
23. 02 01 00 Decimal Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 13 Counter 1 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode 14 Counter 1 Store count values LSD range 0 999 15 Counter 2 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode 16 Counter 2 Store count values LSD range 0 999 17 Counter 3 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode 18 Counter 3 Store count values LSD range 0 999 19 Counter 0 Total counts occurring at gate reset pin in period rate or continuous rate modes MSD range 0 999 20 Counter 0 Total counts occurring at gate reset pin in period rate or continuous rate modes LSD range 0 999 21 Counter 1 Total counts occurring at gate reset pin in period rate or continuous rate modes MSD range 0 999 22 Counter 1 Total counts occurring at gate reset pin in period rate or continuous rate modes LSD range 0 999 23 Counter 2 Total counts occurring at gate reset pin in period rate or continuous rate modes MSD range 0 999 24 Counter 2 Total counts occurring at gate reset pin in period rate or continuous rate modes LSD range 0 999 Counter 3 Total counts occurring at gate reset pin in period rate or c
24. 0eeeeee Questions and Answers 0eeeeeeeeeeeas Generals imd cxilbniU3 eX ered Sethi Pose eee pud Questions and Answers 0 eeceeeaeeaeeaees Period Rate and Continuous Rate Examples General ia eda wrEiR 3a dace ei d exa dO RR Ka gckxeR ees Changes made in Revision B 00 eee e eee Operation of Outputs in Period rate Mode 1771 VHSC Revision B Modules 4 Operation of Outputs in Continuous Rate Mode Preface Using This Manual Purpose of This Manual This manual shows you how to use the Very High Speed Counter Audience Vocabulary Manual Organization Chapter module with an Allen Bradley programmable controller It helps you install program and troubleshoot your module You must be able to program and operate an Allen Bradley programmable controller PLC to make efficient use of this module In particular you must know how to program your PLC for block transfer type instructions We assume that you know how to do this in this manual If you do not refer to the appropriate programming and operations manual for the associated programmable controller before you attempt to use this module In this manual we refer to e the Very High Speed Counter module as the module the 1771 VHSC or the VHSC module the programmable controller as the controller or the PLC This manual is divided i
25. Counter Module 1 5 Figure 1 2 Block Diagram of Encoder Mode From Encoder Pulse Generator Phase A Terminal 1771 VHSC Phase B Terminal direction sense Gate Reset Terminal 10678 I Direction of Count The module can count either up or down depending upon the condition of the B input for each counter In encoder applications the counter will increment on the leading edge of Phase A while phase B determines the direction of the count You also have the option of X1 and X4 multiplying of the input pulses 1 3 shows the relationships between phases A and B for forward and reverse directions in encoder applications 1 6 Overview of the Very High Speed Counter Module Figure 1 3 Phase Relationship for Forward or Reverse Directions Very High Speed Counter Module Phase A Encoder Input A Encoder Input B Forward Rotation Phase B Reverse Rotation CCW Encoder Rotation CW Encoder Rotation Phase A LI T LI LI LI LI bee ei 1 min 1 1 1 1 LI LI LI i i PhaseB 1 i i I E See Se 90 4 1 i usec 1 1 B 90 AUR i Typical Ft 34 i pu uma i Xi A i e i Multiplying at E i i aoe i i 1 a e 0 X4 Multiplying 10679 I Ph a eee N The following paragraphs apply to both encoders and counters Preset Value Each of the 4 counters has one preset value associated with it In the encoder or counter modes the preset value represents a re
26. EA Gate E Counter 1 configuration Counter 0 configuration Gate Gate f Counter 3 configuration Counter 2 configuration Rollover Counter 0 MSD Rollover Counter 0 LSD Rollover Counter 1 MSD Rollover Counter 1 LSD Rollover Counter 2 MSD Rollover Counter 2 LSD Rollover Counter 3 MSD Rollover Counter 3 LSD Preset Counter 0 MSD Preset Counter 0 LSD Preset Counter 1 MSD Preset Counter 1 LSD Preset Counter 2 MSD Preset Counter 2 LSD Preset Counter 3 MSD Preset Counter 3 LSD Scaler 1 Counter 0 Scaler 2 Counter 1 Scaler 3 Counter 2 Scaler 4 Counter 3 Output 0 On MSD Output 0 On LSD Output 0 Off MSD Output 0 Off LSD Output 1 On MSD Output 1 On LSD Output 1 Off MSD Configuring Your Module 4 3 W 2 1 10 0 o 06 05 fos fos foz o o ord 15 14 13 34 Output 1 Off LSD Words repeat for each additional output 35 39 output 2 40 44 output 3 45 49 output 4 50 54 output 5 55 59 output 6 61 62 63 64 Bit Word Descriptions Word Word 1 Word 2 Output 7 On MSD Output 7 On LSD Output 7 Off MSD Output 7 Off LSD Bit word descriptions of BTW file words are presented in Table 4 B Enter data into the BTW instruction after entering the instruction into your ladder diagram program Table 4 B Bit Word Definitions for the VHSC Module These bits control the reset function When one of these bits transitions from 0 to 1 the counter is reset to 0 and begins counting The bits corre
27. User DATA FILE ER B LENGTH 1 001 CONTINUOUS End of file Appendix Objectives Types of Input Devices Examples for Selecting Input Devices Appendix C Application Considerations This appendix will provide you with background for selecting the appropriate input device for your 1771 VHSC module explain the output circuit and provide you with information for selecting the type and length of input cabling To turn on an input circuit in the VHSC module you must source current through the input resistors sufficient to turn on the opto isolator in the circuit If no connection is made to a pair of input terminals no current will flow through the photodiode of the opto isolator and that channel will be off Its corresponding input status indicator will be off All 12 inputs are electrically identical There are 2 basic classes of driver devices built in to encoders and other pulse sources single ended and differential A single ended driver output consists of a signal and a ground reference A differential driver consists of a pair of totem pole outputs driven out of phase One terminal actively sources current while the other sinks and there is no direct connection to ground Differential line drivers provide reliable high speed communication over long wires Most differential line drivers are powered by 5V and are more immune to noise than single ended drivers at any operating voltage Any installation must fol
28. all other scaler values you are measuring the number of 4MHz pulses that occur in the scaler during a number of gate reset periods that equal the the scalar value For example with a scaler value of 8 the 4MHz clock will be measured for four periods The frequency value 4MHz count ND bit and outputs will then be updated and remain constant as the counter is idle for the next four periods Then the 4MHz clock will be measured for the next four periods and then be idle for four periods Thus the frequency is updated every eight periods For more information refer to appendix E How often is the BTR data updated at the module The data available to be read by the processor is updated every 1 5 2 9msec binary and every 3 0 5 8msec BCD Note that based on module configuration some values may not be updated at that rate For example a frequency value in rate measurement mode will be updated at the time base selected in the scaler word The module can always be read by the processor but if read at a faster rate than determined by the time base you will read old data How often can I do a BTW This varies with the length sent and whether or not any data has changed The worst case would be a 64 word BTW that changes the module configuration This would take about 5 5ms in binary 11 1ms in BCD to process You would not be able to do another BTW for that length of time If the BTW data has not changed any module configuration on that pa
29. and 12 to 24V Single Ended Drivers Ri R2 1K 150 JPR4 JPR5 4 v C41 5V LI t 1 LI 1 I r L M 1 LI L T Lo 1201 Voltage Jumpers h 1 Ya R31 a 1 1 e R36 412 TO 24V 4 VWV I i ae R3 R4 o O a HIGH zl i 1K 150 Y D JPR6 JPR10 Drive DRIVE 22ohm JPRBJPR9 D5 Q3 Filter Jumpers INPUT Circuit TE t IP NER JJ o LOW E LT C43 D6 DRIVE i 4 1 Voltage Jumpers R100 R101 G 1 On i L 40 2 40 2 ae m 10691 I 412 TO 24V Es SINGLE ENDED DRIVER In the 5 Volt position JPR4 open JPR5 closed R1 is shorted and the limiting resistance is 250 ohms If 5 0V was applied at the input the current demanded would be 5 0 2 0 150 z 20mA The above type of calculation is necessary to the user since the driving device must cause a minimum of 5mA to flow through the photodiode regardless of which jumper position is selected Application Considerations C 3 The optical isolator manufacturer recommends a maximum of 8mA to flow through the photodiode This current could be exceeded in the 24V position To obtain this limit a dc shunt circuit is included consisting of D1 Q2 R97 and R98 If the photodiode current exceeds about 8mA the drop across R97 R98 will be sufficient to turn Q2 on and any excess current will be shunted through D1 and Q2 instead of through the p
30. at this configuration looks like Also refer to Appendix B for example configuration blocks and instruction addresses to get started The following example programs illustrate the minimum programming required for communication to take place 3 2 Module Programming PLC 2 Program Example Figure 3 1 below shows a sample PLC 2 program Figure 3 1 PLC 2 Family Sample Program Structure The VHSC module is located in rack 1 module group 0 slot 0 The data address 030 is among the first available timer counters used for block transfer The default block length of 0 results in a 18 word block transfer read The module status data is returned to the processor starting at address 301 If a block length other than 0 is specified for the BTR or BTW the BTR and BTW cannot be enabled during the scan VHSC BTR Data Address VHSC BTR VHSC BTW sta 010 Done Bit Enable Bit ee i i BLOCK TRANSFER READ EN DATA ADDRESS 030 07 FIM E Mf FE WODULEADDRESS 100 440 07 06 BLOCK LENGTH o FILE 301 400 SON The VHSC module is located in rack 1 module group 0 slot 0 The data address 031 is among the first available timer counters used for block transfer The default block length of 0 results in a 64 word block transfer write The module configuration data is stored starting at address 201 The preconditions could also include the configuration bit word 1 bit 0 to limit the block transfer write VHSC BTW VHSC BTR BTW
31. cing device can provide information on the specific output device used Note Any signal source which uses a standard TTL output device driver rated to source 400LLA or less in the high logic state is not compatible with the 1771 VHSC module Many popular differential line drivers such as the 75114 I5ALS192 and the DM8830 have similar characteristics and can source or sink up to 40mA In general the output voltage Von will be higher both as the supply voltage and the ambient temperature increase For example vendor data for the 75114 shows Von will be about 3 35V at Voc 5 V Ion 10mA and 25 C Vol will be about 0 075V under the same conditions This means V differential Voh Vol 3 27V if the part is sourcing 10mA Looking at the curves if the part were sourcing 5m you would see Vqiff 3 425 0 05 3 37V Assuming that you could supply 5mA to the 1771 VHSC input terminals how much voltage across the field wiring arm terminals would be required V drop would be about 1 9V as previously noted And 5mA through 150 ohms gives an additional 0 75V drop Thus you would have to apply about 1 9V 0 75V 2 65V across the terminals to cause a current of 4mA to flow through the photodiode The 75114 will give about 3 3V at Vec 5V and 25 C Thus you know that this driver will cause more current to flow than the minimum required at 5mA Application Considerations C 5 5V DIFFERENTIAL LINE DRIVER Input T
32. could cause module damage degradation of performance or injury 2 Place the module in the plastic tracks on the top and bottom of the slot that guides the module into position 3 Do not force the module into its backplane connector Apply firm even pressure on the module to seat it properly 2 8 Installing the Very High Speed Counter Module 4 Snap the chassis latch over the top of the module to secure it 5 Connect the wiring arm to the module Interpreting the Indicator The front panel of the input module contains 12 input indicators 8 Lig hts output indicators an active indicator and a fault indicator Figure 2 5 At power up the active and fault indicators are on An initial module self check occurs If there is no fault the red indicator turns off If a fault is found initially or occurs later the fault indicator lights and the active indicator is forced off When an input LED A B is on it indicates that the input is high When the output LED is on it indicates that the module has commanded the output to be on When a gate reset indicator G is on its input is high Since that signal can be inverted it does not indicate whether the signal on that terminal is necessarily logically true Possible module fault causes and corrective action are discussed in the chapter titled Troubleshooting Figure 2 5 Diagnostic Indicators ACTIVE Active Indicator INPUTS A0 A1 A2 A3 3 BO B1 B2 B3 Input Indicators G0 G1
33. default length of 0 is 18 words long The MSD of counter 0 is stored in 1BTD0 103 and the LSD of counter 0 is stored in 1BTD0 104 VHSC BTR VHSC BTR VHSC BTW Control File Enable Bit Enable Bit BTR BR000 0 BW000 0 d XFER READ EN L i i GROUP 2 EN EN MODULE CONTROL BLOCKBR000 0 DATAFILE 1BTD0 101 NER BT LENGTH 0 CONTINUOUS NO BT TIMEOUT 4 The VHSC module is located in rack 0 module group 0 slot 0 The data sent by the processor to the VHSC is stored in memory starting at location 1BTD0 1 and with the default length of 0 is 64 words long VHSC BTR VHSC BTW VHSC BTW Enable Bit Enable Bit Control File BR000 0 BWO000 0 2 n EN EN EN MODULE DN CONTROL BLOCKBW000 0 DATA FILE 1BTD0 1 ER BT LENGTH 0 CONTINUOUS NO BT TIMEOUT 4 Chapter Summary In this chapter you learned how to program your programmable controller and you were given sample programs for each family of controllers For additional programs refer to Appendix B Chapter Objectives Configuring the VHSC Module Chapter 4 Configuring Your Module In this chapter you will read how to configure your module s hardware condition your inputs and enter your data You must configure your module to conform to the input device and specific application that you have chosen Data is conditioned through a group of data table words that are transferred to the module using a block transfer write BTW instruction You can configure the foll
34. dule so you can install or remove the module without disconnecting the wires 2 6 Figure 2 3 Installing the Very High Speed Counter Module Connection Diagram for Very High Speed Counter Module 1771 VHSC Channel A Input Channel B Input Counter 0 Gate Input Channel A Channel A Return Channel B Channel B Return Gate Not input Gate Not input Channel B Channel B Return Channel A Channel A Return Channel A Channel A Return Channel B Channel B Return Gate Not Input Gate Not Input Channel B Channel B Return Channel A Channel A Return Output 0 Customer Common 0 1 Gate Input Channel B Input Counter 1 Channel A Input Channel A Input Channel B Input Counter 2 Gate Input Gate Input Channel B Input Counter 3 Channel A Input Customer Vcc 0 1 Output 1 Al I a IS Prora ere 38 Customer Vec 2 3 Output 3 Output 2 Customer Common 2 3 Customer Vcc 4 5 Output 4 Output 5 Customer Common 4 5 Output 6 Customer Common 6 7 EZ Customer Vcc 6 7 Output 7 Actual wiring runs in this direction Grounding the VHSC Module Wiring See applicable codes and laws Note Terminals on the left are even numbered 2 thru 40 and terminals on the right are odd numbered 1 thru 39 The sensor cable must be shielded The shield must extend the length of the cable but be connected only at the 1771 I O chassis e extend up
35. e option of selecting these same features using the falling edge of the gate reset pulse This selection is made through the gate invert bit as explained in chapter 4 The gate invert bit is active in the store count continuous rate and period rate modes The stored count values are saved in words 11 through 18 of the block transfer read file chapter 4 Use the period rate mode to determine the frequency of input pulses by counting the number of internal 4MHz clock pulses over a user specified number of input signal pulses At the end of the specified number of pulses the module returns the frequency and the number of internal 4MHz pulses A channel configured for period rate mode acts as a period rate counter An internal 4 MHz clock is used as a frequency reference This clock is gated by the incoming pulse train at the gate reset input The results of this gating action are the number of pulses or a frequency The number of sampled gated 4MHz pulses are returned in BTR words 3 thru 10 and the frequency in words 11 thru 18 Select the period rate mode by setting the appropriate bits in words 3 and 4 of the BTW initialization file chapter 4 The store count features are inactive in period rate mode 1771 VHSC revision B and later modules count the total number of pulses occurring at the gate reset pin This function is frequency limited This total count is returned when you request words 19 through 26 in your BTR You can reset this
36. east significant digit of the OFF value of output 0 These words are a repeat of words 25 through 29 with the exception of the output number These words are for output 1 Chapter Summary Configuring Your Module 4 7 Word Bits Description Words 35 These words are a repeat of words 25 through 29 with the exception thru 39 of the output number These words are for output 2 Words 40 These words are a repeat of words 25 through 29 with the exception thru 44 of the output number These words are for output 3 Words 45 These words are a repeat of words 25 through 29 with the exception thru 49 of the output number These words are for output 4 Words 50 These words are a repeat of words 25 through 29 with the exception thru 54 of the output number These words are for output 5 Words 55 These words are a repeat of words 25 through 29 with the exception thru 59 of the output number These words are for output 6 Words 60 These words are a repeat of words 25 through 29 with the exception thru 64 of the output number These words are for output 7 In this chapter you learned how to configure your module s hardware condition your inputs and enter your data Chapter Objectives Reading Data from the Module Block Transfer Read for the 1771 VHSC Module Chapter 5 Module Status and Input Data In this chapter you will read about reading data from your module module read block transfer format Block transfer read BTR prog
37. erminals eos 14 om Ri Pd 12 to 24V Single Ended Driver Some European made encoders use a circuit similar to the lower circuit in Figure C 2 The current capable of being sourced is limited only by the 22 ohm resistor in the driver output circuit R If a 24 volt supply is used and this driver supplies 15mA the output voltage would still be about 23V 15mA x 22 ohms 0 33V and Vce 7V Figure C 2 Example Circuits for 5V Differential and 12 to 24V Single Ended Drivers R2 e 150 y M LI 1 JPR4 JPRS DA Kna i MINE 9 rusas 4 45V v zx 9 C41 D3 UL 2 a Voltage Jumpers R97 R98 MEM Y A ANANNNP e NNN MEZ R31 E ra 40 2 40 2 E f R36 412 TO 24V ot 4 aren C38 3 R3 R4 L s 1 O c HIGH 1K 150 r D4 JPR6 JPR10 Drive DRIVE V D5 i A ET 22 ohm 1 JPR8 JPR9 Q3 Filter Jumpers INPUT Circuit rot o JPR JPR LOW Iu C43 D6 Ad WE vA Voltage Jumpers R100 R101 C3 04 DRIVE Pin li Oa S ANNNINA L i NEL 40 2 402 us E 4 C42 10691 1 12 TO 24V SINGLE ENDED DRIVER If the input jumper is in position JPR8 the current to the photodiode is limited by the series resistance of R3 and R4 about 1 15Kohms A protection circuit consisting of Q3 R100 and R101 is included If the current through the photodiode exceeds about 8mA the
38. ey indicate when a stored data value has been most recently updated These bits are provided for count accumulate applications but can be used whenever the stored data is updated at a rate slower than the block transfer time The New Data bit BTR status word 1 bits 4 7 for counters 0 3 respectively can be used by the ladder program to indicate that a store register BTR words 11 18 has been updated by one of the following events An active gate transition in any of the store count modes The end of the gate sample period in either the period rate or continuous rate modes The end of the programmed sample period in rate measurement mode The ND bit is reset in the ladder program by a 0 to 1 transition of the corresponding NDA bit and then performing a BTW A BTW length of 1 word can be use for this handshaking procedure Note A BTW length of 1 has no effect on the preset or reset bits in BTW word 1 and does not qualify as a configuration BTW For example if the BTW valid bit is set it will remain set after the BTW with a length of 1 is sent A default configuration is built into the module The default configuration is automatically selected on power up if the user has not configured the module through a Block Transfer Write Initialization file The module can be placed in the default configuration by writing a block transfer write initialization file with all zeroes to the module How the Module Communicates with a P
39. ference point or count from which the module begins counting The module can count either up or down from the preset value Preset values are loaded into the count registers through the preset count bits Refer to word 1 bits 8 11 of the block transfer write initialization block in chapter 5 Preset values can range from 0 to 999 999 binary or BCD Overview of the Very High Speed Counter Module 1 7 Rollover Value Each of the 4 counters has one rollover value associated with it When the rollover value is reached by the encoder counter it resets to 0 and begins counting again The rollover values range from 0 to 999 999 binary or BCD 0 represents 1 000 000 The rollover value is circular for example if you program 360 the count will be from 358 359 0 1 etc in a positive direction and from 1 0 359 358 etc in a negative direction Software Reset The counters can also be reset by the Reset Count bits found in Word 1 bits 0 3 of the block transfer write When one of these bits is set to 1 the associated counter is reset to zero and begins counting The module can also be reset with the gate reset as explained below Refer to chapter 4 for further details Gate Reset Input There is one gate reset input for each of the 4 counters The gate reset input when active will function in one of the 4 store count modes outlined below Scaling Input Count at the Gate Reset Terminal You can scale the incoming count at the gate
40. file that was incorrect Refer to chapter 7 for other diagnostic error codes returned by the module Status bits for outputs Bit 00 corresponds to output 0 bit 01 to counter 2 etc Bit 0 output OFF Bit 1 output ON State of gate reset input Bit 08 10 corresponds to counter 0 bit 09 11 to counter 1 etc Bit 0 gate input inactive Bit 1 gate input active Not used Contains the most significant digit for counter 0 The allowable range is 0 999 Contains the least significant digit for counter 0 The allowable range is 0 999 Contains the most significant digit for counter 1 The allowable range is 0 999 Contains the least significant digit for counter 1 The allowable range is 0 999 Contains the most significant digit for counter 2 The allowable range is 0 999 Contains the least significant digit for counter 2 The allowable range is 0 999 Contains the most significant digit for counter 3 The allowable range is 0 999 Contains the least significant digit for counter 3 The allowable range is 0 999 Counter 0 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode 5 4 Module Status and Input Data Word Bit Definition Words 12 Counter 0 Store count values LSD range 0 999 Counter 1 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measureme
41. happen The preset has priority so only the preset will occur The outputs will follow the preset If I change the BTW configuration data how long will it take for the module to process the changes and execute them It depends on the length of the BTW The module spends about 80usec decoding each word of new data in binary It takes twice as long to decode BCD A worst case example of 64 words will take about 5 5msec in binary and 11msec in BCD These times start after the module receives the BTW Don t forget that it may take additional time based on changes in rate measurement sample periods If you changed the sample period to 2 seconds it will take an additional 2 seconds to receive a new frequency value In frequency mode how are my samples taken e e Questions and Answers D 3 In rate measurement you select a time period in BTW words 21 24 The module will count pulses on channel A for this time period and then convert the number to frequency It will begin its next time period in about 10msec and then begin counting pulses again In period rate or continuous rate modes the pulses coming in on the gate reset will gate the internal 4MHz clock using the hardware scaler selected in words 21 24 If a scaler of 1 is selected you are measuring the number of 4MHz pulses that occurred while the gate reset was active and the frequency returned will only be accurate if the incoming pulses occur with a 50 duty cycle With
42. he output is off Normal No action required 6 2 Troubleshooting Diagnostic Codes The VHSC module returns diagnostics in word 1 of the block Returned by the Module transfer read BTR to the processor These codes are identified below Diagnostics Reported in Word 1 of BTR Indication Power up bit indicates whether a successful BTW with valid data has occurred since power up or since last switched from Program to Run mode Bit 0 0 Successful BTW Bit 0 1 BTW has not occurred Bits 01 03 Not used Bits 04 07 New data bits Bit 04 corresponds to counter 0 bit 05 to counter 1 etc Diagnostic byte This byte is always in BCD format This byte indicates which Bits 08 15 word 1 64 in the BTW file that was incorrect or one of the following error codes The codes are as follows Preset or reset illegal for counter 0 with frequency mode Preset or reset illegal for counter 1 with frequency mode Eu Preset or reset illegal for counter 2 with frequency mode 90 Preset or reset illegal for counter 3 with frequency mode Store count illegal for counter 0 with frequency mode Store count illegal for counter 1 with frequency mode Store count illegal for counter 2 with frequency mode EE Store count illegal for counter 3 with frequency mode Preset greater than rollover for counter 0 Preset greater than rollover for counter 1 Preset greater than rollover for counter 2 Preset greater than rollover fo
43. hotodiode If the driving device is a standard 5V differential line driver D2 and D3 provide a path for reverse current when the field wiring arm terminal 1 is logic low and terminal 2 is logic high The combined drop is about the same at the photodiode about 1 4V The circuit appears more symmetrical or balanced to the driver as opposed to just one diode Detailed Circuit Analysis In the example above we used a constant 2 0V drop across the photodiode and R97 R98 To calculate the true photodiode current consider the photodiode D1 Q2 R97 and R98 as one circuit The voltage drop across D1 and Q2 will always be equal to the drop across the photodiode and R97 R98 We will call this V drop First consider the minimum requirement of It 5mA The V curves for this photodiode will typically have a 1 5V drop With 5mA current R97 and R98 will drop 80 4 ohms x 5mA 0 40V Thus at 5mA Varop 1 5V 0 40V 1 90V Now let s see what happens when I goes to 8mA or above With the temperature about half way between 25 and 70 C Vf becomes about 1 5V R97 R98 will now drop 0 64V 80 4 ohms x 8mA That means Varop 1 5V 0 64V 2 14V The Vpe of Q2 is now sufficient to start to turn Q2 on If the current through the photodiode increases to 9mA Vpe becomes 0 72V and Q2 1s fully on Any additional current supplied by a 24V applied input will be shunted away from the photodiode and dissipated in Q2 and D1 Thus Vdrop wil
44. ime Typical 3us turn on 30us turn off Filtering Selectable high speed or normal normal below 100Hz Backplane Current 650mA 1500V between input and backplane Isolation Voltage 1500V between output and backplane 300V between isolated channels Power Dissipation 13 Watts max 2 Watts min Thermal Dissipation 54 2 BTU hr max 6 8 BTU hr min Input Conductors Wire Size Belden 9182 or equivalent Category Category 2 Length 250 feet 76 2m Output Conductors Wire Size 14 gauge stranded max 3 64 inch insulation max Category Category 1 Fuse 2AG 3A fuse Littelfuse 225003 Environmental Operating Temperature 0 to 60 C 32 to 140 F Conditions Storage Temperature 40 to 85 C 40 to 185 F Relative Humidity 5 to 95 without condensation Between 24 and 26 Keying Between 28 and 30 Field Wiring Arm 40 terminal cat no 1771 WN Wiring Arm Screw Torque 7 9 inch pounds Use this conductor category information for planning conductor routing as described in the system level installation manual Appendix B Sample Programs Sample Program for PLC 2 Family Processors These rungs illustrate a method of monitoring the count for values greater than 3 digits The total count is displayed in words 333 and 334 This rung set storage bit 405 1 when the count is between the MSD lower limit and the MSD upper limit MSDLL lt Count 0 lt MSDUL MSD LSD Store bit count 0 Store MSD MSD MSD Store MSD ipa tween MSDLL CountO
45. inal provides the capability to inhibit counting when the gate reset input is high Counting resumes when the input goes low Mode 2 does not reset the counter although it does store the count value Figure 1 5 Store Wait Resume Stop counting Resume counting Store Count 10681 I In mode 3 store reset wait start 1 6 the rising edge of the pulse on the gate reset terminal causes the counter to stop counting store the current count value in the block transfer read file and reset the count to zero The counter does not count while the input pulse on the gate reset terminal remains high Counting resumes from zero on the falling edge of the pulse at the gate reset terminal Figure 1 6 Store Reset Wait Start Counter has stopped counting Start counting Stop count store from zero and reset to zero 10682 I In mode 4 store reset start 1 7 on the rising edge of a pulse input at the gate reset terminal will cause the counter to store the accumulated count value and will reset the counter to zero The counter continues counting and the stored count is available in the block transfer read file Operation in Period Rate Mode Overview of the Very High Speed Counter Module 1 9 Figure 1 7 Store Reset Start Rising Edge Falling Edge Store Count reset to zero start counting 10683 Figures 1 4 through 1 7 show the store count feature operating on the rising edge of the gate reset pulse The user has th
46. l never exceed about 2 52V regardless of the applied voltage In addition it will never be less than 1 7V if the minimum of 5mA is flowing Although there are some minor temperature effects on the photodiode drop you can expect the value Vdrop to be relatively linear from about 1 9V to 2 14V as the current increases from 5mA to 8mA Why is this important Let s look at the 5V differential line driver example below Application Considerations 5V Differential Line Driver Example You want to use a 5V differential line driver in your encoder when you have a long cable run and or high input frequency or narrow input pulses input duty cycle lt 50 The top circuit NO TAG shows a typical 5V differential line driver The output is connected to the field wiring arm terminal 1 and is sourcing current and the output to terminal 2 is sinking current JPR5 is connected to short out resistor R1 Important Neither output of the differential line driver can be connected to ground Damage could occur to your driving device To be sure that your device will drive the 1771 VHSC you must know the electrical characteristics of the output driver component used in your signal source device The output voltage differential Vaitt Von Vol is critical because this is the drive voltage across the 1771 VHSC input terminals 1 and 2 and the photodiode current is a function of Vairr Varop The manufacturer of your shaft encoder or other pulse produ
47. lectromagnetic Compatibility EMC using a technical construction file and the following standards in whole or in part e EN 50081 2 EMC Generic Emission Standard Part 2 Industrial Environment e EN 50082 2 EMC Generic Immunity Standard Part 2 Industrial Environment The product described in this manual is intended for use in an industrial environment Low Voltage Directive This apparatus is also designed to meet Council Directive 73 23 EEC Low Voltage by applying the safety requirements of EN 61131 2 Programmable Controllers Part 2 Equipment Requirements and Tests For specific information that the above norm requires see the appropriate sections in this manual as well as the following Allen Bradley publications 2 2 Installing the Very High Speed Counter Module Electrostatic Damage Power Requirements Module Location in the 1 0 Chassis 2 slot addressing Industrial Automation Wiring and Grounding Guidelines publication 1770 4 1 e Guidelines for Handling Lithium Batteries publication AG 5 4 e Automation Systems Catalog publication B111 Electrostatic discharge can damage semiconductor devices inside this module if you touch backplane connector pins Guard against electrostatic damage by observing the following warning ATTENTION Electrostatic discharge can degrade performance or cause permanent damage Handle the module as stated below e Wear an approved wrist strap grounding device when
48. lot 0 The BTWcontrol file starts at N21 5 and is a 5 words long The data sent by the processor to the VHSC is stored in memory starting at location N22 1 and with the default length of 0 is 64 words long VHSC BTR VHSC BTW VHSC BTW Enable Bit Enable Bit Control File N21 0 N21 5 B 2 pF 3 F BLOCK XFER WRITE EN RACK 15 15 GROUP MODULE DN CONTROL DATA FILE ER LENGTH CONTINUOUS Module Programming 3 5 PLC 5 250 Program Block transfer instructions with the PLC 5 250 processor use one Example binary file in a data table section for module location and other related data This is the block transfer control file The block transfer data file stores data that you want transferred to the module when programming a block transfer write or from the module when programming a block transfer read The address of the block transfer data files are stored in the block transfer control file The industrial terminal will automatically select the control file based on rack group and slot and whether it is a read or write A different block transfer control file is used for the read and write instructions for your module A different block transfer control file is required for every module Figure 3 4 PLC 5 250 Family Sample Program Structure The VHSC module is located in rack 0 module group 0 slot 0 The data obtained by the processor from the VHSC is placed in memory starting at location 1BTD0 101 and with the
49. low customary good wiring practices separate conduit for low voltage dc control wiring and any 50 60Hz ac wiring use of shielded cable twisted pair cables etc Refer to publication 1770 4 1 Programmable Controller Wiring and Grounding Guidelines for more information The following examples will help you in determining the best input type for your particular application These examples include 5V differential line driver single ended driver open collector circuit electromechanical limit switch 5V DIFFERENTIAL LINE DRIVER Application Considerations Input Terminals ras 1 Circuit Overview To make sure your signal source and the 1771 VHSC module are compatibility you need to understand the electrical characteristics of your output driver and its interaction with the 1771 VHSC input circuit Refer to Figure C 1 The most basic circuit would consist of R1 R2 JPR4 JPRS the photodiode and associated circuitry around half of the opto isolator The resistors provide first order current limiting to the photodiodes of the dual high speed opto isolator With JPR4 closed and JPR5 open the total limiting resistance is RI R2 1150 ohms This jumper position is designated 12 to 24 Volt Range Assuming a 2V drop across the photodiode and R97 and R98 you would have 8 7 19mA demanded from the driving circuit as the applied voltage ranged from 12 to 24V Figure C 1 Example Circuits for 5V Differential
50. mode Allowable values are 10 milliseconds to 2 seconds in 10 millisecond increments The default value is 1 second Note A 0 in the BTW initialization word is equivalent to the default value of 1 second The sample period is set in words 21 through 24 of the BTW initialization file chapter 4 Connection to Counter Inputs The only user connections used in the rate measurement mode are to phase A of the module The gate reset and channel B terminals are not used in this mode The VHSC module has 8 outputs isolated in groups of 2 Each of the outputs is capable of sourcing current and will operate between 5 and 24 volts dc You must connect an external power supply to each of the outputs The outputs can source 2 amps dc The outputs are hardware driven and will turn on in less than 10usec when the appropriate count value has been reached Enabling and Forcing Outputs Outputs may be forced on or off independent of count or frequency value To force the outputs they must first be enabled Enabling the outputs is done through a data table word 2 bits 0 7 in the BTW initialization file chapter 4 Once the outputs have been enabled they may be forced on by setting bits 8 15 in word 2 of the BTW initialization file The outputs can be forced off by setting the enable bit to 0 Assigning Outputs to Counters By setting bits in the block transfer write initialization file you can assign the outputs on the module to any of the various
51. n period rate or continuous rate modes scaler 1 Frequency 340Hz scaler 2 Frequency 630Hz scaler 4 Frequency 1260Hz scaler 128 Frequency 43 5KHz The above is only true if you are not doing BTWs the BTW length is less than 3 or the data in the BTW does not change for any counter Period Rate and Continuous Rate Examples When doing BTWs whose length is greater than 3 or if the BTW data changes the potential to miss pulses is limited to number of pulses in 6ms scaler every time there is a transition of BTW data if the number pulses that occur in 6ms is greater than scaler If the number of pulses that occur in 6ms is less than the scaler the count will remain accurate There is no minimum limit to the input pulse width as long as no more than the scaler number of pulses appear in 1 above allowable input frequency seconds It is important to note that even if the above frequency is exceeded the 4MHz count and frequency will still be accurate Only the total counts returned will be unreliable Changes made in Revision B The following are changes made to the 1771 VHSC module in revision B Period Rate mode mode has been modified such that if the pulses at the gate reset stop the frequency BTR words 11 18 will go to zero and the 4MHz count BTR words 3 10 will go to 999 999 Continuous rate mode has been added This mode operates identical to period rate mode with the exception of the outputs If the f
52. nificant digit for counter 1 Rollover value Least significant digit for counter 1 Rollover value Most significant digit for counter 2 Rollover value Least significant digit for counter 2 Rollover value Most significant digit for counter 3 Rollover value Least significant digit for counter 3 Preset values The preset value is loaded into the respective counter when its preset bit is set The preset count value overrides the current count and becomes the new count value in the counter When a preset value is loaded the counter begins to count from that value Words 21 thru 24 Word 25 Word 26 Word 27 Word 28 Word 29 Words 30 thru 34 bits 00 03 bits 04 15 The ranges of words 21 thru 24 depend on the mode selected in word 3 bits 00 02 In encoder counter mode or period rate mode these are scalar words and divide the incoming pulse train at the gate reset terminal by a predetermined integer 1 2 4 8 16 32 64 and 128 Default value is 1 In rate measurement mode these are time base values Range is in milliseconds from 10ms to 2 seconds in 10ms intervals Allows you to tie the output to any of the 4 counters Bits correspond to the counters bit 00 for counter 0 bit 01 for counter 1 bit 02 for counter 2 and bit 03 for counter 3 Not used Most significant digit of the ON value of output 0 Least significant digit of the ON value of output 0 Most significant digit of the OFF value of output 0 L
53. nsfer control file is used for both the read and write instructions for your module A different block transfer control file is required for every module A sample program is shown in Figure 3 2 below Figure 3 2 PLC 3 Family Sample Program Structure The VHSC module is located in rack 1 module group 0 slot 0 The control file is a 10 word file shared by the BTR and BTW starting at B12 0 The data obtained by the processor from the VHSC is placed in memory starting at location N13 101 and with the default length of 0 is 18 words long The MSD of counter 0 is stored in N13 103 and the LSD of counter 0 is stored in N13 104 VHSC BTR BTW Control Block BTR VHSC BTR BLOCK XFER READ EN Due Bit RACK 1 GROUP 0 DN B12 0 MODULE 0 CNTL B12 0 ER 15 DATA N13 101 LENGTH 0 VHSC BTR VHSC BTR Error Bit Error Bit B12 0 B12 0 i The VHSC module is located in rack 1 module group 0 slot 0 The control file is a 10 word file shared by the BTR and BTW starting at B12 0 The data sent by the processor to the VHSC is placed in memory starting at location N13 1 and with the default length of 0 is 64 words long If the default mode of VHSC operation is desired rollover at 999 999 outputs disabled this rung can be optional The module configured bit can also be used as a precondition to increase BTR throughput VHSC BTR BTW VHSC BTW Control Block Done Pr BTW B1 i BLOCK XFER WRITE EN ER VHSC BTW VHSC BTW Error Bit Er
54. nt or period rate mode Words 13 Words 14 Counter 1 Store count values LSD range 0 999 Counter 2 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode Words 16 Counter 2 Store count values LSD range 0 999 Counter 3 Store count values MSD range 0 999 in encoder counter Words 15 Words 17 mode or frequency value MSD range 0 500 in rate measurement or period rate mode Words 18 Counter 3 Store count values LSD range 0 999 Word 19 Counter 0 Total counts occurring at gate reset pin in period rate or continuous rate modes MSD range 0 999 Word 20 Counter 0 Total counts occurring at gate reset pin in period rate or continuous rate modes LSD range 0 999 Word 21 Same as word 19 but for counter 1 Word 22 Same as word 20 but for counter 1 Word 23 Same as word 19 but for counter 2 Word 24 Same as word 20 but for counter 2 Word 25 Same as word 19 but for counter 3 Word 26 Same as word 20 but for counter 3 Chapter Summary In this chapter you learned the meaning of the status information that the module sends to the processor Chapter 6 Troubleshooting Chapter Objectives In this chapter you will learn how to troubleshoot your VHSC module using the indicators on the front of the module and the troubleshooting flowchart Using the Indicators for The indicators on the front of the module are an aid in T
55. nto six chapters The following chart shows each chapter with its corresponding title and a brief description of the topics covered in that chapter Topics Covered Explanation of modes outputs default Overview of the Very High Speed Counter Module configuration and how the module communicates with the processor How to install key connect wiring ground and an Installing the Very HighSpeed Counter Module explanation of the indicators on the module Block transfer programming and programming Module Programming examples Configuration and description of bit words for block transfer write instructions Configuring Your Module Reading data from the module and bit word Module Status and Input Data description of the block transfer read Using the indicators for troubleshooting and Troubleshooting diagnostic codes P 2 Using This Manual Chapter Title Topics Covered Appendices Specifications Specifications for the VHSC module A B C D E Sample Programs Sample programs for various PLC programs Application Considerations Selection of input devices and circuit descriptions Questions and Answers Helpful answers to the most asked questions Period Rate and Continuous Rate Examples Examples of the differences of these 2 modes Related Products You can install your input module in any system that uses Allen Bradley programmable controllers with block transfer capability and the 1771 I O struc
56. oating or tied low Q What do my indicators mean if I configure the gate input to be inverted A The gate indicator will illuminate when the input is tied high and turns off when floating or tied low The gate inversion is seen internally by the module D 2 Questions and Answers e What does it mean when an output indicator is on Since the output indicator is tied to the control side of the module it means that the module has commanded the output on It does not necessarily mean that the output is on The indicator illuminates even when no connection is made to the outputs or to the output supply For an output to actually turn on the output supply must be connected What are the delay times for turning the outputs on and off The outputs turn on in lt 10usec and turn off in lt 100usec Typical on time is 3usec and typical on off time is 50 60Usec Can I parallel my outputs Any or all of the 8 module outputs can go to the same output device as long as the output commons and Vcc are the same Can I parallel my inputs You can parallel inputs if the device can supply enough current to drive multiple inputs If I have different sources of power for my input devices will I have input common problems You don t need to tie commons together The isolation between channels is large enough to eliminate common mode voltage problems If I set both the preset and reset bits to one counter in one BTW what will
57. ode for COUNTER 2 Mode Bit 06 o5 04 Store count mode not used for counter 2 0 9o 0 Mode 1 store continue used 0 0 1 Mode 2 store wait resume used 0 1 0 Mode 3 store reset wait start used 0 1 1 Mode 4 store reset start used 0 0 i Invert signal bit for gate reset terminal bit 07 0 Not inverted 1 Inverted bits 08 10 Determine rate measurement mode encoder mode counter mode or period rate mode for COUNTER 3 10 09 08 Counter mode 0 0 0 Encoder X1 mode 0 0 1 Encoder X4 mode 0 1 0 Counter not used 0 1 1 Period rate mode 1 0 0 Rate Measurement mode 1 0 1 Continuous rate mode 1 1 0 bits 12 14 Determine store count mode for COUNTER 3 Store count mode not used for counter 3 0 0 Mode 1 store continue used 0 1 Mode 2 store wait resume used 1 0 Mode 3 store reset wait start used 1 1 A c N oj ojl ojo 4 6 Configuring Your Module Word Bits Description Mode 4 store reset start used 1 0 0 Words 5 thru 12 Word 5 Word 6 Word 7 Word 8 Word 9 Word 10 Word 11 Word 12 Words 13 thru 20 bit 15 Invert signal bit for gate reset terminal 0 Not inverted 1 Inverted Rollover value When rollover value is reached the counter value becomes 000 000 and counting continues from that point The range for both MSD and LSD is 0 to 999 Rollover value Most significant digit for counter 0 Rollover value Least significant digit for counter 0 Rollover value Most sig
58. ontinuous Rate Examples The totalizer is always active in period rate and continuous rate modes To access the values the BTR length must be changed to a value between 20 and 26 in multiples of 2 A length of 20 will return the total count for CO a length of 22 will return the total count for C1 and CO and so on A BTR length of 0 will still return 18 words The reset bits will now reset the total count in words 19 26 The count will continue to accumulate until 999 999 and then rollover to zero The presets and rollover in the BTW are inactive When using the reset you can always be off by 1 scaler For example with a scaler of 8 after issuing a reset you may have only 1 pulse occur but your count may immediately go to 8 making you off by 7 counts Also if you dynamically change the scaler your count can be off by the larger of the new or old scaler and changing the scaler will reset the count to 0 The total count value will be updated every scaler number of pulses at the gate reset pin The maximum allowable input frequency for the total count to be accurate varies with module configuration and the scaler by about 340 520Hz times the scaler For example the best case is with only 1 channel operating in period rate or continuous rate modes scaler 1 Frequency 520Hz scaler 2 Frequency 1040Hz scaler 4 Frequency 2080Hz scaler 128 Frequency 66 5KHz For example the worst case is with all 4 channels operating i
59. ontinuous rate modes MSD range 0 999 26 Counter 3 Total counts occurring at gate reset pin in period rate or continuous rate modes LSD range 0 999 PU Power up bit refer to word bit description Note Words 19 through 26 are optional and used only in period rate and continuous rate modes They can only be accessed by making the BTR length between 19 and 26 25 Bit Word Description for Table 5 B Block Transfer Read Table 5 B Module Status and Input Data provides bit word descriptions for the block transfer read instruction returned by the 1771 VHSC module to the processor Bit Word Description for the VHSC Module 1771 VHSC Bit 00 Word1 Bic 01 03 Bits 08 15 Bits 10 17 Bits 00 07 Word 2 Bits 08 11 Bits 10 12 Bits 12 15 Bits 13 17 Word 3 Word 4 Word 5 Word 6 Word 7 Word 8 Word 9 Word 10 Words 11 Definition Power up bit indicates whether a successful BTW with valid data has occurred since powerup or since last switched from Program to Run mode Bit 0 A successful BTW has occurred Bit 1 A successful BTW has not occurred Not used New data bits Indicates that a store register BTR words 11 18 has been updated These bits are reset by a 0 to 1 transition of the new data acknowledge bits in BTW word 1 bits 4 7 Bit 04 corresponds to counter 0 bit 05 to counter 1 etc Diagnostic byte Always in BCD This byte indicates the number of the first word in the BTW
60. ords 26 and 27 is less than the value in words 28 and 29 the output turns on at 2000 and off at 5000 If the value in words 26 and 27 is greater than the value in words 28 and 29 the output turns off at 2000 and on at 5000 Figure 1 12 Effect of Values in Words 26 through 29 at count of 5000 Output turns OFF Output turns ON Output tums ON Output turns OFF at count of 2000 at count of 5000 at count of 2000 When values in words 26 27 are less than values in words 28 29 When values in words 26 27 are greater than values in words 28 29 10687 l Refer to words 26 29 31 34 36 39 41 44 46 49 51 54 56 59 61 64 of the block transfer write initialization file in chapter 5 Isolation of Outputs The module provides 1500V ac forced rms isolation between each of the counters and the backplane of the I O rack 1 16 Overview of the Very High Speed Counter Module Default Configuration Tying Outputs to Counters You can jumper any of the outputs to any of the counter inputs on the module field wiring arm In this way it is possible to use the outputs to reset a counter or to cascade counters If using the outputs this way make certain that the input voltage jumpers are set to interface with the appropriate output voltage Handshaking A pair of handshaking bits are provided for each counter These bits are called New Data ND bits in the BTR instruction and New Data Acknowledge NDA bits in the BTW instruction Th
61. oups of 2 outputs are current sourcing at 5 to 24V dc 2A maximum per output e single ended or differential inputs e 2 phase encoder inputs up to a frequency of 250KHz single phase counter inputs up to a frequency of IMHz input voltage range of 5 to 24V dc 1 2 Overview of the Very High Speed Counter Module Operation in Encoder or Counter Mode e returns in status either count or frequency in binary or BCD format e input counts as high as 999 999 up to 500KHz in period rate or rate measurement frequency modes outputs can be tied to any counter each output has a user selectable on off value outputs can be tied back to an input for cascading e automatic default configuration each counter has a user selectable preset and rollover value period rate w periodic outputs and period rate w dynamic outputs can be used for totalization The 1771 VHSC module operates in the following modes counter mode encoder X1 mode encoder X4 mode period rate mode rate measurement frequency mode continuous rate mode The operation of the module in these modes is described below The operation of encoder and counter modes is virtually identical The only difference between the two modes is in the type of feedback used Use the counter mode if you need the module to read incoming pulses from a maximum of four encoders single ended or differential counters pulse generators mechanical limit switches
62. over pulses The following example demonstrates the operation of the outputs in Continuous Rate mode of operation Note that Y time between incoming pulses trailing edge to leading edge A output on value and B output off value The examples shown assume that at the least the number of pulses equal to the scalar value is occurring at the gate reset pin 1 10 A lt 4MHz count and B lt gt 0 and A gt B Output on time 4MHz count A 250ns scaler Y B 250ns A gt AMHz count and B lt gt 0 and B lt 4MHz count and A gt B Output on time scaler Y B 250ns A gt AMHz count and B lt gt 0 and B gt 4MHz count and A gt B Output On A gt 4MHz count and B 0 Output Off A AMHz count and B 0 Output on time 4MHz count A 250ns A lt B lt AMHz count and A lt gt 0 Output on time B A 250ns A AMHz count lt B and A 50 Output on time 4MHz count A 250ns 4MHz count lt A lt B or A lt B and 4MHz count gt B and A 20 Output Off B gt 4MHz count or B gt 0 and 4MHz count 999 999 and A 0 Output On B lt 4MHz count and A 0 Output off time 4MHz count B 250ns Period Rate and Continuous Rate Examples E 5 The 4MHz count total count frequency and new data bit reported to the programmable controller will be updated every scaler number of pulses And 250 260ms after the last pulses stop the 4MHz
63. owing features for the 1771 VHSC module type of input data format preset values rollover values Configure your module for its intended operation by means of your programming terminal and write block transfers Note Programmable controllers that use 6200 software release 4 2 or higher programming tools can take advantage of the IOCONFIG Addendum utility to configure this module IOCONFIG Addendum uses menu based screens for configuration without having to set individual bits in particular locations Refer to your 6200 software literature for details Important It is strongly recommended that you use IOCONFIG Addendum to configure this module The IOCONFIG Addendum utility greatly simplifies configuration If the IOCONFIG Addendum is not available you must enter data directly into the data table Use this chapter as a reference when performing this task During normal operation the processor transfers from 1 to 64 words to the module when you program a BTW instruction to the module s address 4 2 Configuring Your Module Configuration Block for a The complete configuration block for the block transfer write to the Block Transfer Write module is defined in Table 4 A below Table 4 A Word po Configuration Block for the VHSC Module Block Transfer Write 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Format Preset New Data Acknowledge Reset Force Outputs Enable Outputs e Gate
64. pono Bi Enable Bit BLOCK TRANSFER WRITE _ EN 110 010 DATA ADDRESS 031 og _ MODULE ADDRESS 100 ie 0s BLOCK LENGTH 00 110 FILE 201 300 SDN lt This rung is used to place a zero between the first available timer counters used for all block transfers and those used throughout the rest of the program 032 032 3 eL PUT 0 0 This rung uses a BTR done bit to trigger a move of the count data stored at 301 to a buffered location at 331 The program should access all data from the buffered file count 0 MSD would be located in word 333 and the LSD in word 334 VHSC BTR Done Bit 110 FFM FILE TO FILE MOVE 3 COUNTER ADDR 033 17 POSITION 1 FILE LENGTH 18 FILE A 301 322 FILE R 331 352 093 RATE PER SCAN DN PLC 3 Program Example Module Programming 3 3 Block transfer instructions with the PLC 3 processor use one binary file in a data table section for module location and other related data This is the block transfer control file The block transfer data file stores data that you want transferred to the module when programming a block transfer write or from the module when programming a block transfer read The address of the block transfer data files are stored in the block transfer control file The industrial terminal prompts you to create a control file when a block transfer instruction is being programmed The same block tra
65. presentation PE dae Lp d A jai arrm m M Argentina e Australia e Austria e Bahrain e Belgium e Brazil e Bulgaria e Canada e Chile e China PRC e Colombia e Costa Rica e Croatia e Cyprus e Czech Republic e Denmark e Ecuador e Egypt e El Salvador e Finland e France e Germany e Greece e Guatemala e Honduras Hong Kong Hungary e Iceland e India e Indonesia e Ireland e Israel e Italy e Jamaica e Japan e Jordan Korea e Kuwait e Lebanon e Malaysia e Mexico e Netherlands e New Zealand e Norway e Pakistan e Peru e Philippines e Poland e Portugal e Puerto Rico e Qatar e Romania e Russia CIS e Saudi Arabia e Singapore e Slovakia e Slovenia e South Africa Republic e Spain e Sweden e Switzerland e Taiwan e Thailand e Turkey United Arab Emirates e United Kingdom e United States e Uruguay Venezuela e Yugoslavia Allen Bradley Headquarters 1201 South Second Street Milwaukee WI 53204 USA Tel 1 414 382 2000 Fax 1 414 382 4444 Publication 1771 6 5 74 May 1993 Supersedes publication 1771 6 5 74 June 1991 P N 955113 51 Copyright 1993 Allen Bradley Company Inc Printed in USA
66. r counter 3 BTW length invalid length not equal to 0 1 2 4 12 20 24 29 34 39 44 49 54 59 64 Chapter Summary In this chapter you learned how to interpret the module indicators and the meanimg of the error codes returned by the module Appendix A Specifications Number of Counters 4 Module Location 1771 Series A or B I O chassis Maximum Count Value 0 999 999 programmable 5 5ms binary BTW Processing Time worst case 11ms BCD 1 5 2 9ms typical 100Hz for switch bounce electromechanical switch user selectable 250kHz in encoder modes 2 channel quadrature 500kHz in period rate rate measurement and continuous rate modes 1MHz in counter modes single channel on a configuration change Maximum Input Frequency Inputs per Counter 3 A B Gate reset Input Voltage 5V or 12 24V user selectable Input Current Typically 7mA 9 5V 7 0 to 15 0mA 12 24V Minimum Input Current 4mA Number of Outputs 8 Maximum Output Off state Leakage Current less than 10uA 24V dc Maximum On state Voltage Drop 0 05 x current Output Control Any number of outputs are assignable to any of 4 counter channels One turn on preset value and one turn off preset per output Output Voltage 5 to 24V dc customer supplied 2A per channel sourced out of module All outputs Output Current can be on simultaneously without derating ES lt 10us turn on lt 100us turn off Output Switching T
67. ramming moves status and data from the input module to the processor s data table Table 5 A The processor user program initiates the request to transfer data from the module to the processor The module transfers up to 26 words to the processor s data table file The words contain module status and input data from each channel When a BTR of length 0 is programmed the module returns 18 words Important Words 19 through 26 are optional and are accessed only by programming a BTR length greater than 18 words Words 19 through 26 are only valid if in period rate or continuous rate modes In any other mode words 19 through 26 are zero Table 5 A BTR Word Assignments for the VHSC Module 1771 VHSC Octal Bit 17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00 Decimal Bit 15 14 13 12 11 10 o9 08 07 06 05 04 03 02 ot 00 1 N Diagnostics always in BCD New Data Not Used PU Gate Reset input Status of outputs state Counter 0 MSD 0 999 Counter 0 LSD 0 999 Counter 1 MSD 0 999 Counter 1 LSD 0 999 Counter 2 MSD 0 999 Counter 2 LSD 0 999 Counter 3 MSD 0 999 Counter 3 LSD 0 999 Counter 0 Store count values MSD range 0 999 in encoder counter mode or frequency value MSD range 0 500 in rate measurement or period rate mode Counter 0 Store count values LSD range 0 999 5 2 Module Status and Input Data Octal Bit 17 16 15 13 12 11 10 07 06 05 04 03
68. requency is very near scaler x 2Hz the most significant digits of the 4MHz count can be greater than 999 This value will be accurate In period rate and continuous rate modes the smallest frequency returned equals 2 x scaler Hz Frequencies less than this will return OHz The frequency will go to 0 and the 4MHz count will go to 999 999 250 260ms after the last pulse The new data bit will also be set Words 19 through 26 have added to the BTW Operation of Outputs in Period rate Mode 1771 VHSC Revision B Modules Period Rate and Continuous Rate Examples E 3 The following examples demonstrate the operation of the outputs in period rate mode of operation for the 1771 VHSC revision B modules 1 If scaler 1 The 4MHz count frequency new data bit totalized count and outputs will be updated on the trailing edge of every pulse at the gate reset input 2 If scaler z 1 and Number of pulses occurring in 250ms lt 1 2 scaler 1 The 4MHz count will remain at 999 999 the frequency will remain at 0 The outputs will be on if A output on preset gt B output off preset The outputs will be off if A output on preset B output off preset 3 If scaler 1 and 1 2 scaler 1 lt Number of pulses occurring in 250ms lt 1 5 scaler The outputs 4MHz count frequency and new data bit will be updated on the leading not inverted edge of the scaler 1 number pulse occurring in 250ms Note Any previous
69. rforms a BTR of the values and stores them in a data table 5 The processor and module determine that the transfer was made without error and that input values are within a specified range 1 18 Overview of the Very High Speed Counter Module 6 Your ladder program can use or move the data if valid before it is written over by the transfer of new data in a subsequent transfer Chapter Summary In this chapter you learned how your module operates and how your module communicates with the programmable controller Chapter 2 Installing the Very High Speed Counter Module Chapter Objectives This chapter gives you information on calculating the chassis power requirement e keying a chassis slot for your module setting the voltage and filter jumpers e wiring the input module s field wiring arm e installing the input module Before installing your module in the I O chassis you must Before You Install Your Module Action required Refer to Calculate the power requirements of all modules in each chassis Power Requirements Determine where to place the module in the l O chassis Module Location in the l O Chassis Key the backplane connector inthe I O chassis Module Keying European Union Directive If this product is installed within the European Union or EEA Complian ce regions and has the CE mark the following regulations apply EMC Directive This apparatus is tested to meet Council Directive 89 336 EEC E
70. rogrammable Controller Overview of the Very High Speed Counter Module 1 17 The default mode for the VHSC module is the counter mode for all 4 of the counters In the default configuration the module will continuously return counts 0 999 999 binary to the programmable controller processor The presets and rollovers associated with each of the 4 counters will not be active nor will any of the outputs be active The processor transfers data to and from the module using block transfer write BTW and block transfer read BTR instructions in your ladder diagram program These instructions let the processor obtain input values and status from the module and let you establish the module s mode of operation 1 13 Figure 1 13 How the Module Communicates with a Programmable Controller 3 E T 1 o 0 6 BTW 5 m O oss e E 2 w BTR L 1l VHSC Module PC Processor 1771 VHSC PLC 5 15 Shown 12938 I 1 The processor transfers your configuration data and commands to the module using a BTW instruction 2 External devices generate input signals that are transmitted to the module 3 The module converts these signals into binary or BCD format and stores these values and controls their output until the processor requests their transfer 4 When instructed by your ladder program the processor pe
71. ror Bit B12 0 B12 0 FI 3 3 3 4 Module Programming PLC 5 Program Example Block transfer instructions with the PLC 5 processor use one binary file in a data table section for module location and other related data This is the block transfer control file The block transfer data file stores data that you want transferred to the module when programming a block transfer write or from the module when programming a block transfer read The address of the block transfer data files are stored in the block transfer control file The industrial terminal prompts you to create a control file when a block transfer instruction is being programmed A different block transfer control file is used for the read and write instructions for your module Figure 3 3 PLC 5 Family Sample Program Structure The VHSC module is located in rack 0 module group 0 slot 0 The BTR control file starts at N21 0 and is 5 words long The data obtained by the processor from the VHSC is placed in memory starting at location N22 101 and with the default length of 0 is 18 words long The MSD of counter 0 is stored in N22 103 and the LSD of counter 0 is stored in N22 104 VHSC BTR VHSC BTR VHSC BTW Control File Enable Bit Enable Bit BTR N21 0 N21 5 BLOCK XFER READ EN RACK 3 F GROUP 15 15 MODULE CONTROL N21 0 DATA FILE N22 101 AER LENGTH 0 CONTINUOUS N The VHSC module is located in rack 0 module group 0 s
72. rou bleshooting troubleshooting These indicators consist of active indicator input indicators output indicators e fault indicator ACTIVE Active Indicator ee ee MUS The active indicator is on when the module has successfully powered B01 B2 B3 Input Indicators up When an input indicator A B is on it indicates that the input is SUE high When the output indicator is on it indicates that the module pes H Output Indicators jas commanded the output to be on When a gate reset indicator G FAULT Fault Indicator is on its input is high Since that signal can be inverted it does not indicate whether the signal on that terminal is necessarily logically true 10716 1 A troubleshooting chart is shown below Troubleshooting Chart Indication Probable Cause Corrective Action Active LED ON The module has successfully powered up Normal No action required Active OFF The module has not powered up successfully Check fault light and rack power supply Input LED ON A signal is available at the designated input Normal No action required terminal high Input LED OFF A signal is not available at the designated input Normal No action required terminal low Fault LED ON Internal problem Power down the module reseat in I O chassis and restore power If the fault LED remains on replace module Output LED ON The module has commanded an output on Normal No action required Output LED OFF T
73. rt 0 0 0 0 cece eee eee eee Diagnostic Codes Returned by the Module Diagnostics Reported in Word 1 of BTR Chapter Summary 000 ccc cece eee eee eee Specifications 626s coer roh rh Rx tee need wes Sample Programs eese Sample Program for PLC 2 Family Processors Sample Program for PLC 5 Family Processors Addditional Sample Program for PLC 5 Family Processors Application Considerations 2 00ee00 Appendix Objectives 0 cee eee eee eee Types of Input Devices 2 0 0c ccc cece eee Examples for Selecting Input Devices 0005 Circuit Overview 2 o2 cde xao dew ike be rn ee eats ipu Detailed Circuit Analysis 2 0 0 cece eee eens 5V Differential Line Driver Example 05 12 to 24V Single Ended Driver 000cc ee eeee Open Colector os caked ienwawerdsacsmed cbce dene C RES Supply Voltage verses Jumper Settings Electromechanical Limit Switch 00 cee eeee Output Circuits 1 eee eens Application Considerations 0 cece eee e ee eee Input Cable Length ies sGersed ELOCRENE EN REY IRREREG Totem pole Output Devices 0 0 cece ee eee Cable Impedance 0 c ccc cece nennen Cable Capacitance 0 0 0 0 ccc cece cece eens Cable Length and Frequency 000
74. rticular scan the rate at which you can do a BTW will vary depending on module configuration from about 1 5ms to 2 9ms The best case configuration would be no channels in period rate or continuous rate worst case configuration would be all 4 channels in period rate or continuous rate D 4 Questions and Answers e How do my output on off values work The first value is always the on value and the second value is always the off value For example with a rollover value of 2000 if I specify an on value of 1999 and an off value of 0 the output will only be on when the count equals 1999 If I specify an on value of 0 and an off value of 1999 the output will only be off at a count of 1999 How do my outputs work if I tie them to an input used in frequency mode If an output is tied to an input used in period rate mode the output will be triggered by the counts not by the frequency The module provides better resolution by tieing the output to the 4MHz clock count value instead of the frequency For example in period rate mode with a scaler value of 1 feeding the gate input a constant frequency of 285Hz will return a frequency of 284 285 but the counts returned will be 7017 7019 The output is tied to the count value of 7017 7019 If an output is tied to an input used in rate measurement mode the output is tied directly to the frequency For example with a time base of 500msec the count returned will be 142 143 and the freq
75. s a valid BTW with N22 1 8 going from 0 to 1 it will force the count 0 value returned via the BTR in words N22 103 and N22 104 to the BTW value contained in preset 0 words N22 113 and N22 114 COUNT 0 PRESET COMMAND BIT N22 1 CJ 8 B 4 Sample Programs Addditional Sample Program for PLC 5 Family Processors This block transfer read rung can be used alone or with the block transfer write rung shown below If used alone all VHSC counters will operate in a default mode of outputs disabled rollover at 999 999 and count mode with pulses counted on channel A direction sensed at channel B and the gate is not active Rung 2 0 VHSC BTR VHSC BTR Control Block Enable Bit BTR N21 0 BLOCK XFER READ EN RACK GROUP 15 MODULE DN CONTROL DATA FILE ER LENGTH CONTINUOUS If the default module operation is acceptable this rung can be optional If it is necessary to reconfigure this rung will automatically send a new configuration to the module using the module configured bit N22 101 0 in the BTR file This will occur on power up and each time the processor is changed from program to run mode The optional user bit 1 001 07 can also configure the module at any time Not enabling the BTW can increase throughput of the read Rung 2 1 Rung 2 2 VHSC Module VHSC BTW VHSC BTW Configured Bit Enable Bit Control Block N22 101 N21 5 BTW E BLOCK XFER WRITE EN RACK 0 15 GROUP MODULE DN CONTROL Optional
76. s caused by the cable will reduce the specified 250KHz specification For any application over 100 feet and or over 100KHz use Belden 9182 a high performance twisted pair cable with 100 foil shield a drain wire moderate 150 ohm inpedance and low capacitance per unit length General Questions and Answers Appendix D Questions and Answers This appendix presents some of the more commonly asked questions about application and operation of the Very High Speed Counter module The following questions and answers do not cover all possible questions but are representative of the more common ones Q If Ido not connect channel B in counter mode what happens to the count status A With channel B disconnected or tied low the module will count up only If channel B is tied high it will count down Q What happens when my processor faults A All outputs will turn off regardless of the last state switch in the I O rack Q What happens to my outputs if I place the processor in program mode A All outputs turn off The inputs will remain active and the module will keep track of count changes When the processor is returned to RUN mode the outputs will not become active until after the first valid BTW and then will be based on the current count Q What does it mean when the indicator for a particular input is on A Ifthe indicator is on it means that the input is tied high If the indicator is off the input is fl
77. se permanent damage to the circuit The 1771 VHSC module contains 4 isolated pairs of output circuits Customer supplied power ranging from 5V to 24V dc is connected internally through terminal Vcc to the power output transistors Refer to Figure C 4 When an output is turned on current flows into the drain out of the source through the fuse and into the load connected to the ground of the customer supply customer return Diodes D28 and D32 protect the power output transistors from damage due to inductive loads If local electrical codes permit outputs can be connected to sink current This is done by connecting the load between the power supply terminal and the customer Vcc terminal on the field wiring arm The output terminal is then connected directly to ground customer return Note that this wiring method does not provide inductive load protection for the power output transistors Figure C 4 Output Circuit Diagram 95 Customer Vcc F1 e 28 Out 0 A 028 F2 D32 4 2 Out 1 b 28 Customer Return 10693 I C 8 Application Considerations Application A successful installation depends on the type of input driver input Considerations cable length input cable impedance input cable capacitance frequency of the input The following provides information on these installation factors for the 1771 VHSC module Input Cable Length Maximum input cable length depends on the type of o
78. sing 150 ohm Belden 9182 or equivalent cable more closely matches the impedance of both encoder and module input circuits than 78 ohm cable such as Belden 9463 A closer impedance match minimizes reflections at high frequencies Termination of one or both ends of the cable with a fixed resistor whose value is equal to the cable impedance will not necessarily improve reception at the end of the cable It will however increase the dc load seen by the cable driver Cable Capacitance Use cable with a low capacitance as measured per unit length High capacitance rounds off incoming square wave edges and takes driver current to charge and discharge Increasing cable length causes a linear increase in capacitance which reduces the maximum usable frequency This is especially true for open collector drivers with resistive pull ups For example Belden 9182 is rated at a very low 9pF foot Cable Length and Frequency When cable length or frequency goes up your selection of cable becomes even more critical Long cables can result in changes in duty cycle rise and fall times and phase relationships The phase relationship between channels A and B in encoder X1 and X4 mode is critical The maximum encoder input of 250KHz is designed to work with Allen Bradley Bulletin 845H or similar incremental encoders with a quadrature specification of 90 22 and a duty cycle specification of 5096 10 Any additional phase or duty cycle change
79. spond to the 4 counters bit 00 counter 0 bit 01 counter 1 bit 02 counter 2 bit 03 counter 3 bits 00 03 New data acknowledge bits When one of these bits transitions from 0 bits 04 07 to 1 the corresponding new data bit in BTR word 1 bits 4 7 will be reset Bit 04 corresponds to counter 0 bit 05 to counter 1 etc These bits control the preset function When one of these bits is set to 1 the preset count value is automatically loaded into the counter and bits 08 11 the counter begins counting Note The preset count values are loaded into words 13 through 20 The bits correspond to the counters as follows Bit 08 counter 0 bit 09 counter 1 bit 10 counter 2 bit 11 counter 3 bits 12 14 Not used This bit determines whether BCD or binary format is used Bit 15 0 Indicates all values in the BTW file and the BTR file will be in binary Diagnostic byte word 1 is always BCD Bit 15 1 Indicates all values in the BTW file and the BTR file will be in BCD Enables outputs Bit 00 corresponds to output 0 bit 01 to output 1 bits 00 07 etc Outputs must be enabled before they can be turned ON Bits must be set 1 before the output can be turned on Output forcing bits Setting a bit to 1 allows the output to be forced Bit bits 08 15 08 corresponds to output 0 bit 09 corresponds to output 1 etc Outputs must also be enabled Configuring Your Module Word Bits Description i Determine rate mea
80. surement mode encoder mode counter mode or Worda q e0is 00 02 period rate mode for COUNTER 0 we Twv Owems v o mewxmm v mewumn v owe v Petes 1 Wwe 1 enose T Not used Determine store count mode for COUNTER 0 bits 04 06 04 Store count mode not used for counter 0 E 0 Mode 1 store continue used 0 1 Mode 2 store wait resume used 0 0 Mode 3 store reset wait start used 0 1 Mode 4 store reset start used 1 0 0 Invert signal bit for gate reset terminal bit 07 0 Not inverted 1 Inverted bits 08 10 Determine rate measurement mode encoder mode counter mode or period rate mode for COUNTER 1 Mode Bit 10 o9 8 Counter mode 0 0 o Encoder X1 mode 0 0 Em Eee v connect v NETS EH Period rate mode Rate Measurement mode Continuous rate mode EISE Not used bits 12 14 Sor caro aetra NM C Du iesez oatmeal 1 Fetes onsets o Tero 1 Configuring Your Module 4 5 Word Bits Description Invert signal bit for gate reset terminal bit 15 0 Not inverted 1 Inverted Determine rate measurement mode encoder mode counter mode or yord 4i oun 02 period rate mode for COUNTER 2 we w w s s owe 1 9 Eewume o oee T 9 Gmewws o w i 5 9 weWswmeme i 9 Ommesueme 3 Not used bits 04 06 Determine store count m
81. the inputs are driven by devices such as encoders or line drivers Use the filter mode on the inputs when a mechanical switch is providing the input The filter provides de bouncing for the mechanical switch The frequency of counting must be less than 100Hz when the filter mode is selected Use these jumpers to match the operation of the module with the input supplied Settings are shown in Figure 2 2 To set the jumpers proceed as follows 1 Remove the four screws securing the side cover to the module and remove the covers 2 Using your fingers reposition the jumpers associated with each input channel according to your requirements Refer to Figure 2 2 Installing the Very High Speed Counter Module 2 5 Figure 2 2 Setting the Configuration Jumpers Filter Jumper Voltage Jumper EE Position Description of Operation Down 12 24V High Speed factory default setting Down U 5V High Speed Up 12 24V with low speed filter Up 5V with low speed filter FILTER f 5V ji HI SPEED 12 24V Y 10688 l n the filter position the module will not see frequencies above 100Hz 3 Reposition the cover and secure with the 4 screws removed in step 1 Connecting Wiring Connect your I O devices to the 40 terminal field wiring arm cat no 1771 WN shipped with the module Figure 2 3 Attach the field wiring arm to the pivot bar at the bottom of the I O chassis The field wiring arm pivots upward and connects with the mo
82. the turn on count is reached and turned off as soon as the turn off count is reached As the internal 4MHz clock is counted the outputs dynamically track the 4MHz count This allows you to turn an output on a certain number of 4MHz counts after the gate reset pin goes active and turn it off a certain number of 4MHz counts later 1771 VHSC revision B and later modules count the total number of pulses occurring at the gate reset pin This function is frequency limited This total count is returned when you request words 19 through 26 in your BTR You can reset this count by resetting the reset bit bits 0 4 in BTW word 1 Rollover and preset are inactive Refer to appendix E for additional information Figure 1 9 Period Rate and Continuous Rate Output Operation with Scaler of 1 Sampled pulses Output on off presets active only on scaler number pulse M Output on off presets active during entire ulse P 10684 1 Use the rate measurement mode to count incoming pulses for a user specified time interval At the end of the interval the module returns a value representing the sampled number of pulses and a value indicating the incoming frequency When the count and frequency are updated any associated outputs are checked against their associated presets Overview of the Very High Speed Counter Module 1 13 The value representing the sampled number of pulses is returned in BTR words 3 thru 10 and the value indicating
83. to alert you to possible injury to people or damage to equipment under specific circumstances ATTENTION Identifies information about practices or circumstances that can lead to personal injury or death property damage or economic loss Attention helps you Identify a hazard Avoid the hazard Recognize the consequences Important Identifies information that is especially important for successful application and understanding of the product Important We recommend you frequently backup your application programs on appropriate storage medium to avoid possible data loss Summary of Changes Summary of Changes Summary of Changes This release of the publication contains new and updated information from the last release New Information This release includes information on the Series B version of the 1771 VHSC module This includes a new Appendix E on the differences between period rate and continuous rate modes of operation This information was not included in the previous version of this publication Updated Information This release includes updated information in Appendix C application Considerations and revised Specifications in Appendix A Change Bars To help you find new and updated information in this publication we have included change bars as shown to the right of this paragraph Table of Contents Summary of Changes SOC 1 Summary of Changes
84. ture Contact your nearest Allen Bradley office for more information about your programmable controllers Product Compatibility This module can be used with any 1771 I O chassis Communication between the module and the processor is bidirectional The PLC sends module information using block transfer write instructions and the 1771 I O backplane The PLC receives module status information through block transfer read instruction and places it in the data table I O image table use is an important factor in module placement and addressing selection The module s data table use is listed in the following table Table P A Compatibility and Use of Data Table Use of Data Table Input Output Read Write Image Image Block Block Bits Bits Words Words Compatibility Catalog Number Addressing Chassis 1 2 slot 1 slot 2 slot Series See note See note A and B See note A and B 1771 VHSC Rev A 1771 VHSC Rev B A Compatible with 1771 A1 A2 A4 chassis B Compatible with 1771 A1B A2B A3B A4B chassis Yes Compatible without restriction NOTE Restricted to complementary module placement refer to chapter 2 Related Publications For a list of publications with information on Allen Bradley programmable controller products consult our publication index SD499 Chapter 1 Overview of the Very High Speed Counter Module Chapter Objectives This chapter gives you information
85. uency will be 284 286Hz The output will be tied to the frequency 284 286Hz If I change the on off value of an output how long before it takes effect If the output is tied to an input used in any of the count modes the change will take effect at the end of the BTW processing time The BTW processing time is based on the number of words sent 5 5msec binary and 11msec BCD for a 64 word transfer after the BTW done bit is set If the output is tied to an input in either frequency mode the output change will not take effect until the data is processed as above What are the counts returned in rate measurement mode These counts are the number of counts received on channel A during the selected sample time period The counts are divided by the specified time base and converted to frequency For example with a time base of 500msec and a fixed frequency of 285Hz on channel A a count value of 142 143 will be returned resulting in a frequency of 284 285 What are the counts returned in period rate mode These counts are the number of 4MHz internal clock pulses that occurred during the selected number of scaler gate pulses Each pulse would be equal to the gate terminal being high for 0 25usec Questions and Answers D 5 What happens if I change my BTW length after power up to save block transfer time As long as the length is valid the module will retain the data previously sent to it as long as backplane power to the module is
86. ulses for 1 2 Cycle Terminal in Hz of Gate Reset Pulse words 11 18 in BTR words 3 10 in BTR 2 1 meg 5 400K 10 200K 20 100K 50 40K 100 20K 200 10K 500 4K 1KHz 2K 2KHz 1K 5KHz 400 10KHz 200 20KHz 100 50KHz 40 100KHz 20 200KHz 10 Operation of scaler In period rate mode the scaler lets the incoming pulse train at the gate reset pin be divided by a user defined number Acceptable values for the scaler are 1 2 4 8 16 32 64 and 128 There is one scaler value for each counter The default value for each scaler is 1 Note A 0 is equivalent to 1 ATTENTION Sample period times scaler must be less than 0 25 seconds or the counter will overflow without providing an overflow indication Connection to Counter Inputs The only input to the module in the period rate mode is made to the gate reset terminal The counter inputs channel A and B are not used in the period rate mode 1 12 Overview of the Very High Speed Counter Module Continuous Rate Mode Incoming pulse train at gate reset terminal 4MHz internal clock Period rate Continuous rate Operation in Rate Measurement Mode The continuous rate mode is similar to the period rate mode previously described except the outputs in this mode are dynamic outputs Use this mode to determine the frequency of input pulses by counting the number of internal 4MHz clock pulses over a user specified number of input signal pulses Each output is turned on as soon as
87. unter will count down If phase B is low or floating that is not connected the counter counts up If Phase B is Counter will count direction High Down Low or floating not connected Up The module reads incoming pulses from a maximum of 4 encoders single ended or differential counters pulse generators mechanical limit switches and so forth and returns a count to the programmable controller processor in a binary or BCD number 0 999 999 Terminal direction sense Overview of the Very High Speed Counter Module The counter mode accepts only one phase feedback This relationship is shown in 1 1 Figure 1 1 Block Diagram of Counter Mode From Encoder Pulse Generator Phase A Terminal Phase B 1771 VHSC Gate Reset Terminal 10677 I Encoder Mode The encoder mode allows the module to read incoming pulses and return them to the programmable controller processor as a binary or BCD number 0 999 999 In this mode the module will accept two phase quadrature feedback The module senses the relationship between the 2 phases and counts up or down accordingly Encoder X1 mode uses channel A for the pulse input With B low floating the count direction is up when B is high the count direction is down Encoder X4 mode is identical to X1 except it uses quadrature signals on channel A and channel B and counts on the leading and trailing edges of A and B Overview of the Very High Speed
88. utput driver in your encoder the kind of cable used and maximum frequency at which you will be running With a differential line driver 250 feet or less of high quality low capacitance cable with an effective shield and an operating frequency of 250KHz or less will likely result in a successfully installation If you use an open collector or other single ended driver at distances of 250 feet and frequencies of 250KHz your chances of success are low Refer to the table below for suggested desirable driver types Desirable Adequate Undesirable 5V Line Drivers such as Balanced Single Ended any AC or ACT family part Standard TTL or DM8830 or LSTTL Gates DM88C30 Discrete balanced circuit 75ALS192 or or equivalent Open Collector suitable for frequencies of lt 50KHz Totem pole Output Devices Standard TTL totem pole output devices such as 7404 and 74LS04 are usually rated to source 400 microamps at 2 4V in the high logic state This is not enough current to turn on a 1771 VHSC input circuit If your present encoder has this kind of electrical output rating you cannot use it with the VHSC module Most encoder manufacturers including Allen Bradley offer several output options for a given encoder model When available choose the high current 5V differential line driver Application Considerations C 9 Cable Impedance Generally you want the cable imedance to match the source and or load as closely as possible U
89. voltage across R100 and R101 is sufficient to turn Q3 on shunting any additional current away from the photodiode The voltage drop across Q3 will be equal to about 2V Vphotodiode Vbe 2V The current demanded by the 1771 VHSC input circuit would be about 18mA 23V 2V 1 15K 18mA which is well within the capability of this driver C 6 OPEN COLLECTOR INPUT LIMIT SWITCH OR DC PROXIMITY SWITCH 12V i Application Considerations Input Terminals Open Collector Open collector circuits the upper circuit in Figure C 3 require close attention so that the input voltage is sufficient to produce the necessary source current since it is limited not only by the 1771 VHSC input resistors but also the open collector pull up Jumper position provides some options as shown in the table below Supply Voltage verses Jumper Settings Jumper Setting Total Impedance Supply Voltage Available Current 12 3 2mA insufficient 12 4 65mA insufficient 24 JPR4 3 15K 7mA optimal 24 JPR5 2 15K In this example you must increase the supply voltage above 12V to make sure there is sufficient input current to overcome the additional 2K source impedance Note that there is insufficient current with the jumper in the 12 24V position and a 12V supply 10 2mA okay Figure C 3 Example Circuits for Open Collector and Electromechanical Limit Switch OUTPUT GROUND e Ri R2 1K 150 JPR4 JPRS
90. z Count 20 000 40 000 Scaler 1 ON at 20 000 OFF at 80 000 E 6 Period Rate and Continuous Rate Examples Figure E 2 Operation of Outputs in Period Rate and Continuous Rate with Scaler 2 50Hz at Gate Reset 5096 Duty Cycle Scaler 2 What the counter sees Counter internally with Idle scaler 2 Counter times width of pulse 4MHz count 80 000 CHANNEL IN PERIOD RATE 4MHz Count 80 000 Scaler 2 ON at 20 000 OFF at 80 000 CHANNEL IN CONTINUOUS RATE 4MHz Count 4MHz Count 20 000 80 000 Scaler 2 ON at 20 000 OFF at 80 000 12633 1 Figure E 3 Operation of Outputs in Period Rate and Continuous Rate with Scaler 4 50Hz at Gate Reset 50 Duty Cycle Scaler 4 What the counter sees Counter internally with Idle scaler 4 Counter times width of pulse 4MHz count 160 000 CHANNEL IN PERIOD RATE Scaler 4 ON at 20 000 4MHz Count 160 000 4MHz Count 160 000 OFF at 80 000 i t CHANNEL IN CONTINUOUS RATE 4MHz Count 4MHz Count 4MHz Count SA QU v Bey P 20 000 80 000 20 000 Scaler 4 ON at 20 000 OFF at 80 000 12634 l Symbols Empty P 1 P 2 C 1 C 7 C 8 A application considerations _C 8 bit Word descriptions _4 3 block transfer read bit word descriptions _5 3 programming _5 1 BTR _3 1 bit word description _5 3 word assignments _5 1 BTR length E 1 BTW 3 1 bit word descriptions 4 3 configuration block 4 2 C CE96 directives _ 2 1

1771-6.5.74, Very High-Speed Counter Module User Manual

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