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PACSystems RX3i Control Memory Xchange Module

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1. is the receiver CMX modules are networked together using either simplex single fiber or duplex dual fiber multimode fiber optic cables The specific cable construction depends on your operating environment For details on cables refer to the PACSystems Memory Xchange Modules User s Manual GFK 2300 LEDs All front panel LED indicators are green P ptica LED Label Description Transceiver bottom view OK ON indicates the CMX module and a the CPU are functioning properly o CONFIG ON indicates the module is e configured T TX FRONT SIG DETECT ON indicates the receiver is ESS detecting a fiber optic signal OWN DATA ON indicates the module has received its own data packet from the network at least once A reflective memory hub can be used to bypass a node that is not configured Example of SIG DETECT Operation Node 5 Not Configured Configured CONFIG ON Not Configured Confi gured SIG DETECT ON CONFIG OFF CONFIG ON if upstream node is configured SIG DETECT ON SIG DETECT OFF Upstream _ _ _ dis Node 4 v ia Node 5 dias RX Node 6 SENO Downstream Nodes Nodes RX3i Control Memory Xchange Module 7 GFK 2506C Installation in Hazardous Locations m EQUIPMENT LABELED WITH REFERENCE TO CLASS GROUPS A B C amp D DIV 2 HAZARDOUS LOCATIONS IS SUITABLE FOR USE IN CLASS DIVISION 2 GROUPS A B C DOR NON HAZARDOUS LOCATIONS ONLY m WARNING EXPLOSION
2. modules require a PCI backplane which is not available on IC694CHSxxx expansion bases Rack Location Problems Resolved by Release 1 02 CMX RMX memory read parity was checked only on DWORDs aligned to QWORD boundary An error existed in the parity check where half of the memory was not being checked for parity Only the lower 32 bit DWORD for each 64 bit QWORD would be parity checked ignoring the parity check on the upper 32 bits An error existed in the CMX transceiver control that allowed network Memory read parity check CMX128 module power up Eliminated possible metastability issue i n the DDR2 memory interface traffic to be received while the module was powering up and executing internal initialization Occasionally this traffic could interfere with the memory controller initialization causing it to lock up and preventing the module from completing power up The failure occurred only when a Reflective Memory Hub was connected to the CMX An issue existed in the CMX DDR2 memory interface that could cause the memory data path to be in a metastable state If this occurred invalid data could be written to or read from the DDR2 memory 4 GFK 2506C RX3i Control Memory Xchange Module Restrictions and Open Issues in this Release Subject Description RX3i RMX and CMX modules with version A hardware require a metal enclosure to meet radiated emissions requirements For installat
3. HAZARD SUBSTITUTION OF COMPONENTS MAY IMPAIR SUITABILITY FOR CLASS DIVISION 2 m WARNING EXPLOSION HAZARD WHEN IN HAZARDOUS LOCATIONS TURN OFF POWER BEFORE REPLACING OR WIRING MODULES AND m WARNING EXPLOSION HAZARD DO NOT CONNECT OR DISCONNECT EQUIPMENT UNLESS POWER HAS BEEN SWITCHED OFF OR THE AREA IS KNOWN TO BE NONHAZARDOUS Government Regulations U S European Canadian and Australian radio frequency emission regulations are intended to prevent equipment from interfering with approved transmissions or with the operation of other equipment In order to meet the emissions limits for Class A digital devices as specified in 47 CFR 15 EN 55011 ICES 003 and AS NZ 3548 the Control system in which the IC695RMX128 Ax and IC695CMX128 Ax modules are used shall be installed as follows The Control system must be mounted in a minimum IP54 rated metal enclosure or the equivalent All surfaces of the enclosure must be adequately grounded to adjacent surfaces to provide electrical conductivity Wiring external to the enclosure must be routed in metal conduit or the equivalent The conduit must be mounted to the enclosure using standard procedures and hardware to ensure electrical conductivity between the enclosure and conduit Equivalent termination for the shielded cable alternative to conduit may also be used Applications using these modules outside a grounded metal enclosure may experience RF interference at 956 24MHz 3 08
4. GHz or 3 29GHz
5. PACSystems RX3i IC695CMX128 AB GFK 2506C Control Memory Xchange Module November 2010 The Control Memory Xchange CMX module provides deterministic sharing of data among PLCs and other computing devices on a high Ours speed fiber optic network using reflective memory technology A CONFIG reflective memory network can contain up to 256 nodes Each node in SIG DETECT the network can be any reflective memory device that is compatible Q oe with the 5565 family When data is written to one node all nodes on the network are automatically updated with the new data Each node in the reflective memory network is connected in a daisy chained loop using fiber optic cables The transmitter of the first node is tied to the receiver of the second The transmitter of the second node is tied to the receiver of the third node and so on until the loop is completed back at the receiver of the first node The figure on page 5 shows an example of a reflective memory network A PACSystems RX3i main rack supports a maximum of six CMX modules Features m PACSystems RX3i single slot form factor 128 Mbytes reflective memory with parity Software configuration of all node parameters no jumper or switch settings required No RX3i CPU processing required to operate the network Network compatible with VMIC 5565 family of reflective memory devices including the ACC 5595 reflective memory hub and the RX7i CMX module Connection wit
6. h multimode fiber up to 300m 984 25ft Dynamic packet sizes of 4 to 64 bytes controlled by the CMX module Network transfer rate of 43 Mbyte s 4 byte packets to 174 Mbyte s 64 byte packets Network link speed of 2 1 Gigabits sec Programmable module interrupt output m Four general purpose network interrupts with 32 bits of data each Network error detection m Up to 256 nodes per network Redundant transfer mode operation This optional mode reduces the chance of a data packet being dropped from the network Configurable network memory offset allows you to assign nodes on a network to groups according to the 16MB segment in the network address space that they use The CMX128 module must be located in an RX3i Universal Backplane The module can be hot inserted and removed following the instructions in the PACSystems RX3i System Manual GFK 2314 2 GFK 2506C Specifications RX3i Control Memory Xchange Module Packet size Dynamic packet sizes of 4 to 64 bytes automatically controlled by the CMX module Transfer rate Network link speed of 2 1 Gbits sec User memory 128MB SDRAM Input power from RX3i power supply 660 mA 3 3 VDC 253 mA 5 VDC Connectors m Fiber optic LC type conforms to IEC 61754 20 m Zirconium ceramic ferrule m Insertion loss 0 35 dB maximum Return loss 30dB Refer to the PACSystems RX3i System Manual GFK 2314 for product standards and ge
7. ion requirements see Government Regulations on page 7 RX3i CMX RMX does not disable transmitter when the CPU goes to Stop Halt mode For IC695CMX128 modules and IC695RMX128 modules not used as redundancy links the automatic transmitter disable feature currently does not work correctly when a controller goes to Stop Halt mode When the CPU goes to Stop Halt mode or fails and the automatic transmitter disable feature is enabled the fiber optic transmitter should be turned off breaking the reflective memory link When the feature is disabled the transmitter remains ON and the reflective memory link will not be broken When enabled the automatic transmitter disable feature does not work when the CPU goes into Stop Halt mode such as after a software watchdog trip or multi bit ECC error detection leaving the fiber optic transmitter ON The fiber optic transmitter is properly disabled if the CPU fails or is lost for instance the CPU hardware is removed the CPU experiences a hardware watchdog event or displays a blink code such as a page fault This user configurable feature is enabled by default It may be disabled by clearing bit 12 with a BUS_WRITE to region 3 offset 0x440 The LCSR status bit is not turning ON after LISR turns ON when Interrupt Sync Loss is generated The LCSR bit is not latched to the ON state indicating sync loss and should not be used for sync loss detection The LISR bit should be used fo
8. neral specifications Related Publications PACSystems Memory Xchange Modules User s Manual GFK 2300 PACSystems RX3i System Manual GFK 2314 PACSystems CPU Reference Manual GFK 2222 Proficy Machine Edition Logic Developer PLC Getting Started GFK 1918 Ordering Information Description Catalog Number Control Memory Xchange Module for RX3i IC695CMX128 Fiber Optic Cables VMICBL 000 F5 0xx where Oxx distinguishes different lengths Reflective Memory Hub VMIACC 5595 RX3i Control Memory Xchange Module 3 GFK 2506C Release Information This is the initial release of the RX3i Control Memory Xchange Module Release History Firmware Date 5 Release Version Upgrade Kit Comments IC695CMX128 AB 1 02 October 2009 82A1512 MS10 000 A1 See Problems Resolved IC695CMX128 AA 1 00 September 2008 N A Initial Release Upgrades CMX128 AA modules can be updated to firmware version 1 02 using upgrade kit 82A1512 MS10 000 A1 Upgrade kits can be downloaded from www ge ip com support Functional Compatibility The CMX128 requires the following versions for configuration and operation Programmer Version Requirements Proficy Machine Edition Logic Developer 5 80 released build 4541 or later is required to use the RX3i IC695CMX128 modules RX3i CPU PACSystems RX3i CPU firmware version 5 50 or later The CMX128 must be located in the main RX3i rack IC695CMX128
9. or details on accessing these advanced functions refer to the PACSystems Memory Xchange Modules User s Manual GFK 2300 Once the CMX has been configured a transfer of data over the network can be initiated by writing to the reflective memory region through the backplane The CMX forms the data into variable length packets sized from 4 to 64 bytes which it transmits over the fiber optic network to the receiver of the next node Whenever a packet is received the CMX evaluates the packet If the packet is valid and did not originate on this node it is accepted If however the data packet is invalid or if it originated at this node it is discarded The receiving node writes the data into the local reflective memory and simultaneously transmits the data to the next node on the network The process is repeated until the data returns to the originating node where it is removed from the network Sample Reflective Memory Network The seven node network in the following illustration consists of six RX3i CMX modules and a PCI WorkStation with a VMIPCI 5565 reflective memory board iit PCI WorkStation with VMIPCI 5565 reflective memory board Oe oO ll 6 RX3i Control Memory Xchange Module GFK 2506C Optical Transceiver The optical transceiver which is located on the bottom of the module has two LC type fiber optic ports The port labeled TX is the transmitter and the port labeled RX
10. r detecting sync loss SVC_REQ 17 is not supported SVC_REQ 17 is not supported to mask or unmask module interrupts on RX3i CPUs There is currently no way to identify which module interrupt should be masked on RX3i To turn off interrupts use the normal interrupt disabling mechanism described in the C695CMX128 user s manual For details see Dynamic Masking of Interrupts in the PACSystems Memory Xchange Modules User s Manual GFK 2300 CPU320 compatibility issue with firmware version 5 50 When using CPU320 with firmware version 5 50 occasionally a backplane reset of the CMX128 module will cause it to become non responsive This problem is corrected in CPU320 firmware version 5 51 RX3i Control Memory Xchange Module 5 GFK 2506C CMX Operation The CMX module initially powers up in an unconfigured state with its optical transmitter and receiver disabled The module cannot operate on a network until the RX3i CPU has delivered a hardware configuration to the module Basic operating functions are configured using Machine Edition Logic Developer PLC You can configure the following parameters in the hardware configuration Node ID Redundant Transfer Mode Rogue Master Network Memory Offset and Interrupt enable Additional functions beyond the basic read and write operations including enabling interrupts reading interrupt status enabling parity and reading parity errors can be performed by user logic F

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