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1. App 3 S TECHNICA Co LTD MKY46 User s Manual Appendix 2 Internal Equivalent Block Diagram DE Data expanded onto owned area D e 1028 to 1031 a gt SEE tp 1024 B DS 1 to 1027 w BE Dosas ES DOSA2 LH 1020 errs BS Ee ae OSWAP B bs q ss BP EUN J D 1012 to 1015 Received data from CUnet station specified with DOSA P 108 to 1011 X B ap HD Pr 19107 a D 100 to 103 OSTB1 05 2 4 Appendix S Tic HNICA CO LTD Appendix 3 Differences between MKY46 and 40 in IO mode 4 Absolute Maximum Ratings 40 mode The MKY46 is a CUnet dedicated CUnet l O IC providing backward compatibility with the Power supply voltage 0 3 to 7 0V 0 5 to 6 5V IG Input voltage Vss 0 3 to VDD 0
2. eere 4 3 A 4 4 Connecting Network Interface 4 5 Setting Baud iced 4 6 Network Cable Length 4 7 Setting of Frame Option ZLFS eese 4 7 Setting Station 4 8 Selection of Data Output to Internal Output Pins SDOSAO to SDOSA5 FKDOHL etti ci 4 9 Input Output Setting of General purpose External Pins IOSO to IOS2 2222 4 10 Logic Setting of General purpose External I O Pins INVO to INV7 4 11 Connection of General purpose External 1 0 Pins 4 12 Use of Timing Notification Signals STB1 STB2 4 12 Use of Signal for Notifying Output Availability of General purpose External I O Pins 0 4 12 Indicating Output Availability of General purpose External I O Pins 4 13 Clearing Output Level of General purpose External I O Pins amp CLRH 1 4 13 Clearing Output by Watchdog
3. S TECHNICA CO LTD 4 CUnet MK Y 46 User s Manual Note 1 The information in this document is subject to change without prior notice Before using this product please confirm that this is the latest version of this document 2 Technical information in this document such as explanations and circuit examples are refer ences for this product When actually using this product always fully evaluate the entire sys tem according to the design purpose based on considerations of peripheral circuits and the PC board environment We assume no responsibility for any incompatibility between this product and your system 3 We assume no responsibility whatsoever for any losses or damages arising from the use of the information products and circuits in this document or for infringement of patents and any other rights of a third party 4 When using this product and the information and circuits in this document we do not guaran tee the right to use any property rights intellectual property rights and any other rights of a third party 5 This product is not designed for use in critical applications such as life support systems Con tact us when considering such applications 6 No part of this document may be copied or reproduced in any form or by any means without prior written permission from StepTechnica Co Ltd S TECHNICA Co LTD MKY46 User
4. 291036 42 to 49 53 to 60 64 to 71 inverted at a time by INVO to 97 INV7 Baud rate setting 1 BPS1 Baud rate setting O Hi Hi Set logic inversion of general purpose 15192075 95 external I O pins Clock input for external baud rate Output update strobe e Maximum EXC frequency Xi x 1 4 bps value EXC x 1 4 Input update strobe 9 SAO t Clear 1016 to lo310utput levels 80 85 Set station addresses 40 SA5 Clear 100 to 1015 output levels 8 Green Output availability signal 92 5100 DOA Data Available MON JO UY Indicate data sending status Indicates that data in internal input pins can be sent to other Select memory block MB to 5 0 CUnet stations connected to a network be output to internal output pins 86 to 91 Ol to 4DOSA5 Green 93 5100 Select upper lower bits of OP Indicate output availability DOHL Data Out Hi bit Lo bit DONA Data Out Not Available Indicates that packets can be received from the CUnet station Notify PING specified by DOSA within 16 cycle times 11 Set frame option O Usually keep this pin High Keep this pin Low for a system consisting of 10 mode alone and when a frame option is set 8 Hardware reset 24 Leave unused output pins open 99 Crystal Oscillator VDD OUT 48 MHz standard Insert capacitors multilayer ceramic max 50 MHz GND y Precision 500 ppm around 104
5. Fig 4 11 Example of LED Connection to Pin pin Leave this pin open when not used Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 18 Notifying Start Timing of Cycle Pin The MKY46 has CYCle Top pin 52 to notify the start timing of a cycle The pin is usu ally kept High and outputs a pulse that goes Low for 2 x TBPS time at the start timing of a cycle Using the timing at which the output of this pin changes to Low allows the user to recognize the timing synchroniza tion common to all CUnet stations connected to a network Leave this pin open when it is not used The synchronous performance in which the start timing of a cycle synchronizes of a CUnet can be calcu lated using equation 4 1 Equation 4 1 2 x TBPS cycle time x clock accuracy signal propagation delay or less For example the synchronous performance is calculated as follows at 12 Mbps TBPS 83 3 ns with 64 CUnet stations cycle time 2 365 ms at a driving clock accuracy of 200 ppm 0 02 and a total length of cable 7 ns m of 100 m 167 ns 473 ns 700 ns 1 34 us max Caution This equation cannot be used when a HUB is inserted into a network MKY40 4 19 Notifying Reception of PING Instruction PING The MKY46 has the PING pin pin 7 to notify the reception of the PING instruction from other CUnet sta tions A PING signal is operated by intervention from
6. tp EE E 255 T2 tw Time Parameter Pre heat time 60 to 80 s Pre heat temperature 150 to 190 Temperature rise rate 1 to 4 C s Peak condition time 10 s max Peak condition temperature 255 Cooling rate to 1 5 C s Cooling rate to 0 5 C s High temperature area 220 60 s max Removal temperature Caution lt 100 C The recommended conditions apply to hot air reflow or infrared reflow Temperature indi cates resin surface temperature of the package Appendix 1 Cycle Time 10000 App 3 Appendix 2 Internal Equivalent Block Diagram App 4 Appendix 3 Differences between MKY46 and 40 in IO mode 5 S TECHNICA Co LTD Appendix Appendix 1 Cycle Time Table 12 Mbps 6 Mbps 3 Mbps 102 00 204 00 408 00 128 33 256 67 513 33 155 00 310 00 620 00 182 00 364 00 728 00 209 33 418 67 837 33 237 00 474 00 948 00 265 00 530 00 1 060 00 293 33 586 67 5529 322 00 644 00 1 288 00 351 00 702 00 1 404 00 380 33 760 67 1 521 33 410 00 820 00 1 640 00 440 00 880 00 1 760 00 470 33 940 67 1 881 33 501 00 1 002 00 2 004 00 532 00 1 064 00 2 128 00 563 33 1 126 67 2 253 33 595 00 1 190 00 2 380 00 627 00 1 254 00 2 508 00 659 33 1 318 67 2 637 33 692 00 1 384 00 2 768 00 725 00 1 450 00 2 900 00 758 33 1
7. In the MKY46 Station Addresses SAs must be set to the 85 0 SA5 pins by combining High or Low levels that the user inputs and owns one Memory Block MB corresponding to the SA 3 1 Internal Configuration of MKY46 The 46 has 32 bit internal input pins 1310 to Di31 and 32 bit internal output pins DoO to Do31 as well as a CUnet IC core The 32 bit internal input pins DiO to Di31 and 32 bit internal output pins Do0 to Do31 are connected to general purpose external I O pins 100 to 1031 using a multi selector Fig 3 1 INVO to INV7 STB2 46 CUnet IC core Input update strobe Signal at lead point of packet sending Packet sending data Bits 32 to 63 Gaal Each setting pin status 32 bit internal input pins DiO Di31 Packet sending data Bits 0 to 31 Receive data 64 bits for memory block MB 2 Selection between upper and lower bits Bit 32 to63 O Bit 0 to 31 Beginning of cycle time Receive strobe 8 9 Receive data 6 bits for memory block MB gt 2 Matching 3 32 bit internal output pins DoO to Do31 5 2 CLRH CLRL 5 0 to SA5 DOHL 1080 to 1082 HOSWAP DOSAO0 to 00 5 STB1 HRST Fig 3 1 Internal Configuration of MKY46 STECHNICA CO LTD 46 User s Manual 3 2 Sending of Internal Input Pin Data The MKY46 sends data of
8. Setting byT0S0 f0 1952 The lo pin is set to input at High HOSWAP Internal output pins DoO to Do31 INVO to INV7 5 00 to 1031 pins Internal input pins DiO to Di31 V Fig 3 2 Internal Configuration of Multi selector for One lo Pin IOSO to IOS2 are input pins that select general purpose external I O pins 100 to 1031 as input and put IOSWAP is an input pin that reverses input and output determined by IOSO to 1052 Table 3 2 indi cates the input and output selection by IOSO to IOS2 and IOS WAP INVO to INV7 are input pins that set the relationship between internal logic and the logic of general purpose external I O pin 100 to Io31 levels For example when the INVO pin is Low internal logic 1 correspond ing to the 100 to 103 pins is the pin High level and internal logic 0 is the pin Low level When the INVO pin is High internal logic 1 corresponding to the 100 to Io3 pins is the pin Low level and internal logic 0 is the pin High level Table 3 1 lists the general purpose external I O pins 100 to 1031 corresponding to INVO to INV7 Table 3 1 General purpose External I O Pins Corresponding to INVO to INV7 INV Pin Name Corresponding general purpose external pin 100 to 103 104 0 107 108 10 1011 1012 10 1015 1016 10 1019 1020 to 1023 1024 10 1027 1028 10 1031 S TECHNICA Co LTD 46 User s Manual Table 3 2 Input Output a
9. TXE RZ 1 RZ RZ 0 RZ 0 RZ 1 TBPS TBPS RZ 1 RZ RZ 0 RZ 0 RZ 1 RXD gt TRNW TRNW TRWW TRww Passage of time Baud rate Short pulse width of sending signal 12 Mbps 83 33 5 ns TBPS 6 Mbps 166 67 5 ns 3 Mbps 333 33 5 ns Short pulse width of input signal 0 51 x TBPS 1 0 x TBPS 1 49 x TBPS Allowable pulse width as RZ signal Long pulse width of input signal 1 51 x TBPS 2 0 x TBPS 2 49 x TBPS 5 2 3 Transfer Timing when External Clock EXC Used Allowable pulse width as RZ signal TEXC External baud rate clock period width 4 TXI ns TEXCH External baud rate clock High level width 1 5 x TXI eem ns TEXCL External baud rate clock Low level width 1 5 x TXI ns TEXCL DTECHNICA CO LTD 46 User s Manual 5 2 4 Output Timing of ZCYCT m gt ma 5 2 5 STB1 STB2 and Data IO Pin Timing Passage of time Tsiw STB1 Tso 100 1031 output Ts2w STB2 1 100 1031 input 5 1 High level width 1 8 x TBPS TXI 2 x TBPS TXI 2 2 x TBPS TXI STB1 Data output hold 15 25 Data transition period 10 STB2 High level width 1 8 TBPS 2 5 2 2 5 Data in
10. eese eiii 4 8 MKY46 User s Manual 4 8 Selection of Data Output to Internal Output Pins DOSAO to 00 5 DOHL 4 9 49 Input Output Setting of General purpose External I O Pins 1050151052 SIOSBWADP 4 10 4 10 Logic Setting of General purpose External I O Pins INVO to INV7 4 11 4 11 Connection of General purpose External I O 4 12 4 12 Use of Timing Notification Signals STB1 2 4 12 4 13 Use of Signal for Notifying Output Availability of General purpose External I O Pins DOA eene 4 12 4 14 Indicating Output Availability of General purpose External I O Pins DONA 4 13 4 15 Clearing Output Level of General purpose External I O Pins CLRH CLRL 4 13 4 16 Clearing Output by Watchdog 4 14 4 17 Indicating Input Data Sending Status of General purpose External I O Pins 4 14 4 18 Notifying Start Timing of Cycle 4 15 4 19 Notifying Reception of PING Instruction PING eese 4 15 4 20 Schematic Connection Diagram 4 16 4 21 Configuration U
11. pins 29 to 36 42 to 49 53 to 60 64 to 71 by a combination of High or Low levels to be input to the IOSWAP pin pin 27 and IOSO to IOS2 pin 21 to 23 Figs 4 7 3 1 3 2 and Table 3 2 Short circuit status Low High when set open Setting by jumper pin etc 274 Input and output change as the setting is changed even when the 46 is operating Caution Fig 4 7 Input Output Setting Example of General purpose External I O Pins Usually set the IOSWAP pin to High Set it Low only when configuring a specific I O station as described in 4 21 Configuration Using Only 1 Stations If the setting of the IOSWAP pin and the IOSO to 1052 pins is changed when the MKY46 is operating the input and output of general purpose external I O pins IoO to Io31 changes In this case the input output transition time of the general purpose external I O pins 100 to 1031 during operation varies according to the connection environments such as load capacity The output level depends on the operating state Therefore StepTech nica recommends not changing the setting of the IOS WAP pin IOSO to IOS2 pins dur ing operation When intentionally changing the setting of the IOSWAP pin and IOSO to IOS2 pins dur ing operation take care not to bring problems such as input output transition of general purpose external I O pins and electrical collision and interference between output pins
12. 071 33 816 00 1 632 00 3 264 00 864 50 1 729 00 3 458 00 913 33 1 826 67 3 653 33 962 50 1 925 00 3 850 00 1 012 00 2 024 00 4 048 00 1 061 83 2 123 67 4 247 33 1 112 00 2 224 00 4 448 00 1 162 50 2 325 00 4 650 00 1 213 33 2 426 67 4 853 33 1 264 50 2 529 00 5 058 00 1 316 00 2 632 00 5 264 00 1 367 83 2 735 67 5 471 33 1 420 00 2 840 00 5 680 00 1 472 50 2 945 00 5 890 00 1 525 33 3 050 67 6 101 33 1 578 50 3 157 00 6 314 00 1 632 00 3 264 00 6 528 00 1 685 83 3 371 67 6 743 33 1 740 00 3 480 00 6 960 00 1 794 50 3 589 00 7 178 00 1 849 33 3 698 67 7 397 33 1 904 50 3 809 00 7 618 00 1 960 00 3 920 00 7 840 00 2 015 83 4 031 67 8 063 33 2 072 00 4 144 00 8 288 00 2 128 50 4 257 00 8 514 00 2 185 33 4 370 67 8 741 33 2 242 50 4 485 00 8 970 00 2 300 00 4 600 00 9 200 00 2 357 83 4 715 67 9 431 33 2 416 00 4 832 00 9 664 00 2 474 50 4 949 00 9 898 00 2 533 33 5 066 67 10 133 33 2 592 50 5 185 00 10 370 00 2 652 00 5 304 00 10 608 00 2 711 83 5 423 67 10 847 33 2 772 00 5 544 00 11 088 00 2 832 50 5 665 00 11 330 00 2 893 33 5 786 67 11 573 33 2 954 50 5 909 00 11 818 00 3 016 00 6 032 00 12 064 00 3 077 83 6 155 67 12 311 33 3 140 00 6 280 00 12 560 00 3 202 50 6 405 00 12 810 00 3 265 33 6 530 67 13 061 33 3 328 50 6 657 00 13 314 00 3 392 00 6 784 00 13 568 00 3 455 83 6 911 67 13 823 33 3 520 00 7 040 00 14 080 00
13. 1 and 3 2 described in 3 8 Cycle Time of CUnet Table 4 3 Table 4 3 Frame option set Cycle Time with FS 63 Baud rate Cycle time 12 Mbps 3 520 ms 6 Mbps 7 040 ms 3 Mbps 14 080 ms cated in Appendix 1 Cycle Time Table Caution To cancel the frame option for the system the hardware reset needs to be activated for all CUnet ICs in the system In this case keep the LFS pin of an station High STECHNICA CO LTD 46 User s Manual Chapter 5 Ratings This chapter describes the ratings of the 46 5 1 5 2 5 3 5 4 5 5 Electrical Ratings 5 3 AC Characteristics uaa sur E exp sn CE 5 4 Package carac 5 7 Recommended Soldering Conditions 5 8 Recommended Reflow Conditions 5 8 Chapter 5 Ratings S Tic HNICA CO LTD Chapter 5 Ratings This chapter describes the ratings of the MKY46 5 1 Electrical Ratings Table 5 1 lists the absolute maximum ratings of the MK Y46 Table 5 1 Absolute Maximum Ratings Parameter Power supply voltage 0 5 to 6 5 Input voltage i Vss 0 5 to VDD 0 5 Output voltage Vss 0 5 to VDD 0 5 Peak output current Type E pin Peak 4 Peak output current Type F G pin Peak 8 Allowable power
14. 104 SA3 105 5 4 106 SA5 107 DOSAO VDD DOSA1 GND DOSA2 GND DOSA3 GND DOSA4 STB2 DOSA5 108 109 1010 1011 1012 0 1013 51 1014 1015 8 1 1 ojo ojojoj m njo 0 10101010101010 DID www w wj QO 0 VDD STECHNICA CO LTD 46 User s Manual Figure 2 2 shows the electrical characteristics of the MKY46 pins Level input VIH min TTL Level input VIL max 50 kQ pull up 2 2 VIL max 0 76 max 100 Rpu typ 50 250 Type D TTL Level input Schmitt trigger Vt max Vt min min max max VOH min VOL max IOL VOH IOH 100 uA VDD 0 2 VOH IOH 8 mA min 3 7 VOL IOL 100 uA max 0 2 22 VOL IOL 8 0 44 VIL 0 76 max 8 100 IOL max 8 max 100 VOH IOH 100 uA 0 2 VOH IOH 8 mA min 3 7 VOL IOL 100 uA max 0 2 VOL IOL 8 mA max 0 44 max 8 46 has no Type A pin IOL max 8 17 max 100 Fi
15. 516 67 3 033 33 792 00 1 584 00 3 168 00 826 00 1 652 00 3 304 00 860 33 1 720 67 3 441 33 895 00 1 790 00 3 580 00 930 00 1 860 00 3 720 00 965 33 1 930 67 3 861 33 1 001 00 2 002 00 4 004 00 1 037 00 2 074 00 4 148 00 1 073 33 2 146 67 4 293 33 1 110 00 2 220 00 4 440 00 1 147 00 2 294 00 4 588 00 1 184 33 2 368 67 4 737 33 1 222 00 2 444 00 4 888 00 1 260 00 2 520 00 5 040 00 1 298 33 2 596 67 5 193 33 1 337 00 2 674 00 5 348 00 1 376 00 2 752 00 5 504 00 1 415 33 2 830 67 5 661 33 1 455 00 2 910 00 5 820 00 1 495 00 2 990 00 5 980 00 1 535 33 3 070 67 6 141 33 1 576 00 3 152 00 6 304 00 1 617 00 3 234 00 6 468 00 1 658 33 3 316 67 6 633 33 1 700 00 3 400 00 6 800 00 1 742 00 3 484 00 6 968 00 1 784 33 3 568 67 7 137 33 1 827 00 3 654 00 7 308 00 1 870 00 3 740 00 7 480 00 1 913 33 3 826 67 7 653 33 1 957 00 3 914 00 7 828 00 2 001 00 4 002 00 8 004 00 2 045 33 4 090 67 8 181 33 2 090 00 4 180 00 8 360 00 2 135 00 4 270 00 8 540 00 2 180 33 4 360 67 8 721 33 2 226 00 4 452 00 8 904 00 2 272 00 4 544 00 9 088 00 2 318 33 4 636 67 9 273 33 2 365 00 4 730 00 9 460 00 unit us 12 Mbps 6 Mbps 3 Mbps 172 00 344 00 688 00 215 83 431 67 863 33 260 00 520 00 1 040 00 304 50 609 00 1 218 00 349 33 698 67 1 397 33 394 50 789 00 1 578 00 440 00 880 00 1 760 00 485 83 971 67 1 943 33 532 00 1 064 00 2 128 00 578 50 1 157 00 2 314 00 625 33 1 250 67 2 501 33 672 50 1 345 00 2 690 00 720 00 1 440 00 2 880 00 767 83 1 535 67 3
16. O station as the time up time of a watchdog timer 4 17 Indicating Input Data Sending Status of General purpose External I O Pins The MKY46 has the MONitor pin pin 92 as a pin that outputs a signal indicating the status of a link established with other CUnet stations The MON pin changes to a Low level when one or more CUnet stations with which a link is consecutively established more than three times and then to a High level when a link is not consecutively established with any CUnet station more than three times If the MKY46 estab lished a link with other CUnet stations input data in general purpose external I O pins set to input is sent correctly to other CUnet stations The user system can use the pin to recognize that data in the pins set to input of the general pur pose external pins is sent to other CUnet stations when the output of pin is Low The MON pin can be connected to the LED cathode pin to light an LED This pin is capable of driving a current 46 of 8 mA Any LED which can be lit at a current of 8 510 O approx 8 mA mA or less can be connected as shown in Figure 4 11 5 0 V where the LED lights at a Low level The user system s hardware designer needs to determine the value of a cur rent limiting resistor R in Figure 4 11 in accordance with the LED part ratings A green LED part indicating operational stability should be connected to the
17. Timer 40 4 14 Indicating Input Data Sending Status of General purpose External I O Pins AMON 4 14 Notifying Start Timing of Cycle Pin 4 15 Notifying Reception of PING Instruction PING 4 15 Schematic Connection Diagram 4 16 Configuration Using Only Stations ess 4 17 Chapter 4 Connecting 46 ST ECHNICA CO LTD Chapter 4 Connecting MKY46 This chapter describes the connection of the MKY46 For a better understanding of this chapter read CUnet Introduction Guide and Chapter 1 MKY46 Role and Features and Chapter 3 Opera tion of MKY46 of this manual In the MKY46 connect the VDD pins pins 26 37 50 61 76 100 to a 5 0 V power supply the GND pins pins 1 25 38 39 40 51 62 72 73 74 75 to a 0 V power supply Connect 10 V 0 1 104 or higher capacitor between the adjacent VDD and GND pins Leave the NC No Connect pins pins 3 to 5 open because they are non functional output pins Pins 2 6 63 94 and 98 are also the NC pins They are not connected into the internal circuit 4 1 Supplying Generated Driving Clock An external clock oscillator generated can be supplied directly to the MKY46
18. between power pins less than 0 05 77 List of IO pin definitions IOSWAP Hi IOSWAP Lo Input and output pins Input and output pins No of pins input pin Output pin inputpin Outputpin vo lo 0 to 31 Unavailable 32 0 Unavailable lo 0 to 31 0 32 lo 0 to 27 lo28 to 31 28 4 i 1028 to 31 lo 0 to 27 4 28 1001023 1024 to 31 24 8 i 1024 to 31 1001023 8 24 lo0to 19 lo20 to 31 i i 1020 to 31 loOto 19 lo0to 15 lo16 to 31 i 1016 to 31 1001015 lo0to 11 lo12 to 31 10121031 10011 100107 lo 8 to 31 8 24 i i lo 8 to 31 lo 0 to7 24 8 Unavailable lo 0 to 31 0 32 i i i lo 0 to 31 Unavailable 32 0 IOSWAP input output inversion setting pins are usually used at a High level in a system consisting of the I O station alone the IOSWAP pins may be used at a Low level Fig 4 12 Pin Setting and Connection Concept Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 21 Configuration Using Only I O Stations A CUnet system can be configured only by I O stations without CUnet stations other than the I O station e g an MEM mode MKY40 mounted station Figs 4 13 and 4 14 In this case set the ZDOHL pin of the MKY46 mounted on each I O station to High Network Network cable Network I F Network I F Network I F Network I F General purpose external I O pins 1 station station station station General purpose exter
19. dissipation 681 Operating temperature 40 to 85 Storage temperature 65 to 150 For the Type E and Type G pins refer to Figure 2 2 Pin Electrical Characteristics in 1 Circuit Types in MKY46 Table 5 2 lists the electrical ratings of the MKY46 Table 5 2 Electrical Ratings Ta 25 Vss 0 V Parameter Symbol Conditions Min Typ Max Unit Operating power supply voltage Vi VDD or Vss Operating currant Xi 50 MHz output open External input frequency Input to Xi pin Input pin capacitance Output pin capacitance 1 MHz 25 pin capacitance Rise fall time of input signal Rise fall time of input signal Schmidt trigger input S TECHNICA Co LTD MKY46 User s Manual 5 2 AC Characteristics Table 5 3 lists the measurement conditions for AC characteristics of the MKY46 Table 5 3 AC Characteristics Measurement Conditions Output load capacitance Power supply voltage Temperature 5 2 1 Clock and Reset Timing RST Xi Passage of time TxiL TRST Xi RST 4 5V VDD Clock period width Clock High level width Clock Low level width Reset enable Low level width 10 x TXI S TECHNICA Co LTD Chapter 5 Ratings 5 2 2 Baud Rate Timing TXE TXD RXD
20. not output from the STB1 pin and data in internal output pins Do0 to Do31 is not updated In this case as compared with the standard features of an I O station the I O station operates as follows 1 The pin changes to a Low level 2 The DOA pin remains Low and the DONA pin High 3 The STBI pin remains Low does not output pulses 4 The STB2 pin outputs periodically pulses synchronized with a cycle STECHNICA CO LTD 46 User s Manual 3 7 2 Operation in CALL Phase The CALL phase is a state in which CUnet is waiting to be connected Only one I O station connected to a network is started When the 46 is in the CALL phase packets are sent to send the setting state of and data in internal input pins DiO to Di31 to a network No data in internal output pins Do0 to Do31 is obtained from a net work In this case as compared with the standard features of an I O station the I O station operates as follows 1 The MON pin remains High 2 The DOA pin remains Low and the DONA pin High 3 The STBI pin remains Low does not output pulses 4 The STB2 outputs periodically pulses synchronized with a cycle The CALL phase is continued until packets can be sent and received to and from other CUnet stations When other CUnet stations are ready to send and receive packets after a network is started the MKY46 changes to the RUN phase 3 7 8 Operation in BREAK Phase The BREAK phase is the state
21. s Manual Preface This manual describes the MKY46 or a kind of CUnet I O IC Be sure to read CUnet Introduction Guide before understanding this manual and the MKY46 Target Readers This manual is for Those who first build a CUnet Those who first use StepTechnica s various ICs to build a CUnet Prerequisites This manual assumes that you are familiar with Network technology e Semiconductor products especially microcontrollers and memory Related Manuals e CUnet Introduction Guide CUnet Technical Guide Caution To users with CUnet User s Manual released before March 2001 Some terms in this manual have been changed to conform to International Standards Some terms in this manual are different from those used on our website and in our product bro chures The brochure uses ordinary terms to help many people in various industries understand our products Please understand technical information on HLS Family and CUnet Family based on technical documents manuals This manual has been prepared based on Standard English meeting the requirements of the International Organization for Standardization ISO and the American National Standards Institute ANSI This English manual is consistent with the Japanese document STD CU46 V1 3J Standard English is a trademark of Win Corporation ii STECHNICA CO LTD 46 User s Manual ECHNICA CO L
22. time If data is updated within a given time this pin is kept High When a hardware reset is activated this pin is kept Low Positive Input pin to force 1016 to 1031 pins set to output by setting of 1050 to 1052 pins to specific level When the input of this pin is Low the last stage latch of lo16 to 1031 pins set to output is cleared to 0 The 1016 to 1031 pins output High or Low according to the setting of the INV4 to INV7 pins Negative Input pin to force 100 to 1015 pins set to output by setting of 1050 to 1052 pins to specific level When the input of this pin is Low the last stage latch of 100 to 1015 pins set to output is cleared to 0 The 100 to 1015 pins output High or Low according to the setting of INVO to INV3 pins Negative Input pin to set to frame option Usually fix this pin at High Fix this pin at Low only when con structing a CUnet just using stations and setting the MKY46 to a long frame LF Negative Input pin to set whether to select upper bits bits 32 to 63 or lower bits bits 0 to 31 of Memory Blocks MBs selected by DOSAO to DOSAS pins for data to be output to 100 to 1031 pins set to output by setting of IOSO to 1052 pins The lower bits are selected when this pin is High and the upper bits are selected when the pin is Low Negative Input pins to reverse internal logic and pin levels of 100 to 1031 pins 13 to 20 Positive Whe
23. to output of the general purpose external I O pins 100 to 1031 are cleared depends on the setting state of a multi selector Figs 3 1 and 3 2 Tables 3 1 and 3 2 Fix the CLRH pin at High when not used Fix the CLRL pin at High when not used i Inputting a Low level to the CLRH pin and CLRL pin for a time shorter than 2 x Tx time is ignored to prevent malfunction due to noise When a hardware reset is activated the output level of general purpose external I O pins 100 to 1031 is cleared in preference to the above CLRH pin and CLRL pin Fig 3 1 STECHNICA CO LTD 46 User s Manual 4 16 Clearing Output by Watchdog Timer 2 5 As shown in Figure 4 10 if output data in internal output pins Do0 to Do31 is not updated within 16 cycle times when the output of the DOA is connected to the CLRH pin or CLRL pin a watchdog timer which forcibly set the internal output pins DoO to Do31 Low can be constituted the output level of the general purpose external I O pins 100 to Io31 set to output is specified This connection is effective for an I O station when the output level of general purpose external I O pins 100 to 1031 set to output must be specified when a link is cut off in the user system Fig 4 10 Example of Clearing Output by Watchdog Caution Figure 4 10 is a reference diagram Determine whether 16 cycle times are suitable for an I
24. where no access to a cycle is allowed Because packets are not sent to other CUnet stations connected to a network the setting state of and data in internal input pins DiO to Di31 are not sent to the network When CUnet stations at station addresses matching the setting of DOSAO to DOSAS pins operate on a network pulse are output from the 5 pin and data in internal output pins DoO to Do31 is updated In this case as compared with the standard features of an I O station the I O station operates as follows 1 The pin remains High 2 The DOA pin changes to a High level and the DONA pin to a Low level 3 The STBI pin outputs periodically pulses synchronized with a cycle 4 The STB2 pin remains Low does not output pulses If CUnet stations at station addresses matching the setting of FDOSAO to DOSAS pins do not operate on a network or are not connected to a network pulses are not output from the STB1 pin and data in internal out put pins DoO to Do31 is not updated In this case as compared with the standard features of an I O station the I O station operates as follows 1 The MON pin remains High 2 The DOA pin remains Low and the DONA pin High 3 The STBI pin remains Low does not output pulses 4 The STBI pin remains Low does not output pulses The BREAK phase is continued until access to a cycle is allowed by resizing other CUnet stations When access to a cycle is allowed the MKY46 changes t
25. 1 pins set to output by setting of IOSO to IOS2 pins not updated within a given time If data is not updated within a given time this pin keeps output Positive High This pin is the reverse output of the DOA pin It outputs a Low level when the DOA pin High and a High level when the DOA pin is Low When a hardware reset is activated this pin 18 kept High Clock input pin that is used as baud rate depends on external clock baud rate is 1 4 of the supply frequency up to 12 5 MHz Fix this pin at High or Low when it is not used Positive Continue STECHNICA CO LTD 46 User s Manual Table 2 1 Pin Functions of MKY46 Continued Input pin to set baud rates When a hardware reset is activated the MKY46 writes the status of this pin into the internal circuit Pin for connection of generated clock 26 37 50 61 Power pins for 5 0 V supply 76 100 1 25 38 40 51 62 7210 75 Power pins connected to 2 6 63 Non functional unconnected pins 94 98 Not connected into the internal circuit Non functional output pins Leave these output pins open Note Pins prefixed with are negative logic active Low Chapter 2 46 Hardware ST ECHNICA CO LTD Table 2 2 shows the electrical ratings of the MK Y46 Table 2 2 Electrical Ratings of MKY46 4 Negative logic VDD VDD HOSWAP RXD STB1 TXE 100 TXD lo1 5 0 102 5 1 103 SA2
26. 3 V Vss 0 5 to VDD 0 5 V These tables show differences between MKY46 and 40 in IO mode Output voltage Vss 0 3 to Vpp 0 3 V Vss 0 5 to Vpp 0 5 V The main differences are as follows Peak output current Type E pin Peak 12 mA Peak 4 mA 1 Xo pin does not exist in the MKY46 Supply Peak output current Type F pin Peak 24 mA Peak 8 mA a clock to Xi pin externally Peak output current Type G pin Peak 12 6 mA Peak 8 mA 2 pin that notifies the start timing of a Allowable power dissipation 570 mW 681 mW cycle was added Storage temperature 55 to 150 65 to 150 3 Allowable output currents of lo0 to 1031 pins were increased 2 y Electrical Ratings MKY40 IO mode MKY46 4 Power consumption was reduced Operating current max 130 mA max 40 mA Pin capacitance typ 7 pF max 15 pF typ 10 pF Rise fall time of input signal 100 ns 20 ns Schmitt 50 ms 30 us Dimensions Electrical Characteristics of Pins 40 IO mode MKY46 MKY40 MKY46 TTL Level input VIH min 2 4 V VIH min 2 2 V Type B G Vil max max 0 76 V TTL Level input Vt max 2 4 V Vt max 2 2 V Schmitt trigger Vt min 0 6 V Vt min 0 76 V Pin Functions Type D AVt min 0 4 V AVt min 0 2 V TTL Level output VOH min 4 4 V VOH min 3 7 V 40 IO mode MKY46 Type G VOL max 0 4 VOL max 0 44 V Pin No 2 MODE Hi level input C Internally unconnected TTL Output current max 2 mA
27. 4 to 1031 641071 INV7 pins Positive or negative logic depends on the setting of the INVO to Output pin to notify when to internally write data in 100 to 1031 pins set to input by setting of IOSO to 1052 pins This pin usually outputs a Low level and a High level for a prede termined time when writing data internally Positive Output pin to notify timing that outputs Low level for a given Negative ius time at the beginning of cycle time Input pin to input packets Positive ONCE a Connect this pin to the receiver output pin Output pin to output High level during outputting packets to be Positive sent Connect this pin to the enable input pin of a driver Output pin to output packets to be sent TXD Positi is pi ive i i i pons Connect this pin to the drive input pin of a driver Input pin to set station addresses SAs 80 to 85 Negative When a hardware reset is activated the MKY46 writes the inverted state of this pin into the internal circuit 5 0 to SA5 Input pins to select Memory Block MB to output to 100 to 1031 FDOSAO to Negative pins set to output by setting of IOSO to IOS2 pins DOSA5 Set the MB numbers as 6 bit negative logic binary values 3FH to OOH Output pin for lighting LED to output Low level while stable link Neaati 5 5 gu with other CUnet stations is established Output pin to notify that data in 100 to 103
28. 6 Table 3 3 Data Structure of Owned Memory Block 3 8 Table 4 1 Network Cable 4 7 Table 4 2 Cycle Time with FS 63 00 4 18 Table 4 3 Frame option set Cycle Time with FS 63 4 19 Table 5 1 Absolute Maximum 0 5 5 3 Table 5 2 Electrical 6 niu d isa 5 3 Table 5 3 AC Characteristics Measurement Conditions 5 4 viii Chapter 1 46 Role and Features This chapter describes the role and features of the MKY46 in CUnet 1 1 Station in MKY46 I O Station sess 1 3 1 2 Response Speed and Quality of I O Signals 1 4 1 3 Features 4 1 4 Chapter 1 46 Role and Features Chapter 1 MKY46 Role and Features This chapter describes the role and features of the 46 in the CUnet TEP S TECHNICA Co LTD The MK Y46 is a CUnet dedicated I O IC with the CUnet protocol based on fu
29. C EXC BPSO BPS1 N C X VDD TE 5 MKY46 PING DOA CLRH CLRL LFS DOHL Note Pins prefixed with are negative logic active Low Fig 2 1 MKY46 Pin Assignment VDD 1015 1014 1013 1012 1011 1010 109 108 5 2 GND GND GND VDD lo7 lo6 lo5 lo4 lo3 lo2 lo1 100 STB1 IOSWAP VDD N C No connect STECHNICA CO LTD 46 User s Manual Table 2 1 lists the pin functions of the MKY46 Table 2 1 Pin Functions of MKY46 Output pin with PING function that goes High when PING instruction received from other CUnet stations If a hardware reset is activated this pin 18 kept Low in preference to the PING instruction from other CUnet stations Positive Output pin to notify that data in 100 to 1031 pins set to output by setting of IOSO to IOS2 pins updated within a given
30. Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 10 Logic Setting of General purpose External I O Pins INVO to INV7 Set the logic of the 32 general purpose external 1 pins 100 to 1031 by a combination of High or Low lev els to be input to the INVO to INV7 pins pins 13 to 20 Figs 4 8 3 1 3 2 Tables 3 1 3 2 4 Setting by jumper etc MKY46 e Short circuit status High e Logic inversion active when set short e e e e 777 Operation follows setting changes even when 46 operating 2 Fig 4 8 Example of Logic Setting of General purpose External Pins Caution If the setting of the INVO to INV7 pins is changed when the MKY46 is operating the logic of general purpose external I O pins 100 to 1031 changes In this case the logic transition time of the general purpose external I O pins 100 0 1031 during operation varies accord ing to the connection environments such as load capacity The output level depends on the operating state Therefore StepTechnica recommends not changing the setting of the INVO to INV7 pins during operation When intentionally changing the setting of the INVO to INV7 pins during operation take care not to bring problems STECHNICA CO LTD 46 User s Manual 4 11 Connection of General purpose External I O Pins Connect signals that a user circuit requires to general purpose ext
31. Must be kept Low for 10 or more clock periods less than 1 clock ES 2 Fig 4 2 Hardware Reset Caution Design the circuit so that a hardware reset is surely activated immediately after MKY46 power on Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 3 Connecting Network Interface The network interface network I F pins of the MKY46 consist of RXD pin 77 78 and TXD pin 79 4 3 1 Recommended Network Connection Figure 4 3 shows the recommended network connection The TRX driver receiver components consists of an RS 485 based driver receiver and a pulse transformer Recommended network cables include Ethernet LAN cable 10BASE T Category 3 or higher and shielded network cables Use one twisted pair cable in the network cable 7 46 Equivalent to ADM1485 ES N One twisted pair cables with impedance of 100 Q Pulse transformer Connect a 100 O termination resistor to the end of the network cables Connecting the resistor before or after the pulse transformer has the same effect Fig 4 3 Recommended Network Connection Referenda Depending on the TRX configuration in half duplex mode signals output from the TXD pin may be output directly to pin while the 46 transmits packets However the MKY46 is designed not to receive any packet transmitted by itself while the TXE pin is High so there is no problem Background information to hel
32. T phase when a network is started An station is used just as an input output equipment Which phase the MKY46 is in is e t not indicated for the user system 3 7 1 Operation in RUN Phase The RUN phase is a normal operating state of a CUnet A link with other CUnet stations connected to a net work is performed constantly Regarding the state where a link defined in the CUnet protocol is consecutively established three or more times as a link with other CUnet stations being stable the MKY46 outputs Low level to the MON pin When the MKY46 is in the RUN phase packets are periodically sent to send the setting state of and data in internal input pins DiO to Di31 to a network after the MON pin changes to a Low level When CUnet stations at station addresses matching the setting of DOSAO to DOS A5 pins exist among the other linked CUnet stations the MKY46 outputs pulses from the STB1 pin and updates data in internal out put pins DoO to Do31 In this case the standard state of an I O station has the following features 1 The MON pin changes to a Low level 2 The DOA pin changes to a High level and the DONA pin changes to a Low level 3 The STBI pin outputs periodically pulses synchronized with a cycle 4 The STB2 pin outputs periodically pulses synchronized with a cycle If CUnet stations at station addresses matching the setting of FDOSAO to DOSAS pins are not started or not connected to a network pulses are
33. TD MK Y46 User s Manual T CONTENTS Chapter 1 46 Role and Features 1 1 Station MKY46 I O 1 3 1 2 Response Speed and Quality of I O 1 4 1 3 Features or MKYA4O 1 4 Chapter 2 46 Hardware 2 3 Chapter 3 Operation of MKY46 3 1 Internal Configuration of 46 3 3 3 2 Sending of Internal Input Pin 3 4 3 3 Data Updating of Internal Output 3 4 3 4 Operation of General purpose External Pins 100 to 1031 and Multi selector 3 5 3 5 Selection of Data Output to Internal Output Pins eese 3 7 3 6 Data Structure of Owned Memory Block eren 3 8 3 7 Support for Phase Transitlon nere rer reet nere oce tenentes nnns 3 9 3 7 1 Operation in 3 9 3 7 2 Operation in CALL 3 10 3 7 3 Operation in BREAK 3 10 3 7 4 Su
34. Y46 is sent to all other CUnet stations connected to a network This enables all other CUnet stations connected to a network to recognize the pin setting states as well as data in internal input pins DiO to Di31 Table 3 3 Data Structure of Owned Memory Block MB Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0115 Di14 Di13 Di12 Di11 Di10 Di9 Di8 Di7 016 015 014 Di2 Di1 Bit31 Bit30 Bit29 28 Bit27 Bit26 25 Bit24 23 Bit22 Bit21 Bit20 Bit 19 18 17 16 Di31 Bit 47 0130 Bit 46 DOSA5 Di29 Bit 45 DOSA4 Di28 Bit 44 DOSA3 Bit 60 Di27 Bit 43 DOSA2 Bit 59 Di26 Bit 42 DOSA1 Di25 Bit 41 DOSAO Di24 Bit 40 DOHL Bit 56 Di23 Bit 39 Bit 55 INV7 Di22 0121 0120 Bit 36 Bit 52 4 Di19 Bit 35 IOSWAP Bit 51 INV3 Di18 Di17 Di16 Chapter 3 Operation of MKY46 ST ECHNICA CO LTD 3 7 Support for Phase Transition The MK Y46 has START CALL RUN and BREAK phases In the MK Y46 a network is started immediately after a hardware reset is released from being activated the user system needs not start the network When a hardware reset is released from being activated the MK Y46 changes to any of the CALL RUN and BREAK phases after two or three cycle times in the STAR
35. ame option for the system perform an operation to activate a hardware reset for all CUnet ICs in the system Considering the above StepTechnica recommends the frame option be set by the CUnet station other than the I O station MKY40 in MEM mode and the use of the LFS pin 11 be used only in the CUnet sys tem consisting of I O stations only refer to 4 21 Configuration Using Only 1 Stations STECHNICA CO LTD 46 User s Manual 3 9 2 Number of Insertable HUBs In a CUnet network to which the frame option is set up to two HUBs communications cable branching units can be inserted Fig 3 4 When two HUBs are inserted Rt CUnet IC CUnet IC a CUnet station CUnet station CUnet IC CUnet IC CUnet station CUnet station CUnet station CUnet station CUnet IC CUnet IC When three HUBs are inserted CUnet IC CUnet IC CUnet IC CUnet station CUnet station CUnet station CUnet station 4 2 Fig 3 4 Number of Inserted HUBs Chapter 4 Connecting MKY46 This chapter describes the connection of the 46 For a better understanding of this chapter read CUnet Introduction Guide and Chapter 1 MKY46 Role and Fea tures and Chapter 3 Operation of MKY46 of this manual 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 4 10 4 11 4 12 4 13 4 14 4 15 4 16 4 17 4 18 4 19 4 20 4 21 Supplying Generated Driving Clock
36. and used as the driving clock In this case supply MKY46 the driving clock to the Xi pin pin 99 of the MKY46 Fig 4 1 Crystal oscillator The specifications for direct supplying the driving clock exter nally are as follows 1 The upper frequency is 50 MHz and a lower frequency is not provided Usually supply 48 clock 2 Electrical characteristics of the Xi pin VIH min 2 2 V Fig 4 1 Supplying Generated Driving Clock VIL max 0 76 V 3 Connect a clock with a signal rise and fall time of 20 ns or less 4 Connect a clock with a minimum High level or Low level time of 5 ns or more 5 Connect a clock with jitter component of 250 ps or less at input frequency of 25 MHz or more 500 ps or less at input frequency of less than 25 MHz 6 Connect a clock with a frequency accuracy of 500 ppm or better S TECHNICA CO LTD 46 User s Manual 4 2 Hardware Reset When a Low level is input to the RST ReSeT pin 24 the MKY46 is hardware reset If a period in which the Low level signal has been input is less than one clock the signal is ignored to prevent malfunc tion To reset the MKY46 completely the RST pin must be kept Low for 10 or more clock while supply ing a driving clock Fig 4 2 This manual refers to this state as that a hardware reset is activated SN x IN IM I IH IH IH IH IH IH RST No response to
37. atures of MKY46 The MKY46 has the same features as the IO mode of previously released 40 1 Can be connected to up to 64 CUnet stations 2 Occupies one memory block 8 bytes in GM 3 Standard baud rates of 12 6 and 3 Mbps 4 Has 32 general purpose external I O pins that can be selected between input and output every 4 bits and the logic between pin levels and data can be inverted 5 Has various pins for timing output and LED indication that can be easily expanded and applied by user application 6 Can configure CUnet system using only I O stations 7 The CUnet protocol of the MKY46 guarantees that I O data can be treated by general purpose exter nal I O pins without error or garbage Differences Between MKY46 and 40 in IO mode which will help determine if the MK Y46 can be mounted on a board for the 40 in IO mode 2 The MKY46 has no microcontroller so program runaway cannot occur Chapter 2 46 Hardware This chapter describes the MKY46 hardware such as pin assignment pin functions and input output circuit types Chapter 2 46 Hardware S TECHNICA Co LTD Chapter 2 MKY46 Hardware This chapter describes the MK Y46 hardware such as pin assignment pin functions and input output circuit types Figure 2 1 shows the MK Y46 pin assignment VDD RXD TXE TXD 5 0 SA1 SA2 SA3 SA4 SAS DOSAO DOSA1 DOSA2 DOSA3 DOSA4 5 MON DONA N
38. ble branching unit into the CUnet network The CUnet where a HUB communications cable branching unit is inserted into a network provides high degree of flexibility in connecting network cable resulting in expanded user systems for details refer to HUB IC User s Manual as shown below 1 Cables in network can be extended 2 Cables in network can be branched 3 Termination resistors at each CUnet station device can be reduced 4 Star topology possible 5 Easy support for optical fibers The LOF of the CUnet in which the frame option is set and operated is 256 The cycle time gets longer compared to the case where the frame option is not used refer to 3 8 Cycle Time of CUnet 3 9 1 Cautions for Setting of Frame Option The frame option be set using the LFS Long Frame Select pin 11 refer to 4 6 Setting of Frame Option LFS However when setting the frame option note the following 1 The frame option is set to all CUnet stations in the mutual link process with other CUnet stations after network start 2 It is also set automatically in the CUnet station which is later connected turned on to the network operating with the frame option set 3 Therefore when the frame option is set to one or multiple station s connected to a network the CUnet system changes to a CUnet changes to a CUnet which operates in a cycle with a Length Of Frame LOF of 256 4 When canceling the fr
39. e Roselle IL 60172 Telephone 630 440 4075 Facsimile 630 539 4475 e mail info steptechnica us http www steptechnica us Developed and manufactured by Step Technica Co Ltd 757 3 Shimo fujisawa Iruma shi Saitama 358 0011 TEL 04 2964 8804 FAX 04 2964 7653 http www steptechnica com info steptechnica com CUnet CUnet I O IC 46 User s Manual Document No STD CU46 V1 3E Issued April 2009
40. ernal 1 pins 100 to 1031 pins 29 to 36 42 to 49 53 to 60 64 to 71 When connecting signals to the user circuit appropriate levels must be kept refer to Chapter 2 MKY46 Hardware Set unused general purpose external 1 pins to output for open or to input for connection to a pull up or pull down resistor and keep a High or Low level not to leave pins open 4 12 Use of Timing Notification Signals STB1 STB2 The MKY46 outputs an output update strobe signal from the STB1 STroBe 1 pin pin 28 when updating data in general purpose external I O pins 100 to 1031 set to output refer to Fig 3 1 and 3 3 Data Updating of Internal Output Pins The STBI pin is usually kept Low and outputs a High level for 2 x TBPS time at the time of output updating Data in general purpose external pin 0 1031 set to out put is updated during the output of High level pulses from the 5 1 pin refer to 5 2 5 STB1 STB2 and Data IO Pin Timing The 46 outputs an input update strobe signal from the STB2 STroBe 2 pin pin 41 when sampling data in general purpose external I O pins 100 to 1031 set to input refer to Fig 3 1 and 3 2 Sending of Internal Input Pin Data STB2 pin is usually kept Low and outputs a High level for 2 x TBPS time at the time of input updating Data in general purpose external I O pin 100 to 1031 set to input is sam pled during the output of Hi
41. g 2 2 Pin Electrical Characteristics in Circuit Types 46 Chapter 3 Operation of 46 This chapter describes the operation of the 46 For a better understanding of this chapter read CUnet Introduction Guide and Chapter 1 MKY46 Role and Fea tures 3 1 Internal Configuration of 46 3 3 3 2 Sending of Internal Input Pin Data 3 3 4 3 3 Data Updating of Internal Output Pins 3 4 3 4 Operation of General purpose External 1 Pins 100 to 1031 and 3 5 3 5 Selection of Data Output to Internal Output 3 7 3 6 Data Structure of Owned Memory Block 3 8 3 7 Support for Phase Transition 3 9 3 9 Cycle Time of 3 12 3 9 Support for Frame Option for HUBJ 3 13 Chapter 3 Operation of MKY46 ST ECHNICA CO LTD Chapter 3 Operation of MKY46 This chapter describes the operation of the MK Y46 For a better understanding of this chapter read CUnet Introduction Guide and Chapter 1 MKY46 Role and Features
42. gh level pulses from the STB2 pin refer to 5 2 5 STB1 STB2 and Data IO Pin Timing Use the STB1 and STB2 pins when the user system has more external additional circuits Leave these pins open when not used 4 13 Use of Signal for Notifying Output Availability of General purpose External Pins The MKY46 has the DOA Data Out Available pin pin 8 as a pin to output a signal for notifying the out put availability of general purpose external 1 pins The DOA pin changes to a High level when STB1 output update strobe and then to a Low level if STB1 does not generate within 16 cycle times Using the DOA pin enables the user system to recognize that data in pins set to output of the general pur pose external 1 O pins is updated within 16 cycle times when the output of the DOA pin is High Leave this pin open when not used Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 14 Indicating Output Availability of General purpose External 1 O Pins DONA The MKY46 has the DONA Data Out Not Available pin 93 available to indicate the output availabil ity of general purpose external I O pins The DONA pin outputs the inversion level of the DOA pin described in 4 13 Use of Signal for Notifying Output Availability of General purpose External I O Pins DOA Using the DONA pin enables the user system to indicate that data in pins set to output of the general pur pose external 1 O pins i
43. ing Example of 00 0 to 00 5 Pins and DOHL Pin 4 9 Fig 4 7 Input Output Setting Example of General purpose External I O Pins 4 10 Fig 4 8 Example of Logic Setting of General purpose External I O Pins 4 11 Fig 4 9 Example of LED Connection to DONA Pin 4 13 Fig 4 10 Example of Clearing Output by Watchdog 4 14 Fig 4 11 Example of LED Connection to Pin eene 4 14 Fig 4 12 Pin Setting and Connection Conceplt eene 4 16 Fig 4 13 Configured Only by Stations 1 2 2 1 4 17 Fig 4 14 Concept of System Where Multiple I O Signals Can Be Connected with One Network 4 17 Fig 4 15 Concept of Use of FIOSWAP Pin 4 18 vii MKY46 User s Manual Tables Table 2 1 Pin Functions of 46 nnns 2 4 Table 2 2 Electrical Ratings of 46 2 7 Table 3 1 General purpose External Pins Corresponding to INVO to INV7 3 5 Table 3 2 Input Output and Connection of General purpose External I O Pins 3
44. internal input pins Di0 to Di31 to Global Memory GM in other CUnet stations as follows Fig 3 1 1 The MKY46 generates an STB2 input update strobe signal at the lead point of sending packet deter mined by the Station Address SA 2 The MKY46 samples data in internal input pins 1310 to Di31 with the STB2 signal The sampled data is allocated in the lower 32 bits of an owned Memory Block MB 3 The status of each setting pin is embedded in the upper 32 bits of the owned MB 4 The latest data data in 2 and 3 above in the MB owned by the MKY46 15 sent to GM in all CUnet stations in accordance with the CUnet protocol Because the STB2 signal is output to external pins the user can recognize the input sampling time 3 3 Data Updating of Internal Output Pins The MKY46 updates data in MBs owned by other CUnet stations as data in internal output pins Do0 to Do31 as follows Fig 3 1 1 The MKY46 generates a receive strobe signal when receiving packets sent from other CUnet stations to update data in MBs 2 In this case either of the upper 32 bits or the lower 32 bits of receive data 64 bits for update in the received MB is input to two 16 bit latches according to the levels High or Low input to the DOHL pin 3 An MB is selected by the combination of High or Low levels that the user inputs to the 4DOSAO to 00545 pins If a received packet is data in this MB an STB1 output update strobe signal is gen erated fro
45. ll hard wire logic packaged in a 100 pin TQFP using CMOS technology The MKY46 is a CUnet dedicated I O IC CUnet I O IC providing backward compatibility with the IO mode of previously released MK Y40 This manual describes a CUnet station which mounts the MKY46 in the CUnet system as I O station 11 Station in MKY46 I O Station The MK Y46 can connect its general purpose external I O pin signals signals directly to Global Memory GM of the CUnet system by connect ing a network I F to a network Fig 1 1 The CUnet system in Figure 1 2 consists of two MEM stations and two I O stations Each MEM station has a MKY40 MEM mode that can access GM and the user CPU Each station has MKY46 CUnet I O IC In the CUnet system all user CPUs can read the state of input ports of the I O stations from GM User CPUs can also set the state of output ports of the I Network Network General purpose external pins signal circuit O stations used in I O station 2 Fig 1 1 Station 2 Network cable Network Network I F Network I F Network I F Network I F MEM mode 4 User CPU General purpose external I O pins MEM station station General purpose external I O pins station MEM station Fig 1 2 CUnet Connecting Two Modes DTECHNICA CO LTD 46 User s Ma
46. lock Diagram App 4 Appendix 3 Differences between MKY46 and 40 in IO mode App 5 vi 46 User s Manual STE HNICA COD Figures Fig 1 1 A 1 3 Fig 1 2 CUnet Connecting Two 1 3 Fig 2 1 MKY46 Pin Assignment 2 3 Fig 2 2 Pin Electrical Characteristics Circuit Types MKY46 2 8 Fig 3 1 Internal Configuration of 46 3 3 Fig 3 2 Internal Configuration of Multi selector for One lo Pin 3 5 Fig 3 3 Selection of Data Output to Internal Output Pins 3 7 Fig 3 4 Number of Inserted 3 14 Fig 4 1 Supplying Generated Driving 4 3 Fig 4 2 Hardware ds 4 4 Fig 43 Recommended Network Connection 2 2 4 5 Fig 4 4 Setting of Baud Rate 4 6 Fig 4 5 Setting Example of Station Addresses eene 4 8 Fig 4 6 Sett
47. m the receive strobe signal MKY46 drives two 16 bit latches with this STB1 signal to update data in internal output pins Do0 to Do31 4 When the user inputs a Low level to the CLRL pin the lower 16 bits of data in internal output pins Do0 to Do31 can be cleared forcibly to Low level in preference to the 3 above 5 When the user inputs Low level to the CLRH pin the upper 16 bits of data in internal output pins Do0 to Do31 can be cleared forcibly to Low level in preference to 3 above 6 When a hardware reset is activated data in internal output pins DoO to Do31 is cleared forcibly to Low level in preference to 3 above Because the STB1 signal is output to external pins the user can recognize the output updating time 3 46 ST ECHNICA CO LTD 3 4 Operation of General purpose External 1 0 Pins 100 to 1031 and Multi selector The general purpose external I O pins 100 to 1031 are connected to 32 bit internal input pins DiO to Di31 32 bit internal output pin DoO to Do31 using a multi selector Fig 3 1 The multi selector functions by the combination of High or Low levels that the user inputs to the IOSO to 1052 pins the FIOSWAP pin and INVO to INV7 pins Figure 3 2 shows the internal configuration of a selector corresponding to one Io pin The multi selector has 32 selectors with the configuration shown in Figure 3 2
48. max 8 mA Type G IOL max 4mA IOL max 8 Pin No 6 N C Type E output C Internally unconnected Pin No 52 N C Type E output Additional function output Pin No 63 N C Type E output C Internally unconnected Pin No 78 TXE Type E output output Pin No 79 TXD Type E output D Type F output Pin No 94 N C Type F output C Internally unconnected Pull up resistor Type C C MOS Level output VOH min 4 4V min 3 7 V Type E F VOL max 0 4 V VOL max 0 44 V typ 30 typ 50 Pin leakage current Type B D G max 10 100 uA Pin No 98 Xo Oscillating signal output N C Internally unconnected Recommended Soldering Conditions Recommended Reflow Conditions 40 46 Peak temperature Reflow 260 max Pre heat time 60 to 120 s 60 to 80s Pre heat temperature 150 to 180 150 to 190 Peak temperature 350 C max Temperature of the tip of soldering iron Temperature rise rate 2 to 5 C s 1 to 4 C s Peak temperature holding time Temperature of the tip of soldering iron 3 Peak condition time 10 3 10 Peak condition temperature 255 5 255 Cooling rate b 2 to 5 C s to 1 5 C s Cooling rate c to 0 5 C s App 5 B North America Distributor Trans Data Technologies Inc 340 Arthur Av
49. n Table 4 1 Up to 64 CUnet stations can be connected to the CUnet enabling connection of 64 branches This recom mended network is isolated electrically by a pulse transformer and the format of signals propagated through the network is RZ Return to Zero Consequently 64 branches can be connected using a standard RS 485 based driver receiver without using DC component signals In this case the cable length is likely to be shorter than the value in Table 4 1 due to increase of dispersion of propagated signal energy detail refer to 3 9 Support for Frame Option for and User s Manual of HUB IC 2 Caution The network cable length varies depending on the cable quality differential driver receiver components cable connection status and environment Therefore values in Table 4 1 Network Cable Length are only a guide and performance is not guaranteed 4 6 Setting of Frame Option ZLFS The MKY46 has the LFS Long Frame Select pin pin 11 that sets a frame option When not setting the frame option fix the LFS pin at High When the CUnet is started with the LFS pin set to Low the CUnet system is set to the frame option When setting the frame option when setting the LFS pin to Low refer to 3 9 1 Cautions for Setting of Frame Option DTECHNICA CO LTD 46 User s Manual 4 7 Setting Station Addresses The to 5 5 pins are negative logic input
50. n these pins are Low the 100 to Io31 pins at internal logic 1 are High When these pins are High the 100 to 1031 pins at internal logic 0 are High INVO to INV7 Input pins to set 100 to 1031 pins to input or output 21 to 23 Positive 100 to 1031 pins are set to input or output by combining High and Low level inputs to these pins IOSO to 1082 Input pin for MKY46 hardware reset Immediately after power on or when the user intentionally resets hardware keep this pin Low for 10 or more clocks of the fre quency of the Xi pin Usually keep this pin High Negative Continue Chapter 2 46 Hardware ST ECHNICA CO LTD Table 2 1 Pin Functions of MKY46 Continued Input pin to reverse input or output status of 100 to 1031 pins determined by setting of IOSO to IOS2 pins The status is not reversed when this bit is High When this pin is Low the status of 100 to 1031 pins determined by the setting of IOSO to 1052 pins is reversed from input to out put and from output to input HOSWAP Negative Output pin to notify when to update data in 100 to 1031 pins set to output by setting of IOSO to 1052 pins This pin usually outputs a Low level and a High level for a given time at updating data Positive 100 0107 291036 M 32 bit general purpose external I O pins 108 to 1015 421049 Positive lo16 to lo23 53 to 60 Negative 102
51. nal I O pins General purpose external I O pins General purpose external I O pins Fig 4 13 CUnet Configured Only by I O Stations 7 5 32 bit output lOS 7H 01 IOS 7H 02 One network cable DOSA 04H DOSA Don t Care NA Fig 4 14 Concept of System Where Multiple I O Signals Can Be Connected with One Network Cable STECHNICA CO LTD 46 User s Manual 4 21 1 Cycle Time Only for I O Station Final Station FS values are involved in the cycle time of a CUent The initial FS value of the MKY46 by hardware reset is 63 3FH A CUnet cannot be performed resizing by the MKY46 The cycle time of a CUnet configured only by I O stations is a cycle time with FS 63 3FH calculated from Equations 3 1 and 3 2 described in 3 8 Cycle Time of CUnet Table 4 2 Table 4 2 Cycle Time with FS 63 Baud rate Cycle time 12 Mbps 2 365 ms 6 Mbps 4 730 ms 3 Mbps 9 460 ms 4 21 2 Use of IOSWAP Pin The setting of 1050 to 1052 pins should be the same between A By setting the IOSWAP pin of A High and the IOSWAP pin of B Low the pins of B corresponding to input of A can be set to output and the pins of A corresponding to input of B can be set to output Fig 4 15 A B 4 o x Network A 16 bit input gt JP16 bit o
52. nd Connection of General purpose External Pins When HIOSWAP pin is High When IOSWAP pin is Low 223 ji Setting level Lo Lo Lo Lo Hi Hi Hi Hi Lo Lo Hi Hi Lo Lo Hi Hi Lo Hi Lo Hi Lo Hi Lo Hi Input output Input output Dixx in the table indicates input and Doxx indicates output 3 46 S TECHNICA CO LTD 3 5 Selection of Data Output to Internal Output Pins Select data to be output to internal output pins by the DOSAO to DOSAS pins and DOHL pin Figure 3 3 shows the concept of data selected by pin setting When packets from the CUnet station matching the set ting of DOSAO to DOSAS pins are received data in internal output pins is updated refer to 3 3 Data Updating of Internal Output Pins gt Set by DOSAO to DOSA5 Internal output pins nnn Do31 Bits 0 to 31 DESDE 2 When pins set High When DOSAO to DOSAS pins set to 04H 3BH pin Strobe received when packets received from CUnet station matching setting of ZDOSAO to DOSAS pins N Fig 3 3 Selection of Data Output to Internal Output Pins Caution Internal output pi
53. ns Do0 to Do31 are Low until packets are received from the CUnet sta tion matching the setting of the DOSAO to DOSAS pins after hardware reset If the CUnet station matching the setting of the 4DOSAO to DOSAS pins is not connected to a network the output is not updated DTECHNICA CO LTD 46 User s Manual 3 6 Data Structure of Owned Memory Block The following data is embedded in the Memory Block MB owned by the MKY46 set by the SAO to SA5 pins Table 3 3 1 BitsOto 31 Data in internal input pins 1310 to Di31 2 Bits 32 to 34 Setting of 1050 to 1052 pins 3 Bit35 Setting of FIOSWAP pin 4 Bits 36 to 38 Always 0 5 Bit39 Setting of LFS pin 6 Bit40 Setting of FDOHL pin 7 Bits 41 to 46 Setting of DOSAO to DOSAS pins 8 Bit 47 Always 0 9 Bits 48 to 55 Setting of INVO to INV7 pins 10 Bits 56 to 63 Always 0 Bits 0 to 31 where data in internal input pins in 1 above is stored go to 0 if corresponding general pur pose external I O pins 100 to 1031 are not set to input bits set to output Fig 3 2 Items 3 5 6 and 7 above are negative logic input pins Reversed positive logic setting states are embedded in the bits of the MB For example bit 35 goes to 1 when the IOSWAP pin is Low and 0 when the pin is High for this rea son no symbol is shown in Table 3 3 Data in an MB that is owned by the MK
54. nual 1 2 Response Speed and Quality of I O Signals In the case where the CUnet system to which the 46 is connected operates normally a signal connected to the input pin of MKY46 general purpose I O pins is copied to all the CUnet stations at every cycle by the CUnet protocols In addition the state of the output pin of the MKY46 general purpose I O pins is updated at every time when the copied data for each cycle is received from other specified CUnet station Another CUnet station connected to a network can reference and control the I O signal of the 46 gen eral purpose I O pins as a minimum unit of one cycle of the CUnet Therefore the signal response speed of the MK Y46 general purpose I O pins is the same as the cycle time of the CUnet When a network consists of two stations the cycle time of the CUnet is 12045 when 12 Mbps selected Even when it consists of 30 stations the cycle time is within 1 ms when 12 Mbps selected and very fast Also the cycle time of the CUnet can be calculated using an equation and the calculated value is always constant Furthermore data copied between the CUnet stations is strictly controlled and its quality is also assured So the I O signals of the MKY46 general purpose pins can be used as signals to control various equipment or systems Cycle Time of CUnet and Appendix 1 Cycle Time Table in this manual For data quality assurance refer to CUnet Introduction Guide 1 3 Fe
55. o the RUN phase 3 46 ST ECHNICA CO LTD 3 7 4 Support for Resizing The MKY46 cannot perform resizing Resizing can be performed from only the CUnet station other than the I O station MK Y40 in MEM mode However when resizing is performed by the CUnet station other than the I O station the internal Final Station FS values are updated and the MK Y46 is resized 3 7 5 Network Stop and Restart A network consisting of the MKY46 is stopped by the following two cases 1 SNF Station Not Found No link with CUnet stations other than the self station could be estab lished 32 cycle times consecutively 2 OC Out of Cycle Resizing by other CUnet stations caused timing loss to send self station packets at cyclic time sharing If the network is stopped by the above 1 or 2 the MK Y46 is restarted within 8 TBPS time When the network is stopped by 1 SNF Station Not Found the MKY46 enters the START phase and then the CALL phase When the network is stopped by 2 OC Out of Cycle the MK Y46 enters the START phase and then the BREAK phase As mentioned above in the MKY46 the user system needs not start or stop a network An I O station con sisting of the MKY46 is available just by being connected to a network and capable of hot swapping STECHNICA CO LTD 46 User s Manual 3 8 Cycle Time of CUnet The cycle time of a CUnet is determined by Equa
56. other CUnet stations regardless of the status of a self station Usually keep the PING pin Low The PING pin changes to a High level when the PING instruction is received from other CUnet stations and then to a Low level when packets in which the PING instruction for a self I O station is not embedded are received from other CUnet stations When a hardware reset is activated the PING pin changes to a Low level in preference to the above opera tion The CUnet protocol does not specify what to use and where to connect the PING signal The PING signal is an auxiliary expanded function that helps construct user system Leave the PING pin open when not used Caution A PING signal can be generated from only the CUnet station other than I O station such as the MKY40 in MEM mode Therefore the PING signal cannot be generated from the MKY46 40 in IO mode to other station s STECHNICA CO LTD 46 User s Manual 4 20 Schematic Connection Diagram Figure 4 12 shows the pin setting and connection concept of the MKY46 MKY46 Differential driver receiver Network cable 79 b 5 Half duplex Pulse transformer Set input output inversion of 27 general purpose external I O pin Set input output of general EET purpose external pins General purpose external pins Four pins can be set to input or output at a time by 105 e Four pins can be logically
57. p build a network are described in CUnet Technical Guide For more information about how to select components or to get recommended components visit our Web site at www steptechnica com 4 3 2 Details of RXD TXE and TXD Pins The MKY46 receives packets transmitted from another CUnet station at pin and outputs packets transmitted to another CUnet station from the TXD pin During sending a packet a High level is output from the TXE pin When the TXE pin goes High design the TRX so that the enable pin of the TRX driver is activated thereby enabling the serial pattern for a packet output from the TXD pin to be transmitted to the network Fig 4 3 STECHNICA CO LTD 46 User s Manual 4 4 Setting Baud Rate To set the rate of the MKY46 combine High and Low levels to be input to the 0 pin pin 96 and BPS1 pin pin 97 Figure 4 4 shows the levels of the BPSO and 51 pins corresponding to the baud rates When a hardware reset is activated the MKY46 writes these pin settings to the internal circuit When the external baud rate is set its value is 1 4 of the clock frequency supplied to the EXC pin pin 95 For example if the clock frequency supplied to the EXC pin is 5 MHz the baud rate is 1 25 Mbps The maximum clock frequency to the EXC pin is 12 5 MHz when Xi 50 MHz with a duty ratio of 40 to 60 Always fix the EXC pin at High or Low when not inputting any exte
58. pins that are pulled up internally The SAs are given in hexadecimal as 00H to addresses 0 to 63 with a High level input to the 5 0 to SAS pins set to 0 and a Low level set to 1 The most significant bit is SA5 pin 85 Fig 4 5 MKY46 owns the Memory Block MB set by the SA0 to SAS pins When a hardware reset is activated the MK Y46 writes the values of the pins to the internal circuit There fore the Station Addresses SAs are not changed even if the setting of these pins is changed when a hard ware reset is not activated 46 DIP SW etc Because the 5 to 85 5 pins are negative logic input pins ON bits are 1 When a hardware reset is activated the 5 0 to SA5 values are written to the internal circuit Fig 4 5 Setting Example of Station Addresses Caution In the MKY46 an owned area is specified for one Memory Block The same SA values cannot be set to all CUnet ICs connected to one network Duplication of owned areas by expansion setting is prohibited Chapter 4 Connecting 46 4 8 Selection of Data Output to Internal Output Pins FDOSAO to 00 5 DOHL Select a Memory Block MB and the upper lower bits of data to be output to internal output pins DoO to Do31 by a combination of High levels or Low levels to be input to the DOSAO to DOSAS pins pins 86 to 91 and DOHL Data Out High or Lo
59. pport for 2011 3 11 3 7 5 Network Stop and 3 11 38 Cycle Time of CUnet enn 3 12 3 9 Support for Frame Option for 3 13 3 9 1 Cautions for Setting of Frame Option 3 13 3 9 2 Number of Insertable HUBs eese enne 3 14 Chapter 4 Connecting MKY46 41 Supplying Generated Driving Clock eere 4 3 4 2 Hardware pU eZ aida 4 4 4 3 Connecting Network Interface 4 5 4 31 Recommended Network 4 5 4 3 2 Details of TXE and TXD 4 5 44 Setting Balid Rate 4 6 4 5 Network Gable Length nc aes eee et 4 7 46 Setting of Frame Option ZLFS 4 7 4 7 Setting Station Addresses
60. put setup 50 Data input hold 0 Chapter 5 Ratings S Tic HNICA CO LTD 5 3 Package Dimensions 46 100 pins TQFP Unit mm 16 0 202 1 2 max 14 0 0 1 1 0 to 0 15 14 0 0 1 16 0 0 2 INDEX MARK Ui Li LI LI LIU DELE LE 00 000 0000 LE LI LI LI LI LI LI Mirror finish 69 1 0 0 22 0 05 in 1 0 0 2 y to 10 0 6 0 15 47 0 10 SEATING PLANE NCIHBBBBBBBBBHRBBBBHHHBRHHRREZN S TECHNICA Co LTD MKY46 User s Manual 5 4 Recommended Soldering Conditions Parameter Symbol Reflow Manual soldering iron Peak temperature resin surface 255 C max 380 C max Peak temperature holding time 10 6 max 5 8 Caution 1 Product storage conditions 40 max 85 for prevention of moisture absorption 2 Manual soldering Temperature of the tip of soldering iron 380 C 5 s max Device lead temperature 260 C 10 s max package surface temperature 150 C max 3 Reflow Twice max 4 Flux Non chlorine flux should be cleaned sufficiently 5 Ultrasonic cleaning Depending on frequencies and circuit board shapes ultrasonic cleaning may cause resonance affecting lead strength 5 5 Recommended Reflow Conditions Package surface temperature t1
61. rnal clock to the EXC pin 46 Inthis setting the baud rate is 6 Mbps BPS1 y BPS Hi Hi Lo Lo 96 BPSO Hi Lo Hi Lo BPSO B audrate 12 Mbps 6 Mbps 3Mbps 777 95 A clock frequency of four times RE 15 enabled EXC the external baud rate is input in this setting Kept High or Low when not used Frequency 12 5 MHz Xi 50 MHz Duty ratio 40 to 6096 Fig 4 4 Setting of Baud Rate Caution 1 Set the same baud rates to all CUnet devices connected to the network 2 The EXC pin pin 95 is an input pin When not inputting external clocks fix the EXC pin High or Low and NEVER leave it open 3 Our recommended pulse transformers may not support baud rates other than 12 Mbps to 3 Mbps In this case use a pulse transformer matching the baud rate Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 5 Network Cable Length In this manual each connection point of a multi drop network cable is called a branch Table 4 1 indicates the network cable length for the CUnet when using the network described in 4 3 Con necting Network Interface with 32 or less branches Table 4 1 Network Cable Length Network cable length The recommended differential driver receiver is an RS 485 based driver receiver Therefore the branch count 32 stipulated in the RS 485 specification is used as a guide i
62. s updated within 16 cycle times when the output of the DONA pin is Low The DONA can be connected to the LED cathode pin x to light an LED This pin is capable of driving a current 46 of 8mA Any LED which can be lit at a current of 8 mA or less can be connected as shown in Figure 4 9 where the 510 O approx 8 mA 5 0V LED lights at a Low level The user system s hardware designer needs to determine the value of a current limit ing resistor R in Figure 4 9 in accordance with the LED part ratings A green LED part indicating operational sta Fig 4 9 E le of LED C tion to DONA Pi bility should be connected to the DONA pin Leave this E i pin open when not used 4 15 Clearing Output Level of General purpose External Pins CLRH CLRL The MKY46 has the CLRH CLeaR Hi pin pin 9 and CLRL CLeaR Lo pin pin 10 as the input pins to clear the output level of general purpose external I O pins The output level of pins set to output of the upper 16 bits 1016 to 1031 of general purpose external I O pins be cleared by inputting a Low level to the CLRH pin for a time longer than 2 x TXT time Fig 3 1 The output level of pins set to output of the lower 16 bits 100 to 1015 of general purpose external I O pins can be cleared by inputting Low level to the CLRL pin for a time longer than 2 x TXT time Fig 3 1 The level at which pins set
63. sing Only Stations eere 4 17 4 21 1 Cycle Time Only for 5 4 18 4 21 2 Use of HOSWAP Pin erret Sein tinted Sa 4 18 4 21 3 Use of LFS Long Frame Select Pin for 4 19 Chapter 5 Ratings 51 5 ainia 5 3 52 Ghatacterlst os eec reete encased etd desecrate 5 4 5 2 1 Clock and Reset Timing ZRST 5 4 5 2 2 Baud Rate Timing TXD 2 5 5 5 2 3 Transfer Timing when External Clock EXC Used sess 5 5 5 2 4 Output Timing 5 6 5 2 5 STB1 5 2 and Data IO Pin 5 6 5 3 Package DIMCASI NAS Rm 5 7 5 4 Recommended Soldering Conditions 5 8 5 5 Recommended Reflow Conditions eene eene 5 8 Appendix Appendix 1 Cycle Time 1 22 1 14 411 1 App 3 Appendix2 Internal Equivalent B
64. tions 3 1 and 3 2 defined by the CUnet protocol The CUnet cycle time is the response time for memory data sharing Equation 3 1 Frame Time LOF FS 1 x 2x TBPS s Equation 3 2 Cycle Time Frame Time x FS PFC 1 s For example when FS 03H LOF 151 PFC 2 and baud rate 12 Mbps TBPS 1 12 x 106 83 3 ns the frame time and cycle time are calculated as follows Frame Time 151 3 1 x 2x 1 12 x 106 25 833 us Cycle Time 25 833 us x 3 2 1 155 us In a CUnet LOF Length Of Frame is fixed at 151 and PFC Public Frame Count is fixed at 2 When using the frame option described in 3 9 Support for Frame Option for the LOF is fixed at 5256 The initial FS Final Station value in CUnet is 63 The FS value is changed when resizing is formed by the CUnet station other than I O station i The cycle time at each FS value calculated by Equations 3 1 and 3 2 is shown in Appen dix 1 Cycle Time Table For details of resizing refer to CUnet Introduction Guide and another manual of CUnet IC mounted on station other than I O station 3 46 ST ECHNICA CO LTD 3 9 Support for Frame Option for HUB The MKY46 conforms to the frame option defined in the CUnet protocol The frame option causes the Length Of Frame LOF to be 256 This option enables insertion of a HUB communications ca
65. utput 16 bit output 4 amp 16 bit input IOS 4H IOS 4H IOSWAP pin Hi IOSWAP Lo station 1 0 station i Network T i 28 bit input p gt E gt E 28 bit output 4 bit output lt 4 4 bitinput IOS 1H 2 x IOS 1H IOSWAP Lo lt 2 Fig 4 15 Concept of Use of FIOSWAP Pin Caution Input pin of A e g Io0 pin 29 is output pin of B Therefore a user circuit connected to A and B must be different User circuit for only cannot be used for B Chapter 4 Connecting 46 ST ECHNICA CO LTD 4 21 3 Use of LFS Long Frame Select Pin for HUB When inserting a HUB network cable branching unit into the networks shown in Figure 4 13 and Figure 4 14 fix the LFS pin pin 11 of one or more MKY46 at Low If the LFS pin of one or more I O stations connected to a network is set Low all CUnet ICs connected to a network is set to a frame option state by the CUnet protocol The frame option is also set for the I O station which is later connected or powered to the frame option set network in operation The frame option enables the insertion of up to two HUBs network cable branching units into a CUnet network When setting the frame option refer to 3 9 1 Cautions for Setting of Frame Option The cycle time with a length of frame LOF of 256 is a cycle time calculated from Equations 3
66. w pin pin 12 TEP S TECHNICA Co LTD The DOSAO to DOSAS pins are negative logic input pins that are pulled up internally Select an MB using hexadecimal numbers 0 to 63 that use a High level to be input to the DOSAO to DOSAS pins as 0 and a Low level as 1 The most significant bit is DOSAS pin 91 The upper lower bits of the MB are selected by a High or Low level input to the DOHL pin Figs 4 6 3 1 and 3 3 4DOSA5 e DOSA4 Because the DOSAO to DOSAS pins and 4DOSA3 DOHL pin are negative logic input pins ON bits are treated internally as 1 DOSA2 DOSA1 e DOSAO nm e At OFF internally bits O to 31 of the target MB are set to output 177 46 always follows changes DIP SW settings Fig 4 6 Setting Example of ZDOSAO to 5 5 Pins and DOHL Pin Caution The setting states of 1DOSAO to DOSAS pins and DOHL pin can always be changed because there are no rules such as writing to the internal circuit when a hardware reset is activated Therefore take care not to allow pin setting states to change except when inten tionally changing them using the user system S TECHNICA Co LTD MKY46 User s Manual 4 9 Input Output Setting of General purpose External I O Pins 050 to 1052 Set the input and output of 32 general purpose external I O pins 100 1031

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