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1. to suppress it verify Specifies the verification after writing memory is set Enter if it is not to be set Remark The CPU also accesses an area that emulates ROM jread or equivalent Therefore this command is useful for testing the area during downloading Note however that the processing speed slows down reset Specifies whether the RESET pin is to be masked Enter if itis not to be masked stopz Specifies whether the stopz pin is to be masked Enter if it is not to be masked hldrq Specifies whether the hldrq pin is to be masked Enter if it is not to be masked Jnmi 00 01 02 Specifies that pins INTOO to INTOS3 are to be masked Enter if they are not to be masked jtag 12 25 Specifies the JTAG clock 12 5 MHz 25 MHz for N Wire rtrcb 0 25 50 75 Specifies the occupied capacity of the buffer when execution returns from overflow during real time trace Ordinarilly use the initial value of this parameter nrtrcb 12 25 37 50 Specifies the occupied capacity of the buffer when a request to stop the pipeline is made in complete trace mode Ordinarilly use the initial value of this parameter 64m 256m Specifies an address mode of the CPU 64m Specifies the 64M mode 256m Specifies the 256M mode romless singleO single1 Specifies an operation mode of the CPU singleOm Specifies the single mode 0 internal ROM from address 0 single1 Specifies the single mode 1 internal ROM from address 1
2. or all OFF stop under normal conditions Step execution of the ROM space cannot be performed with a CPU that does not have a TEU event trigger unit An error occurs if an attempt is made to perform step execution A breakpoint in the ROM space is invalid if the breakpoint is set to the second instruction of an instruction string that simultaneously execute two instructions For further information be sure to refer to the Release Note of the KIT
3. rom16 Specifies the ROM bus size in the system to be emulated 8 bits 16 bits or 32 bits can be specified The rom command sets the ROM emulation environment Enter only the parameters that need to be changed Parameters may be entered in any order If the same parameter is entered twice only the last entry is valid The initial value of LENGTH is 0 not used KIT NB85E TP User s Manual 5 INTERFACE SPECIFICATIONS This chapter describes the specifications of the connectors used for control that are required for the user system Pin arrangement table zr ssns ner econo peer 22 33 Q series resistor recommended a tropaTas Output 22 33 Q series resistor recommended Pe mow oum 2 a0 sees restr ommend w m m weme o e wemw e o out eo a sorea rsr Cooner om ow E e m e oe Lm e sss me 00000 emewmenemwren m w m 0 9 m ww o o OUS nn r Manufacturer KEL Models 8830E 026 170S straight 8830E 026 170L right angle 8831E 026 170L right angle fixing hardware attached Wire length Keep the wire from the NB85E to the connector as short as possible gt gt 100 mm or shorter is recommended KIT NB85E TP User s Manual Layout of the connectors on the board The figure below shows the physical layout of the connectors on the board 4010 B2 A2 t B1 A1 Polari
4. 00000h Romless Specifies the ROM less mode KIT NB85E TP User s Manual rd0 d1 d2 dauto Specifies data cache dO Specifies no data cache d1 Specifies the cache of direct map d2 Specifies the 2 WAY cache dauto Specified in the case of NB85E TEG for automatic setting i0 i1 i2 iauto Specifies instruction cache io Specifies no instruction cache i1 Specifies the cache of direct map i2 Specifies the 2 WAY cache iauto Specified in the case of NB85E TEG for automatic setting Function The env command displays the correspondence between the emulation environment settings and the DCU rom command Format rom ADDR LENGTH 512k 1m 2m 4m 8m 16m rom8 rom1 6 bus8 bus16 bus32 Parameters ADDR LENGTH ADDR LENGTH 512k 1m 2m 4m 8m 16m rom8 rom16 bus8 bus16 bus32 Function Specifies an area to be emulated Specifies a start address An error occurs if the specified start address does not match the lowest address of the ROM to be emulated boundary of the ROM Number of bytes of the ROM to be emulated Must be specified in boundary units of 4 bytes Specifies the bit size of the ROM to be emulated Sizes from 512K bits to 16M bits can be specified For the 27C 1024 for example specify 1M bits Specifies the number of data bits of the ROM to be emulated Either 8 bits or 16 bits can be specified If a DIP 32 ROM probe is used choose rom8 if a DIP 40 42 ROM probe is used choose
5. KIT NB85E TP User s Manual RealTimeEvaluator KIT NB85E TP User s Manual Revision History Rev 0 8 Jul 24 1999 Preliminary 1st edition Rev 1 0 Sep 24 1999 Official 1st edition The initial value of JTAG CLK changed to 12 5 MHz KIT NB85E TP User s Manual CONTENTS Me COVER VIE Wears LEE TER 3 2 HARDWARE SPECIFICATIONS iecccccscccscencciedcetccnes ceccetedeedcenesenedeneseueceacnetacpevudeecexcsueedessdees sauet esaia na 4 Erriulationm aston eee eta ote tere Sorbets A eeu AE 4 Host system and interface cnin etn eae eee ea d ea De TR ERA Ee V TR Ee AA N 5 S RTEJFOR WING2 2th en Er recen aser rece techooteceshoatefuat cotecsuscdtsceatcatecuateetafuateetetase 6 Starting GhkBTE92 8Xe 3 ott oidrie c oett ede tet toe a doctr ace ttt oet ee oet dettes denos 6 4 INITIALIZATION COMMANDS eeeeseeeeeeeseeeeen enne ennnn nnn nnnn anni n nna snas nnns assi nnns sss n nna s asi tasas nnn 7 ENV COMMANG ities EE 7 FONT COMMANG eoeta ILE 8 5 INTERFACE SPECIFICATIONS r r sdevesencdenescuucenveccecesvectedssvuceedenssceeeetucue Saar Eea aiaiai 9 Pin arrangementtable cians Ae a a a te a se das ate ance lag 9 Connectors uoco nene eru fe Mad ave code aa d a Rv fe RM E ve RE v OR Du aaa GO PRO RE dna naan ane QE VERA 9 AMI ACIOj ELE 9 Layout of the connectors on the board mmn nnne nnnm enne 10 6 PRECAUTIONS nd nu ac ree ees eni Ia ee IE eae ch co aah aaa dart Ll 11 Precautions related to operati
6. ax max 1M 2M 4M 8M 27C010 020 040 080 1M 2M 4M 27C1024 2048 4096 8M 16M 27C8000 16000 8 16 32 1M 2M 4M 8M 16M 1 RESET STOP NMIx VAREQ WAIT INTxx KIT NB85E TP User s Manual Host system and interface Target host machine PC 9800 Series and DOS V PCs Debugger Partner Win Windows95 98 NT Interface PC card Type II version 2 1 of the PCMCIA specifications version 4 2 of the JEIDA specification or later PC 9800 C bus PC AT ISA bus and PCI bus or LAN BOX Power supply AC adapter in 100 V out 5 V 2A KIT NB85E TP User s Manual 3 RTE FOR WIN32 This chapter describes the setting of RTE for WINS32 with the focus on the aspects specific to KIT NB85E TP Starting ChkRTE32 exe Start ChkKRTE32 exe after RTE 100 TP has been connected to the user system and the power to all the devices is on When RTE 100 TP is installed for the first time ChkRTE32 exe must be started once to select RTE Selecting RTE gt Set the Setup dialog box of ChkRTE32 exe as follows Setup RTE Products x Setup RTE Specify NB85E TP XXXXX XXXXX Specify the mode of the CPU to be used AS XXXXX XXXXX NB85E TP ooo xxxx WF 1 Specify the interface to be used WF 2 Cancel The NB85E TP xxxx xxx specified by RTE is intended for use with e a system employing the NB85E TEG Consult NEC for further information on how to specify when using a custom microcontroller with th
7. e ICE Specify an address as necessary Function test If RTE 100 TP is properly connected to the user system and capable of debugging the following dialog box appears upon the normal completion of the function test In this state control from the debugger is possible RTE for Windows x RTE functional test RTE functional test completed successfully If an error occurs during the test the N Wire cable is not properly connected Check its connection Perform the ChkRTE32 exe function test after the RTE 100 TP has been connected to the user system and the power to all the devices has been turned on KIT NB85E TP User s Manual 4 INITIALIZATION COMMANDS Before debugging can be started initialization is required The following explains initialization using the appropriate internal commands If the debugger offers a means of initialization they may be used instead See Appendix A for an explanation of starting the internal commands and an explanation of the other internal commands nv mman Format env auto verify reset stopz hldrq nmio nmi1 nmi2 jtag 25 12 rtrcb 0 25 50 75 nrtrcb 12 25 37 50 64m 256m romless singleO single1 dO d1 d2 dauto i0 i1 i2 iauto Parameters Jauto If a break point is encountered during execution the break point causes a temporary break Choose Auto to automatically perform the subsequent execution Choose lauto
8. on ssssssssssssseseeeeeeeneeneennn nennen nennen nnn nnne nnns 11 Precautions related to functions nennen enne nnne nnns 11 KIT NB85E TP User s Manual 1 OVERVIEW KIT NB85E TP is a product to use RTE 100 TP It is an in circuit emulator for NEC s RISC processor NB85E ASIC Core by using KIT NB85E TP and RTE 100 TP together Please read a User s Manual of RTE 100 TP together This product comes with the following components First check that none of the components are missing RTE for Win32 Setup Disk User s manual This manual License sheet KIT NB85E TP 2 HARDWARE SPECIFICATIONS Emulation Emulation functions Number of events Setting of execution address Setting of data access Address specification Data specification Status specification Number of sequential unit stages Break functions Trace functions Trigger that can be set using an execution address ROM emulation functions Number of ROMs that can be emulated Types of ROMs that can be emulated Pin mask functions 1 An 8 bit ROM probe supports ROMs of up to 8M bits User s Manual ASIC microcontroller using NB85E as core RTE 100 TP 66 MHz max JTAG N Wire Maskable Maskable Maskable 4 100 Supported Supported Supported 4 bits 4 bits x 128K words Supported Supported Supported Supported Supported 0 1FFFFh 66 MHz max Provided Provided no real time 4 M Byte 50 ns 4 max 2 m
9. ty indication Board end Top View Note When actually arranging the pins design them according to the connector dimensional information KIT NB85E TP User s Manual 6 PRECAUTIONS This chapter provides precautionary information on the use of KIT NB85E TP Precautions related to operation 1 Do not turn on the power to the user system while the power to KIT NB85E TP is off Doing so can cause a malfunction 2 KIT NB85E TP externally controls the debugging control circuit built into the NB85E Consequently KIT NB85E TP does not operate correctly unless the following conditions are satisfied KIT NB85E TP is properly connected to the user system using the N Wire cable The power to the user system is on so that the NB85E can run correctly Precautions related to functions 1 The disassembly and display of real time trace data is performed by reading the contents of memory at the point the trace display command is issued according to the branching information received from the NB85E Consequently the disassembly and display of the program located in RAM of the user system is not correct if changes including erroneous writing due to a CPU hang up are made after program execution Note that the following functional constraints must be observed If the trace information is limited by using the tron command trace display may not be correctly performed Therefore specify all ON start

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