AN10866 LPC1700 secondary USB bootloader
Contents
1. Sector Sector Start Address End Address 32 kB 64 kB 128kB 256kB 512kB Number Size kB Part Part Part Part Part 0 4 0X0000 0000 0X0000 OFFF x x x x x 1 4 0x0000 1000 0X0000 1FFF x x x x x 2 4 0x0000 2000 0X0000 2FFF x x x x x 3 4 0X0000 3000 0X0000 3FFF x x x x x 4 4 0x0000 4000 0X0000 4FFF x x x x 5 4 0x0000 5000 0X0000 5FFF x x x x x 6 4 0X0000 6000 0X0000 6FFF x x x x x 7 4 0X0000 7000 0X0000 7FFF x x x x x 8 4 0x0000 8000 0X0000 8FFF x x x x 9 4 0x0000 9000 0X0000 9FFF x x x x 10 0x0A 4 0x0000 A000 0X0000 AFFF x x x x 11 0x0B 4 0x0000 B000 0X0000 BFFF x x x x 12 0x0C 4 0x0000 C000 0X0000 CFFF x x x x 13 Ox0D 4 0x0000 D000 0X0000 DFFF x x x x 14 OX0E 4 0x0000 E000 0X0000 EFFF x x x x 15 0x0F 4 0x0000 F000 0X0000 FFFF x x x x 16 0x10 32 0x0001 0000 0x0001 7FFF x x x 17 0x11 32 0x0001 8000 0x0001 FFFF x x x 18 0x12 32 0x0002 0000 0x0002 7FFF x x 19 0x13 32 0x0002 8000 0x0002 FFFF x x 20 0x14 32 0x0003 0000 0x0003 7FFF x x 21 0x15 32 0x0003 8000 0x0003 FFFF x x 22 0x16 32 0x0004 0000 0x0004 7FFF x 23 0x17 32 0x0004 8000 0x0004 FFFF x 24 0x18 32 0x0005 0000 0x0005 7FFF x 25 0x19 32 0x0005 8000 0x0005 FFFF x 26 0x1A 32 0x0006 0000 0x0006 7FFF x 27 0x1B 32 0x0006 8000 0x0006 FFFF x 28 0x1C 32 0x0007 0000 0x0007 7FFF x 29 0x1D 32 0x0007 8000 0x0007 FFFF x 1 Flash space varies in size depending on the part number Fig 2 Flash sectors Both the secondary USB bootloader and the use2. Fig 8 Secondary bootloader modification options Table 2 Secondary bootloader flash configuration options Flash Configuration Options Range of values Default value User Start Sector 0 29 2 Device Type 8 64 128 265 512 KB 512 KB Code Read Protection NO CRP CRP1 CRP2 CRP3 NO CRP Table 3 Secondary bootloader update entry pin options Update Entry Pin Options Range of values Default value Port Port 0 Port 1 Port 2 Port 3 Port 4 Port 1 Pin 0 31 20 User start sector This field specifies at which sector number the user application should start from Unless the bootloader is modified such that it requires more code space than the first two sectors Sector 0 1 this field does not need to be modified The starting address for sector 2 on the LPC1700 is 0x0000 2000 Device type The device type refers to a particular part LPC1700 part number This field specifies how much flash is available on that device This should be changed to reflect the intended part number for which the bootloader is built for NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 10 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader 5 5 1 3 Code read protection 5 5 1 4 AN10866_1 5 5 2 5 6 5 6 1 Changing the code read protection field will enable disable the LPC1700 CRP feature Entry pin The Port and Pin fields specify which I O pin is to be che
3. a 62660064 0000FA 21026666668 62 661 661216666652166666721668 10261 666692166666B2166666D2166666666666 216262 6666666666660666666666666666F 216686 16263 666712166606666666667321 66667521666 21826466607 72166667721 66667 72166667 721666 gt 10265 668772166667 72166667 72166667721666 i 83 lines 16206666772166607721606067721 system_LPC17xx s 6612166666521 66666721666 2162616666921 66666B21 66606021 66600666666 216262 6660666666666666666666666606F 21666 218263 6667121 66666666606667321666607521666 2182646667721 6666772166667 72166667721666 210265 660772166667 72166607 72166607721666 83 lines 16206666077216066677216666077216 a lt 832 Desktop Blinky mod hex 98 11 1 CRP code commented ALL lt xp12832 Desktop Blinky hex 6 1 CRP code included Fig 17 View the HEX files of the user application The machine code on the right is the exact same code with the exception that it includes the CRP code located in the system_LPC17xx s startup file In this build you can see that it includes data intended to be placed at 0x02FC 7 Conclusion By using a secondary bootloader it is possible to conveniently perform in application software updates without using additional development hardware such as JTAG In this case this secondary bootloader uses USB to transfer the binaries to the LPC1700 but other channels such as Ethernet and 12C are also possible This application note serves as
4. a reference on how use create and modify a secondary USB bootloader The secondary USB bootloader has been designed as a standalone project that contains all of its dependant source files The user applications used for this demonstration are modified code examples that come included with Keil s uVision toolchain NXP B V 2009 All rights reserved 17 of 19 AN10866_1 Application note Rev 01 8 September 2009 NXP Semiconductors AN10866 8 Legal information LPC1700 USB bootloader 8 1 Definitions Draft The document is a draft version only The content is still under internal review and subject to formal approval which may result in modifications or additions NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information 8 2 Disclaimers General Information in this document is believed to be accurate and reliable However NXP Semiconductors does not give any representations or warranties expressed or implied as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document including without limitation specifications and product descriptions at any time and withou
5. image using drag and drop e g using Windows Explorer To make the LPC1700 appear like a folder or disk drive we need a FAT File Allocation Table In order to fully understand how the FAT file system works the reader is advised to search the web for details on File Allocation Table and Storage Class Devices In our example code we implemented the FAT12 system which supports up to 32 MB volume size of the drive making this useful for large embedded devices To simplify things the LPC1700 on chip code Flash will appear as one single entity file name firmware bin solving any defragmentation problems FAT12 is supported by Windows 9x to XP Vista and Linux In this application note we do not attempt to explain how the Mass Storage Class is implemented This secondary USB Bootloader code is a modification of Keil s USB Mass Storage Class example http Awww nxp com redirect keil com 336 asp The source files for the complete project are provided for the reader to use and understand NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 6 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader 5 Secondary USB bootloader AN10866_1 5 1 5 1 1 5 1 2 5 2 5 3 Entering ISP mode The ISP mode of the secondary USB bootloader is the mode at which it flashes the user application onto the LPC1700 In order to get into the ISP mode the secondary USB bootloader fo
6. level instead 5 6 2 Flashing the user application e Create the binary file of the user application See Section 6 e Enter the secondary USB bootloader s ISP mode e Open the newly created drive created in the My Computer window AN10866_1 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 12 of 19 NXP Semiconductors AN10866 LPC1700 USB bootloader File Edit View Back Address Favorites Tools Help B po Search Folders E w E File and Folder Tasks Make a new folder Publish this Folder to the Web E3 Share this folder Other Places i My Computer My Documents My Network Places Details Lobjects 2 My Computer Fig 11 Firmware bin in the USB bootloader s MSCD e Delete firmware bin e Drag n Drop or Copy and Paste the binary file of the user application onto this drive e Reset the LPC1700 From here on unless the entry pin P1 20 by default is grounded the LPC 1700 will boot into the user application 6 User application 6 1 6 1 1 AN10866_1 This section briefly describes the necessary steps needed in order to make the user application usable by the bootloader User code entry To execute the user application the secondary USB bootloader will jump to a predetermined flash sector address Therefore the user application must be built so that it can run from that starting addre
7. system _Ipc17xx d 1KB DfFile E serial d 1KB DFile i avon ari 3 My Computer m Type InfraRecorder disc image Dat 1 35 KB a Without the CRP code block Fig 16 User application binary outputs amp C Documents and Settings nxp12832 Desktop Europ Z ETX File Edit View Favorites Tools Help d Y i gt S Y Back gt 5 t Search Key Folders Address _Hands_on LPC17x Usingthe NVIC Flash blinky bin Y Go Name Size Type 1 ERSS ARM _at_0x02FC 1KB __AT_0X02FCFile 4 mi 4d My Computer Type File Date Moditied 8 5 2009 1 35 KB b With the CRP code block AN10866_1 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 16 of 19 AN10866 LPC1700 USB bootloader NXP Semiconductors The binary file referencing to Ox02FC in Fig 16b contains the code block from the system_LPCi7xx s startup file By commenting out the code in Fig 14 you should only see only one binary file as shown in Fig 16a When comparing the HEX hex files of the user application without the CRP code with the user application with the CRP code the difference can be clearly observed Fig 17 shows the two hex files side by side The machine code on left has been generated without CRP code Ki Blinky_mod hex C Documents and Settings nxp12832 Desktop 1 of 2 GVIM File Edit Tools Syntax Buffers Window Help Load egions CRP code from
8. 1 Run 2 Run User Programs Before Build Rebuild Run 1 Run 2 v Beep When Complete Start Debugging 6 2 Interrupt vectors The secondary USB bootloader will automatically adjust the NVIC s vector table offset register VTOR to point to same starting address at which it branches to for user code execution This is done so that there isn t any extra overhead for the user when he or she is building the user application 6 3 Startup file modification The secondary USB bootloader already handles the CRP configuration See Section 5 5 1 Therefore if your user application uses the system_LPC17xx s startup file from one of Keil s application examples some modifications may be recommended 107 108 109 110 111 112 Fig 14 Commented CRP configuration block of the startup_LPC17xx s file IF LNOT DEF NO_CRP AREA ARM at _Ox02FC CODE READONLY SCRP_Key DCD OxFFFFFFFF ENDIF AN10866_1 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 15 of 19 NXP Semiconductors AN10866 LPC1700 USB bootloader By design this block of code Fig 14 from the system_LPC17xx s sets the user application s CRP level because it is intended to be used without a secondary bootloader 04 01 a RHKKKKKKAKKAKKEKRAKKAKKKAKKAARKKKKKERAKKKRKKEKRAREKREKEKEEKEREEEEEEREE 02 Scatter Loading Description File generated by uVision 03 is SA
9. AN10866 LPC1700 secondary USB bootloader Rev 01 8 September 2009 Application note Document information Info Content Keywords LPC1700 Secondary USB Bootloader ISP IAP Abstract This application note describes how to add a custom secondary USB bootloader to a LPC1700 series microcontroller founded by Philips NXP Semiconductors AN1 0866 LPC1700 USB bootloader Revision history Rev Date Description 01 20090908 Initial version Contact information For additional information please visit http www nxp com For sales office addresses please send an email to salesaddresses nxp com AN10866_1 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 2 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader 1 Introduction NXP s LPC1700 microcontrollers provide the user a convenient way to update the flash contents in the field for bug fixes or product updates This can be achieved using the following two methods e In System Programming In System programming ISP is programming or reprogramming the on chip flash memory using the boot loader software and UARTO serial port This can be done when the part resides in the end user board e In Application Programming In Application IAP programming is performing erase and write operation on the on chip flash memory as directed by the end user application code A secondary bootloader is a piece of
10. IROM IRAM2 0x2007C000 048000 Starting Address Command Find in Files ULINK Cortex Debugger 6 1 2 AN10866_1 Creating the binary file By default Keil s uVision does not create the binary required by the secondary USB bootloader In order to create this binary we need to use an external command line driven tool that comes included with Keil s toolchain Depending on your project configuration you may have to change the path for the tool s command line arguments e Select the User tab in the Target Options e Check the Run 1 from the Run User Programs After Rebuild e Type in the command to run the fromelf tool NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 14 of 19 NXP Semiconductors AN10866 LPC1700 USB bootloader Project Workspace EE LPC1768 Flash 0x2000 amp Startup Code A startup_LPC17 x s amp System Code 4 system_LPC17xx c Sy Core Code E core_cm3 c amp Source Code Blinky c Documentation La Abstract tet File Edit View Project Debug Flash Peripherals Tools SVCS Window Help g bl Gi a i eal 53 amp Options for Target LPC1768 Flash 0x2000 Fig 13 Configuring fromelf to create the required binary file H j H w amp al Device Target Output Listing C C Asm Linker Debug Utilities Run User Programs Before Compilation of a C C File Run
11. KA EAA EAA AE EAAAA EAE AEALA KEKE AEEAEEEEEEEEEEEREEEELERLELEEREEEREEEE 05 LR_IROM1 Ox00002000 0x0007E000 06 ER_IROM1 0x00002000 0x0007E000 load address execution address 11 RW_IRAM1 Ox10000000 Ox00008000 gt RW data 07 t 0 RESET First 08 InRoot Sections 09 ANY RO 10 12 ANY RW 21 13 14 y 1 This scatter file reflects the Target option changes to relocate code to sector 2 0x2000 Fig 15 uVision s linker scatter file load region size region As the starting address for the user application was adjusted in section 6 1 1 uVision s scatter file has also been updated to reflect these adjustments However since the CRP code block inside the system_L C17xx s startup file explicitly addresses 0x02FC the linker detects that this portion of code is outside of the scatter file s load region and hence automatically creates an additional load region Without removing the CRP code block the fromelf tool will output a folder containing multiple binaries instead of a single binary file due to the multiple load regions C Documents and Settings nxp12832 Desktop Europe Z File Edit View Favorites Tools Help Back v 7 x A Search ey Folders EJ Address DB irope_0509_Hands_on LPC17xx Usingthe NVIC Flast Go Name Size Type a B blinky bin 2KB InfraRecorder disc image tai ExDIL iex 1KB IEX File E Blinky hex 4KB HEX File Blinky htm 28KB FirefoxDocument E
12. ch Ey Folders E Tools Help Ed A Address Z My Computer Address W My Computer gt Q Local Disk C DVD RW Drive iD Ea S A CRP DISABLE ES BDE gt QY gt A CRP 1 ENABLE E Local Disk C DVD RW Drive iD Fig 6 USB Bootloader MSCD CRP Disabled 4 My Computer 3 My Computer Fig 7 USB Bootloader MSCD CRP1 Enabled 5 5 5 5 1 AN10866_1 Opening the firmware bin located on the MSC drive while CRP is enabled will show a file containing only NULL values If CRP is disabled then the binary file will contain the contents of the flash sector starting from the user application Bootloader code modifications The secondary bootloader has several modification options available Flash configuration The bootloader s flash configurations can be found in the sbl_config h file When using Keil s Configuration Wizard these configuration options can be easily changed NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 9 of 19 NXP Semiconductors AN1 0866 5 5 1 1 5 5 1 2 AN10866_1 LPC1700 USB bootloader Collapse All Option Value Flash Configuration UserStart Sector 2 Device Type LPC17x8 512 KB Code Read Protection NO CRP Update Entry Pin Port Port1 Pin 20 Text Editor Configuration Wizard Abstract txt sbl config h 1 Configuration Wizard view of sbl_config h
13. cked for ISP entry The defaults are Port 1 and 20 respectively USB configuration The USB configurations can be found in the usbcfg h file When using Keil s Configuration Wizard these configuration options can be easily changed Expand All Collapse All Help Option Value USB Configuration USB Power Bus powered Max Number of Interfaces Max Number of Endpoints 32 Max Endpoint 0 Packet Size 64 Bytes USB Event Handlers Text Editor h Configuration Wizard Abstract txt usbefg h Fig 9 USB configuration The default values shown are sufficient for the secondary USB bootloader example Specific USB configuration properties are outside of the scope of this Application Note One option of interest however might be USB Power For USB Power there are two possibilities bus powered and self powered The MCB1700 is bus powered since it derives its power from the bus If the user s application has its own power source then the self powered option needs to be selected Using the USB bootloader Installing the secondary USB bootloader e Open the secondary USB bootloader sample project using Keil s uVision e f necessary make the desired code changes e Build the project e Erase the LPC1700 e Flash the LPC1700 with the bootloader e Reset the LPC1700 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 11 of 19 NXP Semicond
14. code which allows a user application code to be downloaded using alternative channels other than the standard UARTO used by the primary bootloader on chip The primary bootloader is the firmware that resides in a microcontroller s boot ROM block and is executed on power up and resets After the boot ROM s execution the secondary bootloader is executed The secondary bootloader in turn will then execute the end user application This application note uses USB as an example for developing a secondary bootloader on a LPC1700 series microcontroller 2 Requirements AN10866_1 2 1 Hardware requirements The secondary USB Bootloader application has been developed and tested using a e Keil s MCB1700 development board e MS Windows based workstation with an available USB port eeeeecosescese oe eeeeoeenecee Fig 1 MCB1700 featuring a LPC176x series microcontroller NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 3 of 19 NXP Semiconductors AN1 0866 2 1 1 2 2 LPC1700 USB bootloader Programming Programming the bootloader can be done using Keil s U LINK JTAG module However as an additional option the LPC1700 s ISP programming functionality can be used instead To program using the ISP protocol an RS 232 serial cable is required and a free ISP programming tool is available from FlashMagic at http www nxp com redirect flashmagictool com Jumper settin
15. el Volume Label The user flash can be read or written No CRP CRP DISABLE The user flash content cannot be read but can be CRP1 CRP1 ENABLE updated The flash memory sectors are updated depending on the new firmware image The user flash content cannot be read but can be CRP2 CRP2 ENABLE updated The entire user flash memory is erased before writing the new firmware image The user flash content cannot be read or updated CRP3 CRP3 ENABLE The USB bootloader ignores the Entry Mechanism Update Entry Pin and always executes the user application if present If user application is not present then Update mode is entered CRP is used as a security feature so that the code stored in flash can t be read using external tools such as JTAG The level of access restrictions depends on the CRP level selected Caution If CRP3 is enabled changes to the flash space can only be performed using IAP in the user application Assuming a valid user application is present the secondary USB bootloader will NOT enter ISP mode if CRP3 is selected 4 USB communication AN10866_1 There are many USB Device Classes like DFU Device Field Upgrade HID Human Interface Device and MSCD Mass Storage Class Device The MSCD presents easy integration with a PC s operating system This class allows the embedded system s flash memory space to be represented as a folder in a Windows Linux environment and the user can update the flash with a binary
16. ents 1 MACRO GU CHO MN ci cessca cscs cc tcces Sod cstectecetet teceieteneestees 3 9 COMENTS s seccscedscsc ses cs csdadeccddscerssuddsaedd asten assiadscias 19 2 Requirements cccseeeeeeesseeeeesseeeeeeneeeeeenseenenseeeee 3 2 1 Hardware requirements 3 2 1 1 ProgramImMING isiviveteei ees pict ees 4 2 1 2 Jumper settings ee eeeeeeeeeseeeeeesneeeeeeeeeereneeees 4 2 1 3 USB Cable issis eae Seiten denuded eieaa 4 2 1 4 Bootloader s ISP entry mechanism 08 4 2 2 Software requirements cceeeeeeeeeeeeeeeeeeeeeeees 4 3 Flashing the LPC1700 cccsscsssseeseeeneeeeeeeee 4 3 1 Flash SOCHOMS cccsecceceseereeeeseeeeeeseneeeeeseesenensoees 4 3 2 DP sees eae sete stag ecto tapes tea TT 5 3 3 VAP ceo cataveesi ts ete testes ead ddd dane 5 3 4 AP cece tea dest sais Maier di sce sesceusictessistveeeagetearcczasaanes 6 4 USB COMMUNICATION ceccceeeeeetenseeeeeeeeeeeeeeeeee 6 5 Secondary USB bootloader ccsseeeseeees 7 5 1 Entering ISP mode ecceeeceeeseeeeeeeeneeeeeeeeeaes 5 1 1 Using an entry PIN eee eeeeteeeeeeeneeeeeeaees 5 1 2 Automatic ISP entry ssseeeeeeeeeeeeeeeeeeeeeeerreeee 5 1 3 ISP entry disabled ecceeeceeeseeeeeeeeeneeeeeeeeeaes 5 2 Bootloader size o oo eeeeseeeeeeseeeeseneeeeeeeneeeeeeaees 5 3 Code placement in flash eeeeeeeeeteeeeeeees 5 3 1 User application execution 5 3 2 Updating the vector table offset register 8 5 4 C
17. gs In order to use the USB device functionality ensure that the USB s D and D jumpers are both set to the DEVICE header pins as shown in Fig 1 USB cable A USB A to USB B cable is required to power and connect the windows workstation to the MCB1700 development board Bootloader s ISP entry mechanism Having an entry pin grounded during reset will cause the secondary USB bootloader to go into ISP mode For convenience P1 20 is used by default because it is wired to the center button of the joy stick as shown in Fig 1 By pressing down on the MCB1700 s joystick during reset will cause the secondary USB bootloader to enter ISP mode Software requirements An evaluation version of Keil s uVision3 is sufficient to compile the secondary USB bootloader and the sample user applications The secondary USB bootloader has been developed and tested using a MS windows based workstation 3 Flashing the LPC1700 3 1 AN10866_1 Flash sectors Depending on the LPC1700 part number the user has up to 512kB Bytes of on chip flash available This user flash space is divided up into sectors In order to make any modifications even if it is just one byte to a particular sector the entire sector must be first erased and then re written NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 4 of 19 NXP Semiconductors AN1 0866 AN10866_1 3 2 3 3 LPC1700 USB bootloader
18. have been included in the section Legal information founded by NXP B V 2009 All rights reserved For more information please visit http www nxp com For sales office addresses email to salesaddresses nxp com Date of release 8 September 2009 Document identifier AN10866_1
19. he USB bootloader has been designed to fit within the first two flash sectors Sector 0 1 so that the user application can start from sector 2 Code placement in flash The secondary bootloader is placed at the starting address 0x0 so that it will be executed by the LPC1700 after reset The USB communications within the bootloader utilizes interrupts and therefore its vector table is shown in Fig 4 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 7 of 19 NXP Semiconductors AN1 0866 AN10866_1 5 3 1 LPC1700 USB bootloader Since programming flash is based on a sector by sector basis the code for the user application cannot be stored in any of the same flash sectors the bootloader uses YS y y User Application y User Application Vector Table 0x0000 2000 Secondary Bootloader Secondary Bootloader Vector Table 0x0000 0000 Fig 4 Bootloader and user application in flash For efficient use of flash space the user application should be flashed into the next available empty sector after the bootloader Note that the user application will also contain its own interrupt vector table as shown in Fig 4 User application execution If the secondary USB bootloader is not going to enter ISP mode it will start the execution of the user application To do so it will issue a branch statement to the application s starting address which happens to be the starti
20. llows the boot sequence shown below O71 void main void 072 073 If CRP3 is enabled and user flash start sector is not blank execute the user code 074 if crp CRP3 es user_code_present 075 t 076 execute_user_code 077 078 079 check_isp_entry_pin function does not return if isp entry is not requested 080 if user_code_present 081 082 check_isp entry _pin 083 084 User code not present or isp entry requested 085 enter _usb_isp 086 Fig 3 Secondary USB Bootloader boot sequence Using an entry pin The secondary USB bootloader will check the status of a GPIO pin to determine if the entry is valid This is the easiest way since no post processing is needed By default the bootloader uses P1 20 Automatic ISP entry If the secondary USB bootloader detects that no user application is present upon reset then it will automatically enter ISP mode ISP entry disabled If the secondary USB bootloader detects that a user application has already been installed and that CRP is set to level 3 then it will not enter ISP mode Bootloader size Since the bootloader resides within user programmable flash it is typically desired to have the bootloader to be designed as small as possible The larger the secondary USB bootloader is the less flash space is available to the user application Note that flash applies to a sector by sector basis By default t
21. ng address of that particular flash sector By default the secondary USB bootloader will start user code execution by issuing a branch statement to 0x0000 2000 5 3 2 Updating the vector table offset register The secondary USB bootloader will change the Cortex M3 NVIC s Vector Offset Register in case the user application uses interrupts Change the Vector Table to the USER_FLASH_START in case the user application uses interrupts NVIC SetVectorTable NVIC VectTab FLASH USER_FLASH_START Fig 5 Changing the NVICs VTOR register NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 8 of 19 NXP Semiconductors AN10866 5 4 LPC1700 USB bootloader Changing the vector table offset register will not affect the user application if it doesn t use interrupts If the user application wishes to use its vector table in SRAM it is up to the user application to create that vector table See ARM s technical reference manual on the Cortex M3 for more details Code read protection The secondary USB bootloader supports all levels of CRP When the bootloader is in ISP mode the MSC drive that it has created will show the CRP level The drive or volume name can be seen from the My Computer window ET My Computer File Edit View A Favorites B tf I Search Ey Folders E C gt My Computer File Edit View Favorites Tools Help 5i Sear
22. ode read protection cceeeeeeseeeeeeeeeeneeeeeeees 9 5 5 Bootloader code modifications eee 9 5 5 1 Flash configuration eerren 9 5 5 1 1 User start Sector sinassenneneneenerrnrnernrernnennnna 10 5 5 1 2 Device type cceeeccecseeceeeeeeeceeeseeeeeeseeeeneeees 10 5 5 1 3 Code read protection ccecceeeeeeeeteeeeeees 11 SD WA Ertry PiMs ences deepen sc epted ica pace cebisacaseedses 11 5 5 2 USB configuration ccceceeeeeseeeeeeeeeteeeneees 11 5 6 Using the USB bootloader cceeceeeeee 11 5 6 1 Installing the secondary USB bootloader 11 5 6 2 Flashing the user application eee 12 6 User application ccecssseeeesseeeesseeeensseeneneeee 13 6 1 User Code etry csini 13 6 1 1 Updating the starting address c 13 6 1 2 Creating the binary file ee eeeeeeeeeeteeeeeee 14 6 2 Interrupt Vectors 0 eeeeeeeeneeeeseneeeeeeneeerennees 15 6 3 Startup file modification 0 0 eee eeeeeeeeeeteeeeeee 15 7 COMNCIUSION s scc2esdsctsitecscses costes see eeeicetecdsaecccer s 17 8 Legal information csssseesseeeessseeeesseenenneee 18 8 1 Definitions ccccccececeeeeeeeeeeeeeeeeeeteeeeeeeeeeeeeaee 18 8 2 Disclaimer S aictesscessietetepieecness Matenstsincegeedanddied 18 8 3 Trademarks ceeseeeeeseeeeeeeneeeeesneeeeeenneeeeennees 18 Please be aware that important notices concerning this document and the product s described herein
23. r application reside in flash Therefore for the secondary USB bootloader to flash the user application without modifying any of its own code the user application will be flashed starting with the next available sector Additionally any flash sectors that do not contain any code may be used for data storage using the IAP commands ISP ISP In system Programming is supported in all LPC1700 series microcontrollers ISP programming can be used to flash the microcontroller while it is in the end user system The ISP protocol consists of commands that are sent in ASCII format via the UARTO interface A detailed description of the ISP commands can be found in the LPC1700 user manual A free 3rd party utility is available from Flash Magic at http www nxp com redirect flashmagictool com IAP IAP In Application Programming is a feature that allows a user application to erase and write to on chip flash memory In order for the secondary bootloader to flash the user application onto the on chip flash it needs to utilize these IAP commands A detailed description of the IAP commands can be found in the LPC1700 user manual NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 5 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader 3 4 CRP The LPC1700 has three levels of CRP Code Read Protection as shown in Table 1 Table 1 Code Read Protection CRP CRP Explanation CRP Lev
24. ss By default this address is 0x0000 2000 See Fig 4 for an illustration on how the user application is stored relative to the secondary USB bootloader Updating the starting address e Open the user application s uVision project e Open the Target Options e Change the starting address to Ox2000 NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 13 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader k x Output window File Edit View Project Debug Flash Peripherals Tools SVCS Window Help a sug a a H w sa meje ij ea ee N Options for Target LPC17xx FLASH Xx Project Workspace Ri Device Target Output Listing User C C Asm Linker Debug Utilities EH ecaa NXP founded by Philips LPC1768 Docs Code Generation sx Ab tx gt amp a Target Options Xtal MHz E 8 system_LPC17 x c Operating system None Use Cross Module Optimization El startup s Use MicroLIB amp y Source A target c 4 GLCD c se Link Time Code Generation Use Link Time Code G A itc lt i Read Only Memory Areas Read Write Memory Areas Fal Haine default off chip Start Size Startup default off chip Start Size Nolnit E nec 3 timer c ROM1 RAMT ROM2 RAM2 EZ ROM3 RAM3 B Files Z de MOF on chip on chip TT i fi Build Fig 12 Configuring user application s starting address iROM1 102000 044000 iRam1 ox10000000 08000
25. t notice This document supersedes and replaces all information supplied prior to the publication hereof Suitability for use NXP Semiconductors products are not designed authorized or warranted to be suitable for use in medical military aircraft space or life support equipment nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected AN10866_1 to result in personal injury death or severe property or environmental damage NXP Semiconductors accepts no liability for inclusion and or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and or use is for the customer s own risk Applications Applications that are described herein for any of these products are for illustrative purposes only NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification Export control This document as well as the item s described herein may be subject to export control regulations Export might require a prior authorization from national authorities 8 3 Trademarks Notice All referenced brands product names service names and trademarks are property of their respective owners NXP B V 2009 All rights reserved Application note Rev 01 8 September 2009 18 of 19 NXP Semiconductors AN1 0866 LPC1700 USB bootloader 9 Cont
26. uctors AN10866 LPC1700 USB bootloader W USB Bootloader pVision3 C Documents and Settings nxp12832 Desktop LPC1700 secondary US E File Edit View Project Debug Flash Peripherals Tools SVCS Window Help LOAD a Download ERA H LOAD A Fai Jaam Project Workspace Contigure Flash Tools LPC1700 Flash Collapse All ui Docs E E Abstract tet Option Value 5 Startup Flash Configuration Hardware UserStart Sector 2 use Device Type LPC17x8 512 KB 5 DiskImage a 5 Code Read Protection NO CRP 1e App rz Update Entry Pin iE memory c sbl_iap c Port Port1 Pin 20 B Fies x compiling compiling compiling compiling compiling linking put window sh Erase Flash Memory Program Size Flash obj USB Bootloader axf O Error s Fig 10 Flashing the secondary USB bootloader using Keil s uVision Text Editor h Configuration Wizard Abstract txt sbl_config h e ru Bre usbdesc c usbhw c DiskImg c menory c sbl_iap c Code 6458 RO data 810 Ril data 68 ZI data 3324 0 Warning s Find in Files Build A Command At this point because the LPC1700 has no user application it automatically enters ISP mode upon reset Go to the My Computer window and locate the newly created drive with a CRP DISABLE label If the CRP level has been changed in USB bootloader project it will display the new CRP
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