Capacitance-Digital-Converter LSI for Electrostatic Capacitive Touch
Contents
1. LSI on 3 Connect LC717A10ARGPGEVB to PC through the evaluation board or patterns with their finger it an USB to Serial conversion module Supply the may cause malfunction or breakdown power and verify the Power LED is turned on http onsemi com 4 LC717A10ARGPGEVB Ocins LED O 0 Oyen Cins O LC717A10ARGPGEVB OS cins 0 OcCinii Ocm lt Ul L amp OSTE L OcCini4 Non Connect O ue L J ncS Onrst Cref SO CrefAdd Sl lt SCK Og ne N GND Osai_ LED VDD Figure 3 Connection of Connector Pin USB and Serial Conversion Module Connector Pin 8pin LC717A10ARGPGEVB ES PC Header Pin 14pin x 2 Touch Switch Board Other than LC717A10ARGPGEVB and Connector Pin 8pin are not Attached Figure 4 Connection Example of LC717A10ARGPGEVB http onsemi com 5 LC717A10ARGPGEVB CIRCUIT DIAGRAMS aaa Saan L ano gt osmos gt ogos AI SD yA osos UA SON sou L ouo rere Lo errr Luno gt L euo gt a C ruo a suo a5 Coo ar L gt a aN9 m LO ad YVOIWZLZO1 vO kn aN9 N3399 taqi OrAG I ky ad NIo ajA oo ho J Sl 94 Zi 8L 61 GND ASNVYO eq 0A TL cd LONOLNI isyu sou OS OVS ISAS ASAOS IVS LNOLNI DID ojo aN9 aN9o ldr aadA ey vy ad LNO J9I9HUUOJ IdS Ozl LYS LYS LONOLNI LNOLNI MPO 2o BT 1919 PPYJAID ppy4919 ISHU C isu gulo YUO ruo ELuld CHUI bLUID OLUID lt omo2. 33 790 2910 Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center Email orderlit onsemi com Phone 81 3 5817 1050 For additional information please contact your local Sales Representative EVBUM2173 D
3. 6U19 guld ircuit Diagrams Figure 5 C onsemi com http LC717A10ARGPGEVB PRECAUTION FOR USE For approach in the use of LSI and design rule of the switch pattern Please refer to the Application Note and Design Note in ON Semiconductor Touch Sensor Homepage ON Semiconductor and the Q are registered trademarks of Semiconductor Components Industries LLC SCILLC or its subsidiaries in the United States and or other countries SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent
4. C717A10AR Output for Capacitance Sensors Drive Interrupt Output Clock Input I2C Clock Input SPI Interface Selection Chip Select Inverting Input SPI Table 2 MAIN SPECIFICATIONS Board Size 35 56 x 20 32 mm DS aaa Ce Board Material Glass Epoxy FR4 Copper Foil 35 um Thickness 1 6 mm 2 layer Board Communication Specification SPI It can be change to IC Compatible Bus by Parts Exchange http onsemi com 3 LC717A10ARGPGEVB Table 3 JUMPER PATTERN FOR ADDITIONAL PARTS Pattern for Cref Capacity Adjustment Implement capacitor of any capacity as needed Size 1608 Pattern for CrefAdd Capacity Implement capacitor of any capacity as needed Size 1608 Adjustment Pattern for SCL Pull up When 12C compatible bus is chosen by nCS implement a resistance of 2 2 KQ Size 1608 Pull up VDD C2 C3 R3 R4 R5 R7 P2 Pattern for SDA Pull up When 12C compatible bus is chosen by nCS implement a resistance of 2 2 kQ Size 1608 Pull up VDD Pattern for nCS Pull up When 12C compatible bus is chosen by nCS implement a resistance of 2 2 kQ Size 1608 Pull up VDD Reserve Pattern R7 Initialization Short Size 1608 Rs Reserve Pattern R8 Initialization Open Size 1608 JP1 Pattern for 12C Compatible Bus Slave When 12C compatible bus is chosen by nCS set the 12C compatible bus slave Address Selection address by JP1 and JP2 When SPI is chosen connect to the g
5. LC717A10ARGPGEVB Capacitance Digital Converter LSI for Electrostatic Capacitive Touch Sensors Evaluation Board User s Manual Introduction This manual contains configuration usage and main specifications regarding Electrostatic Capacitive Touch Sensor Evaluation Board LC717A10ARGPGEVB For the latest edition of this manual please refer to ON Semiconductor homepage http www onsemi com Product Outline This product is a board that can be used to evaluate LSI LC717A10AR Due to the fact it is 600 mil wide DIP shape it is easy to use It can be set up to evaluate any given touch switch pattern ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL In order for evaluation it is necessary to obtain an USB to Serial conversion module for SPI communication a PC to evaluate software and a board with a designed switch pattern e Electrostatic Capacitive Touch Sensor Evaluation Board LC717A10ARGPGEVB Accessory Connector Pin 8pin EVALUATION BOARD LC717A10ARGPGEVB Evaluation Board Outline Power LED O cins Y LED RI ciO O O cin cis O O LC717A10ARGPGEVB ONN Oo Touch Sensor LSI Ocan 2 O LC717A10AR K Oo ol i OCini3 Oo Reset Switch 2 eset Switc Onrst Oo Cref INTOUT LED Figure 1 Configuration of LC717A10ARGPGEVB Semiconductor Components Industries LLC 2014 July 2014 Rev 3 Publication Order Number EVBUM2173 D LC717A10ARG
6. PGEVB o Touch Sensor LSI Reset Switch Electrostatic Capacitive Touch Sensor LSI This is used to RESET Touch Sensor LSI Use this LC717A10AR switch if any abnormality is encountered during Power LED operation When a power is supplied it turns on Power supply e INTOUT LED voltage is 2 6 to 5 5 V When the INTOUT signal outputs it turns on Evaluation Board Specifications Non Connect cing gt Cing LEDI RI civ O Cin7 cino gt K OSO Cins O Cin6 LC717A10ARGPGEVB cinto KOSMO cins O Cin5 ci KO XENI Cin4 Cini2 K ONY Cin3 cinis gt Jene Cin2 Cinia Ku Cint Cint5 gt OCin1i5 Cino nRST gt nCS Cret gt SAO SO CrefAdd gt SDA SI Cdrv SCL SCK INTOUT GND s REGS VDD Figure 2 Terminal Pin Layout http onsemi com 2 LC717A10ARGPGEVB Table 1 SIGNAL PIN FUNCTIONS VA C mme 7 O O O O O O O O O Capacitance Sensor Input Capacitance Sensor Input Capacitance Sensor Input Capacitance Sensor Input 7 7 7 7 7 7 7 7 7 Cdrv SCL SCK External Reset Signal Inverting Input 2 2 kQ Pull up with Switch nCS nRST SA1 Slave Address Selection 12C SDA SI Data Input and Output 12C Data Input SPI SA0 SO Slave Address Selection 12C Data Output SPI JP2 100 kQ Pull down VDD Power Supply 2 6 V to 5 5 V It is Connected to Vpp of LC717A10AR GND Ground Earth It is Connected to Vgs of L
7. rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada g P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421
8. round JP1 Initialization Ground Short 1 2 Short H Level 2 3 Short L Level J Pattern for 12C Compatible Bus Slave When 12C compatible bus is chosen by nCS set the 12C compatible bus slave Address Selection SO Pull down address by JP1 and JP2 When SPI is chosen implement a resistance of 100 kQ between 2 to 3 It has been implemented JP2 Initialization Ground Pull down 1 2 Short H Level 2 3 Short L Level Table 4 LC717A10AR I2C COMPATIBLE BUS SLAVE ADDRESS SA1 Input SAO Input JP1 JP2 7bit Slave Address Binary Notation 8bit Slave Address Low Low 0x16 00101100b Write 0x2C 00101101b Read 0x2D Low 0x17 00101110b Write Ox2E 00110000b Write 0x30 00110001b Read 0x31 00110011b Read 0x33 HOW TO USE 1 Connection of connector pin 4 Install evaluation software to PC The evaluation Solder attached connector pin 8pin at the software is available from the ON Semiconductor position pictured in Figure 3 Homepage and selecting LC717A10 software 2 Connect the LC717A10OARGPEVB to a board Double click on the icon LC717A10App exe with a designed switch pattern When designing from the installed folder and start it a switch pattern please refer to the Application 5 Press RESET Switch when evaluation board is and Design Note on the ON Semiconductor Touch acting strange Sensor Homepage 6 Please note If the user directly touches the
Download Pdf Manuals
Related Search