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MAIN BOARD User`s Guide

1. SOCKET 7 JBFO JBFI JBF2 VER 2 2 A TB LED PW LED Keylock Speaker Reset SU LED SU SW HD LED VER 2 2 POWER LED Keylock Speaker Reset TB LED SUSPEND HD LED 2 2 Connectors CN3 Keyboard connector Description Keyboard Clock Keyboard Data N C Ground 5 Vcc CN4 External PS 2 Mouse connector CN5 CN6 USB Connector OPTIONAL CN7 Power Supply Connector Description Pin Description Power Good Ground 5V DC Ground 12V DC 5V DC 12V DC 45V DC Ground 15V DC Ground 15V DC IDE1 Primary IDE Connector IDE2 Secondary IDE Connector CN Floppy Disk Connector COM1 2 Serial Ports Connector CNS Printer Port Connector CNI Infrared Connector IR Signal Name IRRX Ground IRTX VCC IRRXH VCC GND 2 3 Jumper Setting 5V 1A Intel Pentium Processor Installation CPU CLOCK Es JCK2 JCK3 JCK4 JBFO JBF1 JPW1 RATIO CLOCK AMD K5 K6 K6 2 Processor on CPU CLOCK 1 JCK2 JBFO JBF1 JPWI a RATIO cioe 12 OPEN a 127 or pes pes ose OPEN 127 Es rose eros ores 1278 pes ESE 127 2 ax 127 ma Cyrix 6x86 Processor Installation CPU CLOCK EE JCK2 JCK3 JCK4 JBFO JBF1 JBF2 JPW1 RATIO CLOCK JCK1 4 CPU Speed Selector 2 3 1 2 2 3 2 3 1 2 JCK3 JCK4 1 2 2 3 1 2 2 3 1 2 2 3 1 2 2 3 1 2 2 3 PCICLK 25 32 7 5 32 30 32 33 3 32 37 5 32 NOTE JCK4 is synchronous asynchronous selection
2. Enabled PCI Peer Concurrency Disabled IRQ 3 assigned to Legacy ISA PCI Delay Transaction Disabled IRQ 4 assigned to Legacy ISA IRQ 5 assigned to PCI ISA PnP PCI IRQ Actived By Edge IRQ 7 assigned to Legacy ISA PCI IDE IRQ Map To PCI AUTO IRQ 9 assigned to PCI ISA PnP Primary IDE INT A IRQ 10 assigned to PCVISA PnP Secondary IDE INT B IRQ 11 assigned to PCI ISA PnP IRQ 12 assigned to PCVISA PnP IRQ 14 assigned to Legacy ISA IRQ 15 assigned to Legacy ISA DMA 0 assigned to PCVISA PnP DMA 1 assigned to PCVISA PnP Quit lt gt Select Item DMA 3 assigned to PCVISA PnP Help PU PD Modify DMA assigned to PCVISA PnP Old Values Shift F2 Color DMA 6 assigned to PCVISA PnP Load Setup Defaults DMA 7 assigned to PCVISA PnP PCI IR Actived By If your IDE cards is triggered by edge set it at Edge The options are Level Edge Default PCI IDE IRO Map To Set to auto to allow the system BIOS to automatically detect which interrupt is used by the PCI master drive The options are PCI AUTO Default PCI SLOT1 PCI SLOT2 PCI SLOT3 PCI SLOT4 ISA CPU to PCI Write Buffer When enabled allows data and address access to the internal buffer of 82C586A so the processor can be released from the waiting state The options are Enabled Default Disabled PCI Dynamic Bursting When enabled the PCI controller allows Bursting PCI transfer if the consecutive PCI cycles come
3. JPWI JV1 JV2 CPU Voltage Selector FOR ONE REGULATOR 1 P54C STD VR Core 3 3V 1 2 5 6 7 8 2 AMD K5 C F IO 3 3 3 Cyrix 6X86 016 Core 3 4 3 6V 1 2 3 4 5 6 7 IO 3 4 3 6V 8 3 Cyrix 6X86 028 FOR TWO REGULATOR Description CPU Voltage 1 INTEL P55C Core 2 8V 1 2 3 4 2 AMD K5 H J IO 3 3V 3 Cyrix 6x86L 1 AMD K6 Core 2 9V 1 2 7 8 1 2 3 4 2 Cyrix 6x86MX IO 3 3V AMD K6 233 Core 3 2V 5 6 7 8 1 2 3 4 IO 3 3V AMD K6 300 Core 2 2V 1 2 7 8 1 2 3 4 IO 3 45V NOTE INTEL P55C MMX AMD K6 AND CYRIX 6X86L ARE DUAL VOLTAGE CPUs 6X86L IS CYRIX NEW LOW POWER CPU JBFO JBF2 CPU BUS Ratio JBF1 JBF2 10 JBAT1 CMOS Selector Description JBATI Normal default Clear CMOS clear password JROMI Flash ROM Voltage Selector Description JROMI SV SST Winbond 1 2 12V Intel MXIC 2 3 JD1 DIMM Voltage Selector Description JD1 SV DIMM 1 3 2 4 3 34 DIMM 5 7 6 8 2 4 DRAM Configuration System memory RAM is comprised of industry standard 72 pin Single In line Memory Modules SIMMs Burst Extended Data Out BEDO and Extended Data Out EDO memory are the latest DRAM chip designs that perform a lot better than the Fast Page mode DRAM type With BEDO and EDO memory CPU access to memory is 10 to 15 faster The VT82C580VP3 is able to support standard FPM Fast Page Mode
4. BIOS ROM code of the add on card to system memory for faster access It may improve the performance of the add on card Some add on cards will not function properly if it s BIOS ROM code is shadowed To use these options correctly you need to know the memory address range used by the BIOS ROM of each add on card The options are Enabled Disabled Default 17 3 3 Chipset Features Setup ROM PCUISA BIOS QASLXXXX CHIPSET FEATURES SETUP AWARD SOFTWARE INC DRAM Auto Configuration Disabled On Chip USB Disabled DRAM Timing Control Normal SDRAM Cycle Length 3 SDRAM Bank Interleave Disabled Sustained 3T write Disabled 2 Bank PBSRAM 3 1 1 1 Read Pipeline Disabled Write Pipeline Enabled Cache Timing Fast Linear Burst Disabled Video BIOS Cacheable Disabled System BIOS Cacheable Disabled Memory Hole At 15MB Addr Disabled ESC Quit lt gt Select Fl Help PU PD FS Old Values Shift F2 F7 Load Setup Defaults Video BIOS Cacheable When enabled allows the system to use the video BIOS codes C0000H C7FFFH from cache instead of the slower DRAMs or ROMs Video BIOS must be shadowed first The options are Enabled Default Disabled System BIOS Cacheable When enabled allows the ROM area E0000H FFFFFH to be cacheable when cache controller is activated The options are Enabled Default Disabled Memory Hold At 15MB Addr When enabled the memory hole at the 15MB add
5. EDO Extended Data Out or BEDO Burst Extended Data Out memory can be installed in a variety of cong as show in the following table Total Memory Bank 0 1 Bank 2 3 Bank4 5 DIMMI DIMM2 SIMMI SIMM2 4MB amp 4MB 8MB amp 8MB 16MB amp 16MB 32MB amp 32MB 64MB amp 64MB 2 5 Cache Memory Configuration The VT82C580VP3 comes with onboard 256KB 512KB synchronous 3 3V Pipeline Burst SRAMs Please note that for 256K secondary cache U20 and U15 should be mounted with 32x32 PBSRAM otherwise 64x32 PBSRAM can offer 512K secondary cache Chapter 3 BIOS setup Award s ROM BIOS provides a built in Setup program which allows user to modify the basic system configuration and hardware parameters The modified data will be stored in a battery backed CMOS ram so data will be retained even when the power is turned off In general the information saved in the CMOS ram stay unchanged unless there is config change in the system such as hard drive replacement or new equipment change It is possible that CMOS had a battery failure which cause data loss in CMOS ram If so re enter system config parameters become necessary TO ENTER SETUP PROGRAM Power on the computer and press lt Del gt key immediately will bring you into BIOS CMOS SETUP UTILITY ROM PCUISA BIOS 2A5LXXXX CMOS SETUP UTILITY AWARD SOFTWARE INC STANDARD CMOS SETUP INTEGRATED PERIPHERALS BIOS FEATURES SETUP SUPERVISOR PASSWORD CHIPSET FEATURES SETUP U
6. Processor Installation CPU CLOCK Pe JCK2 JCK3 JCK4 JBFO JBF1 JBF2 JPW1 ele RATIO CLOCK 50 MHZ CLOSE OPEN IS 25 CLOSE OPEN PEN 12345678 OPEN OX OX re aos for Jorn cs pis 23 23 ctose OPEN foren 78 To 2X 23 2 3 CLOSE OPEN OPEN 2x 41 ADDENDUM 5V 1A ver 2 2A Reg case connector TB LED PW LED Keylock Speaker Reset SU LED SU SW HD LED Reg AMD K6 2 300 CPU CLOCK E JCK2 JCK3 JCK4 IBFO JBF1 JBF2 JPWI RATIO CLOCK 0 DODODO TB LED PW LED Keylock 5V 1A ver 2 2A Speaker Reset SU LED SU SW HD LED Ll AMD O K6 2 300 ceu oo E pegijicg 1CKs JCK4 JBF0__ JBFI JBF2 JPw svi five O0 42
7. SIC IN a 12 23 23 60 MHZ 1 2 2 3 60 MHZ 1 2 3 psic omz y Foo aes oa a peer ros oss Tasers ores 2 gt 3 3 2 3 OPEN CLOSE OPEN 125 67 8 OPEN 1 2 3X 23 OPEN JCLOSEJOPEN 78 1234 2 3X 2 3 AMD K5 K6 K6 2 Processor Installation CPU CLOCK 1 JCK2 ma JBFO JBF1 JPWI BENE RATIO CLOCK 23 23 IRS PRIORI 8 DIES 1 gt kerrie 29vi3v 66 MHZ 253 12 2 K6 PR235 iovinav 66 MHZ 23 1 2 1 2 OPEN OPEN OPEN 1 2 5 4 5 6 7 8 OPEN 12 15X EE fora OPEN forex possserspon pa at 123 Dr 123 CPU CLOCK ER JCK2 JCK3 JCK4 JBFO JBFI1 JBF2 JPW1 AL RATIO CLOCK 12 E MI 3 52V 55 MHZ L2 25 prose fora Jon 1254 5673 OPEN Caos prs on frasi ara o 2 3 2 3 CLOSE OPEN open 1 2 2 3 CLOSE OPEN OPEN L2 23 CLOSE JOPEN OPEN Ee 2X 1278 40 Intel Pentium Processor Installation CPU CLOCK 1 JCK2 cal JBFO JBFI JPW1 meed RATIO CLOCK 3 23 12 3 HERE 3 23 3 3 23 eros CrOsE ore 125678 OPN 12 23x 60 MHZ 1 2 FT IS fora CLOSE OPEN 123073 OPEN L 2 L 3x Ca v Tesi os EE 3 3 23 forex nostre rs fr2saf i2 AMD K5 K6 K6 2 Processor Installation CPU CLOCK Ei JCK2 JCK3 JCK4 JBFO JBF1 JPW1 RATIO CLOCK KS PR_90 PR120 3 52V__ 60MHZ 1 2 2 3 OPEN KS PR166 3 52V________ 66 MHZ 2 3 12 OPEN Kerro 29VRIV ee nz 23 12 2 3x EES 23 12 2 45x Cyrix 6x86
8. Selector Jumper 50MHZ 55MHZ 60MHZ 66MHZ 75MHZ JCK1 2 3 2 3 1 2 2 3 1 2 JCK2 2 2 3 2 3 2 3 1 2 2 3 JCK3 3 1 2 2 3 2 3 1 2 JCK4 1 2 1 2 1 2 1 2 1 2 PCICLK 25 32 27 382 30 32 33 32 3715 32 JPW1 CPU Voltage Selector FOR TWO R Description CPU Voltage JPWI IV1 IV2 Open 1 3 2 4 31 X86 016 Open 1 3 2 4 9 3 3V Core 3 3V 1 2 Open 1 32 4 IO 3 3 P54C STD VR AMD 5K86 C F Cyrix 6X86 016 3 52V Core 3 4 3 6V 3 4 Open 1 3 2 4 IO 3 4 3 6V P54C VRE 1 5K86 B Cyrix 6X86 028 2 8V Core 2 8V 5 6 1 2 3 4 Open IO 3 3V P55C AMD 5K86 H J 2 5V Core 2 5V 7 8 1 2 3 4 Open IO 3 3V P55C AMD 5K86 K Addendum FOR PENTIUN 5V 2 MAIN BOARD FOR TWO REGULATOR PLEASE UPDATE MANUAL WITH FOLLOWING AMENDMENTS 1 PAGE 6 CHAPTER 2 2 1 MOTHERBOARD LAYOUT JV2 SHOULD BE POSITIONED Jul 3 2 PAGE 10 AMD 5K86 PROCESSOR INSTALLATION AMD 5K86 Processor installation 2 5 NOTE This CPU had not been tested when this manual was printed 3 PAGE 10 JPWI CPU VOLTAGE SELECTOR 32 JPWI1 CPU Voltage Selector FOR TWO REGULATOR Description CPU Voltage JPWI JVI JV2 3 3V Core 3 3V 1 2 Open 1 2 3 4 IO 3 3 P54C STD VR AMD K5 C F Cyrix 6X86 016 3 52V Core 3 4 3 6V 3 4 Open 1 2 3 4 IO 3 4 3 6V P54C VRE AMD K5 B Cyrix 6X86 028 2 8V Core 2 8V 5 6 1 23 4 Open IO 3 3V INTEL P55C AMD K5 H J Cyrix 6x86L 2 5V Core 2 5V 7 8 1 2 3 4 Open I
9. sese 22 3 6 Load BIOS defaults nne ikna Ree ke eee eet 23 3 7 Load Setup defaults se za iret etnies 23 3 8 Integrated PeripheralS sse nee 24 3 9 Password Setting iii rn 25 3 10 IDE HDD auto detection i 26 3 11 Save amp Exit Setup is ss aliena 27 3 12 Exit without Saving iii 27 Chapter 1 Introduction The VT82C580VPX mainboard combines the advanced capabilities of the VIA Apollo VPX chipset with a high performance concurrent PCI local bus architecture to provide the ideal platform for unleashing the unsurpassed speed and power of the Intel Pentium processor Cyrix 6x86 and AMD K5 K6 processors and can be easily upgraded for 321 pin ZIF socket The processor s advanced performance is complemented by a second level write back PB SRAM up to 512KB and main memory up to 512MB RAM The main memory is initialed using the board s two 72 pin SIMM sockets and two 168 pin DIMM sockets that accept either the new high performance EDO BEDO or Fast Page mode DRAM The VT82C580VPX integrates a full set of I O features on board including two 16550 UART compatible serial ports one EPP ECP capable port one floppy disk controller and one infrared communication controller On chip built in Enhanced IDE controller provides convenient high speed PCI bus Master connection capable of four IDE devices including Hard disk and CD ROM VIA builds all products to exact ing standards using
10. the highest quality components available We are proud to provide this system board and hope it brings you years of reliable service 1 1 Main Features Supports Intel Pentium P54C CPU speed 75 90 100 120 133 150 166 200 233MHZ processors in a 321 pin ZIF socket upgradable to P54C series P54CT PSSC optional by splitting the voltage regulator Cyrix 6x86 6x86L 6X86MX MII processors AMD K5 K6 K6 2 processors VIA Apollo VPX chipset includes a CPU interface controller advanced cache controller intergrateed DRAM controller asynchronous synchronous PCI local bus interface intergraded power management unit internal keyboard controller real time clock Support on board 256K 512K synchronous PBSRAM Support synchronous DRAM using 168 pin DIMM modules of 8 16 32 OPTIONAL Take up to 256MB RAM in one bank using 72 pin SIMM modules of 1 2 4 8 16 32 64 or 128MB with supports for EDO BEDO or Fast Page mode memory Three 16 bit ISA expansion slots and three 32 bit PCI expansion slots ntegrated Enhanced PCI local bus IDE controller with two connectors support up to four IDE devices such as Hard disk CD ROM Integrated ITE IT8661F RF multi I O chipset that offers two 16550 UART compatible serial ports one EPP ECP capable port one IR port and one Floppy Disk Drive connector Supports 128KB Flash ROM PCB size 22 x 22 5 cm Chapter 2 2 1 Motherboard Layout VT82C586A VT82C585
11. 5 Reserved Disabled PM Events VGA OFF LPT amp COM LPT COM HDD amp FDD ON ESC Quit lt gt Select Item DMA MASTER OFF Fl Help PU PD Modify Primary INTR ON FS Old Values Shift F2 Color IRQ3 COM2 Primary F7 Load Setup Defaults IRQ4 COMI Primary Power Management When enable allows you to use Power Management features PM Control by APM The option No allows the BIOS to ignore the APM Advanced Power Management specification Selecting Yes will allow the BIOS wait for APM s prompt before it enters Doze mode Standby mode or Suspend mode If the APM is installed it will prompt the BIOS to set the system into the power saving mode after all tasks are done Video off Option This feature provides the selections of the video display power saving mode The option Suspend gt Off allows the display blanks if the system enters Suspend mode The option All modes gt Off allows the video display banks if the system enters Doze mode or Suspend mode The option Always On allows the video display to stay in Standby mode even the system enters Doze or Suspend mode Video Off Method The option V H SYNC Blank allows the BIOS to blank off screen display by turning off the V Sync signals sent from add on VGA card DPMS Supported allows the BIOS to blank off screen display by your add on VGA card which supports DPMS Display Power Management Signaling function Blank Screen a
12. E8H COMA Enable onboard serial port and address is COM4 2E8H Disabled Disable onboard I O Chip s Serial port 1 AUTO BIOS will automatically detect the Onboard Serial Port Onboard Serial Port 2 The field allows the user to select the serial port The default value is AUTO COMI Enable onboard serial port1 and address is COM1 3F8H COM2 Enable onboard serial portl and address is COM2 2F8H COM3 Enable onboard serial portl and address is COM3 3E8H COM4 Enable onboard serial portl and address is COM4 2E8H Disabled Disable onboard I O Chip s Serial port 1 AUTO BIOS will automatically detect the Onboard Serial Port Onboard Parallel Port The field allows the user to select the LPT port The default value is 378H IRQ7 378H Enable onboard LPT port and address is 378H and IRQ7 278H Enable onboard LPT port and address is 278H and IRQ5 3BCH Enable onboard LPT port and address is 3BCH and IRQ7 Disabled Disable onboard I O Chip s LPT port 3 9 Password Setting 1 If CMOS is corrupted or the option was not used a default password stored in the ROM will be used The screen will display the following message Enter Password Press the Enter key to continue after proper password is given 2 If CMOS is corrupted or the option was used earlier and the user wish to change default password the SETUP UTILITY will display a message and ask for a confirmation Confirm Password 3 After pressing the Enter key ROM password i
13. IO 3 3V INTEL P55C AMD K5 H J Cyrix 6x861 2 5V Core 2 5V 7 8 1 2 3 4 Open IO 3 3V INTEL P55C AMD K5 K Addendum FOR PENTIUN 5V 2 MAIN BOARD FOR TWO REGULATOR PLEASE UPDATE MANUAL WITH FOLLWING AMENDMENTS AMD K5 K6 Processor installation 3 PAGE 10 JPW1 CPU VOLTAGE SELECTOR JPW1 CPU Voltage Selector FOR TWO REG Description CPU Voltage JPWI JV1 JV2 Open 1 23 4 6 016 Open 1 23 4 1 2 3 4 Open 6L 1 2 3 4 Open 3 3V Core 3 3V 1 2 Open 1 3 2 4 IO 3 3 P54C STD VR AMD K5 C F Cyrix 6X86 016 3 52V Core 3 4 3 6V 3 4 Open 1 3 2 4 IO 3 4 3 6V P54C VRE AMD K5 B Cyrix 6X86 028 2 8V Core 2 8V 5 6 1 2 3 4 Open IO 3 3V INTEL P55C AMD K5 H J Cyrix 6x861 2 5V Core 2 5V 7 8 1 2 3 4 Open IO 3 3V INTEL P55C AMD K5 K 36 ADDENDUM SV 1A VER 2 2 PLEASE FIND THE BELOW UPDATE JUMPER SETTINGS FOR 5V 1A VER2 2 Intel Pentium Processor Installation CPU CLOCK ma JBFO JBFI JPW1 RATIO CLOCK 23 23 12 Pac oume ov uz j Lora Jeroseloses 125073 ores io ox AN A 23 re E 23 fore nose f re peaa x AMD K5 K6 Processor Installation CPU CLOCK 1 JCK2 JBFO JBF1 JPWI al RATIO CLOCK 2 3 Cyrix 6x86 Processor Installation CPU CLOCK toc JCK2 JCK3 JCK4 JBFO JBF1 JBF2 JPW1 RATIO CLOCK i2 25 tose jor forn 3545478 OPEN 2x ar 2 erosi forn OPEN rsa Serapo OPEN OX 2 3 2 3 CLOSE OPEN open 2
14. MAIN BOARD User s Guide VER 5V 1A User s Manual The information presented in this publication has been carefully for reliability however no responsibility is assumed for inaccuracies Specifications are subject to change without notice TRADEMARKS IBM registered trademark of International Business Machines Corp Intel Pentium registered trademark of Intel Corp Award registered trademark of Award Software Inc All other trademarks mentioned in this manual are registered property of the respective owners COPYRIGHT This manual may not in whole or in part be photocopied reproduced transcribed translated or transmitted in whatsoever from without the written consent of the manufacturer except for Copies retained by the purchaser for personnel archival purposes Table of Contents Chapter 1 Introduction 4 1 1 Main Features na tette terree eed 5 Chapter 2 2 1 Motherboard layout 6 2 2 Connectors illa 7 2 3 Jumper setting cineteca lino ei 9 2 4 DRAM configuration iii 12 2 5 Cache memory configuration ii 12 Chapter 3 BIOS setup 13 3 1 Standard CMOS setup i 14 3 2 BIOS Features setup cielo 15 3 3 Chipset Features Setup ie 18 3 4 Power Management setup essere 20 3 5 PNP PCI Configuration
15. O 3 3V INTEL P55C AMD K5 K Addendum FOR PENTIUN 5V 2 MAIN BOARD FOR ONE REGULATOR PLEASE UPDATE MANUAL WITH FOLLWING AMENDMENTS 1 PAGE 6 CHAPTER 2 2 1 MOTHERBOARD LAYOUT JV2 SHOULD BE POSITIONED M 3 2 PAGE 10 AMD 5K86 PROCESSOR INSTALLATION AMD 5K86 Processor installation NOTE This CPU had not been tested when this manual was peinted 3 PAGE 10 JPWI CPU VOLTAGE SELECTOR JPWI1 CPU Voltage Selector FOR ONE REGULATOR 33 Description CPU Voltage JPWI JV1 3 3V Core 3 3V 1 2 1 2 3 4 11 2 3 4 IO 3 3 P54C STD VR AMD 5K86 C F Cyrix 6X86 016 3 52V Core 3 4 3 6V 3 4 1 2 3 4 1 2 3 4 IO 3 4 3 6V P54C VRE AMD 5K86 B Cyrix 6X86 028 Addendum FOR PENTIUN 5V 2 MAIN BOARD FOR TWO REGULATOR PLEASE UPDATE MANUAL WITH FOLLWING AMENDMENTS 1 PAGE 6 CHAPTER 2 2 1 MOTHERBOARD LAYOUT JV2 SHOULD BE POSITIONED 2 PAGE 10 AMD 5K86 PROCESSOR INSTALLATION Cyrix 6x86 Processor installation NOTE This CPU had not been tested when this manual was peinted 3 PAGE 10 JPW1 CPU VOLTAGE SELECTOR JPW1 CPU Voltage Selector FOR TWO REG Description CPU Voltage JPW1 JV1 JV2 Open 1 23 4 6 016 Open 1 23 4 1 2 3 4 Open 6L 1 2 3 4 Open 3 3V Core 3 3V 1 2 Open 1 3 2 4 IO 3 3 P54C STD VR AMD K5 C F Cyrix 6X86 016 3 52V Core 3 4 3 6V 3 4 Open 1 3 2 4 IO 3 4 3 6V P54C VRE AMD KS B Cyrix 6X86 028 2 8V Core 2 8V 5 6 1 2 3 4 Open
16. SER PASSWORD POWER MANAGEMENT SETUP IDE HDD AUTO DETECTION PNP PCI CONFIGURATION HDD LOW LEVEL FORMAT LOAD SETUP DEFAULTS SAVE amp EXIT SETUP EXIT WITHOUT SAVING ESC Quit lt gt Select Item F10 Save amp Exit Setup Shift F2 Change Color The menu displays all the major selection items and allows user to select any one of show item The selection is made by moving cursor press any direction key to the item and press enter key An on line help message is displayed at the bottom of the screen as cursor is moving to various items which provides user better understanding of each function When a selection is made the menu of selected item will appear so the user can modify associated configuration parameters 13 3 1 Standard CMOS setup ROM PCI SA BIOS ZASLXXX STANDARD CMOS SETUP AWARD SOFTWARE INC Date mm dd yy Wed Jan 1 1997 Time hh mm ss 00 00 00 HARD DISKS TYPE SIZE CYLS HEAD PRECOMP LANDZ SECTOR MODE Primary Master Auto 0 0 0 0 0 0 Auto Primary Slave Auto Auto Auto 0 0 0 0 0 0 Secondary Master Auto 0 0 0 0 0 0 Auto 0 0 0 0 0 0 Secondary Slave Auto Driver A 1 44M 3 5 in Driver B None Base Memory 640K Extended Memory 7168K Video EGA VGA Other Memory 384K Halt On All Errors Total Memory 8192K ESC Quit lt gt Select Item PU PD Modify FI Help shift F2 Change Color The Standard CMOS setup screen is displayed above System BIOS automatically d
17. a capability to recover from any possible error Virus Warning When enabled assigns the BIOS to monitor the master boot sector and the DOS boot sector of the first hard disk drive The options are Enabled Disabled Default CPU Internal Cache When enabled improves the system performance Disable this item when testing or trouble shooting The options are Enabled Default Disabled External Cache When enabled supports an optional cache SRAM 15 The options are Enabled Default Disabled Quick Power On Self Test When enabled allows the BIOS to bypass the extensive memory test The options are Enabled Disabled Default Boot Sequence Allows the system BIOS to first try to boot the operating system from the selected disk drive The options are A C SCSI Default C A SCSI C CDROM A CDROM C A D A SCSI E A SCSI F A SCSI SCSLA C SCSLC A C only LS ZIP C Swap Floppy Drive When enabled allows you to switch the order in which the operating system accesses the floppy drives during boot up The options are Enabled Disabled Default Boot Up Floppy Seek When enabled assigns the BIOS to perform floppy diskette drive tests by issuing the time consuming seek commands The options are Enabled Default Disabled Boot Up Numlock Status When set to On allows the BIOS to automatically enable the Num Lock function when the system boots up The options are On Default Off Port 92H Fa
18. er management timers when a no activity event is detected in the LPT COM ports Selecting NONE to disable the PM timer even if a no activity event is detected HDD amp FDD Selecting ON will enable the power management timers when a no activity event is detected in the hard disk drive and floppy disk drive Selecting OFF to disable the PM timer event if a no activity event is detected DMA Master When the master is working the system will not have SMI signal until the master is finished Primary INTR When enabled you can choose any IRQ IRQ When set at Primary the processor will power down only after the BIOS detects a no IRQ activity during the time specified by the Suspend time If set at Secondary event the system will distinguish whether an interrupt accesses an I O address or not If it does the system enters the standby mode If not the system enters the dreaming mode that is the system goes back full on status but leaves the monitor blank For instance if the system connects to a LAN and receives an interrupt from its file server the system will enter the dreaming mode to execute the corresponding calling routine 21 3 5 PNP PCI Configuration ROM PCUISA BIOS QASLXXXX PNP PCI CONFIGURATION SETUP AWARD SOFTWARE INC PNP OS Installed No CPU to PCI Write Buffer Enabled Resources Controlled By Manual PCI Dynamic Bursting Enabled Reset Configuration Data Disabled PCI Master 0 WS Write
19. etects memory size thus no changes are necessary it has a few items for setting Each item may have one or more option settings It allows you to change the system Date and Time IDE hard disk floppy disk drive types for drive A and B boot up video display mode and POST error handling selection Use the arrow keys to highlights the item and then use the lt Pgup gt or lt Pgdn gt keys to select the value you want in each item Hard Disk Configurations TYPE Select from 1 to 45 to fill remaining fields with redefined values of disk drives Select User to fill the remaining fields Select Auto to detect the HDD type automatically SIZE The hard disk size The unit is Mega Byte CYLS The cylinder number of the hard disk HEAD The read write head number of hard disk The range is from 1 to 16 PRECOMP The cylinder number at which the disk drive changes the write timing LANDZ The cylinder number that the disk drive heads read write are seated when The disk drive is parked SECTOR The sector number of each track defined on the hard disk The range is from 14 I to 64 Mode Select AUTO to detect the mode type automatically If your hard disk supports the LBA mode select LBA or Large However if your hard disk cyclinder is more than 1024 and does not support the LBA function you have to set at Large Select Normal if your hard disk supporting cylinder is below 1024 3 2 BIOS Features Setu
20. f the option was not used or current password user defined password the user can change the password and store new one in CMOS RAM A maximum of 8 characters can be entered 25 3 10 IDE HDD Auto Detection The IDE HDD AUTO DETECTION utility is a very useful tool specially when you do not know which kind of hard disk type you are using You can use this utility to detect the correct disk type installed in the system automatically But now you can set HARD DISK TYPE to auto in the STANDARD CMOS SETUP You don t need the IDE HDD AUTO DETECTION utility The BIOS will Auto detect the hard disk size and model on display during POST ROM PCUISA BIOS 2ASLXXXX CMOS SETUP UTILITY AWARD SOFTWARE INC HARD DISK TYPE SIZE CYLS HEADS PRECOMP LANDZONE SECTORS MODE Primary Master 343 665 16 65535 664 63 Normal Primary Slave Secondary Master Secondary Slave Note HDD modes The Award BIOS supports 3 HDD modes Normal LBA amp LARGE Normal mode Generic access mode in which either the BIOS or the IDE controller will make any transformations during accessing The maximum number of cylinders head amp sectors for Normal mode are 1024 16 amp 63 no Cyclinder 1024 x no Head 16 x no Sector 63 x no per sector 512 528 Megabytes If user set in Normal mode the maximum accessible HDD size will be 528 Megabyte even though its physical size may be greater than that LBA Logical Block Addressing mode A new HDD accessing met
21. hod to overcome the 528 Megabyte bottleneck The number of cylinders head amp sectors show in setup may not be the number physically contained in the HDD During HDD accessing the IDE controller will transform the logic address described by sector head amp cylinder into its own physical address inside the HDD The maximum HDD size supported by LBA mode is 8 4 Gigabytes which is obtained by the following formula no Cylinder 1024 x no Head 255 x no Sector 63 x bytes per sector 512 8 4 Gigabytes 26 LARGE mode Extended HDD access mode supported by Award Software Some IDE HDDs contain more than 1024 cylinder without LBA support in some cases user do not want LBA The Award BIOS provides another alternative to support these kinds of LARGE mode CYLS HEADS SECTOR MODE 1120 16 59 Normal 560 32 59 Large BIOS tricks DOS or other OS that the number of cylinders is less than 1024 by dividing it by 2 At the same time the number of heads is multiplied by 2 Averse transformation process will be made inside INT 12h in order to access the right HDD addess the right HDD address no Cylinder 1024 x no Head 32 x no Sector 63 X bytes per sector 512 1 Gigabytes Note To support LBA or LARGE mode of HDDs there must be some softwares involved All these softwares are located in the Award HDD Service Routine INT 13h It may be failed to access a HDD with LBA LARGE mode selected if you are runing under a operati
22. llows the BIOS to blank screen display by turning off the red green blue signals 20 Conserve Mode When the Doze Mode of the system being happened the Doze Mode is handled by hardware not by SMI function Modem use IRQ When the system is in green function modem wakes up the system through IRQ HDD Power Down Selecting Disabled will turn off the hard disk drive HDD motor Selecting 1Min 15Min allows you to define the HDD idle time before the HDD enters Power Saving mode The option When Suspend lets the BIOS turn the HDD motor off when the system is in Suspend mode The options 1Min 15Min and When Suspend will not work concurrently When HDD is in Power Saving Mode any access to the HDD will wake the HDD up Doze Mode When disabled the system will not enter Doze mode The specified time option define the idle time the system takes before it enters Doze mode Suspend Mode When disabled the system will not enter Suspend mode The specified time option defines the idle time the system takes before it enters Suspend mode VGA Selecting ON will enable the power management timers when a no activity events is detected in the VGA Selecting OFF to disable the PM timer even if a no activity event is detected LPT amp COM Selecting LPT amp COM will enable the power management timers when a no activity event is detected in the LPT and COM ports Selecting LPT COM will enable the pow
23. ng system which replaces the whole INT 13h UNIX operating systems do not support either or LARGE and must utilize the standard mode UNIX can support drives large than 528MB 3 11 Save amp Exit Setup After you have made changes under Setup press lt ESC gt to return to the main menu Move cursor to Save and Exit Setup or press F10 and then press Y to change the CMOS setup If you did not change anything press lt ESC gt again or move cursor to Exit Without Saving and press Y to retain the Setup settings The following message will appear at the center of the screen to allow you to save data to CMOS and exit the setup utility SAVE to CMOS and EXIT Y N 3 12 Exit Without Saving The EXIT WITHOUT SAVING option will bring you back to normal boot up procedure without saving any into CMOS RAM All of the old data in the CMOS will not be destroyed If you select this feature the following message will appear at the center of the screen to allow you to exit the setup utility without saving CMOS modifications Quit Without Saving Y N 5V 1A 2 END 27 A ddendum ERROR FOR PENTIUN 5V 2 MAIN BOARD FOR ONE REGULATOR AMDe 5K86 Processor installation JPWI1 CPU Voltage Selector FOR ONE REGULATOR 3 3V Core 3 3V 1 2 1 2 3 4 IO 3 3 P54C STD VR AMDe 5K86 C F Cyrixe 6X86 0 3 52V Core 3 4 3 6V 3 4 1 2 3 4 IO 3 4 3 6V P54C VRE AMDe 5K86 B Cyrixe 6X86 028 FOR OLD VER JUMPER SETTING De
24. oard Parallel Port 378 IRQ7 OnChip IDE First Channel When enabled allows the IDE driver to use the first channel of the primary IDE OnChip IDE Second Channel When enabled allows the IDE drive to use the second channel of the primary IDE IDE Prefetch Mode When enabled allows the system BIOS to utilize the prefetch buffer of the onboard IDE controller to prefetch the next sequential data of the current access IDE Primary Slave PIO The default value is Auto Auto BIOS will automatically detect the Onboard Primary Slave PCI IDE HDD accessing mode Mode 0 4 Manually set the IDE accessing mode IDE Secondary Master PIO The default value is Auto Auto BIOS will automatically detect the Onboard Secondary Master PCI IDE HDD accessing mode Mode 0 4 Manually set the IDE accessing mode IDE Primary Master PIO The default value is Auto 24 IDE Secondary Slave PIO The default value is Auto Onboard FDC Controller The default value is Enabled Enabled Enabled the onboard I O Chip s floppy drive interface controller Disabled Disabled the onboard I O Chip s floppy drive interface controller When use on card ISA FDC s controller Onboard Serial Port 1 The field allows the user to select the serial port The default value is AUTO COMI Enable onboard serial port1 and address is COM1 3F8H COM2 Enable onboard serial portl and address is COM2 2F8H COM3 Enable onboard serial port and address is COM3 3
25. p ROM PCUISA BIOS 2A5LXXXX BIOS FEATURES SETUP AWARD SOFTWARE INC Virus warning Disabled Video BIOS Shadow Enabled CPU Internal Cache Enabled C8000 CBFFF Shadow Disabled External Cache Enabled CC000 CFFFF Shadow Disabled Quick Power On Self Test Disabled D0000 D3FFF Shadow Disabled Boot Sequence A C SCSI D4000 D7FFF Shadow Disabled Swap Floppy Drive Disabled D8000 DBFFF Shadow Disabled Boot Up Floppy Seek Enabled DC000 DFFFF Shadow Disabled Boot Up Numlock Status On Boot Up System Speed High Gate A20 Option Normal Typematic Rate Setting Disabled Typematic Rate Chars Sec 6 Typematic Delay Msec 250 Security Option Setup IDE Second Channel Control Enabled PCI VGA Palette Snoop Disabled ESC Quit Select Item OS Select for DRAM gt 64MB Non OS2 Fl Help PU PD Modify FS Old Values Shift F2 Color F7 Load Setup Defaults Selecting the BIOS FEATURE SETUP option in the CMOS setup utility menu allows user to change system related parameters in the display menu This menu shows all of the manufacturer s default values of SV PSSV Again user can move the cursor by pressing direction keys and lt PgDn gt or lt PgUp gt key to modify the parameters Pressing F1 key to display help message of the selected item The setup program also provides 2 convenient ways to load the default parameter data from CMOS F7 area if shown data is corrupted This provides the system
26. ress will be relocated to the 15 16MB address range of the ISA cycle when the processor accesses the 15 16MB address area When disabled the memory hole at the 15MB address will be treated as a DRAM cycle when the processor accesses the 15 16MB address 18 The options are Enabled Disabled Default Sustained 3T Write The cache architecture adopts Write Through When Write Through is enabled the performance is better under most application environment because the 580VP FIFO queue is deep The options are Enabled Disabled Default Read Write Pipeline Turn on Read Write Pipeline operation to increase performance DRAM Timing Control Allows you to speed up the data access of 82C585M For example DRAM type Turbo Fast FP 7 V EDO 6 V EDO 7 V The options are Turbo Fast Medium Normal 19 3 4 Power Management Setup ROM PCUISA BIOS 2A5LXXXX POWER MANAGEMENT SETUP AWARD SOFTWARE INC Power Management User Defined IRQS LPT2 Primary PM Control by APM Yes IRQ6 Floppy Disk Primary Video off Option Suspend gt Off IRQ7 LPTI Primary Video off Method VIH SYNC Blank IRQ8 RTC Alarm Disabled Conserve Mode Disabled IRQ9 IRQ2 Redir Secondary Moden Use IRQ 3 IRQIO Reserved Secondary IRQI1 Reserved Secondary PM Timer IRQ12 PS 2Mouse Primary HDD Power Down Disable IRQI3 Coprocessor Primary Doze Mode Disbale IRQ14 Hard Disk Primary Suspend Mode Disable IRQ1
27. scription CPU Voltage JPWI JV1 3 3V Core 3 3V 1 2 1 2 3 4 1 2 3 4 IO 3 3 P54C STD VR AMDe 5K86 C F Cyrixe 6X86 016 3 52V Core 3 4 3 6V 3 4 1 2 3 4 Open IO 3 4 3 6V P54C VRE AMDe 5K86 B Cyrixe 6X86 028 2 8V Core 2 7 2 9V 5 6 1 2 3 4 Open IO 3 3V P55C AMDe 5K86 H J 2 5V Core 2 5V 7 8 1 2 3 4 Open IO 3 3V P55C AMDe 5K86 K 29 Addendum o FOR PENTIUN 5V 2 MAIN BOARD FOR TWO REGULATOR AMDe 5K86 Processor installation CPU clock JCK1 4 CPU Speed Selector Jumper 50MHZ 55MHZ 60MHZ 66MHZ 75MHZ JCK1 2 3 2 3 1 2 2 3 1 2 JCK2 2 3 2 3 2 3 1 2 2 3 JCK3 2 3 1 2 2 3 2 3 1 2 JCK4 1 2 1 2 1 2 1 2 1 2 PCICLK 25 32 21 5 32 30 32 333132 37 52 JPW1 CPU Voltage Selector FOR TWO REGULATOR Description CPU Voltage JPW1 IVI IV2 Open 1 3 2 4 X86 016 Open 1 3 2 4 28 1 2 3 4 Open 1 2 3 4 Open 30 3 3V Core 3 3V 1 2 Open 1 3 2 4 IO 3 3 P54C STD VR AMDe 5K86 C F Cyrixe 6X86 016 3 52V Core 3 4 3 6V 3 4 Open 1 3 2 4 IO 3 4 3 6V P54C VRE AMDe 5K86 B Cyrixe 6X86 028 2 8V Core 2 8V 5 6 1 2 3 4 Open IO 3 3V P55C AMDe 5K86 H J Cyrix 6X86L 2 5V Core 2 5V 7 8 1 2 3 4 Open IO 3 3V P55C AMDe 5K86 K AMDe 5K86 Processor installation CPU clock ______ SYS clock JCKIJCK32JCK3JCK4JBF1 JBF2 2 3 2 3 1 2 open K86 PR90 PR120 60 MHZ 1 2 2 3 2 3 1 2 open open K86 PR100 PR133 66 MHZ 23 12 2 3 1 2 open open JCK1 4 CPU Speed
28. st A20G When enabled allows the A20G bus line signal generated from the chipset 82C586 PC AT to directly pass to port 92H instead of the keyboard controller It will speed up the system performance The options are Fast Normal Default Typematic Rate Setting The term typematic means that when a keyboard key is held down the character is repeatedly entered until the key is released When this item is enabled you may change the typematic repeat rate The options are Disabled Default Enabled Typematic Rate Chars Sec Sets the rate of a character repeat when the key is held down The options are 6 Default 8 10 12 15 20 24 30 Typematic Delay Msec Sets the delay time before a character is repeated The options are 250 Default 500 750 1000 millisecond 16 Security Option Allows you to set the security level of the system The options are Setup Default System PCI VGA Paiette Snoop When enabled allows you install an enhanced graphics adapter card If your graphics adapter card does not support the Pallete Snoop function please set at Disable to avoid system malfunctions The options are Enabled Disabled Default Video BIOS Shadow When enabled allows the BIOS to copy the video ROM code of the add on video cards to the system memory for faster access The options are Enabled Default Disabled C8000 CBFFF to DC000 DFFFF Shadow When enabled allows the BIOS to copy the
29. with the address falling in same 1KB space This improves the PCI bus through put The options are Enabled Default Disabled PCI Master 0 WS Write When enabled allows a zero wait state cycle delay when the PCI master drive writes data to DRAM The options are Enabled Disabled Default 22 3 6 Load BIOS Defaults The BIOS defaults contain the most appropriate values of the system parameters that allows minimum system performance The OEM manufacturer may change the defaults through MODBIN before the binary image burns into the ROM 3 7 Load Setup Defaults Selecting this field loads the factory defaults for BIOS and Chipset Features which the system automatically detects 23 3 8 Integrated Peripherals ROM PCUISA BIOS 2A5LXXXX INTEGATED PERIPHEALS AWARD SOFTWARE INC OnChip IDE first channel Enabled Parellel Port Mode Onchip IDE second channel Enabled IDE Prefetch Mode Enabled IDE HDD Block Mode Enabled IDE Primary Master PIO Auto IDE Primary Slave PIO Auto IDE Secondary Master PIO Auto IDE Secondary Slave PIO Auto IDE Primary Master UDMA Auto IDE Primary Slave UDMA Auto IDE Secondary Master UDMA Auto IDE Secondary Slave UDMA Auto Onboard FDC Controller Enabled Onboard Serial Port 1 Auto Onboard Serial Port 2 Auto ESC Quit lt gt Select Item IR Address Select Disable Fl Help PU PD Modify FS Old Values Shift F2 Color F7 Load Setup Default Onb
30. x 1 2 2 3 CLOSE OPEN open 2X L2 23 CLOSE OPEN OPEN 12 73 2x 37 SV 1A 2 2 OD SV 1A 2 2 000 DOOL T Intel Pentium O E p T E E ER ps pe gt sr pnm pm p pn e cris E os pe gt fme per pm m pem IR DEE re mr p pe peris ee De per pr pe pes pe a Lp aaa aa VS al al aja aaa eee EERS O EI E A I TITLE E I O EN E NS K5 PR75352V SO MHZ 23 2 Kenn no xov je ZITO pop po forin ns ons o eser ons o Ji sx ore sv fee VIZI qo po pr eos lose ns e eser ions o E MHZ ES ps fa pee erositon ors oss fra P 5 6 7 8 5x ce zia apa es wz los r2 ps ps foren Joven Joren Ja 5678 frz sela fs lr toc l ceu oo jin ___J ck Jcko JCK3JJCK4 JBF0___ JBFI _ JBF2 ewi ____ v va r 3 2 3 12 CLOSE OPEN OPEN 1 2 3 4 5 6 7 8 OPEN 1 2 2X 3 2 3 23 CLOSE OPEN OPEN 1 2 3 4 5 6 7 8 OPEN 1 2 2x SIN ES 2 a 2 3 23 2 cose Loren ore rare zs r2 ax 38 ADDENDUM SV 1A VER 2 2A CN4 Cp NOTE ADD CNI1 TB LED CN10 amp CN4 SO EE i Te OIL CN10 E a El TB LED PW LED Keylock Speaker Reset SU LED SU SW HD LED NOTE DELETE HDD LOW LEVEL FORMAT IN BIOS SETUP 39 ADDENDUM FOR 5V 1A VER 2 2 Intel Pentium Processor Installation CPU CLOCK n JCK2 JCK3 JCK4 JBFO JBF1 JPW1 RATIO CLOCK

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