PIO-821 User`s Manual
Contents
1. Table 4 2 Table of ErrorCode and ErrorString of Pio821 dll Error Code Error ID Comment P10821_NoError OK P10821_ActiveBoardError This board cannot be activated P10821_ExceedFindBoards The board number exceeds the maximum board number 7 P10821_DriverNoOpen Base address is over range P10821_BoardNoActive Base address overlap PIO0821_WriteEEPROMError Write the EEPROM error PIO0821_ModeDAError DA mode is error P10821_DAError Parameter is null or out of range P10821_ConfigError AD gain value is error P10821_TimeoutError Delay time out PIO0821_AdChannelError AD channel value is out of range P1O821_AdPolling TimeOut AD polling is time out P10821_AdPacerTimeOut AD pacer is time out PIO0821_CounterModeError Counter value is out of range P10821_InterruptError Version 1 0 Sep 2003 PPH 019 10 Interrupt is not enable 31 4 2 1 PlO821_GetDilVersion Description Obtain the version information of PIO 821 DLL driver Syntax WORD PI0821_GetDIllVersion void Parameter None Return DLL version information For example If 101 hex value is return it means driver version is 1 01 4 2 2 PlIO821_ActiveBoard Description Activate the device It must be called once before using the other functions of PIO 821PGL PGH board Syntax WORD PI0821_ ActiveBoard BYTE BoardNo Paramet2. WORD PIO_GetConfigAddressSpace WORD wBoardNo WORD wBaseAddr WORD wirq WORD wSubVendor WORD wSubDevice WORD wSubAux WORD wSlotBus WORD wSlotDevice Parameter wBoardNo input board number 0 7 wBaseAddar output Base address wlrq output IRQ number wSubVendor output Sub Vendor ID wSubDevice output Sub Device ID wSubAux output Sub Aux ID wSlotBus output PCI slot wSlotDevice output Device of slot Return NoError OK FindBoardError Cannot find the pio821 card Version 1 0 Sep 2003 PPH 019 10 71 Appendix B IO Base Regi Address Write wBase 0x0 RESET control register RESET control register wBase 0x2 AUX control register AUX control register wBase 0x3 AUX data register AUX data register wBase 0x5 INT mask control register INT mask control register wBase 0x7 AUX pin status register AUX pin status register wBase 0x2a INT polarity control register INT polarity control register wBase 0xc0 8254 counter0O 8254 counter0O wBase 0xc4 8254 counter1 8254 counter1 wBase 0xc8 8254 counter2 8254 counter2 wBase 0xcc Reserved 8254 control word A D Low Byte D A Low Byte A D High Byte D A High Byte DI Low Byte DO Low Byte DI High Byte DO High Byte Reserved A D Gain Control amp multiplexer Control Reserved A D Mode Control Reserved
3. Syntax short PIO_FloatSub2 short nA short nB Parameter nA short integer nB short integer Return Return a short integer nA nB A 2 2 PIO_FloatSub2 Description Compute C nA nB in float format which is 32 bits floating pointer number This function is provided for testing purpose Syntax float PIO_ShortSub float fA short fB Parameter fA float point value fB float point value Return Return float point value nA nB Version 1 0 Sep 2003 PPH 019 10 69 PIO 821 Hardware User s Manual A 2 3 PIO_GetDriverVersion Description Obtain the software version Syntax WORD PIO_GetDriverVersion WORD wDriverVersion Parameter wDriverVersion Driver Version For example If 101 hex is return it means driver version is 1 01 Return NoError A 2 4 PIO_Driverlnit Description This function searches the hardware board If all checks are OK this function will return the total board value Syntax WORD PIO_Driverlnit WORD wBoards WORD wSubVendorlD WORD wSubDevicelD WORD wSubAuxID Parameter wBoards output total board wSubVendorlD input Sub Vendor ID of PIO821 card wSubDevicelD input Sub Device ID of PlIO821 card wSubAuxID input Aux ID of PIO821 card Return NULL Version 1 0 Sep 2003 PPH 019 10 70 PIO 821 Hardware User s Manual A 2 5 PIO_GetConfigAddressSpace Description Get configuration address space of PIO821 card Syntax
4. 2 13 Connecting to floating source configuration Version 1 0 Sep 2003 PPH 019 10 22 Signal Shielding Signal shielding connections in Figure 2 10 to Figure 2 13 are all the same as shown in the Figure 2 14 Please use single point connections for frame grounds not A GND or D GND po 1 PIO821 PGL PGH Vin J A GND Vf D GND Frame Ground Figure 2 14 Signal shielding connections Version 1 0 Sep 2003 PPH 019 10 23 3 Calibration The PIO 821 is already fully calibrated when shipped from the factory including the calibration coefficients which are stored in the EEPROM on board For more precise application of voltages at the system end the following procedure provides a method that allows you to calibrate the board within your system so that you can achieve the correct voltages at your field connection This calibration allows the user to remove the effects of voltage drops caused by IR loss in the cable and or connector At first the user has to prepare the equipment for calibration the precise multi meter Note that the calibrated values for analog output input channels are stored within 3 words in the address of the EEPROM as show in Table 3 1 The calibration procedure will be demonstrated below Table 3 1 Calibration values stored in the EEPROM address The address of the EEPROM The address of the EEPROM for Analog output for Analog input 0 1 Version
5. 821 H L board Diagrams Version 1 0 Sep 2003 PPH 019 10 10 PIO 821 Hardware User s Manual 2 2 PIO 821 s Layout Figure 2 2 shows the layout of the PIO 821 board and the locations of the configuration jumper and connector for signal wiring _ IL rei L OODLE gU Ul CNI CN s d 5 r d Figure 2 2 PIO 821 H L board layout Note CN1 The terminal for digital input CN2 The terminal for digital output CN3 The terminals for the A D and D A converters for voltage input output JP1 No use JP2 D A Reference Voltage Selection JP4 A D Input Type Selection single end or differential JP5 External Clock Internal Clock 2MHz JP6 External Gate Counter0 COUTO Version 1 0 Sep 2003 PPH 019 10 11 2 3 Configuration of the DA AD Output Signals 2 3 1 The Configuration of A D Input Type Reference Source Setting This jumper JP4 is used to select the type of analog input between single ended and differential inputs As shown in Figure 2 3a the user needs to connect pin 1 3 and pin 2 4 to obtain the single ended measurement for the analog input signal which is the default setting However for the differential signal measurement the pin 3 5 and pin 4 6 for the JP4 jumper should be connected as shown Figure 2 3b Furthermore based on the type of analog input configuration the PCI 821PGL PGH can offer 16 single ended or 8 differential analog
6. A D Software Trigger control wBase 0xec A D Status Version 1 0 Sep 2003 PPH 019 10 Reserved o E
7. BoardNo BYTE Mode float fValue Parameter BoardNo input PIO821 board number Mode input D A Channel mode1 2 1 5V 2 10V fValue input analog output value Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver cannot be opened PlO821_ExceedFindBoards BoardNo exceeds the current total board number N PlO821_BoardNoActive The board is not activated PlO821_ParameterError wValue is out of range or jumper is improper Version 1 0 Sep 2003 PPH 019 10 36 4 2 9 PIO821_WriteEEP Description PIO 821 Hardware User s Manual Write 64 words 128 bytes data into the EEPROM of the PIO821 board Please call PIO821_ActiveBoard first before using this function Syntax WORD PIO821_WriteEEP BYTE BoardNo WORD wValue Parameter BoardNo input PIO821 board number wValue input the first word 16 bit of data Return PlO821_NoError PIO821_DriverNoOpen PlO821_ExceedFindBoards PI0821_BoardNoActive PlO821_WriteEEPROMError OK Kernel driver can not be opened BoardNo exceeds the current total board number N The board is not activated Fail to write data to EEPROM Version 1 0 Sep 2003 PPH 019 10 37 PIO 821 Hardware User s Manual 4 2 10 PIO821_InputByte Description Obtain a byte data from the specific address mapping of the PIO821 board Please call PlO821_ActiveBoard first before using this function This function is designed for advan
8. Delphi and Borland C Builder can call on the PlIO821 DLL driver in user mode Then the DLL driver will bypass the function call to Windrvr6 sys in order to access the hardware system The function calls supported by this PIO 821 board is listed in Table 4 1 VB Delphi BCB program i user mode PIO821 DLL Windrvr6 sys for NT 98 Me 2000 XP on PIO821 hardware kernel mode Version 1 0 Sep 2003 PPH 019 10 29 4 2 Function Definition and Description All of the functions provided for PIO 821 are listed below in Table 4 1 This list of functions is expanded on in the text that follows However in order to make a clear and simplified description of the functions the attributes of the input and output parameters for every function is indicated as input and output respectively as shown in following table Furthermore the error code of all functions supported by PIO 821 is also listed in Table 4 2 Keyword Get parameter by user before Get the data from this parameter calling this function after calling this function input Yes No output No Table 4 1 Table of PIO821 function of Pio8210 dll Function definition WORD PIO0821_GetDIIVersion WORD PI0821_ ActiveBoard BYTE BoardNo WORD PIO821_CloseBoard BYTE BoardNo WORD PI0821_TotalBoard WORD P10821_GetCardInf BYTE BoardNo DWORD IDJ BYTE PlO821_IsBoardActive BYTE BoardNo WORD P10821_
9. about 8254 please refer to Intel s Microsystem Components Handbook Table 6 9 high byte of D A channel 1 Address Read Write wBase 0xcO 8254 counter0 8254 counter0 wBase 0xc4 8254 counter1 8254 counter1 wBase 0xc8 8254 counter2 8254 counter2 wBase 0xcc Reserved 8254 control word 6 9 AD Buffer Register A D 12 bits data D11 D0 D11 MSB DO LSB READY 0 A D 12 bits data not ready 1 A D 12 bits data is ready The low 8 bits A D data are stored in address wBASE 0xD0 and the high 4 bits data are stored in address wBASE 0xD4 The READY bit is used as an indicator for A D conversion When an A D conversion is completed the READY bit will be clear to 1 Version 1 0 Sep 2003 PPH 019 10 63 PIO 821 Hardware User s Manual Table 6 10 AD Low Byte Data Format Read wBase 0xd0 pr be ps Jos os oe n oo Table 6 11 AD High Byte Data Format Read wBase 0xd4 o b fo D9 Jm pi og Table 6 12 Read AD status Read wBase 0xec a a ee bre ay 6 10 DA Buffer Register The D A converter will convert the 12 bits digital data to analog output The low 8 bits of D A channel are stored in address BASE 4 and high 4 bits are stored in address BASE 5 The D A output latch registers are designed as a double buffered structure so the analog output latch registers will be updated until the high 4 bits digital data are written The user must send low 8 bits first and t
10. control register AUX control register wBase 0x3 AUX data register AUX data register wBase 0x5 INT mask control register INT mask control register wBase 0x7 AUX pin status register AUX pin status register wBase 0x2a INT polarity control register INT polarity control register wBase 0xc0 8254 counter0O 8254 counter0O wBase 0xc4 8254 counter1 8254 counter1 wBase 0xc8 8254 counter2 8254 counter2 wBase 0xcc Reserved 8254 control word A D Low Byte D A Low Byte A D High Byte D A High Byte DI Low Byte DO Low Byte DI High Byte DO High Byte Reserved A D Gain Control amp multiplexer Control Reserved A D Mode Control Reserved A D Software Trigger control wBase 0xec A D Status Reserved 6 2 RESET the Control Register When the PC is first power up the RESET signal is in Low state This will disable all DIO operations The user has to set the RESET signal to High state before using any D A command Note that wBase is the base address of PIO 821 board mapping from your PC Table 6 3 Read Write control Register Read Write wBase 0 Version 1 0 Sep 2003 PPH 019 10 60 6 3 AUX Control Register This register is designed for feature extension and for enable or disable of the reading writing data from or to the EEPROM And it is reversed for internal utilization and do not app
11. gain settling time The gain settling time is different for different gain control code The software driver does not take care the gain settling time so the user need to delay the gain settling time if gain changed A D input channel selection data 4 bits MUX3 MUX0 MUX3 MSB DO MUXO X don t care Single ended mode MUX3 MUX0 Differential mode MUX2 MUX0 MUX3 don t care Table 6 19 A D Gain Control Register Format Write Base 0xe0 Table 6 20 PIO 821PGL GAINS CONTROL CODE TABLE 1 wsv o o zus 2 wesv o 1 zus 4 miw 1 o 25us oo625v 1 1 ue Table 6 21 PIO 821PGH GAINS CONTROL CODE TABLE GAIN Input Range GAIN1 GAINO Settling Time 1 aa o o zu 10 wosv o 1 f 28us 100 oosv 1 o f 140us 1000 o 005v 1 1 1300us Version 1 0 Sep 2003 PPH 019 10 66 Appendix PIO 821 Hardware User s Manual Appendix A Related DOS Software There are several of demo programs given for development user of DOS operation system in the company floppy disk or CD ROM The demo programs and the drivers are installed into the target system as below TC TC LIB TC DEMO TC DIAG TC LIB Large PIO H TC LIB PIO_L LIB TC LIB PIO H TC LIB PIO_L LIB BC LIB PIO H BC LIB PIO_L LIB BC LIB PIO H BC LIB IOPORT_L LIB gt for Turbo C 2 xx or above gt for TC library gt for TC demo program gt for TC diagno
12. input measurement channels Notice that all the measurements of analog input channels are configured at the same time according to the chosen setting of single ended or differential methods JP4 JP4 1 es 21 ee 5 LW SE 6 Single Ended Differential Inputs default Inputs a b Figure 2 3 PIO 821 JP4 statuses 2 3 2 The Configuration of DA Reference Voltage Output Range Setting JP2 is used to configure the internal reference voltage for analog output There are two types of internal reference voltages which are 5V or 10V The reference voltage settings are presented in Figure 2 4 The 5V reference voltage provides a 0 5V range of analog voltage output for the A D converter In the same way the 10V reference voltage supports a functional range Version 1 0 Sep 2003 PPH 019 10 12 PIO 821 Hardware User s Manual between 0 10V of analog voltage output Reference JP2 Reference Voltage Voltage default 5V Figure 2 4 Reference voltage setting 2 3 3 The Configuration of the 8254 chip s clock signal The function of the 8254 chip is used to provide the hardware sampling mechanism and counter operation There is two ways to provide the clock source which are 1 On board oscillator 2Mhz called as Internal clock 2 External clock source that comes in from the connector pin and can be provided by user In below the detail clock source setting will be brought up Ch
13. s clock sign 13 2 3 4 The Configuration of 8254 CLOCK vtacinecsvisietsihaa hades sive sudabateawesaase dawn 14 2 4 CONNECTOR PIN ASSIGNMENT 14 2 6 DAUGHTER BOARDS DB EE 17 EE 17 SET EE 17 PN EE 17 DB 16P Isolated reet ege eege 18 DB T6R Rel y DROOL eege Loo tsi re cisco ath ege eieiei 18 2 6 ANALOG INPUT SIGNAL CONNECTION 20 GE Shieldin geed 23 ek CALIBRAT ION ee ductuntesuncntadesnienauvnatnm 24 A SOFTWARE INSTIALLATION EE 28 4 1 INSTALLATION DLL E 29 4 2 FUNCTION DEFINITION AND DESCRIPTION 30 GE EE re WEE 32 4 2 2 PIO821_ActiveBoard EE 32 4 2 3 PIOSZI CloseBoard EE 33 4 2 4 PIOS2I Total EE 33 427 PIOS2I E EE 34 Version 1 0 Sep 2003 PPH 019 10 2 5 6 PIO 821 Hardware User s Manual 4 2 6 PIO821_IsBoardActive EE 34 DT OSL IA TAN erarinta E ahseg lun riot ace 35 4 2O OGL ER 36 he EPO D TW EE 37 AIAG PIOS2 LE INPUIB EE 38 4 2 11 PIO8S2 E 39 Dede POST UE EE 40 4 2 13 EE Eege 40 424 PPO SLT DIVO EE 41 4 2 15 PIOS2I EE 41 EE EE 42 4217 PIOS21 Delay EE 43 4 2 18 PIO821_ADPollingHeXx E 44 4 2 19 PIOSLT AD POUNG EE Ee 45 42 20 PIOS2I FAD SIP OU Cv deele ebe ees 46 E RTE ADST E 47 4 2 22 PIO821_SetCounteT EE 48 SE Ee ee 49 4224 LOOT ISCO EE 50 42 23 SE 1 LIAISON EE 51 4 2 26 PIOGLT ER 52 BD eT PIO8S2T E EE 53 4 226 PIOS 2T REMOVEIT iia iE RE E ROO ORR RRG 54 DEMO PROGRAM EE 55 5 1 DEMO PROGRAMS FOR WINDOWS vsssscsssssssssssssessssesssessssessssesssscsssussssessssesssueessecssseesseeess 55 T
14. stand as INTO and INT1 signal respectively Aux2 3 bit 2 3 represents the control register of the EEPROM and Aux4 7 bit 4 7 depicts the Aux ID Generally the Aux O 1 are used as interrupt sources Interrupt service has to check this register to start service routing Table 6 7 AUX Status Register Read Write wBase 7 Er TST 7 6 7 Interrupt Polarity Control Register The interrupt polarity control register is presented as following table It is used to invert the interrupt signal or not The detail function for these control register is described as below Table 6 8 Interrupt polarity control Register ee te wBase 0x2A A a e E vi be INVO 0 gt invert signal from INTO Version 1 0 Sep 2003 PPH 019 10 62 PIO 821 Hardware User s Manual INVO 1 gt do not invert signal from INTO INV1 0 gt invert signal from INT1 INVi 1 gt do not invert signal from INTO The following is the partial programs for DOS C development environment enable or disable inverting function for interrupt signal outportb wBase 0x2a 0 select the inverted input from all 2 channels outportb wBase 0x2a 3 select the non inverted input from all 2 channels outportb wBase 0x2a 2 select the inverted input of INTO select the non inverted input from the others i 6 8 8254 Counter The 8254 Programmable timer counter has 4 registers from wBase 0xC0O through wBase 0xCC For detailed programming information
15. the Table 2 1 2 2 and 2 3 CN3 ro j E Ap es f B Alli 24 AI2 AB 6 5 AN3 Alb 2 AIl4 Al 8 EY ANS AGND 9 H AGND AGND 10 Ka AGND N C 11 30 DAOUT NC 12 31 NC 12 V 13 32EXT_GATED AGND 14 33 Nc DGND 15 34 EX T_GATE2 coum 16 oe COUT EXT_TRIG 17 36 EZTINT VO 19 z Version 1 0 Sep 2003 PPH 019 10 14 PIO 821 Hardware User s Manual CN2 DOO DOI Don M DO DO2 DO3 DO2 3 DO3 DO4 DOS DO4 5 DOS DO6 DO7 DO6 7 DO7 DOS DO Dog 9 DO DO10 DOIL poo 11 boll DO12 D013 moi 13 D013 DO14 DOIS5 po 15 DO15 D GND D GND D GND 17 D GND 5V 12V 5V 19 12V Figure 2 7 37Pin D Sub CN1 and CN2 20 Pin connector Table 2 1 Pin assignment of CN1 3 Digital Input 3 TTL 5 Digital inputaTTL 6 Digitali Input am 17 Digital input TTL 8 Digital Input 7 TTL o Digital wou a 10 Digital Input 9 TTL PCB ground PCB ground 19 PCB 5V PCB 12V Table 2 2 Pin assignment of CN2 5 Digital Output A1 1 e Da Output 5 TTL_ 7 Digital Output 6 TTL s8 Digital Output 7 TTL 9 Digital Output am 10 Digital Output arm 11 Digital Output 10 TTL 12 Digital Output 11 TTL 13 Digital Output 12 TTL 14 Digital Output 13 TTL 15 Digital Output 14 TTL 16 Digital Output 15 TTL PCB ground PCB ground 19 PCB 5V PCB 12V Version 1 0 Sep 2003 PPH 019 10 15 PIO 821 Hardware User s Manual Table 2 3 Pin assignment of CN3 22 24 8 Analog input 7 74 27 Analog
16. 005V Input current 250nA max 125nA typical at 25 C On chip sample and hold Over voltage continuous single channel to 70Vp p Input impedance 10 Q 6pF Type successive approximation Burr Brown ADS 774 Conversion time 8 microseconds Accuracy 1 bit Resolution 12 bits for AD DA Gains Bipolar V Throughput 1 5 0V 45K s s 2 2 5V 45K s s 4 1 25V 45K s s 8 0 625V 45K s s Version 1 0 Sep 2003 PPH 019 10 Throughput of PIO 821 H Bipolar V Throughput 5 0V 45K s s 0 5V 45K s s 0 05V 45K s s 0 005V 45K s s D A Converter Channels 1 independent Type 12 bit multiplying Analog device AD 7948 Linearity 1 2 bit Output range 0 5V or 0 10V which is selected by the JP2 jumper Output drive 5mA Settling time 0 6 microseconds to 0 01 for a full scale step 12 bit DAC output code for PIO 821 H L PIO 821 DA Output range Data Input Analog Output 1111 1111 1111 Vref 4095 4096 0000 0000 0001 Vref 1 4096 0000 0000 0000 0 Volts Digital UO Output port 16 bits TTL compatible Input port 16 bits TTL compatible Interrupt Channel Interrupt Automatically assigned by the ROM BIOS Enable Disable Via the on board control register Programmable Timer Counter Type 82C54 programmable timer counter Timers three 16 bit independent timers m Timer 0 is used as the internal
17. 1 0 Sep 2003 PPH 019 10 24 Calibration Steps w calibration 5 calibration step 1 Set the JP2 to SY step 2 keyin DA value in DA calibration value field step 3 click the DA output button and measure DA value step 4 If the value is 5 00 key in value to DN calibration value textbox else return to step2 10 calibration Please refer the DN calibration but JP2 change to 10V and measure value is 10 00 Al calibrateation setup 1 input OY to channel setup 2 Click the AD calibration button this program will measure the channel Write the all calibrate value to calibrate section and click the Write EEP button Active Board jo z os 4030 AD calibration Figure 3 1 DA calibration Calibration for 5V mode Step 1 Please follow the jumper setting according to your appropriate analog output configuration Step 2 Run the calibration tool which is located in program files DAQpro PIO 821 calibation exe in order to open the configuration interface as shown in Figure 3 1 Step 3 If you want to calibrate the DA for example then let the DA value be set at 4095 as shown in Figure 3 2 1 Step 4 Click the DA Output button and then use particular multi meter to measure the analog output as shown in Figure 3 2 2 Step 5 If the analog output is smaller or bigger than the allowed maximum 5 00V value of analog output then go to step 3 4 Version 1 0 Sep 2003 P
18. 2 18 PlIO821_ADPollingHex Description Read a 12 bit HEX value from the specified analog input channel The active AD is setting by PIO821_SetChannelConfig This subroutine performs the AD conversion by polling one time Please call PIO821_ActiveBoard first before using this function Syntax WORD PI0821_ADPollingHex BYTE BoardNo WORD wAdVal Parameter BoardNo input PIO821 board number wAdVal output address of wAdVal which store the AD HEX data 12 bits Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PlO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO821_AdPolling TimeOut AD polling is time out Version 1 0 Sep 2003 PPH 019 10 _ 44 4 2 19 PlO amp 821_ADPolling Description Read a the value of current active AD from the analog input channel The active AD is set by PIO821_SetChannelConfig This subroutine performs the AD conversion by polling one time Please call PIO821_ActiveBoard first before using this function Syntax WORD PI0821_ADPolling BYTE BoardNo float fAdVal Parameter BoardNo input PIO821 board number fAdVal output address of fAdVal which store the AD data 12 bits Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver cannot be opened PlO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO821_BoardNoActive The board is not activated PIO821_AdPollingTim
19. 21 board number wCounterNo input select the 8254 counter 0 2 bCounterMode input the configuration code Please refer to specification of 8254 chip Return Value Return the counter value PIO821_CounterModeError Out of counter mode range Version 1 0 Sep 2003 PPH 019 10 49 4 2 24 PIO821_Installirg Description This function can enable the interrupt service for the specific PIO821 card After applying the function the system would allocate a handle to the interrupt Syntax WORD P10821_Installlrq BYTE BoardNo Parameter BoardNo input PIO821 board number Return PlO821_NoError OK PIO821_InterruptError Interrupt enable is error Version 1 0 Sep 2003 PPH 019 10 50 4 2 25 PIO821_IntADStart Description This function uses the interrupt method to read and store the AD values Users must apply the PIO821_SetChannelConfig function to configure the specific AD channel first Syntax WORD P10821_IntADStart BYTE BoardNo WORD wNum WORD SamplingDiv Parameter BoardNo input PIO821 board number wNum output number of interrupt AD conversions will be performed SamplingDiv input AD sampling rate 2M wSamplingDiv Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PIO821_ExceedFindBoards BoardNo exceeds the current total board number N Version 1 0 Sep 2003 PPH 019 10 51 4 2 26 PIO821_GetADsfloat Description
20. 4 chip on board And users can set the external clock of the hardware by setting JP5 jumper Click the Active button to show the count value of the external signal in Counter 7 zax Choose a Board 1 Number to Active P F Total Boards Active Exit Figure 5 2 The demo_2 program Version 1 0 Sep 2003 PPH 019 10 56 Demo3 Digital input output This program demonstrates the DI DO status of PIO 821 board after the digital input output wire connection i DIVO Demo Digital Output Set Total Boards 1 Choose a Board Number to Active u Input Status ds Be ES 7 J A BE Figure 5 3 The demo_3 program Demo4 The interrupt method to get the AD value This demo program shows the AD value by the interrupt method Users can set the Input range and sampling rate of AD channel in this demo and click show button to get the analog input value and demonstrate the data in the display window w AD Demo Interrupt Card Type Total Input Range M JP1 Setting d Select Channel No z Sampling Rate J 10 II Figure5 4 The demo A program Version 1 0 Sep 2003 PPH 019 10 57 Demo5 The pacer mode to get the AD value This demo program provides the pacer method to get the AD value w AD Demo Pacer Card Type E Total Input Range D JP1 Setting E Select Channel No M Sampling Rate EE K Figure 5 5 The demod program Demo6 The Polling mode
21. A D pacer trigger timer m Timer 1 is used as the external trigger A D pacer timer m Timer 2 is used as the machine independent timer Input clock 2 MHz Version 1 0 Sep 2003 PPH 019 10 o 7 PIO 821 Hardware User s Manual 1 4 General Specifications Bus Type PCI Bus Connector Two 20 pin and one 36 pin D type female connectors Operating temp 0 50 C Humidity 0 90 non condensing Dimensions 1838mmx105mm 1 5 Applications This PIO 821 board may be applied to the following areas Process monitor and control Vibration analysis Digital pattern generator from digital I O port General AD DA application 1 6 What You Get In addition to this User Manual the package includes the following items The PIO 821 multifunction PCl interface data acquisition Card An ICPDAS floppy diskette or CD The relevant release note It is recommended to read the release note at the outset All the necessary and essential information is given in this release note This is as follows Where does one find the software driver utility and demo programs How do you install the software amp utilities Where is the diagnostic program FAQ and answers Attention If any of these items is missing or damaged please contact your local agent Keep the shipping materials and carton one side in case you want to ship or store the product in the future Version 1 0 Sep 2003 PPH 019 10 8 PIO 821 Ha
22. AdVal which store the AD data 12 bits dwNum input number of AD conversions will be performed wSamplingDiv input AD sampling rate 2M wSamplingDiv Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PlIO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO821_BoardNoActive The board is not activated PIO821_AdPacerTimeOut AD pacer is time out Version 1 0 Sep 2003 PPH 019 10 47 4 2 22 PlIO821_SetCounter Description Set the counter number configuration code and counter value to the 8254 chip of PlIO821 card Please call PlO821_ActiveBoard first before using this function Syntax WORD P10821_SetCounter BYTE BoardNo WORD wCounterNo Parameter BoardNo wCounterNo bCounterMode wCounterValue Return PlO821_NoError WORD bCounterMode DWORD wCounterValue input PlO821 board number input select the 8254 counter 0 2 input the configuration code Please refer to specification of 8254 chip input counter value of 8254 chip OK PIO821_CounterModeError Out of counter mode range Version 1 0 Sep 2003 PPH 019 10 _ 48 4 2 23 PlIO821_ReadCounter Description Read the counter value from the specified counter Please call PIO821_ActiveBoard first before using this function Syntax DWORD PI0821_ReadCounter BYTE BoardNo WORD wCounterNo WORD bCounterMode Parameter BoardNo input PIO8
23. DA_Hex BYTE BoardNo WORD wvValue WORD PI0821_DA BYTE BoardNo BYTE Mode float fValue WORD PI0821_ReadEEP BYTE BoardNo WORD wValue WORD P10821_WriteEEP BYTE BoardNo WORD wValue void PIO821_OutputByte BYTE BoardNo DWORD dwoOffset BYTE bValue BYTE PIO821_InputByte BYTE BoardNo DWORD dwoOffset void PIO821_OutputWord BYTE BoardNo DWORD dwOffset WORD wvValue WORD PI0821_InputWord BYTE BoardNo DWORD dwoOffset WORD P10821_Digitalln BYTE BoardNo WORD wValue WORD PI0821_DigitalOut BYTE BoardNo WORD wvValue WORD PI0821_SetChannelConfig BYTE BoardNo WORD wAdChannel WORD wConfig WORD P10821_Delay BYTE BoardNo WORD wDownCount WORD PI0821_Delay BYTE BoardNo WORD wDownCount WORD PI0821_ADPollingHex BYTE BoardNo WORD wAdVal WORD PI0821_ADPolling BYTE BoardNo float fAdVal Version 1 0 Sep 2003 PPH 019 10 30 PIO 821 Hardware User s Manual WORD PIO821_ADsPacer BYTE BoardNo float fAdVal DWORD dwNum WORD wSamplingDiv WORD PIO0821_SetCounter BYTE BoardNo WORD wCounterNo WORD bCounterMode DWORD wCounterValue DWORD PI0821_ReadCounter BYTE BoardNo WORD wCounterNo WORD bCounterMode WORD PIO0821_Installlrq BYTE BoardNo void PIO821_Removelrq BYTE BoardNo WORD PI0821_IntADStart BYTE BoardNo WORD wNum WORD wSamplingDiv WORD P10821_GetADsfloat float fAdVal WORD PI0821_GetADsHex WORD HAdVal
24. HE HARDWARE REGISIER EE 59 6 1 THE I O EE 59 6 2 RESET THE CONTROL Rtoiertt 60 6 3 AUX TEEN EE 61 6 4 AUX DATA REGISTER ssi Sis cect Sie ata i acs eS lt 61 6 5 INT MASK CONTROL REGER 61 6 6 AUX STATUS REGISTER cette Siac eebe 62 6 7 INTERRUPT POLARITY CONTROL REGISTER sssssssssssssssssssesssssessssssssssseesssessvssesssseeee 62 SS 2 ANG EE 63 6 9 AD BUFFER EIER ee Ee EE 63 6 10 DA Burtrrsktrcoiertg 64 6 11 DI INPUT BUFFER REGISTER Ee 65 Version 1 0 Sep 2003 PPH 019 10 3 PIO 821 Hardware User s Manual 6 11 DO OUTPUT BurrtRktroisrtg 65 6 12 A D GAIN CONTROL amp MULTIPLEX CONTROL Rroisrtk 66 APPENDIX EE 67 APPENDIX A RELATED DOS SOFTWARE 67 A I Where is the related software 68 A 2 LIB Function Description waza tccs os wsvseaucsiencskabra eestidancid eeimanceausmea sts 69 APPENDIX B IO BASE REGISTER EEN 72 Version 1 0 Sep 2003 PPH 019 10 4 1 General Information 1 1 Introduction The PCI 821PGL PGH is a high performance multifunction board for PC AT compatible computers The PCI 821PGL provides for low gain 1 2 4 8 and the PCI 821PGH supports high gain 1 10 100 1000 The PCI 821PGL PGH contains a 12 bit ADC with up to 16 single ended or 8 differential analog input channels It also has a 12 bit DAC voltage output and 16 TTL compatible digital input and digital output channels respectively The maximum sampling rate of the A D converter reaches up to about 45K samples sec However it may b
25. PH 019 10 25 PIO 821 Hardware User s Manual to change the output value for example 4093 4092 and change the output voltage until its value is equal to the allowed maximum voltage output value as shown in Figure 3 2 3 Step 6 If the analog output is equal to the maximum allowed analog output level please key in the calibration value to 5V calibration value in the textbox and Click the Write EEP button The DA calibration process is finished for the setting range of analog output It is shown in Figure 3 2 4 Active Board jo zl AD calibration Figure 3 2 Calibration for 10V mode Please refer to the Calibration for 5V mode but the JP2 jumper has to be configured at the 10V output range and the allowance set to the maximum value at 10 00V AD calibration Step 1 Select JP4 to differential inputs and connect the 0 CN3 oni and 0 CN3 pin20 of analog input channel O together as shown in the following Figure Version 1 0 Sep 2003 PPH 019 10 26 PIO 821 Hardware User s Manual CE U U Figure 3 3 Step 2 1 Click the AD calibration button to write the value of the analog input channel 0 into the text field of the AD calibration value 2 Click the Write EEP button to save the calibration data into the EEPROM to finish the calibration proce
26. PIO 821 User s Manual Warranty All products manufactured by ICP DAS are warranted against defective materials for a period of one year from the date of delivery to the original purchaser Warning ICP DAS assume no liability for damages consequent to the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use or for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 2004 by ICP DAS All rights are reserved Trademark The names used for identification only may be registered trademarks of their respective companies Version 1 0 Sep 2003 PPH 019 10 1 PIO 821 Hardware User s Manual Table of Contents 1 GENERAL INFORMATION EE 5 EE 5 E2 E 5 T3 SPECIFICATIONS iii Suet Rete tA els hh EE wh thigh ki Ales lc Dl did 6 1 4 GENERAL SPECIFICATIONS ee eege 8 TED APPLICATIONS seseina Ee a Sd ate 8 TO WRAP EE ee 8 1 7 PCI DATA ACQUISITION FAMILY ai eegene eer 9 2 HARDWARE CONHIGURATION E 10 2 1 THE BLOCK DIAGRAMS EE 10 ER EE 11 2 3 CONFIGURATION OF THE DA AD OrpOrAIOGONALS 12 2 3 1 The Configuration of A D Input Type cccccccccccssccccccsssssccseesssseeeees 12 2 3 2 The Configuration of DA Reference Voltage ccccccccccseccsceccssssseees 12 2 3 3 The Configuration of the 8254 chip
27. The function can get the float AD data of the specific AD channel Users can set the specific AD channel in PlO821_SetChannelConfig function And the data is from the interrupt method after applying PlO821_IntADStart function Syntax WORD PI0821_GetADsfloat float fAdVal Parameter fAdVal output start address of fAdVal which store the AD data Return Interrupt statue 0 data is incomplete 1 data is complete Version 1 0 Sep 2003 PPH 019 10 52 4 2 27 PIO821_GetADsHex Description The function can get the hex format AD data of the specific AD channel Users can set the specific AD channel in PlIO821_SetChannelConfig function And the data is from the interrupt method after applying PIO0821_IntADStart function Syntax WORD PI0821_GetADsHex WORD HAdVal Parameter HAdVal output start address of HAdVal which store the AD data 12 bits Return Interrupt statue 0 data is incomplete 1 data is complete Version 1 0 Sep 2003 PPH 019 10 53 4 2 28 PIO821_Removelrq Description Release the interrupt resource of specific board from the computer system Syntax void PIO821_Removelrq BYTE BoardNo Parameter BoardNo input PlO821 board number Return NULL Version 1 0 Sep 2003 PPH 019 10 _ 54 PIO 821 Hardware User s Manual 5 Demo Programs 5 1 Demo Programs for Windows All of demo programs will not work normally if DLL driver would not
28. be installed correctly During the installation process of DLL driver the install shields will register the correct kernel driver to the operation system and copy the DLL driver and demo programs to the correct position based on the driver software package you have selected Win98 Me NT win2000 XP After driver installation the related demo programs and development library and declaration header files for different development environments are presented as follows Demo gt demo program BCB3 gt for Borland C Builder 3 PIO821 H gt Header file PI0821 LIB gt Linkage library for BCB only Delphi5 gt for Delphi 5 PlO821 PAS gt Declaration file VB6 gt for Visual Basic 6 PlIO821 BAS gt Declaration file The list of demo programs Demo Get cards information Demo2 counter demo Demo3 Digital input output Demo4 Get the AD value by interrupt method Demo5 Get the AD value by pacer method Demo6 Get the AD value by polling method Version 1 0 Sep 2003 PPH 019 10 55 Demo Get cards information Following figure is the result for the demo1 program It can be applied to obtain the hardware information of the PIO 821 board Total Board E m DLL Ver 100 VendorlD E159 DevicelD 2 Sub Vendor 80 SubDecivelD 3 SubAuxlD 10 IRQ 9 Figure 5 1 The demo1 program Demo2 Counter demo This demo program can be used to obtain the counter0 information of 825
29. ce user to access the hardware data based on the register of PIO821 Syntax BYTE PIO821_InputByte BYTE BoardNo DWORD dwOffset Parameter BoardNo input PIO821 board number dwOffset input The offset value of the base address of the PIO821 board for the mapping address from 0 to Oxff Return One byte value or data Version 1 0 Sep 2003 PPH 019 10 38 4 2 11 PlIO821_OutputByte Description Write a byte data to the defined address of the PIO821 board This function is designed for advance user to write data into the hardware based on the register of PIO821 Syntax void PIO821_OutputByte B YTE BoardNo DWORD dwOffset BYTE bValue Parameter BoardNo input PIO821 board number dwOffset input The offset of base address of the PIO821 board for the mapping address from 0 to Oxff bValue output a byte value for output Return None Version 1 0 Sep 2003 PPH 019 10 39 PIO 821 Hardware User s Manual 4 2 12 PIO821_InputWord Description Obtain a word two bytes data from the specific mapping address of the PIO821 board Please call PlIO821_ActiveBoard first before using this function This function is designed for advance users to access the hardware data based on the register of PIO821 Syntax BYTE PIO821_InputWord BYTE BoardNo DWORD dwoOffset Parameter BoardNo input PIO821 board number dwOffset input The offset of base address of the PIO821 board f
30. e Figure 2 9 The application example of DB 16R for PIO 821 Note The relay can easily be switched up to 0 5A at 110ACV or 1A at 24 DCV Version 1 0 Sep 2003 PPH 019 10 19 2 6 Analog Input Signal Connection The PIO 821 card can measure single ended or differential type analog input signals The user must decide which mode is suitable for the appropriate measurement Please refer to the section 2 2 2 to see how to configure the jp4 jumper based on your analog input type In general there are 4 different analog signal connection methods as shown in Figure 2 10 to Figure 2 13 The Figure 2 10 is suitable when grounding source analog input signals The Figure 2 11 is used to measure even more channels than in the Figure 2 10 but is only adequate for large analog input signals The Figure 2 12 is satisfactory for thermocouple input signaling and the Figure 2 13 is appropriate for floating source analog input signals Note that in Figure 2 12 the maximum common mode voltage between the analog input source and the AGND is 70Vp p Therefore the user must first make sure that the input signal is under the required specification If the common mode voltage is over 70Vp p the input multiplexer will be damaged forever The simple way to select the input signal connection configuration is given below Grounding source input signal gt select Figure 2 10 Thermocouple input signal gt select Figure 2 12 Floating source input signal g
31. e slower when used in the Windows operating system environment This depends on the particular version of windows operating system you are running along with the level of hardware you using To support this some demo programs are provided for user reference for the different development tools such as BCB and VB In addition the DOS library and demo programs are supplied The main features of this multifunction board are summarized in the following sub section 1 2 Features The maximum sampling rate of the A D converter is about 45K samples sec Software selectable input ranges PC AT compatible PCI bus A D trigger mode software trigger pacer trigger 16 single ended or 8 differential analog input channels Programmable high gain 1 10 100 1000 PCI 821PGH Programmable low gain 1 2 4 8 PCI 821PGL Input range 5V 0 5V 0 05V 0 005V PCI 821PGH Input range 5V 2 5V 1 25V 0 625V PCI 821PGL 1 channel 12 bit D A voltage output 16 digital inputs 16 digital outputs TTL compatible Interrupt handling Version 1 0 Sep 2003 PPH 019 10 5 PIO 821 Hardware User s Manual 1 3 Specifications Power Consumption 5V 960mA maximum Operating temperature 0 C 70 C Analog Inputs Throughput of PIO 821 L Channels 16 single ended or 8 differential Input range software programmable PIO 821PGL bipolar 5V 2 5V 1 25V 0 625V PIO 821PGH bipolar 5V 0 5V 0 05V 0
32. eOut AD polling is time out Version 1 0 Sep 2003 PPH 019 10 45 4 2 20 PIO821_ADsPolling Description Read multiple the values of current active AD from the analog input channel The active AD channel is set by PIO821_SetChannelConfig This subroutine performs the AD conversions by polling trigger Please call PlO821_ActiveBoard first before using this function Syntax WORD P10821_ADsPolling BYTE BoardNo float fAdVal DWORD dwNum Parameter BoardNo input PIO821 board number fAdVal output piece address of fAdVal which store the AD data 12 bits dwNum input number of AD conversions will be performed Return PlO821_NoError OK PIO0821_DriverNoOpen Kernel driver can not be opened PlO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO821_BoardNoActive The board is not activated PIO821_AdPollingTimeOut AD polling is time out Version 1 0 Sep 2003 PPH 019 10 46 4 2 21 PlIO821_ADsPacer Description Read multiple the values of current active AD from the analog input channel The active AD channel is set by PlIO821_SetChannelConfig This subroutine performs the AD conversions by pacer trigger Please call PIO821_ActiveBoard first before using this function Syntax WORD PIO0821_ADsPacer BYTE BoardNo float fAdVal DWORD dwNum WORD wSamplingDiv Parameter BoardNo input PIO821 board number fAdVall output piece address of f
33. er BoardNo input PIO821 board number 0 15 Return PIO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be found PIO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO821_ActiveBoardError This board can not be activated Version 1 0 Sep 2003 PPH 019 10 32 4 2 3 PlIO821_CloseBoard Description Stop and close the PIO821 kernel driver and release the resources of the device from system This method must be called once before exiting the user s application program Syntax WORD PI0821_CloseBoard BYTE BoardNo Parameter BoardNo input PIO821 board number 0 15 Return PlO0821_NoError OK PIO0821_BoardNoActive The board is not activated PIO821_ExceedFindBoards BoardNo exceeds the current total board number N 4 2 4 PlIO821_TotalBoard Description Obtain the total board number of PIO821 boards installed in the PCI bus Syntax WORD CALLBACK PIO821_TotalBoard void Parameter None Return Return the total board number Version 1 0 Sep 2003 PPH 019 10 33 PIO 821 Hardware User s Manual 4 2 5 PlO821_GetCardinf Description Obtain the information of PIO821 boards which include vender ID device ID and interrupt number Syntax WORD P 0821_GetCardInf BYTE BoardNo DWORD ID Parameter BoardNo input PIO 821 board number ID J output ID 0 gt vendor ID of this board output ID 1 gt device ID of thi
34. hen send high 4 bits to update the 12 bits AD output latch register Table 6 13 DA Low Byte Data Format Write wBase 0xd0 py bs s pa os oe p m Table 6 14 DA High Byte Data Format Write wBase 0xd4 o b b b po be pi pi Version 1 0 Sep 2003 PPH 019 10 64 PIO 821 Hardware User s Manual 6 11 DI Input Buffer Register DI 16 bits input data D15 D0 D15 MSB DO LSB The PIO 821PGL PGH provides 16 TTL compatible digital inputs The low 8 bits are stored in address BASE 0xd8 The high 8 bits are stored in address BASE 0Oxdc Table 6 15 DI Low Byte Data Format GUE Base 0xd8 Se e a Table 6 16 DI High Byte Data Format IS Base 0xdc D15 D10 6 11 DO Output Buffer Register The PIO 821PGL PGH provides 16 TTL compatible digital outputs The low 8 bits are stored in address wBase 0xd8 The high 8 bits are stored in address wBase 0xdc Table 6 17 DI Low Byte Data Format GEAN Base 0xd8 EE Table 6 18 DI High Byte Data Format ESE Base 0xdc D15 D10 Version 1 0 Sep 2003 PPH 019 10 65 PIO 821 Hardware User s Manual 6 12 A D Gain Control amp Multiplex Control Register The Only difference between PIO 821PGL and PIO 821PGH is the GAIN control function The PIO 821PGL provides gain factor of 1 2 4 8 and PIO 821PGH provides 1 10 100 1000 The gain control registers control the gain of A D input signal NOTE If gain control code changed the hardware needs to delay extra
35. igital output value Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PlIO821_ExceedFindBoards BoardNo exceeds the current total board number N Version 1 0 Sep 2003 PPH 019 10 41 PIO 821 Hardware User s Manual 4 2 16 PlO amp 821_SetChannelConfig Description Set the channel configuration for analog input which includes AD channel number and Gain mode Please call PIO821_ActiveBoard first before using this function Syntax WORD PI0821_SetChannelConfig BYTE BoardNo WORD wAdChannel WORD wContfig Parameter BoardNo input PIO821 board number wAdChannel input select AD channel number 0 16 wConfig input select AD channel gain refer to 6 12 section Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PlO821_ExceedFindBoards BoardNo exceeds the current total board number N PlO821_ AdChannelError Out of the number value of channel PlO821_ConfigError Out of the gain value of channel Version 1 0 Sep 2003 PPH 019 10 42 4 2 17 PIO821_Delay Description Use the 8254 chip to delay the specific time waiting in the program Syntax WORD PI0821_Delay BYTE BoardNo WORD wDownCount Parameter BoardNo input PIO821 board number wDownCount input counter s value of 8254 chip Return PlO821_NoError OK PIO821_TimeoutError Out of the delay time Version 1 0 Sep 2003 PPH 019 10 43 4
36. input 1577 9 AnaogGroud 28 Analog Ground _ 7 10 Analog Ground om Analog Ground 11 N C 29 12 13 External Gate2 14 15 16 17 18 External Clock PCB 5V N C Abbreviation of Not Connected Version 1 0 Sep 2003 PPH 019 10 16 2 6 Daughter Boards DB DB 8225 The DB 8225 provides an on board CJC Cold Junction Compensation circuit which is used in thermocouple measurement and terminal block for easy signal connection and measurement The CJC is connected to the A D channel 0 The PIO 821 can connect the CONS directly to the DB 8225 through a 37 pin D Sub connector For more detailed information on this please refer to the DB 8225 User Manual 37pin cable amg WA I DB 37 The DB 37 is a general purpose daughter board for use with D Sub 37 pins It is designed for easy wire connections by the using a direct pin to pin connection 37pin cable See EE DN 37 The DN 37 is a general purpose daughter board and its function is just like the DB37 except it provides the DIN Rail Mounting function 37pin cable lt OU a Version 1 0 Sep 2003 PPH 019 10 17 DB 16P Isolated Input Board The DB 16P is a 16 channel isolated digital input daughter board The optically isolated inputs of the DB 16P consist of a bi directional photo isolated transistor with a resistor for limiting currents You can use the DB 16P to sense DC signals all the way d
37. ip 8254 clock Setting The PIO821PGL PGH can be selected to use either the external or internal clock as a signal source of the IC 82c54 This selection is made by the JP5 jumper as shown in Figure 2 5 The left hand side diagram shows the setting for the internal clock at 2Mhz On the other hand the right hand side diagram shows the setting for external clock The clock signal source is controlled by the external source However the maximum frequency of the clock source is limited by 10MHz Internal EXT_CLK EXT_CLK Clock H External 2MHz Clock H default G 2MHz 2MHz Figure 2 5 PIO 821 JP5 statuses Version 1 0 Sep 2003 PPH 019 10 13 PIO 821 Hardware User s Manual 2 3 4 The Configuration of 8254 clock External Gate Counter0 Setting The PIO 821PGL PGH can also be set to use the external gate or internal CoutO Counter0 signal to control the 82c54 s counter2 through the use of the JP6 jumper as shown in Figure 2 6 The left hand diagram of Figure 2 6 is the default setting for the external gate signal control and the right hand diagram shows the internal Couto signal control COUTO COUTO EXT_GATA SH t default H Ge EXT_GATA EXT_GATA Figure 2 6 JP6 statuses 2 4 Connector Pin assignment This section shows the pin assignment of the PIO 821 PGL PGH multifunction board And the corresponding pin assignment is shown in
38. ly this control register under any consideration Table 6 4 Aux Control Register DEEM wBase 2 6 4 AUX data Register This register controls the read write function of the EEPROM on board There are all reversed by ICPDAS internal use If the user wants to access this EEPROM please refer to the function read write of the EEPROM provided by the driver toolkit Table 6 5 Aux data Register SEO wBase 3 DEENEN 6 5 INT Mask Control Register The INT mask control register is presented as following table The detail function for these control register is described as below Table 6 6 INT mask control Register Reade wBase 5 o b b kb b b En feno EN0 0 gt disable INTO to be an interrupt signal default EN0 1 gt enable INTO to be an interrupt signal Version 1 0 Sep 2003 PPH 019 10 61 PIO 821 Hardware User s Manual EN1 0 gt disable INT1 to be an interrupt signa default EN1 1 gt enable INT1 to be an interrupt signal The following is the partial programs for DOS C development environment enable or disable interrupt function For more information please refer to the DOS demo program demo1 c outportb wBase 5 0 disable all interrupts outportb wBase 5 1 enable interrupt of INTO outportb wBase 5 2 enable interrupt of INT1 outportb wBase 5 3 enable all two channels of interrupt 6 6 Aux Status Register Based on the auxiliary status register AuxO bit 0 and Aux 1 bit 1
39. or the mapping address from 0 to Oxff Return One word value or data 4 2 13 PIO821_OutputWord Description Write a word two bytes data to the defined address of the PIO821 board This function is designed for advance user to write into the hardware based on the register of PIO821 Syntax void PIO821_OutputWord BYTE BoardNo DWORD dwoOffset WORD wValue Parameter BoardNo input PIO821 board number dwOffset input The offset of base address of the PIO821 board for the mapping address from 0 to Oxff wValue output a word value Return None Version 1 0 Sep 2003 PPH 019 10 40 4 2 14 PIO821_Digitalln Description Obtain the 16 TTL compatible digital input values from the PIO821 board Please call PIO821_ActiveBoard first before using this function Syntax WORD P1I0821_Digitalln BYTE BoardNo WORD wValue Parameter BoardNo input PIO821 board number wValue output read the digital input value Return PlO821_NoError OK PIO821_DriverNoOpen Kernel driver can not be opened PIO821_ExceedFindBoards BoardNo exceeds the current total board number N 4 2 15 PlO821_DigitalOut Description Send out digital value through 16 TTL compatible digital output channels Please call PIO821_ActiveBoard first before using this function Syntax WORD P10821_DigitalOut BYTE BoardNo WORD wvValue Parameter BoardNo input PIO821 board number wValue output d
40. own from the TTL levels way up to 24V On the other hand you can use the DB 16P to sense a wide range of AC signals For more detailed information on this please refer to the manual of DB 16P 24P 16R 24R You can use this board to isolate the computer from large common mode voltages ground loops and transient voltage spikes that often occur in industrial environments The wire connection information is shown in Figure 2 8 photo lsolated OO0000000 DB 16P e a AC or DC Signal OV to UUI 24V Figure 2 8 DB 16P wire connections for PIO 821 DB 16R Relay Board The DB 16R 16 channel relay output board consists of 16 channels which form C relays for efficient switch control via programmable digital outputs They are connectors which are functionally compatible with 785 series boards but with industrial type terminal blocks The relay is energized by applying 5V signals to the corresponding relay channel on the 20 pin flat connector There are 16 enunciator LEDs for each corresponding relay If the LED is light it means that the corresponding digital channel or relay has been activated To avoid Version 1 0 Sep 2003 PPH 019 10 18 PIO 821 Hardware User s Manual overloading your PC s power supply this board provides an external power supply through a screw terminal connector The application example for the DB 16R in the PIO 821 is illustrated in Figure 2 9 From C Relay Normal Open Normal Clos
41. rdware User s Manual 1 7 PCI Data Acquisition Family We provide a family of PCI BUS data acquisition cards These cards can be divided into three groups as follows 1 PCl series high performance isolated or non isolated cards PCI 1002 1202 1800 1802 1602 multi function family non isolated PCI P16R16 P16C16 P16POR16 P8R8 D I O family isolated PCI TMC12 timer counter card non isolated PlO series cost effective non isolated cards PIO 823 821 multi function family PIO D144 D96 D64 D56 D48 D24 D I O family PIO DA16 DA8 DA4 D A family PISO series cost effective isolated cards PISO 813 A D card PISO P32C32 P64 C64 D I O family PISO P8R8 P8SSR8AC P8SSR8DC D I O family PISO 730 D I O card PISO DA2 D A card Version 1 0 Sep 2003 PPH 019 10 9 2 Hardware Configuration This section will describe the hardware settings of the PIO 821 which includes PIO 821GPL and PIO 821GPH 2 1 The Block Diagrams The block diagram of the PIO 821 series is illustrated below in order to assist users in understanding the data flow within the hardware and software system structure X86 System Status Control Local System Controller SS y za EE 16 bits DI HH Digital Input ER HH Digital Output Be NS N M N DA T 1 channel GOUTO 12 bit DA t Converter AAA DAC OUT 0 gun Sy Analog Output Figure 2 1 PIO
42. s board output ID 2 gt sub vendor ID of this board output ID 3 gt sub device ID of this board output ID 4 gt sub auxiliary ID of this board output ID 5 gt logical interrupt number of this board Return PlO821_NoError OK PIO0821_DriverNoOpen Kernel driver can not be opened PIO821_ExceedFindBoards BoardNo exceeds the current total board number N 4 2 6 PIO821_IsBoardActive Description Obtain the information about the specific board is active or not Syntax BYTE PlIO821_IsBoardActive BYTE BoardNo Parameter BoardNo input PIO821 board number Return 0 means the board is inactive 1 means the board is active Version 1 0 Sep 2003 PPH 019 10 34 PIO 821 Hardware User s Manual 4 2 7 PlO821_DA_Hex Description Output a 12 bit HEX value to Analog output channel Syntax WORD PIO821_DA_Hex BYTE BoardNo WORD wvValue Parameter BoardNo input PIO821 board number wValue input analog output value 0 Oxfff Return P1lO0821_NoError OK PI1O0821_DriverNoOpen Kernel driver can not be opened PIO821_ExceedFindBoards BoardNo exceeds the current total board number N PIO0821_BoardNoActive The board is not activated PlO0821_ParameterError wValue is out of range Version 1 0 Sep 2003 PPH 019 10 35 PIO 821 Hardware User s Manual 4 2 8 PlIO821_DA Description Output a float value to Analog output channel Syntax WORD P10821_DA BYTE
43. ss as below Figure 3 4 Active Board jo d AD calibration Figure 3 4 Version 1 0 Sep 2003 PPH 019 10 27 4 Software Installation The PIO 821 can be used in DOS and Windows 98 Me NT 2000 XP For the various Windows operating systems the recommended installation steps are given below Step 1 Insert the companion CD into the CD ROM driver and wait a few seconds until the installation program starts automatically If it cannot be started automatically please double click the NAPDOS AUTO32 EXE file on the CD Step 2 Click the first item Toolkits Software Manuals Step 3 Click the item PCI Bus DAQ Card Step 4 Click PIO 821 L H Step 5 Click install Toolkit for Windows 98 Or Me NT 2000 XP Then the Install Shield will automatically start the driver installation process and begin to copy the related material to the indicated directory and register the driver on your computer The various driver target directories are provided below for the different systems Windows NT 2000 WINNT SYSTEM32 DRIVERS Windows 98 Me XP WINDOWS SYSTEM32 DRIVERS Version 1 0 Sep 2003 PPH 019 10 28 4 1 Installation DLL Driver The DLL driver contains a collection of function calls which access the PIO 821L H card for use in Windows 98 Me NT 2000 XP systems The application structure is presented in the following diagram The user application programs developed via the development tools like VB
44. stic program gt TC declaration file gt TC large model library file gt TC declaration file gt TC huge model library file gt BC declaration file gt BC large model library file gt BC declaration file gt BC huge model library file For every development environments it fully includes the following demo programs DEMO D I O test DEMO2 DEMO3 DEMO4 DEMOS DEMO6 DEMO7 8254 square wave generator Save EEPROM data to file Digital to Analog output without calibration Analog to Digital by Software trigger without calibration Analog to Digital by Pacer trigger without calibration Analog to Digital by Pacer trigger with calibration Note that all of the hardware control functions need to be provided and processed by user themselves Version 1 0 Sep 2003 PPH 019 10 67 A 1 Where is the related software The related DOS software in the CD is given as following NAPDOS PCI PIO821 DOS TC LIB Library for TC2 X NAPDOS PCI PIO821 DOS TC DEMO gt Demo program for TC NAPDOS PCI PIO821 DOS TC Driver Driver source program The completely source listing of demo program is given in TC format This program is compiler in LARGE mode and link with PIO lib in TC Version 1 0 Sep 2003 PPH 019 10 68 A 2 LIB Function Description A 2 1 PIO_FloatSub2 Description Compute C nA nB in short format short 16 bits sign integer This function is provided for testing purpose
45. t select Figure 2 13 If Vin gt 0 1V and gain lt 10 and need more channels gt select Figure 2 11 If the user cannot be sure of the specific characteristics of input signals the selecting procedure is given as below Step1 try Figure 2 10 and record the measurement result Step2 try Figure 2 13 and record the measurement result Step3 try Figure 2 11 and record the measurement result Compare the measurement result of step1 step2 and step3 to select the best one Version 1 0 Sep 2003 PPH 019 10 20 A D CHO HI O Es 1 A D CHO LO e e A GND 1 4 e e e A D CHnHI O j Esn A D CHn LO O A GND a Figure 2 10 Connecting to grounding source input Right way A D CHO A D CH1 O e ADCHn G OW e GER A es m9 e Figure 2 11 Connecting to singled ended input configuration Version 1 0 Sep 2003 PPH 019 10 21 A D CHO HI A D CHO LO O A D CHn H A D CHn LO A GND E Do not join LO to A GND at the computer Figure 2 12 Connecting to thermocouple configuration Note If the input signal is not a thermocouple the user should use an oscilloscope to measure the common mode voltages of Vin before connecting the signal to the PIO 821 Do not use a voltage meter or multi meter A IDCHOHI O R a Vi AIDCHOLO O e A GND z e K e e AIDCHnHI e AIDCHnLO O A GND oo Figure
46. to get the AD value This demo program provides the polling method to get the AD value w AD Demo Polling Card Type zl Total Input Range JP1 Setting x Select Channel No D Figure 5 6 The demo6 program Version 1 0 Sep 2003 PPH 019 10 58 6 The Hardware Register The detailed descriptions of the registers format for PIO 821 are presented here for advance users This information is quite useful for the programmers who hope to handle the card by themselves However we suggest that users need to understand the hardware system more clearly before starting to design the program to control the hardware by them The following section will help users to understand the registers system of the PIO 821 6 1 The I O Address Map The I O address of PIO PISO series card is automatically assigned by the main board ROM BIOS The I O address can also be re assigned by users It is strongly recommended that users themselves do not change the I O address The plug amp play BIOS of the PCl board will automatically assign the proper I O address to each PIO PISO series card very well The I O addresses of the PIO 821 are given as follows which is based on the base address wBase Version 1 0 Sep 2003 PPH 019 10 59 PIO 821 Hardware User s Manual Table 6 2 Address Read UO address of the PIO 821 where wBase Write wBase 0x0 RESET control register RESET control register wBase 0x2 AUX
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