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DAQ PCI/PXI-6711/6713 User Manual

1. TTL Signal o DIO lt 0 3 gt 5 V VW gt Switch Y AR DGND 1 0 Connector 6711 6713 Device Figure 4 3 Digital 1 0 Connections Figure 4 3 shows DIO lt 0 3 gt configured for digital input and DIO lt 4 7 gt configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the switch state shown in Figure 4 3 Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 4 3 The hardware up down control for general purpose counters 0 and 1 are connected onboard to DIO6 and DIO7 respectively Thus you can use DIO6 and DIO7 to control the general purpose counters The up down control signals are input only and do not affect the operation of the DIO lines PCI PXI 6711 6713 User Manual 4 8 National Instruments Corporation Chapter 4 Signal Connections Power Connections Two pins on the I O connector supply 5 V from the computer power supply via a self resetting fuse The fuse will reset automatically within a few seconds after the overcurrent condition is removed These pins are referenced to DGND and can be used to power external digital circuitry e Powerrating 4 65 to 5 25 VDC atl A AN Caution Under no circumstances should you connect these 5 V power pins directly to analog or digital ground or to any other voltage source
2. c cccc0eeeeeeee Compatibility sissies eect sesers sosi Digital logic levels 70 dB with SH6868EP cable generating a 10 V 10 pt sinusoidal at 100 KHz on the reference channel 60 dB typ generating a 10 V 100 points 10 kHz sinewave summing 9 harmonics 50 uV C 25 ppm C 25 ppm C 5 000 V 42 5 mV actual value stored in EEPROM ES 0 ppm C max 15 ppm 41 000 h 8 input output TTL CMOS Level Min Max Input low voltage 0 0 V 0 8 V Input high voltage 2 0 V 5 0 V Input low current OV 0V 320 uA Input high current Va 5 V 10 pA Output low voltage Ao 24 mA 0 4 V Output high voltage oe 13 mA 4 35 V A 4 National Instruments Corporation Appendix A Specifications for 6711 6713 Device Power on state ooooonccnncccnonnconcconnnnonncnnnonns Input High Z Data transfers cooococnccnccccooncnoncconacinnannnnnos Programmed I O Timing 1 0 Number of channels 0 0 0 0 eee 2 up down counter timers 1 frequency scaler Resolution Counter timers oooooooccnccnnnninincncananono 24 bits Frequency scaler oooocccnnoninncnnnccnno 4 bits Compatibility ooocononconcnnnccnonnnnoncnanonnns TTL CMOS Base clocks available Counter timers oooocccnonononcnononnnononnn 20 MHz 100 kHz Frequency scaler oo tees eee 10 MHz 100 kHz Base clock accuracy oooocccoccnccconccnncnncnnos 0 01 over operat
3. DAQ DAQ STC dB DC DGND DI DIFF DIO DIP dithering National Instruments Corporation G 3 Glossary complementary metal oxide semiconductor common mode rejection ratio a measure of an instrument s ability to reject interference from a common mode signal usually expressed in decibels dB convert signal a circuit that counts external pulses or clock pulses timing counter digital to analog digital to analog converter an electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current data acquisition a system that uses the computer to collect receive and generate electrical signals Data acquisition system timing controller An application specific integrated circuit ASIC for the system timing requirements of a general A D and D A system such as a system containing the National Instruments E Series devices decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts direct current digital ground signal digital input differential mode digital input output dual inline package the addition of Gaussian noise to an analog input signal PCI PXI 671 1 6713 User Manual Glossary DMA DNL DO E EEPROM EXTSTROBE FIFO FREQ_OUT ft G GATE GPCTR PCI PXI 6711 6713 User Manual direct memory access a method by which data can be trans
4. GPCTRO_SOURCE Signal Timing coooonnconnnononnnoncnnnonnnoncnnnonnonnnonccnnnnnnono 4 15 Figure 4 11 GPCTRO_GATE Signal Timing in Edge Detection Mode 00 4 16 Figure 4 12 GPCTRO_OUT Signal Timing ce cece eeeeeseeeaeeneceeeeeneeees 4 16 Figure 4 13 GPCTR1_SOURCE Signal Timing oooncconnnnnonncnnonnnonnnonnnnnonncnnnonccnncnnnons 4 17 Figure 4 14 GPCTR1_GATE Signal Timing in Edge Detection Mode 00 4 18 Figure 4 15 GPCTR1_OUT Signal Timing ococcccnoninoninnnonconncnnnnnnoncnnncnn non non nc onncnncnnnnns 4 18 Figure 4 16 GPCTR Timing Summary eee cece cece cee cneceeeseeeeseeeeaeesaecaeeneens 4 19 Tables Table 1 1 PXI 6711 6713 J2 Pin Assignment 00 0 eee ceeeeese cee ceseeeeceeeeneeeeeenees 1 3 Table 4 1 Signal Descriptions for I O Connector Pins 0 eee eee eee eeeeecneeeeees 4 3 Table 4 2 VO Signal Summary for the 6711 6713 Device 0 eee eee eeeee ees 4 4 National Instruments Corporation vil PCI PXI 6711 6713 User Manual About This Manual This manual describes the electrical and mechanical aspects of the PCI PXI 671 1 6713 devices and contains information concerning their operation and programming The 6711 6713 devices include PXI 6711with four or PXI 6713 with eight analog output AO channels two counters and eight digital input output DIO channels for PXI CompactPCL PCI 6711 with four or PCI 6713 with eight AO channels two counters and eight DIO channels for PCI Y
5. INL VO O National Instruments Corporation G 5 Glossary general purpose counter 0 gate signal general purpose counter 0 output signal general purpose counter 0 clock source signal general purpose counter 0 up down signal general purpose counter gate signal general purpose counter output signal general purpose counter clock source signal general purpose counter up down signal hour hexadecimal hertz integral nonlinearity For an ADC deviation of codes of the actual transfer function from a straight line input output the transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces current output high current output low kilohertz PCI PXI 671 1 6713 User Manual Glossary LED LSB MB MHz MIO MITE MSB mux mV NC NI DAQ noise NRSE PCI PXI 6711 6713 User Manual light emitting diode least significant bit meter megabytes of memory megahertz multifunction I O MXI Interface to Everything most significant bit multiplexer a switching device with multiple inputs that sequentially connects each of its inputs to its output typically at high speeds in order to measure several signals with a single analog input channel millivolts normally closed or not connected National Instruments driver software for DAQ hardware an undesirable electrical signal Noise comes from exter
6. Output As an output this is the GPCTRO_SOURCE signal This signal reflects the actual source connected to the general purpose counter 0 PFI9 GPCTRO_GATE DGND Input PFI9 Counter 0 Gate As an input this is one of the PFIs Output As an output this is the GPCTRO_GATE signal This signal reflects the actual gate signal connected to the general purpose counter 0 GPCTRO_OUT DGND Output Counter 0 Output This output is from the general purpose counter 0 output FREQ_OUT DGND Output Frequency Output This output is from the frequency generator output Table 4 2 shows the I O signal summary for the 6711 6713 devices Table 4 2 1 0 Signal Summary for the 6711 6713 Device Rise Time Signal Impedance Protection Sink ns Type and Input Volts Source mA Slew Signal Name Direction Output On Off mA at V at V Rate Bias DAC lt 0 7 gt OUT AO 0 1 Q Short circuit 5 at 10 5 at 10 20 to ground V us AOGND AO DGND DIO PCI PXI 6711 6713 User Manual 4 4 National Instruments Corporation Chapter 4 Table 4 2 1 0 Signal Summary for the 6711 6713 Device Continued Signal Connections Rise Time Signal Impedance Protection Sink ns Type and Input Volts Source mA Slew Signal Name Direction Output On Off mA at V at V Rate Bias VCC DO 0 1Q Short circuit
7. tp 50 ns minimum ty 10 ns minimum Figure 4 10 GPCTRO_SOURCE Signal Timing The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency limitation The 20 MHz or 100 kHz timebase normally generates the GPCTRO_SOURCE signal unless you select some external source GPCTRO_GATE Signal Any PFI pin can externally input the GPCTRO_GATE signal which is available as an output on the PFI9 GPCTRO_GATE pin As an input the GPCTRO_GATE signal is configured in the edge detection mode You can select any PFI pin as the source for GPCTRO_GATE and configure the polarity selection for either rising or falling edge You can use the gate signal in a variety of different applications to perform actions such as starting and stopping the counter generating interrupts saving the counter contents and so on As an output the GPCTRO_GATE signal reflects the actual gate signal connected to general purpose counter 0 This is true even if the gate is being externally generated by another PFI This output is set to tri state at startup National Instruments Corporation 4 15 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections Figure 4 11 shows the timing requirements for the GPCTRO_GATE signal Rising edge polarity Falling edge polarity tw 10 ns minimum Figure 4 11 GPCTRO_GATE Signal Timing in Edge Detection Mode GPCTRO_OUT Signal
8. easiest and least accurate whereas the last level is the slowest most difficult and most accurate Loading Calibration Constants The 6711 6713 device is factory calibrated before shipment at approximately 25 C to the levels indicated in Appendix A Specifications The associated calibration constants the values that were written to the CalDACs to achieve calibration in the factory are stored in the onboard nonvolatile memory EEPROM Because the CalDACs have no memory capability they do not retain calibration information when the device is unpowered Loading calibration constants refers to the process of loading the CalDACs with the values stored in the EEPROM NI DAQ software determines when this is necessary and does it automatically If you are not using NI DAQ you must load these values yourself In the EEPROM there is a user modifiable calibration area in addition to the permanent factory calibration area This means that you can load the CalDACs with values either from the original factory calibration or from a calibration that you subsequently performed National Instruments Corporation 5 1 PCI PXI 671 1 6713 User Manual Chapter 5 Calibration The loading factory calibration constants method of calibration is not very accurate because it does not take into account the fact that the device measurement and output voltage errors can vary with time and temperature It is better to self calibrate when the device is inst
9. machine These numbers may change when using more devices or when other CPU or bus activity is taking place National Instruments Corporation A 1 PCI PXI 6711 6713 User Manual Appendix A Specifications for 6711 6713 Device Type of DAG rusinii inon Double buffered multiplying FIFO buffer size O 16 384 samples Olea 8 192 samples Data transfers cccocnncnononnoninnnnnnononocinannnn DMA interrupts programmed I O DMA modes siii isisisi eresio Scatter gather Accuracy Information Absolute Accuracy Nominal Range V of Reading Offset Temp Drift Positive Negative FS FS 24 Hours 90 Days 1 Year mV I 10 10 0 0177 0 0197 0 0219 5 933 0 0005 Absolute accuracy of Reading x Voltage Offset Temp Drift x Voltage Note Temp drift applies only if ambient is greater than 10 C of previous external calibration PCI PXI 6711 6713 User Manual Transfer Characteristics Relative accuracy INL After calibration cece 0 3 LSB typ 0 5 LSB max Before calibration eeseeeeeees 4 LSB max DNL After calibration eee 0 3 LSB typ 1 0 LSB max Before calibrati0N oonnononnoc m 3 LSB max MOMOtonicity cocooccconnnconanoncnonaconnccnnccnnnnnos 12 bits guaranteed after calibration Offset error After calibration eee 1 0 mV typ 5 9 mV max Before calibration cccccccceeeeeeee 200 mV max A 2 National Instruments Co
10. questions about B 2 software 2 1 unpacking PCI PXI 671 1 6713 1 4 I O connector 4 1 to 4 6 exceeding maximum ratings warning 4 1 T O signal summary table 4 4 to 4 6 optional equipment 1 7 pin assignments figure 4 2 signal descriptions table 4 3 to 4 4 J J2 pin assignments for PCIPXI 6711 6713 table 1 3 L LabVIEW and LabWindows CVI application software 1 4 O National Instruments Corporation 1 3 Index manual See documentation MITE bus interface chip 1 1 NI DAQ driver software 1 5 to 1 6 0 optional equipment 1 7 P PCI PXI 671 1 6713 See also hardware overview custom cabling 1 7 optional equipment 1 7 overview 1 1 to 1 2 questions about B 1 to B 3 general information B 1 installation and configuration B 2 timing and digital I O B 2 to B 3 requirements for getting started 1 3 software programming choices 1 4 to 1 6 National Instruments application statement 1 4 to 1 5 NI DAQ driver software 1 5 to 1 6 register level programming 1 6 unpacking 1 4 using PXI with CompactPCI 1 2 to 1 3 PFIO signal description table 4 3 signal summary table 4 5 PFI signal description table 4 3 signal summary table 4 5 PFI signal description table 4 3 signal summary table 4 5 PCI PXI 6711 6713 User Manual Index PFI3 GPCTR1_SOURCE signal description table 4 3 signal summary table 4 5 PFI4 GPCTR1_GATE signal description table 4 3 signal
11. 4 7 to 4 8 field wiring considerations 4 20 general purpose timing signal connections 4 14 to 4 20 FREQ_OUT signal 4 20 GPCTRO_GATE signal 4 15 to 4 16 GPCTRO_OUT signal 4 16 GPCTRO_SOURCE signal 4 14 to 4 15 GPCTRO_UP_DOWN signal 4 16 GPCTR1_GATE signal 4 17 to 4 18 GPCTR1_OUT signal 4 18 GPCTR1_SOURCE signal 4 17 GPCTR1_UP_DOWN signal 4 19 to 4 20 National Instruments Corporation I O connector 4 1 to 4 6 exceeding maximum ratings warning 4 1 T O signal summary table 4 4 to 4 6 pin assignments figure 4 2 signal descriptions table 4 3 to 4 4 power connections 4 9 programmable function input connections 4 10 to 4 11 timing connections 4 9 to 4 20 waveform generation timing connections 4 11 to 4 14 UISOURCE signal 4 13 to 4 14 UPDATE signal 4 12 to 4 13 WFTRIG signal 4 11 to 4 12 software installation 2 1 software programming choices 1 4 to 1 6 National Instruments application software 1 4 to 1 5 NI DAQ driver software 1 5 to 1 6 register level programming 1 6 specifications analog output A 1 to A 4 accuracy information A 2 dynamic characteristics A 3 to A 4 external reference input A 3 output characteristics A 1 to A 2 stability A 4 transfer characteristics A 2 to A 3 voltage output A 3 bus interface A 6 digital I O A 4 digital trigger A 5 environment A 7 physical A 7 power requirements A 6 RTSI and PXI trigger lines A 6 timing I O A 5 stabi
12. 6713 oo eee 68 pin male SCSI II type Environment Operating temperature ee 0 to 50 C Storage temperature eee 55 to 150 C Relative humidity 0 0 0 eee eee 5 to 90 noncondensing National Instruments Corporation A 7 PCI PXI 671 1 6713 User Manual Common Questions This appendix contains a list of commonly asked questions and their answers relating to usage and special features of your 6711 6713 device General Information What is the 6711 6713 device The 6711 6713 device is a switchless and jumperless analog output device that uses the DAQ STC for timing What is the DAQ STC The DAQ STC is the system timing control application specific integrated circuit ASIC designed by National Instruments and is the backbone of the 6711 6713 device The DAQ STC contains seven 24 bit counters and three 16 bit counters The counters are divided into the following three groups e Analog input two 24 bit two 16 bit counters not used on 6711 6713 e Analog output three 24 bit one 16 bit counters e General purpose counter timer functions two 24 bit counters The groups can be configured independently with timing resolutions of 50 ns or 10 us With the DAQ STC you can interconnect a wide variety of internal timing signals to other internal blocks The interconnection scheme 1s quite flexible and completely software configurable New capabilities such as buffered pulse generation and seamlessly changing
13. GPCTR1_SOURCE monitors the actual clock connected to general purpose counter 1 This is true even if the source clock is being externally generated by another PFI This output is set to tri state at startup Figure 4 13 shows the timing requirements for the GPCTR1_SOURCE signal tp 50 ns minimum ty 10 ns minimum Figure 4 13 GPCTR1_SOURCE Signal Timing The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency limitation The 20 MHz or 100 kHz timebase normally generates the GPCTR1_SOURCE unless you select some external source GPCTR1_GATE Signal Any PFI pin can externally input the GPCTR1_GATE signal which is available as an output on the PFI4 GPCTR1_GATE pin As an input the GPCTR1_GATE signal is configured in edge detection mode You can select any PFI pin as the source for GPCTR1_GATE and configure the polarity selection for either rising or falling edge You can use the gate signal in a variety of different applications to perform such actions as starting and stopping the counter generating interrupts saving the counter contents and so on National Instruments Corporation 4 17 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections As an output the GPCTR1_GATE signal monitors the actual gate signal connected to general purpose counter 1 This is true even if the gate is being externally generated by
14. Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or ot
15. This signal is available only as an output on the GPCTRO_OUT pin The GPCTRO_OUT signal reflects the terminal count TC of general purpose counter 0 You have two software selectable output options pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options This output is set to tri state at startup Figure 4 12 shows the timing of the GPCTRO_OUT signal GPCTRO_SOURCE GPCTRO_OUT Pulse on TC GPCTRO_OUT Toggle output on TC Lo te i PCI PXI 6711 6713 User Manual Figure 4 12 GPCTRO_OUT Signal Timing GPCTRO_UP_DOWN Signal This signal can be externally input on the DIO6 pin and is not available as an output on the I O connector The general purpose counter 0 will count down when this pin is at a logic low and count up when it is at a logic high You can disable this input so that software can control the up down functionality and leave the DIO6 pin free for general use 4 16 National Instruments Corporation Chapter 4 Signal Connections GPCTR1_SOURCE Signal Any PFI pin can externally input the GPCTR1_SOURCE signal which is available as an output on the PFI3 GPCTR1_SOURCE pin As an input the GPCTR1_SOURCE signal is configured in the edge detection mode You can select any PFI pin as the source for GPCTR1_SOURCE and configure the polarity selection for either rising or falling edge As an output the
16. description of terms used in this manual including acronyms abbreviations definitions metric prefixes mnemonics and symbols e The ndex alphabetically lists topics covered in this manual including the page where you can find the topic Conventions Used in This Manual lt gt ZN bold italic italic 6711 6713 NI DAQ PC SCXI PCI PXI 6711 6713 User Manual The following conventions are used in this manual Angle brackets enclose the name of a key on the keyboard for example lt option gt Angle brackets containing numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example DIO lt 3 0 gt The indicates that the text following it applies to only to a specific PCIPXI CompactPCI device This icon to the left of bold italicized text denotes a note which alerts you to important information This icon to the left of bold italicized text denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash Bold italic text denotes a note caution or warning Italic text denotes emphasis a cross reference or an introduction to a key concept This font also denotes text from which you supply the appropriate word or value as in NI DAQ 6 x 6711 6713 refers to the National Instruments PCI PXI 6711 6713 devices unless otherwise noted NI DAQ refers to the NI DAQ driver software for PC compatible computers unless oth
17. on the 6711 6713 device or any other device Doing so can damage the 6711 6713 device and the computer National Instruments is not liable for damages resulting from such a connection Timing Connections DS Caution Exceeding the maximum input voltage ratings which are listed in Table 4 2 can damage the 6711 6713 device and the computer National Instruments is not liable for any damages resulting from such signal connections All external control over the timing of the 6711 6713 device is routed through the 10 programmable function inputs labeled PFIO through PFI9 These signals are explained in detail in the next section Programmable Function Input Connections These PFIs are bidirectional as outputs they are not programmable and reflect the state of many DAQ waveform generation and general purpose timing signals On 6711 6713 device six PFIs are bidirectional and four PFIs are input only PFIO PFI1 PFI2 PFI7 There are four other dedicated outputs for the remainder of the timing signals on the 6711 6713 SCANCLK is not used As inputs the PFI signals are programmable and can control any DAQ waveform generation and general purpose timing signals The waveform generation signals are explained in the Waveform Generation Timing Connections section later in this chapter The general purpose timing signals are explained in the General Purpose Timing Signal Connections section later in this chapter National Instruments Corpora
18. summary table 4 5 PFIS UPDATE signal description table 4 4 signal summary table 4 5 PFI6 WFTRIG signal description table 4 4 signal summary table 4 5 PFI7 signal description table 4 4 signal summary table 4 5 PFI8 GPCTRO_SOURCE signal description table 4 4 signal summary table 4 5 PFI9 GPCTRO_GATE signal description table 4 4 signal summary table 4 6 PFIs programmable function inputs 4 10 to 4 11 connecting to external signal source warning B 3 questions about B 3 signal routing 3 5 timing connections 4 10 to 4 11 physical specifications A 7 pin assignments figure 4 2 power connections 4 9 5 V power pins 4 9 power on states of PFI and DIO lines B 3 self resetting fuse 4 9 power requirement specifications A 6 programmable function inputs PFIs See PFIs programmable function inputs PXI using with CompactPCI 1 2 to 1 3 PXI trigger line specifications A 6 PCI PXI 6711 6713 User Manual 1 4 Q questions and answers general information B 1 installation and configuration B 2 timing and digital 1 O B 2 to B 3 R reference selection analog output 3 3 register level programming 1 6 reglitch selection analog output 3 3 requirements for getting started 1 3 RTSI clocks 3 5 RTSI triggers 3 5 to 3 6 RTSI bus signal connections figure 3 6 specifications A 6 S signal connections analog output signal connections 4 6 to 4 7 digital I O
19. the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals Mating connectors and a backshell kit for making custom 68 pin cables are available from National Instruments The following list gives recommended part numbers for connectors that mate to the I O connector on the 6711 6713 device e Honda 68 position solder cup female connector part number PCS E68FS e Honda backshell part number PCS E68LKPA National Instruments Corporation 1 7 PCI PXI 671 1 6713 User Manual Installation and Configuration This chapter explains how to install and configure your PCI PXI 67 11 6713 device Software Installation Install your software before you install the 6711 6713 device Refer to the appropriate release notes indicated below for specific instructions on the software installation sequence 1 Install your application software If you are using LabVIEW LabWindows CVI or other National Instruments application software packages refer to the appropriate release notes 2 Install the NI DAQ driver software Refer to your NI DAQ release notes and follow the instructions given there for your operating system and application software package You can now install your hardware Hardware Installation You can install the PCI PXI 671 1 6713 device in any available PCI PXI expansion slot in your computer However to achieve best noise perfo
20. the package and inspect the device for loose components or any other sign of damage Notify National Instruments if the device appears damaged in any way Do not install a damaged device into your computer e Never touch the exposed pins of connectors Software Programming Choices You have several options to choose from when programming your National Instruments DAQ and SCXI hardware You can use National Instruments application software NI DAQ or register level programming National Instruments Application Software LabVIEW features interactive graphics a state of the art user interface and a powerful graphical programming language The LabVIEW Data Acquisition VI Library a series of VIs for using LabVIEW with National Instruments DAQ hardware is included with LabVIEW The LabVIEW Data Acquisition VI Library is functionally equivalent to NI DAQ software LabWindows CVI features interactive graphics state of the art user interface and uses the ANSI standard C programming language The LabWindows CVI Data Acquisition Library a series of functions for using LabWindows CVI with National Instruments DAQ hardware is included with the NI DAQ software kit The LabWindows CVI Data Acquisition Library is functionally equivalent to the NI DAQ software ComponentWorks contains tools for data acquisition and instrument control built on NI DAQ driver software ComponentWorks provides a higher level programming interface for building virtua
21. the sampling rate are possible What does update rate mean to me It means that this is the fastest you can output data from your device and still achieve accurate results The 6711 6713 device has a update rate of 1 MS s at up to 4 channels What type of 5 V protection does the 6711 6713 device have The 6711 6713 device has 5 V lines equipped with a self resetting 1 A fuse O National Instruments Corporation B 1 PCI PXI 6711 6713 User Manual Appendix B Common Questions Installation and Configuration Analog Output How do you set the base address for the 6711 6713 device The base address of the 6711 6713 device is assigned automatically through the bus protocol This assignment is completely transparent to you What jumpers should 1 be aware of when configuring my 6711 6713 device The 6711 6713 device is jumperless and switchless Which National Instruments document should I read first to get started using DAQ software Your NI DAQ or application software release notes documentation is always the best starting place I m using the DACs to generate a waveform but I discovered with a digital oscilloscope that there are glitches on the output signal Is this normal When it switches from one voltage to another any DAC produces glitches due to released charges The largest glitches occur when the most significant bit MSB of the D A code switches You can use a lowpass deglitching filter to remove some of these gli
22. to help if you have problems with them To make it easy for you to contact us this manual contains comment and configuration forms for you to complete These forms are in Appendix C Customer Communication at the end of this manual xii National Instruments Corporation Introduction This chapter describes your PCI PXI 6711 6713 device lists what you need to get started describes the optional software and optional equipment and explains how to unpack your 6711 6713 device About the 6711 6713 Devices Thank you for buying a National Instruments 6711 6713 device Your 6711 6713 device is a completely Plug and Play analog output digital and timing I O device for PXI PCI CompactPCI The 6711 6713 device features a 12 bit digital to analog converter DAC per channel with update rates up to Ms S channel for voltage outputs eight lines of TTL compatible digital I O and two 24 bit counter timers for timing I O The 6711 device features four voltage output channels while the 6713 device features eight voltage output channels Because the 6711 6713 device has no DIP switches jumpers or potentiometers it is easily software configured and calibrated The 6711 6713 device is a completely switchless and jumperless data acquisition DAQ device for the PXI PCI CompactPCI This feature is made possible by the National Instruments MITE bus interface chip that connects the device to the PCI I O bus The MITE implements the PCI Local B
23. 1A to ground DIO lt 0 7 gt DIO Voc 0 5 13 at 24 at 1 1 50 KQ pu V_ 0 4 0 4 cc EXTSTROBE DO 3 5 at 5at0 4 1 5 50 kQ pu Voc 0 4 EXTREF Al 10kQ 25 15 PFIO DI Vec 0 5 3 5 at 5at0 4 1 5 50 KQ pd V_ 0 4 cc PFI DI Mes 0 5 3 5 at 5at0 4 1 5 50 kQ pu V_ 0 4 cc PFI2 DI Ma 0 5 3 5 at 5at0 4 1 5 50 KQ pu V_ 0 4 cc PFIB GPCTRI_SOURCE DIO Voc 0 5 3 5 at 5at0 4 1 5 50 kQ pu V_ 0 4 cc PFI4 GPCTR1_GATE DIO Vog 0 5 3 5 at 5at0 4 1 5 50 KQ pu V_ 0 4 cc GPCTR1_OUT DO 3 5 at 5at0 4 1 5 50 kQ pu V_ 0 4 cc PFIS UPDATE DIO Ving 0 5 3 5 at 5at0 4 1 5 50 KQ pu V_ 0 4 cc PFI6 WFTRIG DIO Veg 0 5 3 5 at 5at0 4 1 5 50 KQ pu V_ 0 4 cc PFI7 DI Me 0 5 3 5 at 5at0 4 1 5 50 kQ pu V 0 4 cc PFI8 GPCTRO_SOURCE DIO NES 0 5 3 5 at 5at0 4 1 5 50 kQ pu V_ 0 4 cc National Instruments Corporation 4 5 PCI PXI 671 1 6713 User Manual Chapter 4 Table 4 2 1 0 Signal Summary for the 6711 6713 Device Continued Signal Connections Rise Time Signal Impedance Protection Sink ns Type and Input Volts Source mA Slew Signal Name Direction Output On Off mA at V at V Rate Bias PFI9 GPCTRO_GATE DIO Veg 05 3 5 at 5at0 4 1 5 50 kQ pu Vn 0 4 ce GPCTRO_OUT DO 3 5 at 5at0 4 1 5 50 kQ pu V 0 4 ce FREQ_OUT DO 3 5 at 5at0 4 1 5 50 kQ pu V 0 4 AI Analog I
24. 20 PCI PXI 6711 6713 User Manual 1 2 FREQ_OUT signal description table 4 4 general purpose timing connections 4 20 signal summary table 4 6 frequently asked questions See questions and answers FTP support E 1 fuse self resetting 4 9 B 1 G general purpose timing signal connections 4 14 to 4 20 FREQ_OUT signal 4 20 GPCTRO_GATE signal 4 15 to 4 16 GPCTRO_OUT signal 4 16 GPCTRO_SOURCE signal 4 14 to 4 15 GPCTRO_UP_DOWN signal 4 16 GPCTR1_GATE signal 4 17 to 4 18 GPCTR1_OUT signal 4 18 GPCTR1_SOURCE signal 4 17 GPCTR1_UP_DOWN signal 4 19 to 4 20 questions about B 3 glitches 3 3 B 2 GPCTRO_GATE signal 4 15 to 4 16 GPCTRO_OUT signal description table 4 4 general purpose timing connections 4 16 signal summary table 4 6 GPCTRO_SOURCE signal 4 14 to 4 15 GPCTRO_UP_DOWN signal 4 16 GPCTR1_GATE signal 4 17 to 4 18 GPCTR1_OUT signal description table 4 3 general purpose timing connections 4 18 signal summary table 4 5 GPCTR1_SOURCE signal 4 17 GPCTR1_UP_DOWN signal 4 19 to 4 20 National Instruments Corporation H hardware installation steps for 2 1 to 2 2 unpacking PCI PXI 6711 6713 1 4 hardware overview analog output 3 2 to 3 3 reference selection 3 3 reglitch selection 3 3 block diagram 3 2 digital I O 3 3 timing signal routing 3 3 to 3 6 device and RTSI clocks 3 5 programmable function inputs 3 5 RTSI triggers 3 5 to 3 6 installation hardware 2 1 to 2 2
25. 5 voltage output specifications A 3 W waveform generation questions about B 2 waveform generation timing connections 4 11 to 4 14 UISOURCE signal 4 13 to 4 14 UPDATE signal 4 12 to 4 13 WFTRIG signal 4 11 to 4 12 WFTRIG signal input signal timing figure 4 12 output signal timing figure 4 12 timing connections 4 11 to 4 12 wiring considerations 4 20 PCI PXI 6711 6713 User Manual 1 6 National Instruments Corporation
26. 50 to 75 ns This output is set to tri state at startup PCI PXI 6711 6713 User Manual 4 12 National Instruments Corporation Chapter 4 Signal Connections Figures 4 7 and 4 8 show the input and output timing requirements for the UPDATE signal Rising edge polarity Falling edge polarity tw 10 ns minimum Figure 4 7 UPDATE Input Signal Timing tw 50 75 ns Figure 4 8 UPDATE Output Signal Timing The DACs are updated within 100 ns of the leading edge Separate the UPDATE pulses with enough time that new data can be written to the DAC latches The UI counter for the 6711 6713 device normally generates the UPDATE signal unless you select some external source The UI counter is started by the WFTRIG signal and can be stopped by software or the internal Buffer Counter D A conversions generated by either an internal or external UPDATE signal do not occur when gated by the software command register gate UISOURCE Signal Any PFI pin can externally input the UISOURCE signal which is not available as an output on the I O connector The UI counter uses the UISOURCE signal as a clock to time the generation of the UPDATE signal You must configure the PFI pin you select as the source for the UISOURCE signal in the level detection mode You can configure the National Instruments Corporation 4 13 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections polarity selec
27. DAQ PCI PXI 6711 6713 User Manual Analog Voltage Output Device for PCI PXI CompactPCI Y NATIONAL me October 1998 Editi gt INSTRUMENTS Part saab OOO Internet Support E mail supportfnatinst com FTP Site ftp natinst com Web Address http www natinst com Bulletin Board Support BBS United States 512 794 5422 BBS United Kingdom 01635 551422 BBS France 01 48 65 15 59 Fax on Demand Support 512 418 1111 Telephone Support USA Tel 512 795 8248 Fax 512 794 5678 International Offices Australia 03 9879 5166 Austria 0662 45 79 90 0 Belgium 02 757 00 20 Brazil 011 288 3336 Canada Ontario 905 785 0085 Canada Qu bec 514 694 8521 Denmark 45 76 26 00 Finland 09 725 725 11 France 01 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 Israel 03 6120092 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Mexico 5 520 2635 Netherlands 0348 433466 Norway 32 84 84 00 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 200 51 51 Taiwan 02 377 1200 United Kingdom 01635 523545 National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin Texas 78730 5039 USA Tel 512794 0100 O Copyright 1998 National Instruments Corporation All rights reserved Important Information Warranty Copyright Trademarks The PCI 6711 PCI 6713 PX1 6711 and PXI 6713 devices are warranted against defects in materials and workmanship for a period of one year from the date of ship
28. User Manual The final option for programming any National Instruments DAQ hardware is to write register level software Writing register level programming software can be very time consuming and inefficient and is not recommended for most users Even if you are an experienced register level programmer using NI DAQ or application software to program your National Instruments DAQ hardware is easier than and as flexible as register level programming and can save weeks of development time 1 6 National Instruments Corporation Chapter 1 Introduction Optional Equipment National Instruments offers a variety of products to use with the 6711 6713 device including cables connector blocks and other accessories as follows Cables and cable assemblies e Connector blocks shielded and unshielded 50 and 68 pin screw terminals RTSI bus cables e Low channel count digital signal conditioning modules devices and accessories For more specific information about these products refer to your National Instruments catalogue or call the office nearest you Custom Cabling National Instruments offers cables and accessories for you to prototype your application or to use if you frequently change device interconnections If you want to develop your own cable however the following guidelines may be useful Route the analog lines separately from the digital lines e When using a cable shield use separate shields for
29. al 10 V reference Thus in general it is not possible to calibrate the analog output gain error when using an external reference In this case it is advisable to account for the nominal gain error of the analog output channel either in software or with external hardware See Appendix A Specifications for analog output gain error information O National Instruments Corporation 5 3 PCVPXI 6711 6713 User Manual Specifications This appendix lists the specifications of your 6711 6713 device These specifications are typical at 25 C unless otherwise noted 6711 6713 Device Analog Output Output Characteristics Number of channels oooonnnnnnnninnionccnnc 8 voltage outputs 6713 devices 4 voltage outputs 6711 devices Resolution occccccnnnnnnninncccnncnnnnnonononininonos 12 bits 1 in 4 096 Max update rate Max Update Rate Number of Using Local FIFO Using Host PC Memory Channels kS s kS s 1 through 5 1000 1000 6 952 1000 7 833 869 8 740 769 1 These numbers apply to continuous waveform generation which allows for the time it takes to reset the FIFO to the beginning when cycling through it This additional time about 200 ns is not incurred when using host PC memory for waveform generation Max update rate in FIFO mode will not change irrespective of the number of devices in the system These number were measured using one PCI 671 1 6713 device with a 90 MHz Pentium
30. alled in the environment in which it will be used Self Calibration The 6711 6713 device can measure and correct for almost all of its calibration related errors without any external signal connections Your National Instruments software provides a self calibration method This self calibration process which generally takes less than two minutes is the preferred method of assuring accuracy in your application Initiate self calibration to minimize the effects of any offset gain and linearity drifts particularly those due to warmup Immediately after self calibration the only significant residual calibration error could be gain error due to time or temperature drift of the onboard voltage reference This error is addressed by external calibration which is discussed in the following section If you are interested primarily in relative measurements and you can ignore a small amount of gain error self calibration should be sufficient External Calibration The 6711 6713 device has an onboard calibration reference to ensure the accuracy of self calibration Its specifications are listed in Appendix A Specifications The reference voltage is measured at the factory and stored in the EEPROM for subsequent self calibrations This voltage is stable enough for most applications but if you are using your device at an extreme temperature or if the onboard reference has not been measured for a year or more you may wish to externally calibra
31. another PFI This output is set to tri state at startup Figure 4 14 shows the timing requirements for the GPCTR1_GATE signal Rising edge polarity Falling edge polarity tw 10ns minimum Figure 4 14 GPCTR1_GATE Signal Timing in Edge Detection Mode GPCTR1_OUT Signal This signal is available only as an output on the GPCTR1_OUT pin The GPCTR1_OUT signal monitors the TC device general purpose counter 1 You have two software selectable output options pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options This output is set to tri state at startup Figure 4 15 shows the timing requirements for the GPCTR1_OUT signal Toggle output on TC 1 TC i GPCTR1_SOURCE GPCTR1_OUT Pulse on TC GPCTR1_OUT PCI PXI 6711 6713 User Manual Figure 4 15 GPCTR1_OUT Signal Timing 4 18 National Instruments Corporation Chapter 4 Signal Connections GPCTR1_UP_DOWN Signal This signal can be externally input on the DIO7 pin and is not available as an output on the I O connector General purpose counter 1 counts down when this pin is at a logic low and counts up at a logic high This input can be disabled so that software can control the up down functionality and leave the DIO7 pin free for general use Figure 4 16 shows the timing requirements for the GATE and SOURCE input signals and the timing specifications for
32. are configurable There are two types of configuration on the 6711 6713 device bus related and data acquisition related configuration The PCI PXI 6711 6713 device is fully compatible with the industry standard PCI Local Bus Specification Revision 2 0 This specification allows the PCI system to automatically perform all bus related configurations and requires no user interaction Bus related configuration includes setting the device base memory address and interrupt channel Data acquisition related configuration includes such settings as analog output range reference selection and others You can modify these settings using NI DAQ C language API or application level software such as ComponentWorks LabVIEW LabWindows CVI and VirtualBench National Instruments Corporation 2 3 PCI PXI 671 1 6713 User Manual Hardware Overview This chapter presents an overview of the hardware functions on your PCI PXI 671 1 6713 device Figure 3 1 shows a block diagram of the 6711 6713 device O National Instruments Corporation 3 1 PCVPXI 6711 6713 User Manual Chapter 3 Hardware Overview Generic Bus Interface EEPROM Register Control Decode 1 1 AO FPGA DMA Control IRQ Calibration Control 1 PCI PXI Calibration Mux 1 0 Connector PFI Trigger Tri Analog Output Bus rigger Timing Control 1 Interface T
33. ated information call 512 795 6990 You can access these services at United States 512 794 5422 Up to 14 400 baud 8 data bits 1 stop bit no parity United Kingdom 01635 551422 Up to 9 600 baud 8 data bits 1 stop bit no parity France 01 48 65 15 59 Up to 9 600 baud 8 data bits 1 stop bit no parity FTP Support To access our FTP site log on to our Internet host ftp natinst com as anonymous and use your Internet address such as joesmith anywhere com as your password The support files and documents are located in the support directories O National Instruments Corporation C 1 PCI PXI 6711 6713 User Manual Fax on Demand Support Fax on Demand is a 24 hour information retrieval system containing a library of documents on a wide range of technical information You can access Fax on Demand from a touch tone telephone at 512418 1111 E Mail Support Currently USA Only You can submit technical support questions to the applications engineering team through e mail at the Internet address listed below Remember to include your name address and phone number so we can contact you with solutions and suggestions support natinst com Telephone and Fax Support National Instruments has branch offices all over the world Use the list below to find the technical support number for your country If there is no National Instruments office in your country contact the source from which you purchased your software to obtain support C
34. ce As an input this is one of the PFIs As an output this is the GPCTR1_SOURCE signal This signal reflects the actual source connected to the general purpose counter 1 PFI4 GPCTR1_GATE DGND Input Output PFI4 Counter 1 Gate As an input this is one of the PFIs As an output this is the GPCTR1_GATE signal This signal reflects the actual gate signal connected to the general purpose counter 1 GPCTR1_OUT DGND Output Counter 1 Output This output is from the general purpose counter output National Instruments Corporation 4 3 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections Table 4 1 Signal Descriptions for I O Connector Pins Continued Signal Name Reference Direction Description PFIS UPDATE DGND Input PFI5 Update As an input this is one of the PFIs Output As an output this is the UPDATE signal A high to low edge on UPDATE indicates that the analog output waveform generation group is being updated PFI6 WFTRIG DGND Input PFI6 Waveform Trigger As an input this is one of the PFIs Output As an output this is the WFTRIG signal In timed analog output sequences a low to high transition indicates the initiation of the waveform generation PFI7 DGND Input PFI7 As an input this is one of the PFIs PFI7 cannot be an output PFI8 GPCTRO_SOURCE DGND Input PFI8 Counter 0 Source As an input this is one of the PFIs
35. documentation You may have both application software and NI DAQ software documentation National Instruments application software includes ComponentWorks LabVIEW LabWindows CVI and VirtualBench After you set up your hardware system use either your application software documentation or the NI DAQ documentation to help you write your application If you have a large complicated system it is worthwhile to look through the software documentation before you configure your hardware Accessory installation guides or manuals If you are using accessory products read the terminal block and cable assembly installation guides They explain how to physically connect the relevant pieces of the system Consult these guides when you are making your connections SCXI chassis manuals If you are using SCXI read these manuals for maintenance information on the chassis and installation instructions xi PCI PXI 671 1 6713 User Manual About This Manual Related Documentation The following documents contain information you may find helpful e DAQ STC Technical Reference Manual e National Instruments Application Note 025 Field Wiring and Noise Considerations for Analog Signals e PCI Local Bus Specification Revision 2 0 Customer Communication PCI PXI 6711 6713 User Manual National Instruments wants to receive your comments on our products and manuals We are interested in the applications you develop with our products and we want
36. e timing signals and that multiple timing signals can use the same PFI simultaneously This flexible routing scheme reduces the need to change physical connections to the 1 O connector for different applications You can also individually enable each of the PFI pins to output a specific internal timing signal For example if you need the UPDATE signal as an output on the I O connector software can turn on the output driver for the PFIS UPDATE pin Device and RTSI Clocks RTSI Triggers Many functions performed by the 6711 6713 device require a frequency timebase to generate the necessary timing signals for controlling DAC updates or general purpose signals at the I O connector The 6711 6713 device can use either its internal 20 MHz timebase or a timebase received over the RTSI bus In addition if you configure the device to use the internal timebase you can also program the device to drive its internal timebase over the RTSI bus to another device that is programmed to receive this timebase signal This clock source whether local or from the RTSI bus is used directly by the device as the primary frequency source The default configuration at startup is to use the internal timebase without driving the RTSI bus timebase signal This timebase is software selectable The seven RTSI trigger lines on the RTSI bus provide a very flexible interconnection scheme for the 6711 6713 device sharing the RTSI bus These bidirectional lines can drive an
37. enerated UPDATE As an output the WFTRIG signal reflects the trigger that initiates waveform generation This is true even if the waveform generation is being externally triggered by another PFI The output is an active high pulse with a pulse width of 25 to 50 ns This output is set to tri state at startup National Instruments Corporation 4 11 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections Figures 4 5 and 4 6 show the input and output timing requirements for the WFTRIG signal tw P gt Rising edge polarity Falling edge polarity tw 10 ns minimum Figure 4 5 WFTRIG Input Signal Timing i ty i t 1 1 i tw 25 50 ns i Figure 4 6 WFTRIG Output Signal Timing UPDATE Signal Any PFI pin can externally input the UPDATE signal which is available as an output on the PFIS UPDATE pin As an input the UPDATE signal is configured in the edge detection mode You can select any PFI pin as the source for UPDATE and configure the polarity selection for either rising or falling edge The selected edge of the UPDATE signal updates the outputs of the DACs In order to use UPDATE you must set the DACs to posted update mode As an output the UPDATE signal reflects the actual update pulse that is connected to the DACs This is true even if the updates are being externally generated by another PFI The output is an active low pulse with a pulse width of
38. ereseersseeess 4 10 EXTSTROBE Sigal ser e e a E a s 4 11 Waveform Generation Timing Connections oooccoconocconconaconcnnncononnnonnnnnncnnnnns 4 11 WETRIG Signal ienero tii cers et i id outa 4 11 UPDATE Sigtial iii ilatina 4 12 UISOURCE Signal ici ini oda 4 13 General Purpose Timing Signal Connections ooonoccnnnnonnonnconccnnonnnnnnconocanonnn no 4 14 GPCTRO_SOURCE Signal c cooccnncnncnnocnnnnconnonncononanonncnnnonnccnncononnncnnon 4 14 GPETRO_ GATE Signal acciona 4 15 GPCTRO OUT Simao radio dune tigi ii hei 4 16 GPCTRO_UP_DOWN Sigal eritisest 4 16 GPCTR1_SOURCE Signal c cooccnccnncnnonncnnconnnnnonncnnnonnocnnonnccnncnonnncnnon 4 17 GPETRI GATE Signal viri aa aere aee i ee illes 4 17 GPCTRI OUT Signal a nie heii EE de 4 18 GPCTR1_UP_DOWN Signal ooooccncncnnonacononinnoncnncnnnoncnncnncnnnnonccnncnnos 4 19 FREQ OUT Sinaloa id 4 20 Field Wiring ConsideratiONS ooocooncconoooconnconocnnonnnnnnnnnn nan con crano nn non nc rnn concern cn none cnn a ISEE 4 20 Chapter 5 Calibration Loading Calibration Constant ooooconocionconnconcconcononnonn coronan cnancnn eeo nn con nono conc cone cn none canon 5 1 Self Cali bration oc ee ain i ne eee 5 2 External Calibre 5 2 Other Considerations cooocnci nnecontin o e EE pae poneo an a sa 5 3 Appendix A Specifications Appendix B Common Questions PCI PXI 6711 6713 User Manual vi O National Instruments Corporation Contents Appendix C Customer Communication Glossary Index F
39. erwise noted Refers to all PC AT series computers with PCI bus unless otherwise noted SCXI stands for Signal Conditioning eXentsions for Instrumentation and is a National Instruments product line designed to perform front end signal conditioning for National instruments plug in DAQ devices X National Instruments Corporation About This Manual National Instruments Documentation The PCI PXI 671 1 6713 User Manual is one piece of the documentation set for your DAQ system You could have any of several types of documentation depending on the hardware and software in your system Use the documentation you have as follows National Instruments Corporation Getting Started with SCXI If you are using SCXI this is the first manual you should read It gives an overview of the SCXI system and contains the most commonly needed information for the modules chassis and software Your SCX hardware user manuals If you are using SCXI read these manuals next for detailed information about signal connections and module configuration They also explain in greater detail how the module works and contain application hints Your DAQ hardware documentation This documentation has detailed information about the DAQ hardware that plugs into or is connected to your computer Use this documentation for hardware installation and configuration instructions specification information about your DAQ hardware and application hints Software
40. evices in system Base I O address of other devices DMA channels of other devices Interrupt level of other devices Other Products Computer make and model Microprocessor Clock frequency or speed Type of video board installed Operating system version Operating system mode Programming language Programming language version Other boards in system Base I O address of other boards DMA channels of other boards Interrupt level of other boards Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products This information helps us provide quality products to meet your needs Title PCI PXI 6711 6713 User Manual Edition Date October 1998 Part Number 322080A 01 Please comment on the completeness clarity and organization of the manual If you find errors in the manual please record the page numbers and describe the errors Thank you for your help Name Title Company Address E Mail Address Phone Fax Mail to Technical Publications Faxto Technical Publications National Instruments Corporation National Instruments Corporation 6504 Bridge Point Parkway 512 794 5678 Austin Texas 78730 5039 Glossary Prefix Meanings Value p pico 10 22 n nano 10 2 u micro 10 6 m mil
41. ferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory differential nonlinearity a measure in least significant bit of the worst case deviation of code widths from their ideal value of 1 LSB digital output electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed external strobe signal first in first out memory buffer FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be read or written For example an analog input FIFO stores the results of A D conversions until the data can be read into system memory Programming the DMA controller and servicing interrupts can take several milliseconds in some cases During this time data accumulates in the FIFO for future retrieval With a larger FIFO longer latencies can be tolerated In the case of analog output a FIFO permits faster update rates because the waveform data can be stored in the FIFO ahead of time This again reduces the effect of latencies associated with getting the data from system memory to the DAQ device frequency output signal feet gate signal general purpose counter signal G 4 National Instruments Corporation GPCTRO_GATE GPCTRO_OUT GPCTRO_SOURCE GPCTRO_UP_DOWN GPCTR1_GATE GPCTR1_OUT GPCTR1_SOURCE GPCTR1_UP_DOWN
42. ge of the source signal If you use an internal timebase clock the gate signal cannot be synchronized with the clock In this case gates applied close to a source edge take effect either on that source edge or on the next one This arrangement results in an uncertainty of one source clock period with respect to unsynchronized gating sources The OUT output timing parameters are referenced to the signal at the SOURCE input or to one of the internally generated clock signals on the 6711 6713 device Figure 4 16 shows the OUT signal referenced to the rising edge of a source signal Any OUT signal state changes occur within 80 ns after the rising or falling edge of the source signal FREQ_OUT Signal This signal is available only as an output on the FREQ_OUT pin The frequency generator for the 6711 6713 device outputs the FREQ_OUT pin The frequency generator is a 4 bit counter that can divide its input clock by the numbers 1 through 16 The input clock of the frequency generator is software selectable from the internal 10 MHz and 100 kHz timebases The output polarity is software selectable This output is set to tri state at startup Field Wiring Considerations PCI PXI 6711 6713 User Manual The following recommendations apply for all signal connections to the 6711 6713 device e Separate the 6711 6713 device signal lines from high current or high voltage lines These lines can induce currents in or voltages on the 6711 6713 device s
43. he 6711 6713 device to both control and be controlled by other devices and circuits There are a total of 13 timing signals internal to the DAQ STC that can be controlled by an external source These timing signals can also be controlled by signals generated internally to the DAQ STC and these selections are fully software configurable For example the signal routing multiplexer for controlling the UPDATE signal is shown in Figure 3 2 RTSI Trigger lt 0 6 gt lt gt Update Interval Counter TC 3 gt gt UPDATE PFI lt 0 9 gt lt GPCTRO_OUT gt PCI PXI 6711 6713 User Manual Figure 3 2 UPDATE Signal Routing This figure shows that UPDATE can be generated from a number of sources including the external signals RTSI lt 0 6 gt and PFI lt 0 9 gt and the internal signals Sample Interval Counter TC and GPCTRO_OUT Many of these timing signals are also available as outputs on the RTSI pins as indicated in the RTSI Triggers section later in this chapter and on the PFI pins as indicated in Chapter 4 Signal Connections 3 4 National Instruments Corporation Chapter 3 Hardware Overview Programmable Function Inputs The 10 PFIs are connected to the signal routing multiplexer for each timing signal and software can select one of the PFls as the external source for a given timing signal It is important to note that any of the PFIs can be used as an input by any of th
44. her events outside reasonable control Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation ComponentWorks CVI DAQPad DAQ STC LabVIEW MITE NI DAQ NI PGIA PXI RTSI SCXI and VirtualBench are trademarks of National Instruments Corporation Product and company names listed are trademarks or trade names of their respective companies WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS National Instruments products are not designed with components and testing intended to ensure a level of reliability suitable for use in treatment and diagnosis of humans Applications of National Instruments products involving medical or clinical treatment can create a potential for accidental injury caused by product failure or by errors on the part of the user or application designer Any use or application of National Instruments products for or involving medical or clinical treatment must be performed by properly trained and qualified medical personnel and all traditional medical safeguards equipment and procedures that are appropriate in the particular situation to prevent serious injury or death should always continue to be used when National In
45. ice and the computer Maximum input ratings for each signal are given in the Protection column of Table 4 2 National Instruments is not liable for any damages resulting from such signal connections National Instruments Corporation 4 1 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections PCI PXI 6711 6713 User Manual AOGND 34 68 NC NC 33 67 AOGND AOGND 32 66 AOGND AOGND 31 65 DAC7OUT DAC60UT 30 64 AOGND AOGND 29 63 AOGND DAC50UT 28 62 NC AOGND 27 61 AOGND AOGND 26 60 DAC40UT DAC30UT 25 59 AOGND AOGND 24 58 AOGND AOGND 23 57 DAC20UT DACOOUT 22 56 AOGND DAC1OUT 21 55 AOGND EXTREF 20 54 AOGND DIO4 19 53 DGND DGND 18 52 DIOO DIO1 17 51 DIO5 DIO6 16 50 DGND DGND 15 49 DIO2 5V 14 48 DIO7 DGND 13 47 DIO3 DGND 12 46 NC PFIO 11 45 EXTSTROBE PFI 10 44 DGND DGND 9 43 PFI2 5 V 8 42 PFI3 GPCTR1_SOURCE DGND 7 41 PFI4 GPCTR1_GATE PFI5 UPDATE 6 40 GPCTR1_OUT PFI6 WFTRIG 5 39 DGND DGND 4 38 PFIZ PFI9 GPCTRO_GATE 3 37 PFI8 GPCTRO_SOURCE GPCTRO_OUT 2 36 DGND FREQ_OUT 1 135 DGND 1 No Connect on PCI PXI 6711 Figure 4 1 1 0 Connector Pin Assignment for the PCI PXI 6711 6713 Device 4 2 National Instruments Corporation 1 0 Connector Signal Descriptions Chapter 4 Signal Connections Table 4 1 Signal Descriptions f
46. ignal lines if they run in parallel paths at a close distance To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other e Do notrun signal lines through conduits that also contain power lines e Protect signal lines from magnetic fields caused by electric motors welding equipment breakers or transformers by running them through special metal conduits For more information refer to the application note Field Wiring and Noise Consideration for Analog Signals available from National Instruments 4 20 National Instruments Corporation Calibration This chapter discusses the calibration procedures for your PCI PXI 671 1 6713 device If you are using the NI DAQ device driver that software includes calibration functions for performing all of the steps in the calibration process Calibration refers to the process of minimizing measurement and output voltage errors by making small circuit adjustments On the 6711 6713 device these adjustments take the form of writing values to onboard calibration DACs CalDACs Some form of device calibration is required for all but the most forgiving applications If you do not calibrate your device your signals and measurements could have very large offset gain and linearity errors Three levels of calibration are available to you and described in this chapter The first level is the fastest
47. igures Figure 1 1 The Relationship Between the Programming Environment NI DAQ and Your Hardware ooooccooccconononononnnnnonnccnnnnnconnnnnnonnnncnnnnncnnnnnnns 1 6 Figure 3 1 6711 6713 Block Diagram ooconncnnnnnncnncnnonnonnnonnnnnonnnonnonaconnonnncnncnnocononnnon 3 2 Figure 3 2 UPDATE Signal Routing ooooonncononincconnconccnncnnonononn nono noncnonc nn con corn nonnconoo 3 4 Figure 3 3 RTSIBus Signal Connection 00 0 ceceeeceeeeeeeeeeeseeeseeseeeneenaes 3 6 Figure 4 1 I O Connector Pin Assignment for the PCI PXI 67 11 6713 Device ieee eee eceseeeeecseeeseceessecnsenaeenees 4 2 Figure 4 2 Analog Output Connections oococooccocccononnnonononcnnnonncnncon non nonno cnn nnnnrancnnccnnos 4 7 Figure 4 3 Digital I O Connecti0NS cconnonncnonnnonconnnnncnncnnconnonnonn cnn cnn nrn non nc noc cnn cnnnnnnns 4 8 Figure 4 4 Timing I O Connections issir ensein oree es nn iania eE 4 10 Figure 4 5 WFTRIG Input Signal Timing conncnnonnoninoninncnnnonncononnonn nono rano nn con ncnnncnnono 4 12 Figure 4 6 WFTRIG Output Signal TiMIN8 ooocnnnicnninnnonioncnnncnncononnonanoncrano nacion ncnnos 4 12 Figure 4 7 UPDATE Input Signal TiMiN8 ooonicnnnnnonnnoncononnnonncononnncnn nono nano nn con ncnnos 4 13 Figure 4 8 UPDATE Output Signal Timing oooonccncnnnonnnoninncnnconocononnncnnonnnnancancnnnonnos 4 13 Figure 4 9 UISOURCE Signal Timing cocccnncnnonnonconnconcnnconncnnonnnonnnan con nonncrnconncnncnnnnns 4 14 Figure 4 10
48. iming Counter Timing vo DAQ STC oss Analog Input 1 RTSI Bus Digital 1 O 8 Digital VO 1 Timing Control Interface Note CH4 through CH7 on 6713 only Figure 3 1 6711 6713 Block Diagram Analog Output The 6711 has four channels and the 6713 has eight channels of voltage output at the I O connector The reference for the analog output circuitry is software selectable per channel The reference can be either internal or external whereas the range is always bipolar This means that you can PCI PXI 6711 6713 User Manual 3 2 National Instruments Corporation Chapter 3 Hardware Overview output signals up to 10 V with internal reference selected or EXTREF voltage with external reference selected Analog Output Reference Selection You can connect each D A converter DAC to the internal reference of 10 V or to the external reference signal connected to the external reference EXTREF pin on the I O connector This signal applied to EXTREF should be within 11 V You can configure each channel to use either internal or external reference The default reference value selection is internal reference Analog Output Reglitch Selection Digital 1 0 In normal operation a DAC output will glitch whenever it is updated with anew value The glitch energy differs from code to code and appears as distortion in the frequency spectrum Each analog output channel contains a reglitch circuit
49. ing temperature Max source frequency uu eee 20 MHz Min source pulse duration 0 00 10 ns edge detect mode Min gate pulse duration ee 10 ns edge detect mode Data transfers occccccnncnononconnncnnnncnnninnnnnn DMA interrupts programmed I O DMA modesina Scatter gather Triggers Digital Trigger Compatibility oooooonccnocincccccnonnnonanininnnnnos TTL RESPONSE voii iia die Rising or falling edge Pulse widths sseni 10 ns min National Instruments Corporation A 5 PCI PXI 6711 6713 User Manual Appendix A Specifications for 6711 6713 Device RTSI and PXI Trigger Lines e PCI 6711 6713 Trigger lines Dia 7 RISI clocken 1 PXI 6711 6713 Trigger lines lt 0 5 gt nsee 6 Star TIE Ser anerer R 1 CloCK A E 1 Bus Interface Pia 5 V PCI master slave VPO cistitis tiene repo esos PXI CompactPCI master slave Power Requirement PCI PXI 6711 49 VDE 45 Goi aii 0 80 A typ 1 0 A max Power available at I O connector 4 65 to 5 25 VDC at1 A PCI PXI 6713 5 VDC 45 concocccccconcocnnonininannnonos 1 25 A typ 1 5 A max Power available at I O connector 4 65 to 5 25 VDC at 1 A PCI PXI 6711 6713 User Manual A 6 National Instruments Corporation Appendix A Specifications for 6711 6713 Device Physical Dimensions not including connectors PCI 6711 6713 0oococccnicnicniccconnnancnn 17 5 by 10 7 cm 6 87 by 4 2 in PXI 6711 671B nenni 16 by 10 cm 6 3 by 3 9 in T O connector PCI PXI 6711
50. ing sesin nne e a oa E r A E E Mei EEEE RE 1 7 Chapter 2 Installation and Configuration Software Installation reei e a a a e E a 2 1 ENANA RS 2 1 Device Configuration science caso cbicseseteeoedeebetpespesssohecsensesbbseebessestatesetvects 2 3 Chapter 3 Hardware Overview ANOS OVPU in E n is 3 2 Analog Output Reference Selection ooocoononnnoccconononncconcconnnconncnnononnnnnnnccanen ns 3 3 Analog Output Reglitch Selecti0N oooncnnnnnninnnnocnnonconcnnncnnconncononnn cnn nonccnnnnnos 3 3 Dista VO oi s 3 3 Timing Sinal RODIN isa iia 3 3 Programmable Function Inputs oooonncnnnononinoninnconocnncnnonnncnnnnnn conc rancnncrancnn conos 3 5 Device and RTSTClOCkS acc n a ee ae deae O iaoa REER STAA 3 5 RES DTS e S ii E OS 3 5 National Instruments Corporation v PCI PXI 6711 6713 User Manual Contents Chapter 4 Signal Connections VO Connector standar ao eiii 4 1 T O Connector Signal Descriptions oooococcoccconconananconnnannnncnancan oran cnn nro corn ccnncnnos 4 3 Analog Output Signal Connections oooocccccconnconcoanonnnononancnnncancnn non no nnnonnconn cn nonnn cnn nnnccnnnnns 4 6 Digital I O Signal Connections coocooccoccconcnancnnnononanonancnn non ncnno nono nncon non nc onn cono nn none nnn nan crnnnns 4 7 Power Connections seiniin a ea ap E doi ETETE TEE scenic 4 9 Timing Connections enorer esac ch soba oo oorr AO A tidad EETA EKE EES 4 9 Programmable Function Input Connections esesessseessseresesreererrerr
51. l instruments through standard OLE controls and DLLs With ComponentWorks you PCI PXI 6711 6713 User Manual 1 4 National Instruments Corporation Chapter 1 Introduction can use all of the configuration tools resource management utilities and interactive control utilities included with NI DAQ VirtualBench features virtual instruments that combine DAQ products software and your computer to create a stand alone instrument with the added benefit of the processing display and storage capabilities of your computer VirtualBench instruments load and save waveform data to disk in the same forms that can be used in popular spreadsheet programs and word processors Using ComponentWorks LabVIEW LabWindows CVI or VirtualBench software will greatly reduce the development time for your data acquisition and control application NI DAQ Driver Software The NI DAQ driver software is included at no charge with all National Instruments DAQ hardware NI DAQ is not packaged with SCXI or accessory products except for the SCXI 1200 NI DAQ has an extensive library of functions that you can call from your application programming environment These functions include routines for analog input A D conversion buffered data acquisition high speed A D conversion analog output D A conversion waveform generation timed D A conversion digital I O counter timer operations SCXI RTSI self calibration messaging and acquiring data to extended mem
52. li 10 3 k kilo 103 M mega 106 G giga 10 t tera 102 Numbers Symbols degrees gt greater than 2 greater than or equal to lt less than lt less than or equal to per percent plus or minus positive of or plus negative of or minus Q ohms National Instruments Corporation G 1 PCI PXI 671 1 6713 User Manual Glossary 7 5 V AC A D ADC ANSI AO AOGND ASIC bipolar C C CalDAC CH cm PCI PXI 6711 6713 User Manual square root of 5 VDC source signal amperes alternating current analog to digital analog to digital converter an electronic device often an integrated circuit that converts an analog voltage to a digital number American National Standards Institute analog output analog output ground signal Application Specific Integrated Circuit a proprietary semiconductor component designed and manufactured to perform a set of specific functions a signal range that includes both positive and negative values for example 5 V to 5 V Celsius calibration DAC channel pin or wire lead to which you apply or from which you read the analog or digital signal Analog signals can be single ended or differential For digital signals you group channels to form ports Ports usually consist of either four or eight digital channels centimeter G 2 National Instruments Corporation CMOS CMRR CONVERT counter timer CTR D D A DAC
53. lity specifications A 4 National Instruments Corporation 1 5 Index T technical support E 1 to E 2 telephone and fax support numbers E 2 theory of operation See hardware overview timing connections 4 9 to 4 20 general purpose timing signal connections 4 14 to 4 20 FREQ_OUT signal 4 20 GPCTRO_GATE signal 4 15 to 4 16 GPCTRO_OUT signal 4 16 GPCTRO_SOURCE signal 4 14 to 4 15 GPCTRO_UP_DOWN signal 4 16 GPCTR1_GATE signal 4 17 to 4 18 GPCTR1_OUT signal 4 18 GPCTR1_SOURCE signal 4 17 GPCTR1_UP_DOWN signal 4 19 to 4 20 programmable function input connections 4 10 to 4 11 questions about B 2 to B 3 timing I O connections figure 4 10 waveform generation timing connections 4 11 to 4 14 UISOURCE signal 4 13 to 4 14 UPDATE signal 4 12 to 4 13 WFTRIG signal 4 11 to 4 12 timing I O specifications A 5 timing signal routing 3 3 to 3 6 device and RTSI clocks 3 5 internal timing signals 3 4 programmable function inputs 3 5 RTSI triggers 3 5 to 3 6 UPDATE signal routing figure 3 4 transfer characteristic specifications A 2 to A 3 triggers digital trigger specifications A 5 questions about B 2 PCI PXI 6711 6713 User Manual Index U UISOURCE signal 4 13 to 4 14 unpacking PCI PXI 6711 6713 1 4 UPDATE signal input signal timing figure 4 13 output signal timing figure 4 13 signal routing 3 4 timing connections 4 12 to 4 13 V VCC signal table 4 5 VirtualBench software 1
54. ment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this manual is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National
55. n as well You can use the polarity selection for any of the seven timing signals but the edge or level detection will depend upon the particular timing signal being controlled The detection requirements for each timing signal are listed within the section that discusses that individual signal In edge detection mode the minimum pulse width required is 10 ns This applies for both rising edge and falling edge polarity settings There is no maximum pulse width requirement in edge detect mode In level detection mode there are no minimum or maximum pulse width requirements imposed by the PFIs themselves but there may be limits imposed by the particular timing signal being controlled These requirements are listed later in this chapter EXTSTROBE Signal EXTSTROBE is an output only signal that is used for controlling SCXI devices Waveform Generation Timing Connections The analog group defined for the 6711 6713 device is controlled by WFTRIG UPDATE and UISOURCE WFTRIG Signal Any PFI pin can externally input the WFTRIG signal which is available as an output on the PFI6 WFTRIG pin As an input the WFTRIG signal is configured in the edge detection mode You can select any PFI pin as the source for WFTRIG and configure the polarity selection for either rising or falling edge The selected edge of the WFTRIG signal starts the waveform generation for the DACs The update interval UD counter is started if you select internally g
56. n the 5 V slot Use the injector ejector handle to fully inject the device into place Screw the front panel of the PXI 6711 6713 to the front panel mounting rails of the PXI or CompactPCI chassis Visually verify the installation Plug in and turn on the PXI or CompactPCI chassis The PXI 6711 6713 is now installed PCI 6711 6713 1 pote oe 7 8 Write down the 6711 6713 device serial number in the 6711 6713 Device Hardware and Software Configuration Form in Appendix D Customer Communication of this manual Turn off and unplug your computer Remove the top cover or access port to the I O channel Remove the expansion slot cover on the back panel of the computer Insert the 6711 6713 device into a 5 V PCI slot Gently rock the device to ease it into place It may be a tight fit but do not force the device into place If required screw the mounting bracket of the 6711 6713 device to the back panel rail of the computer Replace the cover Plug in and turn on your computer The PCI 6711 6713 device is installed You are now ready to configure your software Refer to your software documentation for configuration instructions PCI PXI 6711 6713 User Manual 2 2 National Instruments Corporation Chapter 2 Installation and Configuration Device Configuration Due to the National Instruments standard architecture for data acquisition the PCI bus specification for the 6711 6713 device is completely softw
57. nal sources such as the AC power line motors generators transformers fluorescent lights CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground G 6 O National Instruments Corporation OUT PCI PFI PFI3 GPCTRI_ SOURCE PFI4 GPCTR1_GATE PFIS UPDATE PFI6 WFTRIG PFI8 GPCTRO_ SOURCE PFI9 GPCTRO_GATE PGIA port ppm pu rms National Instruments Corporation G 7 Glossary output pin a counter output pin where the counter can generate various TTL pulse waveforms Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 MB s Programmable Function Input PFI3 general purpose counter source PFI4 general purpose counter 1 gate PFIS update PFI6 waveform trigger PFI8 general purpose counter 0 source PFI9 general purpose counter 0 gate Programmable Gain Instrumentation Amplifier 1 a communications connection on a computer or a remote contr
58. nput DIO Digital Input Output pu pull up AO Analog Output DO Digital Output The tolerance on the 50 kQ pull up and pull down resistors is very large Actual value may range between 17 and 100 KQ Analog Output Signal Connections PCI PXI 6711 6713 User Manual The analog output signals are DAC lt 0 7 gt OUT AOGND and EXTREF DACOOUT is the voltage output signal for analog output channel 0 EXTREF is the external reference input for all analog output channels You can use this input to reduce the voltage swing on the DAC outputs while preserving the dynamic range For example with internal reference the minimum change LSB on a voltage output is 20V 488 mV 4096 For an external reference at 5 V you can output 5 V with the LSB ona voltage output reduced to 2 44 mV This gives you a higher resolution at lower voltage You must configure each analog output channel individually for external reference selection in order for the signal applied at the external reference input to be used by that channel If you do not specify an external reference the channel will use the internal reference Analog output configuration options are explained in the Analog Output section in Chapter 3 Hardware Overview The following ranges and ratings apply to the EXTREF input e Usable input voltage range 11 V peak with respect to AOGND e Absolute maximum ratings 15 V peak with respect to AOGND 4 6 National Instruments Corp
59. oller 2 a digital port consisting of four or eight lines of digital input and or output parts per million pull up random access memory root mean square PCI PXI 671 1 6713 User Manual Glossary RSE RTD RTSIbus RTSI_OSC S S SCANCLK SCXI SE settling time signal conditioning SISOURCE SOURCE S s system noise PCI PXI 6711 6713 User Manual referenced single ended mode all measurements are made with respect to a common reference measurement system or a ground Also called a grounded measurement system resistive temperature detector a metallic probe that measures temperature based upon its coefficient of resistivity Real Time System Integration bus the National Instruments timing bus that connects DAQ devices directly by means of connectors on top of the devices for precise timing synchronization between multiple devices RTSI Oscillator RTSI bus master clock seconds samples scan clock signal Signal Conditioning eXtensions for Instrumentation the National Instruments product line for conditioning low level signals within an external chassis near sensors so only high level signals are sent to DAQ devices in the noisy computer environment single ended a term used to describe an analog input that is measured with respect to a common ground the amount of time required for a voltage to reach its final value within specified limits the manipulation of signals to prepare them fo
60. or See I O connector counter timers questions about B 3 customer communication xii E 1 to E 2 D DAC lt 0 7 gt OUT signal analog output signal connections 4 6 to 4 7 description table 4 3 signal summary table 4 4 DAQ STC system timing controller 1 1 B 1 B 2 deglitching filter B 2 DGND signal description table 4 3 digital I O connections 4 7 signal summary table 4 4 PCI PXI 6711 6713 User Manual Index digital I O operation 3 3 questions about B 2 to B 3 signal connections 4 7 to 4 8 specifications A 4 digital trigger specifications A 5 DIO lt 0 7 gt signal description table 4 3 digital I O connections 4 7 to 4 8 signal summary table 4 5 dltd hardware installation 2 1 to 2 2 documentation conventions used in manual x National Instruments documentation xi organization of manual ix x related documentation xii E EEPROM storage of calibration constants 5 1 electronic support services E 1 to E 2 e mail support E 2 environment specifications A 7 equipment optional 1 7 external reference input specifications A 3 EXTREF signal analog output reference selection 3 3 analog output signal connections 4 6 to 4 7 description table 4 3 signal summary table 4 5 EXTSTROBE signal controlling SCXI devices 4 11 description table 4 3 signal summary table 4 5 F fax and telephone support numbers E 2 Fax on Demand support E 2 field wiring considerations 4
61. or 1 0 Connector Pins Signal Name Reference Direction Description AOGND Analog Output Ground The analog output voltages are referenced to this node DAC lt 0 7 gt OUT AOGND Output Analog Output Channels 0 through 7 These pins supply the voltage output of the respective channel DGND Digital Ground This pin supplies the reference for the digital signals at the I O connector as well as the 5 VDC supply DIO lt 0 7 gt DGND Input or Output Digital I O signals DIO6 and 7 can control the up down signal of general purpose counters 0 and 1 respectively 5 V DGND Output 5 VDC Source These pins are fused for up to 1 A of 5 V supply The fuse is self resetting EXTREF AOGND Input External Reference This is the external reference input for the analog output circuitry EXTSTROBE DGND Output External Strobe This output is used for controlling SCXI devices PFIO DGND Input PFIO As an input this is one of the Programmable Function Inputs PFIs PFI signals are explained in the Timing Connections section later in this chapter PF lt 0 cannot be output PFI1 DGND Input PFI1 As an input this is one of the PFIs PFI cannot be an output PFI2 DGND Input PFI2 As an input this is one of the PFIs PFI2 cannot be an output PFI3 GPCTR1_SOURCE DGND Input Output PFI3 Counter 1 Sour
62. oration Chapter 4 Signal Connections AOGND is the ground reference signal for the analog output channels DAC lt 0 7 gt OUT as well as EXTREF is referenced to AOGND The external reference signal can be either a DC or an AC signal The device multiplies this reference signal by the DAC code divided by the full scale DAC code to generate the output voltage Figure 4 2 shows how to make analog output connections to the 6711 6713 device External Reference Signal Optional DACOOUT Channel 0 V EXTREF AOGND V DAC1O0UT lt Channel 1 Analog Output Channels Load 6711 6713 Device Figure 4 2 Analog Output Connections Digital 1 0 Signal Connections As Caution The digital I O signals are DIO lt 0 7 gt and DGND DIO lt 0 7 gt are the signals making up the DIO port and DGND is the ground reference signal for the DIO port You can program all lines individually to be inputs or outputs Exceeding the maximum input voltage ratings which are listed in Table 4 2 can damage the 6711 6713 device and the computer National Instruments is not liable for any damages resulting from such signal connections O National Instruments Corporation 4 7 PCVPXI 6711 6713 User Manual Chapter 4 Signal Connections Figure 4 3 shows signal connections for three typical digital I O applications LED sz ANT DIO lt 4 7 gt
63. ory NI DAQ has both high level DAQ I O functions for maximum ease of use and low level DAQ I O functions for maximum flexibility and performance Examples of high level functions are streaming data to disk or acquiring a certain number of data points An example of a low level function is writing directly to registers on the DAQ device NI DAQ does not sacrifice the performance of National Instruments DAQ devices because it lets multiple devices operate at their peak NI DAQ also internally addresses many of the complex issues between the computer and the DAQ hardware such as programming interrupts and DMA controllers NI DAQ maintains a consistent software interface among its different versions so that you can change platforms with minimal modifications to your code Whether you are using conventional National Instruments Corporation 1 5 PCI PXI 671 1 6713 User Manual Chapter 1 Introduction programming languages or National Instruments application software your application uses the NI DAQ driver software as illustrated in Figure 1 1 Conventional ComponentWorks Programming LabVIEW LabWindows CVI Environment NI DAQ Driver Software Lo DAQ or Personal Computer SCXI Hardware or Workstation or VirtualBench Figure 1 1 The Relationship Between the Programming Environment NI DAQ and Your Hardware Register Level Programming PCI PXI 6711 6713
64. ountry Australia Austria Belgium Brazil Canada Ontario Canada Qu bec Denmark Finland France Germany Hong Kong Israel Italy Japan Korea Mexico Netherlands Norway Singapore Spain Sweden Switzerland Taiwan United Kingdom United States PCI PXI 671 1 6713 User Manual Telephone 03 9879 5166 0662 45 79 90 0 02 757 00 20 011 288 3336 905 785 0085 514 694 8521 45 76 26 00 09 725 725 11 01 48 14 24 24 089 741 31 30 2645 3186 03 6120092 02 413091 03 5472 2970 02 596 7456 5 520 2635 0348 433466 32 84 84 00 2265886 91 640 0085 08 730 49 70 056 200 51 51 02 377 1200 01635 523545 512 795 8248 C 2 Fax 03 9879 6277 0662 45 79 90 19 02 757 03 11 011 288 8528 905 785 0086 514 694 4399 45 76 26 02 09 725 725 55 01 48 14 24 14 089 714 60 35 2686 8505 03 6120095 02 41309215 03 5472 2977 02 596 7455 5 520 3282 0348 430673 32 84 86 00 2265887 91 640 0533 08 730 43 70 056 200 51 55 02 737 4644 01635 523154 512 794 5678 National Instruments Corporation Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware and use the completed copy of this form as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently If you are using any National Instruments hardware or soft
65. our PCI PXI 6711 6713 device is a multifunction analog output DIO and timing input output I O device for PCI PXI CompactPCI and 1394 buses Organization of This Manual The PCI PXI 671 1 6713 User Manual is organized as follows National Instruments Corporation Chapter 1 Introduction describes your PCI PXI 6711 6713 device lists what you need to get started describes the optional software and optional equipment and explains how to unpack your 6711 6713 device Chapter 2 Installation and Configuration explains how to install and configure your PCI PXI 671 1 6713 device Chapter 3 Hardware Overview presents an overview of the hardware functions on your PCI PXI 671 1 6713 device Chapter 4 Signal Connections describes how to make input and output signal connections to your PCI PXI 6711 6713 device via the device I O connector Chapter 5 Calibration discusses the calibration procedures for your PCI PXI 67 11 6713 device Appendix A Specifications lists the specifications of your PCI PXI 67 11 6713 device Appendix B Common Questions contains a list of commonly asked questions and their answers relating to usage and special features of your PCI PXI 6711 6713 device ix PCI PXI 6711 6713 User Manual About This Manual e Appendix C Customer Communication contains forms you can use to request help from National Instruments or to comment on our products e The Glossary contains an alphabetical list and
66. r digitizing SI counter clock signal source signal samples per second used to express the rate at which a DAQ device samples an analog signal a measure of the amount of noise seen by an analog circuit or an ADC when the analog inputs are grounded G 8 National Instruments Corporation TC ten ti gw tout THD thermocouple TRIG tsc tsp TTL U UI UISOURCE unipolar UPDATE V V VDC National Instruments Corporation Glossary terminal count the ending value of a counter gate hold time gate setup time gate pulse width output delay time total harmonic distortion the ratio of the total rms signal due to harmonic distortion to the overall rms signal in decibel or a percentage a temperature sensor created by joining two dissimilar metals The junction produces a small voltage as a function of the temperature trigger signal source clock period source pulse width transistor transistor logic update interval update interval counter clock signal a signal range that is always positive for example 0 to 10 V update signal volts volts direct current G 9 PCI PXI 671 1 6713 User Manual Glossary VI WFTRIG PCI PXI 6711 6713 User Manual virtual instrument 1 a combination of hardware and or software elements typically used with a PC that has the functionality of a classic stand alone instrument 2 a LabVIEW software module VI which consists of a front panel
67. rmance leave as much room as possible between the 6711 6713 device and other devices and hardware The following are general installation instructions but consult your computer user manual or technical reference manual for specific instructions and warnings PXI 6711 6713 You can install the PXI 67 11 6713 in any available PXI slot in your PXI or CompactPCI chassis Note The PXI 6711 6713 has connections to several reserved lines on the CompactPCI J2 connector Before installing the PXI 6711 6713 in a CompactPCI system that uses J2 connector lines for a purpose other than PXI see Chapter 1 Using PXI with CompactPCI National Instruments Corporation 2 1 PCI PXI 6711 6713 User Manual Chapter 2 Installation and Configuration Turn off and unplug your PXI or CompactPCI chassis Choose an unused PXI or CompactPCI peripheral slot For maximum performance install the PXI 671 1 6713 in a slot that supports bus arbitration or bus master cards The PXI 671 1 6713 contains onboard bus master DMA logic that can operate only in such a slot If you choose a slot that does not support bus masters you will have to disable the onboard DMA controller using your software PXI compliant chassis must have bus arbitration for all slots Remove the filter panel for the peripheral slot that you have chosen Touch a metal part on the chassis to discharge any static electricity that might be on your clothes or body Insert the PXI 6711 6713 device i
68. rporation Appendix A Specifications for 6711 6713 Device Gain error relative to internal reference After calibration eee 0 01 of output max Before calibration 0 00 0 0 5 of output max Gain error relative to external reference 0 to 0 5 of output max not adjustable Voltage Output A r twed aeteeeendeebes 10 V EXTREF Output coupling ee eeeeeeeeee DC Output impedance eee eeeeeee 0 1 Q max Currentd Vuestra 5 mA max Output stability eee Any passive load up to 1500 pF Protection circa iria ceases Short circuit to ground Power on state oooconncnnonnccnonnconncnnonnccnnonnos OV External Reference Input R ni Enas EEN 11 V Overvoltage protection eee 25 V powered on 15 V powered off Input impedance eee eee eee eeeeeee 10 kQ Bandwidth 3 dB seses 1 MHz Dynamic Characteristics Slater 20 V us National Instruments Corporation A 3 PCI PXI 671 1 6713 User Manual Appendix A Digital 1 0 PCI PXI 6711 6713 User Manual Specifications for 6711 6713 Device Channel crosstalk cccccseeeseseeeseeees Total harmonic distortion Stability Offset temperature coefficient Gain temperature coefficient Internal reference External reference oocmmmicicinnon Onboard calibration reference A te ee ne E Temperature coefficient Long term stability eee Number of channels
69. s in a high impedance state O National Instruments Corporation B 3 PCI PXI 6711 6713 User Manual Customer Communication For your convenience this appendix contains forms to help you gather the information necessary to help us solve your technical problems and a form you can use to comment on the product documentation When you contact us we need the information on the Technical Support Form and the configuration form if your manual contains one about your system configuration to answer your questions as quickly as possible National Instruments has technical assistance through electronic fax and telephone systems to quickly provide the information you need Our electronic services include a bulletin board service an FTP site a fax on demand system and e mail support If you have a hardware or software problem first try the electronic support systems If the information available on these systems does not answer your questions we offer fax and telephone support through our technical support centers which are staffed by applications engineers Electronic Services Bulletin Board Support National Instruments has BBS and FTP sites dedicated for 24 hour support with a collection of files and documents to answer most common customer questions From these sites you can also download the latest instrument drivers updates and example programs For recorded instructions on how to use the bulletin board and FTP services and for BBS autom
70. signment 6711 6713 Signal PXI Pin Name PXI J2 Pin Number RTSI Trigger lt 0 5 gt PXI Trigger lt 0 5 gt B16 A16 A17 A18 B18 C18 RTSI Trigger 6 PXI Star Trigger D17 RTSI Clock PXI Trigger 7 E16 Serial LBR 6 7 8 9 10 EI5 A3 C3 D3 E3 Communication 11 12 A2 B2 What You Need to Get Started To set up and use the 6711 6713 device you will need the following L Either the 6711 or 6713 device PCI PXI 6711 6713 User Manual a Q NI DAQ driver for PC compatibles version 6 5 or higher a One of the following software packages and documentation LabVIEW for Windows LabWindows CVI for Windows ComponentWorks VirtualBench C language compiler Q Your computer LL SH6868 EP cable Q One of the following BNC 2110 signal connector block SCB 68 shielded terminal block CB 68LP terminal block National Instruments Corporation 1 3 PCI PXI 6711 6713 User Manual Chapter 1 Introduction Unpacking The 6711 6713 device is shipped in an antistatic package to prevent electrostatic damage to the device Electrostatic discharge can damage several components on the device To avoid such damage in handling the device take the following precautions e Ground yourself via a grounding strap or by holding a grounded object e Touch the antistatic package to a metal part of your computer chassis before removing the device from the package e Remove the device from
71. struments products are being used National Instruments products are NOT intended to be a substitute for any form of established process procedure or equipment used to monitor or safeguard human health and safety in medical or clinical treatment Contents About This Manual Organization of This Manual ooooncnnnnnccnicnnonnnoncononnnonncnnnonnconnco no conc nonnn non conc nar nn cnn cnn nono ix Conventions Used in This Manual ccccessesssececceceecesseceeeeesaeceneeceeecsaeeeeeeeseeesaeeeeeees xX National Instruments Documentation ssssssesseerseseesteerseeeretseeestereeseeereereeserereereenseesee xi Related Docum nt ti h iera a aaee raaa Eai a TEER Ea EE Aa AEE ERA ova xii Customer COMMUNICALION eresie rE sire ESEE EE EEE AE E Ei xii Chapter 1 Introduction About the 6711 6713 DEVICES eir Aee eE EE EE AEE TES 1 1 Using PXI with CompactPCl nieren see aeoe oe eaea a Ee EESE roa Eoaea 1 2 What You Need to Get Started nare aaan ea A E EEE E ERA 1 3 Unpacking e ra eee rea E Eeo EE EEE ei 1 4 Software Programming Choices ssesesseseseesssreseseeresresrertsseersseetesreresteserresrertsreerrsrsteses 1 4 National Instruments Application Software ooooccnccnonnonnconconncononnnonnnnccnnonanonos 1 4 NI DAQ Driver SO WA E a aea a a a Eea Ea a in 1 5 Register Level Programming sseeessssreseseesrsreeseerssrrrssrerrsrersreserrenrerrsreerenenee 1 6 Optional Equipment sisri er er oe rie E E EE TEE ion EEs 1 7 Custom Cabl
72. tches depending on the frequency and nature of your output signal In addition if you are using this output as a source to a system that has low bandwidth characteristics the glitches are ignored by the system Timing and Digital 1 0 PCI PXI 6711 6713 User Manual What types of triggering can be hardware implemented on my 6711 6713 device Hardware digital triggering is supported on the 6711 6713 device What functionality does the DAQ STC make possible The DAQ STC has the complexity of more than 24 chips The DAQ STC makes possible PFI lines selectable logic level and frequency shift keying The DAQ STC also makes buffered operations possible such as direct up down control single pulse or pulse train generation equivalent time sampling buffered period and buffered semiperiod measurement B 2 National Instruments Corporation Appendix B Common Questions Pm using one of the general purpose counter timers on my 6711 6713 device but I do not see the counter timer output on the I O connector What am I doing wrong If you are using the NI DAQ language interface or LabWindows CVI you must configure the output line to output the signal to the I O connector Use the Select_Signal call in NI DAQ to configure the output line By default all timing I O lines except EXTSTROBE are tri stated What are the PFIs and how do I configure these lines PFIs are Programmable Function Inputs These lines serve as connections to vir
73. te your device An external calibration refers to calibrating your device with a known external reference rather than relying on the onboard reference Redetermining the value of the onboard reference is part of this process and the results can be saved in the EEPROM so you should not have to perform an external calibration very often You can externally calibrate your device by calling the NI DAQ calibration function The onboard voltage reference has a temperature coefficient of 5 ppm C max 25 uV C Therefore if the temperature difference between the factory calibration and the service environment is less than 10 C the maximum gain error is less than 50 ppm 0 005 percent at full scale output after performing self calibration PCI PXI 671 1 6713 User Manual 5 2 National Instruments Corporation Chapter 5 Calibration To externally calibrate your device be sure to use a very accurate external reference The reference should be several times more accurate than the device itself For example to calibrate a 12 bit device the external reference should be at least 0 0062 62 ppm accurate CF Note National Instruments recommends using a 5 V external reference voltage when performing calibration Other Considerations The CalDACs adjust the gain error of each analog output channel by adjusting the value of the reference voltage supplied to that channel This calibration mechanism is designed to work only with the intern
74. that generates uniform glitch energy at every code rather than large glitches at the major code transitions This uniform glitch energy appears as a multiple of the update rate in the frequency spectrum Notice that this reglitch circuit does not eliminate the glitches it only makes them more uniform in size By default reglitching is disabled for all channels however you can use NI DAQ to independently enable reglitching for each channel The 6711 6713 device contains eight lines of digital I O for general purpose use You can individually software configure each line for either input or output At system startup and reset the digital I O ports are all high impedance The hardware up down control for general purpose counters 0 and 1 are connected onboard to DIO6 and DIO7 respectively Thus you can use DIO6 and DIO7 to control the general purpose counters The up down control signals are input only and do not affect the operation of the DIO lines Timing Signal Routing The DAQ STC provides a very flexible interface for connecting timing signals to other devices or external circuitry The 6711 6713 device uses the RTSI bus to interconnect timing signals between devices and the National Instruments Corporation 3 3 PCI PXI 671 1 6713 User Manual Chapter 3 Hardware Overview Programmable Function Input PEI pins on the 1 O connector to connect the device to external circuitry These connections are designed to enable t
75. the 6711 6713 device OUT output signals V SOURCE IH V IL GATE IH IL O Von UT V OL we tsc gt q tsp gt q tsp gt gt tgsu t gt tgh t lt tgw gt d tout Source Clock Period tos 50 ns minimum Source Pulse Width tsp 23 ns minimum Gate Setup Time tgsu 10 ns minimum Gate Hold Time toh Ons minimum Gate Pulse Width tow 10 ns minimum Output Delay Time tout 80 ns maximum Figure 4 16 GPCTR Timing Summary The GATE and OUT signal transitions shown in Figure 4 16 are referenced to the rising edge of the SOURCE signal This timing diagram assumes that the counters are programmed to count rising edges The same timing diagram but with the source signal inverted and referenced to the falling edge of the source signal would apply when the counter is programmed to count falling edges The GATE input timing parameters are referenced to the signal at the SOURCE input or to one of the internally generated signals on the 6711 6713 device Figure 4 16 shows the GATE signal referenced to the rising edge of a source signal The gate must be valid either high or low for at least 10 ns before the rising or falling edge of a source signal for the gate to take effect at that source edge as shown by ty and ty in National Instruments Corporation 4 19 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections Figure 4 16 The gate signal is not required to be held after the active ed
76. the PXI Specification revision 1 0 If you use a PXI compatible plug in device in a standard CompactPCI chassis you will be unable to use PXI specific functions but you can still use the basic plug in device functions For example the PXI trigger bus on your 6711 6713 device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard implementation for CompactPCI does not include these sub buses Your 6711 6713 device will work in any standard CompactPCI chassis adhering to the PICMG CompactPCI 2 0 R2 1 document PXI specific features RTSI bus trigger RTSI Clock and Serial Communication are implemented on the J2 connector of the CompactPCI bus Table 1 1 lists the J2 pins used by your PXI 671 1 6713 which is compatible with any CompactPCI chassis with a sub bus that does not drive these lines Even if the sub bus is capable of driving these lines the 6711 6713 is still compatible as long as those pins on the sub bus are disabled by default and are never enabled Damage can result if these lines are driven by the sub bus PCI PXI 6711 6713 User Manual 1 2 National Instruments Corporation Chapter 1 Introduction Table 1 1 PXI 6711 6713 J2 Pin As
77. tion 4 9 PCI PXI 671 1 6713 User Manual Chapter 4 Signal Connections All digital timing connections are referenced to DGND This reference is demonstrated in Figure 4 4 which shows how to connect an external PFIO source and an external PFI2 source to two 6711 6713 device PFI pins PFIO PFl2 PFIO Source PFI2 Source DGND Z 1 0 Connector 6711 6713 Device Figure 4 4 Timing I O Connections Programmable Function Input Connections PCI PXI 6711 6713 User Manual There are a total of seven internal timing signals that you can externally control from the PFI pins The source for each of these signals is software selectable from any of the PFIs when you want external control This flexible routing scheme reduces the need to change the physical wiring to the device I O connector for different applications requiring alternative wiring You can individually enable six of the PFI pins to output a specific internal timing signal For example if you need the UPDATE signal as an output on the I O connector software can turn on the output driver for the PFI5 UPDATE pin Be careful not to drive a PFI signal externally when it is configured as an output 4 10 National Instruments Corporation Chapter 4 Signal Connections As an input you can individually configure each PFI for edge or level detection and for polarity selectio
78. tion for the PFI pin for either active high or active low Figure 4 9 shows the timing requirements for the UISOURCE signal tp 50 ns minimum ty 10 ns minimum Figure 4 9 UISOURCE Signal Timing The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency limitation Either the 20 MHz or 100 kHz internal timebase normally generates the UISOURCE signal unless you select some external source General Purpose Timing Signal Connections The general purpose timing signals are GPCTRO_SOURCE GPCTRO_GATE GPCTRO_OUT GPCTRO_UP_DOWN GPCTR1_SOURCE GPCTR1_GATE GPCTR1_OUT GPCTR1_UP_DOWN and FREQ_OUT GPCTRO_SOURCE Signal Any PFI pin can externally input the GPCTRO_SOURCE signal which is available as an output on the PFI8 GPCTRO_SOURCE pin As an input the GPCTRO_SOURCE signal is configured in the edge detection mode You can select any PFI pin as the source for GPCTRO_SOURCE and configure the polarity selection for either rising or falling edge As an output the GPCTRO_SOURCE signal reflects the actual clock connected to general purpose counter 0 This is true even if another PFI is externally inputting the source clock This output is set to tri state at startup PCI PXI 6711 6713 User Manual 4 14 National Instruments Corporation Chapter 4 Signal Connections Figure 4 10 shows the timing requirements for the GPCTRO_SOURCE signal
79. tually all internal timing signals If you are using the NI DAQ language interface or LabWindows CVI use the Select_Signal function to route internal signals to the I O connector route external signals to internal timing sources or tie internal timing signals together If you are using NI DAQ with LabVIEW and you want to connect external signal sources to the PFI lines you can use AO Clock Config AO Trigger and Gate Config CTR Mode Config and CTR Pulse Config advanced level VIs to indicate which function the connected signal will serve Use the Route Signal VI to enable the PFI lines to output internal signals AN Caution Ifyou enable a PFI line for output do not connect any external signal source to it if you do you can damage the device the computer and the connected equipment What are the power on states of the PFI and DIO lines on the I O connector At system power on and reset both the PFI and DIO lines are set to high impedance by the hardware This means that the device circuitry is not actively driving the output either high or low However these lines may have pull up or pull down resistors connected to them as shown in Table 4 2 These resistors weakly pull the output to either a logic high or logic low state For example DIO 0 will be in the high impedance state after power on and Table 4 2 shows that there is a 50 kQ pull up resistor This pull up resistor will set the DIO O pin to a logic high when the output i
80. us Specification so that the interrupts and base memory addresses are all software configured The 6711 6713 device uses the National Instruments DAQ STC system timing controller for time related functions The DAQ STC consists of three timing groups that control analog input analog output and general purpose counter timer functions These groups include a total of seven 24 bit and three 16 bit counters and a maximum timing resolution of 50 ns The analog input section of the DAQ STC is unused by the 6711 6713 Often with other DAQ devices you cannot easily synchronize several measurement functions to a common trigger or timing event The PCI 671 1 6713 device has the Real Time System Integration RTST bus to solve this problem The RTSI bus consists of our RTSI bus interface and a ribbon cable to route timing and trigger signals between several functions National Instruments Corporation 1 1 PCI PXI 671 1 6713 User Manual Chapter 1 Introduction on as many as five DAQ devices in your computer If you are using the PXI 6711 6713 in a PXI chassis RTSI lines known as the PXI trigger bus are part of the backplane therefore you do not need the RTSI cable for system triggering and timing on the PXI Detailed specifications of the 6711 6713 device are in Appendix A Specifications Using PXI with CompactPCI PXI 6711 6713 Only Using PXI compatible products with standard CompactPCI products is an important feature provided by
81. user interface and a block diagram program volts input high volts input low volts in measured voltage volts output high volts output low reference voltage volts root mean square waveform generation trigger signal G 10 National Instruments Corporation Index Numbers 5 V signal description table 4 3 power connections 4 9 self resetting fuse 4 9 B 1 A accuracy information analog output A 2 analog output 3 2 to 3 3 questions about B 2 reference selection 3 3 reglitch selection 3 3 analog output specifications A 1 to A 4 accuracy information A 2 dynamic characteristics A 3 to A 4 external reference input A 3 output characteristics A 1 to A 2 stability A 4 transfer characteristics A 2 to A 3 voltage output A 3 AOGND signal analog output signal connections 4 6 to 4 7 description table 4 3 signal summary table 4 4 block diagram 3 2 bulletin board support E 1 bus interface specifications A 6 O National Instruments Corporation C cables custom cabling 1 7 field wiring considerations 4 20 optional equipment 1 7 calibration 5 1 to 5 3 adjusting for gain error 5 3 external calibration 5 2 to 5 3 loading calibration constants 5 1 to 5 2 self calibration 5 2 clocks device and RTSI 3 5 common questions See questions and answers CompactPCI using with PXI 1 2 to 1 3 ComponentWorks software 1 4 configuration PCI PXI 671 1 6713 2 3 questions about B 2 connect
82. ware products related to this problem include the configuration forms from their user manuals Include additional pages 1f necessary Name Company Address Fax Phone Computer brand Model Processor Operating system include version number Clock speed MHz RAM MB Display adapter Mouse __ yes __no Other adapters installed Hard disk capacity MB Brand Instruments used National Instruments hardware product model Revision Configuration National Instruments software product Version Configuration The problem is List any error messages The following steps reproduce the problem 6711 6713 Device Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item Complete a new copy of this form each time you revise your software or hardware configuration and use this form as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently National Instruments Products 6711 6713 device 6711 6713 device serial number Hardware revision Interrupt level of hardware DMA channels of hardware Base I O address of hardware Programming choice National Instruments software Other d
83. y of five timing signals onto the RTSI National Instruments Corporation 3 5 PCI PXI 6711 6713 User Manual Chapter 3 Hardware Overview bus and can receive any of these timing signals This signal connection scheme is shown in Figure 3 3 ras DAQ STC lt _ _ gt _ UPDATE gt WFTRIG E lt GPCTRO_SOURCE E S Trigger lt GPCTRO_GATE S QD e GPCTRO_OUT a e 7 D pc Er co gt UISOURCE gt GPCTR1_SOURCE gt GPCTR1_GATE Clock switch le gt p gt RTSI_OSC 20 MHz Figure 3 3 RTSI Bus Signal Connection Refer to the Timing Connections section of Chapter 4 Signal Connections for a description of the signals PCI PXI 6711 6713 User Manual 3 6 National Instruments Corporation Signal Connections This chapter describes how to make input and output signal connections to your PCI PXI 6711 6713 device via the device I O connector The I O connector for the 6711 6713 device has 68 pins that you can connect to 68 pin accessories with the SH68 68 EP or similar 68 pin shielded cable 1 0 Connector Figure 4 1 shows the pin assignments for the 68 pin I O connector on the PCI PXI 6711 6713 device A signal description follows the connector pinouts J Caution Connections that exceed any of the maximum ratings of input or output signals on the 6711 6713 device can damage the 6711 6713 dev

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