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The author of this thesis has granted the University of Calgary a non

1. int debug cracker int event DATABLOCK block int source int m ecode int work 245 unsigned int address switch event case DEBUG return DEBUG return to main menu i HidePanel block gt debugmenu break case DEBUG send tst DEBUG send the test message m ecode send tst block break j case DEBUG send err DEBUG send the error message m ecode send_err block break case DEBUG send sex DEBUG set the exposure timer GetCtrl Val block gt debugmenu DEBUG_exp_tim amp block gt exp_tim SetCtrl Val block gt imagemenu IMAGE_exp_tim block gt exp_tim m_ecode send sex block break j case DEBUG send DEBUG send the latch word i GetCtrl Val block gt debugmenu DEBUG_port_flags amp block gt port_flags m ecode send ldw block break case DEBUG rst DEBUG reboot the controller m_ecode send_rst block break 246 case DEBUG send osh DEBUG open shutter m ecode send osh block break case DEBUG send csh DEBUG close shutter m ecode send csh block break case DEBUG send wrm DEBUG send write memory m ecode send wrm block break j case DEBUG send rdm DEBUG send read memory m_ecode send_rdm block break case DEBUG institution DEBUG get institution code m_ecode send_institution block break case DEBUG fir
2. 3 2 1 Preamplifier 43 3 2 2 Bias Generator Board 44 3 2 3 Logic Board 45 3 2 4 Solenoid Driver Board 45 3 3 IR Labs Controller 46 3 3 1 Timing Board 47 3 32 Clock Generator Boards I 3 3 3 Analog Input Board 50 3 3 4 Utility Board 51 3 4 Spectral Instruments Model 1826 PCI CARD _______52 3 5 Cabling 52 CHAPTER FOUR MECHANICAL ASSEMBLY OF DEWAR _______54 4 0 Introduction 56 4 1 Filter Wheel Assembly 56 4 2 Cold Plate 60 4 3 IR Array Assembly 61 4 4 Inner Assembly 63 4 5 Outer Assembly 70 4 6 Final Assembly 73 vil CHAPTER FIVE GENERAL CHARACTORISTICS A REAL TIME SYSTEM pd Ried 75 5 0 Introd ctionr n vdd e Ri edu citadas rs ing emos terea dn 77 iur iier toad CU estat 77 5 2 Definition of Real Time nee 78 5 21 Time Constant 79 5 2 2 Ability to Stay in 79 5 3 Mission of the Real Time System 79 5 3 1 Control of the Process 79 5 3 2 Control of the 22 4 2 21 2 80 35 23 Take Dalton 80 5 3 4 Interpret 45 222 80 5 3 5 Respond to 14 80 5 3 6 Respond to the Communication Subsystem 81 5 3 7 Respond to NMI Emer
3. ro Address PAR i 56000 DSP Gerwratun T 1i xe 1 Li Lia 2 Romei Core aa Dale Bus ALU 24 24156 amp 6 5 04 Figure 6 1 Motorola DSP56002 Architecture From Motorola 56002 DSP User s Manual Figure 1 2 Reference 36 101 X DATA BUS Y LATA 8315 Figure 6 2 Motorola DSP56000 Family Floating Point Arithmetic Unit The IR Labs designation for the board upon which the DSP 15 resident 1s the Timing Board timing board is equipped with either a parallel hard wired connection to the Motorola DSP56000 Family Manual Figure 3 2 Reference 36 102 Spectral Instruments PCI 1826 card a fibre optic connection to a PCI transceiver The parallel design incorporates a 16 line parallel interface for fast data transfer and a 9600 baud serial interface for control transfer The timing board also is equipped with static RAM for program and data space overflow and memory maps various addresses from one of the data spaces onto the backplane in which the board is resident It is equipped with CPLD logic which has been set up to run various transfers semi autonomously when properly started by the DSP There is one on board timer with interrupt and a programmable serial 1 O port Figure 6 2 shows the structure of the accumulator floating point unit 6 1 Structure of DSP program When operatin
4. EL EL 1 1 NO If EL GE we ve timed out 338 BCLR 0 Disable timer NO MOVEC X lt SV_SR SR Restore Status Register MOVE X SV BLBI MOVE XxSV YLYI RTI Return from TIMER interrupt Read DSP or EEPROM memory address read memory reply with value RDMEM MOVE X R2 RO Need the address in an address register MOVE X R2 A Need address also in 24 bit register JCLR 20 Test address bit for read from P memory MOVE 0 from Program memory JMP FINISH2 Send out a header D with the value RDX JCLR 21 A RDY Test address bit for read from X memory MOVE X RO X0 Write to X data memory JMP FINISH2 Send out a header ID with the value JCLR 22 A RDR Test address bit for read from Y memory MOVE Y R0 XO X Read from Y data memory JMP FINISH2 Send out a header ID with the value RDR 23 Test address bit for read from EEPROM memory MOVE lt 0 Convert to word address to a byte address MOVE R0 YO Get 16 bit address in a data register MPY 0 0 Multiply ASR Eliminate zero fill of fractional multiply MOVE 0 0 Need to address memory BSET 15 0 Set bit so its in EEPROM space DO 3 LIRDR MOVE P RO A2 Readeach ROM byte REP 8 ASR A Move right into Al LIRDR MOVE 1 0 FINISH2 transmits as its reply
5. 0 X TCSR CHK Wait for timer to end JMP R7 Jump to the internal jump address Interrupt service routine for the SCI serial link to the PCI board SCI MOVEC SR X SSAVE SR Save Status Register MOVE RO X lt SAVE RO Save RO MOVE BI1 X lt SAVE Bl SaveBl MOVE XI1 X lt SAVE MOVE lt 8 RORO Get previous value of SCI RO MOVE lt 5 Get previous value of SCI B1 MOVE X X R0 XI Get the byte from the SCI OR XLB RO Add byte into postdecrement RO BTST 180 Test for the address being SFFF3 last byte JCC MID BYT Not the last byte only restore registers END BYT MOVE BI X R1 Putthe24 bit word in the command buffer MOVE X lt SRXFST RO_ Initialize RO most significant byte of SCI MOVE 0 1 Zero SCI for next SCI use MID BYT MOVE lt 8 RO Save SCI value of SCI address pointer MOVE lt 5 SaveSCI for next SCI use MOVEC lt 5 SR SR Restore Status Register MOVE lt 5 RO RO Restore RO MOVE lt 5 Restore Bl MOVE lt 5 XLXI Restore X1 RTI Return from interrupt service Interrupt service routine for the DSP timer called every millisecond TIMER SR X lt SV_SR Save Status Register MOVE lt 5 BI MOVE YLX SV MOVE X lt ONE B MOVE X lt EL 1 Get elapsed time ADD YLB X TGT Get target time MOVE lt
6. more command End of command table End of program END 314 D 2 2 App asm as supplied by IR Labs COMMENT This file is used to generate DSP code for the second generation timing boards to operate a PICNIC infrared array Fiber optic and PCI application files are now joined into one File modified 11 97 to generate timing waveforms similar to old versions of PICNIC delivered with the microscopes Changed Aug 98 to control Rev 6C power control board and use extended on board SRAM Base code University of Calgary Code is proved to work Date is 010705 Required command line switches DL 0 FOPCI 0 d DOWNLOAD 1 generate code for downloading to DSP memory d DOWNLOAD 0 generate code for writing to the EEPROM PAGE 132 _ Printronix page width 132 columns Define a section name so it doesn t conflict with other application programs SECTION TIMIR These are also defined in timboot asm so be sure they agree APL NUM EQU 1 Application number from 1 to 10 ADR EQU 0 memory location where application code begins APL LEN EQU 200 APL ADR Maximum length of application program TBLEQU A0 Starting address of command table in X memory TBL ADR EQU 0F Waveform tables starting address Define some timing board addresses and bit numbers WRFO EQU SFFCO Write to fiber optic serial transmitter WRLATCH EQU Write to timing board latch SSITX EQU
7. ON tum on all clocks DC POF PWR OFF turn 15V power supplies off DC SBV SETBIAS Set DC bias supply voltages DC SB2NUC SB2 set ADC board bias voltage DC SGN UC SGN set ADC board gain selector DC STP STP exit VIDEO mode DC RDA UC RDAR Read out array once for diagnostics DC Reset read read array DC MRA M RA multiple reads of array DC ABR END EXP end current exposure DC DON START nothing special DC IST UC TST reply with test message DC SEX set exposure time DC LDW UC LDW Load word to parallel port out diagnostic DC OSH UC OSH open shutter DC CSH UC CSH close shutter endit IF DL ORG Y 0 Y 0 Download address ELSE ORG Y 0 P EEPROM address continues from P above ENDIF UC additions 2001 07 07 TST DC TST SH_MASKDC 0 DUMMY DC0 NCOLS DC 63 NROWS DC 64 DCI RST DLY DC 50 PWR_DLY DC 100 VDD DLY DC 300 N_RSTS DC2 NPXLS DC 65536 CBD HDR DC AA0002 RDA DC RDA 359 test message reply Shutter mask Left over from previous versions Number of columns Number of rows Desired number of reset read pairs Delay after array reset for settling Delay in millisec for power to turn on Delay in millisec for VDD to settle Number of resets Number of pixels transmitted per image Header to transmit to converter board Read array command the below is a bit touchy but the objective is to have OFF 0 at Y 10 Y
8. PORT D OFFSET 3 define PORT CONTROL MASK 0 8 include global h global defines and variables include svid h include xlate h translates some ANSI calls not in the CVI 201 library to their CVI equivalents include siw95dll h Spectral Systems API interface to DLL include fitslib h FITS library include file as modified with wrappers include acces32 h ACCESS parallel port include file Zinclude startup h CVI generated include file for GUI for startup screen include main h CVI generated include file for GUI for main menu include filemenu h CVI generated include file for GUI for file control menu include debugmenu h CVI generated include file for GUI for debug menu include errmenu h CVI generated include file for GUI for error message window include imagemenu h CVI generated include file for GUI for image maniuplation window include setupmenu h CVI generated include file for GUI for setup menu include filtermenu h CVI generated include file for GUI for filter wheel control menu include about h CVI generated include file for GUI for about screen don t mess with the order of these defines They must correspond with the order of creation of the windows define ERROR 1 define MAIN SOURCE 1 used as selector in background loop portion of message cracker define STARTUP_SOURCE 2 n
9. int chdir char instring f i return SetDir instring j int chdrive int driveno return SetDrive driveno int pwd char instring return GetDir instring int mkdir char instring return MakeDir instring these MSVCS functions to CVI functions float Cltanh float arg return tanh arg float Clsinh float arg return sinh arg float Clacos float arg return acos arg float Clasin float arg 289 return asin arg float Clpow float base float exponent return pow base exponent float Clcosh float arg return cosh arg 290 D 1 6 Listing of xlate h int mkdir char int chdir char int pwd char int setdrive int 291 292 D 1 7 Listing of globa l h oe oe ke eoe ook oe ok eter eee Le Lee Le ee eee rere ett GLOBAL H This is the global define include file 514 GLOBAL H 1 1 1996 03 27 KRS Exp Id GLOBAL H 2 01 2001 05 17 SEJ Exp 4 oe obe ke oe ode ok ok of fe ok ok oje afc oic ok ok ok oie afc include lt stdio h gt include lt stdlib h gt Dok bai ao ooh oho bbe eee ESSERE SE RS ES DEFINES fe ode oj ae fe ode okc ode ak ok ok
10. 42 Switch is to provide indication of when the filter wheel is in position Normal micro Switches are not rated to operate at cryogenic temperatures however Honeywell manufactures a line of cryogenic rated micro switches There is one difficulty with their product in that the switch is lever actuated and not roller actuated This requires that the filter wheel turn in one direction only in order to avoid jamming the switch The output of the switch is not buffered at all in the dewar and is processed in the RAO designed preamplifier 32 Designed Support Electronics The IR camera is designed to be mounted on the 1 8 metre ARCT on an instrument cube one of whose major purposes is to accommodate this camera However the control room which is where the controller electronics are located is several metres distant from the camera It is therefore necessary to have some support electronics local to the camera to drive the Rockwell TCM 1000C and to buffer the output from this IR array The RAO designed support electronics consists of four subassemblies These are the preamplifier a bias voltage generator for the Rockwell IR array a logic board and a driver 9 Honeywell part number 109HMI to This electronics package was designed in house by Fred Babott and the author Layout and assembly was performed by Fred Babott 11 Actually a two channel preamplifier Detailed description is in Section 3 2 1 next page 43 boa
11. Winhndl imagemenu image display fetch and storage cntl handle Winhndl setupmenu mostly string entry for FITS file writing Winhndl filtermenu filter wheel control menu Winhndl aboutmenu about control menu Menhndi menuhandle menu bar handle for main menu working directory stuff char wdname 80 working directory full path char wddrive MAX DRIVENAME LEN drive name char wddir MAX DIRNAME LEN directory name char wdfile MAX FILENAME LEN file name should be null BOOL fileset open marks if fileset has been initialized home directory stuff int homedrive home drive char homedir 512 dma stuff WORD dmal array blocks WORD dma2 array BOOL dma running BOOL framel active is active BOOL frame2 active CHAR timestamp 80 FITS storage CHAR timestamp2 80 CHAR timehack 80 goes Updated every second int oldseconds once per second variables flags etc DWORD exp_tim DWORD port_flags for debugging and test int bias int gain serial port stuff UCHAR outbuffer 80 int outcount UCHAR outptr BOOL outarm UCHAR inbuffer 80 int incount incoming buffer UCHAR inptr BOOL inarm int flatctr int darkctr int backctr int imagectr 296 home directory handles to the dma DMA running flag marks which f
12. block gt gain 0x0000000D break case 4 block gt gain 0x0000000E break unity gain gain of 2 0 gain of 4 75 gain of 9 50 238 GetCtr Val block gt imagemenu _integrate amp work pick up the integrate flag switch work case 0 slow integration block gt gain 0x00000000 this may seem strange but it allows flexibility break 1 fast integration i block gt gain 0 00000100 break GetCtrl Val block gt imagemenu IMAGE preamp amp work pick up preamp output enable flag switch work case 0 preamplifier output off block gt gain 0x00000000 this may seem strange but it allows flexibility break 1 preamplifier output on block gt gain 0x00000400 break send sgn block break j case IMAGE load indian load test pattern doesn t have to be an indian 239 just has to have exactly 12288 bytes GetCtriVal block setupmenu SETUP tpfile cs workstr m ecode GetFileInfo cs_workstr amp dummy first check that file is available if m ecode TRUE 1 error message block CANNOT FIND TEST PATTERN return SUCCESS returning a FAILCODE would be the right thing to do but it would kill the program instead return this amd they can read the error message gi fps indian fopen
13. lt 2 ASR X C300 X0 SUB APL_ADR R7 MOVE 0 0 EEPROM address x 600 300 BSET 15 0 All EEPROM accesses are with 15 1 DO APL LEN LD LA2 Load from APL ADR to 200 DO 3 LD LAIL MOVE 2 Read from EEPROM REP 8 ASR A 0 LAI MOVE AI P R7 Wiiteto DSP P memory LD LA2 Splice the application and boot command tables together MOVE TBLR7 Leave most of X memory alone 2 DO 3210 LA4 16 commands 2 entries per command 340 DO 48 LD LA4 24 commands 2 entries per command DO 3 LD LA3 MOVE Pi RO 4A2 Read from EEPROM REP 8 ASR A LD LA3 MOVE ALX R7 Wiriteto DSP X memory LD LA4 Transfer Y memory containing waveforms and readout parameters MOVE 0 R7 Start at bottom of Y memory DO 54 300 32 APL LEN LD LA6 Update y DSP memory DO 3 LD_LAS MOVE P RO A2 Read from EEPROM 8 ASR LD LAS MOVE AI Y R7 Wirteto DSP Y memory LD LA6 JMP FINISH Return and send DON Reset Reboot RST RESET Reset peripherals MOVE X lt CFFFF M0 Insure that its linear addressing MOVE X CFFFF MI MOVEP X ZERO X IPR Clear Interrupt Priority Register MOVEP X CFFFF X BCR Many Wait States for PROM accesses MOVEC X lt ZERO SP _ Clear the stack pointer MOVEC X lt C300 SR _ Clear the Condition Code Register 01 OMR Operating Mode Register Reboot NOP Allow one cycle delay for the remapping JMP 0
14. Hazeltine 1500 inserts leading 1 tmpchr tmpchr amp Ox7F if length too small then skip set for fourth byte is CR if tmpchr OxOd if length right but no CR then err so light button and retum if block gt whiterat TRUE sprintf whiteratbuffer n irNO CARRIAGE RETURN TRAP INCOUNT IS d block gt incount ComWirt 1 whiteratbuffer strlen whiteratbuffer SetCtrlVal block 7mainmenu MAIN errlight TRUE SetCtrlAttribute block mainmenu MAIN errlight ATTR LABEL VISIBLE TRUE block gt inarm FALSE block gt incount 0 block gt inptr block gt inbuffer return 0 if block return expected TRUE very first thing to do is check for return work block gt inbuffer 0 256 256 block gt inbuffer 1 256 block inbuffer 2 SetCtriVal block return ptr menu block return ptr item work block 2return expected FALSE block gt inarm FALSE block gt incount 0 block gt inptr block gt inbuffer SetCtr Val block gt mainmenu MAIN donelight TRUE Now need to toggle lights 220 SetCtrlAttribute block mainmenu MAIN donelight ATTR LABEL VISIBLE TRUE SetCtrlAttribute block gt mainmenu MAIN light timer ATTR INTERVAL LIGHT E SetCtrlAttribute block gt mainmenu MAIN light timer ATTR ENABLED TRUE SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED FALSE return 0 tmpchr block g
15. block gt incount 0 block gt inptr block gt inbuffer block gt inarm FALSE block gt flatctr 0 block gt darkctr 0 block gt backctr 0 block gt imagectr 0 block gt whiterat FALSE block gt home_found FALSE block gt active_filter_number 99 block gt active_filter_target 99 block gt filter_power FALSE block gt filter_moving FALSE block gt port_base 0 block gt oldseconds 0 return SUCCESS DA kc ok ie sk ok ok ok ak oie ae ke ok oe oko e INIT SPECTRAL Initializes the Spectral Instruments interface card FOR ICO int init spectral DATABLOCK block DWORD retval BYTE block inptr block inbuffer block gt outptr block gt outbuffer block gt dma_running FALSE retval 99L block gt inptr block gt inbuffer 239 260 block gt outptr block gt outbuffer retval install_isr DEVICE_ID VENDOR ID INDEX_ID err BYTE retval amp OxFF if err sprintf block gt inbuffer SPECTRAL SYSTEMS BOARD ERROR CODE IS d err error_message block block gt inbuffer 1f block gt whiterat TRUE OpenComConfig 1 COM1 9600 0 8 1 0 0 sprintf block gt outstring nIN init spectral Install isr return value is 08x n r retval ComWrt 1 block gt outstring strlen block gt outstring if err sprintf block gt outstring n ERROR SPECTRAL SYSTEMS BOARD NOT FOUND CODE IS 96d Wn err Co
16. break case MAIN setup menu DisplayPanel block gt setupmenu break case MAIN filter menu DisplayPanel block gt filtermenu break j case MAIN rst buffers clear buff block gt inarm FALSE block gt incount 0 block gt inptr block gt inbuffer block gt outarm FALSE block gt outcount 0 block gt outptr block gt outbuffer next need to toggle the DONE light so that the user 227 knows that something actually did happen SetCtrl Val block mainmenu MAIN donelight TRUE SetCtrlAttribute block mainmenu MAIN donclight ATTR LABEL VISIBLE TRUE SetCtrlAttribute block gt mainmenu MAIN light timer ATTR INTERVAL LIGHT E SetCtrlAttribute block gt mainmenu light timer ATTE ENABLED TEULE SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED FALSE break case MAIN campwr MAIN toggle camera power GetCtrl Val block gt mainmenu MAIN_campwr amp work if work 1 i m ecode send con block turn camera power ON j else m ecode send cof block turn camera power OFF j break case MAIN MAIN toggle controller power GetCtrl Val block gt mainmenu MAIN cntlpwr amp work if work 1 m_ecode send_pon block j else m ecode send pof block break 228 case MAIN shutter main start exposure SetCtrlAttribute block gt mainmen
17. 4 Lada Muench Haisch Lada Alves Tollestrup and Willner Reference 22 The Trapezium is a hotbed of circumstellar disks candidate protostars and dust clouds Imaging in J H K and L bands indicates a high level of detail circumstellar disks are bright emitters and have an IR excess over that of the photospheres of young stars they are particularly amenable to measurement with a near IR imaging camera such as the one which is the topic of this thesis Colour colour diagrams can then be constructed using data obtained from the camera and from other imaging Sources and these diagrams are known to be useful in the identification of objects displaying infrared excesses and in identifying candidate circumstellar disks There 15 also evidence which indicates that the frequency of sources exhibiting excess in the 7 and bands decreases as a function of the cluster age with time frames of a few million years This may be associated with constraints on the lifetimes of circumstellar disks and the time frame available for planetary formation Since protostars are thought to display large L band excesses and colours indicating that they are embedded in dust clouds the camera 15 well suited to the observation of these objects However as the above cited paper points out due to background variations in the L band and other problems with observation the quality of the data taken 1997 was poor Though further data was taken in 199
18. False Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host ACCES32 DLL File 0002 f milone host SIW95DLL dll File 0003 f milone host wrapper dll Distribution Kit File Group 003 Group Name VXD FILES Destination Directory Windows System Use Relative Path False Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host SIW95 VXD vxd Distribution Kit File Group 004 Group Name TEST IMAGES Destination Directory Application Use Relative Path False Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host indian raw File 0002 f milone host sydney raw File 0003 f milone host wtindian raw Distribution Kit File Group 005 195 Group Name LINK Destination Directory Windows Use Relative Path True Relative Path desktop Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host IR Camera Ink Distribution Kit File Group 006 Group Name HELPFILES Destination Directory Application Use Relative Path True Relative Path hlp Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host hlp directory html File 0002 f milone host hlp help htm File 0003 f milone host hip history html
19. Logic Logic Logic Logic Logic Spare Spare Spare Spare Spare Spare Solenoid Solenoid Solenoid Solenoid Spare Solenoid Logic Spare Spare Spare Logic Bias Bias Bias Bias Colour WT BN WT RD WT OR WT YL WT BK PU Signal DVRI DVR2 DVR3 DVR4 GND Filter switch Amplifier enable 15 GND GND 15 170 B C D F G H J K L M N P R S U V W X X Z a b 4 f g h j 171 Table B 2 Preamplifier to Dewar Pinout Logic Logic Logic Temp Temp Spare Logic Spare Logic Bias Spare Video Video Video Spare Bias Bias Bias Bias Bias Bias Bias Logic Logic Logic Logic Logic Solenoid Solenoid Solenoid Solenoid Colour GY BU PU GN Signal GND FI Microswitch Microswitch 1 TSENS GND GND Out switched 10 VDD 10 VID2 GND VIDI 181 XCLK LS2 YSYNC LS3 FRAME LS4 GND 4 amp 3 172 Table B 3 Clock Generator Board DB 37 Connector Designator Function CLKO CLK CLK1 YSYN CLK2 FRAME CLK3 Preamp Power CLK4 Close shutter throw CLK5 _ Close shutter hold CLK6 Open shutter throw CLK7 Open shutter hold CLK8 Not populated CLK9 Not populated CLK10 Not populated Not populated 2 Spare CLKI3 spare CLK14 Spare CLK15 Spare CLK 16 Not populated CLK17 Not populated CLKI8 Not populated 12 Volts Rail 12 Volts Rail 1 tA gt Not populated Not populated N
20. UNIVERSITY OF CALGARY The author of this thesis has granted the University of Calgary a non exclusive license to reproduce and distribute copies of this thesis to users of the University of Calgary Archives Copyright remains with the author Theses and dissertations available in the University of Calgary Institutional Repository are solely for the purpose of private study and research They may not be copied or reproduced except as permitted by copyright laws without written authority of the copyright owner Any commercial use or publication is strictly prohibited The original Partial Copyright License attesting to these terms and signed by the author of this thesis may be found in the original print version of the thesis held by the University of Calgary Archives The thesis approval page signed by the examining committee may also be found in the original print version of the thesis held in the University of Calgary Archives Please contact the University of Calgary Archives for further information E mail uarc ucalgary ca Telephone 403 220 7271 Website http www ucalgary ca archives UNIVERSITY OF CALGARY Design and Construction of an Infra Red Camera for Use at the Rothney Astrophysical Observatory by Susanna Elaine Johnson A THESIS SUBMITTED TO THE FACULTY OF GRADUATE STUDIES IN PARTIAL FULFILMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF SCIENCE IN ASTROPHYSICS DEPARTMENT OF PHYSICS A
21. define BITS 8 define STOP 1 define BUFFERSIZE 0x2000 define CR 0x0D define BACKSLASH 0 5 define Winhndl int define Menhndl int define WORD unsigned short int define DWORD unsigned int define BYTE unsigned char define CHAR char define LPSTR void define UCHAR unsigned char the next three must have this value to match the memory select toggle in the debug screen define PROGRAM MEMORY 1 define X MEMORY 2 Z define Y MEMORY 3 these are for the DMA transfer routines These values match the returns from done f define DMA TRANSFER IN PROGRESS 0 define DMA COMPLETE 1 DMA ERROR 2 define INDIAN FILE SIZE 12288 number of bytes in indian head test pattern typedef struct Winhndl menu int item 295 int addr typedef struct this typedef right here is the data object used throughout the application stuff to handle returns from the controller return ptr BOOL return expected menu control stuff char instring 80 incoming string char outstring 80 outgoing string char fname 80 file name char workstring 80 work string char message 80 message passed to message screen Winhndl mainmenu main screen handle Winhndl debugmenu debug screen handle Winhndl filemenu file screen handle Winhndl errormenu error message screen handle
22. lt START If equal look for receiver contents lt Needed because we re inserting timer ISR Check contents of receiver stack to see if a new host command has come in GET MOVE R2 X0 Get address of processed recetver contents MOVE RIA Get address of current receiver contents RTS Jump here on RRR and M RA commands so R2 steps over CR delimiter XMT DON MOVE R2 Stepover CR delimiter in command RTS Check for program space overflow IF CVS N gt 3C WARN Timer ISR overwitten at P 3C ENDIF ORG P PGM_CON P PGM_CON ROM_OFF Step over timer ISR Transmit the 24 bit word to the PCI board three bytes at a time XMIT MOVE X lt SRXFST RO RO FFF6 SCI first byte address MOVE X R4 A DO 3 8 SPT SCL XMT 0 X SSR SCI_XMT Continue only if SCI XMT register is empty MOVE A X RO to SCI buffer increment byte pointer SPT SCI CR JCLR 0 X SSR SCI_CR Continue only if SCI XMT register is empty MOVEP 0D X SRX Transmit a Carriage Return JMP lt XMT 337 Start up the exposure timer and wait here until it is done EXPOSE MOVE lt Enter exposure time into timer s MOVE A X lt TGT_TIM _ target time CLR A Zero out elapsed time MOVE A X lt EL_TIM BSET 0 X TCSR Enable DSP timer COM JSR GET Check for incoming commands lt Ifreceived process it normally
23. 600 EEPROM space per application program CFFFFDC Constant for resetting the DSP C50000 DC 50000 Delay for WRROM 12 millisec ERR DC ERR An error occurred DON DC DON Command was fully processed RCV ERR DC 0 Dummy location for receiver clearing CAR DC 20200D Carriage Return marking end of command Command table resident in X data memory The last part of the command table is not defined for bootrom because it contains application specific commands 5 ORG X COM TBL LD X DC 0 5 This is where application DC 0 START commands go DC 0 START DC O START DC O START DC 0 5 DC O START DC 0 5 DC 0 5 DC 0 5 DC O START DC O SSTART DC O START DC O START DC O START DC OSTART DC O START DC 0 5 DC 0 5 DC 0 5 DC O START DC O START DC 0 5 DC 0 START everything below this has commands intrinsic to the bootstrap DC ERR START Nothing special DC RDM RDMEM Read DSP or EEPROM memory DC WRM WRMEM Wirite to DSP memory DC QLDA LDAPPL Load application progam from EEPROM to DSP DC RST RST Re boot DSP from on board ROM DC STP FINISH Put it here as no op DC 20200D START Extra delimiters do nothing DC O START Room for one more command End of command table 342 343 End of program END 344 D 2 4 App asm as modified by the Univer
24. 85013 Voice and fax 602 241 1668 E mail customsci delphi com Iragcmicana 4981 177 Ik Band 2144158 4153 Liquid Namgen T I1 tT 1 1 Temperature solid f j Custom Scientific 50 West Ocotillo Rd Phoenix Arizona 85013 Voice amp Fax 602 241 1668 E mail 2000 2050 2100 2150 2200 2250 2300 2350 2400 iVavelengkh Figure C 2 iK Filter Passband Transmission 178 iLp Band 3900 nm 4256 100 90 Re 70 40 Custom Scientific 50 West Ocotitic Rd Phoenix Arizona 85013 Voice Fax 602 241 1665 10 E mail customsci ceipni com 2000 2500 3000 3500 4000 4500 5000 Wavelength nm Figure C 3 iL Filter Passband Comments 90 80 fC Transmittance e 2 179 Filter scanned at 93 K and normal to the light path Sorting Filter 1 Batch 301199 at 93K PTT TTT Ty eT REN 558 526 PTT TTT TET ttt AY H 3000 3200 3409 3600 3800 4006 4200 4400 4600 4800 5000 5200 5400 5600 5800 5009 Wavelength nm Figure C 4 Standard M Band Filter Passband Courtesy University of Hawaii Gemini Facility Near Infra Red Imager NIRI http www gemini edu sciops instruments niri 180 SPECTRAL AFEPSNSE Figure C 5 TCM 1000C Response Curve with iK iLp
25. Disable clearing of all DACs BCLR ENCK X lt LATCH Disable DAC output switches MOVEP X LATCH Y WRLATCH Turn analog power on to controller boards but not yet to IR array BSET LVEN X PBD LVEN HVEN gt Power reset BSET HVEN X PBD BSET HVEN X PCD timPC value Now ramp up the low voltages 6 5V 16 5V and delay them to tum on BCLR LVEN X PBD LVEN Low gt Turn on 6 5V 16 5V MOVE Y lt PWR_DLY A JSR CON DELAY Zero all bias voltages and enable DAC output switches MOVE lt ZERO Get starting address of DAC values 322 JSR SET DAC MOVE lt JSR CON DELAY BSET ENCK X lt LATCH Enable clock and DAC output switches MOVEP X LATCH Y WRLATCH Disable DAC clearing enable clocks Turn on Vdd digital power unit cell to the IR array MOVEP Y VDD X SSITX pin 5 Vdd digital power on array Delay for the IR array to settle down MOVE Y lt VDD DLY A Delay for the IR array to settle JSR CON DELAY Set DC bias DACs SETBIAS MOVEP SLX PCC _ Enable the SSI JSR PAL DLY Wait for port to be enabled MOVE lt DC_BIASES RO Get starting address of DAC values JSR SET DAC MOVE X lt THREE A Delay three millisec to settle JSR CON DELAY Set clock driver DACs MOVE lt DACS RO _ Get starting address of DAC values JSR SET DAC Turn continuous reset mode on disable the SSI and return BSET RST MOD X STATUS
26. File 0004 f milone host hip index html File 0005 f milone host hip intro htm File 0006 f milone host hlp legal html File 0007 f milone host hlp pagel html Distribution Kit File Group 007 Group Name UIR Destination Directory Application Use Relative Path False Install Icons False Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host about uir File 0002 f milone host debugmenu uir File 0003 f milone host errmenu uir File 0004 f milone host filemenu uir File 0005 f milone host filtermenu uir File 0006 t milone host imagemenu uir File 0007 f milone host main uir File 0008 f milone host setupmenu uir File 0009 f milone host startup uir 1 D 1 3 Listing of dllmak prj Project Header Version 501 Platform Code 4 Pathname f milone host dllmak prj CVI Dir 7 d cvi VXIplug amp play Framework Dir C VXIPNP win95 Number of Files 1 Sort Type No Sort Target Type Dynamic Link Library Flags 16 Drag Bar Left 165 Window Top 24 Window Left 5 Window Bottom 424 Window Right 665 File 0001 File Type Include Path f milone host SIW95DLL h Res Id 1 Exclude False Disk Date 3072967304 Project Flags 0 Window Top 94 Window Left 42 Window Height 0 Window Width 0 Source Window State 1 0 0 0 0 0 0 0 0 80 0 0 0 0 0 25 0 0 0 0 Compiler Op
27. Header 0038 f milone host about h Header 0039 f milone host msctype h Max Header Number 39 Create Executable Executable File f milone host ircamera exe Icon File f milone host IR CAMERA ico Application Title IR CAMERA Numeric File Version 1 0 0 0 Numeric Prod Version 1 0 0 0 Comments Company UNIVERSITY OF CALGARY File Version 0 14 TEST Legal Copyright Copyright amp Quantum Magnetics 2001 Legal Trademarks Copyright c 2001 UNIVERSITY OF CALGARY Private Build Product Version 0 14 TEST Special Build DLL Exports Include File Symbols DLL Import Library Choice Gen Lib For Current Mode Use VXIPNP Subdirectories for Import Libraries False Use Dflt Import Lib Base Name True Where to Copy DLL Do not copy Add Type Lib To DLL False Include Type Lib Help Links False Type Lib FP File Type Lib Guid Instrument Driver Support Only False 193 External Compiler Support Create UIR Callbacks File False Using LoadExternalModule False Create Project Symbols File True UIR Callbacks Obj File Project Symbols File Project Symbols Obj File DLL Debugging Support External Process Path DLLs Used By Executable DLL 0001 f milone host SIW95DLL dll DLL 0002 f milone hosV ACCES32 DLL DLL 0003 f milone host wrapper dll Distribution Kit Installation Directory ircam
28. National Instruments Corporation Lab Windows CVI Advanced Analysis Library Reference Manual National Instruments Corporation Austin TX 1996 National Instruments Corporation Getting Started with Lab Windows CVT National Instruments Corporation Austin TX 1996 National Instruments Corporation Lab Windows CVI Instrument Driver Developers Guide National Instruments Corporation Austin TX 1996 46 47 48 49 50 51 52 157 National Instruments Corporation Windows CVI Programmer Reference Manual National Instruments Corporation Austin TX 1996 National Instruments Corporation Lab Windows CVI Standard Libraries Reference Manual National Instruments Corporation Austin TX 1996 National Instruments Corporation Lab Windows CVI User Interface Reference Manual National Instruments Corporation Austin TX 1996 National Instruments Corporation Lab Windows CVI User Manual National Instruments Corporation Austin TX 1996 Oppenheim Alan V and Schafer Ronald W Discrete Time Signal Processing Prentice Hall Englewood Cliffs NJ 1989 Ott Ellis R Process Quality Control Troubleshooting and Interpretation of Data McGraw Hill New York 1990 Petzold Charles Programming Windows 95 Microsoft Press Redmond WA 1996 53 54 55 56 57 58 158 Rockwell International untitled report on IR Labs P O 7597 refere
29. Put controller in continuous reset mode BSET COM MOD X STATUS Put controller in camera run mode MOVEP X DISA SLX PCC _ Disable the SSI JMP FINISH Command table IF DL Memory offsets for downloading code ORG TBL X COM TBL ELSE Memory offsets for generating EEPROMs ORG TBL P 2 APL NUM 1 100 APL LEN ENDIF DC RRR4RRR Reset Read Read array DC MRA MRA Multiple reads of array DC ABR ABR End current exposure DC CON CAM ON Turn on all camera biases and clocks DC PON CAM ON Tum on all camera biases and clocks DC POF PWR OFF Turn 15V power supplies off 323 DC SET SET EXT Setexposure time DC SBN SET BIAS NUM Set bias number DC SBV SETBIAS Set DC bias supply voltages DC VD1 VD1 _ Put array in video 1 mode DC VD2 VD2 Put array in video 2 mode DC STP STP Exit video mode DC DON START Nothing special DC 0 5 0 5 0 5 IF DL ORG 0 0 Download address ELSE ORG Y 0 P address continues from P above ENDIF DUMMY DC 0 Left over from previous versions NCOLS DC 63 Number of columns NROWS DC 64 Number of rows Desired number of reset read pairs RST DLY DC 50 Delay after array reset for settling DC 100 Delay in millisec for power to turn on VDD DLY DC 300 Delay in millise for VDD to settle RSFS DC2 Number of resets NPXLS DC 65536 Number of pixels transmit
30. Unknown Path f milone host IR ResId 1 Exclude False Disk Date 3075329814 Project Flags 0 Window Top 0 Window Left 0 Window Height 0 Window Width 0 Source Window State 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 File 0002 File Type Unknown Path f milone host IR Camera Ink Res Id 2 Exclude False Disk Date 3075331662 Project Flags 0 Window Top 0 Window Left 0 Window Height 0 186 Window Width 0 Source Window State 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 File 0003 File Type Include Path f milone host STW95DLL h Res Id 3 Exclude False Disk Date 3072967304 Project Flags 0 Window Top 140 Window Left 66 Window Height 0 Window Width 0 Source Window State 1 0 0 0 0 0 0 0 0 80 0 0 0 0 0 25 0 0 6 31 File 0004 File Type Library Path f milone host SIW9SDLL lib Res Id 4 Exclude False Disk Date 3072967760 Project Flags 0 Window Top 0 Window Left 0 Window Height 0 Window Width 0 File 0005 File Type CSource Path f milone host host c Res Id 5 Exclude False Disk Date 3079112322 Project Flags 0 Window Top 23 Window Left 0 Window Height 0 Window Width 0 Source Window State 1 1392 1397 1392 0 1 0 0 0 124 0 1 0 1 0 46 920 0 931 12 Header Dependencies Line0001 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
31. cp ptr strcpy cs workstr2 cp ptr SetCtrl Val block gt imagemenu IMAGE_dec cs_workstr2 if strstr workstr ATR_MASS NULL cp ptr strchr workstr cp ptr strcpy cs workstr2 cp ptr SetCtrl Val block gt imagemenu IMAGE air mass cs workstr2 1 5 if strstr workstr OBJECT NULL cp_ptr strchr workstr strcpy cs workstr2 cp ptr SetCtrlVal block imagemenu IMAGE object cs workstr2 if strstr workstr EXP_TIME NULL cp ptr strchr workstr 284 sscanf cp 4 amp work SetCtrlVal block 2 imagemenu IMAGE exp tim ui work SetCtrlVal block debugmenu DEBUG exp tim ui work if strstr workstr BIAS NULL cp_ptr strchr workstr _ sscanf cp_ptr d amp 1_work SetCtrl Val block gt imagemenu IMAGE bias work if strstr workstr GAIN NULL cp_ptr strchr workstr _ sscanf cp ptr od work SetCtrlVal block imagemenu IMAGE gain ui work j If strstr workstr ORIGIN NULL cp_ptr strchr workstr cp strcpy cs workstr2 cp ptr SetCtrlVal block setupmenu SETUP workstr2 if strstr workstr TELESCOP NULL cp ptrestrchr workstr cp strcpy cs workstr2 cp ptr SetCtrlVal block setupmenu SETUP telescop cs workstr2 if strstr workstr INSTRUME NULL cp_ptr strchr workstr cp _ptr str
32. defines YSYN as line 1 on clock generator board YSYN EQU 2 FRAME L EQU 80 defines FRAME as line 2 on clock generator board FRAME HEQU 4 POWER L EQU 0 defines POWER as line 3 on clock generator board POWER HEQU 8 CLOSE LEQU 0 defines CLOSE as line 4 on clock generator board CLOSE HEQU 10 EQU 0 defines CLOSE HOLD as line 5 on clock generator board CHH EQU 920 L EQU 0 defines OPEN as line 6 on clock generator board EQU 40 OPH L EQU 0 defines OPEN HOLD as line 7 on clock generator board OPH H EQU 80 READ ON Initial pulse DC FIRST 64 ON 2 DC BD2 DELAY CLK_H YSYN_H FRAME DC BD2 DELAY CLK_L YSYN_H FRAME FIRST 64 first 64 lines with frame line asserted 361 DC SECOND 64 FIRST 64 2 DC BD2 DELAY CLK H YSYN L FRAME toggle clock up DC BD2 DELAY CLK_Lt YSYN_L FRAME_H toggle clock down DC VP DLY A D sample DC 010033 Start A D conversion DC SXMIT Series transmit four pixels data DC 140033 Delay SECOND 64 second 64 lines with frame line deasserted DC READ OFF SECOND 64 2 DC BD2 DELAY CLK H YSYN L FRAME L toggle clock up DC BD2 DELAY CLK L YSYN L toggle clock down DC A D sample DC 5010033 Start A D conversion DC SXMIT Series transmit four pixels data DC 140033 Delay READ OFF trailing pulse to make up 130 pixels per line read DC FLUSH FIRST READ OFF2 DC BD2 DELAY CLK_H YSYN_L FRAME final cl
33. gt errormenu ERRMSG_msg inmsg return END MESSAGE CRACKER FOR ERROR MENU LILLLLEEE vir she she he be ie be e Message cracker for IMAGE menu REPRE PRESSES int image_cracker int event DATABLOCK block int source int m_ecode 235 int work int work2 int work3 WORD wordptr int bytecolour int colour FILE fps_indian char b inbyte long dummy char cs workstr 80 float fwork switch event 1 t case IMAGE bump filter the filter lights are just lights block filter moving TRUE start the filter moving block gt active_filter_target select the next filter if block gt active_filter_target gt 6 block gt active_filter_target 1 SetCtrlAttribute block gt imagemenu IMAGE_bump filter ATTR_CMD_ BUTTON COL OR VAL GREEN break case IMAGE return IMAGE return HidePanel block gt imagemenu return 0 break case IMAGE save frame IMAGE save the active frame if block fileset open FALSE i error message block ERROR FILE SET HAS NOT BEEN INITIALIZED return 0 m ecode MakeFits block break j 236 case IMAGE load ramp if block gt frame1_active TRUE wordptr block dmal array if block frame2 active TRUE wordptr block dma2 array work3 0 for work 0 work lt NCOLS NROWS work wordptr WORD work3 wordptr
34. typedef unsigned char byte 8 bit typedef unsigned short word 16 bit typedef unsigned int dword 32 bit typedef unsigned long qword 64 bit 293 D 1 8 ke ek o ma SVID H This is the CVI imaging header file specifically designed for the IRL MCE 3 NICMOS infrared camera and the Spectral Instruments DIO board Not anymore it isn t AJ define BYTES PER PIX 2 define NROWS 128 define NCOLS 128 define ARRAY SIZE NROWS NCOLS define ARRAY DIM NROWS NCOLS define ARRAY BYTES ARRAY SIZE BYTES PER PIX ERROR CODE DEFINES ee E E ke oko E E EE E E E E EE E define PASSED 0x0000 define ALLOCATION FAILURE 0 0100 define DMA ARRAY2 ALLOCATION FAILURE 0x0101 ok ok oko oj oko ook ok ake e ok ok GLOBALS Soo ok ok ok ok o E E E E EE E E EEE EE E EEEE EEEE E E E E E E E E E E E ole sje define ABORT 666 appropriate for an abort 294 flag define EXIT 1728 RIP LVB define FAILCODE 1 generic fail and success codes define SUCCESS 0 definitions for the serial port on the Spectral Instruments card define BAUD 9600 define PARITY 0
35. 0 SR Clear status register clear bit RTS ee ok ke fe ok ok ARRAY READOUT obe sje abe she ole kc ole EEE EE RD ARRAY IFFOPCI Optionally send RDA to FO PCI board MOVEP Y CBD HDR Y WRFO JSR PAL DLY MOVEP Y RDA Y WRFO JSR PAL DLY MOVEP Y NPXLS Y WRFO ENDIF below inserted 010718 AJ this routine is set up for the TCM1000B with single channel output all 128 lines with FRAME line high BSET WW X PBD Set WW to 1 for 16 bit image data DO 598 DLY ON count levels JSR PAL DLY NOP DLY ON Lib Lahn DO 128 GROUP_1 read first set with frame line asserted MOVE lt READ ON RO generate initial pulse JSR lt CLOCK DO 128 GROUP_1_ INNER clock out the pixels MOVE lt 5 64 0 get the drive sequence JSR lt CLOCK clock it out NOP loop restriction GROUP INNER MOVE lt READ OFF RO last pulse 158 lt CLOCK NOP loop restriction GROUP 1 JSR PAL DLY Wait for serial data transmission BCLR ZWW X PBD Clear WW to 0 for non image data RTS endit 25 ARRAY FLUSH aa k FLUSH_ARRAY IF FOPCI _ Optionally send RDA to FO PCI board MOVEP Y CBD_HDR Y WRFO JSR PAL MOVEP Y RDA Y WRFO JSR PAL DLY Y NPXLS Y WRFO ENDIF below inserted 010718 AJ this routine is set up for the TCM1000B with single channel output all lines with FRAME line high
36. 400 Window Width 660 File 0017 File Type User Interface Resource Path f milone host startup uir Res Id 17 Exclude False Disk Date 3079097350 Project Flags 0 Window Top 48 Window Left 18 Window Height 400 Window Width 660 File 0018 File Type User Interface Resource Path f milone host about uir Res Id 18 Exclude False Disk Date 3079035078 Project Flags 0 Window Top 278 Window Left 138 Window Height 400 Window Width 660 Compiler Options Default Calling Convention cdecl Max Number Of Errors 100 Require Prototypes True Require Return Values True Enable Pointer Mismatch Warning False Enable Unreachable Code Warning False Track Include File Dependencies True Prompt For Missing Includes True Stop On First Error File False Bring Up Err Win For Warnings True Show Build Dialog True 191 Run Options Stack Size 250000 Debugging Level None Save Changes Before Running Ask Break On Library Errors True Hide Windows False Unload DLLs After Each Run True Check Disk Dates Before Each Run True Break At First Statement False Build Options DLL Debugging Level None Compiler Defines Compiler Defines DWIN32_LEAN AND MEAN Command Line Args Command Line Args Included Headers Header 0026 f milone host SIW9SDLL h Header 0001 d cvi include utility h Header 0002 d cvi inc
37. Begin bootstrap from internal ROM Clear error condition and interrupt on SSI receiver CLR SCIMOVEP X SSR X RCV ERR Read status register MOVEP X SRX X RCV_ERR Read register to clear error RTI Check for program space overflow into application code area IF QCVS N APL ADR WARN ERROR Boot program overflows into application code area ENDIF 341 Beginning of X definitions ke He ae ok see oko oko Status and header ID processing words ORG XO XLD X STATUS DC 0 Status word Timer related constants SV SR DC 0 Save for timer ISR SV 0 Save for timer ISR SV YI DC 0 Save for timer ISR Definitions for variables needed for the interrupt service routines SAVE SRDC 0 SAVE XIDC 0 SAVE BIDC 0 SAVE RODC 0 SCI DC 0 SCI RO DC FFF6 Current address of the SCI SRXFST DC FFF6 Address of first byte in SCI receiver SPARE DC 0 EXP must be at address SE for compatability with IR Labs IREM EL TIM DC 0 Elapsed exposure time in milliseconds TGT TIM DC 0 EXP at beginning of exposure EXP TIM DC 1000 Exposure time milliseconds written by host computer Definition of value in latch U25 LATCH DC 10 Value in latch chip U25 Miscellaneous constant definitions ZERO DC 0 ONE DC 1 TWO DC 2 THREE DC 3 EN SIDC 0173 Enable the SCI and SSI pins DISA SI DC 0003 C300 DC 300 Constant for resetting the DSP C600 DC
38. IMPLEMENTED THIS VERSION This is a non fatal error You tried to use a feature of the host program that was allocated space when the program was set up but has not yet been implemented FITS FILE CREATION ERROR This is a non fatal error The FITS file handler cannot create a file FITS IMAGE CREATION ERROR This 15 non fatal error The FITS file handler cannot save your image This is usually caused by bad data in the location or identification fields 367 FITS WRITE IMAGE ERROR This 15 a fatal error The FITS file handler cannot write your image to disk Please report the incident to the software engineer NO HELP FORKING This is a non fatal error The help file could not be found NO HIST FORKING This is a non fatal error The history file could not be found NO LEGAL FORKING This is a non fatal error The legal file could not be found READ CONFIG INVALID FILE NAME This is a non fatal error You specified an invalid name for the configuration file SPECTRAL SYSTEMS BOARD ERROR This is a non fatal error Something is amiss with the DMA interface to the IR Labs controller Record the error code and report the incident to the software engineer 368 WRITE CONFIG INVALID FILE NAME This is a non fatal error You specified an invalid name for the configuration file 309 APPENDIX F CFITSIO ERROR STATUS CODES 370 The tables below are taken from Reference 9 Permission to freely use mod
39. If this compiler is used to generate a DLL that DLL will have all external references resolved and will be a true executable This gets around the problems with the linkage editor 132 However the FITS library having been originally written for a platform for which the concept of a DLL does not pertain does not have the proper declaratives in its function specifications and header files Due to the size of the library 750K bytes of source code it was deemed not practical to convert all functions to have the proper declaratives for use as a DLL The solution was to utilize wrapper functions At some slight performance cost one more stack frame and some clock cycles lost on another call wrapper functions which do incorporate the proper declaratives were added to the FITS library build The include file specifying the wrapper functions was then written and the whole library was compiled as a DLL The LIB file was obtained as specified in Section 7 3 1 Error codes for errors specific to the FITS package are given in Appendix F 74 ACCESS DIO 128 The ACCESS I O DIO 128 is a parallel I O card equipped with 5 Intel 8255 parallel output devices The driver for the board must be installed by running the software obtained from ACCESS via their CD This installation software will find the card and return information needed by the host program including the address of the port This address must be loaded into the host program setup menu
40. Initialize X data memory MOVE RD_X RO Starting X address in EEPROM MOVE 0 Put values starting at beginning of X DO 5100 Assume 256 100 values exist DO 3 X_LOOP _ Reconstruct bytes to 24 bit words MOVE P R0 A2 Getone byte from EEPROM REP 8 ASR A Shift right 8 bits X LOOP MOVE ALX R1 Write 24 bit words to X memory X MOVE Initialize registers MOVE RCV_BUF RI _ Starting address of receiver buffer MOVE XMT_BUF R3 _ Starting address of transmitter buffer 305 MOVE WRSS R6 Address of clock and video processor switches MOVE RI R2 AR3 R4 MOVE 31 1 address registers are circular modulo 32 MOVE 2 MOVE 2 3 MOVE M3 M4 MOVE MLNI DO 32 ZERO_X _ Zero all buffers MOVE 1 MOVE A X R3 ZERO X Disable analog board functions MOVEP X LATCH Y WRLATCH Call Load Application 1 to get video mode loaded on boot as the default MOVE LDA A MOVE 1 MOVE X lt ONE A MOVE MOVE X CAR RET A MOVE A X R1 Set interrupt priority levels MOVEP 038000 X IPR_ Write to interrupt priority register Exposure timer 2 SCI 1 PCI board link Host IRQA IROB all disabled ANDI Z FC MR Unmask all interrupt levels Go execute the program initialization is over JMP lt Process the commands on the stack Check for program space overflow IF CVS N gt 1FF WARN Internal P memory overfl
41. Lada Elizabeth A Alves Joao F Tollestrup Eric V and Willner S P Infrared L Band Observations of the Trapezium Cluster A Census of Circumstellar Disks and Candidate Protostars Astronomical Journal 120 3162 3176 2000 Dec Leach Robert Analog Board San Diego State University San Diego CA undated internal report Leach Robert CCD Controller User s Manual San Diego State University San Diego CA undated internal report Leach Robert DSP Software Revision 2 30 San Diego State University San Diego CA undated internal report Leach Robert Optical and Infrared Cameral Electronics User s Manual San Diego State University San Diego CA undated internal report Leach Robert Power Control Board Revision 3B San Diego State University San Diego CA dtd 3 Jan 1997 internal report 28 29 30 31 32 33 154 Leach Robert Timing Board Revision 6B San Diego State University San Diego CA undated internal report Leach Robert Utility Board Revision 4B San Diego State University San Diego CA undated internal report Microsoft Corporation Microsoft MS DOS Programmer s Reference Microsoft Press Redmond WA 1986 Microsoft Corporation Microsoft Foundation Class Library Reference Microsoft Press Redmond WA 1995 Microsoft Corporation Microsoft Visual C Language Reference Microsoft Press Redmo
42. PID and bang bang controllers These controllers are microprocessor based and are equipped with serial ports RS 232 RS 422 423 RS 485 so that they can be tied toa host Although they are designed primarily for temperature control using thermocouple thermistor or RTD some will accept a voltage input These last can be re programmed from the host to operate as general purpose single point controllers running a self tuning PID loop and reporting to the host via the serial link 21 program for than others an aspect which will drive up the engineering cost but the unit cost especially in volume may be such that for large production volumes it is cost effective to utilize such a device Generally the Harvard architectures are more difficult to TYPES OF MICROPROCESSORS SINGLE ADDRESS SPACE FOR PROGRAM AND DATA VON NEUMANN ARCHITECTURE MULTIPLE ADDRESS SPACES SEPARATE FOR PROGRAM AND DATA HARVARD ARCHITECTURE SINGLE BUS STRUCTURE WITH OR WITHOUT INTEGRAL DMA MULTIPLE BUS STRUCTURE WITH INTEGRAL CONCURRENT OPERATION DMA MULTIPORT PINOUT Figure 2 2 Types Of Microprocessors program for but they usually have a cost advantage and are useful in applications where the code is relatively static over time This class of processors may also have issues concerning differences in word size between the data memory and the program memory which make Analog Devices ADSP 2100 family for example has this
43. S FFEF SSI Transmit and Receive data register PCC EQU FFE1 Port C Control Register PBD EQU 4 Port B Data Register 315 TCSR EQU FFDE Timer control and status register CDAC EQU 0 Bit number in U25 for clearing DACs WW EQU 1 Word width of serial data ENCK EQU 2 Bit number in U25 for enabling analog switches LVEN EQU 2 Low voltage enable 6 5 15 volt nominal HVEN EQU 3 High voltage enable 36 volts only used for reset Values for timPC board EQU 9 Low voltage enable 6 5 15 volt nominal HVEN EQU 4 High voltage enable 36 volts only used for reset Specify execution and load addresses IF ORG EAPL ADR P APL ADR Download address ELSE ORG P APL_ADR P 2 APL_NUM 1 100 EEPROM generation ENDIF APPLICATION JSET RST_MOD X STATUS CONT_RST JSET VID1_MOD X STATUS VIDEO MODEI JSET VID2_MOD X STATUS VIDEO MODE2 JMP lt 5 Set software to video mode 1 VDI BSET VID1_MOD X lt STATUS BCLR VID2_MOD X lt STATUS BCLR ZRST MOD X STATUS Continuous reset mode off JMP FINISH Send reply Set software to video mode 2 VD2 BSET 102 MOD X SSTATUS BCLR VID1_MOD X lt STATUS BCLR RST_MOD X STATUS Continuous reset mode off JMP FINISH Send reply Exit video mode enter continuous reset mode STP BSET ZRST MOD X STATUS Continuous reset mode on BCLR 1 MOD X STATUS BCLR VID2_MOD X lt STATUS FINISH Video
44. The timing card has on it the Motorola DSP56002 and support for the DSP including the UVPROM which holds the program loaded into the microprocessor at boot There are several programmable logic devices on the card however the configuration of these devices is not accessible to the DSP and they are used to achieve a high level of integration of the glue logic on the board They are non volatile The timing card has a low speed serial 25 This is not a standard 3U backplane lines have been redefined for the purpose 26 This is a SCSI interface with lines redefined for the purpose IR Labs has supplanted this technology with a fibre optic link between controller and host in later designs 33 channel to the host and a high speed parallel channel to the host The firmware in the timing card is resident UVPROM and is loaded into an on board RAM program memory in the DSP on boot The timing card generates all timing and control signals for the Rockwell array 2 4 43 Clock Generator Card The clock generator card has a set of D A converters for each output line and a set of analog switches for each output line The timing board can set the outputs of the D A converters and then can toggle between the voltage outputs of two D A converters to generate a digital signal Because the clock generator card is organized into groups of lines itis possible to generate either single ended or differential digital signals depen
45. WIRING P HARNESS 7 IR ARRAY LIGHT AG PIPE a GETTER ET MOUNT SHUTTER Figure 4 12 Top View of Inner Assembly of IR Camera 4 5 Outer Assembly The outer assembly consists of the stepper motor assembly for the drive tram and associated electronics The stepper motor assembly is mounted to the outer shell of the dewar by four brass 71 standoffs threaded into the shell with 6 32 studs The motor itself is mounted on the reduction gear housing as shown in Figure 4 13 The gear train for the stepper motor cannot be assembled until the housing is mounted on its standoffs to the outer shell of the dewar STEPPER CONNECTOR zi FOR CONTROLLER REDUCTION GEAR HOUSING 5 7 DRIVE TRAIN GLAND DRIVE SPINDLE Figure 4 13 Stepper Motor and Reduction Gear Housing After the reduction gear housing is mounted to the dewar the reduction gear drive sprocket and chain may be mounted inside the housing as shown in Figure 4 14 overleaf In this figure the cover plate for the housing which has mounted on it a potentiometer for the stepper motor controller is swung aside and may be seen on the right of the figure 72 CONTROLLER DRIVE SPROCKET DRIVE CHAIN REDUCTION GEAR FRONT PLATE SWUNG OPEN Figure 4 14 Interior View of Assembled Stepper Motor Reduction Gear Housing The shaft of the p
46. allocate buffers DATABLOCK int init object DATABLOCK SPECTRAL SYSTEMS SERIAL PORT FUNCTIONS HIGH LEVEL int receive serial DATABLOCK int serial DATABLOCK int crack incoming DATABLOCK CALLBACKS AND CRACKERS int main cracker int DATABLOCK int debug cracker int DATABLOCK int file cracker int DATABLOCK int error cracker int DATABLOCK void error message DATABLOCK char service routine not a cracker 298 included here because it is an anomaly intimage cracker int DATABLOCK int setup cracker int DATABLOCK int filter cracker int DATABLOCK int run_utc_clock DATABLOCK int about cracker int DATABLOCK PROGRAM CONTROL FUNCTIONS int close program DATABLOCK int config write DATABLOCK int config read DATABLOCK int estab dir DATABLOCK FILTER WHEEL CONTROLS int run filterwheel DATABLOCK void DeassertFilterPower DATABLOCK void AssertFilterPower DATABLOCK void ClearFilterIndicators DATABLOCK void SetActiveFilterIndicator rDATABLOCK DMA ROUTINES int run dma DATABLOCK void dma DATABLOCK FILE ROUTINES int MakeFits DATABLOCK int get home dir DATABLOCK SERVICE ROUTINES int send tst DATABLOCK test message int send err DATABLOCK error message int send sex DATABLOCK set exposure
47. and M Filter Passbands Overlaid 3 iH filter passband is not overlaid because it is out of the range for this detector Table C 1 Central Wavelengths and Zero Magnitude Fluxes at Different Photometric Bands Filter um Jy 4 Kwok Sun Op Cit 181 182 APPENDIX D SOURCE CODE LISTINGS D 1 1 List of Program Files in Host Program SIW9SDLL dil SIWOSDLL lib SIW95VXD vxd SIW9SDLL h host c GLOBAL H host prj dlimak prj main uir main h debugmenu uir debugmenu h safety h xlate h xlate c filemenu h imagemenu h filemenu uir FITSLIB lib imagemenu uir iob h errmenu h cfitsio def errmenu uir fitsio h longnam h setupmenu h filtermenu h setupmenu uir filtermenu uir msctype c msctype h iob h bak ACCES32 h startup h ACCES32 DLL CBACCES lib startup uir indian raw mod testbw1 jpg host ico ircamera exe IR Camera Ink IR CAMERA ico wrapper dll config dat fitslib h mod test800 gif Indian Head 320 jpg tcf sydney pg sydney raw wtindian raw about h about uir svid h 184 185 D 1 2 Listing of host Prj Project Header Version 501 Platform Code 4 Pathname f milone host host prj CVI Dir 7 d cvi VXIplug amp play Framework Dir C VXIPNP win95 Number of Files 18 Sort Type No Sort Target Type Executable Flags 16 Drag Bar Left 165 Window Top 169 Window Left 194 Window Bottom 569 Window Right 854 File 0001 File Type
48. case FILTER stop wheel same thing as turn power off block filter moving FALSE SetCtrlVal block gt mainmenu MAIN filter power FALSE break j case seek home block gt active_filter_number 99 block gt active_filter_target 1 SetCtrl Val block gt filtermenu FILTER home found led FALSE SetCtrl Val block gt filtermenu FILTER blank led FALSE SetCtrl Val block gt filtermenu FILTER empty led FALSE SetCtrl Val block gt filtermenu FILTER filter 1 led FALSE SetCtriVal block filtermenu FILTER filter 2 led FALSE SetCtrl Val block gt filtermenu FILTER filter 3 led FALSE SetCtr Val block gt filtermenu FILTER filter 4 led FALSE SetCtrl Val block gt filtermenu FILTER moving led TRUE 249 SetCtrl Val block gt filtermenu FILTER stopped led FALSE block filter moving TRUE break j case FILTER seek blank if block active filter number 1 return 0 block active filter target 1 block filter moving TRUE break case FILTER seek empty if block active filter number 2 return 0 block active filter target 2 block filter moving TRUE break case FILTER seek filter 1 if block active filter number 3 return 0 block active filter target 3 block filter moving TRUE break j case FILTER seek filter 2 if block active filter number 4 return 0 block acti
49. characteristic 22 downloading new code from a host difficult If the data memory and the program memory are brought off chip through separate ports or if there is autonomous DMA capability for both data memory and program memory coupled with sufficient internal scratchpad then Harvard architecture microprocessors will enjoy a speed advantage over Von Neumann machines Examples of cost feature tradeoff for various microcroprocessors ARCHITECTURE DEVICE INTEL 80C51 CLOCK SPEED CHEAP 1 00 EA MODERATE 2 50 EA MODERATE 5810 00 EA SLOW 1 5 MHZ MODERATE 12 MHZ MODERATE 20 33 MHZ FAST ANALOG DEVICES 2800 SINGLE BUS TI 320 16 WITH DMA MULTIPLE BUS WITH DMA MULTIPORT PINOUT TI 320C30 40 50 TI 320C30 HIGH 4 30 150 EA HIGH 30 50 EA 33 100 MHZ FAST 33 100 MHZ Table 2 1 Examples of Microprocessor Architecture 5 The Motorola DSP56000 family of processors uses a Harvard architecture with two data memories and one program memory There are reasonable but not overly generous on board SRAM scratchpads for each memory but then all memories are accessed through a single bus structure From an electrical engineering point of view this prevents an explosion of pins with associated fabrication problems and also holds the unit cost down however it has the effect of driving off chip access times up This family of processors also is not
50. composed of the Rockwell TCM 1000C array the support package for the array and a Honeywell microswitch There are also two Guardian solenoids in the dewar to work the shutter as shown in Chapter 4 1 Rockwell International Science Center now Rockwell Scientific Company LLC P O Box 1085 Thousand Oaks CA 91358 USA 805 373 4545 2 Infrared Laboratories 1808 E 17 St Tucson AZ 85710 6505 USA 520 622 7074 3 Spectral Instruments 1802 West Grant Road Suite 110 Tucson AZ 85745 USA 520 884 8821 4 Part number LT6X12C24D 38 3 1 1 Rockwell TCM 1000C Array The Rockwell TCM 1000C array is a prototype manufactured for IR Labs sometime around 1987 by mating a PACE 1 HgCdTe on sapphire detector array to a TCM 1000C readout circuit using indium bump technology The array is a 128 by 128 pixel format with a 60 micrometre square pixel size It is sensitive to short wavelength infrared in the range of 2 0 to 5 0 um with about a 40 percent spectral response at the short end peak sensitivity at about 4 6 um and rapidly falling off thereafter The response curve from the Rockwell documentation is reproduced as Figure 3 1 below SPECTRAL RESPONSE Figure 3 1 Relative Response as a Function of Wavelength for TCM 1000C IR Array IR Labs purchase order 7597 as reported in Rockwell report SC87004 FR Reference 53 39 The design criteria for the 1 chip are shown below as Table 3 1 Charge Capacity 30 x
51. cs workstr r GetCtrl Val block gt imagemenu IMAGE_framesel amp work switch work case 1 wordptr block gt dmal_array wipe the array for work 0 work lt NROWS work for work2 0 work2 lt NCOLS work2 wordptr 0x00 wordptr block dma array move down into image wordptr 2048 for work 0 work lt INDIAN_ FILE SIZE work 240 b inbyte getc fps indian bytecolour int b inbyte bytecolour bytecolour 256 wordptr unsigned short int bytecolour wordptr break case 2 wordptr block gt dma2_array wipe the array for work 0 work lt NROWS work for work2 0 work2 lt NCOLS work2 wordptr 0x00 wordptr block gt dma2_array move down into image wordptr 2048 for work 0 work lt INDIAN_FILE_SIZE work b_inbyte getc fps indian bytecolour int b inbyte bytecolour bytecolour 256 wordptr unsigned short int bytecolour wordptr break fclose fps indian break j case IMAGE framesel IMAGE select active frame GetCtrlVal block imagemenu IMAGE framesel amp work switch work 241 case 1 block framel active TRUE block frame2 active FALSE SetCtrl Val block gt imagemenu IMAGE framel led TRUE SetCtrl Val block gt imagemenu IMAGE_frame2_led FALSE break case 2 block gt framel_active FALSE block gt frame2_acti
52. in which the data is present without refresh for as long as power is applied It is characterised by high cost high speed and low density UART Universal Asynchronous Receiver Transmitter A serial device which does not require a clock signal from the device it is communicating with It derives the clock from the data stream UVPROM Ultra Violet Programmable Read Only Memory A type of field programmable ROM which can be erased by the application of UV light Von Neumann Architecture A computer architecture in which the data memory and the program memory utilize the same address space A digital backplane standard originally developed by Motorola but now widely used It is characterized by multiple address spaces and high speed The most common VME card formats are 3U and 6U A 3U card has one VME connector only A 6U card has two VME connectors with the second connector an auxiliary bus such as VXI VXD or VSE The actual VME standard is a five volt digital standard The auxiliary bus may be either digital or analog 1 _ Anauxiliary digital bus used in a GU VME backplane 2 device driver written for Microsoft Windows 9x or later operating system Thy merchants chase the morning down the sea Their topmasts gilt by sunset tho their sails be whipped to rags Who raced the wind around the world come reeling home again With ivory apes and peacocks loaded memories and brags To sell for this high pr
53. is shown below as Figure 5 3 5 OUT ij i m pu BUFFER MESSAGE i 1 MESSAGE FORMER CRACKER BACKGROUND LOOP Figure 5 3 Typical Double Buffered Communication Subsystem Reference 58 85 5 4 2 1 Tick Tock The Tick tock is the name given to the interrupt handler routine associated with the communication subsystem It is given this name because transmission or receiving of data is controlled by interrupt 5 4 2 1 1 Transmission In the case of transmission the device buffer is initially empty which would normally result in a device ready interrupt except that this interrupt is kept disabled by the communication subsystem When a message is ready for transmission the message is loaded into a buffer and the interrupt is enabled This results in a Device Ready interrupt and the interrupt service routine loads as much of the message into the device buffer as the device is designed to handle byte or packet depending upon the nature of the device The interrupt service routine then leaves the interrupt enabled and executes an RTI command When the device buffer empties another Device Ready interrupt will occur and another portion of the message will be loaded into the device buffer by the interrupt service routine which will execute an RTI command leaving the interrupt enabled This sequence will continue until the entire message has been transmitted When the device buffer empties and the message buff
54. love encouragement and hope to an abused and frightened child TABLE OF CONTENTS Approval page ii Abstract iii Acknowledgements iv Dedication Table of Contents List of Tables List of Figures xiv Glossary xvi Epigraph xxiii CHAPTER ONE INTRODUCTION 1 1 0 Introduction 3 CHAPTER TWO GENERAL CHARACTERISTICS OF DATA ACQUISITION SY 8 6 2 0 Introduction 18 2 1 Requirements for an Advanced Data Acquisition 2 2 Elements of an Advanced Data Acquisition System 20 2 2 1 Microprocessor Options 20 2 2 2 Memory Options 23 2 2 2 1 2 2 2 2 2 ROM 44 2 2 2 3 RMM LL 25 2 2 2 4 Flash Memory 2 2 2 3 Reconfigurable Logic 26 2 2 4 Building The Platform _______t___ 28 2 3 IR Arrays and Charge Coupled Devices 28 2 3 1 Operating Considerations for an IR Array 30 2 4 IR Labs Controller z CcCC 32 2 4 1 Timing Card 32 2 4 2 Clock Generator 2 4 3 Analog Input Card 33 2 5 Host 34 2 6 Details of System 34 vi CHAPTER THREE IR CAMERA ELECTRONICS AND CABLING 35 3 0 Introduction 37 3 1 Dewar Electronics 37 3 1 1 Rockwell TCM 1000C Array 3 S 3 1 2 Dewar Electronics 40 3 1 3 Microswitch 40 3 2 RAO Designed Support Electronics 4
55. of extended bodies Any attempt to obtain data concerning an extended body will result in data from an area which is the equivalent of a single pixel and from which all spatial information has been lost This is not satisfactory Four possible applications for an imaging array at the RAO come to mind The first 1 You could image with the InSb detector but this would require exposing one pixel equivalent at a time Not only is this not possible given the present state of the ARCT but it would be painfully slow 2 There are many more than four but we shall discuss only these which is a photometric application and which can be done fairly simply is to observe Seyfert galaxies and then to make isothermal maps This would entail observations with NGC 4631 amp NGC 4627 in Canes Venatici ly 16 April 1929 C14 5 2 3 Exposure 455005240 min 55105 57 5 AB3 Image by Bernd Koch Solingan Figure 1 1 NGC 4631 in Visible Light various filters the construction of pointwise colour value plots and possibly the correlation of IR photometric data with data from other sources and for other portions of the spectrum The second application which comes to mind is the observation of planetary nebulae 3 Such as NGC 4631 shown here as Figure 1 1 in a photo taken from the collection of Bernd Koch at the University of Bonn Germany http www astrofoto com astro The difficulty of studying these objec
56. of two are summed with a summing amplifier buffer passed through a Siliconix DG408A analog switch used as an isolation switch and to the load Output from the board is via a DB 27 connector and as stated before there are 21 The board described in this report is Revision 4A 22 There are jumpers that can be used to set either or both reference voltages to common 23 The logic of the DG613 is such that one channel of each pair is closed when the gate is asserted and the other channel is closed when the gate is deasserted 50 multiplexers which are under program control and which can be used for test and troubleshooting There are four DIP blocks into which the user can solder protective devices such as diodes if desired These diodes are referenced to ground through 100 K ohm resistor networks 3 3 3 Analog Input Board The analog input board described herein is a design prototype board originally intended to work with the PICNIC array The identification on the board describes it as Revision 2C with a layout date of 23 August 1996 however this information may not be correct The production board uses Datel ADS 937 ADCs whereas the prototype boards uses Analogic ADC4325 ADCs Each of the two channels on the analog input board is independent and the two channels are identical Each channel consists of a programmable gain stage followed by 24 This is another Rockwell IR array currently October 2001 in product
57. orthogonal in the sense that the instruction set is register specific These problems among others make writing high performance code difficult at best 23 are shown in Table 2 1 2 2 2 Memory Options There are two types of memory to be considered The first type of memory to be considered is read write memory commonly known as RAM The second type of memory to be considered is read only memory commonly known as ROM 2 2 2 1 RAM Read write memory is available in two major types First there is static RAM SRAM which uses a full six transistor flip flop structure for each bit This type of memory is quite fast but due to the cell structure utilized on the chip it is relatively low density It is therefore best suited to smaller systems or as cache memory in larger systems coupled to mass memory via an explicit memory manager The other major type of RAM is dynamic RAM DRAM which uses only one transistor and a capacitor cell for each bit The great advantage of this type of memory is that it can be made very cheaply and has very high densities but the disadvantage is that 6 Micron Semiconductor 7 3 nanosecond access times are common 5 nanosecond access time components are becoming very reasonably priced E g systems with a 16 bit address space 64 M by 1 bit memories in a single package are common 24 dynamic RAM must be periodically refreshed Aside from the power requirement for refreshing the memory
58. output of the IR array to the video input card of the IR Labs controller Pinouts for these connectors are given in Appendix B The DB 37 connector on the clock generator board in the Labs controller supplies eight digital signals and their returns The pinout for this DB 37 connector is also given 28 It unloads automatically when the calling program exits 53 Appendix B There is a DB 37 connector and a DB 25 connector on the back of the IR Labs controller The DB 37 connector mates to the cable which goes to the RAO designed electronics package and the DB 25 connector mates to the cable not supplied by the author which goes to the RAO filter wheel controller and the 15 volt power supplies Wiring internal to the controller runs between the DB 37 connector and the DB 25 connector in order to match everything up Pinouts for these connectors is given in Appendix B CHAPTER FOUR MECHANICAL ASSEMBLY OF DEWAR 54 Lord thou has made this world below The shadow of a dream And taught by time I tak it so Exceptin always steam From coupler flange to spindle guide I see thy hand Oh God Predestination in the stride o yon connecting rod Kipling 56 CHAPTER 4 MECHANICAL ASSEMBLY OF DEWAR 4 0 Introduction The IR array is housed in a dewar along with a filter wheel some support electronics an activated charcoal getter and a shutter assembly Since the array is designed to be sensitive
59. property of the copyright holders Permission to duplicate must be obtained from Spectral Instruments Corporation 126 7 1 3 2 Serial Communication Channel The serial communication channel is locked at 9600 baud 8N1 This can be changed in the host program by changing the appropriate parameters in the include file svid h and recompiling however the code in the IR Labs controller must be changed The serial communication channel is set up as a tick tock as described in Section 4 4 2 1 of this paper The communication system on the host side uses single buffers however there is an underlying layer provided by the DLL which allows latency so a multiple buffer scheme is not necessary All functions called by the background loop as a result of a user event which generates strings for transmission to the IR Labs controller load the transmit buffer and then set a flag which indicates that there is a message to be sent The background loop then strobes the contents of the buffer out resets all pointers and clears the flag The IR Labs controller will respond to a transmitted string with one of a set of responses If the controller does not respond within ten seconds then an indicator is displayed on the GUI to show that a communication failure has occurred If the controller responds but with an error message an indicator is displayed to indicate this as well If the controller responds with the expected message an indicator is displayed to ind
60. status FALSE sprintf workstr NO HELP FORKING CODE IS 96d status error_message block workstr return void CVICALLBACK cbabout int menubar int menuitem void voidptr int panel DATABLOCK block block DATABLOCK voidptr DisplayPanel block gt aboutmenu 225 return void CVICALLBACK cblegal int menubar int menuitem void block int panel int status char workstr 80 status LaunchExecutable explorer exe hlpWegal html if status FALSE sprintf workstr NO LEGAL FORKING CODE IS 9 6d status error message block workstr return j RR CREER CALCE RR RR Rollo ooo RR RE E ERE ERROR HORRORE Message crackers follow These are the dispatch routines They are called by the switch in main cce kk ek km o p ob o ool o coe eo o ob oc e E o oe e eoe e HB k k Message cracker for MAIN menu int main cracker int event DATABLOCK block t int source int m_ecode int work switch event case MAIN exit main exit close_program block return EXIT 226 break case MAIN file_menu main start file menu DisplayPanel block gt filemenu break case MAIN debug menu main start debug menu DisplayPanel block gt debugmenu break case MAIN image menu main start image handling menu DisplayPanel block gt imagemenu
61. the DSP The first is to load an application program from EPROM under control ofthe kernel The second is to download an application program from the host This section addresses the first function The EPROM for this system 1s a 27C256 EPROM which is a 32 768 byte device The loader and kernel take up only 1536 bytes so there is unused space in the EPROM for other material Since the EPROM is in the top half of the program space it can be accessed by the kernel and can be used to store material other than the loader and kernel Specifically it can be used to store one or more application programs The kernel code as supplied by IR Labs includes a loader which will load a 272 word application program into the internal program memory a 16 task command table for this 107 application program and 128 words of data to one of the data memories In the application the kernel has been modified to have a 24 task command table and a 528 word application program with 128 words of data to be loaded Each application is assigned a block of space in the EPROM and requires 1024 words 3092 bytes of space Each application is assigned a number starting with 1 There is room in the EPROM under this scheme for nine application programs numbered one through ten with six missing as it overlays the loader and kernel To load a new application program you merely specify the desired application program number with the load command to the ker
62. the atmosphere While this is very commendable they have not been properly characterized and their response as a function of water vapour relative to standard filters is not known After some difficulty in placing the order standard filters were ordered but had not been received by the time this report was written The software for the IR Labs controller is patterned on the software as supplied by IR Labs for use with the PICNIC array but has been completely rewritten for the TCM 1000C array It is known that the software works but it has as yet to be tested against the array The software for the host is operational and has been tested against the Labs controller It appears to be fully functional 3 The performance of the narrow band filters is expected to be significantly better than the Johnson Cousins filters 140 82 There And Back Again The original job of work was described as Do a little soldering and you can do some observation and have a nice little thesis What was not mentioned in this description was that the IR spectrometer as well as the IR camera were at the time the job was started a collection of dusty parts in a disused section of the RAO laboratory The original intent was to build an IR spectrometer using an Aerojet linear array As this instrument would have been suitable for the study of point objects it would have mated well with the ARCT as it stands Unfortunately due to the history of the a
63. the host This may be done at a later time when everything is working 44 The preamplifier board also has the circuit for the temperature sensor on it This circuit uses an Analog Devices AD581 voltage reference to generate a stable voltage for the temperature sensor on the Rockwell chip The output of the AD581 is buffered by an 27 op amp configured as a non inverting amplifier voltage divider drops the supply voltage to the temperature sensor to 3 4 volts when the TCM 1000C is at 77 K The output of the temperature sensor is buffered by another OP 27 op amp and passed on to the filter wheel controller where it is converted to a digital signal and is transmitted to the host program via a path not discussed in this report There is an amplifier enable line digital which must be asserted by the IR Labs controller in order to turn on the preamplifiers This uses half of a 74HC04 package located on the digital board and a 2N2222A transistor to turn on the preamplifier 3 2 2 Bias Generator Board The bias generator board consists of an LM199 voltage reference buffered by an Analog Devices OP 27 set up as a non inverting amplifier The OP 27 has a 5 K ohm trim pot for fine adjustment The output of the OP 27 goes to a five output divider stack with each divider having a 1N4448 diode used as a snubber and with a 10 K ohm trim pot Final decoupling for all outputs is with a 10 tantalum capacitor The output voltages are as show
64. there are the issues of the hardware required for the refresh the requirement for an explicit memory manager to handle the DRAM and to keep the static cache and the DRAM synchronized and finally the access time for the DRAM 2 2 2 2 ROM Read only memory ROM has come a long way since its inception A few years ago ROM was available from the vendor as only masked memory and the vendor was happy to sell you a thousand pieces with your program hardwired into the memory It was not changeable and what you got was what you got Field programmable memory PROM changed all that While this type of memory could be programmed only once it could be programmed by the user in the field and it was not necessary to provide a bitmap to the chip vendor and to purchase a large number of pieces in order to geta ROM As the technology improved ultraviolet erasable stored charge devices UVPROM became available and it was possible and very affordable to purchase a device that could be programmed erased and then reprogrammed 10 Ten years ago 1990 60 nanosecond access times for DRAM were considered blindingly fast At the turn of the millennium with synchronous DRAM SDRAM 7 nanosecond access times are available though you will pay for it 25 2 2 2 3 RMM However while the UVPROM was the dominant technology a new technology referred to as Read Mostly Memory or RMM was emerging These were devices with limited storage and a limited nu
65. time milliseconds written by host computer Definition of value in latch U25 LATCH DC 10 Valuein latch 025 Miscellaneous constant definitions ZERODC 0 ONE DC TWO DC 2 THREE DC 3 EN SIDC 80173 Enable the SCI and SSI pins DISA SI DC 0003 C300 DC 500 Constant for resetting the DSP C600 DC 8600 EEPROM space per application program CFFFFDC FFFF Constant for resetting the DSP C50000 DC 50000 Delay for WRROM 12 millisec ERR DC ERR An error occurred DON DC Command was fully processed RCV ERR DC 0 Dummy location for receiver clearing CAR RET DC 8202000 Carriage Return marking end of command Command table resident in X data memory The last part of the command tabie is not defined for bootrom gt because it contains application specific commands ORG X COM TBL X COM TBL LD X DC DC DC DC DC DC DC DC O STARTO START O START O START This is where application 0 5 0 5 0 5 0 5 commands go 0 5 0 5 0 5 0 5 0 5 0 5 0 5 0 5 ERR START Nothing special RDMEM Read from DSP or EEPROM memory WRM WRMEM _ Write to DSP memory LDA LDAPPL _ Load application progam from EEPROM to DSP DC DC DC DC RST RST DSP from on board ROM STP FINISH Put it here as a 20200D START Extra delimiters do nothing 0 5 Room for
66. uses the interrupt flag but only to determine when to load the next byte into the transmit register It does not return to the background loop between bytes The minimum record length that it can recognize as a valid command is two words The second word must be of a particular format for the incoming record to be compared against the command RECEIVE SUBSYSTEM DISPATCHER SUBSYSTEM LOAD WORD SEND WORD FROM HOST TO HOST Figure 6 4 Block Structure of Kernel 6 1 2 2 Timer Driver The hardware timer counter is loaded such that with a 50 MHz clock it generates ticks at the rate of once per millisecond This therefore is the resolution of the timer This 0x20200d 106 timer is not used as a clock but is used as an interval timer during exposure and also to time various wait periods required by mechanical assemblies to move or for electronics to ramp up The timer runs only when it is invoked and is not interrupt driven A count is loaded into a register the timer is enabled and the number of ticks specified by the count is counted out When this occurs the routine exits Thus the DSP is trapped in this routine for the duration of the count The only exception is if an event occurs on the serial link This 15 monitored by the timer routine and if a command is received then it will be processed by the dispatcher 6 1 2 3 Load New Overlay Function There are two ways to load application programs into
67. work3 4 break case IMAGE send sex IMAGE set the exposure timer GetCtrl Val block gt imagemenu IMAGE_exp_tim amp block gt exp_tim SetCtrl Val block gt debugmenu DEBUG_exp_tim block gt exp_tim m_ecode send_sex block break case IMAGE auto sel SetCtrl Val block gt imagemenu IMAGE auto_sel FALSE error message block CANNOT AUTOLOAD POSITION FUNCTION NOT IMPLEMENTED return 0 break case IMAGE send 502 set video board bias this routine assumes 10V bias voltage GetCtrlVal block 1magemenu IMAGE bias amp work get the value in millivolts fwork work convert to floating point fwork fwork 1000 0 convert to volts fwork 5 0 add offset fwork fwork 10 0 correct for range fwork fwork 4096 convert to bits work fwork convert to fixed point work work amp 0x00000FFF ensure it is properly masked block gt bias work save send_sb2 block and send break case IMAGE send sgn up the integration Preamp Voltage those are read from the 237 Set ADC gain Since this word also picks speed and the Read display as well GetCtrl Val block gt imagemenu IMAGE_gain amp work switch work this gets the gain 1 block gt gain 0x00000007 break case 2 block gt gain 0x0000000B break j case 3
68. 0 Convert to word address to byte address MOVE RO YO Get 16 bit address in a data register MPY 0 0 Multiply ASR A Eliminate zero fill of fractional multiply MOVE 0 80 Need to address memory BSET 15 0 Set bit so its in EEPROM space DO 3 LIRDR MOVE P RO A2 Read each ROM byte REP 8 ASR A Move right into A1 LIRDR MOVE 1 0 FINISH2 transmits as its reply FINISH2 Program WRMEM WRM address datum write to memory reply DON WRMEM MOVE X R2 RO Getthe desired address MOVE X R2 A We need 24 bit version of the address MOVE X R2 X0 Get datum into so MOVE works easily 20 A WRX _ Test address bit for write to P memory MOVE XO P RO Write to Program memory JMP FINISH JCLR 21 A WRY Test address bit for write to X memory MOVE XO X RO Write to X memory JMP FINISH WRY JCLR 422 A WRR Test address bit for write to Y memory MOVE X0 Y RO Write to Y memory JMP FINISH WRR JCLR 23 A ERROR Test address bit for write to EEPROM MOVE X lt THREE X1 Convert to word address to a byte address MOVE RO YO Get 16 bit address in a data register MPY XLYO A Multiply ASR A Eliminate zero fill of fractional multiply MOVE A0 RO Need to address memory BSET 15 R0 Set bit so its in EEPROM space MOVE 0 1 Get data from command string DO 3 LIWRR Loopover three bytes of the word MOVE AJI P RO0 Wirite each EEPR
69. 0 Based Controller 144 However this difficulty was overcome and in May of 2001 a functioning array controller was in house While all this was going on Fred Babott and the author of this thesis analyzed the Rockwell IR array and designed support electronics which Fred Babott subsequently built 8 2 2 The Computer Factory In September 2000 the need was recognized for a computer for software development and to serve as a platform for integrating the various components of the IR camera computer was in fact purchased but it became the data acquisition computer at the ARCT and was not available for use as a development platform On January 3 2001 therefore the author gathered up the contents of her computer graveyard scavenged other bits added new components commandeered a laboratory and started building computers She built four altogether 11 The out of pocket expense exclusive of what was pulled out of the graveyard was approximately 1500 00CDN Additional software licence expenditures of approximately 8000USD were committed to the project These figures are disputed however documentation exists showing that they are approximately correct The figure for the software also includes the purchase price for the support tools for the DSP56002 microprocessor in the IR Labs controller 12 Two were traded as a quid quo pro for laboratory space The third glimdrop serves as a file transfer node and the fourth abscam
70. 109 electrons Readout Noise 500 electrons Maximum Readout Rate 2 MHz Operating Temperature 77K Integration Time 30 ms Peak Quantum Efficiency gt 70 Pixel Operability 95 Waveband Of Response 2 0 5 0 um Table 3 1 Design Criteria for Hybrid Focal Plane Arrays The TCM 1000C incorporates an on board integration capacitor and standard bit bucket brigade output This is described in detail in the Rockwell report included in the appendix The output timing sequence requires three inputs to the chip master clock CLK y shift register YSYN and a framing pulse FRAME There are two outputs however it is possible to read the entire array through only one output by not asserting the FRAME line every 64 clocks but rather every 128 clocks The timing diagram for reading the chip is shown in detail in the Rockwell report One final feature of note with the TCM 1000C array is the inclusion of an on chip temperature sensor This temperature sensor is stated in the report to be uncalibrated 4 For further data about the PACE 1 chip including dark current data see the Rockwell report Dark current is reported to be less than 1 electron per second per pixel at 77K 40 however there is a curve showing resistance as a function of temperature dated 6 March 1979 The output of this temperature sensor is buffered in the RAO designed preamplifier package and sent to the filter wheel controller where it meets an ADC The sig
71. 111 6 1 3 2 POF Power Off 112 6 1 3 3 SBV Set Bias Voltage 112 6 1 3 4 SB2 Set Video Board Video Offset 112 6 1 3 5 SGN Set Gain 113 6 1 3 6 STP Stop Video 113 6 1 3 7 RDA Read Array 113 6 1 3 8 RRR Read Reset Read 114 6 1 3 9 MRA Multiple Read of Array 114 6 1 3 10 Abort Read 115 6 1 3 11 DON Done 115 6 1 3 12 TST Communication Test 115 6 1 3 13 SEX Set Exposure Time 116 6 1 3 14 LDW Load 116 6 1 3 15 OSH Open Shutter 116 6 1 3 16 CSH Close Shutter zs 117 CHAPTER SEVEN HOST 118 120 7 1 Program 120 7 1 1 Structure of Graphic User Interface 122 7 1 2 Structure of the Background 123 7 1 3 Structure of Communication Subsystem 125 7 1 3 1 Interface to Spectral Instruments PCI 1826 opo de 125 7 1 3 2 Serial Communication Channel 126 7 1 3 3 DMA Channels iuo tere ehe 127 7 1 4 Real Time Clock esee eter erecta merae psi 127 T L5 Image SiO Geis aeo DIE 128 7 1 6 Filter Wheel Control bees 129 7 2 Host Program Auxiliary Systems sse 129 3 2 Help Subsystem eto erect e a dae des 129 7 3 Dynam
72. 24 25 26 27 28 29 30 5 93 273 Header Dependencies Line0002 31 32 33 34 35 36 37 38 File 0006 File Type Library Path f milone host CBACCES lib Res Id 6 Exclude False Disk Date 3023254800 Project Flags 0 Window Top 0 Window Left 0 Window Height 0 Window Width 0 File 0007 File Type CSource Path f milone host xlate c Res Id 7 Exclude False Disk Date 3075244476 Project Flags 0 Window Top 85 Window Left 5 Window Height 0 Window Width 0 Source Window State 1 2 2 2 0 15 16 0 0 80 0 1 0 1 0 25 49 0 61 7 Header Dependencies 1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 39 File 0008 File Type CSource Path f milone host msctype c Res Id 8 Exclude False Disk Date 3075237850 Project Flags 0 Window Top 23 Window Left 0 Window Height 0 Window Width 0 Source Window State 1 14 14 14 0 14 15 0 0 126 0 0 0 0 0 38 0 0 13 26 Header Dependencies 39 File 0009 File Type Library Path f milone host FITSLIB lib 187 88 Res Id 9 Exclude False Disk Date 3075467186 Project Flags 0 Window Top 0 Window Left 0 Window Height 0 Window Width 0 File 0010 File Type User Interface Resource Path f milone host errmenu uir Res Id 10 Exclude False Disk Date 3075290604 Project Flags 0 Window Top 209 Window Left 102 Window Height 400 Wind
73. 4 1 1U ipic white orange b ack 2 4U A gju S fok A d x 21 o B P o5 4 a os n 0 2 D m as t m gnd POWER and 104 Figure A 2 Wiring Harness Card for Dewar Electronics courtesy F Babott 163 2 OR ae gimb 2002 18 22 POI A orange ced high B white black red mid C black white ground blue red Vout 1 Vout2 co ax 5 Eran 3 CoE 4 7uH p 2 21 21 12 Figure 3 Preamplifier and Bias Voltage Board Layouts courtesy F Babott 164 fied ctos 3 6 R207 O Voutz 18 viaz SHIVER B aT7ar O asv tour ie 6217 ERE AMPLIFIER ciis mr lf Thias j jou 2 i5uF C214 Figure 4 Preamplifier Schematic courtesy Babott R310 A ii vv qo g301 18K R307 2303 R302 tf 3 qliy 1008 cx je IZ Iaf OFFSET Ld BIAS AMPLIFIER m r RIA 100R VOLTAGE REFERENCE R39 nc e was 9 Tet 6 96 to 5 85 for Temperate range of 90K to 40K e nz C308 HTa t2K 7 Tn 61 309 TEMPERATURE PRE AMP FP A BAS VOLTAGES Figure 5 Bias Voltage Generator Schemat
74. 4 10 Drive Train Mount The drive spindle is tipped with a plastic adapter sleeve which mates with the drive bellows on the filter wheel assembly There are two setscrews in the bellows and one 69 setscrew in the plastic adapter sleeve Although the setscrews for the bellows may be tightened without regard to orientation the setscrew in the plastic adapter sleeve goes into the drive spindle and all holes must be aligned before this setscrew may be inserted Care must also be taken not to drive the setscrew too far into the plastic adapter sleeve since if it is driven past the end of the thread it may not be recoverable or recoverable only with difficulty Figure 4 11 shows the dewar with the drive train in place and shows the location of the setscrews FILTER WHEEL INNER No os SEU IR ARRAY 2 SETSCREWS IR ARRAY vui s 7 m MOUNT SHELL NN 4 MOUNT DRIVE PLASTIC SPINDLE ADAPTER Figure 4 11 Drive Train With Setscrews Having mounted the drive train one can mount the IR array assembly Care must be taken to ensure that this assembly is mounted square to the filter wheel assembly 70 that it is mounted perpendicular to the light path and that it does not obstruct the operation of the shutter solenoids The light pipe and wiring harness may be installed at this time as shown in Figure 4 12 The getter is not installed until the dewar is ready to be closed up FILTER WHEEL WIRING
75. 5 4 Reference 52 87 5 4 3 1 Message Cracker Takes Direct Action In this case the message cracker after decoding the incoming message directly executes the action requested by the message This requires that the message cracker incorporate a task dispatcher to ensure that a routine which will perform the requested action 15 invoked while bfin cracker TRUE i switch inmessage case turn on pump bfpump on TRUE bfmsg avail TRUE break case turn off pump i bfpump on FALSE bfmsg avail TRUE break end of switch end of message cracker Figure 5 4 Typical Message Cracker While this approach 15 conceptually the simplest and is frequently implemented it has the disadvantages of not allowing for priority based execution of requested actions and 88 ofthe possibility that the system can lose real time if incoming message traffic is sufficiently high that the real time system cannot keep up 5 4 3 2 Message Cracker Sets Event Queue In this case the message cracker does not incorporate a task dispatcher but loads an event queue with a request flag The dispatcher is then part of d background loop The salient feature of this approach is that a prioritizer be included in the message cracker which can take into account any tasks already in the event queue the state of the real time system and any other pertinent information and which can shuffle the sequencing of the ev
76. 7 09 Comment added in serial port receive routine 2001 07 16 Set APL LEN to 300 to allow for max length PAGE 132 Printronix page width 132 columns Define some useful DSP register locations 330 RST ISR EQU 00 Hardware reset interrupt ROM ID EQU 06 Location of program Identification SWI interrupt SCI ISREQU 14 SCI serial receiver interrupt address SCI ERR EQU 16 SCI interrupt with exception error STR EQU 18 Starting address of program ISR EQU 3 DSP timer interrupt service routine address PGM CONEQU 3E _ Program continues on here BUF STR EQU 60 Starting address of buffers in X LEN EQU 20 Length of each buffer BUFEQU STR Starting address of serial receiver buffer in X XMT BUFEQU STR BUF LEN Starting address of command buffer in X COM TBLEQU BUF BUF Starting address of command table in X NUM COMEQU 24 Number of entries in command table NUM COMEQU 32 Number of entries in command table ROM OFF EQU 4000 Boot program offset address in EEPROM LD X EQU 4200 Assembler loads X starting at this EEPROM address RD X EQU C600 DSP reads X from this EEPROM address ADR EQU F0 Starting P address of application program APL LEN EQU 300 APL ADR Maximum length of application program Define DSP port addresses WRLATCH EQU Wnte to timing board latch WRSS EQU SFF80 Write clock driver and VP switc
77. 8 to augment the data obtained the previous year the situation was still somewhat unsatisfactory indicating the need for further observations This the IR camera can do An example of the type of infrared imaging which can be done is shown overleaf as Figure 1 2 This is a mosaic image of the Trapezium from the Lada et al paper showing 5 Reportedly due to window dust instrument telescope flexure and detector anomalies as well as significant L band emission due to H regions in the field of view the Trapezium as it appears in the L band Figure 1 2 Trapezium in L Band from Lada et al Interesting features which are pointed out in the paper include the bright bar seen in the southeast and emission from dust at 3 3 micrometers due to small PAH grains which 6 This is Figure 1b in the original paper which in colour in that paper t is reduced to grayscale in this reproduction for the purpose of printing are stimulated by UV radiation from the early stars in the cluster In 1994 Lada et al showed that a technique was available which allowed the mapping of dust distributions in cold molecular clouds This technique used data obtained in near IR imaging surveys combining direct measurements of IR colour excess along narrow beams with sampling procedures While this technique requires the observation of a great many stars behind the cloud being investigated it does allow the derivation of the spatial distribution
78. A SLX PCC Disable the SSI BCLR lt 5 clear bit in shutter mask JSR lt ORBLOCK try to trim some fat MOVE lt 5 5 1 get the mask MOVE Y lt YTB Y1 OR YLBI put in the clock gen board addr MOVE Y lt YDELAY Y1 OR YLBI put in the delay MOVE BI X WRSS direct write to port JMP FINISH Start power on cycle CAM ON MOVEP X EN SLX PCC Enable the SSI BSET CDAC X lt LATCH Disable clearing of all DACs BCLR ENCK X lt LATCH Disable DAC output switches MOVEP X LATCH Y WRLATCH Turn analog power on to controller boards but not yet to array BSET LVEN X PBD LVEN HVEN gt Power reset BSET HVEN X PBD BSET HVEN X PCD timPC value Now ramp up the low voltages 6 5 V 16 5 V and delay them to turn on BCLR LVEN X PBD LVEN Low gt Turn on 6 5V 16 5V MOVE Y PWR DLY A JSR CON DELAY applying power to the IR array is split out as a separate operation Set DC bias DACs SETBIAS SLX PCC Enable the 551 JSR PAL DLY Wait for port to be enabled MOVE DC BIASES RO Get starting address of DAC values 357 JSR SET DAC MOVE lt Delay three millisec to settle JSR CON DELAY Set clock driver DACs MOVE lt DACS RO Get starting address of DAC values JSR SET DAC disable the SSI and return MOVEP SLX PCC Disable the SSI JMP FINISH U
79. AA ELLER kk ck ce RR E ER EG GG GE Filter Wheel Handler int run filterwheel DATABLOCK block i unsigned short invalue unsigned short us work invalue InPort block port base PORT B OFFSET Read the port us work invalue save for power on check invalue invalue amp 0x0004 mask leaving only the run flag if invalue FALSE SetCtrl Val block gt mainmenu MAIN filter power FALSE if hardware sez filter is not moving put that up j else SetCtrl Val block gt mainmenu MAIN filter power TRUE if hardware sez filter is moving put that up us_work us_work amp 0x0008 mask leaving the power on flag if us_work FALSE SetCtrlAttribute block gt mainmenu MAIN campwr ATTR ON COLOR VAL RED SetCtrlAttribute block gt mainmenu MAIN campwr ATTR ON COLOR VAL GREEN else 207 if block gt filter_ moving FALSE if we are not commanding a filter movement i then force a stop and exit DeassertFilterPower block return 0 if block gt filter_moving TRUE if we are commanding a filter movement then assert the command line AssertFilterPower block invalue InPort block gt port_base PORT OFFSET Get the current filter posttion number if invalue amp 0x000f 1 if itis the fiducial then light the home light block gt home_found TRUE block gt active
80. Assembly Script for Motorola Assembler Under MS DOS 363 APPENDIX E Host Program Error Codes 364 APPENDIX F FITS Error Codes 369 xii LIST OF TABLES Table 2 1 Examples of Microprocessor Architecture z 22 Table 3 1 Design Criteria for Hybrid Focal Plane Arrays 39 Table 6 1 Tasks Available in RAO Application 111 Table B 1 External Preamplifier Pinoutz 170 Table B 2 Dewar to Preamplifier Pinout 7 Table B 3 Clock Generator Board Pinoutz 172 Table B 4 DB 37 for Controller to External Preamplifer Pinout 173 Table B 5 DB 25 for Controller to Filter Wheel Controller Pinout Table C 1 Central Wavelengths and Zero Magnitude Fluxes at Different Photometric 181 174 xiii LIST OF FIGURES Figure 1 1 NGC 4631 in Visible Light 5 Figure 1 2 Trapezium in L Band asiste 8 Figure 1 3 Contour Maps of Equivalent Visual Extinction Northetn Streamef o 10 Figure 1 4 Solar Flare at Near IR Wavelengths 6 September 2001 12 Figure 1 5 PICNIC Spectral Response Curve sss 14 Figure 1 6 Relative Response as a Function of Wavelength for 1000 IR ATfay noa tee ieri Dara tue ee neus 15 Figure 2 1 Block Diagram of Data Acquisition 19 Figure 2 2 Types of 05 21 Figure 3 1 Relative Response as a Func
81. BUFEQU BUF STR BUF LEN Starting address of command buffer in X COM TBLEQU XMT BUF BUF LEN Starting address of command table in X NUM 24 Number of entries in command table ROM OFF EQU 4000 Boot program offset address in EEPROM LD X EQU 4200 Assembler loads X starting at this EEPROM address RD X EQU C600 DSP reads X from this EEPROM address ADR EQU F0 Starting P address of application program LEN EQU 200 APL ADR Maximum length of application program Define DSP port addresses WRLATCHEQU FFC1_ Write to timing board latch WRSS EQU 5 80 Write clock driver and VP switch states WRPC EQU FFCO Write DSP datum to PCI board EQU FFFE Port A Control Register gt Wait States EQU FFEO Port B Control Register PBDDR EQU 2 Port B Data Direction Register PBD EQU 4 Port B Data Register PCC EQU FFE1 Port C Control Register PCDDR EQU FFE3 PortC Data Direction Register PCD EQU FFES Port C Data Register EQU SFFFF Interrupt Priority Register SCR EQU FFFO 5 Control Register SSR EQU FFF1 SCI Status Register SCCR EQU SFFF2 SCI Clock Control Register SRX EQU FFFA SCI receive data register SSITX EQU FFEF SSI Transmit and Receive data register CRA EQU FFEC SSI Control Register CRB EQU SFFED SSI Control Regsiter B TCSR EQU S FFDE Timer control and status register TCR EQU SFFDF Timer
82. C CON Now apply power to the IR array BSET POWER BIT Y SH MASK sets the shutter mask JSR lt trim some fat MOVE lt 5 MASK BI get updated mask MOVE Y lt YTB Y1 get board address OR MOVE Y lt YDELAY Y1 get delay 3 YLBI MOVE BI X WRSS and write to port Delay for the IR array to settle down MOVE lt DLY A Delay for the IR array to settle JSR CON DELAY JMP FINISH UC COF BCLR POWER BIT Y SH MASK clears the bit in the shutter mask JSR lt ORBLOCK trim some fat MOVE lt 5 MASK BI get updated mask MOVE Y lt YTB Y1 get board address OR YLBI MOVE Y lt YDELAY Y1 get delay OR MOVE BLX WRSS and write to port JMP FINISH and get the hell out of Dodge check to make sure that code does not overflow into data IF DL 358 IF CVS N LCV L gt 2 APL_NUM 1 100 APL_LEN WARN CODE overflow Make sure next application ENDIF will not be overwritten ENDIF Command table IF DL Memory offsets for downloading code ORG X COM TBL X COM TBL ELSE Memory offsets for generating EEPROMs ORG P COM TBL P 2 APL NUM 1 100 APL LEN ENDIF Begin UC command table DC O START dummy 0 DC O START dummy 1 DC O START dummy 2 DC 0 5 dummy 3 DC OSTART dummy 4 DC O START dummy 5 DC COF UC COF tum off power to the IR array DC CON UC CON turn on power to the IR array DC
83. CE ROUTINES L1 je sk je dore oe RR aa ee oR RHR ERR ER ERA ARR ERR KR ESTAB DIR Establishes the directory structure ok oe ck EEE EEE E EE ok oe ok ok E E EE Z EEEE EEE E E E E E E ok oe ok EE E EE E E E E E E E int estab dir DATABLOCK block if stremp block gt wdname NULL 0 mkdir backs mkdir darks mkdir flats mkdir images else if chdir block gt wdname FALSE mkdir block gt wdname chdir block gt wdname mkdir backs mkdir darks mkdir flats mkdir images j block gt flatctr 0 block gt darkctr 0 block gt backctr 0 block gt imagectr 0 return PASSED 263 DMA INTERFACE ROUTINES lifted from Spectral Systems sample code as modified to fit our needs x ak void do dma DATABLOCK block i SetCtrlAttnbute block gt mainmenu MAIN dma led ATTR_OFF COLOR VAL YELLO W if block framel active TRUE i init dma NROWS NCOLS block dmal array set up the DMA array start dma 0 start DMA 1n non video mode if block frame2 active TRUE 1 init dma NROWS NCOLS block dma2 array set up the DMA array start dma 0 start DMA in non video mode 1 return void quit
84. CVI Programmer s Guide for further details Id svid c 1 0 1996 03 27 KRS Exp Id svid c 2 0 2001 03 23 SEJ Exp id svid c 2 01 2001 05 17 SEJ Exp Ee Ae ae se ake ke He de sje INCLUDES amp DEFINES o EET 200 define SVID C include lt utility h gt include lt rs232 h gt include lt ansi_c h gt include lt formatio h gt include lt userint h gt include lt ctype h gt include lt stdio h gt include lt stdarg h gt include lt stddef h gt include lt math h gt include lt string h gt include lt time h gt ifndef Bool Truth lies and other delusions define Bool unsigned char define TRUE 1 define FALSE 0 Zendif stuff to make the file handlers happy define CARD SIZE 80 shades of the IBM 1620 stuff to define the Spectral Systems card define DEVICE ID 0 80 6 define VENDOR ID Ox10E8 define INDEX ID 0 0000 define TIMEOUT_TIME double lO define LIGHT_TIME double 2 stuff associated with the 8255 parallel port for the filter wheel define PORT A OFFSET 0 f define PORT B OFFSET 1 define PORT_C_OFFSET 2
85. DC BD2 H_READ L PIXEL L LSYNC L FSYNC L_RST DELAY DC BD2 H READ L PEXEL L LSYNC L FSYNC L_RST SHIFT_ODD_ROW DC READ ODD ROW PIXELS SHIFT ODD ROW 2 DC BD2 H READ L PIXEL L LSYNC L LINE H RST DELAY DC BD2 H READ 4L PIXEL H LSYNC L LINE H FSYNC L RST DELAY DC BD2 H READ L PIXEL H LSYNC L LINE H _ RST DELAY DC BD2 H READ L PIXEL H LSYNC H LINE H FSYNC L_RST 900000 DC BD2 H_READ H_PIXEL H_LSYNC H_LINE H_FSYNC L_RST 7C0000 READ ODD ROW PIXELS DC SHIFT ODD ROW PIXELS READ ODD ROW PIXELS 2 DC BD2 H_READ H_PLIXEL H_LSYNC H_LINE H_FSYNC L_RST DELAY DC VP A D sample DC 010033 Start A D conversion DC SXMIT Series transmit four pixels data DC 8140033 Delay DC BD2 H READ L PIXEL H LSYNC H LINE H FSYNC L RST DELAY DC VP A D sample DC 010033 Start A D conversion DC SXMIT Series transmit four pixels data SHIFT ODD ROW PIXELS DC SHIFT EVEN ROW SHIFT ODD ROW PIXELS 2 DC BD2 H_READ H_PIXEL H LSYNC H_LINE H_FSYNC L_RST DELAY DC VP DLY A D sample DC 010033 Start A D conversion DC 5160033 Padding DC BD2 H READ L_PIXEL H_ LSYNC H LINE H FSYNC L RST DELAY DC VP DLY A D sample DC 010033 Start A D conversion DC 000033 Padding SHIFT EVEN ROW DC READ EVEN ROW PIXELS SHIFT EVEN ROW 2 DC BD2 H READ L _PIXEL L _LSYNC H_ LINE H FSYNC L_RST DELAY DC BD2 H_READ L_PIXEL H_LSYNC H LINE H FSYNC L_RST DELAY DC BD2 H_READ L_PIXEL H_LS
86. DTH WEG ROWS COL NOT FOUND BAD SIMPLE NOU SIMPLE NO BITPIA NO NAXIS 0 NAXES NO XTENSION NOT ATABLE NUT BTABLE NO PCOUNT NO GCOUNT NO TFIELDS NO TBCUL NO_TFORM NOT_IMAGE BAD_TBCOL NOT_TABLE COL TOO WIDE COL NOT UNIQUE BAD ROW WIDTH UNKNOWN EXT UNKNOWN REC 154 155 156 157 158 159 201 202 203 204 205 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 241 251 252 372 shared memory driver is not initialized IPC error returned by system call no memory in shared memory driver resource deadlock would occur attempt to open create lock file failed Shared memory block cannot be resized at the moment header already contains keywords keyword not found in header keyword record number is out of bounds keyvord value field is blank string is missing the closing quote illegal character in keyword name or card required keyvords out of order keyword value is not a positive integer couldn t find END keyvord illegal keyword value illegal keyword value illegal BAIISn keyvord value illegal PCOUNT keyword value illegal GCOUNT keyword value illegal TFIELDS keyvord value negative table row size negative number of rows in table column with this name not found in table illegal value of SIMPLE keyword Primary array doesn t start with SIMPLE Second keyvord not BI
87. EBUG_memsel amp memsel strcpy block gt outbuffer WRM switch memsel case PROGRAM MEMORY f block gt outbuffer 3 0x10 break j case X MEMORY block gt outbuffer 3 0x20 break case Y MEMORY block gt outbuffer 3 0x40 266 break j block gt outbuffer 4 address amp 0x0000FF00 gt gt 8 block gt outbuffer 5S address amp 0x000000FF block gt outbuffer 6 value amp 0 00 0000 gt gt 16 biock gt outbuffer 7 value amp 0x0000FF00 gt gt 8 block gt outbuffer 8 value amp 0x000000FF block gt outbuffer 9 0x20 block gt outbuffer 10 0x20 block gt outbuffer 11 CR block gt outarm TRUE block gt outcount 12 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 TRUE retum PASSED return ERROR j int send rdm DATABLOCK block t unsigned int address int value int memsel int Work if block gt outarm FALSE SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED GetCtrl Val block gt debugmenu DEBUG_address amp address GetCtrl Val block gt debugmenu DEBUG value amp value GetCtrl Val block gt debugmenu DEBUG_memsel amp memsel block gt return_expected TRUE block gt return_ptr menu block gt debugmenu block gt return_ptr item DEBUG value 267 block gt return_ptr ad
88. ERROR j int send sbD2 DATABLOCK block i if block gt outarm FALSE strepy block gt outbuffer SB2 block gt outbuffer 3 block gt bias amp 0 00 0000 gt gt 16 block gt outbuffer 4 block gt bias amp 0x0000FF00 gt gt 8 block gt outbuffer 5 block gt bias amp 0 000000 block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer 273 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED j return ERROR int send_sgn DATABLOCK block t if block gt outarm FALSE strcpy block gt outbuffer SGN block gt outbuffer 3 block gt gain amp 0 00 0000 gt gt 16 block gt outbuffer 4 block gt gain amp 0 0000 00 gt gt 8 block gt outbuffer 5 block gt gain amp 0x000000FF block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE retum PASSED retum ERROR int send rst DATABLOCK if
89. ES E E E GRE initial system setup 4 BEGIN INITIALIZATION ROUTINES These are the routines called in main when doing the EEL LER ESS PES ES SERRE EEL ELE LEE ELE EET UB UE LUN UN I TERREA e ne ee oo oo H INIT WINDOWS This routine initializes the screens and opens the main screen Heo feo KORR CR REGE int init windows DATABLOCK block f i int work work1 work2 Winhndl handle handle Bool fontsel selection char workstr 81 int file status interrogation function long file size interrogation function int file handle we have been here before load screen initialization data from the file not been here before we need to run the selection routine standard work variables alocal window a toggle used in font a work string status return for file file size return for file if we can access this file and can if we have font 253 First open and display the main menu then open and display the startup screen After all the rest of the screens load and the indicators are set up hide the startup screen It will never be called again and represents a memory leak but at least the user will know the program didn t go off to never never land block gt mainmenu LoadPanel 0 main uir MAIN DisplayPanel block gt mainmenu handle LoadPanel block gt mainmenu startup uir STARTUP Displ
90. E_f4 ATTR_CMD_BUTTON _COLOR VAL break case 5 Val block gt filtermenu FILTER_filter_3 led TRUE SetCtrlAttribute block gt imagemenu IMAGE BUTTON COLOR VAL RED break case 6 SetCtrl Val block gt filtermenu FILTER_filter_4 led TRUE SetCtrlA ttribute block gt imagemenu IMAGE_f6 ATTR_CMD_BUTTON _COLOR VAL_RED break j return END FILTER WHEEL HANDLER Ses ee eo ee ee UTC Clock Handler ok int run_utc_clock DATABLOCK block 211 char outbuffer 80 int year int day int month int hours int minutes int seconds int utc offset unsigned short work int temperature making this a time and temperature sign unsigned long portaddress hardware port address GetSystemDate amp month amp day amp year get local time GetSystemTime amp hours amp minutes amp seconds Display is intensive So we want to update only on a seconds change The following will do it if seconds block gt oldseconds return 0 block gt oldseconds seconds temperatur
91. FINISH2 Program WRMEM WRM address datum write to memory reply DON WRMEM MOVE X R2 RO Get the desired address MOVE X R2 5 A need 24 bit version of the address MOVE X R2 X0 Getdatum into so MOVE works easily Z20 A WRX Test address bit for write to P memory MOVE X0 P RO Write to Program memory JMP FINISH JCLR 21 A WRY Test address bit for write to X memory MOVE X0 X RO Write to X memory JMP FINISH WRY L2WRR 339 22 A WRR Test address bit for write to Y memory MOVE X0 Y RO Write to Y memory JMP FINISH JCLR Z23 A ERROR Test address bit for write to EEPROM MOVE X lt THREE X1 Convert to word address to a byte address MOVE RO YO Get 16 bit address in a data register MPY 1 0 Multiply ASR A Eliminate zero fill of fractional multiply MOVE 0 0 Need to address memory BSET 15 R0 Set bit so its in EEPROM space MOVE 0 1 Get data from command string DO 3 L1WRR Loopover three bytes of the word MOVE AI P RO Write each EEPROM byte REP 8 ASR X C50000 Y0 Move right one byte enter delay DO YO L2WRR Delay 12 milliseconds for EEPROM write REP 4 Assume 50 MHz DSP56002 NOP NOP DO loop nesting restriction LIWRR JMP FINISH Read EEPROM code into DSP memory starting at P APL ADR as a subroutine LDAPPL MOVE X R2 X0 Number of application program MOVE lt 600 0 MPY 0 0
92. FLUSH ARRAY has everything RD ARRAY has except that it does not transmit BSET WW X PBD Set WW to 1 for 16 bit image data DO 4508 FDLY ON count levels JSR PAL DLY NOP FDLY ON 353 128 FGROUP_1 read first set with frame line asserted MOVE lt READ ON RO generate initial pulse JSR lt CLOCK DO Z128FGROUP 1 INNER clock out the pixels MOVE lt FLUSH_FIRST RO get the drive sequence JSR lt clock it out NOP loop restriction FGROUP 1 INNER MOVE lt OFF RO last pulse JSR CLOCK NOP loop restriction FGROUP 1 JSR PAL DLY Wait for serial data transmission BCLR WW X PBD Clear WW to 0 for non image data RTS endit Acquire a complete image c sk ke hj Call multiple read array with number of read pairs 1 RRR JSR lt UCCSHS first thing to do is to ensure shutter is closed JSR SHORT DELAY give it time to swing over MOVE lt MOVE A Y N RA JMP lt L MRAO Reset array wait read it out n times expose read it out n times M RA MOVE X R2 A MOVE A Y lt N_RA Desired number of reset read pairs L MRAO JSR lt DON Temporarily transmit DON FO case only MOVE CHK RS Don t check for incoming commands JSR FLUSH ARRAY Flush the array at least twice JSR SHORT DELAY Call short delay for reset to settle down DO lt RA L Flush RA times
93. FOPCI _ Optionally send RDA to FO PCI board MOVEP Y CBD HDR Y WRFO JSR PAL DLY MOVEP Y RDA Y WRFO JSR PAL DLY MOVEP Y NPXLS Y WRFO ENDIF BSET WW X PBD Set WW to 1 for 16 bit image data MOVE lt READ ON RO Tum Read ON and wait 5 milliseconds JSR CLOCK SO first few rows aren t at high DO 2598 DLY ON count levels JSR PAL DLY NOP DLY ON MOVE lt FRAME INIT RO Initialize the frame for readout JSR lt CLOCK DO 64 FRAME First shift and read the odd numbered rows MOVE lt SHIFT_ODD_ROW RO _ Shift odd numbered rows JSR CLOCK MOVE lt SHIFT_ODD_ROW_PIXELS RO Shift 2 columns no transmit JSR lt CLOCK DO 63 L ODD_ROW MOVE lt READ ODD ROW PIXELS RO Read the pixels in odd rows JSR CLOCK NOP L ODD ROW MOVE lt 5 EIGHT PIXELS RO Series transmit last 8 pixels JSR CLOCK Then shift and read the even numbered rows 319 MOVE lt SHIFT EVEN ROW RO Shift even numbered rows JSR CLOCK MOVE lt SHIFT EVEN ROW PIXELS RO Shift 2 columns no transmit JSR CLOCK DO 63 L EVEN ROW MOVE lt READ EVEN ROW PIXELS RO Read the pixels in even rows JSR CLOCK NOP L EVEN ROW MOVE 4 SXMIT EIGHT PIXELS RO Series transmit last 8 pixels JSR CLOCK NOP FRAME MOVE lt READ OFF RO Read Off JSR CLOCK JSR PAL DLY Wait for serial data transmission BCLR WW X PBD Clear WW to 0 for non image data RTS OE E E EE E EEE E E E E E ZE Ei Acquire a com
94. FSYNCEQU 0 H FSYNCEQU 8 L PIXELEQU 0 H PIXELEQU 510 L READ EQU 0 READ EQU 20 Turn READ ON for readout and reset READ ON DC READ OFF READ ON 2 DC BD2 H_READ L_PIXEL H_LSYNC L_LINE H_FSYNC L_RST DC BD2 H_READ L_PIXEL H_LSYNC L_LINE H_ Turn READ OFF during exposure READ OFF DC SHIFF RESET ODD ROW READ OFF 2 DC BD2 L READ L PIXEL H LSYNC L LINE H FSYNC L RST DELAY DC BD2 L_READ L_PIXEL H_LSYNC L_LINE H_ FSYNC L RST DELAY Shift and reset the odd numbered lines SHIFT RESET ODD ROW 326 DCSHIFT RESET EVEN ROW SHIFT RESET ODD ROW 2 DC BD2 H READ L PIXEL L LSYNC L_LINE H FSYNC L RST DELAY DC BD2 H READ L PIXEL H LSYNC L LINE H FSYNC L_RST DELAY DCBD2 H READ L PIXEL H LSYNC H LINE H FSYNC L RST DELAY DC BD2 H_READ L_PIXEL H_LSYNC H_LINE H_ FSYNC H_RST DELAY DC BD2 H_READ L_PIXEL H LSYNC H_LINE H_ FSYNC L_RST DELAY Shift and reset the even numbered lines SHIFT RESET EVEN ROW DC FRAME INIT SHIFT RESET EVEN ROW 2 DC BD2 H_READ L PEXEL L LSYNC H_LINE H_ FSYNC L RST DELAY DC BD2 H READ L _ PIXEL H LSYNC H_LINE H_FSYNC L_RST DELAY DC BD2 H READ L PIXEL H LSYNC L_LINE H_FSYNC L_ RST DELAY DC BD2 H_READ L_PIXEL H_LSYNC L FSYNC H_RST DELAY DC BD2 H_READ L_PIXEL H_LSYNC L_LINE H_ FSYNC L_RST DELAY Initialize the frame for readout including shift register slow row scanner FRAME INIT DC SHIFT ODD ROW FRAME INIT 2 DC BD2 H READ L PIXEL H LSYNC L_LINE L_FSYNC L_RST DELAY
95. HASHTABLE HASHTABL RASHCODE incoming gt 1111 11 MNEMONIC x 128 1 RESULT CODE d VIRTUAL MACHINE VIRTTABL 1 1 VIRTUAL PSEUDO OP STRING ADDRESS PSEUDO OP STRING ADDRESS BOX Gk Robo 4 X ceo X gt OR Ros d gt 7 011717070101 PSEUDO OPS 1 VIRTUAL MACHINE PROGRAM COUNTER VIRTREAL A 121 3 12 3 REAL MACHINE ROUTINE WHICH ACTUALLY DOES THE WORK ub dede ENDIT Figure 5 7 Linkage Sequence for Virtual Machine in RTOS in NRC DRM 210 17 Taken from code listing copyright 1990 Susanna Johnson Assigned to Nuclear Research Corporation rights reserved 96 environment Examples of this class of operating system include SpoX VRTX and RTOS 5 6 Roll Your Own Operating Systems Strictly speaking a roll your own system should be considered only when one or more of the following conditions obtain 1 Expected low production volume causes the develop purchase tradeoff to be such that it is more cost effective to do in house development 2 task is so simple that a purchased system cannot be justified 3 Thecharacteristics ofthe embedded microprocessor DSP microcontroller are such that it is not feasible to use a commercial product 4 Performance constraints are such that it is not feasible to use a comm
96. However once loaded it can be stored in the CONFIG DAT file and need not be reloaded The base address returned by the installation software will be only for the first 8255 133 output device Each 8255 output device has four ports of which three are user configurable general purpose I O the fourth being the control port for the first three ports Since there are five 8255 devices on each DIO 128 the addresses of the ports are incremented in multiples of 4 to cover all the devices on the board The DIO 128 is used by the host program to transmit data to the filter wheel controller and to obtain filter wheel position detector temperature information and preamplifier power status To do this requires the use of only one 8255 device and at that there are a few spare lines so there is room for expansion for other uses 7 5 White Rat The white rat is a debugging feature which is deliberately left in the release code for the host program to facilitate code development for both the host program and for the IR Labs Motorola DSP It requires a dumb terminal attached to COM 1 and set to 9600 baud 8 data bits one stop bit no parity 9600 8N1 There is a switch in the DEBUG MENU screen that enables the white rat When the white rat is enabled it will echo all traffic both to the IR Labs controller and from the IR PProgramming instructions for this part are freely available on the Internet 14 In naval shipboard sound powered teleph
97. JSR FLUSH ARRAY Call flush array subroutine JSR SHORT DELAY final settling delay NOP will not result in DMA transfer 354 L MRAI MOVE X lt ZERO AI clear Al register MOVE lt TIM AO get exposure time TST A test for zero 1 MRANO don t open the shutter if zero JSR UCOSHS Open the shutter JSR SHORT DELAY wait for it to swing over L MRANO MOVE L 2 7 load return address JMP EXPOSE Delay for specified exposure time L MRA2 JSR UCCSHS Close the shutter JSR SHORT DELAY wait for it to swing over DO Y lt N_RA L_MRA3 Read N RA times again JSR RD ARRAY Call read array subroutine NOP Will result in DMA transfer L MRA3 JMP END EXP This is the end of the exposure EEE SUBROUTINES f eeeeeceeeeer Core subroutine for clocking out array charge CLOCK MOVE Y SH MASK YI get the shutter hold mask MOVE 0 0 of waveform entries MOVE Y R0 t A start the pipeline DO X0 CLK1 repeat XO times OR YLA insert shutter hold mask MOVE A X R6 Y RO A send the waveform CLK1 OR YLA insert shutter hold mask MOVE 6 flush out the pipeline RTS and retum Update the DACs SET DAC DO Y RO SET 10 Repeat X0 times MOVEP Y R0 X SSITX Send out the waveform JSR PAL DLY Wait for SSI and PAL to be empty NOP Do loop restriction SET 10 RTS Return from subroutine Delay for seri
98. MAGE dec cs workstr fprintffsp config file DEC 96osin cs workstr GetCtrl Val block gt imagemenu IMAGE air mass cs workstr fprintf fsp_ config file AIR MASS sin cs_workstr GetCtrl Val block gt imagemenu IMAGE object cs workstr fprintf fsp config file OBJECT osw cs workstr GetCtrl Val block gt imagemenu IMAGE exp tim amp ui work fprintf fsp config _file EXP_TIME d n ui_ work GetCtrl Val block gt imagemenu IMAGE bias amp i work fprintf fsp_config_file BIAS d n i_ work GetCtrl Val block gt imagemenu IMAGE gain amp i work fprintf fsp_config_file GAIN d n i_work close the config file and exit fclose fsp config file return SUCCESS 288 D 1 5 Listing of xlate c include ansi c h include lt utility h gt include lt stdio h gt define CRTBLD what a royal pain it is trying to define INTERNAL IFSTRIP keep everyone happy define WCHAR DEFINED include msctype h undef _WCHAR_T_DEFINED undef INTERNAL IFSTRIP_ undef CRTBLD FILE iob 20 a global for the FITS library int _ermo int mb 1 these ANSI functions to functions char getdewd int drive char buffer int maxlen if drive NULL SetDrive drive GetDir buffer return buffer int c int mask if unsigned c 1 lt 256 return _pctype c amp mask else return 0 j
99. ND ASTRONOMY CALGARY ALBERTA DECEMBER 2001 Susanna Elaine Johnson 2001 ABSTRACT This thesis describes the design and construction of an infrared camera for astronomical use at the Rothney Astrophysical Observatory based on a 128 by 128 pixel IR array The array is sensitive in the 2 0 um to 5 0 um range Construction details for the detector itself are given and details of the software for the array controller and for the host computer are given with source code listings ili Acknowledgements First the technical acknowledgements There is Fred Babott who is the technical cohesive force behind the RAO and who knows his onions He did a great deal ofthe circuit design layout and fabrication Then there is Dr David Fry who let me have my head but was able to direct my energies in the appropriate direction Finally there is Pat Irwin who allowed me to commandeer laboratory space in which to assemble the IR camera These three gentlemen are the unsung heros of the Physics Department at the University of Calgary Then the personal acknowledgements There are Richard and Patricia Pierson who funded this effort and provided moral support and Sybil Lemyre who listened to me at all hours and under all circumstances Finally there is my husband Larry Harding who put up with everything that went on and who still manfully refrained from committing justifiable homicide Dedication To all those who gave comfort support
100. OM byte REP 8 310 ASR X C50000 Y0 Move right one byte enter delay DO YO 2WRR _ Delay by 12 milliseconds for EEPROM REP 4 Assume 50 MHz DSP56002 NOP L2WRR NOP DO loop nesting restriction LIWRR JMP FINISH Read EEPROM code into DSP memory starting at P APL ADR as a subroutine LDAPPL MOVE X R2 X0 Number of application program MOVE lt 600 0 MPY 0 0 lt 2 ASR lt 300 0 SUB APL_ADR R7 MOVE 0 0 EEPROM address x 600 300 BSET 15 R0 EEPROM accesses are with 15 1 DO APL_LEN LD_LA2 Load from ADR to 200 DO 3 LD LAL MOVE P RO A2 Read from EEPROM REP 8 ASR A LD LAI MOVE ALP R7 9 Write to DSP P memory LD_LA2 Splice the application and boot command tables together MOVE COM_TBL R7 _ Leave most of X memory alone DO 3210 LA4 16 commands 2 entries per command DO 3 LD_LA3 MOVE P RO A2 _ Read from EEPROM 8 ASR A LD LA3 MOVE AI X R7 Write to DSP X memory LD LA4 Transfer Y memory containing waveforms and readout parameters MOVE 087 Start at bottom of Y memory DO 4 200 32 APL LEN LD LA6 Update Y DSP memory DO 3 LD LAS MOVE P RO A2 Read from EEPROM REP 8 311 ASR A LD_LA5 MOVE A1 Y R7 Write to DSP Y memory LD LA6 JMP FINISH Return and send DON Reset Reboot RST RESET Reset peripherals MOVE lt Insure that its linear addres
101. OM_MOD X STATUS APPLICATION TST RCV JSR GET Geta command from the receiver stack lt START none test for timer and application Process the receiver entry is it in the command table CHK MOVE X R2 A Get the command buffer entry MOVE lt TBL RO command table starting address DO NUM COM END Loop over command table MOVE X RO X1 Getthe command table entry X RO RS Does receiver table entry NOT COM No keep looping ENDDO Yes restore the DO loop system registers Wait for the complete command and then jump to it TST END MOVE XxRI1 N1 A Get most recent SCI word MOVE lt 0 0 sIsit _ JNE lt 5 END No gt keep waiting JMP R5 Yes gt execute the command NOT MOVE R0 Increment the register past the table address END COM It s not in the command table send an error message ERROR MOVE X lt ERR X0 Send an error message ERR 336 JMP FINISH2 Construct a simple reply for the PCI board FINISH MOVE R2 Step over Carriage Return delimiter END EXP MOVE X lt DON X0 Send a DON as a reply FINISH2 MOVE X0 X R3 Put on the buffer to be transmitted Process transmitter buffer to see if anything needs to be sent PRC_XMT MOVE R4 A Address of processed transmitter contents MOVE R3 X0 Address of current transmitter contents Are they equal
102. P PRC XMT Start up the exposure timer and wait here until it is done EXPOSE MOVE X lt EXP_TIM A Enter exposure time into timer s MOVE lt _ target time CLR A Zero out elapsed time MOVE lt BSET 0 X TCSR Enable DSP timer COM JSR GET Check for incoming commands JNE lt CHK HDR Ifreceived process it normally CHK TIM JSET 0 X TCSR CHK_COM Wait for timer to end R7 Jump to the internal jump address Interrupt service routine for the SCI serial link to the PCI board SCI RCV MOVEC SR X lt SAVE SR Save Status Register MOVE 0 lt 5 RO Save RO 308 MOVE lt 5 Save BI MOVE X1 X lt SAVE Xl SaveXl MOVE X lt SCI ROO Get previous value of SCI RO MOVE lt 8 Get previous value of SCI BI MOVE X RO X1 Get the byte from the SCI OR XLB RO Addbyte into Bl postdecrement RO BTST 160 Test for the address being FFF3 last byte JCC MID BYT Not the last byte only restore registers END BYT MOVE BLX Rl _ Put the 24 bit word in the command buffer MOVE lt 5 5 0 Initialize RO most significant byte of SCI MOVE 0 1 Zero SCI for next SCI use MID BYT MOVE 0 lt 8 RO Save SCI value of SCI address pointer MOVE lt 8 Save 5 for next SCI use MOVEC lt 5 SR SR Restore Status Register MOVE lt RO RO Re
103. P TOKEN EXPECT 369 token not expected here BAD I2C 401 bad int to formatted string conversion BAD F2C 402 bad float to formatted string conversion BAD INTKEY 403 can t interpret keyword value as integer BAD LOGICALKEY 404 can t interpret keyword value as logical BAD_FLOATKEY 405 can t interpret keyword value as float BAD DOUBLEKET 406 can t interpret keyword value as double BAD 21 407 bad formatted string to int conversion BAD C2F 408 bad formatted string to float conversion BAD C2D 409 bad formatted string to double conversion BAD DATATYPE 410 illegal datatype code value BAD DECIM 411 bad number of decimal places specified NUM_OVERFLOW 412 overflow during datatype conversion DATA COMPRESSION ERR 413 error compressing image DATA_DECOMPRESSION_ERR 414 error uncompressing image BAD_DATE 420 error in date or time conversion PARSE SYNTAX ERR 431 Syntax error in parser expression PARSE BAD TYPE 432 expression did not evaluate to desired type PARSE LRG VECTOR 433 vector result too large to return in array PARSE NO OUTPUT 434 data parser failed not sent an out coluzn PARSE BAD COL 435 bad dats encounter while parsing column PARSE BAD OUTPUT 436 Output file not of proper type ANGLE 700 BIG 501 celestial angle too large for projection BAD 5 VAL 502 bad celestial coordinate or pixel value WCS ERROR 503 error in celestial coordinate calculation BAD WCS PROJ 504 unsupported type of celestial projection NG_WCS_KEY 505
104. Parallel Interface card This card is a PCI card and forms the nether end of the link with the IR Labs controller The hostruns custom software to drive the controller and the Rockwell TCM 1000C via the IR Labs controller 2 6 Details of System The electrical and mechanical features of the IR camera will be discussed in Chapters 3 and 4 of this thesis The structure of the host software running on the PC and the firmware running on the Motorola DSP56002 microprocessor will be described in detail in Chapters 6 and 7 29 Not used at the University of Calgary with the Rockwell TCM 1000C CHAPTER THREE IR CAMERA ELECTRONICS AND CABLING 35 The fault dear Brutus lies not in the stars but in ourselves that we are men Wm Shakespeare 37 CHAPTER 3 IR CAMERA ELECTRONICS AND CABLING 3 0 Introduction There are four major electronic subsystems in the IR camera These subsystems are the dewar electronics including the Rockwell TCM 1000C array and support electronics the RAO designed preamplifier and support electronics the IR Labs array controller and the personal computer that drives the camera The first three subsystems will be in this chapter and Spectral Instruments 1826 card in the computer will be discussed as well The balance of the computer wil be ignored except to note that it 1s an Intel Pentium system running under Microsoft Windows 98 3 1 Dewar Electronics The dewar electronics subsystem is
105. R 104 The loader also arranges for the kernel to load the first overlay from EPROM into on board memory Since the loader will be executed only once it is located in the overlay area Thus when the application program which is the first overlay is loaded it is loaded onto the loader This does not matter however as the loader has done its job and has passed control to the kernel 6 1 2 Kernel The kernel consists of a collection of service routines including the serial port routines the command interpreter the timer driver and various service routines The structure of the kernel is centred about a command table of fixed length When a command is received from the serial port it is compared against the command table If a match is found then a branch to the address associated with that command is performed If no match is found then an error message is returned to the host A block diagram of the kernel is shown overleaf as Figure 6 4 6 1 2 1 Communication Subsystem The communication subsystem is an interesting hybrid of interrupt driven tick tock and direct feed of the serial port The receive system is driven by a tick tock as described in Chapter 5 However the transmit system sends the message one byte at a time and 15 not 8 The IR Labs code has 24 slots for commands however this has been increased to 32 slots in the RAO code to allow additional functionality in the application programs 105 interrupt driven It
106. RR R 106 END OF FILE 107 READ ERROR 108 FILE NOT CLOSED 110 ARRAY TOO BIG 111 READONLY FILE 112 MEMORY ALLOCATION 113 BAD FILEPTR 114 NULL INPUT PTR 115 SEEK ERROR 116 BAD URL PREFIX 121 TOO MANY DRIVERS 122 DRIVER INIT FAILED 123 NO MATCHING DRIVER 124 URL PARSE ERROR 125 SHARED BADARG 151 SHARED NULPTR 192 SHARED TABFULL 153 Meaning OK no error used ffiimg to prepend a new primary array input and output files are the same tried to open too many FITS files at once could not open the named file could not create the named file error writing to FITS file tried to move past end of file error reading from FITS file could not close the file array dimensions exceed internal limit Cannot write to readonly file Could not allocate memory invalid fitsfile pointer NULL input pointer to routine error seeking position in file invalid URL prefir on file name tried to register too many IO drivers driver initialization failed matching driver is not registered failed to parse input file URL bad argument in shared memory driver null pointer passed as an argument no more free shared memory handles SHARED NOTINIT SHARED IPCERR SHARED SHARED AGAIN SHARED _NOFILE SHARED NORESIZE HEADER NOT EMPTY KEY NO EXIST KEY _OUT_BOUNDS VALUE UNDEFINED NO QUOTE BAD KEYCHAR BAD QRDER NOT POS INT END BAD BITPIX BAD NAXIS BAD NAXES BAD PCOUNT BAD GCOUNT BAD TFIELDS NEG WI
107. Systems 256 x 256 SWIR QE Spectrum Quantum Elficiency 96 EN 800 1050 1300 1550 1800 2050 2300 2550 Wavelength nm Figure 1 5 PICNIC Spectral Response Curve 18 From Rockwell RSC website http www rsc rockwell com imaging picnic 256qe html SPECTRAL RESPONSE Figure 1 6 Relative Response as a Function of Wavelength for TCM 1000C IR Array From Rockwell engineering report SC87004 FR Reference 53 CHAPTER TWO GENERAL CHARACTERISTICS OF DATA ACQUISITION SYSTEMS Set the controls for the heart of the sun Roger Waters 18 CHAPTER 2 GENERAL CHARACTERISTICS OF DATA ACQUISITION SYSTEMS 2 0 Introduction In general terms a data acquisition system can be considered to be transducer linked to a recording device The transducer can be as simple as a voltmeter and the recording device can be as simple as a person with a timer pencil and paper It is not the business of the data acquisition system to interpret the data simply to acquire and record Good examples of basic data acquisition systems include chart recorders recording meters and strip chart recorders More complex data acquisition systems can automate the data recording function releasing the person who would otherwise be engaged in recording the data displayed by the transducer An advanced data acquisition system can be equipped not only with local storage capability but with remote reporting capability using a variety of wired and wireless tr
108. TB DC TB YDELAY DC DELAY OFFSET DC OFF MASK0A GAIN DC GAIN MASK0A Table of offset values begins at Y 10 well maybe not DAC settings for the video offsets DC END BIASES DC BIASES 1 DC BIASES OFF 0 DC 0c0000 GAIN 0 DC 003000 END BIASES DC 0 TB DACS Input offset board 20 channel A input gain board 0 channel A place holder DC TB DACS END TB DACS 1 DC TB 8 0 14 CLK HI Pin l CLK DC TB lt lt 8 1 lt lt 14 CLK_LO DC TB 8 Q 14 CLK HI Pin 2 YSYN DC TB 8 3 14 CLK LO DC lt lt 8 4 lt lt 14 HI Pin 3 FRAME DC TB lt lt 8 5 lt lt 14 CLK_LO DC TB 8 6 14 CLK HI Pin 4 SPARE DC TB lt lt 8 7 lt lt 14 CLK_LO DC TB s 8 k 8 14 SHUT HI Pin 5 CLOSE DC lt lt 8 9 lt lt 14 5 OFF DC lt lt 8 10 lt lt 14 5 LO Pin 6 CLOSE HOLD DC TB 8 11 14 SHUT OFF DC TB 8 12 14 SHUT HI Pin 7 OPEN DC TB 8 13 14 SHUT OFF DC TB lt lt 8 14 lt lt 14 SHUT_LO Pin 8 OPEN HOLD DC lt lt 8 15 lt lt 14 5 OFF TB DACS END DC 0 end DAC table UC table for 1000 This table assumes 128 x 128 readout single channel readout frame line asserted for first 64 lines then deasserted for last 64 reads Define switch state bits for the clocks CLK 0 defines clock as line 0 on clock generator board CLK H EQU 1 YSYN EQU 50
109. TPIX Third keyword not NAXIS Couldn t find all the NAXISn keyworda HDU doesn t start with XTENSION keyword the CHDU is not an ASCII table extension the CHDU is not binary table extension couldn t find PCOUNT keyword couldn t find GCOUNT keyword couldn t find TFIELDS keyword couldn t find TBCOLn keyvord couldn t find TFORMn keyword the CHDU is not an IMAGE extension TBCOLn keyvord value lt 0 or gt rowlength the CHDU is not a table column 18 too wide to fit in table more than 1 column name matches template sum of column widths not NAXISI unrecognizable FITS extension type unknown record ist keyword not SIMPLE or ITENSION END JUNK BAD HEADER BAD DATA FILL BAD _TFORM BAD_TFORM_DTYPE BAD TDIM HDU NUM BAD COL NUM NEG FILE POS NEG BYTES BAD ROW NUM BAD ELEM NUM NOT ASCTI COL NOT LOGICAL COL 253 254 255 261 262 283 301 302 304 306 307 308 309 310 BAD ATABLE FORMAT 311 BAD BTABLE FORMAT 312 NO NULL NOT VARI BAD DIMEN BAD PIX NUM ZERO SCALE NEG AXIS NOT GROUP TABLE 314 317 320 321 322 323 HDU ALREADY MEMBER MEMBER NOT _ FOUND GROUP _NOT_FOUND BAD GROUP ID TOO MANY HDUS TRACKED HDU ALREADY TRACKED BAD_OPTION IDENTICAL POINTERS BAD_GROUP_ATTACH BAD_GROUP_DETACH NO MEMORY READ ERR NGP EMPTY CURLINE NGP UNREAD QUEUE FULL INC NESTING 373 END keyword is not blank Hea
110. YDELAY YI OR YLBI insert the delay MOVE Bl X WRSS write to port JSR SHORT DELAY wait for shutter to swing BCLR OPEN_BIT Y lt SH_ MASK clear the open bit BSET HOLD BIT Y lt SH_MASK setthe hold open bit ORBLOCK lots of routines use this MOVE lt 5 MASK BI logic need to trim some fat MOVE Y lt YTB Y1 OR YLBI insert the board address MOVE Y lt YDELAY Y1 OR insert the delay MOVE B1 X WRSS write to port RTS and exit close the shutter UC CSH JSR UCCSHS this is made subroutine so it can JMP FINISH be used in the exposure routine 5 close shutter subroutine UCCSHS BCLR OPEN_BIT Y lt SH MASK clear the OPEN bit BCLR OPEN HOLD BIT Y lt SH MASK clear the hold open bit CLOSE_BIT Y lt SH MASK set the close bit MOVE Y lt SH MASK load the mask MOVE Y lt YTB Y1 OR Y1 Bl insert the board address MOVE Y lt YDELAY Y1 OR YLBl insert the delay MOVE BI X WRSS write to port 350 JSR SHORT DELAY wait for shutter to swing BCLR ZCLOSE lt 8 MASK clear the close bit BSET CLOSE_HOLD_BIT Y lt SH_MASK __ set the hold close bit JMP lt ORBLOCK i MOVE lt 5 5 1 Y lt YTB Y1 OR insert the board address i MOVE Y YDELAY YI OR YLBI insert the delay MOVE BLX WRSS write to port RTS and exit Do a simple read of the array for diagnostic purposes will result in tran
111. YNC H_LINE H_FSYNC L_RST DELAY DCBD2 H READ L PIXEL H LSYNC L LINE H FSYNC L RST 900000 327 DC BD2 H READ H PIXEL H LSYNC L OLINE H FSYNCHL RST 7C0000 READ EVEN ROW PIXELS DC SHIFT EVEN ROW PIXELS READ EVEN ROW PIXELS 2 DC 2 READ H PIXEL H LSYNC L LINE H FSYNC L RST DELAY DC VP DLY sample DC 010033 Start A D conversion DC SXMIT Series transmit four pixels data DC 8140033 Delay DC BD2 H READ L PIXEL H LSYNC L FSYNC L RST DELAY DC VP A D sample DC 8010033 Start A D conversion DC SXMIT Series transmit four pixels data SHIFT EVEN ROW PIXELS DC SXMIT EIGHT PIXELS SHIFT EVEN ROW PIXELS 2 DC BD24H PIXEL H LSYNC L_LINE H FSYNC L RST DELAY DC VP DLY A D sample DC 010033 Start A D conversion DC 8160033 Padding DC BD2 H READ L PIXEL H LSYNC L LINE H FSYNC L RST DELAY DC VP DLY A D sample DC 010033 Start A D conversion DC 000033 Padding SXMIT EIGHT PIXELS 328 DCEND TBL SXMIT EIGHT PIXELS 2 DC DELA Y 000033 DC VP A D sample DC 000033 Start A D conversion DC SXMIT Series transmit four pixels data DC DELAY 000033 DC VP A D sample DC 000033 Start A D conversion DC SXMIT Series transmit four pixels data END TBL End of waveform tables Check for overflow in the EEPROM case IF DL IF CVS N LCV L gt 2 APL_NUM 1 100 3 WARN EEPROM overflow Make sure next application ENDIF will not b
112. _ ASSEMBLY im Luc 2 BLOCKS Figure 4 5 Exploded View of IR Array Assembly Note that the top pillow blocks are not the same size as the bottom pillow blocks and must not be confused during assembly The light shield has been notched to clear the shutter solenoid plungers when the assembly is mounted on the cold plate and care must be taken to ensure that the IR array is parallel to the filter wheel assembly and perpendicular to the light path The chip carrier will mount only one way in the electronics assembly but the electronics assembly will mount in two ways onto the mount to the cold plate If the electronics assembly is oriented such that the connector points to the left when mounted to 63 the mount to the cold plate is as shown in Figure 4 5 a shorter wiring path to the out of dewar connector will result The IR array is not shown in this photograph Figure 4 6 below shows the assembled IR array assembly The scale shown in the photograph is in inches and the coin shown for size is a Canadian two dollar coin LIGHT SHIELD NOTE CLEARANCE NOTCHES Figure 4 6 Assembled IR Array Assembly 4 4 Inner Assembly The top assembly of the IR camera consists of mounting the filter wheel assembly onto the cold plate followed by mounting the inner and outer shells followed by mounting the drive train for the filter wheel The IR array assembly may then be mounted and
113. _filter_number 1 SetCtrl Val block gt filtermenu FILTER home found led TRUE invalue amp 0 0007 gt filter number if the active filter number has changed block gt active_filter_number invalue amp 0x000f get the new active filter number ClearFilterIndicators block clear the lights SetActiveFilterIndicator block show the new filter number light j if block active filter number block active filter target If we have found the target block gt filter_moving FALSE turn off the logic 208 SetCtrlAttribute block gt imagemenu IMAGE_bump filter ATTR CMD BUTTON COLOR VAL LT GRAY make sure that the button in the image menu is reset DeassertFilterPower block and pass this on to the hardware immediately return 0 service routines for filter wheel handler void DeassertFilterPower DATABLOCK block unsigned short outvalue outvalue block gt active_filter_target outvalue outvalue amp 0 0007 OutPort block gt port_base PORT A OFFSET outvalue return j void AssertFilterPower DATABLOCK block unsigned short outvalue outvalue block active filter target outvalue outvalue amp 0x0007 outvalue outvalue 0x0008 OutPort block gt port_base outvalue return void ClearFilterIndicators DATABLOCK block first clear the set in the fil
114. able merely calls a subroutine and it is the subroutine which does the work The table was set up this way because it makes the subroutine available for inclusion in other tasks specifically the RRR task described above The task uses a mask which can be logical OR ed with control words that are put out by array read routines and sets bits in this 117 mask to force the solenoids to move the shutter and to hold the shutter The task works by setting and clearing the appropriate bits in the mask and then loading this mask to the output port This task will result in hardware movement and will return a DON to the host program 6 1 3 16 CSH Close Shutter The Open Shutter task is broken into two parts The task started by the entry in the command table merely calls a subroutine and it is the subroutine which does the work This routine operates in a manner similar to that of the Open Shutter routine described above This task will result in hardware movement and will return a DON to the host program 18 There are two solenoids one for open shutter and one for close shutter Because the camera can be at any orientation it is not sufficient that the shutter be moved to one position and then the solenoid be depowered A small current through the solenoid is required as a holding current The solenoid mask must reflect all this CHAPTER SEVEN HOST PROGRAM 118 There are three kinds of lies lies damn lies an
115. ackplane is not VME as all pins have been redefined to produce a custom bus The chassis includes power conditioning however the power supply is an outboard assembly Schematics are available from IR Labs directly or from their website 47 In theory the controller can drive up to 16 2 channel analog input boards making total of 32 channels of input from one or more arrays Thus capability is useful when driving cameras built by making a mosaic of IR or optical arrays There are four types of boards available from IR Labs for this controller These are timing board analog input board clock generator board and utility board The controller to hand uses the first three but is not equipped with a utility board 3 3 1 Timing Board The timing board has the microprocessor RAM ROM some glue logic and the communication interface with the host There can be only one timing board in a controller backplane The timing board controls the system by communicating with the other boards in the system via the backplane The communication interface with the host is designed to mate to a Spectral Instrument Model 1826 PCI card in the host It has two channels The first channel is an RS 423 bidirectional serial link running at 9600 baud and this channel is used to transfer control information between the controller and the host The second channel is a 16 bit wide 18 Motorola DSP56002 running at 50 2 19 The timing board describe
116. advent of complex programmable logic devices CPLDs it became possible to purchase a generic high density logic device include it in a design and then program it in situ after the design was built This technology obviated the need for ASICs in all but the most specialized designs while still allowing the advantages inherent in cell based complex logic The problem with a CPLD however is that it can be programmed only once While the fact that it is programmable at all allows great flexibility in the utilization of the device the fact that it is programmable only once means that the structure impressed on the CPLD by the programming cannot be updated There are two ways out of this dilemma The first way is to use flash memory instead of an OTP configuration Then the device can be reprogrammed although not usually in the field However the configuration data 1s non volatile and is available on power up 15 E g a 22V10 or 16L8 16 good example of this is a XILINX 5200 series CPLD or one of the ATMEL flash memory based offerings 17 One Time Program 27 The second way is to employ a static RAM SRAM based cell structure in the CPLD This results in a field programmable gate array FPGA The disadvantages to this are that since the configuration is in SRAM it is volatile and is not available at power up and also that at least one more component must be included in the design to hold the configuration data and to mak
117. al writes to the PALs and DACs by 8 microsec 355 PAL DLY DO 200 DLY Wait 8 usec for serial data transmission NOP DLY NOP RTS Delay between power control board instructions DLY PWR DO 40001 PDLY NOP L PDLY RTS Set video offsets and DC bias supply voltages This may be dead code for the moment but it is left in so that if we have more than one ADC active the code can be used Leave this clip in place 010719 AJ SET BIAS NUM X EN SLX PCC Enable the SSI JSR PAL DLY Wait for the SSI port to be enabled MOVE X R2 A First argument is board number 0 to 15 REP 20 LSL A 3 0 E MOVE 2 second argument is DAC number 0 to 7 5 14 LSL A 2 0 BSET 19 1 Set bits meaning DAC BSET 18 1 MOVE A X0 MOVE X R2 A Third argument is voltage value MOVE 000 0 Mask off just 12 bits to be sure 3 AND 0 OR X0 A MOVEP A X SSITX Write the number to the DAC MOVEP X DISA SLX PCC Disable the SSI 5 JMP FINISH endit Power off PWR OFF 356 MOVEP SLX PCC Enable the SSI BCLR CDAC X lt LATCH Clear all DACs BCLR ENCK X lt LATCH Disable DAC output switches MOVEP X LATCH Y WRLATCH BSET LVEN X PBD LVEN HVEN 1 gt Power reset BSET HVEN X PBD BSET HVEN X PCD timPC value MOD X STATUS Command execution mode MOVEP X DIS
118. alifornia was fabricated this way In this case the region of interest in the spectrum was in the MeV range for an instrument to detect gamma ray bursters and the sensitive element was a material appropriate for this portion of the spectrum support portion of the device was ASIC fabricated as an NMOS wafer and the sensitive element was mated to the ASIC using indium bump There are several vendors which will accept academic and or prototype designs and run them through a low volume silicon foundry An example is the 0 35 micron MOSIS process available to and in use by the University of Alberta Microelectronics Centre among others combined with somewhat lower yields for a more complex process results in detectors which are very expensive when compared to the cost of the mass market CCD However the CCD is itself under pressure from CMOS image sensors While these devices have somewhat poorer performance than CCDs they can be fabricated using normal CMOS technology which means that any silicon foundry can make them and quite cheaply Further since they are CMOS their power consumption is much lower than that of a CCD Finally they can be designed so that each pixel can be accessed separately rather than through a shift register setup which makes for ease of design of the support electronics They are in the classic sense cheaper than anything better and good enough to do the job for most applications 2 3 1 Operating Consid
119. ame of the config file and open it GetCtrl Val block gt filemenu FILEMENU config file cs workstr config file fopen cs workstr w now dump the lot GetCtrlVal block gt setupmenu SETUP port base amp usi work fprintf fsp config file FILTERPORT 9odW usi work GetCtrl Val block gt setupmenu SETUP origin cs workstr fprintffsp config file ORIGIN s n cs_workstr GetCtrlVal block gt setupmenu SETUP telescop cs workstr 6 config file TELESCOP s n cs_workstr GetCtrl Val block gt setupmenu SETUP _instrume cs_workstr fprintf fsp_config_file INSTRUME s n cs_workstr GetCtrl Val block gt setupmenu SETUP observer cs workstr fprintf fsp config file OBSERVER oeswn cs workstr GetCtrl Val block gt setupmenu SETUP comment cs workstr fprintffsp config file 9 5 5 workstr GetCtrl Val block gt setupmenu SETUP timesys cs workstr fprintf fsp config file TIMESYS 96sW cs workstr GetCtrIVal block gt setupmenu SETUP equinox cs workstr fprintffsp config file EQUINOX s n cs_workstr 287 GetCtrlVal block setupmenu SETUP tpfile cs workstr fprintf fsp_config_file TPFILE s n cs_worksir GetCtrlVal block gt imagemenu IMAGE utc offset amp i work fprintf fsp config file UTC OFFSET dw work GetCtrlVal block gt imagemenu IMAGE 5 workstr config file RA s n cs_workstr GetCtrl Val block gt imagemenu I
120. ame2point SetCtrlAttribute block gt mainmenu MAIN led ATTR OFF COLOR VAL BLUE break j break j default default trap should never happen but we ll ignore that for the moment 243 ecode ERROR 1 SetCtrl Val block gt mainmenu MAIN_ overrun TRUE SetCtrlAttribute block gt mainmenu MAIN overrun ATTR LABEL VISIBLE TRUE return 0 FR END MESSAGE CRACKER FOR IMAGE MENU Message cracker for SETUP menu int setup cracker int event DATABLOCK block int source int ecode int work note all this can do is return It loads strings and stuff for the FITS files but the only control is the return 7 switch event case SETUP return setup return HidePanel block gt setupmenu return 0 244 break case SETUP init setup init filter port number OutPort block port base PORT D OFFSET PORT CONTROL MASK break default default trap should never happen but we ll ignore that for the moment if m ecode ERROR SetCtrlVal block mainmenu MAIN overrun TRUE SetCtrlAttribute block mainmenu MATN overun ATTR LABEL VISIBLE TRUEY return 0 END MESSAGE CRACKER FOR SETUP MENU MESSAGE CRACKER FOR DEBUG MENU
121. ansmission technologies However to perform remote reporting effectively requires that the data acquisition system have some degree of local intelligence in the form of a microprocessor or microcontroller and to equip a data acquisition system with such a processor opens up a whole new level of capability not possible with simple recorders 2 1 Requirements for an Advanced Data Acquisition System Anadvanced data acquisition system will have one or more of the following features communication to a host remote operation capability process control capability stored SENSOR PACKAGE ID ROCESSOR CONTROL COMM OUTPUT SYSTEM REMOTE CNT PROCESS Figure 2 1 Block Diagram Of Data Acquisition System program update capability and hardware reconfigurability It is not necessary for a data acquisition system to be powered from a mains supply as advances in CMOS technology have made available devices with very low power consumption requirements Data acquisition systems constructed with this technology can be battery powered and can be combined with wireless reporting capability to produce an instrumentation package that can be placed in a remote location Often such packages especially if mass produced or if adapted from mass produced packages can be produced cheaply enough that they can be used in situations where recovery of the package is not expected to occur For examp
122. are circular modulo 32 MOVE 2 MOVE 2 3 MOVE M3 M4 MOVE MLNI DO 322ERO X Zero all buffers MOVE A X R1 MOVE A X R3 ZERO_X Disable analog board functions MOVEP X LATCH Y WRLATCH Call Load Application 1 to get video mode loaded on boot as the default MOVE MOVE A X R1 MOVE lt MOVE A X R1 MOVE lt MOVE A X R1 Set interrupt priority levels MOVEP 53 038000 X IPR Write to interrupt priority register Exposure timer 2 1 PCI board link Host IRQA IRQB all disabled ANDI Unmask all interrupt levels Go execute the program initialization is over JMP lt CHK HDR Process the commands on the stack Check for program space overflow IF GCVS N SI1FF 335 WARN Internal P memory overflow Don t overflow DSP P space ENDIF End of initialization code Put some of the code in the interrupt vector area that is not used from 18 to 3B PGM STR then continue on at 3E CON ORG P PGM_STR P PGM_STR ROM_OFF Program start Test serial receiver contents START JSET BIT XTCSR CHK If timing down go elsewhere the following sucks up a few clock cycles maybe but aside from that does no harm What it DOES do is to allow the application program a chance to grab the processor before the receiver gets it So leave it in for use some other time JSET C
123. are counterpart and where conservation of program space is more important than raw execution speed RAM Random Access Memory RAO Rothney Astrophysical Observatory The observatory operated by the Physics and Astronomy Department of the University of Calgary RCA RISC ROM RTD RTI Radio Corporation of America Reduced Instruction Set Computer microprocessor optimized for speed of execution and or minimum die size These devices have small non orthogonal instruction sets but they execute at high speed Read Mostly Memory See Flash Memory Read Only Memory A type of temperature sensor Return from interrupt Since an interrupt is an asynchronous event The return command must perform a complete context restore Usually this consists of restoring selected registers before reloading the program counter with the address that the processor was executing from when the interrupt occurred Scratchpad memory SCSI A small amount of RAM usually located on chip in a microcontroller Since it is on chip access times are short Small Computer System Interface A computer interconnect standard SDRAM Synchronous DRAM A type of dynamic ram in which the refresh has been synchronized with the access to increase the speed of the part These parts have become competitive with static RAM Software Package set of software working for a specific purpose xxi SRAM See Static Ram Static RAM Random access memory
124. as simple jump addresses so bootrom program 1s sure to work until the application program can be loaded APPLICATION JMP TST Defined so compiler has APPLICATION address Initialization of the DSP system register serial link interrupts This is executed once on DSP boot from ROM and is not incorporated into any download code since its not needed INIT MOVEC 0002 OMR Operating Mode Register Normal Expanded set after reset by hardware ORI 03 MR Temporarily mask interrupts MOVEP 0 X PBC Set Port B to general purpose VO MOVEP 3FFF X PBDDR Set PBO to PB14 to outputs AUX4 TXD EN RXD STATUSO to STATUS3 AUXI LVEN AUX3 FRAME LINE AUX2 PWRST is an input gt 020D X PBD RXD EN TXD EN 1 for enabling PCI communication HO 1 to communicate with analog boards LVEN 1 others 0 MOVEP 6002 X CRA SSI programming no prescaling 24 bits word on demand communications no prescale 3 12 MHz serial clock rate MOVEP 3930 X CRB SSI programming OFO OF don t apply SCO SCI SC2 are inputs SCK is output 333 shift MSB first rcv and xmt asynchronous wrt each other gated clock bit frame sync network mode to get on demand RCV and its interrupts enabled TX enabled TX interrrupts disabled gt Utility board SSI MOVEP 0B02 X SCR SCI programming 10 bit asynchronous protocol 1 start 8 data no parity lstop LSB b
125. ation 1 to communicate with analog boards LVEN 1 others 0 x gt 2 6002 X CRA SSI programming no prescaling 24 bits word on demand communications no prescale 3 12 MHz serial clock rate 3930 X CRB SSI programming 0 OF1 don t apply SCO SCI SC2 are inputs SCK is output shift MSB first rcv and xmt asynchronous wrt each other gated clock bit frame sync network mode to get on demand RCV and its interrupts enabled TX enabled TX interrrupts disabled gt Utility board SSI 0B02 X SCR SCI programming 10 bit asynchronous 304 protocol 1 start 8 data no parity 1810 LSB before MSB enable receiver and its interrupts transmitter interrupts disabled MOVEP 4 0050 X SCCR SCI clock asynchronous data rate 9600 kbits sec internal clock 50MHz 64 81 9645 baud 0013 X PCC Port C implemented as enabling the SCI pins RXD and TXD and HVEN The SSI will beenabled only as needed MOVEP 0013 X PCD Port C Data Register Set all lines high if configured as outputs MOVEP 8 007F X PCDDR _ Port C Data Direction register Set all lines to outputs when not used for SSI or SCI service except SRD and STD that are pulled low by 500 ohms MOVEP 0181 X BCR Wait states X Y P and Y ext MOVEP gt 2 X TCSR Enable timer interrupts MOVEP 61A8 X TCR Divide so timer interrupts every millisecond
126. ayPanel handle then open but do not display the rest of the menu system block gt debugmenu LoadPanel block gt mainmenu debugmenu uir DEBUG block gt filemenu LoadPanel block gt mainmenu filemenu uir FILEMENU block gt errormenu LoadPanel block gt mainmenu errmenu uir ERRMSG block gt imagemenu LoadPanel block gt mainmenu imagemenu uir IMAGE block gt setupmenu LoadPanel block gt mainmenu setupmenu uir SETUP block gt filtermenu LoadPanel block gt mainmenu filtermenu FILTER block gt aboutmenu LoadPanel block gt mainmenu about uir ABOUT set up and clear canvases in imagemenu CanvasDefaultPen block gt imagemenu IMAGE framel CanvasDefaultPen block gt imagemenu IMAGE frame2 block gt framel_active TRUE block gt frame2_active FALSE SetCtrlAttribute block gt imagemenu IMAGE_framel_led ATTR_ON_COLOR VAL_ GR 1 led ATTR_OFF COLOR VAL CURVA 1_led TRUE SetCtrl Val block gt imagemenu IMAGE frame2 led FALSE 254 set up the interval timers SetCtrlAttribute block mainmenu MAIN timeout timer ATTR INTERVAL TIMEOU T SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED FALSE SetCtrlAttribute block mainmenu MAIN light timer ATTR INTERVAL LIGHT E SetCtrlAttribute block gt mainmenu MAIN light timer ATTR ENABLED FALSE SetCtrlAttribute block mainmen
127. ays it is a pilot project in that it demonstrates that the University of Calgary has the capability to design and deploy such instruments and will serve as the springboard for the design and construction of infrared cameras with extended capabilities including higher resolution extended sensitivity range and automated modes of operation Due to the fact that this thesis is more of an engineering paper describing instrument than a scientific paper it is divided into two major sections These two sections are about the hardware design chapters 2 3 and 4 and the software design chapters 5 6 and 7 The hardware section consists of one chapter discussing general principles of data acquisition systems followed by a chapter on the mechanical design of the IR camera and by a chapter on the electronics in the camera The software section consists of one chapter discussing general principles of real time operating systems followed by one chapter describing the real time system running on the DSP in the IR Labs controller and one chapter describing on a high level the host program running on the PC class computer and driving the camera The 1 8 metre telescope at the RAO is equipped with an IR detector capable of quite good photometric measurements but only of point objects Extended bodies cannot be investigated in detail with this detector for several reasons including that as a point detector it was never designed for the investigation
128. bj File Project Symbols File Project Symbols Obj File DLL Debugging Support External Process Path 128 199 D 1 4 Listing of host c SVID C This is the main routine for the IRL Spectral Interface display program That is to say START 2 The main camera program Rewritten at the University of Calgary by Anna Johnson to compile under a National Instruments CVI ANSI C compiler under Windows 9x and to control a 128 by 128 array at the Rothney Astrophysical Observatory Date of rewrite 23 March 2001 NOTE Some modules specifically the 16 bit PCI routines were rewritten using in line assembler and were compiled using Microsoft Visual Version 5 0 Various Microsoft libraries were also referenced so if you work with this code you will need both compilers The GUIs are generated using the CVI compiler NOTE A 32 bit VXD was obtained from Spectral Instruments This driver requires a DLL and VXD must be in CWINDOWS SYSTEM as it is dynamically i id loaded If you mess with this driver be aware that CVT requires the old style API calls and cannot use the new non compatible Microsoft calls However there does exist a facility in CVI for blowing off a new LIB file if you have the DLL and the include file See the
129. block gt mainmenu MAIN_ abort ATTR_DIMMED TRUE SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_ENABLED FALSE SetCtrlAttribute block gt mainmenu MAIN dma led ATTR OFF COLOR VAL block gt incount 0 block gt outcount 0 break default default trap error_message block FEATURE NOT IMPLEMENTED THIS VERSION break takes care of stubs not yet implemented if m ecode ERROR 1 SetCtrl Val block gt mainmenu MAIN_overrun TRUE SetCtrlAttribute block gt mainmenu MAIN_overrun ATTR_LABEL VISIBLE TRUE return 0 j Mt E E E E EE EEEE EEEE EEEE END MESSAGE CRACKER FOR MAIN MENU HLLLLLLLLLL A 230 BRR ER k Message cracker for FILE menu ef af a of int file cracker int event DATABLOCK block int source int ecode int work switch event case FILEMENU return FILE return i HidePanel block gt filemenu return 0 break case FILEMENU_wnite_config FILE write config file GetTextBoxLineLength block gt filemenu FILEMENU_config_file 0 amp m_ecode if m_ecode lt 0 error message block WRITE CONFIG INVALID FILE NAME return 0 j m ecode GetTextBoxLine block gt filemenu FILEMENU config file 0 block gt instring m ecode config write block break case FILEMENU read config FILE read config file GetTextBo
130. block gt outarm FALSE strepy block gt outbuffer RST block outbuffer 5 CR block gt outarm TRUE 274 block gt outcount 6 block gt outptr block gt outbuffer SetCtrlAttribute block mainmenu MAIN timeout_timer ATTR_INTER YAL SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE retum PASSED return ERROR j int send pon DATABLOCK block if block gt outarm FALSE strepy block gt outbuffer PON block gt outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer SetCtrlAttribute block mainmenu MATN timeout timer INTERVAL double 1 SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED return ERROR int send block if block gt outarm FALSE strepy block gt outbuffer POF block gt outbuffer 5 CR block outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer 275 SetCtrlAttribute block mainmenu MAIN timeout timer A TTR INTERVAL douhle SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED return ERROR int send con DATABLOCK block if block gt outarm FALSE strcpy block gt outbuffer CON block gt outbuffer 5S CR block gt outarm TRUE block gt outcount 6 block gt outptr block
131. break 4 case 5 case 6 i if day 31 month day 1 j if day 0 month 3 day 31 break if day 32 month 1 if day 0 month 4 day 30 break if day 31 month day 1 if day 0 month 5 day 31 break case 7 8 case 9 if day 32 month day 1 if day 0 month 6 day 30 break if day 32 month day 1 if day 0 7 day 31 break if day 31 month 1 1 0 month 8 day 31 break case 10 215 216 if day 32 month day 1 j if day 0 month 9 day 30 break case 11 31 month day 1 if day 0 month 10 day 31 break case 12 if day 32 month 1 day 1 year if day 0 month 11 day 30 j break so now we 217 have the corrected calendar sprintf outbuffer YR 96d MO d DY 96d year month day this is the display SetCtrl Val block gt mainmenu MAIN_utc_date outbuffer sprintf outbuffer HOUR 2d MIN 2d SEC 2d hours minutes seconds SetCtrl Val block gt mainmenu MAIN_utc_time outbuffer sprintf block gt timehack 04d 02d 02dT 02d 02d 02d year mo
132. celestial coordinate keywords not found APPROX WCS KEY 506 approximate vcs keyword values were returned 37 Postlude Ultima facta est Gloria in excelsis Deo
133. ck run the DMA transfer routine run utc clock block get the system date and time and display the clock run filterwheel block run the filter wheel control routine if GetUserEvent 0 amp source amp inentl TRUE Switch source i case MAIN SOURCE m ecode main cracker inentl block break case DEBUG SOURCE m ecode debug_cracker incntl block break case FILE SOURCE m ecode file cracker incntl block break case ERROR SOURCE m ecode error cracker incntl block break case IMAGE SOURCE m ecode image cracker incntl block break j case SETUP SOURCE m ecode setup cracker incntl block 205 break j case FILTER SOURCE m ecode filter cracker incntl block break j case ABOUT SOURCE m ecode about cracker incntl block break default error message block FATAL ERROR BAD SELECT IN MAIN SWITCH break ebbe telo k END BACKGROUND LOOP if m ecode EXIT return printf n ABEND OCCURRED ERROR CODE IS d m_ecode printf n WINDOW CODE IS d CONTROL CODE IS 96d 1 return AEH AH THIS IS THE END OF THE MAIN ROUTINE 206 See do pom mob o E
134. ck gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE retum PASSED retum ERROR j int send_firmware DATABLOCK block unsigned int address int value int memsel int work 269 if block gt outarm FALSE block return expected TRUE block gt return_ptr menu block gt debugmenu block gt return_ptr item DEBUG firmware code block gt return_ptr addr amp value strepy block gt outbuffer RDM block gt outbuffer 3 0x10 reads from program memory only block gt outbuffer 4 0x00 reads from fixed address block gt outbuffer 5 0x07 block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED retum ERROR int send tst DATABLOCK block if block gt outarm FALSE strcpy block gt outbuffer TST block gt outbuffer 5 block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer 270 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double l SetCtrlAt
135. count register TIM BIT EQU 0 Timer status bit Camera operational mode bit definitions COM MOD EQU 0 Clear if just waiting form commands to interpret RST MOD EQU I Set to continuously reset array VIDI MODEQU 2 Set if in video mode 1 VID2 MODEQU 3 Set if in video mode 2 302 After RESET jump to initialization code ORG ERST ISR P RST ISR ROM OFF JMP INIT Initialize DSP after hardware reset NOP The SCI interrupts when it receives data from the PCI board ORG 5 5 ISR ROM OFF JSR SCI RCV Jump to long interrupt service routine NOP The SCI interrupts to here when there is an error ORG 5 5 ERR ROM OFF JSR CLR SCI NOP DSP Timer interrupt for exposure time control ORG P TIM_ISR P TIM_ISR ROM_OFF JSR TIMER Long interrupt service routine NOP Put the ID words for this version of the ROM code It is placed at the address of the SWI software interrupt which we never use ORG ID P ROM ID ROM OFF DC 010101 Institution University of Calgary Location RAO Instrument IR Camera DC 8030002 Version 2 30 board 2 timing obe she sje ok obe EE EEEE EE ke EEE EEEE E EEE EEEE EEE EEEE E E E E EE EE E E E E ES Permanent address register assignments R1 Address of current contents of PCI board receiver R2 Address of processed contents of PCI board receiver 7 R3 Adre
136. d in this document is a Rev 3C timing board with wired communication with the host When dealing with this system it is important to make sure the revision level of the documentation is the same as the revision level for the hardware and to be aware of various undocumented features of the hardware as received by the RAO from IR Labs the system they supplied was a design prototype 48 parallel channel which on the controller side feeds directly from the analog input cards under the control of a PLD and on the host side feeds into a DMA device and memory Both channels use differential line drivers and receivers The physical format for the cable between the Spectral Instruments 1826 card and the IR Labs controller is that of a SCSI 3 connector but here as in the case of the VME bus all pins have been redefined for the purpose There are two types of timing board available from IR Labs The first type uses the SCSI 3 connector as described above and is the type used in the camera system described in this report The second type uses a fibre optic link between the host and the controller There is only the one interface card available for the host if the SCSI 3 format 1s used which requires that the host have a PCI backplane However for the fibre optic link there are several interface cards for several types of hosts VME SBUS PCT allowing a wide range of machines to serve as the host There are some electrical advantages to be derived f
137. d statistics Benjamin Disraeli 1874 119 120 7 HOST PROGRAM 7 0 Introduction The host program is a control program written in ANSI C to run under Microsoft Windows 9 x or better There are roughly 45 files associated with the source code including test images GUI files DLLs libraries include files source code files and ancillary items The purpose of the host program is to provide a user interface for the operation of the infra red camera to provide the capability of controlling the filter wheel assembly within the camera and to provide image storage capability with FITS format files The host program communicates with the IR Labs array controller via a proprietary channel utilizing a PCI card A development feature white rat has been deliberately left in the release code to facilitate modification ofthe host program as required The host program is dependent upon a number of external libraries and packages These libraries and packages will be discussed in this chapter The source code for the host program is included in this report as Appendix D 7 1 Program Structure The host program was wtitten using a National Instruments compiler and GUI tools and utilizes libraries unique to this compiler family The GUI tools are capable of See Section 7 5 121 instantiating callback function capability but they also incorporate a function to interrogate the user interface outside of a callback There are
138. d with such a card 3 4 Spectral Instruments Model 1826 PCI Card The Spectral Instruments Model 1826 card is a PCI card designed to facilitate block transfer of 16 bit words over a differential pair parallel interface The card has DMA capability and can write or less commonly read a specified number of words to or from a specified location in memory 27 Not used in the application described herein The bias voltages are made with the RAO designed package 52 The card also has a second low speed serial channel consisting of RS 423 interface and an on board UART The UART is programmable for a variety of speeds and formats but the standard when dealing with IR Labs equipment is 9600 baud 8N1 It is not necessary to use the on board UART as there are jumpers and a header that allow an external UART to be connected if desired If this is done then the card merely provides an RS 232 RS 423 translator In a Windows 98 system the card is driven by a VXD driver which is loaded at run time and which must be in a directory in the system path The driver interfaces to a DLL which has calls that an application can access This is described in Chapter 6 of this document 3 5 Cabling The RAO designed electronics package has two gas tight circular connectors One connector is for coupling to the electronics inside the dewar and the other connector is for coupling to the controller Additionally two video cables in RG 174 U carry the
139. der fill area contains non blank chars Illegal data fill bytes not zero or blank illegal TFORM format code unrecognizable TFORM datatype code illegal TDIMn keyword value HDU number lt 1 or gt MAXHDU column number lt 1 or gt tfields tried to move to negative byte location in file tried to read or vrite negative number of bytes illegal starting row number in table illegal starting element number in vector this 18 not an ASCIT string column this is not a logical datatype column ASCII table column has wrong format Binary table column has wrong format null value has not been defined this is not a variable length column illegal number of dimansions in array first pixel number greater than last pirel illegal BSCALE or TSCALn keyword 0 illegal axis length 1 340 341 342 343 344 345 348 348 349 350 360 361 362 363 364 366 Grouping function error malloc failed read error from file null pointer passed as an argument Passing null pointer as a name of template file raises this error line read seems to be empty used internally cannot unread more then 1 line or single line tuice too deep include file nesting infinite 374 loop template includes itself NGP ERR 366 fopen failed cannot open template file NGP_EOF 367 end of file encountered and not expected ARG 368 bad arguments passed Usually means internal parser error Should not happen NG
140. der the control of a hardwired FPGA protocol ATMEL sells a similar device except that theirs is based on flash memory and is therefore reconfigurable 28 the data link and to store the new hardware configuration in flash memory for later use 2 2 6 Building The Platform Referring once again to Figure 2 1 we see that by use of the building blocks described above it is possible to design a data acquisition system with an embedded microprocessor capable of running autonomously if required but also equipped with an optional communication subsystem and capable of great flexibility in terms of both hardware and firmware configuration With all this capability available however the precise design will depend on the mission statement for the data acquisition system coupled with such other factors as size of production run availability of components over the projected lifetime of the system and any management imposed constraints 23 IR Arrays and Charge Coupled Devices At first glance the difference between a charge coupled device and an array is somewhat artificial in that they both employ a photovoltaic sensitive element coupled to a storage well and readout electronics The major difference between the two is that generally is oriented toward the visible portion of the spectrum whereas an array is not sensitive or at least not deliberately so in the visible portion of the spectrum but rather is designed to operate in
141. ding on what is required 2 4 3 Analog Input Card The analog input card is a two channel card Each channel consists of an analog to 27 In the incarnation used at the University of Calgary The card will also support EEPROMs and if these devices are used then the timing card can download and store programs from the host as required 28 There are several modes of operation for the DSPS6002 In the mode of operation implemented in the IR Labs controller an address overflow of the program memory will cause the DSP to reach out through its external port to a static RAM on the card This allows programs larger than the size of the scratchpad memory to be run on the DSP The problem is both data memories also use that same port and there are bus contention problems and timing issues which result when off chip memory is accessed 34 digital converter for conversion of the signal from the IR array CCD with upstream integrator variable gain amplifier and offset voltage adjust This card also is equipped with D A converters to generate the bias voltages to drive the array The output from the A D converters is 16 bits wide and is directly transferred to the host via the high speed parallel link under the control of a PLD The host then stores the data in a buffer using DMA 2 5 Host The host for this system is a Pentium III class personal computer running under Windows 98 and equipped with a Spectral Instruments amp Model 1862
142. dma i end dma return 264 STUBS int close program DATABLOCK block SetDrive block gt homedrive SetDir block gt homedir remove isr DiscardPanel block gt mainmenu return EXIT int send_osh DATABLOCK block if block gt outarm FALSE strcpy block gt outbuffer OSH block gt outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR_INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED return ERROR j int send csh DATABLOCK block if block gt outarm FALSE strcpy block gt outbuffer CSH block gt outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer 265 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ENABLED TRUE return PASSED return ERROR int send wrm DATABLOCK block unsigned int address unsigned int value int memsel int work if block gt outarm FALSE i GetCtrl Val block gt debugmenu DEBUG_address amp address GetCtrl Val block gt debugmenu DEBUG value amp value GetCtrl Val block gt debugmenu D
143. dr amp value strepy block gt outbuffer RDM switch memsel case PROGRAM MEMORY block gt outbuffer 3 0x10 break case X MEMORY block gt outbuffer 3 0x20 break case Y MEMORY block gt outbuffer 3 0x40 break block gt outbuffer 4 address amp 0 0000 00 gt gt 8 block gt outbuffer 5 address 4 0x000000FF block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ENABLED TRUE return PASSED return ERROR 1 int send institution DATABLOCK block 268 unsigned int address int value int memsel int Work if block gt outarm FALSE block gt return_expected TRUE block gt return_ptr menu block gt debugmenu block gt return_ptr item DEBUG_inst_code block gt return_ptr addr amp value strcpy block gt outbuffer RDM block gt outbuffer 3 0x10 E block gt outbuffer 4 0x00 reads from fixed address block gt outbuffer 5 0x06 block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr blo
144. e Added the following stubs SV2 Set DC offset on the ADC board SGN Set the gain on the ADC board These will have to remain stubs until the ADC board has been wrung out All UC additions are bracketed and identified Designated REV 0 20 stored as OP3 2001 07 16 Set APP_LEN to 300 to allow for extended length programs Increased command table size to 32 ops Designated REV 0 21 stored as BIGTAB 2001 07 18 Cut out timing tables for PICNIC array inserted tables for TCM1000C array Rewrote RD ARRAY routine to accomodate new tables Replaced RESET ARRAY routine with FLUSH ARRAY routine Designated REV 0 22 stored as TIMINGI 2001 07 26 Added COF and CON ops to force camera power on and off Rewrote solenoid throws so that they gt should work correctly Verified that power supply is in fact a ttimPC and that the bit designators that are active in this code really do flip HVEN and LVEN Designated REV 0 23 stored as PWRTIME d DL 1 To generate code for downloading to DSP memory dDLO To generate code for writing to the EEPROM PAGE 132 Printronix page width 132 columns Define a section name so it doesn t conflict with other application programs SECTION TIMIR 346 These are the equates which determine which and how many analog channels get transmitted SXMITO 3 EQU 00F060 Series transmit A D channels 0 3 SXMITO EQU 00F000 Transmit ADC 0 only SXMIT EQU SXMITO These are the assignments of the line
145. e at the RAO ASIC Application Specific Integrated Circuit An integrated circuit designed by or for a customer for a specific purpose Bang bang controller A controller which has two states only full on and full off BCD Binary Coded Decimal Bit Bucket Brigade A technique for unloading CCDs and IR arrays in which the charge is moved from pixel to pixel until it arrives at the output port Boot block A portion of a flash memory that cannot be rewritten under program control This is usually used to store critical code which if damaged would prevent the system from operating at all Canned System A system purchased from a vendor as a package Canned Software Software purchased from a vendor as a package CCD Charge Coupled Device CMOS Complementary Metal Oxide Semiconductor A low current drain logic technology based on FETS instead of junction transistors COFF Common Output File Format A widely used file format for output from compilers linkage editors and other system tools COSMAC A line of RCA microprocessors Their chief characteristic 15 their extremely low power consumption making them ideal for use in handheld or battery powered equipment CPLD Complex Programmable Logic Device CRC Cyclic Redundancy Check method of detecting single bit errors in a data stream D A converter Digital to Analog converter DAC See D A converter xvii DLL Dynamic Linked Library This is a technique whe
146. e command table is actually a trap for strings which might be generated by the host program in error Tt is in the IR Labs code and was retained in the RAO code It branches directly to the background loop and returns nothing to the host program 6 1 3 12 TST Communication Test This task has no counterpart in the IR Labs supplied code It was originally inserted into the application program as a diagnostic but 15 useful in testing whether the serial data link is operational and if the controller is operational It echoes TST back to the host via the serial link It does not return 116 6 1 3 13 SEX Set Exposure Time This task has no counterpart in the IR Labs supplied code Requesting SEX will cause the word following the command word in the DSP input buffer to be loaded into the timer target time counter The timer is not started however This command returns a DON to the host program 6 1 3 14 LDW Load Word The Load Word task has no counterpart in the IR Labs supplied code This task was originally inserted into the application program as a diagnostic tool and is retained as such Invoking this task will result in the word following the command word in the DSP input buffer to be loaded to the SS Switch State lines on the backplane It returns a DON to the host program 6 1 3 15 OSH Open Shutter The Open Shutter task is broken into two parts The task started by the entry in the command t
147. e handler portaddress block gt port_base PORT_C_OFFSET get temperature port address block gt port_c InPort portaddress read port work block gt port_c amp 0 0004 move over LSB block gt port_c block gt port_c 16 shift right 4 work block gt port_c 10 mult by 10 and add to convert from packed BCD to hex SetCtrl Val block gt mainmenu MAIN_temp work display temperature 212 GetCtrlVal block gt imagemenu IMAGE utc offset amp utc offset get offset hours hours utc offset the simple part a negative offset will ADD to the local clock if hours gt 23 hours hours 24 day if hours lt 0 hours hours 24 day j switch month 1 this is the calendar correction It is really ugly but the Gregorial calendar is that way January has 31 days if day 32 montht day 1 if day 0 month 12 day 31 year break case 2 February 1 4 0 213 on non leap years use this branch if day 29 month day 1 if day 0 month 1 day 31 else on leap years use this branch if day 30 month day 1 if day 0 month 1 day 31 break 3 if day 32 month day 1 if day 0 month 2 day 28 4 0 day
148. e it available to the FPGA on boot The real advantage at least from the system designer s point of view comes with the realization that while the vendor is quite willing to sell serial memories which will mate seamlessly with their FPGAs the FPGA will also accept byte wide programming This means that the configuration port for the FPGA can be put on the data bus for the microprocessor and although there must be some non volatile logic holding everything together during boot the FPGA can be programmed after microprocessor boot and therefore under the control of the microprocessor The great advantage of this is that it is now possible to reconfigure and update the operation of the data acquisition system while it is in operation and in the field It is further possible to reconfigure or update the data acquisition system remotely via 18 The most successful SRAM based devices are the XC4000 family FPGAs and their derivatives available from XILINX These devices are not cheap in themselves however they do offer some extremely high logic densities and in some of the larger parts it is possible to stuff an entire 8051 core into the part Since this same part 15 available with 2 nanosecond or better delay times a very powerful system can be built at low cost I9 XILINX offers a X17Cxx line of OTP memories which are expressly designed to mate with their FPGAs These are serial download devices which will download their contents to the FPGA un
149. e overwritten ENDIF End of section TMIR End of program END 329 D 2 3 Bootstrap asm as modified by University of Calgary COMMENT This file is used to generate boot DSP code for the second generation TIMII timing board with the PC interface for IR Labs This is Rev 3 00 software Overlays are no longer used but application programs can be loaded Modified starting for downloading operation with timIlappl asm Header ID code eliminated since the utility board will not be used may be re implemented if needed Aug 23 1996 Buffers for commands and replies was simplified to just two buffer one for the receiver one for the transmitter Each has an address register pointing to the current value of the last entry in the buffer R1 for receiver R3 for transmitter and an address register pointing to the last processed entry R2 for the receiver R4 for the transmitter Aug 25 1996 SCI interrupt service routine to place the first character in the incoming stream into the most significant byte of the 3 byte DSP word Aug 26 1996 Timer code based on DSP timer interrupt service added Aug 31 1996 It was verified to work by testing the X TCSR bit 0 TE for timer complete Modified for Rev 3 PCI timing boards March 97 Modified for Rev 6C power board Aug 98 Base copy 010705 University of Calgary Code is proved to work Designated institution code 010101 This is code version 0 23 CHANGE HISTORY 2001 0
150. ed for each pixel is successively shifted to the next pixel until it arrives at the output line It then enters an integrator where it is developed as a voltage This voltage is then presented to an ADC and the output of the ADC is stored as the value for that pixel The array incorporates a shift register so that each time the synch line is strobed it will step to the next line in the array allowing the entire array to be read The array shifts charges on the leading edge of the clock and the 22 256 by 256 arrays are readily available and these can be and are assembled into larger mosaics 23 The IR Labs NICMOS array has four output ports the Rockwell TCM 1000C has two 24 e g the Rockwell TCM 1000C 32 output is valid on the trailing edge of the clock All of this then requires a controller to handle the IR array and this controller is in the classic sense a data acquisition system In our case the controller is an IR Labs purpose built array controller based on a Motorola DSP56002 microprocessor resident ina 3U VME chassis and communicating with a host computer via a parallel interface 24 IR Labs Controller The IR Labs controller is housed in a six slot 3U VME chassis with an on board power supply which supplies digital power as well as 10 volt analog supplies There are three cards in the controller These cards are the Timing Card the Clock Generator Card and the Analog Input Card 2 4 1 Timing Card
151. efore MSB enable receiver and its interrupts transmitter interrupts disabled MOVEP 50050 lt 5 SCI clock asynchronous data rate 9600 kbits sec internal clock gt 50 MHz 64 81 9645 baud MOVEP 0013 X PCC Port implemented as enabling the SCI pins RXD and TXD and HVEN The SSI will beenabled only as needed MOVEP 0013 X PCD Port C Data Register Set all lines high if configured as outputs MOVEP 007F X PCDDR Port C Data Direction register Set all lines to outputs when not used for SSI or SCI service except SRD and STD that are pulled low by 500 ohms MOVEP 0181 X BCR Wait states X Y and Y ext MOVEP gt 2 X TCSR Enable timer interrupts MOVEP 61A8 X TCR Divide so timer interrupts every millisecond Initialize X data memory MOVE RD_X RO Starting X address in EEPROM MOVE 0 R1 Put values starting at beginning of X DO 4 100 X MOVE Assume 256 100 values exist DO 3 X_LOOP __ Reconstruct bytes to 24 bit words MOVE P RO A2 Getone byte from EEPROM REP 8 ASR A Shift right 8 bits 334 X LOOP MOVE ALX i RI Write 24 bit words to X memory X MOVE Initialize registers MOVE RCV_BUF R1 _ Starting address of receiver buffer MOVE XMT_BUF R3 Starting address of transmitter buffer MOVE WRSS R6 Address of clock and video processor switches MOVE R1 R2 CLR AR3 R4 31 1 address registers
152. ely 260 spare words for expansion as required The control requirements of the Rockwell TCM 1000C IR array are fairly simple as compared to other arrays In the case of the Rockwell array it is possible to read the array out through a single analog to digital converter and the timing signals use only three lines One additional line is required to gate power to the preamplifier and four additional lines are required to control the shutter solenoids The readout routines supplied by IR Labs in their application program generate timing signals by outputting bitmaps in accordance with tables The core readout routines have been retained in the RAO application but the driving routines have been modified and See Section 5 1 2 3 concerning application program numbering and layout 16 The timing tables in the application code are quite short but contain bit patterns that the DSP puts onto the backplane and which the clock generator board passes on to the IR array The code takes advantage of the fact that the array is rectangular to run loops to output the bit patterns The bit patterns which appear at regular intervals comprise the pulse pattern required to read the chip gate the preamplifier and to open and close the shutter 110 the tables entirely replaced in order to accommodate the needs of the TCM 1000C The requirements that the power control and the shutter control lines be held constant while the timing signals are generated b
153. ence KS 1997 HEASARC User s Guide An Interface to FITS Format Files for C Programmers Version 2 2 HEASARC Code 662 Greenbelt MD 2001 Higgens Richard J Digital Signal Processing in VLSI Prentice Hall Englewood Cliffs NJ 1990 Infrared Labs DSP Software dtd 19 Jan 1998 unpublished Infrared Labs Generation II Timing Board dtd 25 May 1998 unpublished Infrared Labs System Description undated unpublished Infrared Labs TCM 1000C Support Electronics dtd October 1989 internal report unpublished Infrared Labs Video Processor Board Description dtd 16 Nov 1998 unpublished 16 18 19 20 71 152 IBM Corporation System 360 DOS VSE System Programmer s Guide Press New York 1969 IBM Corporation DOS VSE FORTRAN Compiler Data Structures IBM Press New York 1969 Johnson Susanna 210 Operating System Design Nuclear Research Corporation internal report 1990 Kauler Barry Windows Assembly Language and Systems Programming CMP Books Lawrence KS 1997 Kernighan Brian W and Ritchie Dennis M The C Programming Language Prentice Hall Englewood Cliffs NJ 1978 Lada Charles J Alves Jodo and Lada Elizabeth A Infrared extinction and the Structure of the IC 5146 Dark Cloud ApJ 512 250 259 1999 Feb 10 22 23 24 25 26 27 153 Lada Charles J Muensch August A Haisch Karl E
154. ents in the event queue so as to best conform with the requirements of the mission The background loop will then pull tasks off the event queue and run them through the dispatcher which will then invoke the routine to perform the requested action Note that while this approach 15 more flexible than that of the previous section it carries with it a certain amount of overhead which must be accounted for when budgeting system resources Note also that there is a certain execution latency in this approach which while deterministic in the sense that the latency is a function of the time required to crack the message load the event queue take the event off the queue and execute it is not deterministic in the sense that because of the presence of the prioritizer the latency is a function of whatever else may be happening to the system For this reason one thing the prioritizer must monitor if a prioritizer is present is the age of the event the older an event 15 the higher its priority must become 89 5 4 4 Interrupt Handlers There are certain interrupts which are required as part of the structure of the real time system These interrupts are the communication subsystem interrupts either one or two depending on the structure of the communication subsystem the clock timer interrupt and the non maskable interrupt There may be other interrupts present as required by the mission of the system Whenever the system is dealing with an interr
155. epy cs_workstr2 cp_ptr SetCtrl Val block gt setupmenu SETUP_instrume cs_workstr2 if strstr workstr OBSER VER NULL 285 cp_ptr strchr workstr stropy cs workstr2 cp ptr SetCtriVal block setupmenu SETUP observer cs workstr2 if strstr workstr OMMENT NULL cp ptr strchr workstr ptrt strcpy cs workstr2 cp ptr SetCtrl Val block gt setupmenu SETUP_comment cs_workstr2 if strstr workstr EQUINOX 7 NULL cp_ptr strchr workstr cp_ptr strcpy cs_workstr2 cp_ptr SetCtrl Val block gt setupmenu SETUP_equinox cs_workstr2 if strstr workstr TIMES YS NULL cp ptr strchr workstr cp ptr strcpy cs workstr2 cp ptr SetCtriVal block setupmenu SETUP timesys cs workstr2 if strstr workstr TPFILE NULL cp_ptr strchr workstr cp_ptrt strcpy cs workstr2 cp ptr SetCtriVal block setupmenu SETUP tpfile cs workstr2 now echo these back to the various screens SetCtrlVal block setupmenu SETUP port base block port base then close the file and return fclose fsconfig file 286 retum SUCCESS write the configuration file out into whatever directory is active at the time int config write DATABLOCK block FILE fsp config file char cs workstr 80 unsigned int ui work unsigned short int usi work int i work get the n
156. epy workstr block gt wddir GetCtrl Val block gt imagemenu IMAGE saveselect amp work switch work case case case 1 flat strcpy workstr flats sprintf workstr2 FLAT 04d FTS block gt flatctr block gt flatctr SetCtrl Val block gt imagemenu IMAGE flatctr block gt flatctr break 2 dark strcpy workstr darks WV sprintf workstr2 DARK 04d FTS block gt darkctr block gt darkctr SetCtrl Val block gt imagemenu IMAGE_darkctr block gt darkctr break 3 back strepy workstr backs sprintf workstr2 BACK 04d FTS block gt backctr block gt backctr SetCtrl Val block gt imagemenu IMAGE_backctr block gt backctr break j 278 case 4 image strcpy workstr imagesW sprintf workstr2 IMAGE 03d FTS block gt imagectr block gt imagectr SetCtrl Val block gt imagemenu IMAGE_imagectr block gt imagectr break strcpy workstr3 block gt wddir strcat workstr3 workstr m ecode SetDir workstr3 m ecode FITS create file amp fptr workstr2 amp status make the FITS file if m ecode 0 sprintf cs_errstr FITS FILE CREATION ERROR CODE IS d status error_message block cs_errstr return status m ecode FITS_create_img fptr USHORT IMG naxis naxes amp status if m_ecode 0 sprintf cs_errstr FITS IMAGE CREATION ERROR CODE IS 6d status error_message block cs_err
157. er CON DELAY Alternate entry for camera on delay MOVE A X TGT CLR A Zero out elapsed time 317 MOVE lt BSET 0 X TCSR Enable DSP timer DWN JSET 0 X TCSR CNT DWN Wait here for timer to count down RTS Abort exposure and stop the timer ABR EXP CLR A Just stop the timer MOVE A X TGT JMP FINISH Send normal reply Dummy subroutine to not call receiver checking routine NO BCLR 0 SR Clear status register clear bit RTS Reset entire array and don t transmit any pixel data RESET ARRAY MOVE READ ON RO Turn Read ON 5 CLOCK DO Y N RSTS L RESET MOVE lt FRAME_INIT RO JSR CLOCK DO 464 END FRAME MOVE lt SHIFT RESET ODD ROW RO Shift and reset the line JSR CLOCK DO 64 L_ ODD MOVE Z SHIFT ODD ROW PIXELS RO JSR CLOCK NOP L ODD MOVE SHIFT RESET EVEN ROW RO Shift and reset the line JSR lt CLOCK DO 64 L_EVEN MOVE lt SHIFT_EVEN_ROW_PIXELS RO JSR CLOCK NOP L EVEN JSR R5 Check for incoming command if in continuous JEQ NOT reset mode ENDDO Ifthere is an incoming command then exit ENDDO J continuous mode and return END RST NOT COM NOP END FRAME NOP 318 L RESET End of loop label for reading rows END RST MOVE lt READ OFF RO Turn Read OFF JSR CLOCK RTS Return from subroutine call AKA E E EK KEE KK ARRAY READOUT xoc CK RD_ARRAY IF
158. er one for the receiver one for the transmitter Each has an address register pointing to the current value of the last entry in the buffer R1 for receiver R3 for transmitter and an address register pointing to the last processed entry R2 for the receiver R4 for the transmitter Aug 25 1996 SCI interrupt service routine to place the first character in the incoming stream into the most significant byte of the 3 byte DSP word Aug 26 1996 Timer code based on DSP timer interrupt service added Aug 31 1996 It was verified to work by testing the X TCSR bit 0 TE for timer complete Modified for Rev 3 PCI timing boards March 97 Modified for Rev 6C power board Aug 98 Base copy 010705 University of Calgary Code is proved to work Designated institution code 010101 132 Printronix page width 132 columns Define some useful DSP register locations RST ISR EQU 00 _ Hardware reset interrupt ROM ID EQU 06 Location of program Identification SWI interrupt SCI ISR EQU 14 SCI serial receiver interrupt address SCI ERR EQU 16 5 interrupt with exception error STREQU 18 Starting address of program ISR EQU 3C DSP timer interrupt service routine address 301 CONEQU 3E _ Program continues on here BUF STR EQU 60 Starting address of buffers in X LEN EQU 20 Length of each buffer RCV BUFEQU BUF STR Starting address of serial receiver buffer in X XMT
159. er is empty the interrupt service routine will disable the Device Ready interrupt and execute an RTI command Note that it is the responsibility of the routine generating the message to ensure that Reference 18 86 the interrupt is initially enabled After that the communication subsystem will take care of everything else 5 4 2 1 2 Receiving In the case of receiving a message the receive interrupt is always enabled The device incoming buffer will fill as data byte or packet is picked up from the outside When this buffer is full the receive interrupt will be triggered and the interrupt service routine will unload the device buffer to a message buffer The interrupt service routine will then inspect the message buffer to determine if a complete message is present if any transmission errors have occurred ind if the message is internally consistent 1 if checksums and valid If a complete message is present and it passes all validity checks then a message available flag is set and the buffer is released to the real time system usually the message cracker for further processing 5 4 3 Message Cracker The message cracker is that portion of the real time system which interprets incoming messages and determines what they mean There are two major variants to the type of action the message cracker can take upon decoding a message C language example of a typical message cracker is shown overleaf as Figure
160. er on PON task A major difference between the IR Labs implementation and the RAO implementation is that the IR Labs implementation uses bias voltage generators on the video board to supply various bias voltages to the IR array In the RAO implementation these bias voltage generators are not used and the IR array 1s fed from fixed output bias voltage generators located in the preamplifier This command returns a DON to the host program 6 1 3 4 SB2 Set Video Board Video Offset There are two ADC channels on each video board of which one is used in the RAO application These channels are each equipped with an input bias voltage offset generator The purpose of this command is to set the bias voltage Since in the RAO application only Channel A of Board 0 is used this task 1s hard coded to set only that channel Also the set range of this task is restricted to 5000 millivolts in order to protect the analog to digital 113 converter This command retums a DON to the host program 6 1 3 5 SGN Set Gain The video board ADC channels each have a selectable gain amplifier upstream from the ADC Though the gains are selectable under program control they are fixed in the sense that you have your choice of four The available gains are 1 0X 2 0X 4 75X and 9 5X This command returns a DON to the host program 6 1 3 6 STP Stop Video Mode This command is a leftover from the original IR Labs code It has been left in because
161. era Install Run Time Engine True Install Low Level Support Driver True Media Size 3 kBytes Reserved on First Disk 0 Target Path f milone host build Language English Core Group Index 1 DLL Group Index 2 Project File 0001 f milone host errmenu uir Project File 0002 f milone host debugmenu uir Project File 0003 f milone host filemenu uir Project File 0004 f milone host filtermenu uir Project File 0005 f milone host imagemenu uir Project File 0006 f milone host main uir Project File 0007 t milone host setupmenu uir Project File 0008 f milone host startup uir Project File 0009 f milone host about uir Project File 0010 f milone host ircamera exe Project File 0011 ffmilone host SIW95DLL dll Project File 0012 f milone hos ACCES32 DLL Project File 0013 f milone host wrapper dll Use Custom Script False Run Executable After Setup Group Index 1 Run Executable After Setup File Index 1 Use Default Program Group Name True 194 Use Default Installation True Distribution Kit File Group 001 Group Name IR CAMERA Files Destination Directory Application Use Relative Path False Install cons True Distribute Multiple Objects False Replace Mode Ask File 0001 f milone host ircamera exe Distribution Kit File Group 002 Group Name DLL Files Destination Directory Application Use Relative Path
162. erations for an IR Array The quantum efficiency of an IR Array is quite high figures of 85 percent are not uncommon However they must be operated at cryogenic temperatures which means that a dewar with all the associated plumbing must be supplied Further while they can be fairly 21 Jobin Yvon Inc offers in their GA3000 line of near infrared array detectors devices with spectral coverage of 0 8 um to 1 7 um as linear arrays of 128 256 or 512 pixels They quote 85 percent quantum efficiency for these detectors The telephone number is 732 549 5125 31 large the number of available output ports is limited and the output ports are analog This requires that support electronics be supplied in order to buffer and amplify the output and to convert the output from analog to digital This also requires that a relatively complex set of timing and control signals be provided to the array At a minimum a frame line a synch line and a clock must be provided There are also voltage and power considerations Due to the nature ofthe technology there are several bias voltages driving the photodetector section These must be supplied from stable clean sources external to the dewar The readout electronics also do not use standard logic levels requiring level shifters in the support electronics The method of output of either an IR array or a CCD is referred to as the Bucket Brigade technique In this technique the charge accumulat
163. ercial product In these cases the developer will be required to develop in assembler language there is no setting around this and possibly C Assemblers are available for all devices and in most if not all cases a C compiler is also available 18S pectron Microsystems Reference 56 Mentor Graphics ONX Software Systems Ltd Never listen to or take the advice of anyone under 30 as they may have listened to or taken the advice of someone over 30 Anonymous graffiti corner of Hai San Francisco 1969 98 99 6 IR LABS CONTROLLER PROGRAM 6 0 Introduction The IR Labs controller is built around a Motorola 56002 DSP operating at a 50 MHz clock rate This processor employs a modified Harvard architecture in that program memory and data memory are separate however there is not one but two data spaces There 15 on board workspace for program memory and both data spaces and from the programming perspective a seamless transition between on board memory and external memory The processor uses a fractional decimal floating point arithmetic is pipelined and has a small dedicated stack It uses a fixed word size of 24 bits with the smallest addressable entity being one word and has a 16 bit address space There are two sets of floating point registers each of which can be concatenated to make a 56 bit entity there are four 24 bit registers and there is a set of 8 16 bit index registers Hardware facilities exi
164. erence 56 82 entities such as queues circular and FIFO and stacks LIFO or the fact that there is a high degree of communication between these functional blocks 5 4 1 Interface To Hardware BIOS A BIOS Basic Input Output Subsystem such as specified by Microsoft is an interface between the hardware and the real time system itself The BIOS can take the form of code resident in non volatile memory and included as a component of the platform or as a fixed component of the real time system A typical BIOS e g the System 360 DOS VSE BIOS has two layers The first layer is known as the Physical I O Control Subsystem PIOCS The second layer is known as the Logical I O Control Subsystem LIOCS Both the PIOCS and the LIOCS are open structures in the sense that the real time system can access any function in either layer as required A block diagram of the BIOS is shown overleaf as Figure 5 2 5 4 1 1 Physical I O Control Subsystem The Physical I O Control subsystem is that portion of the BIOS that interfaces with the hardware and that deals with the specific characteristics of each device This is the layer in which all the low level data manipulation occurs and it provides a low level standardized interface to the rest of the system It does not however provide any advanced Reference 30 Reference 16 83 functions If the hardware configuration changes it 1s this layer which must be changed in order to accommodate t
165. ever called but it has to be here define DEBUG SOURCE 3 debug and low level functions define FILE SOURCE 4 file open and close define ERROR_SOURCE 5 handler for error window define IMAGE SOURCE 6 handler for image displays define SETUP_SOURCE 7 handler for setup window define FILTER SOURCE 8 handler for filter window define ABOUT SOURCE 9 handle for about window RE EK AK KKK KAKA KKB RAR ABBE k BK program strategy just so you know The main routine does all the works but it is a background loop in a classic real time system What it does depends on flags that it runs in to which have been set by callbacks invoked by the GUI This is to 202 say if the operator wants to do something he clicks item This results in a flag being set and a value being changed mayhaps The flag is interrogated in the fullness of the time by the background loop which dispatches a task to do the operation requested There two sets of nested switches although if you look at main you will see only one The first switch which is in main pulls an event out of the event queue and determines only which menu generated the event It then invokes a message cracker specific for that menu The message cracker for the menu pulls the event flag out of the queue and dispatches tasks according to what the event flag is The crac
166. g the DSP program consists of two portions There is the kernel which includes various service routines including the communication subsystem the timer driver the command interpreter and associated functions The kernel is a static entity Then there is the application program which is brought in from EPROM as an overlay and which can be replaced at will The kernel resident on the DSP is a fairly standard small system real time executive written in 56002 assembler and optimized to stay as far as possible within a restricted portion of the on board program memory By restricting the size of the overlay to use only the balance of the on board program memory performance can be optimized The version used in this design is the Rev 3C board with the hard wired connection RS 423 103 However if the functions required of the DSP are sufficiently complex this may not be possible 6 1 1 Loader A portion of the DSP program which is executed only once and on reset is the loader The loader does all the things which must normally be done to initialize an embedded system This includes properly selecting the memory modes masking unused interrupts setting up the timer and setting up the communication system Figure 6 3 shows the block diagram for the loader 2I UP MEMORY OAD SERIAL INTERRUPTS BGRD LOOP SERIAL INIT PORTS LOAD DATA MEMORIES LOAD REGISTERS Figure 6 3 Loader Block Diagram E
167. g saved is spooled The host program assigns file names sequentially but it is up to the user to maintain proper logs so that he knows which image is which files are in FITS format and all files are tagged with header information s supplied by the user via the GUI Automachron which is available from One Guy Coding for download as freeware 129 7 1 6 Filter Whecl Control The filter wheel is controlled via a ACCESS amp DIO 1280 parallel interface card This card uses several Intel 8255 chips and is a PCI card The card requires a VxD and the VxD communicates with the host program via a DLL The DIO 128 does not control the filter wheel directly Rather it communicates with an in house designed module which receives information from the DIO 128 and directly controls the stepper motor which turns the filter wheel This module also returns to the DIO 128 an indication of the filter wheel location and also temperature information in the form of packed BCD concerning the temperature of the Rockwell TCM 1000C IR array The temperature information is displayed on the GUI in degrees K The filter wheel control also houses the power monitor for the array preamplifier which is used to indicate to the user that the preamplifier does indeed have power 7 3 Host Program Auxiliary Systems The host program utilizes a number of services available from the Windows 9x environment Among these are the use of an HTML capable browser which 1s u
168. gencies 81 5 4 Internal Structure of the Real Time 81 5 4 1 Interface to Hardware 5 2 82 5 4 1 1 Physical I O Control Subsystem 82 5 4 1 2 Logical Control Subsystem 83 5 4 2 Interface to Communication Subsystem 83 54 2 1 tiere tri trt ad 85 5 4 2 1 T TEADSIDISSIOR aeo Regn 85 54 2 12 ios uper 87 5 4 3 Message Cracker ts rise 86 5 4 3 1 Message Cracker Takes Direct Action 87 5 4 3 2 Message Cracker Sets Event Queue 88 5 4 4 Interrupt Handle s ice nri ro erret 89 5 4 4 1 Clock Timer Interrupt Service Routine 90 5 4 5 Process Control t eoe pottea 91 5 4 6 Background Loop eere 92 5 4 7 Virtual Maelime oit E e e 93 5 5 Commercially Available Real Time Operating Systems 94 5 6 Roll Your Own Operating sse 96 viii CHAPTER SIX IR LABS CONTROLLER 97 6 0 Introduction 99 6 1 Structure of DSP Program 102 6 1 1 Loader 103 6 1 2 Kernel 104 6 1 2 1 Communication Subsystem 104 6 122 Timer Driver z 107 6 1 2 3 Load New Overlay Function 108 6 1 2 4 Load Word 108 6 1 2 5 Read Word 108 6 1 3 Application Program 109 6 1 3 1 PON Power On
169. gt outbuffer SetCtrlAttribute block gt mainmenu MAIN timeout_timer ATTR_INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED j return ERROR int send_cof DATABLOCK block if block gt outarm FALSE strcpy block gt outbuffer COF block gt outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_INTER VAL double 1 2 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED 276 TRUE retur PASSED j retur ERROR j PR LLLLILILLLLLLLLLLLL LLL id Ed FITS ROUTINES int MakeFits DATABLOCK block char workstr 80 code lifted from sample program char workstr2 80 char workstr3 80 int work int m ecode fitsfile fptr pointer to the FITS file int status other FITS file stuff long fpixel long naxis long nelements long naxes 2 NROWS NCOLS this locks the size to that of the array char cs errstr 80 status FALSE fpixel 1 naxis 2 mal if strlen block gt wddrive gt 0 change drive ensure file is made in directory if block gt wddrive 0 gt 0x60 else they don t make it easy block gt wddrive 0 0x60 block gt wddrive 0 0x40 SetDrive int block gt wddrive 0 str
170. h states EQU Write DSP datum to PCI board EQU FFFE Bus Port A Control Register gt Wait States EQU FFEO Port B Control Register PBDDR EQU FFE2 Port B Data Direction Register PBD EQU 4 Port B Data Register PCC EQU FFEI Port C Control Register PCDDR EQU FFE3 PortC Data Direction Register PCD EQU FFES Port C Data Register IPR EQU FFFF Interrupt Priority Register SCR EQU FFFO 5 Control Register SSR FFF1 SClStatus Register SCCR EQU FFF2 SCIClock Control Register SRX EQU 4 SCI receive data register SSITX EQU FFEF SSI Transmit and Receive data register CRA EQU SSI Control Register CRB EQU FFED SSI Control Regsiter B TCSR EQU S FFDE Timer control and status register TCR EQU FFDF Timer count register TIM BIT EQU 0 Timer status bit 331 Camera operational mode bit definitions COM MOD EQU 0 Clear if just waiting form commands to interpret RST MOD EQU Set to continuously reset array VIDI MODEQU 2 Set if in video mode 1 VID2 MODEQU 3 Set if in video mode 2 After RESET jump to initialization code ORG P RST_ISR P RST_ISR ROM_OFF JMP INIT Initialize DSP after hardware reset NOP The SCI interrupts when it receives data from the PCI board ORG E SCI ISR P SCI ISR ROM OFF JSR SCI RCV Jump to long interrupt service routine NOP The SCI interrupts to here when there is an er
171. he PCI board FINISH MOVE R2 Step over Carriage Return delimiter END EXP MOVE X lt DON X0 Send a DON as a reply FINISH2 MOVE XO X R3 the buffer to be transmitted Process transmitter buffer to see if anything needs to be sent XMT MOVE R4 Address of processed transmitter contents MOVE R3 X0 Address of current transmitter contents 0 Are they equal START If equal look for receiver contents JMP lt XMIT Needed because we re inserting timer 5 307 Check contents of receiver stack to see if a new host command has come in GET MOVE R2 X0 Get address of processed receiver contents MOVE Get address of current receiver contents CMP 0 RTS Jump here on RRR and M RA commands so R2 steps over CR delimiter XMT DON MOVE R2 Stepover delimiter in command RTS Check for program space overflow IF gt 3 WARN Eror Timer ISR overwitten at P 3C ENDIF ORG P PGM_CON P PGM_CON ROM_OFF _ Step over timer ISR Transmit the 24 bit word to the PCI board three bytes at a time XMIT MOVE X SRXFST RO RO FFF6 SCI first byte address MOVE X R4 A DO 3 5 SPT SCI XMT JCLR 0 X SSR SCI_XMT Continue only if SCI XMT register is empty MOVE A X RO X Write to SCI buffer increment byte pointer SCI SPT SCI CR JCLR 0 X SSR SCI_CR Continue only if SCI XMT register is empty MOVEP 0D X SRX Transmit a Carriage Return JM
172. he Real Time System Any real time system has a mission This mission requires the ability to perform the tasks listed below 5 3 1 Control of the Process This is interpreted as specified above to keep the process associated with the system within a specified error band of a specified set point e g as discussed by Ott 4 Higgens Ref 10 5 Ott Ref 51 goes into great detail on statistical methods for process control A technique he discusses which is particularly useful concerns control charts and how to determine if a process Is within tolerance limits 80 5 3 2 Control of the Instrument A real time system can be considered to be an instrument Within this context there is housekeeping to be done to keep everything running This housekeeping is considered to be operational overhead is a fixed demand on the resources of the system and must be accounted for when budgeting the resources of the system 5 3 3 Take Data In order to control a process the system must be able to acquire data concerning what the process is doing at any given time 5 3 4 Interpret Commands The system must be able to receive and interpret commands from whatever is controlling the system and to implement them This will require additional machinery within the system in the form of message crackers task dispatchers communication subsystems or other features as appropriate to the system 5 3 5 Respond to Real World Events Not every
173. he above is simply an example 5 4 66 Background Loop The background loop is where the real time system is when it is not actually handling an interrupt The background loop interrogates the event queues and if so equipped runs a task dispatcher to execute the tasks requested by the items in the event queue Additionally it runs the control algorithm and the message cracker It may also have additional functions as required by the mission such as display controller operator 14 In a manually tuned PID loop Once the tuning parameters are set they usually do not change However PID controllers which have autotune capability are becoming increasingly common 93 interface or other tasks PID CONTROL EQUATION J ku t S i r fo 2 1 Out s 2 1 1 Eq 5 2 A dp ED E 1 T p p a p a Eq 5 3 Figure 5 6 PID Control Loop Equations 5 4 7 Virtual Machine The virtual machine is a concept wherein the request flag in the event queue does not result in a simple operation but rather in the execution of a series of events under timer clock interrupt control In the form implemented in the DRM 210 5 this system used strings of pseudo ops which were inserted into a special event queue one at a time by the Reference 50 Reference 18 94 timer clock interrupt service routine The background loop would unload these events from the event queue and perform the simple tas
174. he changes in the platform BASIC INPUT OUTPUT SUBSYSTEM PHYSICAL I O CONTROL SUBSYSTEM PIOCS LOGICAL CONTROL SUBSYSTEM LIOCS BACKGROUND LIOCS IRQ PIOCS HANDLER OUTSIDE Figure 5 2 Basic Input Output Subsystem Block Diagram 5 4 1 2 Logical O Control Subsystem The Logical I O Control Subsystem is that portion of the BIOS which provides advanced functions to the real time system or other application This layer provides a high level interface between the standardized low level interface provided by the LIOCS and the real time system Often the LIOCS provides extensive capabilities not possible to a simple device driver 84 5 4 2 Interface to Communication Subsystem The communication subsystem such as the system used in the Texas Instruments TMS320C6000 can be anything from a simple parallel interface to a 100BaseT ethernet connection Whatever it is this interface which works in conjunction with the BIOS deals with the physical layer and presents message packets to the real time system It also takes message packets generated by the real time system and passes them on to the communication subsystem for transmission upstream In the following discussion we shall not discuss advanced features such as multiple buffers and message queues except to note that if the message traffic is sufficiently high such techniques are available and useful A block diagram of a typical double buffered communication subsystem
175. he inner shell is mounted on the inner ring as shown in Figure 4 7 which is as described previously mounted on a bellows not connected to the cold plate There are three pieces of 4 40 running thread made from G 10 about 3 centimetres long These pieces of running thread are used to mount the cold plate rigidly to the inner shell These pieces of running thread should be mounted with one and only one and one star washer on the outside of the inner shell The running thread is then mounted in the standoffs on the cold plate with washers and two nuts Figure 4 8 overleaf shows a top view ofthe dewar at this stage of assembly with filter wheel inner shell and running thread in place 8 If you try to use a jam nut on the running thread on the outside of the inner shell there will not be sufficient clearance to get the outer shell into place 66 INNER SHELL LIGHT PORT COLD PLATE Figure 4 8 Top View Of Dewar With Inner Shell In Place The next stage in the assembly is the mounting of the outer shell and the drive train for the filter wheel The outer shell seals to the baseplate not the cold plate with an O ring and vacuum grease If the plan is to reuse the existing O ring it must be carefully removed from its groove in the baseplate A nonmetallic tool such as a toothpick should be used in order to avoid nicking the O ring The ring should then be cleaned and carefully inspected for nicks cuts and other defect
176. her DLL using the Microsoft Visual compiler but opens up possibilities concerning ease of object selection and positioning of the telescope Update 2 Dec 2001 A DLL for the game controller has been made from code extracted from the Microsoft Visual compiler There are other tasks with higher priority 21 IOMEGA 100 MB ZIP drive 22 CD burner is available if needed to install service and operate infrared cameras 149 150 REFERENCES Bach Maurice J Design of the Unix Operating System Prentice Hall Inc Englewood Cliffs NJ 1986 Barron D W Assemblers and Loaders American Elsevier Inc New York 1969 Franklin Gene F and Powell J David Digital Control of Dynamic Systems Addison Wesley Publishing Company Menlo Park CA 1980 Gircys Gintaras Understanding and Using COFF O Reilly amp Associates Inc Sebastopol CA 1988 Graham Ian S HTML Sourcebook 2 Ed John Wiley amp Sons Inc New York 1996 Gomez Martin Embedded State Machine Implementation Embedded Systems Magazine Dec 2000 10 11 12 13 14 15 151 Haisch Karl E Lada Elizabeth A and Lada Charles J A Near Infrared L Band survey of the Young Embedded Cluster 2024 Astro Journal 120 1396 1409 2000 Dec Hazzah Karen Writing Windows VxDs and Device Drivers Programming Secrets for Virtual Device Drivers CMP Books Lawr
177. ibute block gt menuhandle MENU_help ATTR CALLBACK DATA block SetMenuBarAttribute block menuhandle MENU about ATTR CALLBACK SetMenuBarAttribute block menuhandle MENU legal ATTR CALLBACK DATA blo ck SetMenuBarAttribute block gt menuhandle MENU hist ATTR CALLBACK DATA block last thing to do is to get rid of the startup panel HidePanel handle return 0 258 LAZALLLLLLLLLLLLJ INIT OBJECT Initializes the block object int init object DATABLOCK block the window handles do not need to be initialized so ignore them strepy block gt message STARTUP MESSAGE strcpy block wdname strcpy block gt wddrive strcpy block gt wddir strcpy block gt wdfile block gt fileset_open FALSE block gt homedrive 3 set to drive Ct strcpy block gt homedir ircamera set to IRCAMERA block gt dma_running FALSE block gt frame1_active TRUE block gt frame2_active FALSE strcpy block gt timestamp1 UNINITIALIZED TIMESTAMP strcpy block gt timestamp2 UNINITIALIZED TIMESTAMP strcpy block gt timehack UNINITIALIZED TIMESTAMP block gt exp_tim 0 block gt port_flags 0 block gt bias 0 block gt gain 0 block gt outcount 0 block gt outptr block gt outbuffer block gt outarm FALSE block gt retumn_expected FALSE no return from controller expected on start
178. ibute block 2 mainmenu MATN tstlight 5TTR LABEL VISIBLE TRUE SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED FALSE block gt inarm FALSE in all cases reset incoming block gt incount 0 ticktock block gt inptr block gt inbuffer return 0 return 0 pf peop pp es a e e e e e e Spectral Instruments DMA handler TG i d d int run dma DATABLOCK block WORD dmaptr int cols 222 int if block dma running TRUE P DMA TRANSFER IN PROGRESS return 0 break j case DMA ERROR SetCtrlAttribute block 2 mainmenu MAIN led ATTR OFF COLOR VAL RED end dma gt running FALSE return ERROR break case COMPLETE SetCtrlAttnibute block gt mainmenu MAIN led ATTR OFF COLOR VAL GREEN end dma block dma running FALSE if block framel active copy over time hacks strcpy block gt timehack block gt timestamp if block frame2 active copy to frame buffer strcpy block gt timehack block gt timestamp2 break default 223 error message block DMA TRANSFER ERROR retur SUCCESS j EE E E E E E E E E EEEE EEEE E EE E E E E E E E EE EE E E MENU CALLBACK EVENT HANDLERS ARE HERE ok ok ok ok ok
179. ic courtesy Babott 165 vo Q 91 XCLOCK FILTER lt gna FRAME uSwitch 4 uSwitch FILTER Amplifier Enab e gnd 0001 85 17 184456 ali nues 7 to set ol e rd mean pag 2 cT p Pure T DC emm g T 1 ri sO wh i te orange N I3 wh ite we 1 ow blue 0 050 eas 9 229 white T green C send POWER Figure A 6 Logic Board Layout courtesy F Babott 166 and XCLOCK 2 gt FRAME 150 gnd 167 Figure 7 Logic Board Schematic partial courtesy F Babott ii MOVE vets HOLD MC 7 15v C506 0 Sur R301 198 ATK LE x TER T 4708 168 HIA Text2c 2v GUARDIAN SCLENOID 192158 Q 77K ose MPS WASA 0504 42757 gt 30v 00 50 2 MPS wes UT Taxt2c 3ev GUAROIAN SOLENOID RS 15 7X 0508 0506 cus 0507 144007 144007 4 IR CAMERA SHUTTER ACTUATOR lt 5 T Ve 0504 9511 1N4007 LS 240R 2NF VOLTAGE REGULATOR Figure A 8 Shutter Solenoid Driver Board Schematic courtesy F Babott 189 APPENDIX DEWAR CONNECTOR PINOUTS AND IR LABS CONTROLLER PINOUT B C D E F G H I J K L M N P R S T U V W X Y Z a b Table B 1 External Preamplifier Pinout
180. ic Linked Libraries eee 130 7 3 1 Generating LIB files from DLL Files 130 ud operi ta trea aedis 131 TA ACCESS VO DIOST2E seno 132 T5 White RE o ase ebore dine iden tds fies Bene 133 DO EITOIS cie deo e p RUE 134 10 Fala BECOE 134 7 6 2 Correctable BHO tenes 135 76 3 FITS Library EMOT au rcd 135 CHAPTER EIGHT CONCLUSION seem 136 SO OV CES WW 138 8 1 Status As Of This Wr ue era iocus nee 139 8 2 There And Back ABI ern 139 8 2 1 The 141 8 2 2 The Computer 0 4 2200 144 8 2 3 Problems with the Labs Controller 145 8 2 4 Problems with the Spectral Instruments 1826 Interface Card oo ere eco uie 145 8 2 5 Problems with the IR Labs Host Program 146 8 2 6 Problems with the DSP56002 146 8 3 Recommended RO da du n n os 147 Pee tuas ener 148 REFERENCES 150 APPENDIX A Schematics for RAO Designed Electronics Package 160 Figure 1 Infrared Detector Shutter and Mounting Plate 161 Figure A 2 Wiring Harness Card for Dewar E
181. icate that the handshake occurred successfully and all timers are shut off There are very few strings which the host can send to the controller which will result in other than one of the above mentioned set of responses For this reason the message cracker for strings received from the controller is somewhat rudimentary 127 7 1 3 3 DMA Channel The DMA channel is reserved for data transfer DLL has a set of functions for dealing explicitly with the DMA channel including a function which tells the DMA controller the address of the buffer into which it should drop the transferred data There also is a function which can be used to determine when the transfer is completed and this function is used by a function called by the background loop to monitor the status of the transfer and to set the colour of an indicator in accordance with the status of the transfer This channel is double buffered within the host program but there is no automatic select between the buffers Rather in one of the windows in the GUI there are two display objects Between them there is a bat handle switch to select the desired display object Each display object 15 associated with a buffer and selecting the display object also selects the DMA buffer However the contents of the buffer are not displayed in the display object until the user requests that this be done Having the DMA channel double buffered allows the user to obtain one image then sw
182. ify and distribute the software and its documentation is granted in the documentation provided that the following copyright notice and disclaimer of warranty appear in all copies DISCLAIMER THE SOFTWARE IS PROVIDED AS IS WITHOUT ANY WARRANTY OF ANY KIND EITHER EXPRESSED IMPLIED OR STATUTORY INCLUDING BUT NOT LIMITED TO ANY WARRANTY THAT THESOFTWARE WILL CONFORM TOSPECIFICATIONS ANY IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND FREEDOM FROM INFRINGEMENT AND ANY WARRANTY THAT THE SOFTWARE WILL BE ERROR FREE IN NO EVENT SHALL NASA BE LIABLE FOR ANY DAMAGES INCLUDING BUT NOT LIMITED TO DIRECT INDIRECT SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF RESULTING FROM OR IN ANY WAY CONNECTED WITH THIS SOFTWARE WHETHER OR NOT BASED UPON WARRANTY CONTRACT TORT OROTHERWISE WHETHER OR NOT INJURY WAS SUSTAINED BY PERSONS OR PROPERTY OR OTHERWISE AND WHETHER OR NOT LOSS WAS SUSTAINED FROM OR AROSE OUT OF THE RESULTS OF OR USE OF THE SOFTWARE OR SERVICES PROVIDED HEREUNDER 371 CFITSIO Error Status Codes The following table lists all the error status codes used by CFITSIO Programmers are encouraged to use the symbolic muemonics defined in the file fitsio h rather than the actual integer status values to improve readability of their code Symbolic Const Value 0 PREPEND PRIMARY 9 SAME FILE 101 TOO MANY FILES 103 FILE OPENED 104 FILE WOT CREATED 105 WRITE E
183. interval timer is set to zero the shutter is not opened at all This allows the acquisition of dark images This command is instantiated as an alternate entry with a read count of ONE to the MRA task described below It returns a DON to the host program along with the DMA transfer 6 1 3 9 MRA Multiple Read of Array The Multiple Read of Array task will read the array the number of times specified in the command received from the host program The read count is in the word after the command word This task is instantiated as the principal entry for the main data acquisition task and the task itself has been modified to meet the needs of the Rockwell TCM 1000C array as described above This particular entry while included in the command table is not Also called bias images 115 directly used by the host program described in this report 6 1 3 10 ABR Abort Read The Abort Read task works only when an exposure RRR or MRA described above is underway This task works by forcing the interval timer counter to zero thereby causing the interval timer to return The DMA transfer which is part of the read array tasks will still occur but the read array task will not complete A precursor to this task with the same mnemonic is found in the IR Labs supplied code but works somewhat differently Thus task does not return anything to the host but the read array task will return DON 6 1 3 11 DON Done This entry in th
184. into the M band it must be operated at liquid nitrogen temperatures Because the mechanical components of the camera were either obtained from other sources or were developed in the machine shop engineering drawings of the assembly do not exist To get around this photos were taken during assembly These photos and this narrative are intended to provide the necessary information should reassembly of the camera be required 4 1 Filter Wheel Assembly Refer to Figure 4 1 This is a schematic drawing of the filter wheel There are six positions for filters on the filter wheel The filter wheel has a ring gear on the outer edge which engages a spur gear that is turned by a stepper motor There are notches in the ring gear into which a micro switch drops when the filter is in position The closure from the micro switch is used to indicate that the filter is in position and an outboard controller then 1 Drawing courtesy Fred Babott 2 This is a Honeywell cryogenic rated micro switch part number 109 1 Because this microswitch uses a sliding lever and not a roller the filter wheel is constrained to turn in only one direction 57 Figure 4 1 Schematic Drawing of Filter Wheel courtesy F Babott stops the filter wheel precession The fiducial position is indicated by two notches There are four filters in the filter wheel at this writing with the remaining two positions being a blank plate and an open position The housing fo
185. ion 25 The boards at the RAO are the only two boards like this Of the two one is believed by this narrator to have a defective channel The designer of the boards Dr Robert Leach San Diego State University was unable to recall the reason for making the change from the Analogic to the Datel parts He did state however that the microprogramming for the production boards is identical to that for the prototype boards so there should be no problem if it becomes necessary to install production boards in place of the boards now in the possession of the RAO 26 Except for address on the backplane Each channel is individually addressable 51 a stage which can inject a DC offset followed by the The ADC can run under either direct DSP control or under the control of the on board CPLD the mode used for doing high speed transfer to the host There are also two DAC8240 D A converters These converters which are serial load four channel converters feed voltage followers Each group of four channels then passes through a Siliconix DG408A analog switch used as final isolation and then off board via a DB 15 connector The purpose of this circuit is to provide bias voltages for the arrays 3 3 4 Utility Board IR Labs sells a utility card for their system which can be used to generate high 30 voltages support secondary communication channels and for other purposes The prototype system this document describes is not equippe
186. is the development platform Glimdrop and Abscam are the computer names 145 8 2 3 Problems with the IR Labs Controller As received the controller did not work After the read sorted and digested the available documentation she stripped out the IR Labs controller removing all boards except for the timing board Work with the timing board indicated that it was defective although this was not readily apparent When the fact that the timing board was defective was finally determined it was returned to IR Labs for replacement The replacement board 15 of a later version for which correct documentation is available 8 2 4 Problems with the Spectral Instruments 1826 Interface Card As it turns out there was nothing wrong with the interface card and the documentation was correct However the documentation was for a 16 bit MS DOS device driver and as the host computer runs under Windows 98 this device driver will not work It was therefore necessary to contact Spectral Instruments obtain their VxD driver written in Visual Basic and to write an interface DLL This was done and at that point the card became accessible to software written at the University of Calgary with the result that it was possible to communicate with the IR Labs controller 13 The DSP56002 would do everything except assert the WR strobe 4 Since the controller was loaned to the University of Calgary by IR Labs the timing board was swapped as a n
187. it sets some flags which may prove important in the future It is not expected to be executed This command returns a DON to the host program 6 1 3 7 RDA Read Array The Read Array command is a derivative of the original IR Labs code It has been modified to mate up to the Rockwell TCM 1000C array This command performs an immediate read of the array Invoking it will result in a DMA transfer of data from the IR Labs controller to the host n the RAO application it was retained for possible use as a diagnostic tool but the version ofthe host program described in this report does not make use of it It returns a DON to the host program along with the DMA transfer 114 6 1 3 8 RRR Read Reset Read The RRR command is a derivative of the original IR Labs code This isthe main data acquisition task It has been modified to mate up to the Rockwell TCM 1000C array As originally implemented it would result in a DMA transfer of data from the IR Labs controller to the host for each read for a total of two transfers However the first read has been modified to a clear array and does not result in a DMA transfer Additional modifications include forcing the shutter closed before the clear then opening the shutter before the interval timer is invoked and closing the shutter after the interval timer times out and before the read which results in the DMA transfer A further feature of this task not in the IR Labs code is that when the
188. itch to the other buffer and work there while using the first image as a reference time stamp is associated with each buffer This time stamp is the time that the image was uploaded from the controller 6 For information on how to access a VXD driver via a DLL see Hazzah Reference 8 7 Figure 5 2 128 7 1 4 Real Time Clock The host program is designed to run on a Pentium II or better PC with a real time clock The development platform has access to the Internet and has a utility which runs periodically to synchronize the internal PC clock with a national time standard The utility takes into account the transmission delay and claims to be able to ensure an accuracy of within 100 milliseconds The host program uses the internal PC clock and information supplied by the user to offset the value of the clock to recover UTC It then displays the UTC time and date on the GUI and also uses this information as the timestamp when an image upload occurs from the IR Labs controller 7 1 5 Image Storage The host program will store images on request It will change to a working directory which it can create if necessary The user can specify the name of the working directory including drive letter from the GUI The host program will then create within the working directory four subdirectories to wit FLATS DARKS IMAGES BACKS There is a four position select in the GUI which selects which of these subdirectories to which the image bein
189. k gt mainmenu MAIN overrun ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN_overrun ATTR_DIMMED FALSE SetCtrlVal block mainmenu MAIN overrun FALSE power lights SetCtrlAttribute block gt mainmenu MAIN cntlpwr ATTR OFF COLOR VAL SetCtrlAttribute block mainmenu MAIN cntlpwr ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt mainmenu MAIN campwr ATTR OFF COLOR VAL YELLO 256 Wy SetCtrlAttribute block mainmenu MAIN ON COLOR VAL YELLO Wy dim the abort key in the shutter control SetCtrlAttribute block gt mainmenu MAIN_ abort ATTR_DIMMED TRUE set up indicator light for DMA status this will always be false It will show several colours depending on what the DMA transfer is doing at the time Possible values are BLUE dma not active YELLOW active not complete first transfer YELLOW dma active not complete second transfer GREEN dma complete RED dma error SetCtrlAttribute block gt mainmenu MAIN_ led ATTR OFF COLOR VAL BLUE SetCtr Val block gt mainmenu MAIN dma led FALSE set up the indicator lights for the filter menu SetCtrlAttribute block gt filtermenu FILTER home found led ATTR OFF COLOR VAL SetCtrlAttribute block gt filtermenu FILTER home found led ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER blank led OFF COLOR VAL GRAY SetCt
190. k specified by the pseudo op This system works well and allows execution of quite complex strings of events with the transmission of a single command from the control source Variants of this system can be found in software associated with real time digital signal processing and with other contro applications The linkage sequence for the DRM 210 virtual machine is shown as Figure 5 7 overleaf 5 5 Commercially Available Real Time Operating Systems Commercially produced real time operating systems are available for almost all DSPs and microprocessors on the market These operating systems are true operating systems in that they provide all the services listed above They are intended for applications where the environment is such that the system can afford the performance overhead in using a canned system and where the application is sufficiently complex that it is not cost effective to develop a custom system They also generally provide for real time task reload in that one more control program can be loaded and executed or control programs can be downloaded from the control source or otherwise specified at or during runtime There is the advantage that these systems generally allow the developer to write code a high level language such as C C or ADA This has the further advantage from a cost perspective in that large portions of the system be tested environments other than in the target THE LINKAGE SEQUENCE
191. ker will do other stuff as well as required to support the dispatched tasks All inter task communication is done through an object known as Block There is a pointer to Block named block what else that everything gets passed to it All the goodies are in the typedef struct DATABLOCK Regarding communication with the 8255 PIO in the digital I O card The port assignments are as follows Port A 8 bits out bit O LSB Bits 2 1 0 are the filter number to be turned to Bit 3 is the command bit Port B 8 bits in Bits 2 1 0 are the filter number where the wheel is now Bit 4 is used to indicate the wheel is moving Port C 8 bits in Bits 7 6 5 4 MSB bits 3 2 1 0 LSB packed BCD for the detector temperature Because the temperature has to update once per second the driver for this display js put in with the clock update It doesn t change often so shouldn t have to update often If it overranges then it Just sticks at 100 But you don t want it writing continuously to the display because this takes a long time to do and is a resource drain Better that it be in the clock update and run only once per second Also the filter wheel stuff is updated on the screen only when there is a change for the same reason II void main void int m_ecode return code fr
192. lAttribute block gt mainmenu MAIN_donelight ATTR_ON_COLOR VAL GREEN SetCtrlAttribute block mainmenu MAIN donelight ATTR LABEL BLACK SetCtrlAttribute block mainmenu MAIN donelight ATTR LABEL COLOR VAL ITE SetCtrlAttribute block gt mainmenu MAIN donelight ATTR LABEL VISIBLE FALSE SetCtriVal block gt mainmenu MAIN donelight FALSE set the main menu indicator lights for initial status SetCtrlAttribute block gt mainmenu MAIN errlight ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN errlight ATTR_DIMMED FALSE SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN tstlight DIMMED FALSE SetCtrlAttribute block gt mainmenu MAIN timeout ATTR LABEL VISIBLE FALSE SetCtrlAttribute block mainmenu MAIN timeout DIMMED FALSE SetCtrl Val block gt mainmenu MAIN_errlight FALSE SetCtrl Val block gt mainmenu MAIN tstlight FALSE SetCtrlVal block gt mainmenu MAIN timeout FALSE SetCtrlAttribute block gt mainmenu MAIN timeout ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN_overrun ATTR_OFF_COLOR VAL LT GR AY SetCtriAttribute block gt mainmenu MAIN overrun ATTR_ON_COLOR VAL RED SetCtrlAttribute block gt mainmenu MAIN overrun ATTR LABEL BGCOLOR VAL ED SetCtrlAttribute block gt mainmenu MAIN_overrun ATTR_LABEL_COLOR VAL_WHI SetCtrlAttribute bloc
193. layed until a function is invoked to display that window explicitly Further a window may be removed from the display without removing it from memory by invocation of the appropriate function 7 1 2 Structure of the Background Loop After initialization the host program drops into a background loop forever loop which it can leave only if there is an error or the operator requests the program to exit The background loop performs several tasks and then interrogates the GUI If there is a user event on the GUI it obtains the handle of the window generating the GUI It then executes a switch statement on this handle to select the correct handler for the window generating the user event It is this switch statement which requires the define statements referenced in the previous section to be synchronized with the order in which the windows are created Each case within the switch statement corresponds to a different window Error code meanings are given in Appendix E 124 TRY m d ERROR EXIT DISPLAY ERR MESSAGE init spectral allocate buffers get home dir EXIT HOUSEKEEPING config read Figure 7 3 Program Flow On Initialization Within the case statement a function is invoked which is specific to the window which has generated the user event This function receives the identity of the object in the window which generated the user event and executes a switch
194. le the APTEC NRC DRM 300 600 series radiation meters These are hand held recording ratemeters built around an RCA COSMAC 1800 series microprocessor which are battery powered and have many of the features described above 20 2 29 Elements of an Advanced Data Aquisition System As remarked above and as illustrated in Figure 1 1 an advanced data acquisition system is equipped with an embedded microprocessor or microcontroller It will have local data storage capability but may also have data transmission capability and will have stored program capability It may have the capability to receive program downloads from a host and advanced systems may have the capability to download hardware reconfigurations and change their hardware characteristics on command Frequently data acquisition systems have process control capability and can run a single point control loop or a more complex control algorithm independent of the host computer 2 2 1 Microprocessor Options There are numerous choices for the microprocessor and the selection should be made on the basis of unit cost required flexibility expected production volume required performance and projected availability of the component Some classes of microprocessor microcontroller are more difficult to design with and are more difficult to 2 Systems equipped with SRAM based FPGA logic can do this 3 Omega Corporation for example has an extensive line of rack mountable single point
195. lectronics 162 Figure A 3 Preamplifier and Bias Voltage Board Layouts 163 Figure A 4 Preamplifier Schematic 164 Figure A 5 Bias Voltage Generator Schematic 165 Figure A 6 Logic Board Layout 166 Figure A 7 Logic Board Schematic partial 167 Figure A 8 Shutter Solenoid Driver Board Schematic 168 APPENDIX B Dewar Connector Pinouts and IR Labs Controller Pinout 169 B 1 External Preamplifier Connector 170 B 2 Dewar to Preamplifier Connector 171 B 3 Clock Generator Board DB 37 Connector 172 B 4 DB 37 for Controller to External Preamplifier Pinout 173 B 5 DB 25 for Controller to Filter Wheel Controller Pinout 174 APPENDIX C Narrow Band Filter Characteristics 175 C 1 iH Filter 176 C 2 iK Filter 177 C 3iL Filter 178 C 4 Standard M Filter 179 5 TCM 1000C Response Curve with iK iLp and M Filter Passbands Overlaid 180 APPENDIX D Source Code Listings 182 D 1 Host Program 183 D 1 1 List of Program Files in Host Program 183 D 1 2 List ng of host Prj 185 D 1 3 Listing of dllmak prj 196 D 1 4 Listing of host c 199 D 1 5 Listing of xlate c 288 D 1 6 Listing of xlate h 291 D 1 7 Listing of global h 292 D 1 8 Listing of svid h 293 D 2 DSP Program 300 D 2 1 Bootstrap asm as supplied by IR Labs ______ 300 D 2 2 App asm as supplied by IR Labs__ 3 14 D 2 3 Bootstrap asm as modified by University of Calgary 329 D 2 4 App asm as modified by University of Calgary 344 D 2 5
196. licking on ABOUT will display ownership and version information Clicking on LEGAL will display the conditions of usage for this program Clicking on CHANGE HISTORY will display the history of the changes for this program The HTML source code for these features is found in Appendix G 131 or write an include h file which has the correct declaratives e g void declspec dllexport foobar int for all functions within the DLL Then by following the procedure given in the documentation it will be possible to obtain a LIB file for the CVI compiler This LIB file must be included in the fileset used by the National Instruments compiler during the build 7 3 2 FITS Library The FITS library used was downloaded from NASA Office of Science and Technology and was originally written for the Sun Solaris platform Solaris is a unix variant and does not use DLL files so although this library was written in ANSI C it was not set up for use as a DLL Further it employs library functions which are part of the ANSI C specification for unix platforms but which are not included in the National Instruments compiler library These library functions are however part of the Microsoft Visual C run time library The solution to this dilemma is to compile the FITS library as a DLL using the Microsoft Visual C compiler By doing so a stand alone executable incorporating all required functions can be obtained http fits gsfc_nasa gov 12
197. lude evidef h Header 0003 d cvi include cvirte h Header 0004 d cvi include rs232 h Header 0005 d cvi include ansi c h Header 0006 d cvi include ansi assert h Header 0007 d evi include ansi ctype h Header 0008 d cvi include ansi errno h Header 0009 d cvi include ansvfloat h Header 0010 d cvi include ansi limits h Header 0011 d evi include ansi locale h Header 0012 d evi include ansi math h Header 0013 d cvvinclude ansvsetjmp h Header 0014 d cvi inelude ansi signal h Header 0015 d cvi include ansi stdarg h Header 0016 d cvi include ansi stddef h Header 0017 d cvvinclude ansi stdio h Header 0018 d cvi include ansi stdlib h Header 0019 d cvi include ansi string h Header 0020 d cvi include ansi time h Header 0021 d cvi include formatio h Header 0022 d cvi include userint h 192 Header 0023 f milone host GLOBAL H Header 0024 f milone host svid h Header 0025 f milone host xlate h Header 0027 f milone host fitslib h Header 0028 f milone host longnam h Header 0029 f milone host ACCES32 h Header 0030 f milone host startup h Header 0031 f milone host main h Header 0032 f milone host filemenu h Header 0033 f milone host debugmenu h Header 0034 f milone host errmenu h Header 0035 f milone host imagemenu h Header 0036 f milone host setupmenu h Header 0037 f milone host filtermenu h
198. mWrt 1 block gt outstring strlen block gt outstring return ERROR j put error trapping here block gt outarm FALSE block gt inarm FALSE block gt incount 0 block gt outcount 0 init com BAUD PARITY BITS STOP BUFFERSIZE clear buff return retval 261 DICK ALLOCATE BUFFERS Allocate memory for the various program arrays int allocate buffers DATABLOCK block int there are only two in this setup Selection is controlled in the image submenu Allocate a buffer for the DMA framel if block dmal array malloc NROWS NCOLS BYTES PER PIX retuzrnnDMA ARRAYI ALLOCATION FAILURE Allocate a buffer for the DMA frame if block dma2 array malloc NROWS NCOLS BYTES PER PIX retum DMA ARRAY2 ALLOCATION FAILURE j for xx 0 xx lt NROWS NCOLS xx block gt dmal_ array 0x0000 block gt dma2_array 0x0000 return PASSED j OSS Fe Gee x END INITIALIZATION ROUTINES EEEE EEE E EE 262 e e e e e eoe E E E BEGIN SERVI
199. mation from the telescope positioning computer CANNOT FIND TEST PATTERN This is a non fatal error The test patterns are not in the current working directory CONFIG READ FILE ERROR This is a non fatal error The configuration file could not be read Ensure that the current working directory has a copy of the configuration file 365 CONFIG READ GET LOCAL DIRECTORY FAILED This is a non fatal error The specified local directory could not be found Ensure that the directory does exist and try again CONFIG READ I O ERROR ON GET LOCAL DRIVE This is a non fatal error The specified local drive could not be accessed Ensure that you have specified a valid drive and try again DMA TRANSFER ERROR This is a non fatal error The DMA transfer from the IR Labs controller failed Try again ERROR ON CREATING SUBDIRECTORIES This is a non fatal error You tried to create a file system for image storage and the attempt failed The usual reason is because a subdirectory of the same name already exists 366 ERROR FILESET HAS NOT BEEN INITIALIZED This is a non fatal error You tried to save images without first creating or opening a fileset FATAL ERROR BAD SELECT IN MAIN SWITCH This is a fatal error It should never happen but if it does something happened in the CVIRT engine that caused it to return a bad value to the host program message cracker Please report the incident to the software engineer FEATURE NOT
200. mber of erase and write cycles but they could be erased electrically and written to electrically and data stored in them was not volatile Digital designs in the late 19805 and early 1990 s used these devices to store configuration information unique to each unit and which could not be determined at design time so that this information was available immediately boot 2 2 2 4 Flash Memory An outgrowth of RMM is flash memory Flash memory is a non volatile mass storage medium with the attribute of erasability while in circuit and either an unlimited or a very high number of erase and write cycles Modern devices have advanced features allowing erasure of only selected portions of the memory thus allowing critical data to be protected against inadvertent erasure during reloading of the device This attribute makes il Such as the APTEC NRC ADM 300 ratemeter 12 Such as the Intel 28F010 memory and similar devices 13 Advanced Micro Devices with their Standard family of flash memory guaranteeing one million write cycles per sector and 20 years of data retention Devices in this family are available for 1 8 volt 3 0 volt and 5 0 volt logic 14 Specifically boot block and page mode devices 26 these devices ideal for storage of firmware in systems which will be deployed in remote or inaccessible locations and which must also deal with firmware updates from a remote host 2 23 Reconfigurable Logic With the
201. mode 1 reset integrate read ad infinitum 316 VIDEO MODEI MOVE NO_CHK R5 Don t process incoming commands JSR RESET ARRAY Reset the array twice MOVE L_VID1 R7 Return address after exposure JMP EXPOSE _ Delay for specified exposure time L VIDI VID1_MOD X STATUS TST_RCV Exit video mode JSR RD ARRAY Read the array JMP TST RCV Look for a new command Video mode 2 reset short delay read integrate read ad infinitum VIDEO MODE2 MOVE NO_CHK RS Don t process incoming commands JSR RESET ARRAY Reset the array JSR SHORT DELAY Call short delay for reset to settle down JSR RD ARRAY Read the array MOVE L VID2 R7 Return address after exposure JMP EXPOSE Delay for specified exposure time L VID2 JCLR VID2 MOD X STATUS TST Exit video mode JSR RD ARRAY Read the array JMP TST RCV Look for a new command Continuously reset array checking for host commands every line CONT RST MOVE GET 5 JSR RESET ARRAY JNE CHK HDR JMP CONT RST Set the exposure time SET EXT MOVE X R2 4 A Get third word of command exposure time MOVE gt 5 X0 Subtract 5 millisec from exposure time to SUB X0 A account for READ to FSYNC delay time MOVE lt Write to magic address JMP FINISH Send out DON reply Short delay for the array to settle down after a global reset SHORT DELAY MOVE Y RST DLY A Enter reset delay into tim
202. mware get firmware version m ecode send firmware block break case DEBUG sread sequential read memory GetCtrl Val block gt debugmenu DEBUG_address amp address address if address gt 0x 10000 address 0 SetCtrl Val block gt debugmenu DEBUG_address address m ecode send_rdm block break 247 case DEBUG whiterat get white rat status work block gt whiterat GetCtrl Val block gt debugmenu DEBUG_whiterat amp block gt whiterat work block gt whiterat if work FALSE amp amp block gt whiterat TRUE OpenComConfig 1 COM1 9600 0 8 1 0 0 sprintf block gt outstring nWHITE RAT STARTED n r ComWrt 1 block gt outstring strlen block gt outstring break default default trap this can happen if the numerics are scrolled so should not count as an error 3 ERROR cod reer SetCtrlAttribute block mainmenu MAIN overrun ATTR LABEL VISIBLE TRUE ERROR ecd SetCtrlAttribute block gt mainmenu MAIN overrun ATTR LABEL VISIBLE TRUE y return 0 END DEBUG MENU MESSAGE CRACKER LU Message cracker for FILTER menu x 248 int filter cracker int event DATABLOCK block int source int m ecode int work switch event case FILTER return filter return HidePanel block gt filtermenu return 0 break
203. n 143 Block Diagram Proposed TMS320C30 Based Controller 143 Infrared Detector Shutter and Mounting Plate 160 Wiring Harness Card for Dewar 1 6 161 Preamplifier and Bias Voltage Board Layouts 162 Preamplifier Schematic coe e tattoo tige 163 Bias Voltage Generator 22 222 164 Logic Board 165 Logic Board Schematic partial 166 Shutter Solenoid Driver Board 167 iH ss sca 173 IK Filter Passbard oue Cep ot tuerit o ode RU EU 174 iL Filter PassDalld i a picea snb e Oe aoi Me perio ss 175 Standard M Band Filter 4 2 2 1 176 TCM 1000C Response Curve with iK iLp and M Filter Passbands 72 177 XV GLOSSARY 2016 An early type of ROM organized as 8 bits wide by 2 K bytes long It could be programmed only at the factory 8051 An INTEL 8 bit microcontroller with a Harvard architecture It is a very successful design and is widely used The design specifications may be licenced from INTEL for inclusion as a component in a CPLD or FPGA design A D converter Analog to Digital converter ADC See A D converter ARCT A R Cross Telescope The 1 8 metre telescop
204. n on the schematic in Appendix A 14 The filter wheel controller is a stand alone rack mounted assembly designed by Fred Babott and includes other functions not discussed here 45 3 2 3 Logic Board The logic board is a mezzanine board mounted in the preamplifier assembly over the preamplifier board It has on it the level shifters for the logic and also the LM317 and LM7805 regulators for the local power supplies The 74HC04 used to buffer the micro switch is located on this board as well The local power supplies are standard configurations as supplied in the sample circuits from National Semiconductor or other vendors The level shifters of which there are four are TC427 noninverting buffers Each level shifter has a 1 K ohm current limiting resistor followed by a pair of 1N4456 diodes as snubbers The purpose of the level shifters is to convert the digital output levels from the IR Labs controller to the requirements for the Rockwell IR array 3 2 4 Solenoid Driver Board Since the solenoids driving the camera shutter operate at 77 K the nominal coil resistance of 5 ohms at room temperature drops to a few tens of ohms Thus the operating voltage required is much less than that ofthe room temperature value of 24 volts This allows the shutter solenoids to be operated with very low voltages On the other hand 15 Half of the 74HC04 package is used to turn on the preamplifier The other half is used to buffer the micro s
205. nal giving the temperature of the chip eventually is passed to the host program running on the PC via a parallel interface card as packed BCD 3 1 2 Dewar electronics The TCM 1000C is mounted on a 68 pin carrier which is in turn mounted on a cold finger to keep it at 77 K during operation However the 68 pin carrier is integral with an electronics package which provides capacitive decoupling of the bias supplies and rails and current limiting for the clock inputs This package has a mini DB 21 connector for which it was necessary to obtain a mate and fabricate a carrier board in order to wire the dewar The schematic taken from the IR Labs documentation dated October 1989 is reproduced overleaf as Figure 3 2 3 1 3 Micro Switch The filter wheel assembly in the dewar is equipped with a micro switch whose actuator slides along the ring gear as described in Chapter 4 The purpose of this micro 1 The filter wheel controller is a microprocessor based assembly designed by Fred Babott It is not documented in this report Reference 14 41 i a ethan 4 gl E La m ur A Sa gt Swot ee et T TE LE xm _ IDG Fins DURAS ae ee anl T7654 T ligit Tal le cte nna d ES ck P a hr ig Figure 3 2 Schematic of Dewar Electronics from IR Labs documentation best available copy
206. nce number SC87004 FR unpublished internal report dtd 1987 Rockwell International CRL 128 x 128 Pixel Infrared Camera internal report dtd 1 Jun 1988 Spectral Instruments Inc Camera Interface Manual internal report dtd 1999 Spectron Microsystems SpoX Internal Design Spectron Microsystems Santa Barbara CA 1993 Stone Harold S Introduction to Computer Organization and Data Structures McGraw Hill Inc New York 1972 Texas Instruments 5320 6000 TCP IP Stack Library Architectural Overview Texas Instruments Austin TX 1999 59 aD 159 Walker H J Heinrichsen L Richards P J Klass U and Rasmussen L L ISOPHOT Observations of R CrB A Star Caught Smoking Astron Astrophys 315 L249 L252 1996 Wilkes M V Time Sharing Computer Systems American Elsevier Publishing Company New York 1968 160 APPENDIX A SCHEMATICS FOR RAO DESIGNED ELECTRONICS PACKAGE M d Plate Length Geitel Ee leueget the Safe J pre cel Bhe Her anel lt Pla ex e1 2 Figure A 1 Infrared Detector Shutter and Mounting Plate courtesy F Babott c 2000 10 20 12 te brown green white Ve PD 0000000009011 mo T CCD HEAD PLUG x 3 ue b lack 60 B
207. nd WA 1997 Microsoft Corporation Microsoft Visual C Run Time Library Reference Microsoft Press Redmond WA 1997 34 35 36 37 38 39 155 Morrison Michael In 24 Hours Sams Publishing Indianapolis IN 1999 Morrison Ralph Grounding and Shielding Techniques in Instrumentation 274 Ed John Wiley amp Sons New York 1977 Motorola Corporation DSP 56002 24 bit Digital Signal Processor User s Manual Motorola Inc Semiconductor Products Sector DSP Division Austin TX 1995 Motorola Corporation Motorola DSP Assembler Reference Manual Motorola Inc Semiconductor Products Sector DSP Division Austin TX 1996 Motorola Corporation Motorola DSP Linker Librarian Reference Manual Motorola Inc Semiconductor Products Sector DSP Division Austin TX 1996 Musciano Chuck and Kennedy Bill HTML The Definitive Guide O Reilley amp Associates Inc Sebastopol CA 1996 40 41 42 43 44 45 156 National Aeronautics and Space Administration Definition of the Flexible Image Transport System NOST 100 2 0 NASA Science Office of Standards and Technology Greenbelt MD 1999 Neou Vivian and Recker Mimi HTML CD An Internet Publishing Toolkit for Windows Prentice Hall PTR Upper Saddle River NJ 1996 National Instruments Corporation Lab Windows CVI Master Index National Instruments Corporation Austin TX 1996
208. neesae piusvesee seveveerveoves xiv Figure 5 1 Figure 5 2 Figure 5 3 Figure 5 4 Figure 5 5 Figure 5 6 Figure 5 7 Figure 6 1 Figure 6 2 Figure 6 3 Figure 6 4 Figure 7 1 Figure 7 2 Figure 7 3 Figure 7 4 Figure 8 1 Figure 8 2 Figure 8 3 Figure 1 Figure 2 Figure 3 Figure A 4 Figure 5 Figure A 6 Figure A 7 Figure 8 Figure C 1 Figure C 2 Figure C 3 Figure C 4 Figure C 5 Block Diagram of Real Time 78 Basic Input Output Subsystem Block Diagram 83 Typical Double Buffered Communication Subsystem 84 Typical Message Cracker dnbie 89 Typical Interrupt 90 PID Control Loop Equation oe renidet cete 93 Linkage Sequence for Virtual Machine in RTOS in NRC ES 95 Motorola 56002 Architecture tes 100 Motorola 56000 Family Floating Point Arithmetic Unit 101 Loader Block Diagram o eerie rete ts 102 Block Structure etnies 105 Host Program Background 2 240420000 121 Typical Control WIBdow artesian noel 122 Program Flow Upon nitialization ses 124 Error Screen ioo sor MEE ee 124 Why the Preamplifier is 142 Cost Estimate of Proposed In House Controller Desig
209. nel and it will take care of the rest Note that the TR Labs software is loaded only to the internal program memory The RAO loader will load an application of approximately twice the size of that loaded by the IR Labs loader and the overflow will appear in the static RAM This does not mean that you are required to have an application program that spills into the static RAM but if you do it will be properly loaded and will execute 10 There are 32 slots in the command table but eight of them are taken up by the kernel leaving 24 for the application program Neg LDA 001 12 Due to the fact that all three memories access external memory through the same port there can be bus contention and access problems If execution time is a critical consideration then access to external memory should be carefully planned 108 6 1 2 4 Load Word The Load Word function is the second way to load an application program into the DSP It is a task listed in the command table of the kernel and can be invoked from the host It will load the word included in the command from the host to the specified address in either data space the program space or the EPROM Repeated sequences of this command can be used to load applications and other data as required 6 1 2 5 Read Word The Read Word function is the companion to the Load Word function It is a task listed in the command table of the kernel to be invoked from the host It will transmit to
210. nstruct an infra red camera using the Rockwell TCM 1000C or another IR array the continuously variable filter and to use this for example to obtain information concerning the makeup of the gas and dust clouds surrounding protoplanetary disks as previously discussed Preliminary discussions indicate that the existing dewar cannot house both the array and the continuously variable filter and there 1s some concern about the optics required to use this filter with an imaging 12 The Cassegrain focus on the 41 cm telescope at the RAO is 20 which is much too slow for the IR camera It is therefore either the ARCT or the heliostat if the IR camera 15 to be used at the RAO 13 The heliostat has to be assembled and mounted but all the pieces are on site and the instrument has been used at the RAO before 4 Personal communication Dr T Alan Clark 15 Personal communication Dr D J I Fry Figure 1 4 Solar flare at Near IR Wavelengths 6 September 2001 Courtesy Dr T A Clark 13 detector Another possiblity is the concept of using an imaging array a slit a diffraction grating and some optics to devise a synthetic aperture imaging spectrometer This would allow great precision for spectroscopic data while at the same time preserving spatial information While this concept has not progressed beyond the back of the envelope stage it has been marked for further investigation and will likely result in a whi
211. nth day hours minutes seconds make up the FITS timestamp return 0 eae ee EERE EEE Spectral Instruments serial handlers obe oe fe c ac He He eH ea e o oe ae y int send serial DATABLOCK block char whiteratbuffer 80 if block gt whiterat TRUE first process the white rat if block gt outarm TRUE sprintf whiteratbuffer n rFROM HOST HEX VAL x block gt outptr ComWirt 1 whiteratbuffer strlen whiteratbuffer j if block outarm TRUE then process the SS card send char block outptr send char to Spectral Systems card 218 block gt outptr block gt outcount if block gt outcount 0 block gt outarm FALSE block gt outptr block gt outbuffer return 0 int receive block char whiteratbuffer 80 if chars_avail 0 block gt inptr get_char if block gt whiterat TRUE sprintf whiteratbuffer n r FROM CNTL HEX VAL x block gt inptr ComWrt 1 whiteratbuffer strlen whiteratbuffer block gt inptr block gt incount block gt inarm TRUE j return 0 int crack incoming DATABLOCK block char whiteratbuffer 80 char tmpchr int work 219 if block gt inarm TRUE if nothing coming in then skip if block gt incount gt 4 tmpchr block gt inbuffer 3
212. o cost exchange by IR Labs There is an invoice however which indicates that the University did in fact pay 2500USD for the replacement board 15 Except if it is run in DOS mode which is not an acceptable option 146 8 2 5 Problems with the IR Labs Host Program The IR Labs host program was written in 1996 and was intended to run on a PC running under MS DOS only and equipped with 640 by 480 resolution video adapter card only In order to run the host under Windows 98 it had to be completely rewritten It was also intended to control a completely different instrument and had features completely inappropriate to what was needed That the rewrite had to be done any event to accommodate the Spectral Instruments driver only forced the issue The result is that the host program presented in this report is a complete rewrite of the original IR Labs host program comprises some 4000 lines of code and took approximately four months to develop 8 2 6 Problems with the DSP56002 Software The DSP software supplied by IR Labs was not for the version of the timing board supplied and it was for a completely different array It was therefore necessary to analyse the supplied software strip out the portions which were not appropriate for the hardware available and then to rewrite the DSP software to suit the University of Calgary application This required an estimated 80 percent rewrite and while the code described in this report i
213. ock high DC BD2 DELAY CLK L YSYN L FRAME L final clock low FLUSH FIRST timing sequence to flush first 64 without transmit DC FLUSH SECOND FLUSH FIRST 2 DC BD2 DELAY CLK H YSYN L FRAME toggle clock up DC BD2 DELAY CLK_L YSYN_L FRAME toggle clock down FLUSH SECOND timing sequence to flush second 64 without transmit DC END TAB FLUSH SECOND DC BD2 DELAY CLK_H YSYN_L FRAME toggle clock up DC BD2 DELAY CLK_L YSYN_L FRAME L toggle clock down END TAB DC 0 end UC table endit Check for overflow in the EEPROM case IF DL IF CVS N LCV L gt 2 APL_NUM 1 100 3 WARN EEPROM overflow Make sure next application ENDIF will not be overwritten ENDIF ENDSEC End of program END End of section TIMIR La D 2 5 Assembly script for Motorola Assembler Under MS DOS asm56000 v b Iboot ls boot asm asm56000 v b d DL 0 d FOPCI 0 lapp ls app asm dsplnk btcm cld v boot cln del tcm lod del tcm p del tcm x cldlod tcm cld gt tcm lod srec b s tcm lod 63 364 APPENDIX E Host Program Error Codes ABEND OCCURRED ERROR CODE IS lt code gt This is a fatal error It should never happen but if it does happen it is because something happened in the message cracker Please report the incident and the message code to the software engineer CANNOT AUTOLOAD POSITION FUNCTION NOT IMPLEMENTED This is a non fatal error The host program cannot get position infor
214. of extinction and the mapping of dust column densities across the cloud In the 1994 paper they report having produced an extinction map with an angular resolution of 90 arc seconds They also report having found a positive linear correlation between the mean extinction and its measured dispersion and were able to show that the data obtained is not compatible with cloud models having uniform extinction or with having many small discrete high extinction areas In a later paper Lada et al discuss the application of this technique to an investigation of the Northern Streamer portion of IC 5146 In this paper they discuss work done in 1995 at Kitt Peak National Observatory using the 2 1 metre reflector with a NICMOS III array as the detector They report that with this equipment they were able to 7 Lada C J Lada E A Clemons D amp Bally J 1994 ApJ 429 694 8 Their test case was IC 5146 9 Lada C J Alves J Lada E A 1999 ApJ 512 250 10 The NICMOS III chip is a 256 by 256 HgCdTe IR array manufactured by Rockwell 10 obtain a FWHM spatial resolution of 1 pixel approximately equal to 1 09 With this after the application of some spatial filtering and other data extraction techniques they were able to obtain the first distance estimate to the Northern Streamer approx 460 pc They were also able to derive detailed contour maps ofthe equivalent visual extinction in the Northern Streamer their Figure 4 rep
215. ofit Knowing fully they are men Poul Anderson xxlii CHAPTER ONE INTRODUCTION The Moon The Moon is to blame Drug addled cry frequently heard in Golden Gate Park San Francisco late 1960 s Ah yes Must be the moon And reply 1 0 INTRODUCTION This thesis concerns itself with the design and construction of an infra red camera built around a Rockwell TCM 1000C infra red array and intended for astronomical observation at the Rothney Astrophysical Observatory RAO at the University of Calgary It is not a thesis concerning the science which can be done with such a camera rather it is a chronicle of the engineering effort required to assemble such a device from disparate pieces Asanexample the controller for the camera was obtained from Infrared Laboratories IR Labs in Tucson Arizona as was the dewar in which IR array is mounted Some electronics for the array are derived from an original Rockwell design whereas other electronics were designed and built at the University of Calgary Some thousands of lines of C language were written specifically for this application at the University of Calgary as well as approximately 1000 lines of assembler for the controller not to mention an approximate 750 kilobyte source library downloaded from NASA and modified for the application The resulting instrument has utility in its own right as a scientific instrument and is intended to be used as such However many w
216. oing temperature maps of Seyfert galaxies and other objects with active galactic nuclei About three months of work went into this effort using both the 41 cm telescope and the ARCT and the feasibility of such an effort has been shown This investigation was run in parallel with the task of assembling the components for the IR camera Unfortunately due to the complexity of the actual assembly of the camera and support systems as well as the sequence of events described below it was not possible to do any photometry using the camera 1 One particularly appealing object is NGC 4631 This object covers three arc minutes and covers an entire plate on the 41 cm telescope To image this object with the ARCT would be difficult at best given the present condition of the ARCT 2 There are some considerations concerning the mounting of the telescope at the ARCT These considerations will not be addressed in this document 139 8 1 Status As Of This Writing As of this writing late October 2001 the IR camera has yet to see first light The camera is at this writing completely assembled save some wiring on the dewar plug and the cabling between the controller and the preamplifier assembly The filters that are in place are not what had been hoped for The filters now in place are not filters that are in the Johnson Cousins system They have narrow passbands and arc designed to remove as far as is possible the effects of water vapour in
217. ok oe oe aje afn int CVICALLBACK light timer int panel int control int event void ptr1 int dum1 int dum2 This is cheating This makes use of the fact that the timer is on the same panel MAIN as the light Beware of this if you change the code SetCtrlVal panel MAIN donelight FALSE shut off the light SetCtrlAttribute panel MAIN donelight ATTR LABEL VISIBLE FALSE SetCtrlAttribute panel MAIN light timer ATTR ENABLED FALSE turn the timer off return 0 int CVICALLBACK timeout timer int panel int control int event void ptr1 int dum1 int dum2 same trick as above 224 SetCtrl Val panel MAIN timeout TRUE SetCtrlAttribute panel MAIN timeout ATTR LABEL VISIBLE TRUE SetCtrlAttribute panel MAIN abort ATTR DIMMED TRUE SetCtrlAttribute panel MAIN timeout timer ATTR ENABLED FALSE return 0 void CVICALLBACK cbhist int menubar int menuitem void block int panel int status char workstr 80 status LaunchExecutable explorer exe hlp history htm if status FALSE sprintf workstr NO HIST FORKING CODE IS d status error_message block workstr j return void CVICALLBACK cbhelp int menubar int menultem void block int panel int status char workstr 80 status LaunchExecutable explorer exe hlp index html if
218. oller was not reasonable and the author offered to fund the construction of the controller out of her own pocket This offer was declined Eventually a controller was obtained at no cost from IR Labs The controller was a design prototype and the documentation available from IR Labs did not match the hardware 9 See Figures 8 2 and 8 3 overleaf 10 Figures 8 1 8 2 and 8 3 are from a presentation given in July 2000 concerning the need for a controller and preamplifier 143 UNIVERSITY OF CALGARY 2 5 MICRON CAMERA PROJECT OPTION 1 OPTION 2 MINIMUM FULL SYSTEM SYSTEM COST 800USD COST 1200USD CAPABILITIES CAPABILITIES MINIMAL INCLUDES DSP CANNOT BE CAN HANDLE EXPANDED COMPLEX TASKS RISK OF HEADROOM FOR UNDERDESIGN FUNCTION CREEP Fig 8 2 Cost Estimate of Proposed In House Controller Design AMP SIG COND feit li RAW PIXEL DATA i NT a DAW ud nin CONTROL a E L li PROCESSOR DIGITIZED CONTROL STORES DSP PROGRAM DSP SIGNALS TO M CAMERA F 5 GATE FLASH ARRAY HERSEY GLE LOGIC TO CABLES LINE DRIVER PC IN CONTROL ROOM STORES IMAGE IN DIGITAL FORM CONVERTS APPROPRIATE CONTROL FEDERER fie VOLTAGE LEVEL SIGNALS TO i ELTER i CAMERA ha 7 Figure 8 3 Block Diagram Proposed TMS320C3
219. om setup routines int source comes through circular ring marks which menu generated the command int incntl marks which control was toggled used in crackers referenced by switch int work standard work variables 203 int work2 DATABLOCK Block datablock gets passed around between various routines DATABLOCK block the pointer that allows this to happen on entry must set up pointers as everything else works out of these objects block amp Block set pointer to the data block initial system setup this is all there is to the initial system setup user has the opportunity to set the working directory and to read or store a new configuration m ecode init windows block open all the screens ss m ecode init spectral block set up the Spectral Instruments card m ecode allocate buffers block set up the video buffers m ecode get home dir block find out where the home directory is m ecode init object block initialize the block object m ecode config read block read the configuration file end initial system setup BEGIN BACKGROUND LOOP ak ake ke k ak m ecode 0 while m ecode 0 send serial block Senda character out 204 receive serial block geta character in crack incoming block run the serial port message cracker run dma blo
220. one systems officers will clip on to the circuits with an amplifier and speaker so they can hear the traffic on the system without alerting personnel using the system that they are listening in These devices are known as White Rats anything that looks like a dumb terminal 134 Labs controller to the dumb terminal The software is not set up to display characters rather it will display the hexadecimal code for the characters transmitted 7 6 Errors There are three possible types of errors which can occur These are fatal error condition correctable error condition and error arising from within the FITS library MESSAGE ME FEATURE NOT IMPLEMENTED THIS VERSION Figure 7 4 Error Screen 7 6 1 Fatal Error If the host program encounters a fatal error then the program will immediately abort and display a message to SYSERR stating the application screen number and the control number which generated the error These errors are caused by coding errors or bugs and 16 If SYSERR is not available the CVI run time package will open a window for SYSERR 135 should be reported as displayed to the author of the code 7 6 2 Correctable Error If the host program encounters a correctable error condition during operation it will display a special screen such as that seen in Figure 7 4 which states the error and gives the user the option of continuing by clicking on OK or of exiting immediately If the use
221. orkstr amp status m ecode GetCtrl Val block gt imagemenu IMAGE air mass workstr air mass m ecode FITS update key fptr o TSTRING AIR MASS NULL workstr amp status close the FITS file and report any errors FITS close file fptr amp status FITS report error stderr status the very last thing we need to do before we exit is to reset the working directory must use ful pathname not just a relative path SetDir block gt wdname return status j 281 EEEE EEE EE EE EEE EE END FITS HANDLERS He Ae He A HEH EEE ISI CONFIG FILE HANDLING ROUTINES i o b d ooo d oko oo odo the reason this is split out is because the config file may not necessarily be IN the startup directory int get home dir DATABLOCK block int m ecode int work char workstr 80 get home drive and directory m ecode GetDrive amp block gt homedrive amp work if m ecode lt 1 sprintf workstr CONFIG READ ERROR ON GET LOCAL DRIVE CODE d m_ecode error_message block workstr return FAILCODE m ecode GetDir block gt homedir if m ecode 0 sprintf workstr CONFIG READ VO ERROR ON GET LOCAL DIR CODE d m_ecode error message block workstr retum FAILCODE return SUCCESS in
222. ot populated Not populated Not populated 173 Table 4 DB 37 for Controller to External Preamplifer Pinout Designator Function CLK Array clock YSYN Row Sync FRAME Frame POWER Amp chip enable CSH close shutter CSHH close shutter hold OSH open shutter OSHH open shutter hold spare spare 15VDC 15VDC 15 15VDC GND GND spare spare spare 15VDC 15VDC GND GND GND GND GND GND GND GND GND GND GND spare spare amp power on spare microswitch tA RW Table B 5 DB 25 for Controller to Filter Wheel Controller Pinout Designator 15VDC 15VDC unused 15VDC 15VDC unused GND GND spare spare spare spare spare spare spare spare spare spare spare spare spare amp power on microswitch Function DC PWR DC PWR do not use DC PWR DC PWR do not use DC PWR DC PWR to filter cntl to filter cntl to filter cntl 174 APPENDIX C NARROW BAND FILTER CHARACTERISTICS 175 176 iH Band 1622 152 20 4256 100 80 50 c o 2 8 40 1 Custom Scientific 20 50 West Ocotillo Rd Phoenix Arizona 85013 Voice amp Fax 602 241 1668 customsciG delphi com 0 1400 1450 1500 1550 1600 1650 1700 1750 1800 Wavelength Figure C 1 iH Filter Passband Data for iH iK and iL filter passbands courtesy Custom Scientific 50 West Ocotillo Road Phoenix AZ
223. otentiometer on the cover plate for the reduction gear housing engages a shaft on the reduction gear and is held in place with a setscrew In order to tighten this setscrew it is necessary to reach up from underneath into the reduction gear housing with the appropriate wrench while observing the work with a mirror The controller for the stepper motor is mounted below the stepper motor reduction gear housing as shown in Figure 4 15 73 VACUUM GLAND REDUCTION GEAR HOUSING OUTER SHELL POTENTIOMETER STEPPER MOTOR 7 CONTROLLER MOUNT CONTROLLER Figure 4 15 View of Completed Filter Wheel Drive With Stepper Motor Reduction Gear Housing and Stepper Motor Controller 4 6 Final Assembly After the inner and outer assemblies are completed the getter should be heated in an oven to 150 C for 24 hours Immediately after it is removed from the oven it should be mounted on the getter mount inside the dewar and the inner and outer cover plates placed on the dewar Instructions for preparation of the O ring for the outer cover and for preparation of the cover to outer shell interface are the same as for mounting the outer shell 74 to the baseplate Tighten the cover bolts using the tightening sequence shown in Figure 4 9 Invert the dewar so that it is resting on the outer cover plate connect it to a vacuum pump pump it down and check for leaks If it holds a vacuum then load the inner and outer dewar chambers wi
224. ounting the filter wheel assembly 42 Plate The cold plate is a copper plate which serves as the chassis for the IR camera This plate is mounted on a bellows assembly which in turn is mounted inside another bellows assembly which supports the inner shield for the camera It is imperative that the bellows be subjected to as little mechanical stress as possible during assembly of the camera For this reason it is recommended that during assembly both the cold plate itself and the outer shell ring be immobilized using wooden shims After the inner shell is mounted to its ring it will be attached to the cold plate via the G 10 standoffs and the inner shell and the cold plate will form a rigid assembly Figure 4 4 shows the cold 6 Such as a Chapman Mfg Co 1316 tool set 7 G 10 is an epoxy glass weave material from which printed circuits are manufactured It is used here for its thermal insulation properties See Page 56 61 plate with mounting hole locations and wooden shims px FILTER WHEEL MOUNT WOOD SHIMS Figure 4 4 Cold Plate 4 3 IR Array Assembly The IR array assembly consists of a thermal and mechanical link to the cold plate support electronics for the IR array itself the chip carrier a light shield and assembly hardware The disassembled view ofthe IR array assembly is shown in Figure 4 5 overleaf 62 CHIP PILLOW CARRIER B OCKS uen SHIELD BOTTOM ELECTRONICS
225. ow Don t overflow DSP P space ENDIF End of initialization code Put some of the code in the interrupt vector area that is not used from 18 to 3B PGM STR then continue on at 3E PGM CON gt 306 ORG P PGM_STR P PGM_STR ROM OFF _ Program start Test serial receiver contents START JSET BIT X TCSR CHK If timing down go elsewhere JSET MOD X STATUS APPLICATION TST RCV JSR GET Geta command from the receiver stack START If none test for timer and application Process the receiver entry is it in the command table HDR MOVE X R2 A _ Get the command buffer entry MOVE lt COM_TBL RO Get command table starting address DO NUM_COM END_COM Loop over command table MOVE X RO X1 Getthe command table entry 0 5 Does receiver table entry NOT COM No keep looping ENDDO Yes restore the DO loop system registers Wait for the complete command and then jump to it TST MOVE recent SCI word MOVE lt 0 0 Isit CR JNE lt TST_END No gt keep waiting R5 Yes gt execute the command NOT COM MOVE R0 Increment the register past the table address END COM It s not in the command table send an error message ERROR MOVE lt 0 _ Send an error message ERR JMP FINISH2 Construct a simple reply for t
226. ow Width 660 File 0011 File Type User Interface Resource Path f milone host debugmenu uir Res Id 11 Exclude False Disk Date 3079026060 Project Flags 0 Window Top 94 Window Left 42 Window Height 400 Window Width 676 File 0012 File Type User Interface Resource Path f milone host filemenu uir Res Id 12 Exclude False Disk Date 3075306526 Project Flags 0 Window Top 117 Window Left 54 Window Height 400 189 Window Width 660 File 0013 File Type User Interface Resource Path f milone host filtermenu uir Res Id 13 Exclude False Disk Date 3076010050 Project Flags 0 Window Top 94 Window Left 42 Window Height 400 Window Width 660 File 0014 File Type User Interface Resource Path f milone host imagemenu uir Res Id 14 Exclude False Disk Date 3079033344 Project Flags 0 Window Top 94 Window Left 42 Window Height 400 Window Width 660 File 0015 File Type User Interface Resource Path f milone host main uir Res Id 15 Exclude False Disk Date 3079018116 Project Flags 0 Window Top 94 Window Left 42 Window Height 400 Window Width 660 File 0016 File Type User Interface Resource Path f milone host setupmenu Res Id 16 Exclude False 190 Disk Date 3077128012 Project Flags 0 Window Top 163 Window Left 78 Window Height
227. ow itself will be saved as a file with the extension UIR and an include file will be generated as well This include file must be referenced in the host program for the host program to be able to access objects within the window One window isthe parent window all other windows are child windows of the wy IR CAMERA MAIN MENU HELPE EE re ELECTIO A X ip Ya rr anis s Tota pp D CE per Pur e J a ime 4 DEEUNATON 566 iini 0 V OBJECT NAME Phineas Preeak don s SISET EXPOSURE TIME MSEE zs qo oar etl up cea 1 SET ARRAY DC BIAS nV ncn 2524 INTEGRATION FILE MENU ok MENU ye cu moe ar eA Mise 184 jt ecc ETHER OM y _ PT fA MENS ELE o a S SEEN MESI SETUP MENU FILTER MENU Figure 7 2 Typical Control Window 123 parent The image control window shown in Figure 7 2 is a typical control window Each window has a handle associated with it and the value of that handle is dependent upon the sequence in which the windows are created Because the values of the handle are dependent upon the order in which the windows are created there are define statements within the host program which must be synchronized with the window setup routine to ensure proper operation of the host program The windows are not disp
228. p restriction SET 10 RTS Return from subroutine Delay for serial writes to the PALs and DACs by 8 microsec PAL DLY DO 200 DLY Wait 8 usec for serial data transmission NOP DLY RTS Delay between power control board instructions DLY PWR DO 40001 PDLY NOP L PDLY RTS Set video offsets and DC bias supply voltages SET BIAS NUM MOVEP X EN SLX PCC Enable the SSI JSR PAL DLY Wait for the SSI port to be enabled MOVE X R2 A_ First argument is board number 0 to 15 REP 20 LSL A MOVE 0 MOVE 2 Second argument is DAC number 0 to 7 REP 14 LSL A 321 OR X0 A BSET 19 Al Setbits meaning DAC BSET 18 Al MOVE MOVE X R2 A_ Third argument is voltage value MOVE 5000 0 Mask off just 12 bits to be sure AND Y0 A OR X0 A MOVEP A X SSITX Write the number to the DAC MOVEP X DISA SLX PCC Disable the SSI JMP FINISH Power off PWR OFF MOVEP X EN SLX PCC Enable the SSI BCLR CDAC X lt LATCH Clear all DACs BCLR ENCK X lt LATCH Disable DAC output switches MOVEP X LATCH Y WRLATCH BSET LVEN X PBD LVEN 1 gt Power reset BSET HVEN X PBD BSET HVEN X PCD timPC value BCLR MOD X STATUS Command execution mode BCLR RST_MOD X STATUS Continuous reset mode off X DISA SLX PCC Disable the SSI JMP FINISH Start power on cycle CAM ON MOVEP SLX PCC Enable the SSI BSET CDAC X lt LATCH
229. plete i image EE EE E E E E E E E z ok Call multiple read array with number of read pairs 1 RRR MOVE lt MOVE lt RA JMP L MRAO Reset array wait read it out n times expose read it out n times M RA MOVE X R2 A MOVE A Y N RA Desired number of reset read pairs L MRAO JSR XMT DON Temporarily transmit DON for FO case only MOVE CHK RS Don t check for incoming commands JSR RESET ARRAY Reset the array twice JSR SHORT DELAY Call short delay for reset to settle down DO lt Read N RA times JSR RD ARRAY Call read array subroutine NOP L MRAI MOVE L_MRA2 R7 JMP EXPOSE Delay for specified exposure time L MRA2 DO Y N MRA3 Read RA times again JSR RD ARRAY Call read array subroutine NOP L MRA3 320 JMP END EXP This is the end of the exposure E oko ok oe ke k ok oe ok fe oke fe oko ok ook ok ok oko oe ko SUBROUTINES He Ae fe eo Core subroutine for clocking out array charge CLOCK MOVE Y RO X0 of waveform entries MOVE Y RO A Start the pipeline DO X0 CLK1 Repeat X0 times MOVE A X R6 RO A Send out the waveform CLKI MOVE 6 Flush out the pipeline RTS Return from subroutine Update the DACs SET DAC DO Y RO SET 10 Repeat X0 times Y RO0 X SSITX Send out the waveform JSR lt PAL DLY Wait for SSI and PAL to be empty NOP Do loo
230. r block gt wddir m_ecode estab_dir block after all of that make the data dirs if m_ecode PASSED block fileset open TRUE j error_message block ERROR ON CREATING SUBDIRECTORIES else break default default trap break should never happen but we ll ignore that for the moment if m_ecode ERROR SetCtrl Val block gt mainmenu MAIN_ overrun TRUE SetCtrlAttribute block gt mainmenu MAIN overrun ATTR LABEL VISIBLE TRUE return 0 EEG ee EEE END MESSAGE CRACKER FOR FILE MENU ERE ES SES Message cracker for ERROR menu int error cracker int event DATABLOCK block int source int ecode int work switch event case ERRMSG clear error return HidePanel block gt errormenu return 0 break case ERRMSG exit error exit right now HidePanel block gt errormenu close_program block return 1 234 default default trap should never happen but we ll ignore that for the moment return 0 j This is a service routine not a cracker However it is a special case so it is put here not elsewhere in the code This routine displays the error message as given to it by the routine which had the error void error message DATABLOCK block char inmsg DisplayPanel block gt errormenu ResetTextBox block
231. r opts to continue she should be aware that performance will be degraded by the condition which caused the error 7 6 3 FITS Library Error As stated above the FITS library is a canned library obtained from NASA and written for another platform The encapsulation around this library and the integration with the host program is believed to be fairly good however there exists the possibility that the FITS library will generate an error condition If this occurs the error will be displayed on the same screen as that shown in Figure 7 4 with the notation FITS ERROR XXXX where XXXX is the number internal to the FITS library and which denotes the nature of the error The error codes obtained with the library are reproduced in Appendix F 17 s Try goanna shaw ca goanna g postmaster co uk 18 Examples of error conditions include the Spectral Instruments card not present critical files not available and errors in the configuration file data CHAPTER EIGHT CONCLUSION 136 Dulce et decorum est pro patria mori Horace Like hell Country Joe McDonald 3 138 CHAPTER 8 CONCLUSION 8 0 Overview The objective of the research was to build an infra red camera image objects with the camera and to investigate the characteristics of these objects Preliminary work at the RAO using the 41 cm telescope indicated that it would be ideal for photometry on extended objects One particularly appealing task was the possibility of d
232. r the filter wheel contains two sets of bearings The first bearing is for the spur gear which turns the filter wheel and consists of a bushing only The second 3 The filters are ih ik il and M Except for the M filter these filters are narrow band filters not in the Johnson Cousins system Characteristics for these filters are given in Appendix C 58 bearing is for the filter wheel itself This second bearing is a ball bearing assembly with the ball bearings running in a groove On the opposite side of the filter wheel from the ball bearings is a teflon thrust washer and a compression spring made from 0 006 inch shim stock Figure 4 2 shows the front of the filter wheel assembly SHUTTER ASSEMBLY FILTER WHEEL BEARING D SPUR GEAR DRIVE BELLOWS Figure 4 2 Front View of Filter Wheel Assembly 4 If it becomes necessary to disassemble the filter wheel housing you will lose the ball bearings onto the bench you are working over You should disassemble the housing over a cloth so that the bearings are caught by the cloth When reassembling the housing set it up in a Palmer vise so that the race is up and the housing is level Load the ball bearings into the groove and then mount the filter wheel The bearings are 1 millimetre in diameter and are available from stock from several vendors 5 Front is defined as the side facing the light source 59 Note the shutter assembly This assembly consists of an alumin
233. rame timestamps for the data for where the raw time hack updated exposure time milliseconds controller port bitmapped flags ADC bias ADC board gain outbound buffer count of outgoing chars pointer to current outgoing char arming toggle inbound buffer count of number of chars in pointer to end char in buffer arming toggle flat sequence counter dark sequence counter back sequence counter image sequence counter 297 Point framelpoint point structs as used in CVI Point frame2point debug stuff BOOL whiterat the white rat toggle filter handler stuff BOOL home_ found marks if fiducial is found BOOL filter_moving marks if filter wheel is moving int active filter number the number of the filter in front of the detector int active filter target the number of the filter to be moved to BOOL filter power marks whether power is available to the filter wheel 8255 port stuff unsigned long port base the 8255 base address unsigned short port a port image 8255 unsigned short port b port B image 8255 unsigned short port c port C image 8255 unsigned short cntl control port image 8255 DATABLOCK NITIALIZATION FUNCTIONS int init windows DATABLOCK int init spectral DATABLOCK int
234. rd for the shutter solenoids The electronics package is mounted on the side of the IR camera dewar and requires a clean bipolar power supply of 12 to 15 volts DC The individual subassemblies in this package are discussed in detail below the schematics and fabrication drawings used in the manufacture of the package are shown in Appendix A 3 2 1 Preamplifier The preamplifier has two channels to accommodate the possibility that the Rockwell chip may be run in dual output mode The channels are identical Each channel consists of a two stage amplifier with an AD743 op amp set up as a voltage follower feeding an LM6181 also set up as a voltage follower as a line driver The LM6181 is terminated with a 51 ohm resistor in series with the output to match the characteristic impedance of the RG 174 U coaxial cable used to connect the preamplifier to the electronics in the control room 12 Photocopy of best copy available 13 The wiring is in place for running the chip in dual output mode The software as of this wnting is intended to drive the chip in single output mode In order to run the chip in dual output mode the waveform table in the controller code must be revised and the host software must be modified to de interlace the outputs and to assemble them into an image The advantage to running in dual output mode is that the chip can be read at twice the rate The disadvantage is that doing so places an additional software burden on
235. read expose read Results in DMA transfer Multiple read of array Results in DMA transfer Abort Stops interval timer and returns Immediate return included to trap bad command Returns TST to host Communication test Set exposure timer Writes to counter for interval timer Load word Loads word to output port for diagnostic Open shutter Close shutter Table 6 1 Tasks Available in RAO Application as of October 2001 6 1 3 1 PON Power On The power on command loads the clock generator board DACs which serial DACS using tables which are loaded as part of the application program The tables supplied by IR Labs have been rewritten to define values and functions appropriate to the RAO application This command will initialize all DACS turn on the DC low voltage supply wait out all ramp timings and apply power to the preamplifier It incorporates the Set Bias Voltage SBV task as a subtask It returns DON to the host program 112 6 1 3 2 POF Power Off The power off command simply shuts off the low voltage power supply It returns a DON to the host program 6 1 3 3 SBV Set Bias Voltage The Set Bias Voltage command loads the clock generator board DACs using the RAO tables which are loaded as part of the application program While this task has an entry in the command table it is not directly accessible to the host program In the application program it is instantiated as an entry point in the pow
236. rein required functions are not linked into a program until run time This decreases the size of the program at the cost of having to load more than one package into memory This technique 1s extensively used by Microsoft operating systems and software written to run on Microsoft operating systems DMA Direct Memory Access DRAM Dynamic Random Access Memory DSP Digital Signal Processor Dynamic RAM See DRAM EEPROM Electrically Erasable Programmable Read Only Memory Sometimes written FITS Flexible Image Transport System A file transfer format extensively used in astronomical and astrophysical work Flash memory Nonvolatile memory which can be erased in situ and then reprogrammed also in situ using normal voltages FPGA Field Programmable Gate Array gate array that can be programmed and or reprogrammed by the end user often under program control FWHM Full width half maximum xvii GUI Graphic User Interface Harvard Architecture A computer technology wherein the program memory and the data memory are separate data spaces Indium bump technology technique for mating two wafers On one or both the wafers the intended connections have indium deposited on them The mating faces are then aligned and brought together under pressure If all goes well the indium will deform and form good electrical connections Also known as Flip Chip technology IR Array A photosensitive CCD like array de
237. rent control 3 7 volts VDD DC 5048878 pin 5 digital power 4 0 volts VUNUSED DC 04 000 pin 6 unused to Zero out the DC biases during the power on sequence ZERO BIASES DC DACS ZERO BIASES 1 DC 0c8000 Pin l board 0 DC 0cc000 Pin 2 DC 0d0000 Pin 3 DC 0d4000 Pin 4 DC 0d8000 Pin 5 DC 0dc000 Pin 6 DC 1c8000 Pin 1 board 1 DC 1cc000 Pin 2 DC 85140000 Pin 3 DC 5144000 4 8148000 Pin 5 DCS 1dc000 Pin 6 Initialize all DACs starting with the clock driver ones DACS DC READ 5 1 DC BD2 8 0 14 CLK HIGH Pin 1 RESET DC BD2 8 1 14 CLK LOW 325 DC BD2 8 2 14 CLK HIGH Pin 2 LINE DC BD2 lt lt 8 3 lt lt 14 CLK_ LOW DC BD2 lt lt 8 4 lt lt 14 CLK_HIGH Pin 3 LSYNC DC BD2 8 5 14 CLK LOW DC BD2 8 6 14 CLK HIGH Pin 4 FSYNC DC BD2 lt lt 8 7 lt lt 14 CLK_ LOW DC 2 lt lt 8 8 lt lt 14 HIGH Pin 5 PIXEL DC BD2 8 9 14 CLK LOW DC BD2 8 10 14 CLK HIGH Pin 6 READ DC 2 lt lt 8 11 lt lt 14 LOW DC 2 lt lt 8 12 lt lt 14 Pin 7 not connected 0 volts DC BD2 lt lt 8 13 lt lt 14 DC BD2 lt lt 8 14 lt lt 14 Pin 8 not connected 0 volts DC BD2 lt lt 8 15 lt lt 14 Define switch state bits for the clocks L RST EQU 0 H RST EQU 1 L LINE EQU 0 H_LINE EQU 2 L LSYNCEQU 0 H LSYNCEQU 4 L
238. rlAttribute block gt filtermenu FILTER blank led ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER empty led ATTR OFF COLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER empty led ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER filter 1 led ATTR OFF COLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER filter 1 led ATTR ON COLOR VAL GREEN 257 SetCtrlAttribute block gt filtermenu FILTER filter 2 led ATTR OFF COLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER filter 2 ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER filter 3 led ATTR OFF COLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER filter 3 led ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER filter 4 led ATTR OFF COLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER filter 4 led ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER moving led ATTR OFF C OLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER moving led ATTR ON COLOR VAL GREEN SetCtrlAttribute block gt filtermenu FILTER stopped led ATTR OFF C OLOR VAL GRAY SetCtrlAttribute block gt filtermenu FILTER stopped led ATTR ON COLOR VAL GREEN after all the above load the menu bar for the main menu block gt menuhandle LoadMenuBar block gt mainmenu MAIN UIR MENU SetMenuBarAttr
239. roduced here as Figure 1 3 Dec 2000 0 RA 2000 0 Figure 1 3 Contour Maps of Equivalent Visual Extinction Northern Streamer Scientific Corporation It was replaced 1996 by the PICNIC chip which also 15 256 by 256 and which has the same spectral range The spectral response curve for the PICNIC is shown at the end of this chapter as Figure 1 5 While the NICMOS III and PICNIC detectors are descendents of the TCM 1000C they have a different spectral range than does the TCM 1000C The spectral response curve for the TCM 1000C 15 shown at then end of this chapter as Figure 1 6 and 15 included for comparison 11 In our case with ARCT at the RAO and an estimated field of view of 55 arc seconds across 128 pixels we are estimating a spatial resolution of 0 43 per pixel 11 All the above applications are deep field applications requiring the 1 8 metre telescope at the RAO However there is a heliostat at the RAO and with the aid of a suitable neutral density filter it can be used for solar observations Images such as that shown in Figure 1 4 overleaf are possible to obtain by means of this camera In the wild eyed idea department there is a continuously variable infra red filter available for the 2 to 4 micrometer range While this author has not seen the device and has no data on its operation it is reported to be able to slice its operating range into approximately fifty bands If so it might be possible to co
240. rom the fibre optic link Since this is an optical link ground loops hum and noise from the copper connection are eliminated Additionally the distance restriction between host and controller placed on the system by the SCSI 3 cable is removed Finally with the optical link the IR Labs controller may be mounted directly on the telescope near the camera minimizing hum and pickup 20 Working with this requires dealing with a VXD device driver under Windows 98 and a DLL Details are given in Chapter 7 49 3 3 2 Clock Generator Board The clock generator board consists of 24 channels of output The voltage of each output can be set under program control and the board is designed so that the outputs may be paired up to form differential sets Alternatively the outputs can be referenced to common There are six blocks of channels on the board along with some multiplexers and isolation amplifiers intended for troubleshooting There are also conditioned reference voltage generators supplying 5 volts Each block of channels consists of two Analog Devices DAC8240 serial load D A converters These DACs have four channels of output and are preset by the timing board during boot or when commanded to do so by the host After they are set their output voltages do not change The outputs from the DAC8240 is then fed to a pair of Siliconix DG613 four channel analog switches with the channels in four groups of two From here groups
241. ror ORG P SCI_ERR P SCI ERR ROM_OFF JSR lt 5 DSP Timer interrupt for exposure time control ORG P TIM_ISR P TIM_ISR ROM_OFF JSR TIMER Long interrupt service routine NOP Put the ID words for this version of the ROM code It is placed at the address of the SWI software interrupt which we never use ORG PROM ID P ROM ID ROM OFF DC 5010101 Institution University of Calgary Location RAO Instrument IR Camera DC 000023 Version 0 23 board 2 timing board 0 video Ye OE NOE Permanent address register assignments R1 Address of current contents of PCI board receiver R2 Address of processed contents of PCI board receiver R3 Adress of current contents of PCI board transmitter R4 Adress of processed contents of PCI board transmitter 332 R6 CCD clock driver address for CCD 0 It is also the A D address of analog board 0 T R7 Return address after exposure calls may be used sparingly Other registers RO and R5 Temporary registers used all over the place d Occo ook oj oe ok oko ok oko oe E E E E EEE o olo ok oe ok o oko ce ook E E E a eC i 3 Initialization code is in the application area since it executes only once ORG P APL_ADR P APL ADR ROM OFF Download address Define this
242. rray this effort was deemed not feasible early on and the focus was shifted to the Rockwell IR array With attention shifted to the Rockwell TCM 1000C it seemed important to determine the suitability of such a camera at the RAO This resulted in many nights at the 4 telescope doing imaging and at the 1 8 metre telescope doing IR photometry to determine if the construction of an IR camera using the Rockwell array is a reasonable 4 Section title from J Tolkien Hobbit 5 E F Milone June 2000 6 Without going into the intricate details of what happened when the author attempted to get technical information from the manufacturer suffice it to say that the array is an artifact of the Cold War 1s on the list of materials which may not leave the US or be in the hands of non US citizens They want it back never mind that it is 20 years oid 7 Dr David Fry Fred Babott Larry Harding and the author in attendance in various combinations at various times 141 proposition The data derived shows that the sky while marginal in the M band does not make observation in this band out of the question and in the H K and L bands the seeing can be quite good The data also indicates that with a field of view of 55 arc seconds in order to use the IR camera on the ARCT it would be necessary to mosaic the images with ramifications discussed elsewhere in this report However an imaging IR camera would give
243. s on the clock generator board LINE 0 CLK 0 PIN 1 YSYN 1 PIN 2 2 FRAME 2 PIN 3 LINE 4 POWER 4 PIN 4 LINE 3 Close Shutter 8 5 4 Close Shutter hold 10 PIN 6 5 Open Shutter 20 PIN 7 LINE 6 Open Shutter Hold 40 8 Shutter bit designators these get used in BSET and BCLR statements CLK BIT EQU 0 YSYN BIT EQU 1 FRAME BIT EQU 2 POWER EQU 3 CLOSE BIT EQU 84 CLOSE HOLD EQU 5 OPEN EQU 6 OPEN HOLD BIT EQU 7 Shutter bit patterns These get used in the wave tables Chip timing low and high are defined just before the wave tables UC POWER EQU 4 Power word UC SCLS EQU 8 UC close shutter word UC SCHD EQU 10 UC close shutter hold word UC SOPN EQU 20 UC open shutter word UC_SOHD EQU 40 UC open shutter hold word Clock board voltage definitions These definitions assume VREF 5 volts VREF 0 CLK HI EQU FFF CLK LO EQU 000 SHUT HI EQU FFF fullload 347 SHUT LO EQU 07A holding voltage 0 3 volts SHUT OFF EQU 000 board assignments for clock generator boards BDI EQU 001000 BD2 EQU 002000 assign the active clock generator board TB EQU BD2 video board stuff OFF MASK0A EQU 0c0000 offset mask video board 0 channel GAIN MASKOA EQU 5003000 gain mask video board 0 channel Miscellaneous definitions VIDEO EQU 000000 Video board select 0 for first A D board wi
244. s patterned on the code originally supplied by IR Labs it is substantially different Approximately 1000 lines of code were rewritten 16 And accept no substitutes The IR Labs host program will not work correctly with an AGP video adapter card 147 8 3 Recommended Work Aside from completing the assembly of the camera and an end to end test of the entire system the host software should be augmented to allow automatic operation The present software is designed for full manual operation and is not capable of taking sequences of images with filter rotation between the images This can be done with a moderate degree of effort and without disturbing the interface between the host computer and the IR Labs controller The host software was developed on a Windows computer using a 1024 by 764 resolution monitor and the font size on the development platform was set SMALL While this may seem to be a minor point the software must be tested against the actual target platform in order to ensure that there are no problems with screen size or font size and that all virtual controls the host software work correctly on the target platform There has been some discussion concerning the user interface for the host program Current thinking for the automated version is to include a game controller such as is found on a Sony PlayStation This approach has yet to be explored 17 Expected to be complete by New Year 2002 18 Actuall
245. s which would prevent it from making a vacuum tight seal between the 9 This O ring sizes as a 271 but is actually a 270 67 baseplate and the bottom of the outer shell The groove in the baseplate into which the O ring seats should then carefully be cleaned of all foreign matter and old vacuum grease The O ring should then be lubricated with a coating of vacuum grease and re seated and the sealing surface should be coated with a thin film of vacuum grease The outer shell may then be mounted on the baseplate and secured using the bolt tightening pattern shown in Figure 4 9 Figure 4 9 Outer Shell Bolt Tightening Sequence With the inner and outer shells in place the drive train may now be mounted The drive train consists of a spindle mounted on a bearing assembly an O ring with seal and a 10 Ethanol is a suitable solvent 68 gland assembly The housing for the gland assembly seals to the side of the outer shell with the O ring and is mounted by four bolts as shown in Figure 4 10 As was done when mounting the outer shell to the baseplate the O ring must be removed from its groove and the groove and all mounting surfaces must then be cleaned After carefully inspecting the O ring for nicks cuts and other defects the O ring should be lightly lubricated with a thin film of vacuum grease and re seated and all sealing surfaces should be coated with a thin film of vacuum grease MOUNTING HOUSING Figure
246. sed by the host program for displaying an HTML based on line help facility 7 2 1 Help Subsystem The host program is equipped with on line help feature which can be started by clicking on the task bar at the top of the main window This help feature is written in 130 HTML and will allow the user to understand and use the various features of the host program Other features are available from the taskbar 7 3 Dynamic Linked Libraries The National Instruments CVI C compiler uses the Microsoft API call structure This call structure has been superseded by another Microsoft call structure automatically generated by the Microsoft Visual Version 5 0 compiler and higher versions In order to use DLLs generated by the Microsoft compiler or which were obtained from other sources a library LIB file must be generated to match the the particular DLL and then included in the fileset used by the National Instruments compiler 7 3 1 Generating LIB files From DLL Files National Instruments is aware of the problem of incompatibility between the two forms of Microsoft call structures and has engineered into their tools features which allow for the generation of LIB files from third party DLL files order to do this it is necessary to make a separate project using the National Instruments project manager and to acquire 9 The HTML source code for the help function 1s found in Appendix G 10 ABOUT LEGAL and CHANGE HISTORY C
247. several direct callback functions in the host program However these are used only for menu bar callbacks and some timer functions The user interface is coupled to the program through the GUI interrogation function In order to avoid having global variables an object typedef DATABLOCK is defined during initialization as well as a pointer to this object which is used by the host program as the handle to the object items which are shared by all functions are within this object and the pointer to this object is passed during execution A high level block diagram of the background loop showing program flow and send serial receive serial crack incoming run utc clock run filterwheel USER BGRD LOOP scene setup cracker er acer cvicallback cvhelp cvicallback main cracker debug_cracker file_cracker error_cracker cvicallback light timer cbhelp cvicallback cblegal cvicallback timeout timer Figure 7 1 Host Program Background Loop GetUserEvent Reference 48 See Appendix D 122 direct callbacks is shown as Figure 7 1 7 1 1 Structure of Graphic User Interface The Graphic User Interface GUI consists of a collection of windows which were developed using the appropriate National Instruments tools within the compiler When such a window 15 developed and saved the wind
248. sfer UC RDARJSR SHORT DELAY need at least 1 millisecond delay JSR RD ARRAY read the array JMP FINISH send kissoff to PCI card change bias voltage on ADC card UC SB2 MOVE X R2 X1 get datum into X0 so move works easily MOVE lt 0 1 get mask from storage MOVE Y lt OFFSET Y1 get bare mask AND YI1 BI clear out old stuff OR move in new stuff MOVE BLY OFF 0 move to offset value storage JSR SETBIAS set the bias as requested JMP FINISH and exit change gain on ADC card UC SGN MOVE X R2 X1 get datum into so move works easily MOVE Y GAIN 0 1 get mask from storage MOVE Y lt GAIN Y1 get bare mask AND clear out old stuff OR XLBI move in new stuff MOVE BLY GAIN 0 move to offset value storage JSR lt SETBIAS set the bias as requested JMP FINISH and exit End University of Calgary additions 2 351 Short delay to allow array to settle down after reset SHORT DELAY MOVE Y RST DLY A Enter reset delay into timer CON DELAY Alternate entry for camera on delay MOVE A X TGT CLR A Zero out elapsed time MOVE A X EL TIM BSET 0 X TCSR Enable DSP timer CNT DWN JSET 0 X TCSR CNT_ DWN Wait here for timer to count down RTS Abort exposure and stop the timer ABR EXP CLR A Just stop the timer MOVE A X TGT JMP FINISH Send normal reply Dummy subroutine to not call receiver checking routine NO CHK BCLR
249. signed to be sensitive to various wavelengths or bands of infra red light ISR Interrupt Service Routine Masked memory A type of ROM in which the information is loaded during construction of the wafer by means of a deposition mask This is an obsolete technology Mezzanine board A circuit board mounted over another circuit board in order to gain board space real estate in a tight environment NASA National Aeronautics and Space Agency The United States Space Agency NMI Non Maskable Interrupt An interrupt which can not be disabled Orthogonal Instruction Set An instruction set where all instructions are available for all register combinations or at least the register combinations that make sense One Time Programmable Packed BCD BCD digits which take 4 bits each packed two to a byte Page mode A type of flash memory where erasure is done a page at a time PAH Poly aromatic hydrocarbon PID A control loop The acronym means Proportional Integral Differential Platform computer or microprocessor with all support systems a complete entity PLD Programmable Logic Device gate array PROM Programmable Read Only Memory Pseudo ops Computer instructions which look like machine language but for which there 15 no hardware to execute them An interpreter is required for execution This is a technique frequently used when putting together sequences of complex functions for which there is no direct hardw
250. sing MOVE lt 1 MOVEP XZERO XIPR Clear Interrupt Priority Register MOVEP X CFFFF X BCR Many Wait States for PROM accesses MOVEC X lt ZERO SP _ Clear the stack pointer MOVEC X lt C300 SR Clear the Condition Code Register MOVEC 01 0MR Operating Mode Register Reboot NOP Allow one cycle delay for the remapping JMP 0 Begin bootstrap from internal ROM Clear error condition and interrupt on SSI receiver CLR SCIMOVEP X SSR X RCV_ERR Read SCI status register MOVEP X SRX X RCV ERR Read register to clear error RTI Check for program space overflow into application code area IF CVYS N gt APL_ADR WARN ERROR Boot program overflows into application code area ENDIF Beginning of X definitions Status and header ID processing words ORG XO XLD X STATUS DC 0 Status word Timer related constants SV SR DC 0 Save for timer ISR SV BI DC 0 Save for timer ISR SV YI DC 0 Save for timer ISR Definitions for variables needed for the interrupt service routines SAVE SRDC 0 SAVE XIDC 0 SAVE BIDC 0 312 SAVE RODC 0 SCI BI DC 0 SCI RO DC SFFF6 Current address of the SCI SRXFST DC Address of first byte in SCI receiver SPARE DC 0 must be at address SE for compatability with IR Labs IREM EL TIM DC 0 Elapsed exposure time in milliseconds TGT TIM DC 0 EXP at beginning of exposure EXP TIM DC 1000 Exposure
251. situation that arises with a process can wait until the system gets around in the fullness of time to monitoring it Transients and other events can occur which require immediate attention and prompt corrective action of some type This requires that the 81 system be able to deal with emergencies and anomalies so that the process stays under control 5 3 6 Respond to the Communication Subsystem Usually in a real time system the communication package is a subsystem This subsystem is frequently interrupt driven and such interrupts must be dealt with promptly The interrupts that the communication subsystem generates are not emergencies but are servicerequests However the resource requirements ofthe communication subsystem must be accounted for when budgeting the resources of the system 5 3 7 Respond to NMI Emergencies An NMI Non Maskable Interrupt is an emergency interrupt of the highest order This interrupt is reserved for catastrophic failure of some nature and 1s almost invariably a shut down signal When this interrupt occurs the system must attempt to put the process into a safe mode put itself into a recoverable state communicate to its controller that it is going down and wait for the end 5 4 Internal Structure of the Real Time System In order to accomplish its mission the system will require the following major functional blocks Implicit in this discussion but not directly addressed are such functional SRef
252. sity of Calgary COMMENT This file is used to generate DSP code for the second generation timing boards to operate a PICNIC infrared array Fiber optic and PCI application files are now joined into one File modified 11 97 to generate timing waveforms similar to old versions of PICNIC delivered with the microscopes Changed Aug 98 to control Rev 6C power control board and use extended on board SRAM Base code University of Calgary Code is proved to work Date is 010705 Required command line switches DL 0 FOPCI 0 Modified 2001 07 9 by Anna Johnson Physics Department University of Calgary to support a Rockwell TCM1000 infrared array This is REV 0 23 software CHANGE HISTOR Y 2001 07 09 Added the following ops SEX Set exposure time TST return test message to host LDW direct load of word from host to WRSS OSH open shutter CSH close shutter Removed the following ops VDI Set video mode 1 VD2 Set video mode 2 Left in but unnecessary STP Stop video mode This is left in only for the moment and represents the only spare place in the command table The above ops and their associated code were cut out because while the TCM chip is intended to be run in stare mode for this pass it will not be run in video mode 345 The exposure code was also modified so that it adds the shutter flag SH MASK to the outgoing clock generator board word to keep the shutter where it is supposed to be during the exposur
253. ss of current contents of PCI board transmitter t R4 Adress of processed contents of PCI board transmitter R6 CCD clock driver address for CCD 0 ij 5 It is also the A D address of analog board 0 R7 Return address after exposure calls may be used sparingly Other registers and R5 Temporary registers used all over the place e gt 303 Initialization code is in the application area since it executes only once ORG P APL_ADR P APL_ADR tROM_OFF Download address Define this as simple jump addresses so bootrom program is sure to work until the application program can be loaded APPLICATION JMP lt 8 Defined so compiler has APPLICATION address Initialization of the DSP system register serial link interrupts 2 INIT This is executed once on DSP boot from and is not incorporated into any download code since its not needed 0002 OMR Operating Mode Register Normal Expanded set after reset by hardware ORI 03 MR Temporarily mask interrupts MOVEP MOVEP MOVEP MOVEP MOVEP MOVEP 0 X PBC_ Set Port B to general purpose 3FFF X PBDDR Set PBO to PB14 to outputs H0 AUX4 TXD EN RXD EN STATUSO to STATUS3 LVEN AUX3 FRAME LINE AUX2 PWRST is an input 5 4 020D X PBD RXD EN TXD EN 1 for enabling PCT communic
254. st to instantiate in hardware rings and circular queues There are a total of 68 operands making this a RISC processor The instruction set is not orthogonal across the register set and this is stated in the Motorola literature to be due to die size constraints However the instruction set is 1 This is not true if timing is of the essence All external data space accesses share the same physical port which can cause serious slowdown and bus contention problems 1 not carefully handled There are instructions to set clear and test individual bits within a word Reference 37 100 heavily parallelled with the second instruction usually a move The processor has numerous vectored interrupts including a software interrupt SWI and appropriate mask registers Onreset as implemented in the IR Labs controller this device expects to find an 8 bit wide EPROM at C000 in the program space An on board firmware loader will pull 1536 bytes from the EPROM and place it starting at 0000 in the program space and then branch to that address The program space in the range of 0000 to SO1FF is internal Both data spaces are internal in the range of 0000 to SOOFF Registers are memory mapped into one of the data spaces Figure 6 14 below shows the architecture of the Motorola 56002 DSP 18 Sus 14 59 Sus X Memory Memory 512 24 25852 24 256 24 RAM 58 v 24 NOM 258 24 RON 2 6 24 ROA
255. statement on this identity Finally the case statements for this last switch contain calls to the functions which actually do the work 125 7 1 3 Structure of Communication Subsystem The communication subsystem is built around a Spectral Instruments PCI 1826 interface card This card has a UART on board and also a level shifter to generate RS 422 423 differential signals It also has an on board DMA controller which receives data from the IR Labs controller The serial link is a control channel but does not pass image data from the camera The DMA channel is a 16 bit parallel channel but does not pass control data 7 1 3 1 Interface to Spectral Instruments PCI 1826 card The Spectral Instruments card is a PCI card capable of seizing a DMA channel and which can also generate interrupts In a Windows environment it requires a device driver VxD which must be present in the C WINDOWS SYSTEM directory This driver dynamically loads and links to the card on host program startup and unloads on host program exit The interface between the device driver and the host program is via a DLL and this DLL can be anywhere in the path on the host machine The installation program however will install the DLL with the executable in the host program directory 5 software and documentation will be found on the associated CD ROM as listed in Appendix The material associated with the PCI 1826 15 copyright c Spectral Instruments and 1 the
256. store RO MOVE lt Restore MOVE lt Restore RTI Return from interrupt service Interrupt service routine for the DSP timer called every millisecond TIMER MOVEC SR X lt SV_SR Save Status Register MOVE BLX SV Bl MOVE lt 5 Yl MOVE X lt ONE B MOVE X lt EL_TIM Y1 Get elapsed time ADD YIB lt 1 Get target time MOVE B X lt EL_TIM EL TIM EL 1 NO If EL GE TGT we ve timed out BCLR 0 5 Disable timer MOVEC X lt SV_SR SR Restore Status Register MOVE lt 8 BLBI MOVE X xSV YLYI RTI Return from TIMER interrupt Read DSP or EEPROM memory RDM address read memory reply with value RDMEM MOVE X R2 RO Need the address an address register MOVE X R2 A Need address also in a 24 bit register 20 ARDX _ Test address bit for read from P memory MOVE P RO X0 Read from Program memory JMP FINISH2 Send out a header ID with the value JCLR 21 A RDY Test address bit for read from X memory MOVE X RO X0 Write to X data memory 309 JMP FINISH2 Send out a header ID with the value RDY JCLR 22 A RDR_ Test address bit for read from Y memory MOVE 0 0 Read from Y data memory JMP FINISH2 Send out a header ID with the value RDR JCLR 23 A ERROR Test address bit for read from EEPROM memory MOVE lt
257. str return status fpixel 1 nelements NROWS NCOLS now write the image if block framel active TRUE m ecode FITS write img fptr TUSHORT fpixel nelements block dmal array amp status 279 if block frame2 active TRUE m ecode FITS write img fptr TUSHORT fpixel nelements block dma2 array amp status if m ecode 0 sprintf cs errstr FITS WRITE IMAGE ERROR CODE IS d status error message block cs errstr return status keywords must be written AFTER the image is loaded not before the reason is because the first keyword must be SIMPLE and if it is not then the FITS package gets upset and goes off into the night first write the date time group if block framel active TRUE m ecode FITS update key fptr TSTRING DATE NULL block gt timestamp1 amp status if block gt frame2_active TRUE m ecode FITS update key fptr ISTRING DATE NULL block gt timestamp2 amp status m ecode GetCtrl Val block gt setupmenu SETUP_ origin workstr ongin m ecode FITS update key fptr TSTRING ORIGIN NULL workstr amp status m ecode GetCtrl Val block gt setupmenu SETUP_telescop workstr telescope m ecode FITS_update_key fptr TISTRING TELESCOP NULL workstr amp status m ecode GetCtrl Val block gt setupmenu SETUP_instrume workstr instrument m ecode FITS_update_key fptr TISTRING INSTRUME NULL works
258. t Most real time systems are embedded systems although it is not unusual to find a real time system resident on a general purpose computer equipped with data acquisition Wilkes Ref 60 2 Embedded Systems Magazine Ref 6 78 SENSOR PACKAGE PROCESSOR COMM SYSTEM CONTROL OUTPUT y f 228 T Th v REMOTE process La mi lo MN Figure 5 1 Block Diagram of Real Time System devices However all real time systems will have a sensor package local memory and one or more ofthe following communication package provision for local control provision for remote control and the ability to control the process see Figure 5 1 5 2 Definition of Real Time Operation There is no universally accepted definition of real time operation however if a system software package and platform has the characteristics listed in this chapter it is generally considered to be a real time system 3 Wilkes Op Cit 79 5 2 1 Time Constant processes have a time constant This time constant is a parameter of the process not a parameter of the real time system 5 2 2 Ability To Stay In Real Time The ability to stay in real time means having the ability to respond properly to the demands of the process under control within the time constant of the process If this does not happen the system will be deemed to have lost real time 5 3 Mission of t
259. t config read DATABLOCK block FILE fsconfig file int m_ecode int work char workstr 80 char int filesize int 1 work char cs workstr2 80 unsigned ui work try to open the configuration file GetCtrl Val block gt filemenu FILEMENU config file workstr m ecode GetFileInfo workstr amp filesize if m_ecode 1 sprintf workstr CONFIG READ CONFIG FILE ERROR CODE error message block workstr retur FAILCODE fsconfig file fopen workstr r if we get this far read the file and save the contents NOTE This routine contains the cracker it doesn t generate errors it just ignores strings it can t identify while fgets workstrICARD SIZE fsconfig file NULL i if strstr workstr FILTERPORT NULL cp ptr strchr workstr cp 283 sscanf cp_ptr d amp block gt port_base OutPort block gt port_base PORT_D_OFFSET PORT_CONTROL_MASK a little something is to initialize the 8255 port control register if strstr workstr UTC OFFSET NULL cp ptr strchr workstr cp ptr sscanf cp ptr od 1 work SetCtriVal block imagemenu IMAGE utc offsetii work j if strstr workstr RA NULL cp_ptr strchr workstr workstr2 cp ptr SetCtrl Val block gt imagemenu IMAGE_ra cs_workstr2 if strstr workstr DEC NULL cp_ptr strchr workstr
260. t inbuffer 3 put a 0 00 so can use strcmp block gt inbuffer 3 0 00 but save char may need later if block gt whiterat TRUE block gt inbuffer 0 amp 0 7 Hazeltine 1500 sends strange stuff block gt inbuffer 1 amp Ox7F block gt inbuffer 2 amp Ox7F if stremp block gt inbuffer ERR FALSE if ERR came back light button SetCtrl Val block gt mainmenu MAIN errlight TRUE SetCtrlAttribute block gt mainmenu MAIN errlight ATTR_LABEL_VISIBLE TRUE SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_ENABLED FALSE SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_ENABLED FALSE if stremp block gt inbuffer DON FALSE if DON came back then normal return so light button but start timer SetCtrl Val block gt mainmenu MAIN_donelight TRUE SetCtrlAttribute block gt mainmenu MAIN donelight ATTR_LABEL_VISIBLE TRUE SetCtrlAttribute block gt mainmenu MAIN light timer ATTR INTERVAL LIGHT 221 SetCtrlAttribute block mainmenu MAIN light timer ATTR_ENABLED TRUE SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR ENABLED FALSE SetCtrlAttnibute block gt mainmenu MAIN abort ATTR_DIMMED TRUE j if stremp block gt inbuffer TST FALSE if TST came back is normal but require manual reset so no timer SetCtriVal block gt mainmenu MAIN tstlight TRUE SetCtrlAttr
261. te paper 16 There are species in gas that have transitions in the IR Kwok Sun Physics and Chemistry of the Interstellar Medium draft version January 2000 If the filter bands are narrow enough that these transitions do not overlap data concerning what 15 present and where it is present can be obtained Assuming the filter resolution is good enough it might be possible to use Doppler broadening and line shifts to get information concerning gas and dust temperature and velocity However as pointed out by Dr D J I Fry the continuously variable filter is designed for a point detector and the passband is a function of where on the filter the light hits it Thus it might not be suitable for a plane array detector and tn any case would require careful optics design to guarantee uniformity of response 17 Personal communication Dr D J I Fry The idea is to scan the image using the slit project the light onto the grating and then project the resulting two dimensional entity onto the IR array By then turning the scanner at right angle to the original scan direction and doing it again it should be possible to obtain enough information to be able to back out images at wavelengths of your choice To do this successfully would require great precision in the pointing of the telescope see Chapter 8 and some degree of proficiency with tomographic techniques RSC Imaging Sensors PICNIC Focal Plane Arrays Electronics and Camera
262. ted per image CBD HDR DC AA0002 Header to transmit to converter board RDA DC RDA Read array command Start the voltage and timing tables at a fixed address IF DL ORG ADR Y TBL ADR Download address ELSE ORG ADR P 2 APL NUM 1 100 APL LEN 47 EEPROM address ENDIF Miscellaneous definitions VIDEO EQU 5000000 Video board select 0 for first A D board with biases BD2 EQU 5002000 Clock board select 2 DELAY EQU 480000 Delay for clocking operations 20 ns unit 160 if MSB set VP DLY EQU 2C0000 Video delay time for 3 microsec pixel SXMIT EQU 00F060 Series transmit A D channels 0 3 Clock voltage definitions 324 HIGH EQU 8 0 4 assuming VREF 2 5 CLK HIGH EQU 880 LOW EQU 0F4 30V assuming VREF 0 0 Table of offset values begins at Y 10 DAC settings for the video offsets DC BIASES ZERO BIASES DC BIASES 1 OFF 0 50 0000 offset board 0 channel OFF 1 DC 0 4000 Input offset board 0 channel B OFF2 1 0000 Input offset board 1 channel OFF 3 DC 61 4000 Input offset board 1 channel DAC settings to generate DC bias voltages for the PICNIC array assuming 7 5 volts maximum from each bias circuit VOFFSET DC 0 87 4 pin 1 preamp offset 3 7 volts pin 2 reset 0 5 volts VRESET 0ccill VD DC 090 97 pin 3 analog power 5 0 volts ICTL DC 0d47e0 pin 4 cur
263. ter wheel menu SetCtrlVal block filtermenu FILTER blank led FALSE SetCtriVal block filtermenu FILTER empty led FALSE SetCtrl Val block gt filtermenu FILTER filter 1 led FALSE SetCtrlVal block filtermenu FILTER filter 2 led FALSE SetCtrl Val block filtermenu FILTER filter 3 led FALSE SetCtrl Val block gt filtermenu FILTER filter 4 led FALSE 209 now clear the set in the image menu SetCtrlAttribute block imagemenu IMAGE fl ATTR CMD BUTTON COLOR VAL SacclA bula lock IMAGE CMOIBUTTON COLOR AL Suc E E scs NE COLI oun Sooo o CUI Cole secu qune bloc canis AGE ROTER Su GE dE aR BUTTON WHITE return j void SetActiveFilterIndicatorrDATABLOCK block switch block active filter number case 1 SetCtrl Val block gt filtermenu FILTER_blank_led TRUE SetCtrlAttribute block gt imagemenu IMAGE_f1 ATTR_CMD_BUTTON _COLOR VAL RED break case 2 SetCtrl Val block gt filtermenu FILTER_empty_led TRUE SetCtrlAttribute block gt imagemenu IMAGE_f2 ATTR_CMD_BUTTON _COLOR VAL_RED break 3 SetCtrl Val block gt filtermenu FILTER_filter_1_led TRUE SetCtrlAttribute block imagemenuIMAGE f3 ATTR BUTTON COLOR VAL RED break case 4 SetCtriVal block filtermenu FILTER filter 2 led TRUE SetCtrlAttribute block gt imagemenu IMAG
264. th biases DELAY EQU 480000 Delay for clocking operations QoOnsunit 160 if MSB set DLY EQU 2C0000 Video delay time for 3 microsec pixel These are also defined in timboot asm so be sure they agree APL NUM EQU 1 Application number from 1 to 10 APL ADR EQU FO0 start application code at beginning of assigned block APL LEN EQU 300 APL ADR Maximum length of application program COM TBL EQU A0 Starting address of command table in X memory TBL ADR EQU 0F Waveform tables starting address NUM COM EQU 32 total number of commands in comm table of which 24 belong to the application 8 belong to the loader Define some timing board addresses and bit numbers WRFO EQU FFCO Write to fiber optic serial transmitter WRLATCH EQU Write to timing board latch SSITX EQU FFEF SSI Transmit and Receive data register PCC EQU FFE Port C Control Register PBD EQU 4 Port B Data Register TCSR EQU FFDE Timer control and status register CDAC EQU 0 Bit number in U25 for clearing DACs WW EQU 1 Word width of serial data 348 ENCK EQU 2 Bitnumber in U25 for enabling analog switches LVEN EQU 2 _ Low voltage enable 6 5 15 volt nominal HVEN EQU 3 _ High voltage enable 36 volts only used for reset Values for timPC board LVEN EQU 9 Low voltage enable 6 5 15 volt nominal HVEN EQU 4 _ High voltage enable 36 volts only used for reset Specif
265. th liquid nitrogen let the camera chill down and continue to check for leaks If there are no leaks then the camera is ready for use Figure 4 16 shows the completed camera with electronics package and in its mount CX E 1 Figure 4 16 Completed Camera In Mount CHAPTER FIVE GENERAL CHARACTERISTICS OF A REAL TIME SYSTEM 75 When shall we meet again In riot strike or stopping train When the hurly burly s done When the insurrection s lost or won Barbara Garson MacBird 76 77 CHAPTER 5 GENERAL CHARACTERISTICS OF A REAL TIME SYSTEM 5 0 Introduction Broadly speaking a real time system s a software package operating on a platform and controlling or monitoring a process This software package is dedicated to that particular process and runs in a loop sufficiently tight that it can respond to drifts in the process within the time constant of the process so that the software package can apply corrective guidance to the process and keep the process within an allowed tolerance band for a desired setpoint To do this the software package must obtain information about the parameters of the process it is controlling It must then calculate any required corrective action based upon those parameters and upon information obtained from whatever 15 controlling the software package apply this correction action if necessary and report what it sees upstream to whatever is monitoring the software package 5 1 Environmen
266. the 64 light shield for the IR array may be mounted stepper motor and stepper motor controller are external to the dewar and will be discussed in the next section Figure 4 7 below shows the filter wheel assembly and the IR array assembly mounted on the cold plate without the inner or outer shells While this violates the order of assembly described in the previous paragraph the photograph is instructive in that it shows details of both assemblies and their relationship when mounted on the cold plate FILTER WHEEL ASSY SHUTTER SOLENOID IR ARRAY ASSY SPUR GEAR ASSEMBLY COLD PLATE INNER RING OUTER SHELL Figure 4 7 Filter Wheel Assembly and IR Array Assembly On Cold Plate 65 Note that while the filter wheel assembly is mounted to the cold plate with short bolts the pedestal for the IR array assembly is thicker and requires the longer bolts These bolts may not be interchanged The reason that the order of assembly precludes mounting the inner and outer shells while the IR array assembly is in place is because the setscrews for the filter wheel drive train are not accessible when the IR array assembly is in place The drive train must be mounted into holes in the inner and outer shells and then the drive shaft connected to the drive bellows Only then can the IR array assembly be mounted After the filter wheel assembly has been mounted on the cold plate the inner and outer shields should be mounted T
267. the host the contents of the word specified by the address given in the command received from the host All memories are addressable including the EPROM although we point out that the EPROM occupies the top half of the program space so it is accessed by accessing the top half of the program space 13 This requires a byte erasable EEPROM which the timing board will support if properly jumpered However the RAO host program described elsewhere in this document does not support writes to the EEPROM 14 However this requires that the host program be able to interpret the COFF file generated by the linkage editor in order to be able to put everything at the correct addresses and in the correct memories This feature is planned for the host program and a stub exists in the structure but writing a COFF interpreter is a major task and was not implemented in the version of the host program discussed in this report due to time constraints 109 6 1 3 Application Program This discussion concerns the application program for the RAO as derived from the IR Labs supplied application program This program is application ONE as stored on the EPROM and is the application program loaded by default on reset The command table for this application consists of sixteen tasks and is spliced into the command table by the kernel when the application is brought into program memory from the EPROM There are eight spare slots in the command table and approximat
268. the RAO the capability of studying extended objects in the medium wave IR which heretofore it did not have Accordingly the decision was made to press on with the development of the camera 8 2 1 The Controller Incident Early in the work with the Rockwell array it was realized that we did not have all the pieces This led to discussions on how to obtain a controller and various proposals put forth including building a controller Investigation of the possibility of building our own controller led to numerous discussions concerning the features desirable in such a controller and several times concerns were voiced as to whether the controller was desirable at all Eventually a preliminary design based a Texas Instruments TMS320C30 was developed by the author with the objective of the design being able to do the job at a low 8 Actually this was not true One of us F Babott had realized some years earlier when the array was first received from IR Labs that we did not have all the pieces At that time he designed a controller and a preamplifier but these pieces were never built 142 cost yet having sufficient headroom in the design to allow for function creep UNIVERSITY OF CALGARY 2 5 MICRON CAMERA PROJECT WHY THIS PIECE IS NECESSARY sa Lu THIS PIECE IS MISSING Figure 8 1 Why the Preamplifier is Necessary It was indicated that the cost estimate for the contr
269. time int send ldw DATABLOCK load parallel word int send pon DATABLOCK power on int send rst DATABLOCK send pof DATABLOCK power off int send osh DATABLOCK shutter int send csh DATABLOCK close shutter int send wrm DATABLOCK write memory int send rdm DATABLOCK memory int send rrr DATABLOCK timed exposure with DMA int send sb2 DATABLOCK ADC bias voltage adjust int send sgn DATABLOCK ADC gain adjust int send abr DATABLOCK abort int send con DATABLOCK camera power on int send cof DATABLOCK camera power off int send firmware DATABLOCK controller firmware version int send institution DATABLOCK controller firmware institution code ENDIT 299 reset read do send send send send send get 300 D 2 1 Bootstrap asm as supplied by IR Labs COMMENT This file is used to generate boot DSP code for the second generation TIMII timing board with the PC interface for IR Labs This is Rev 3 00 software Overlays are no longer used but application programs can be loaded Modified starting for downloading operation with timlIIappl asm Header ID code eliminated since the utility board will not be used may be re implemented if needed Aug 23 1996 Buffers for commands and replies was simplified to just two buff
270. tion of Wavelength for ao eT oit donate en vara tede epa 38 Figure 3 2 Schematic of Dewar Electronics from IR Labs Documentation oe quos reb lle aae ee Mrd S 41 Figure 4 1 Schematic Drawing of Filter Wheel 57 Figure 4 2 Front View of Filter Wheel Assembly ssssss 58 Figure 4 3 Reverse Side of Filter Wheel Assembly 59 Figure 4 4 Cold Plate 6i Figure 4 5 Exploded View of IR Array 62 Figure 4 6 Assembled IR Array Assembly esee 63 Figure 4 7 Filter Wheel Assembly and IR Assembly on Cold Plate 64 Figure 4 8 Top View of Dewar with Inner Shell in 1 66 Figure 4 9 Outer Shell Bolt Tightening 222 2221 67 Figure 4 10 Drive Train 68 Figure 4 11 Drive Train with Setscrews ssssssssseeee 69 Figure 4 12 Top View of Inner Assembly of IR 70 Figure 4 13 Stepper Motor and Reduction Gear Housing 71 Figure 4 14 Interior View of Assembled Stepper Motor Reduction Gear Housknp uoo eren eere RN FUR RUNS 72 Figure 4 15 View of Completed Filter Wheel Drive with Stepper Motor Reduction Gear Housing and Stepper Motor GE ced om eie pedo afa 73 Figure 4 16 Completed Camera in Mount 74 dctesassassaeesuonseste
271. tions Default Calling Convention cdecl Max Number Of Errors 100 Require Prototypes True Require Return Values True Enable Pointer Mismatch Warning True Enable Unreachable Code Warning True Track Include File Dependencies True Prompt For Missing Includes True Stop On First Error File False 197 Bring Up Err Win For Warnings 7 True Show Build Dialog True Run Options Stack Size 250000 Debugging Level None Save Changes Before Running Ask Break On Library Errors True Hide Windows False Unload DLLs After Each Run True Check Disk Dates Before Each Run True Break At First Statement False Build Options DLL Debugging Level None Compiler Defines Compiler Defines DWIN32 LEAN AND MEAN Command Line Args Command Line Args Included Headers Max Header Number 0 Create Executable Executable File Icon File Application Title DLL Exports Include File Symbols DLL Import Library Choice Gen Lib For Current Mode Use VXIPNP Subdirectories for Import Libraries False Use Dflt Import Lib Base Name True Where to Copy DLL Do not Add Type Lib To DLL False Include Type Lib Help Links False Type Lib FP File Type Lib Guid Instrument Driver Support Only False External Compiler Support Create UIR Callbacks File False Using LoadExternalModule False Create Project Symbols File True UIR Callbacks O
272. tr amp status m ecode GetCtrl Val block gt setupmenu SETUP_observer workstr observer m ecode FITS update key fptr TSTRING OBSER VER NULL workstr amp status m ecode GetCtrl Val block gt imagemenu IMAGE_object workstr object m_ecode FITS update key fptr TSTRING OBJECT NULL workstr amp status m ecode GetCtrlVal block setupmenu SETUP equinox workstr 280 m ecode FITS update key fptr TSTRING EQUINOX NULL workstr amp status m ecode GetCtrlVal block setupmenu SETUP comment workstr comment m ecode FITS update key fptr IPSTRING COMMENT NULL workstr amp status m ecode GetCtrl Val block gt setupmenu SETUP timesys workstr timesys m ecode FITS update key fptr I STRING TIMESYS workstr amp status m ecode GetCtrlVal block 2 imagemenu IMAGE ra workstr ra m ecode FITS update key fpt TSTRING RA NULL workstr amp status m ecode GetCtriVal block imagemenu IMAGE dec workstr dec m ecode FITS update key fptr TSTRING DEC NULL workstr amp status m ecode GetCtrlVal block imagemenu IMAGE exp tim amp work exposure time sprintf workstr d MILLISECONDS work m ecode FITS update key fptr TSTRING EXPOSURE NULL workstr amp status spnintf workstr d FILTER block active filter number filter m ecode FITS update key fptr TSTRING FILTER NULL w
273. tribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE retum PASSED j return ERROR int send rrr DATABLOCK block int i work if block gt outarm FALSE strepy block gt outbuffer RRR block gt outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer i_work block gt exp_tim 1000 make sure timeout timer has enough time to ifi work 0 i_work do entire exposure plus one second work SetCtrlAttribute block 7mainmenu MAIN timeout timer ATTR 4 oubleXi work SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED retum ERROR int send_err DATABLOCK block if block gt outarm FALSE f i strcpy block gt outbuffer ERR block outbuffer 5 CR block gt outarm TRUE block gt outcount 6 block gt outptr block gt outbuffer 271 SetCtrlAttribute block mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttribute block mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED return ERROR int send abr DATABLOCK block if block gt outarm FALSE strcpy block outbuffer ABR block gt outbuffer 5 CR block gt outarm TRUE block outcount 6 block gt outptr gt SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR INTERVAL double 1 SetCtrlAttrib
274. ts with a point detector is that a point detector provides at best data only from the equivalent of one pixel when it is the detail of the image which is of the essence With a planetary nebula there is an outer shell of gas and dust and a hot point object in the centre which is the star The shell is formed when the older low velocity stellar wind from the star is impacted from behind by a high velocity wind also from the star An examination of the temperature of the gas and in particular an examination of the shock zone could reveal details concerning the velocity of the high speed gas and dust and thereby details concerning the star within The next application 15 the observation of protoplanetary disks Areas such as the Trapezium have dust clouds of various optical depths Protostars are forming in these regions however even those protostars which have already achieved hydrogen ignition are difficult to see in the optical portion of the spectrum due to the dust They are quite visible in the infra red but an imaging camera is required to resolve the protostar from the obscuring dust and gas As remarked in the paper cited above an efficient technique for performing a census of circumstellar disks around young stars is to obtain infrared imaging surveys of the stellar clusters in which these stars are forming This information can then be used as a preliminary step in determining the frequency of planetary systems in the Milky Way Since
275. u MAIN timeout ATTR OFF COLOR VAL LT GR SetCtrlAttribute block mainmenu MAIN timeout ON COLOR VAL RED SetCtrlAttribute block mainmenu MAIN timeout ATTR LABEL BGCOLOR VAL ED SetCtrlAttribute block gt mainmenu MAIN timeout ATTR LABEL COLOR VAL WHI TE SetCtrlAttribute block gt mainmenu MAIN_ timeout ATTR LABEL VISIBLE FALSE SetCtrl Val block gt mainmenu MAIN_timeout FALSE set up the indicator lights SetCtrlAttribute block gt mainmenu MAIN_errlight ATTR OFF COLOR VAL LT GRA Y SetCtrlAttribute block gt mainmenu MAIN errlight ATTR ON COLOR VAL RED SetCtrlAttribute block gt mainmenu MAIN_errlight ATTR LABEL BGCOLOR VAL ED SetCtrlAttribute block gt mainmenu MAIN errlight ATTR LABEL COLOR VAL WHI TE SetCtrlAttribute block gt mainmenu MAIN errlight ATTR LABEL VISIBLE FALSE SetCtrlVal block gt mainmenu MAIN errlight FALSE SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR OFF COLOR VAL LT Y SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR ON COLOR VAL YELLOW SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR LABEL BGCOLOR VAL YE LLOW SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR LABEL COLOR VAL BLUE 255 SetCtrlAttribute block gt mainmenu MAIN tstligh ATTR LABEL VISIBLE FALSE SetCtrl Val block gt mainmenu MAIN tstlight FALSE SetCtrlAttribute block mainmenu MAIN donelight ATTR OFF COLOR VAL LT RAY SetCtr
276. u MAIN_ DIMMED FALSE SetCtrlAttribute block mainmenu MAIN led ATTR OFF COLOR VAL YELLOW SetCtrl Val block gt mainmenu MAIN_shutter F ALSE block gt dma_running TRUE do dma block send break case MAIN abort a main abort exposure m ecode send abr block SetCtrlAttribute block gt mainmenu MAIN_abort ATTR_DIMMED TRUE SetCtrlA ttribute block gt mainmenu MAIN_timeout_timer ATTR ENABLED FALSE break case MAIN reset reset comm indicator lights SetCtrlAttribute block gt mainmenu MAIN errlight ATTR LABEL VISIBLE FALSE SetCtrlAttnibute block gt mainmenu MAIN errlight DIMMED FALSE SetCtrlAttribute block gt mainmenu MAIN tstlight ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN tstlight DIMMED FALSE SetCtriAttribute block mainmenu MAIN timeout ATTR LABEL VISIBLE FALSE SetCtrlAttribute block mainmenu MAIN timeout ATTR DIMMED FALSE SetCtrl Val block gt mainmenu MAIN errlight FALSE SetCtrl Val block gt mainmenu MAIN tstlight FALSE SetCtrliVal block mainmenu MAIN timeout FALSE SetCtrlAttribute block gt mainmenu MAIN timeout ATTR LABEL VISIBLE FALSE 229 SetCtrlAttribute block mainmenu MAIN overrun ATTR LABEL VISIBLE FALSE SetCtrlAttribute block gt mainmenu MAIN_ overrun ATTR DIMMED FALSE SetCtrl Val block gt mainmenu MAIN_overrun FALSE SetCtrlAttribute
277. ultplier contains the memory of the PID loop and allows a momentum in the phase 12 That is at a regular interval as defined by the frequency of operation of the timer interrupt The standard PC timer frequency is 18 3 Hz but the PC has an Intel 8253 timer with three channels One channel normally is used for the memory refresh and one channel 1s used for the timer This leaves a spare channel that can be used for user applications The Microsoft Visual compiler has intrinsic timer routines in its libraries 3 92 space of the control loop to exist without which the algorithm cannot meet the target value The differential term with multiplier k is there to deal with transients and usually serves as a transient damping term The multipliers k and k are usually under operator control and are used to tune the operation of the control loop The Laplace Transform form ofthe PID loop is shown as Equation 5 2 of Figure 5 6 In this form we see that the PID algorithm takes the form of a quadratic equation and indeed in Equation 5 3 this equation can be factored into the form shown where a and a represent time constants is zero then the remaining time constant is k k and this 1s the critical time constant in the sense that this time constant must be less than the intrinsic time constant of the process being controlled in order to prevent runaway Other control algorithms are possible t
278. um shutter mounted between two guide rails and driven by two solenoids There is a teflon spacer mounted on one of the solenoid plungers This spacer is sized so that when the shutter is opened the hole in the shutter will line up with the IR array Note also the spur gear and drive bellows Inside the filter wheel assembly the gear on the end of the shaft engages the ring gear on the filter wheel while on the outside of the assembly two spur gears connect the drive bellows to the stepper motor The purpose ofthe drive bellows is to insert some give into the drive train to allow for thermal expansion and misalignment of the drive train Figure 4 3 shows the reverse side of the filter wheel SOLENOID Bs idi E FILTER WHEEL 7 BEARING eh Won B lt MOUNTING E N FLANGE BEARING A 73 um d c Figure 4 3 Reverse Side of Filter Wheel Assembly 60 assembly including the mounting flange If it becomes necessary to disassemble the IR camera the filter wheel assembly 15 the last assembly which should be removed and the first assembly to be reinstalled It should be possible to mount the filter wheel assembly to the cold plate while the inner and outer dewar sides are in place A quarter inch drive set with extensions and a universal joint is recommended along with a set of Allen wrenches The cold plate is drilled and tapped to accept 2 56 bolts Do not use bolts longer than inch when m
279. upt it is not in real time All resources of the system are devoted to dealing with the interrupt and all other functions are blocked Usually this blockage extends to the servicing of other interrupts as well most processors for example enter the interrupt service routine with all interrupts disabled For these reasons it is of the essence that interrupt handlers be kept as short as possible that they do only what 15 required to handle the event which caused the interrupt and that they etti as quickly as possible to the normal flow of execution Normally an interrupt service routine will clear the condition which caused the interrupt set an event flag in the appropriate queue for further processing re enable the interrupt and exit The event flag is now what is known as a soft interrupt and is handled by the background loop in a less immediate manner than in an interrupt service routine A block diagram of a typical interrupt handler is shown overleaf as Figure 4 6 90 5 4 4 1 Clock Timer Interrupt Service Routine There is one major exception to the above and that exception is the structure of the clock timer interrupt service routine The clock timer interrupt service routine is frequently used for more than simply updating the system clock Certain control algorithms e g PID loops require execution at well defined intervals and timing jitter is deleterious to the operation of these algorithms More precisely it is necessar
280. ut that all ofthe lines be asserted through the same port means that masks be kept in memory and logical OR ed with the timing signals before the timing signals are asserted to the port This was not a feature of the IR Labs code The Labs code also included two continuous run video modes which transmitted images via the DMA link to the host automatically and regularly While this code may prove useful at a future date it is not applicable to the IR camera in its present incarnation as a stare mode instrument so this code has been excised in its entirety Approximately 80 percent of the IR Labs code has been replaced including some new diagnostic code appropriate to the operation of a stare mode instrument Since the RAO application has a specific purpose a number of details have been hard coded into the application Specifically the application expects the timing board to have the address of 0x0000 that the clock generator board have the address of 0x0002 that the video board has the address of 0x0000 and that only Channel A of the video board is used A complete list of the tasks available are shown in Table 6 1 overleaf 111 MNEMONIC FUNCTION Turn low voltage power on to the timing signals and preamplifier Turn low voltage power off Set clock generator board bias voltages Set video board video offset Set video board gain Stop video mode left in from IR Labs code Read array Results in DMA transfer Reset array
281. ute biock gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED return ERROR int send_sex DATABLOCK block if block gt outarm FALSE L strepy block gt outbuffer SEX block gt outbuffer 3 block gt exp_tim amp 0 00 0000 gt gt 16 block gt outbuffer 4 block gt exp_tim amp 0x0000FF00 gt gt 8 block gt outbuffer 5 block gt exp_tim amp 0x000000FF block gt outbuffer 6 0x20 block gt outbuffer 7 0x20 block gt outbuffer 8 CR block outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer SetCtrlAttribute block mainmenu MAIN timeout timer ATTR INTERVAL double l 272 SetCtrlAttribute block gt mainmenu MAIN timeout timer ATTR ENABLED TRUE return PASSED retur ERROR int send Idw DATABLOCK block if block gt outarm FALSE strepy block gt outbuffer LDW block gt outbuffer 3 block gt port_flags amp 00 0000 gt gt 16 block gt outbuffer 4 block gt port_flags amp Ox0000FF00 gt gt 8 block gt outbuffer 5 block gt port_flags amp 0x000000FF block gt outbuffer 8 CR block gt outarm TRUE block gt outcount 9 block gt outptr block gt outbuffer SetCtrlAttribute block gt mainmenu MAIN_timeout_timer ATTR_INTERVAL double 1 SetCtrlAttribute block gt mainmenu MAIN _timeout_timer ATTR_ENABLED TRUE return PASSED retum
282. various portions of the 1 to 10 micrometre region of the spectrum Another difference though a difference in implementation rather than a difference in basic technology is that while CCDs generally operate at temperatures ranging 29 from ambient to 100 it is always necessary to cool an IR array and the enclosure in which it is mounted in order to cut down on noise and extraneous current This last means that the design of an IR array is somewhat different from that of a CCD and that the materials used the manufacture must be materials that will have the desired electrical properties at the operating temperature and independent of what their electrical properties are at room temperature The fabrication of IR arrays is also somewhat different from that of CCDs A CCD usually is a high production volume device and if a designer wants to design a system using a CCD she can find a plethora of devices available off the shelf and there is little need to design her own However the market for IR arrays is somewhat more restricted and the operating conditions are somewhat more stringent so it is not uncommon for such a device to be fabricated as two components one being the sensitive element and the other being the support electronics and then for the two components to be mated using something akin to indium bump fusing technology The combination of low production volume for IR arrays 20 The RENA chip Nova Research Riverside C
283. ve TRUE SetCtrl Val block gt imagemenu IMAGE framel led FALSE SetCtrl Val block gt imagemenu IMAGE_frame2_led TRUE break break case IMAGE display_frame IMAGE load and display active frame GetCtrl Val block gt imagemenu IMAGE framesel amp work switch work case 1 wordptr block gt dmal_array for work2 0 work2 lt NCOLS work2 for work3 0 work3 lt NROWS work3 PointSet amp block gt frame 1 point work3 work2 bytecolour int wordptr 256 colour int bytecolour 256 256 bytecolour 256 bytecolour wordptr 242 SetCtrlAttnbute block gt imagemenu IMAGE 1 colour SetCtrlAttribute block gt imagemenu IMAG E framel ATTR PEN COLOR colour CanvasDrawPoint block gt imagemenu SetCtrlAttribute block mainmenu MAIN dma led ATTR OFF COLOR VAL BLUE break j case 2 IMAGE framel block gt frame point wordptr block dma2 array for work2 0 work2 NCOLS work2 4 for work3 0 work3 NROWS work3 PointSet amp block frame2point work3 work2 bytecolour int wordptr 256 colour int bytecolour 256 256 bytecolour 256 bytecolour wordptr SetCtrlAttribute block gt imagemenu JMAGE_frame2 ATTR_PEN COLOR colour SetCtrlAttribute block gt imagemenu IMAG E frame2 ATTR PEN FILL_COLOR colour CanvasDrawPoint block gt imagemenu IMAGE frame2 block gt fr
284. ve filter target 4 block filter moving TRUE 250 break case FILTER seek filter 3 if block active filter number 5 return 0 block gt active filter target 5 block gt filter_moving TRUE break case FILTER seek filter 4 if block gt active_filter_number 6 return 0 block active filter target 6 block filter moving TRUE break default default trap should never happen but we ll ignore that for the moment ecode ERROR SetCtrl Val block gt mainmenu MAIN_ overrun TRUE SetCtrlAttribute block gt mainmenu MAIN_overrun ATTR_LABEL_VISIBLE TRUE return 0 END MESSAGE CRACKER FOR FILTER MENU se ceo oo e e a a oe e ee oo KR oe ke ke e Xe Message cracker for ABOUT menu 2e eee int about cracker int event DATABLOCK block int source int m_ecode int work this can do is return switch event case ABOUT return HidePanel block gt aboutmenu return 0 break default 9 never happen but we ll ignore that for the moment j return 0 j END MESSAGE FOR ABOUT MENU afe a ake ake ake ake ak ak ake ak af ake 251 note all ABOUT return default trap should 252 JR CR RR hob e eoe neenon dele RR GERE RR GIO E ER
285. witch output l6 5 K ohms according to the published datasheet 136 ohms at room temperature as measured with a DMM 24 6 ohms as measured at 77 K 46 the IR camera is mounted on the back of a telescope that can be pointed in any direction Thus not only must the solenoids pull the shutter into the desired position but they must hold it in this position against gravity To do this there are four solenoid drivers The solenoid drivers are grouped in pairs with each pair consisting of a throw driver and a holding driver The drivers are operated by the IR Labs controller which causes the throw driver to assert a high 3 volt voltage pulse to move the shutter and then which causes the holding driver to assert a low 0 5 volt holding voltage to hold the shutter in position against gravity Each solenoid driver consists of a TIPI20 NPN transistor in a common emitter configuration with the solenoid coil as the load There is a 1N4007 diode across the emitter and collector of the transistor to serve as a kickback diode 33 IR Labs Controller The IR Labs controller is a microprocessor based system with two channels of communication to the host computer and two channels of input from the IR It generates the timing signals for the IR array as well as generating the control signals to gate the preamplifier and to drive the shutter solenoids The physical format of the IR Labs controller is that of a 3U VME chassis however the b
286. xLineLength block gt filemenu FILEMENU config file 0 amp m ecode if m_ecode lt 0 231 error message block READ CONFIG INVALID FILE NAME return 0 m ecode GetTextBoxLine block gt filemenu FILEMENU config file 0 block gt instring m ecode config read block break j case FILEMENU set wd FILE set working directory GetTextBoxLineLength block gt filemenu FILEMENU setwd 0 amp m ecode if m_ecode lt 0 m ecode estab dir block on dropthru make data dirs in local return 0 directory m ecode GetTextBoxLine block gt filemenu FILEMENU_setwd 0 block gt wdname get full name work strlen block gt wdname ensure trailing backslash work if block gt wdname work BACKSLASH strcat block gt wdname SplitPath block gt wdname block gt wddrive block gt wddir block gt wdfile break it out strcat block gt wddir block gt wdfile make sure wddir has full dir name if strlen block gt wddrive gt 0 if another drive set drive letter if block gt wddrive 0 gt 0x60 they don t make it easy 232 block gt wddrive 0 0x60 else i block 7wddrive 0 0x40 SetDrive int block gt wddrive 0 m ecode SetDir block gt wddir try to set the directory If it fails if m_ecode FAILCODE then make the directory and set it MakeDir block gt wddir SetDi
287. y a 1024 x 768 window on 19 inch 1600 x 1200 monitor 19 These are standard problems when porting software from a development system to a target system and there are utilities in the development compiler to deal with these problems But they are issues which must be addressed 20 This controller will not mate with the PC however Microsoft makes a USB clone of the 148 The platform originally intended as the target platform is equipped with an ZIP drive to facilitate software transfers However with the uncertainty concerning the actual place of use of the IR camera this has become moot and alternate delivery vehicles may be necessary 84 Summary The IR camera was intended as an instrument for the ARCT and the investigation surrounding the construction of the camera has highlighted several issues concerning the use of this camera on the ARCT While the camera was intended to be a final product it has also served as a pilot project for other efforts These include the possibility of mounting another store bought IR camera with extended sensitivity and the possibility of upgrades to the RAO Regardless of the merits of the camera described in this report the RAO now has the expertise required Sony controller that will mate with the PC The Microsoft controller has numerous buttons and also two thumb operated joysticks for analog input and cursor positioning To make use of a game controller would require assembling anot
288. y execution and load addresses IF DL ORG P APL_ADR P APL_ADR Download address ELSE ORG ADR P 2 APL NUM 1 100 EEPROM generation ENDIF APPLICATION JMP TST RCV Exit video mode enter continuous reset mode STP BSET 5 MOD X STATUS Continuous reset mode on BCLR VIDI_MOD X lt STATUS BCLR VID2_MOD X lt STATUS JMP FINISH University of Calgary additions to code start here Set the exposure timer value UC SEX MOVE X R2 A get datum into X0 so MOVE works easily MOVE gt 5 0 Subtract 5 millisec from exposure time to clipped AJ 010709 SUB account for READ to FSYNC delay time clipped AJ 010709 MOVE lt load the desired exposure time JMP FINISH and exit E Send a test message UC TST MOVE Y lt TST X0 load reply lt FINISH2 and send Load test word to WRSS port parallel output on backplane UC LDW MOVE X R2 X0 get datum into so move works easily MOVE X0 X WRSS direct write to port JMP FINISH 349 open the shutter UC OSH JSR UCOSHS this is made a subroutine so it JMP FINISH can be used in the exp routine open shutter routine UCOSHS BCLR BIT Y SH 5 clear the CLOSE bit BCLR CLOSE HOLD BIT Y lt SH_ MASK clear the hold close bit BSET lt 5 MASK set the open bit MOVE Y lt SH_MASK BI load the mask MOVE Y lt YTB Y1 OR YLBI insert the board address MOVE Y lt
289. y to obtain data as to the state of the process at regular intervals and it is necessary to output control signals also at regular intervals These functions are therefore linked to the clock timer interrupt such that INTERRUPT HANDLER OUTSIDE WORLD INTERRUPT INTERRUPT PRIORITIZER FLAGS QUEUE BACKGROUND ROUTINE Figure 5 5 Typical Interrupt Handler 91 they occur on the tick and with as little jitter as practicable The calculations that make up the control algorithm can be performed under the control of the background loop with the sole caveat that they be done and the control output ready by the time of the next clock interrupt Failure to have the control output ready by the next tick will result in losing real time Another use for the clock timer interrupt is to queue events in a virtual machine This topic will be discussed later in this report 5 4 5 Process Control Routine As remarked in Section 5 4 data is acquired concerning the state of the controlled process on the tick This data is then processed by the control algorithm and is output to the process on the next tick frequently encountered control algorithm is the PID Proportional Integral Differential control loop such as that given by Franklin and Powell In this loop see Equation 5 1 of Figure 5 6 the proportional term is a measure of what the process is doing at the time t with a control multiplier of k The integral term with m

The author of this thesis has granted the University of Calgary a non

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