Glomation GESBC-9G20i User`s Manual
Contents
1. 9G20i User s Manual Chapter 6 Troubleshooting This chapter provides Troubleshooting information Search the entries in the Problem column in order to find the item that best describes your situation Then perform the corrective action in the same row If the problem persists contact Glomation Version 0 2 Page 21 of 21 20 Sep 132. shell resource file so it is executed every time you login For bash shell a good place to put is in bashrc in your home directory Compile Linux Kernel The GESBC 9G20i is shipped with Linux kernel version 2 6 27 The patch for the kernel source tree is available at http www linux4sam org twiki bin view Linux4SA M LinuxKernel Prepare Linux Kernel source Obtain the kernel source 2 6 27 from http www kernel org Untar the Linux kernel tar xJf linue 2 6 27 bz2 Patch the kernel source with patches for Atmel AT91SAM9G20 EK patch pl lt lt patch file directory path gt patch_file_name Configure Linux Kernel The GESBC 9G20i can use the default configuration file for the Atmel AT91SAM9G20 ek evaluation board make ARCH arm CROSS COMPILE arm unknown linux gnu AT91SAM9G20ek defconfig If additional configuration is required executing the following command in the Linux kernel directory make ARCH arm CROSS COMPILE arm unknown linux gnu menuconfig If problem occurs make sure the default PATH variable is set to the correct tool chain directory Compile Kernel Once Linux kernel has been configured it can be compiled using following command make ARCH arm CROSS COMPILE arm unknown linux gnu Ulmage The Linux kernel should compile without error and the image file will be created The U boot tool mkimage must be pre installed in order to make final ulmage Version 0 2 Page 20 of 21 20 Sep 13 GESBC
3. 00 0x00020000 0x40000 U boot 0x00060000 0x20000 U boot primary environment storage range 0x00080000 0x20000 U boot secondary environment storage range 0x00100000 0x300000 0x00400000 Root file system GESBC 9G20i Linux Code The GESBC 9G201 is shipped with Linux 2 6 27 kernel pre installed This software is programmed into the system FLASH located on the board prior to shipment The Linux kernel is configured with all the device drivers included for the GESBC 9G20i board U boot U boot provides a simple interface for loading operating systems and applications onto the GESBC 9G20i board U Boot uses a serial console for its input and output The default serial port setting is 115200 8 N 1 It also supports the built in Ethernet port and general flash programming The board is shipped with U boot pre installed Please refer to U boot user s manual regarding detailed information of U boot U boot Booting Linux The following shows the default U boot setup for booting Linux Version 0 2 Page 16 of 21 20 Sep 13 GESBC 9G20i User s Manual U Boot gt printenv bootargs console ttyS0 115200 root dev mtdblock2 rw rootfstype jffs2 mtdparts atmel_nand 1M bootloader 3M kernel rootfs bootcmd nand read jffs2 0x22000000 0x100000 0x200000 bootm ethaddr 00 0c 20 02 0a 5b ipaddr 192 168 1 200 serverip 192 168 1 199 netmask 255 255 255 0 stdin serial stdout serial stderr serial e
4. 3 GESBC 9G20i Function Blocks AT91SAM9G20 The GESBC 9G20i Single Board Computer uses the Atmel AT91SAM9G20 as the core processor on this development board The top level features of AT91SAM9G20 processor are the following e ARM926EJ S RISC Core Processor e 400 MHz 400 MIPS Performance e 32Kbyte Instruction Cache e 32Kbyte Data Cache e Linux and Windows CE enabled MMU e 133 MHz System Bus e 32 bit SDRAM Interface e Serial EEPROM Interface e 10 100 Mbps Ethernet MAC e 6UART e Two port USB Host e 4channel 10 bit ADC e 2 SPI Port e Serial Audio Interface e JTAG Interface More detailed information regarding the AT91SAM9G20 processor can be found at www atmel com SDRAM The AT91SAM9G2O0 features a unified memory address model where all memory devices are accessed over a common address and data bus The GESBC 9G20i supports 32MB SDRAM FLASH The GESBC 9G20i is shipped with 128Mbytes of NAND FLASH memory RS 232 Port 0 1 and 2 The GESBC 9G20i Single Board Computer is shipped with two 3 wire RS 232 UART interface and one 9 wire RS 232 UART interface Version 0 2 Page 10 of 21 20 Sep 13 GESBC 9G20i User s Manual The port 0 is the debug USART port of the AT91SAM9G20 The PO connector is the 3 pin header on GESBC 9G20i The signal designation is listed in the following tables Table 1 UART Port PO Connector on GESBC 9G20i Pin Number Signal Name The serial port 1 is the USART 0 on the AT91SAM9G20 proces
5. 8400 to DOOAAFFF RO U Boot 3 DO042000 to DO251FFF Kernel 4 DO252000 to DO83FFFF FS eee Warning bad CRC or NAND using default environment serial serial serial macb Starting autonegotiation For Help press F1 Connected 1 2 47 16 VT102 115200 8 None 1 LIE 10 x File Edit View Properties Transfer Automation Window Help 2508 mE RE or SA Terminal Phonebook Call Log Lists Loading device mapper support a file systems fsck 1 40 WIP 14 Nov 2066 done Setting kernel variables done Mounting local filesystems done Setting up networking Configuring network interfaces info udhcpc v0 9 9 pre started debug Sending discover eth9 link up 100 Full debug Sending discover debug Sending discover info No lease forking to background done Starting portmap daemon INIT Entering runlevel 3 Starting system log daemon syslogd Starting kernel log daemon klogd Starting OpenBSD Secure Shell server sshd Restoring mixer settings failed Starting periodic command scheduler crond Debian GNU Linux 4 8 GESBC ttyS GESBC login root For Help press F1 Connected 12 51 04 VT102 115200 3 8 None 1 I Please see Version 0 2 Page 8 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter 4 Software Description for more details regarding the software functionality Version 0 2 Page 9 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter
6. Glomation Embedded Single Board Computer GESBC 9G201 User s Manual GESBC 9G20i User s Manual Table of Contents Chapter 1 Introducing the GESBC 9G20i Single Board Computer sesse sesse sesse se ee ee ke ee 4 GES BC OG 20 POV EIVICW GE Regs ge Ee be oge ve een De eed ae ea ge ge er ES 4 Advanced PCAN ES uretra ld 4 di EN EE EE ld 5 A MOER EE HE ER TO N EE ER EE 5 JS AE gin N EN EE EE LE EE N R 5 USB EE EO EE RO OE EE N EE a 5 DAR RE ER EE EE EE EE EE EE HE RR 5 UART 2 O ME EEN N OF DA EE 6 DEBUG Pot sca hae ta Ge ee ee ee ee ee Ge NG si 6 Ethernet OR EE O ORE ER DA N EER A 6 Chapter 2 Getting O RS RE RE ee gets seu dr ee ef N Ses ea oe 7 Assembly and Connections esse ss sis es see ds ses ER Re Se de ee ee nesese gf ee ee os ees ee Re ee deeg 7 DU A EE OM A O AO O 7 Chapter 3 GESBC 9G20i Function Blocks cooooooooocononnocoaaagorooror af ee oe oe ron no Ge ge ge 10 ATIISAM9IG 20 A ER EE EE oca 10 SDRAM A A N E a ee adi 10 g By ts EE EE EE O VAL OE IT 10 RS 232 Port sand 2 Bu AR EE O EE RE OE Se DE Ge 10 ea ER N O MEE ME EE 11 DEBUT VREES 11 A e TE AM EE EE mdaas 12 USE RE N A EE EE IEEE 12 VO ees EE E td 12 4 x 20 Character LCD Porio Mipsis aa 13 A VI A ER EE ER EE totes ctdans 13 CPP EIER EE VR ia 14 va O AE EE EE N N 14 PO Wr REQUIEM ME pa 15 Chapter 4 Software DS CO dd 16 8 isi Te WE EE EE EE ai 16 Data St rage on GESTOOR Be clues ED eN N ee Ke GEE Ge EEN ee eo 16 GESB Cg i Linux C
7. ddition the I O block also provide one RS 232 port and one RS 485 port The I O block uses 20 position 3 5mm spacing terminal block that accepts 18 28 gauge wires The signal assignment is listed in table below Table 4 J8 VO Expansion Pin TO Line Peripheral A Peripheral B Comments Function PCl6 Protected digital input 1 PA Protected digital input 2 PCI8 _ Protected digital input 3 pcio Protected digital input 4 PB20 ISI_DO Protected digital input 5 Version 0 2 Page 12 of 21 20 Sep 13 GESBC 9G20i User s Manual 6 PB21 RFO ISIDI Protected digital input 6 7 PB22 DSRO ISLD2_ __ Protected digital input 7 8 PB23 DCDO ISID3 __ Protected digital input 8 9 PB12 TxXDS ISLD10 __ Open collector output 1 10 PBI3_ RXD5 ISI Di1 Opencollectoroutput 2 11 PBI6 TKO TCLK3 Open collector output 3 12 PB17 TFO TCLK4 __ Open collector output 4 13 PB18 TDO TIOB4 Open collector output 5 14 PB19 RDO TIOBS Opencollectoroutput ito GND 16 RX2 USART2 _ RS 232 port 2 receiving line 17 TX2 USART2__ RS 232 Port 2 transmitting line 18 RX3 TF USART3 _ RS 485 port line A 19 TX3 o USART3 RS 485 port line B df MM ME Gp 4 x 20 Character LCD Port J30 The GESBC 9G20i provides a LCD port for Hitachi HD44780 compatible character LCD displays The LCD port signal assignment is listed in the following table Table 5 J30 LCD Pi
8. erip XXX XXX XXX XXX The server IP is the IP address where a TFTP server must be run To load Linux kernel type in the following command t 0x21000000 ulmage The U boot will load ulmage file from the TFTP server whose IP address is specified by the serverip environment variable The NAND FLASH sectors must be erased first before new kernel image can be stored The following command will erase the NAND FLASH sectors reserved for Linux kernel nand erase 0x100000 0x200000 The use the flowing command to store the kernel image from SDRAM to NAND FLASH nand write jffs2 0x21000000 0x100000 0x200000 The following commands can be used to load root file system into the FLASH memory nand erase 0x400000 available nand flash memory sizel t 0x21000000 rootfs img nand write jffs2 0x21000000 x0400000 filesize Please be noted that the image is first loaded into the SDRAM and then stored into the FLASH memory The image size can not exceed the available SDRAM on the board After the kernel and root file system have been updated the board can be simply reboot by recycle the power Version 0 2 Page 18 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter 5 Development Tools Overview This chapter provides a brief introduction to development tools that are available for the AT91SAM9G20 System on a Chip processor The central processing core on the AT91SAM9GZ20 is a 400 MHz ARM926EJ S processor The ARM926EJ S RISC processing core is supp
9. he GESBC 9G201 is the AT91SAM9G20 which is the one in a series of ARM926EJ S based processors The AT91SAM9G20 microcontroller features DSP Instruction Extensions ARM Jazelle Technology for Java Acceleration It has separate 32 Kbyte instruction and data caches with write buffer The ARM926EJ S on the AT91SAM9G20 functions with a maximum operating clock rate of 400MHz and a power usage between 20mW and 80mW dependent upon clock speed The ARM core operates from a 1V supply while the I O operates at 3 3V The low power consumption makes it an idea platform for battery operated applications The list below summarizes the features of the GESBC 9G20i e 400MHz Processor Core ARM926EJ S with MMU 32 64 MB SDRAM 128MB 1GB NAND FLASH 1 10 100 Mbps Ethernet port 4 channel 10 bit Analog to Digital Converter ADC 3 RS 232 Universal Asynchronous Receiver Transmitters UARTs 1 RS 485 Port 2 USB Host Port 1 USB Device Port Real Time Clock with battery backup Hardware Debug Interface SD MMC Socket 1 I2C Port 1 SPI Port Figure 1 below shows a picture of the GESBC 9G201 Single Board Computer Version 0 2 Page 4 of 21 20 Sep 13 GESBC 9G20i User s Manual O00000 Gr E a UD 3 4 e 00 z 2 A N 2 O 4 a Figure 1 GESBC 9G20i Single Board Computer AT91SAM9G20 The GESBC 9G20i is shipped with the Atmel AT91SAM9G20 processor For more information regarding the AT91SAM9G20 processor please
10. ler MAC within the AT91SAM9G20 supports 1 10 100 Mbps transfer rates and interfaces to industry standard physical layer devices The GESBC 9G20i is shipped with the DM9161A 100Base X 10Base T Transceiver device which along with a RJ45 connector provides the physical layer interface USB Port The GESBC 9G20i Single Board Computer provides two USB host connections The AT91SAM9G20 USB host controller is configured for two root hub ports and features an integrated transceiver for each port The AT91SAM9G20 integrates two USB 2 0 Full Speed host ports These ports are fully compliant to the OHCI USB 2 0 Full Speed specification 12 Mbps The controller complies with the OHCI specification for USB Revision 1 1 The GESBC 9G201 Single Board Computer provides one USB device port The USB Device Port UDP is compliant with the Universal Serial Bus USB V2 0 full speed device specification The GESBC 9G20i Single Board Computer is shipped with one USB host port on standard USB type A connector and one USB host port on a 6 position 1mm spacing miniature connector that can interface directly to Via VNT6656 USB WiFi module The GESBC 9G20i Single Board Computer is shipped with one standard USB type B device port VO Block The GESBC 9G20i provides 8 protected digital input channels and 6 open collector digital output channels The digital input channels are protected up to 20V DC and the output channels are capable to sink up to 200mA current In a
11. n Number Signal Name Comment SININ AIIN NO J ee NS So nao O JOU U OO ete to oe SY A AJU nje Controlled by PC31 BIK N O ON RTC The GESBC 9G20i uses the AT91SAM9G20 on chip RTC with battery hook up to provide accurate time keeping The on board battery holder accepts CR1225 CR1220 coin cell batteries Version 0 2 Page 13 of 21 20 Sep 13 GESBC 9G20i User s Manual ZigBee Interface The GESBC 9G201 Single Board Computer is shipped with socket for XBeeZnet2 5 module from Digi The serial data lines connected to the ZigBee interface are RXD1 and TXD1 from the AT91SAM9G20 processor The hardware control signals are RTS1 PB28 and CTS1 PB29 from the AT91SAM9G20 processor The system reset signal NRST is connected to the module RESET line pin 5 Optional A D The GESBC 9G20i Single Board Computer provides support for optional 12 bit 8 channel A D The A D is provided by TI ADS7870 which is a 12 bit 8 channel analog to digital converter with programmable gain amplifier It also provides 4 programmable digital I O The maximum sampling rate of ADS7870 is 100 ksps The 8 single ended analog inputs can be also configured as 4 pairs of differential input channels The optional A D interface is provided via a 2x8 2 54mm header The signal designation is listed in the following table Table 6 J12 Optional A D Pin Number Signal Name Pin Number Signal Name GND JTAG The GESBC 9G201 Si
12. ngle Board Computer is shipped with a 10 pin connector that provides JTAG debug signals for the CPU The JTAG provides the user with the ability to debug system level programs The signal designation is listed in the following table Table 7 J20 JTAG Connector Pin Number Signal Name Pin Number Signal Name os pas gt gt TK RTCK so TOC oo OIGND 110 GND Version 0 2 Page 14 of 21 20 Sep 13 GESBC 9G20i User s Manual Power Requirement The GESBC 9G20i Single Board Computer has on board voltage regulator that accepts 7 5 24V DC power input Table 8 J1 Power Supply Connector Pin Number Signal Name 7 5V 24V DC Version 0 2 Page 15 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter 4 Software Description Overview This chapter provides information regarding the software that is shipped with the GESBC 9G201 Board The software included with the board is U boot boot loader Linux kernel 2 6 25 and Debian distribution style compact root file system The applications included provide access to all hardware functions on the GESBC 9G20i board Data Storage on GESBC 9G20i The default configuration of the GESBC 9G20i Single Board Computer uses on board NAND FLASH for all data storage requirements including boot strap code boot loader Linux kernel and Linux file system The following table is the factory default storage map on the NAND FLASH Table 9 NAND FLASH Storage Map Start Address Size Usage 0x000000
13. ode esse cid 16 ns VOETE HA EE N EE EE eames 16 U boot Boote Lines o 16 Loading Linux Kernel and root File SyStelM ooonoconocncononononononononancnanonncnononanonnonano nano nano ee ke ee 17 Chapters Development Tori cdi 19 8 ala EE RE EE N 19 Linux Development Tool Watts Ee oe ee See dci 19 Chapter 6 Troubleshooting de 21 Version 0 2 Page 2 of 21 20 Sep 13 GESBC 9G20i User s Manual List of Tables Table 1 UART Port PO Connector on GESBC 9G2Ol oooonoconoconoccnononancnononnnonanonnnonanonncornncnanonnnccnnenos 11 Table 2 HART Por PIEC ONE ore SR EE cried 11 Table JI PC DUS os eed REM sei Ged ee nda lolita 11 Table Ae OPE Xan sr de a 12 Tables BOTO Ds N ORR AE EE OE ER RE 13 Table 12 Se IE ER EE OE N OR N EE N 14 Table T 120 LAG Come ctor att ee ee ED ee ee RO ER ocean 14 Table 8 J1 Power Supply Connector ita laicas 15 Table 9 NAND FLASH Storage Map italia ee foil cit 16 Version 0 2 Page 3 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter 1 Introducing the GESBC 9G20i Single Board Computer GESBC 9G20i Overview The GESBC 9G20i is a low cost compact sized single board computer based on Atmel AT91SAM9G20 processor With a large peripheral set targeted to a variety of applications the GESBC 9G20i is well suited for industrial controls digital media servers audio jukeboxes thin clients set top boxes point of sale terminals biometric security systems and GPS devices Advanced Features The heart of t
14. orted through various toolsets available from third party suppliers The typical toolset required for the code development is a compiler assembler linker and a source level code debugger Code debugging is supported via the on chip JTAG interface Linux Development Tool Chain The Linux development tool chain is available at Glomation website in the support page A host PC running Linux operating system is required to run the development tools This guide assumes user had basic Linux or Unix application development knowledge Host Computer Requirement The host PC should run Redhead SuSe or other Linux distribution a RS 232 serial port at least 500MB free disk space and a terminal program such as minicom Hardware Connection A null modem cable is required to connect GESBC 9G20i to the host computer Install Linux Development Tool Chain The ARM Linux Development Tool chain can be installed in any directory on the host system The following example uses cross compiler default directory usr local arm as the installing directory for the ARM Linux cross compiler 1 Login as root and untar the tool chain cd tar jxvf lt cross compiler tar file directory gt Generic arm_gcc 4 2 3 glibc 2 3 3 tar bz2 2 Set up the directory path variable export PATH usr local arm gcc 4 2 3 glibc 2 3 3 arm unknown linux gnu bin PATH Version 0 2 Page 19 of 21 20 Sep 13 GESBC 9G20i User s Manual above command can be included in the
15. re 1 Place the GESBC 9G20i on a static free surface 2 Make sure all of the jumpers are in the factory default position The unit is shipped in a factory default configuration If the user is uncertain that the GESBC 9G20i has the jumpers in the factory default configuration please see the next section regarding board configuration 3 Connect 7 5 18V DC power supply to the board through J1 4 Connect null modem serial cable between GESBC 9G20i debug port PO and PC terminal serial port 5 Launch a terminal emulator such as HyperTerminal or minicom on the PC configured to connect to the serial port of the GESBC 9G20i Configure the serial port with the following parameters 115200 bits per second 8 data bits no parity 1 stop bit no flow control 6 Connect the board to a local area network optional Operation A few seconds after applying power to the GESBC 9G20i debug information will be displayed on the terminal program The following figures show what this should look like Version 0 2 Page 7 of 21 20 Sep 13 GESBC 9G20i User s Manual _ Direct 115200 0 x File Edit View Properties Transfer Automation Window Help 2E6uCes 00 74 Terminal Phonebook CallLog Lists RomBOOT gt U Boot 1 3 3 Jul 19 2008 15 50 33 64 MB 128 MiB DataFlash AT45DB642 2 1056 Size 8650752 bytes Logical address xD9999909 9 DO909 09 to DOOBA1FF RO Bootstrap 1 DO004200 to DOBB83FF Environment 2 DO00
16. see the AT91SAM9G20 datasheet SDRAM The GESBC 9G20i is shipped with 32MBytes of SDRAM FLASH The GESBC 9G20i is shipped with 128MB NAND FLASH USB The GESBC 9G20i is shipped with two USB host ports UART 1 The GESBC 9G201 is shipped with a RS 232 interface with RTS and CTS hardware flow control signals Version 0 2 Page 5 of 21 20 Sep 13 GESBC 9G20i User s Manual UART 2 The GESBC 9G201 is shipped with the 3 wire UART 2 interface DEBUG Port The GESBC 9G201 is shipped with the 3 wire serial debug port Ethernet The GESBC 9G20i is shipped with a complete physical and MAC subsystem that is compliant with the ISO TEC 802 3 topology for a single shared medium with several stations The AT91SAM9G20 supports 1 10 100 Mbps transfer rates and interfaces to industry standard physical layer devices Version 0 2 Page 6 of 21 20 Sep 13 GESBC 9G20i User s Manual Chapter 2 Getting Started This chapter describes the GESBC 9G20i working environment and familiarizes the user with its components and functionality This chapter contains the following sections e Assembly and Connections o Describes how to assemble and connect components to the GESBC 9G20i Single Board Computer e Operation o Describes how to operate the GESBC 9G20i Single Board Computer Assembly and Connections In order to use the GESBC 9G20i the user must first assemble and connect the peripherals to the GESBC 9G20i as described in the following procedu
17. sor It is provided via the DB 9 connector on GESBC 9G201 The UART P1 provides RTS and CTS hardware handshake signals Table 2 UART Port P1 Connector Pin Number Signal Name Pin Number Signal Name 5 O _ l6 eo AIN k 7 ORS TS ENE TA ay The port 2 is the USART 1 of the AT91SAM9G20 It is provided via the I O block Please see Table 4 J8 I O Expansion for detail RS 485 The GESBC 9G20i Single Board Computer provides one half duplex RS 485 port The RS 485 port is connected to USART3 with RTS signal for RS 485 driver direction control The RS 485 signal is provided via the I O terminal block Please see Table 4 J8 I O Expansion for detail J6 enables the on board 120 ohm termination resistor The RTC3 is connected to the RS 485 driver chip for data direction control The normal setting of RTS signal is normally low For RS 485 mode the RTS signal must set to normally high The user program must set the RTS mode before the RS 485 port can be used 12C Bus The GESBC 9G20i Single Board Computer provides one I2C bus interface via a 1x3 2 54mm spacing header J9 Table 3 J9 12C bus Pin Number Signal Name Version 0 2 Page 11 of 21 20 Sep 13 GESBC 9G20i User s Manual Ethernet The GESBC 9G20i Single Board Computer is shipped with support for a complete Ethernet interface The AT91SAM9G20 contains a MAC subsystem that is compliant with the ISO TEC 802 3 topology for a single shared medium with several stations The Media Access Control
18. thact macb0 Environment size 353 131067 bytes U Boot gt The boot cmd setting of the U boot reads the Linux kernel from NAND FLASH at address 0x100000 to SDRAM at address 0x22000000 and start executing the kernel code at the same memory address The NAND FLASH from 0x400000 and up is used for Linux root file system The U boot passes the MTD device partition setting to the Linux kernel via the bootargs environment variable Loading Linux Kernel and root File System The U boot boot loader provides many ways to load Linux kernel and file system into FLASH memory The loading by Ethernet network is shown here User can consult U boot manual for other methods of loading data After power on the GESBC 9G20i board stop the U boot auto execution by press any key The following message should be shown on the terminal console on the host PC connected to the GESBC 9G201 board U Boot 1 3 4 Jul 19 2009 15 50 33 DRAM 32 MB NAND 128 Mil En serial serial serial macb0 Starting autonegotiation Autonegotiation timed out status 0x7849 link up 100Mbps full duplex lpa Ox4del Hit any key to stop autoboot 0 U Boot gt Version 0 2 Page 17 of 21 20 Sep 13 GESBC 9G20i User s Manual The network address and server address must be set before network transfer can take place The following commands will set the SBC IP address and server IP address set ipaddr XXX XXX XXX XXX set serv
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