V895 - CAEN
Contents
1. Q Lb VME P1 connector Li on Rotary switches for ee dl Test u on Veto _ Base Address selection Discriminator Kor Ch 8 Ch 9 Ja MAJ Discriminator pele Ch 6 Ch 7 Flat Cable Connectors A B I VME PAUX connector Discriminator Ch 4 Ch 5 Discriminator Ch 2 Ch 3 OL V895 only N Yo N VME P2 connector di Channels 0 to 7 Discriminator Ch 0 Ch 1 O NPO 00101 97 V895x MUTx 03 Base address bit lt 31 28 gt Base address bit lt 27 24 gt Component side of the board Rotary switches for Base Address selection Fig 2 2 Components location Filename v895_rev3 doc Number of pages 25 Page 14 CAEN ols for Dix ery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 VME P1 s connector a Internal T JP 1 External I Le VME2. CAEN o ls for Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 4 Operating Modes 4 1 Test Veto and Or signals Some operations can be performed sending two external NIM signals e TEST an input signal sent through this connector triggers all the enabled channels at once This feature allows to check the module as well as to generate a pattern of pulses suitable to test any following electronics e VETO see Fig 2 1 an input signal sent through this connector allows to inhibit all channels simultaneously Its leading edge must precede the input signal leading edge by at least 8 ns and overlap completely the input signal It doesn t act on TEST input Note TEST and VETO are high impedance inputs and each one is provided with two bridged connectors for daisy chaining the chain has to be terminated on 50 Ohm on the last module e An OR output connector provides also the logical OR of the output channels The relevant OR LED lights up if at least one of the enabled channels is over threshold 4 2 Channel test It is possible to test all channels in the following ways e sending a NIM pulse through one of the two TEST connectors located on the front panel e performing a write access to the 4C base address see 3 8 NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 20 Tools for Discovery Do
3. 4A write only This register contains the Pattern of Inhibit a 16 bit word indicating which channels are either enabled or disabled bit X 1 Ch X enabled bitX 0 Ch X disabled Output width Ch 0 7 Base address 40 write only This register contains the output pulse width value of the channels O through 7 on a 8 bit word This value can be adjusted in the range from 5 ns to 40 ns writing an integer number between 0 and 255 into the register The set value corresponds to the width as follows 255 leads to a 40 ns pulse duration 0 leads to a 5 ns pulse duration with a non linear relation for intermediate values Output width Ch 8 15 Base address 42 write only This register contains the output pulse width value of the channels 8 through 15 on a 8 bit word This value can be adjusted in the range from 5 ns to 40 ns writing an integer number between 0 and 255 into the register The set value corresponds to the width as follows 255 leads to a 40 ns pulse duration 0 leads to a 5 ns pulse duration with a non linear relation for intermediate values Majority threshold Base address 48 write only This register allows to set the Majority threshold between 1 and 16 for Internal Majority and between 1 and 20 for External Majority writing a proper value in the Base address 48 value range 1 244 The Majority threshold can be calculated in the following way MAJTHR NINT MAJLEV 50 25 4 where NINT is th
4. 20 Note The output requires a 50 Ohm termination for a correct operation of the Majority logic Channel 1 Channel 2 I RSR Channel 3 poo CT E EH tne Current Sum gt o i i i tt mA y Fig 4 2 Current Sum signal NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 23 CAEN o Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 4 7 Majority setting Majority output provides a standard NIM signal if the number of channels over threshold exceeds the programmed majority level MAJLEV MAILEN can be programmed between 1 and 16 writing a proper value MAJTHR in the Majority threshold register see 3 6 valid values range between 0 and 255 MAJTHR can be calculated in the following way MAJTHR NINT MAJLEV 50 25 4 where NINT is the Nearest Integer 1 2 3 4 5 6 7 8 9 0 _ Table 4 1 Majority Level setting values The Majority logic can be switched from an Internal to an External position by means of an internal Jumper see Fig 2 3 e Internal With the jumper on the Internal position Majority output provides an active signal if the number of the active channels of the module exceeds or is equal to the programmed majority level MAJLEV In this case valid values of MAILEN are from 1 to 16 e External Several modules can be conn
5. P2 and PAUX connectors The Mod V895 B is provided with P1 P2 connectors NO PAUX 2 2 Power requirements The power requirements of the Mod V895 and Mod V895 B NO PAUX are as follows Table 2 3 Power requirements Power supply V895 V895 B 110 mA 110 mA 700 mA RE EEE EE NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 10 CAEN cover Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 2 3 Front panel CAEM Mod V895 aoma mA o m lt N FIN w PN PN O e CS gt Fig 2 1 Mod V895 front panel NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 11 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 2 4 External connectors The location of the connectors is shown in Fig 2 1 Their function and electromechanical specifications are listed in the following subsections 2 4 1 INPUT connectors INPUT CHANNELS Mechanical specifications 16 LEMO 00 type connectors Electrical specifications negative polarity 50 Ohm impedance DC coupling input range 5 mV 5 V input offset 5 mV 140 MHz maximum input frequency VETO INPUT Mechanical specifications 1 LEMO 00 type connect
6. s version see Fig 1 1 The version with the PAUX connector requires the V430 backplane Available exclusively on request NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 6 CAEN Is for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 1 2 Block diagram AN DACs TEST INHIBIT WO Ten RN eee NN S 8bit 8bit Sp 8bt 8bit inhbit DAC DAC DAC DAC DAC MAJ cho ou chi4 hip THRESHOLDS AND WDTH Ge A WME INTERFACE BUS INPUTS lt 0 15 gt T N lt W disor disor Lu dso discr x ch 0 ch 1 ch 14 ch 15 TEST gt VETO 0 Fig 1 2 Block Diagram NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 7 CAEN Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 1 3 Technical specification table Table 1 2 Technical specification table Packaging 6U high 1U wide VME unit Power requirements Refer to 2 2 Threshold range 1 mV to 255 mV 1 mV step Input Signals Inputs Channels 16 inputs negative polarity DC coupl
7. nine ersnnene see sesnnene see snennnene see erennene eee enenneneeessesnn 20 4 2 CHANNEL TEST csi civtsceesscescectvecesscateecchcssceeticudvscesshucssaces G2vcns E dee Manse cauateussecevescguensesceadacesulestecceoas 20 4 3 THRESHOLD SETTING eeaeee e oeer rer erben bee dE NL tels Nota Rennen 21 4 4 OUTPUT PULSE WIDTH SETTING nee errrennreeneeenneeneeeenrneeeeeensneeeeeeneeeeeeesneenee 21 4 5 UPDATING AND NON UPDATING MODE SETTING nn 21 Z CURRENTSUMSIGNAL ss aka ni e eaa a te nd E rien EAEE AEA EA OE Ea ae TEA oE 23 Ae MAJORITY SETIING drsi es eine 24 NPO 00101 97 V895x MUTx 03 Filename v895_rev3 doc Number of pages Page 25 3 CAEN Q Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 LIST OF FIGURES FIG 1 1 MODEL TYPE LABEL SAMPLE 6 PIG 1 2 BLOCK DIAGRAM NEE 7 FIG 2 1 MOD V895 FRONT CEET 11 FIG 2 2 COMPONENTS LOCATION EE 14 Oe EIER LOCATION eher 15 PIG 24 VETO SIGNAL EE 16 FIGs 3 1EMODULE IDENTIFIER WORDS 25432 cuovesarerSueavesenwacebusshosde len been an 19 Fic 4 1 V895 UPDATING AND NON UPDATING MODE csssccesseeesseceseeeeseeceseeeesaeceeeeecnaeceeeeecaaeceeeeecaaeceeneesaeenses 22 FIG 42 CURRENT SUM SIGNAL E 23 FIG 4 3 EXAMPLE OF THREE DAISY CHAINED V895 inner 25 LIST OF TABLES TABLE 1 1 WERSIONS AVAILABLE FOR THE MODEL V895 ire 6 TABLE 1 2 TECHNICAL SPECIFICATION TABLE 8 TABLE
8. 2 3 POWER REQUIREMENTS ihetedvecseucsbedsedeossdbelechecdeswassonesenssetavessccseeessedeecuooscacrnsees 10 TABLE 3 1 ADDRESS Map 17 NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 4 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 1 General description 1 1 NPO Functional description The CAEN Mod V895 is a 16 CHANNEL LEADING EDGE DISCRIMINATOR housed in a single width VME module The module accepts 16 negative inputs positive on request and produces 16 differential ECL outputs with a fan out of two on two front panel header connectors a functional block diagram is shown in Fig 1 2 The pulse forming stage of the discriminator produces an output pulse whose width is adjustable in a range from 5 ns to 40 ns via VME Each channel can work both in Updating and Non Updating mode according to on board jumpers position The discriminator thresholds are individually settable in a range from 1 mV to 255 mV 1 mV step via VME through an 8 bit DAC The front panel houses also VETO and TEST inputs A Current Sum output generates a current proportional to the input multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 20 A MAJORITY output provides a NIM signal if the number of input channels over threshold exceeds the MAJORITY programmed value Severa
9. FICATIONS ivisesssscissenssitesssvnstasonseisnsssceccssonsensncstsescssosseitensntescsonscatseseateesscessecane 10 2d PACKAGING EE 10 2 2 POWER REQUIREMENTS cccccesssssstcecececeesensnsecececeessnscaecececeeseuaesecececsessnaecesececsessuaesesececeeseanaeseeeeeeeesees 10 2 3 FRONT PANED emie Seed ERENNERT 11 2A EXTERNAL CONNECTORS Ben ees Bea ante EE EE Ea KPA EERE A SKEE E Re hen EEN 12 2 4 1 EINE ER 12 2 4 2 OUTPUT CoNNectors eieiei ele le AEE diese nslentos oies ten lentes nel re 12 2 3 OTHER COMPONENTS eegend nenie ne anea aa eenegen 13 2 5 1 DISDIQYS 03a uss E E E T E Eeer 13 2 5 2 DS WIELCHES A EEA E EE EA EE EA E AA E SEENEN T 13 2 5 3 RE EE 13 2 6 CHARACTERISTIC OF THE SIGNALS cssccsssccesceessscecceecssscceneesssnceccsecnssceensesnsceescsessccesseesnsceeesesnaceesnees 16 3 VME INTERFACE 17 3 1 ADDRESSING CAPABILITY hen ten tendon denses tanins Sosngiabareesemerseceemotestaes ines 17 3 2 DISCRIMINATOR THRESHOLDS siissssssasscinl tsssrbs isehnttckensskeneehecnspsenktahch EErEE aE hE EE EE rE RE EEE ar n hEn a 18 3 3 PATTERN OF INHIBI uaauensstentieniknkkunehn E Ea E aE a aio Eata 18 SA OUTPUT WIDTH D 18 3 5 OUTPUT WIDTH CH TT 18 36 MAJORITY THRESHOLD eere ieee rE EEE ERE EAE A E E Ea 18 dl TESTPULS icase neia a a aea e a a N a E E Ea as eTR ES eith 19 3 8 MODULEIDENTIFIER WORDS 2 55 neck eE R EE ESAE A SEE EEEE SR E E E Een 19 4 OPERATING MODERN 20 4 1 TEST VETO AND OR SIONALS
10. PAUX connector Ss VME P2 connector M Mode Jumpers Li pe Components side Y Updating I Non Updating_ Fig 2 3 Jumpers location NPO Filename Number of pages 00101 97 V895x MUTx 03 v895_rev3 doc 25 Page 15 CAEN is for iscoy Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 2 6 Characteristic of the signals INPUTS Channels Negative polarity 50 Ohm impedance maximum input frequency e 140 MHz updating e 80 MHz non updating DC coupling input range 5 mV 5 V input offset 5 mV reflections lt 4 for 2 ns rise time input signals VETO standard NIM logic signal high impedance 15 ns minimum FWHM Leading edge of the VETO signal must precede of at least 8 ns the leading edge of the input and overlap completely the input signal see Fig 2 4 N B the VETO signal doesn t act on TEST input INPUT SIGNAL THRESHOLD Requirements T gt 15 ns time Ta min gt 8 ns Tu Ts T gt 0 Fig 2 4 Veto signal TEST standard NIM logic signal high impedance 5 ns minimum FWHM 30 MHz maximum input frequency OUTPUTS Outputs Differential ECL level on 110 Ohm impedance Pulse width adjustment from 5 1 ns to 40 5 ns FWHM Outputs pulses can be programmed either in Updating or Non Updating mode see 4 5 Output pulse rise fall time lt 3 ns INPUT OUTPUT
11. Technical Information Manual Revision n 3 19 March 2009 MOD V895 series 16 CHANNEL LEADING EDGE DISCRIMINATORS NPO 00101 97 V895x MUTx 03 CAEN will repair or replace any product within the guarantee period if the Guarantor declares that the product is defective due to workmanship or materials and has not been caused by mishandling negligence on behalf of the User accident or any abnormal conditions or operations CAEN declines all responsibility for damages or injuries caused by an improper use of the Modules due to negligence on behalf of the User It is strongly recommended to read thoroughly the CAEN User s Manual before any kind of operation CE CAEN reserves the right to change partially or entirely the contents of this Manual at any time and without giving any notice Disposal of the Product The product must never be dumped in the Municipal Waste Please check your local regulations for disposal of electronics products Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 2009 3 TABLE OF CONTENTS _ GENERAL DESCRIPTION sms 5 1 1 FUNCTIONAL DESCRIPTION ccsssssssscccossersscscnsesssscsensesssscosnsessusceonsesssesonsessnsesonsesnssesensessnsceonsesnnsesensetes 5 12 BLOCK e e EE H 1 3 TECHNICAL SPECIFICATION TABLE woners ea ae covabcecscceadscosuaeeesdcceacocuivuessatevsbtecueenves 8 2 TECHNICAL SPECI
12. cument type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 4 3 Threshold setting 4 4 4 5 NPO Each V895 channel is provided with an 8 bit DAC to set the threshold The threshold value can be programmed in a range from 1 mV to 255 mV with 1 mV steps valid values 1 255 Threshold for each channel can be set performing a write access to the Base addresses 00 1E see 3 2 Output pulse width setting The output pulse width is adjustable from 5 to 40 ns Two width values can be programmed one for channels 0 through 7 and one for channels 8 through 15 Chosen value is set performing a write access to the following registers see 3 4 and 3 5 Base 40 sets output width for channels 0 to 7 Base 42 sets output width for channels 8 to 15 Valid data for the 8 bit registers are 0 leads to 5 ns 255 leads to 40 ns with a non linear relation for intermediate values Updating and Non Updating mode setting Each channel of V895 may provide an Updated retriggerable or a Non Updated not retriggerable output Output mode selection is performed individually for each channel via jumpers as shown in Fig 2 2 Non Updating output mode an input pulse over threshold occurring at t event 1 in fig 4 1 sets the channel output active for the programmed duration T T 5 40 ns see 3 4 Any event over threshold occurring at t with ty lt t lt t T
13. delay 17 5 1 5 ns OR standard NIM logic signal on 50 Ohm maximum output frequency 50 MHz 4 ns rise fall time CURRENT SUM high impedance with rate of 1 mA 20 per hit maximum output frequency 25 MHz 8 ns rise fall time MAJORITY standard NIM logic signal on 50 Ohm NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 16 Tools for Discovery i Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 3 VME Interface 3 1 Addressing capability The V895 module works in A24 A32 mode This implies that the module s address must be specified in a field of 24 or 32 bits The address modifiers codes recognized by the module are AM 39 Standard user data access AM 3D Standard supervisor data access AM 09 Extended user data access AM 0D Extended supervisor data access The module s Base address is fixed by 4 Internal rotary switches housed on two piggy back boards plugged into the main printed circuit board see Fig 2 2 The Base address can be selected in the range 00 0000 lt gt FF 0000 A24 mode 0000 0000 lt gt FFFF 0000 A32 mode The module s address lines A09 A15 are not connected so their content is meaningless for example writing to either Base 104C or Base 284C the same register is accessed Table 3 1 Address Map Base 00 Threshold register Ch Base 02 Threshold reg
14. e nearest integer function allowed values for MAJLEV 1 to 20 e g if the desired Majority level is 5 the correct MAJTHR value to use is 56 see also 4 7 Filename Number of pages Page 18 00101 97 V895x MUTx 03 v895_rev3 doc 25 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 3 7 Test pulse Base address 4C write only A test pulse on all output channels can be generated by performing a write access at Base address 4C the test pulse is generated independently from the number written into this register 3 8 Module identifier words Base address FA FC FE read only Three words located at the Base address FA FC FE of the page are used to identify the module as shown in Fig 3 1 15 14 13 12 11109 8 7 6 5 4 3 2 1 0 Address Version Module s serial number Base FE Manufacturer number Module type Base FC FA Fixed code F5 Fixed code Base FA Fig 3 1 Module Identifier Words The word located at the address Base FE identifies the single module via a serial number and any change in the hardware will be shown by the version number For the Mod V895 the word at the address Base FC has the following configuration Manufacturer N 000010 b Type of module 0001010100 NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 19
15. ected in daisy chain via the outputs In this case by setting the Jumper to the External position the Majority logic will act on the sum of the amp outputs of the connected modules The majority signal will be active if the sum of chained modules active channels exceeds the programmed MAJLEV An example with three chained modules is shown in Fig 4 3 The gt output line must be terminated with 50 Ohm NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 24 CAEN Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 ee E Fee Er Seren CMaj State INT CMaj State INT Maj State EXT 3mA gt S i u 2 5 Majority Level MAJLEV referred to internal over th referred to internal over th 10 channel channel referred to all over th channels Number of Module s active Channels gt 4 3 ACTIVE NON Active ACTIVE 5 gt MAJLEV 4 lt MAJLEV 5 4 3 gt MAJLEV Majority Output Fig 4 3 Example of three daisy chained V895 NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 25
16. impedance 2 5 Other components 2 5 1 Displays The front panel hosts the following LEDs DTACK Type 1 green LED Function VME selected it lights up during a VME access OR Type 1 green LED Function it lights up if at least one output signal is present 2 5 2 Switches ROTARY SWITCHES Function they allow to select module s base address please refer to Fig 2 2 for their setting 2 5 3 Jumpers JP1 Function it allows to select the Majority logic Internal External please refer to Fig 2 3 for the jumper location on the V895 board MODE JUMPERS 16 3 pin jumpers allow to select the channel s operating mode updating non updating refer to Fig 2 3 for the jumpers location on the V895 board NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 13 CAEN Q Tools for Discovery Document type User s Manual MUT Channels 8 to 14 EE Title Mod V895 16 Channel Leading Edge Discriminator Base address bit lt 23 20 gt gt Base address bit lt 19 16 gt E Flat Cable Connectors A B p Discriminator Ch 14 Ch 15 Discriminator Ch 12 Ch 13 Discriminator Ch 10 Ch 11 Revision date Revision 19 03 09 3 ER amp x S Ze 8 L Rotary switches for lt 07 Base Address selection amp 2 Q E sZ Ze 8 1
17. ing Input Impedance 50 Q Reflections lt 4 for input pulses of 2 ns rise time Input Range 5 mV 5 V Input Offset 5 mV Max input frequency 140 MHz Updating mode 80 MHz Non Updating mode Double Pulse Resolution 7 NS Updating mode 12 ns Non Updating mode Test Input NIM logic signal High impedance Min FWHM 5 ns Max frequency 60 MHz Veto Input NIM logic signal High impedance Min FWHM 15 ns NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 8 CAEN Document type Title User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator Output Signals 16 ECL outputs with a fan out of two Revision date Revision 19 03 09 3 Outputs Outputs Impedance 1100 Output Width 5 1 ns to 40 5 ns FWHM Output Rise Fall Time lt 3 ns Input Output Delay 15 5 1 5ns Crosstalk lt 47 dB Majority Output NIM logic signal 50 Q impedance Or Output NIM logic signal 50 Q impedance Max frequency 50 MHz Output 1 mA 20 per hit high impedance Max frequency 25 MHz NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 9 CAEN o Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 2 Technical Specifications 2 1 Packaging The Models V895 and V895 B are housed in a 6U high 1U wide VME unit The Mod V895 is provided with P1
18. ister Ch Base 04 Threshold register Ch Base 06 Threshold register Ch Base 08 Threshold register Ch Base 0A Threshold register Ch Base 0C Threshold register Ch Base 0E Threshold register Ch Base 10 Threshold register Ch Base 12 Threshold register Ch Base 14 Threshold register Ch Base 16 Threshold register Ch Base 18 Threshold register Ch Base 1A Threshold register Ch Base 1C Threshold register Ch Base 1E Threshold register Ch Base 40 Output width register Ch 0 to 7 Write only Base 42 Output width register Ch 8 to 15 Write onl Base 48 Majority threshold register Write only Base FA Fixed code Read only Base FC Manufacturer amp Module type Read only Base FE Version amp Serial number Read only oo oNOOOVP OPD O NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 17 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 3 2 Discriminator thresholds 3 3 3 4 3 5 3 6 NPO Base address 00 to 1E write only These registers contain the discriminator thresholds values on 8 bit words The thresholds values can be programmed in a range from 1 mV to 255 mV with 1 mV steps writing an integer number between 1 and 255 into the register the thresholds are individually settable Pattern of inhibit Base address
19. l V895 boards can be connected in a daisy chain via the Current Sum output in this case by switching the majority logic to External it s possible to obtain a Majority signal when the number of active channels in the chained modules exceeds a global Majority level An OR output on a front panel connector provides a global OR of the output channels The relevant OR LED lights up if at least one of the unmasked channels is over threshold The module s operations are completely controlled via software for each channel through the VME bus The most important are Setting of the discriminator thresholds 8 bit data from 1 to 255 mV Setting pattern of inhibit each channel can be turned ON or OFF by using a mask register Setting output width in a range from 5 to 40 ns Setting of the Majority threshold value Common TEST Several versions are available refer to Table 1 1 for details Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 CAEN s for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 Table 1 1 Versions available for the Model V895 Version Number of PAUX connector channels V895 16 yes V895 B 16 no LES WV895XBAAAAA MAY 5th 2002 Fig 1 1 Model type label example V895 B A label on the printed board soldering side indicates the module
20. ors Electrical specifications standard NIM logic signal high impedance 15 ns minimum FWHM leading edge of the VETO signal must precede of at least 8 ns the leading edge of the input and overlap completely the input signal the VETO signal doesn t act on TEST input TEST INPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications standard NIM logic signal high impedance 5ns minimum FWHM 60 MHz maximum input frequency 2 4 2 OUTPUT connectors OUTPUT CHANNELS Mechanical specifications 4 Header 3M 3408 D202 type 8 8 pin connectors Electrical specifications Differential ECL level on 110 Ohm impedance pulse width adjustment from 5 1 ns to 40 5 ns FWHM Input Output delay 15 5 1 5 ns OR OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications standard NIM logic signal 50 Q impedance 50 MHz maximum input frequency NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 12 Tools for Discover Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications current output 1 mA 20 per hit high impedance 25 MHz maximum input frequency MAJORITY OUTPUT Mechanical specifications 1 LEMO 00 type connectors Electrical specifications standard NIM logic signal 50 Q
21. will be ignored Updating output mode input pulse over threshold occurring at t event 1 in fig 4 1 sets output active for the programmed duration T T 5 40 ns see 3 4 Any input event over threshold for te lt t T will restart the pulse forming stage forcing the output to active value until instant t T Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 21 CAEN 0 Tools for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 Event 1 Event 2 Event 3 THRESHOLD INPUT SIGNAL ti HT ts al Bert lt gt i h time T NON UPDATING MODE OUTPUT X T T UPDATING i MODE OUTPUT a T Ja gt T T 5 40ns programmable T min 7ns Double Pulse Resolution updating 12ns Double Pulse Resolution non updating Fig 4 1 V895 Updating and Non Updating mode NPO Filename Number of pages Page 00101 97 V895x MUTx 03 v895_rev3 doc 25 22 CAEN Is for Discovery Document type Title Revision date Revision User s Manual MUT Mod V895 16 Channel Leading Edge Discriminator 19 03 09 3 4 6 Current Sum signal The Current Sum 2 output connector provides a current proportional to the input signal multiplicity i e to the number of channels over threshold at a rate of 1 0 mA per hit 50 mV per hit into a 50 Ohm load
Download Pdf Manuals
Related Search