BIS C-60_1
Contents
1. Head 2 wwf p 0000000000000000000 Terminal UEDIDDIIIIIN STR RENI block t i i i i i __ INTERBUS a Input When connecting the bus lines be sure that the shield makes a good connection with the PG housing Please note the installation instructions on 60 INTERBUS Output Terminal location and designation Power supply and digital input 64 CE BALLUFF C60 1 023 0105 en p65 BIS C 6001 Interface Information Wiring Diagrams Wiring plan for Connection for read write head 8 pin Terminal block BIS C 6001 using assignments BIS C 670 adapter Terminal block INTERBUS Input INTERBUS Output Connection location and name Supply voltage and digital input BIS C 6001 Changing the EEPROM When connecting the bus lines be sure that the shield makes a good connection with the PG housing Please note the installation instructions on 60 BALLUFF ED 65 Changing the To replace the EEPROM open up the processor as described on D 58 EEPROM in the BIS C 6001 processor Be sure before opening that the unit is discon nected from power2. A total of 27 bytes of data are exchanged For the remainder of the procedure see Example 7 on 43 Dynamic mode is turned off while the Mixed Data Access program is being run BALLUFF CE 49 Function Description Examples for protocol sequence Example No 12 Put the relevant read write head into ground state Both read write heads can be independently set to the ground state For configuring with double bit header Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer 2 Go to ground state Process subaddresses of the input buffer O0He O7Hex Set GR Bit O0He O7Hex Reset BB Bit 3 Process subaddresses of the output buffer 4 Process subaddresses of the input buffer O0ns 07u Reset GR Bit 00 07 Set BB Bit 50 CE BALLUFF C60 1 023 0105 en p65 Function Description Examples for protocol sequence Example No 13 Program configuration data Configuration data can be programmed in both buffers for Head 1 and Head 2 as desired For configuring with double bit header Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the order shown order shown One Command designator 04 tex O0He O7Hex Set AA Bit invert TO Bit O0He O7 Hex Set AV Bit 3 Process subaddresses of the output buffer 4 Pr
3. The EEPROM is replaced by unplugging and plugging back into the socket BIS C 6021 Technical Data Head 2 Head 1 Head 2 J eseeneseesnerereee IETITITITIIRS RRERII e e FEES X4 BALLUFF Housing Dimensions Weight Metal 190 x 120 x 60 mm 820g Ambient temperature 0 C to 60 C Integral connector X1 Integral connector Head 1 Head 2 Round connector for X2 Round connector for X3 Integral connector X4 5 pin male 4 pin male 9 pin female 9 pin male 4 pin male Protection class IP 65 when connected Supply voltage Vs Ripple Current draw Connections for supply voltage Vs with installation remote bus with remote bus Output X2 input X3 INTERBUS Head 1 Head 2 Read Write Head DC 24 V 20 10 96 400 mA at INTERBUS input X3 output X2 at input X1 serial interface for remote bus station Ident No 03 16 bytes IN 16 bytes OUT with BIS C 621 mode 8 Byte IN 8 Byte OUT via integrated adapter with 2 x connectors for all read write heads BIS C 3__ with 4 pin connector female excluding BIS C 350 and BIS C 352 C60 1 023 0105 en p65 Electrical Connections continued Function Displays Ordering code Accessory optional not included 80 CE BALLUFF BIS C 6021 Te
4. BALLUFF 43 Function Description Examples for protocol sequence Example No 8 Programming start address 50 code tag type with 32 byte block size with Auto Read E function Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer For configuring with order shown double bit header Oa Command designator 075a O0na 07H Set AA Bit and AE Bit 02u Start address Low Byte 32u 03ux Start address High Byte 00 Hex O0us 07u CFBit to 0 32 Byte block siz9j set AV Bit 3 Process subaddresses of the output buffer 4 Process subaddresses of the input buffer O0He 07H Reset AV Bit O0He O7He Reset AA Bit and AE Bit 44 CE BALLUFF C60 1 023 0105 en p65 Example No 9 Mixed Data Access For configuring with double bit header Example No 9 Mixed Data Access continued For configuring with double bit header 46 CE BALLUFF Function Description Examples for protocol sequence Storing a program for reading out 3 data records 1st data record Start address 5 Number of bytes 7 2nd data record Start address 75 Number of bytes 3 3rd data record Start address 312 Number of bytes 17 Total number of bytes exchanged in the operation 27 bytes All 104 bytes are written for the programming Host Host 1 Process subaddresses of the output buffer in the 2 Process subad
5. Head2 Head 1 Connection for read write head 2 7 l Connection for read write head 1 Ld l 645 e Be sure before 9 opening that the unit is disconnected from power Digital input x1 power supply for ST9 remote bus version INTERBUS output INTERBUS input Mounting of the cover 4 screws EXO pesi max permissible tightening Serviceinterface X4 T gA torque 0 15 Nm Function ground FE BALLUFF CE 71 BIS C 6021 Interface Information Wiring Diagrams To make the connections for the InterBus the supply voltage and the digital input connect the pre assembled cable to the processor For additional wiring information see the following D Connect the read write heads to the terminals for Head 1 and Head 2 The BIS C 6021 ST8 processor is intended for use on the installation remote bus which provides the supply voltage over the bus The BIS C 6021 ST9 processor is intended for use on the remote bus whereby the supply voltage for the processor is brought in through X1 Connect the incoming INTERBUS cable to the INTERBUS input X3 Connect the outgoing INTERBUS cable to the INTERBUS output X2 f this remote bus station is the last one on the bus the INTERBUS output X2 must be closed off with a threaded cap to maintain the enclosure rating Please note
6. Set AE Bit set AV Bit 3 Process subaddresses of the input buffer 4 Process subaddresses of the output buffer 01 06Hex Copy first 6 data bytes 01 06Hex Enter the second 6 data bytes Process subaddress of the output buffer O0He 07He Invert TO Bit 00 07 Invert TI Bit A total of 27 bytes of data are exchanged For the remainder of the procedure see Example 2 on 437 Dynamic mode is turned off while the Mixed Data Access program is being run 48 CE BALLUFF C60 1 023 0105 en p65 Function Description Examples for protocol sequence Example No 11 Write code tag using Program No 1 code tag type with 32 byte block size Mixed Data Access AN Host BIS C 60 1 Identification System For configuring with 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the double bit header order shown order shown Olha Command designator 22u O0He O7Hex Set AA Bit 02ux Program number 01 Hex 01 06 Enter first 6 bytes of data O0us 07He C Bit to 0 32 byte block size O0us 07u Set AE Bit set AV Bit 3 Process subaddresses of the input buffer 4 Process subaddresses of the input buffer 01 064ex Copy first 6 data bytes 01 064 Enter the second 6 data bytes Process subaddress of the output buffer 00He O7He Invert TO Bit O0He 07He Invert TI Bit
7. To avoid damaging the EEPROM please observe the requirements for handling electrostatically sensitive components The EEPROM is replaced by unplugging and plugging back into the socket Location of the EEPROM 66 CE BALLUFF 9 9 0000000000000000000 19 1817 16 15 1418 1211109 8 7 6 8 4 8 2 1 EE so C60 1 023 0105 en p65 Dimensions Weight Operating Conditions Connections Enclosure Rating Electrical Connections Electrical Connections continued Function Displays rotatable by 90 degrees 68 CE BALLUFF BIS C 6001 Technical Data Housing Dimensions with read write head BIS C 652 Dimensions with adapter BIS C 650 Weight Plastic PS 169 x 90 x 35 mm 184 x 90 x 35 mm 400 g Ambient Temperature 0 C to 60 C Terminal Block Cable Entry for supply voltage for INTERBUS in output Cable Diameter Wire gauge with end crimps 19 pin 1x PG 9 fitting metal 2 x PG 11 fittings metal 4to 8 mm for PG 9 5 to 10 mm for PG 11 0 14 to 1 mm 0 25 to 0 34 mm Enclosure Rating IP 65 when connected Supply Voltage V input Ripple Current Draw INTERBUS In and Outputs Digital Input IN IN Control voltage active Control voltage inactive Input current at 24 V Delay time typ BIS C 6001 Technical Data Service interface Read Write Head option for mounted adapter BIS C 650 option for mounted adapter BIS C 670 DC 24 V
8. in waste management for quantity based fee assessment BALLUFF ED 5 Introduction BIS C Identification System System Components The main components of the BIS C Identification System are Processor Read Write Heads and Code Tags Configuration with INTERBUS remote bus BIS C 6001 1 LI processor Processor BIS C 6001 Processor BIS C 6001 with with Adapter Adapter BIS C 670 BIS C 650 Processor BIS C 6001 mit Kopf Read Write Read Write PN Head Heads BIS C 65 BIS C 35_ BIS C 3__ BIS C 3__ Mm gt Schematic Code Tags BIS C 1_ _ representation of an Identification System example 1 BIS C 3_ _ series except BIS C 350 and 352 2 BIS C 350 or 352 only 6 CE BALLUFF C60 1 023 0105 en p65 Introduction BIS C Identification System Configuration with INTERBUS remote bus or installation remote bus BIS C 6021 1 processor Processor BIS C 6021 Processor BIS C 6021 juo qt BIS C 3__ BIS C 3__ Read Write Heads BIS C 3 BIS C 3__ gt gt G Schematic representation of an Code Tags BIS C 1_ _ Identification System example 1 BIS C 3_ _ series except BIS C 350 and 352 BALLUFF CE 7 BIS C 60 1 Processor Basic knowledge for application Selecting System The BIS C 6001 processor has a plastic housing Connections are made through a terminal Components strip
9. 120 For configuring with double bit header Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in 2 Process subaddresses of the input buffer in order order shown shown One Command designator 124e O0He O7Hex Set AA Bit invert TO Bit 02 tex Start address 00H O3Hex Start address 00H Ohe No of bytes 05H No of bytes 00He O0He O7Hex Set AV Bit CT Bit to 0 3 Process subaddresses of the output buffer 4 Process subaddresses of the output buffer 01 064 Enter first 6 bytes of data 01 06Hex Copy first 6 data bytes O0He O7Hex Invert TI Bit Process subaddress of the input buffer O0He O7Hex Invert TO Bit 5 Process subaddresses of the output buffer 6 Process subaddresses of the output buffer To be continued 01 064x Enter the second 6 data bytes 01 064 Copy second 6 data bytes until the complete og oz Invert Bit Process subaddress of the input buffer memory range is written See next O0He 07He Invert TO Bit BALLUFF CE 35 Function Description Examples for protocol sequence Example No 1 41 Process subaddresses of the output buffer 42 Process subaddresses of the output buffer continued 01 0Gex Enter the remaining data byte 01 06Hex Copy the remaining data byte O0He O7 He Invert TI Bit Process subaddress of the input buffer For configuring with O0ne
10. Connector version remote bus 2 round connector for power supply digital input and service interface 2 round connectors for INTERBUS Type Mating connector Ordering code BKS S79 00 BKS S83 00 BKS S84 00 BKS S 10 3 BES 12 SM 2 115 475 for X1 for X2 for X3 for X4 for X1 Head 1 Head 2 X4 for X2 Mating connector Protective cap Protective cap C60 1 023 0105 en p65 Appendix ASCII Table Deci mal Deci mal Hex ASCII 107 6B ec 6D Deci Control Deci Deci ASCII mal Hex Code ASCII mal Hex ASCII mal Hex ASCII NL 22 16 CHV SYN 44 4 SOH 23 17 CHW ETB 42 SIX 24 18 CHX CAN 43 EX 25 19 CHY EM 44 26 1A Oriz SUB EQ 27 1B CH ESC ACK 10 CHV FS BEL 1D Chi BS 1E Cid A HT 1F CH LF 20 VT 21 22 23 24 25 26 27 28 29 2A 2B Hex ASCII 56 58 m o o w gt N lt x lt o 5 3 x o 0 1 2 3 4 5 6 7 8 9 10 11 E bs ala Ao 9 999 esee eese a zx o 3 n lt Ke a cja oD ojo 8 8 2 8 Az szja gt o a B C A M WD o o Of 2 Sf e TL omnim oloore elglglgl2l2 N BALLUFF CE 81 82 82 CE BALLUFF
11. Description of Sub Meaning Function Description Output Buffer address continued O5uex No of bytes Number of bytes to read or write beginning with the start address High Byte the High Byte is additionally used for the range between 256 and 8 191 bytes Configuration 5th byte O0Hex Default value factory setting Changes depending on the configuration Data for writing to the code tag Configuration 6th byte O0Hex Default value factory setting This value must not be changed Data for writing to the code tag 2nd Bit header The data are valid if the 1st and 2nd bit header are identical Data for writing to the code tag Please note the basic procedure on CD 13 and 28 34 and the examples on pages 1 35 52 20 CE BALLUFF C60 1 023 0105 en p65 Configuration of the input buffer for one 1 Read Write head Description of Input Buffer Please note the basic procedure on CD 13 and 28 34 Function Description Input buffer configuration and explanation Subaddress O0Hex Bit Header Bit No OtHex O2hex O3uex O4Hex 05nex Data OGHex Data O7Hex 2nd Bit Header as above g e eiegigig a e Sub address Bit Name Meaning Function Description O0Hex Bit Heade BB r HF Ready Head Error TO continued on next Toggle Bit Out The BIS Identification System
12. To integrate BIS C 6021 processor into the serial INTERBUS two terminals are provided on the housing X2 as INTERBUS output and X3 as INTERBUS input For remote bus the stations are not supplied through the bus Bus station Bus station BIS C 6021 ST9 Bus station DO1 DO2 DO1 DO1 DO2 2 D01 DH DI2 3 DH DM X DI2 4 DH GND1 GND Piri yh 5 GND1 RBST Fg i 9 1 1 Connect shield l l H l I IConnect shield Ito connector housing Ito connector i housing l 7 2E MESS 9 pin g twisted pair 9 pin 9 pin 9 pin female male X3 female X2 male output input output input ONMDRONKRWYN ONDOAN umm m d 1 Connect the jumper in the connector if another station is to follow Remove it if no additional station follows The differential signals DO and DO as well as DI and DI must be twisted pair Recommended cable LiYCY 3x2x0 25 mm AWG 24 maximum cable capacitance 120 pF m C60 1 023 0105 en p65 Changing the EEPROM in the BIS C 6021 processor A Location of the EEPROM Dimensions weight Operating conditions Connection type Enclosure Electrical connections 78 CE BALLUFF BIS C 6021 Changing the EEPROM To change the EEPROM open the processor as described on 71 Be sure before opening that the unit is disconnected from power To avoid damaging the EEPROM please observe the requirements for handling electrostatically sensitive components
13. O1Hex O2Hex O3Hex O4Hex Please note the 05uex basic procedure on CD 13 and 28 34 and the examples on pages 1 35 52 O7Hex 22 CE BALLUFF C60 1 023 0105 en p65 Function Description Input buffer configuration and explanation Description of Sub Meaning Function Description Input Buffer address continued OtHex Error code continued O9Hex Cable break to select read write head or head not connected OCHex The EEPROM cannot be read programmed ODnex Faulty communication with the code tag OEHex The CRC of the read data does not coincide with the CRC of the code tag OF Hex Contents of the 1st and 2nd bit header 1st and last bytes of the output buffers are not identical 2nd bit header must be served 11Hex Invoking a function that is not possible since the processor is in compatible with BIS C 6_1 mode Configuration 1st byte OO0Hex Default value factory setting Changes depending on the configuration or Data Data which was read from the code tag continued on next Please note the basic procedure on CD 13 and 28 34 and the examples on pages 14 35 52 BALLUFF ED 23 Function Description Input buffer configuration and explanation Description of Sub Meaning Function Description Input Buffer address continued O2tex Configuration 2nd byte 80Hex Default value factory setting Do not change Data Data which was read
14. 07He Set AE Bit double bit header 43 Process subaddresses of the output buffer 44 Process subaddresses of the input buffer O0He O7Hex Reset AV Bit O0us 07u Reset AA Bit and AE Bit 36 CE BALLUFF C60 1 023 0105 en p65 Example No 2 For configuring with double bit header Example No 3 like 2nd example but with simultaneous data transmission For configuring with double bit header BALLUFF Function Description Examples for protocol sequence Read 17 bytes starting at code tag address 10 code tag type with 32 byte block size Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in order shown One 02 Hex O3Hex 04 Hex 05H 00 Hed 07 Hex 2 Process subaddresses of the input buffer in order shown O0Ha 07 Hex 01 06Hex O0Ha 07 Hex Set AA Bit Enter first 6 bytes of data Set AE Bit Command designator 01 Hex Start address Low Byte 0A pe Start address High Byte 00 Hex No of bytes Low Byte 11 ue No of bytes High Byte 00 Hex CT Bit to 0 32 Byte block size se AV Bit 3 Process subaddresses of the input buffer 01 06Hex Copy first 6 data bytes Process subaddress of the output buffer O0He O7Hex Invert TI Bit 4 Process subaddresses of the input buffer 01 06Hex Enter the second 6 data bytes O0He O7Hex Invert TO Bit 5 Process subaddresses of the i
15. 1 processor The processor has processed the command correctly AE bit in the bit header of the input buffer If an error occurred during execution of the command an error number will be written to subaddress 01uex of the input buffer and the AF bit in the bit header of the input buffer will be set C60 1 023 0105 en p65 Codetag Present is Auto Read Reading and writing in dynamic mode Reading and writing with simultaneous data transmission 30 CE BALLUFF Function Description Processing code tags As soon as the code tag enters the active one of the read write head the processor indicates this by setting the CP bit Codetag present To accelerate the reading of small amounts of data the ID system makes the first bytes of the code tag available in the input buffer of the respective read write head as soon as the tag is detected 6 bytes for double bit header 7 bites for single bit header The data are only valid after the rising edge of the CP bit in the bit header of the input buffer They remain valid until the falling edge of the CP bit or until the controller issues a new job If the Auto Read function is activated data are automatically read 6 bytes for a double bit header 7 bytes for a single bit header beginning with a start address as soon as a code tag is recognized The read process begins at the start address that was specified by command identifier O7Hex Each head can have its
16. AF is dominant It cannot be specified which data are incorrect When the AF BIT is set the job is interrupted and declared to be ended Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the order shown order shown O0He O7Hex Set AA Bit 01 06 Enter the first 6 data bytes O0He O7Hex Invert TO Bit Ot Hex O2Hex 03 4 Hex O5Hex O0He 07 Hex Command designator 01 Hex Start address Low Byte OAtex Start address High Byte 00 ue No of bytes Low Byte 1Eue No of bytes High Byte 00 Hex Set CT Bit to 1 64 Byte block size set AV Bit 3 Process subaddress of the input buffer O1 064 Copy first 6 data bytes Process subaddress of the output buffer O0He 07He Invert TI Bit 5 Process subaddress of the input buffer Ot Hex Copy error number Process subaddress of the output buffer O0He O7Hex Reset AV Bit 4 Process subaddresses of the input buffer If an error has occurred One Enter error number 00 07 Hex Set AF Bit 6 Process subaddresses of the input buffer 00ns 07 e Reset AA Bit and AF Bit C60 1 023 0105 en p65 Function Description Examples for protocol sequence Example No 7 Write 16 bytes starting at code tag address 20 code tag type with 32 byte block size Host BIS C 60 1 Identific
17. Default value factory setting Changes depending on the configuration or Data for writing to the code tag continued next T Please note the basic procedure on CD 13 and 28 34 and the examples on pages 1 35 52 18 CE BALLUFF C60 1 023 0105 en p65 Function Description Output buffer configuration and explanation Description of Sub Meaning Function Description Output Buffer address continued O3Hex Start address Address for reading from or writing to the code tag The High Byte High Byte is additionally used for the address range from 256 to 8 191 or Start address Address for the Auto Read function starting at which the code High Byte tag is to be read The value is stored in the EEPROM The High Byte is also required for the address range from 256 to 8 191 Configuration 3rd byte OO0Hex Default value factory setting This value must not be changed Data for writing to the code tag No of bytes Number of bytes to read or write beginning with the start address Low Byte the Low Byte includes from 1 to 255 bytes Configuration 4th byte 82uex Default value factory setting Changes depending on the configuration or Data for writing to the code tag continued next D Please note the basic procedure on CD 13 and 28 34 and the examples on pages 14 35 52 BALLUFF CE 19 Function Description Output buffer configuration and explanation
18. Description Examples for protocol sequence Example No 4 Read 30 bytes starting at code tag address 10 with read error code tag type with 64 byte block size For configuring with 2 ig ificati double bit header Host BIS C 60_1 Identification System 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the order shown order shown lua Command designator 01x If an error occurs right away O2 tex Start address Low Byte OAtex 002 07 Hex Set AA Bit 034a Start address High Byte 00 ue One Enter error number 04h No of bytes Low Byte 1Enex 0042 07 Hex Set AF Bit 05e No of bytes High Byte 00 Hex O0He O7He Set CT Bit to 1 64 Byte block size se AV Bit 3 Process subaddress of the input buffer 4 Process subaddresses of the input buffer Ot Hex Copy error number O0te 07Hex Reset AA Bit and AF Bit Process subaddress of the output buffer O0He O7Hex Reset AV Bit 40 CE BALLUFF C60 1 023 0105 en p65 Example No 5 like 4th example but with simultaneous data transmission For configuring with double bit header Example No 6 For configuring with double bit header and 8 byte buffer Size 42 CE BALLUFF Function Description Examples for protocol sequence Read 30 bytes starting at code tag address 10 with read error and simultaneous data transmission code tag type with 64 byte block
19. Low Byte 05u Number of bytes High Byte O6Hex Terminator FFHex FFHex To store a second program repeat this process The procedure for writing these settings to the EEPROM is described in the 9th example on 35 45 47 Replacing the EEPROM is described on 66 for BIS C 6001 and on 77 for BIS C 6021 BALLUFF CE 33 Function Description Processing code tags The command identifier 21Hex can be used to read out the program records stored in the program from the code tag The user must document exactly which data are to be read from where and with what number of bytes for the respective program see example 10 on T 48 The command identifier 22uex can be used to write the program records stored in the program to the code tag The user must document exactly which data are to be written from where and with what number of bytes for the respective program see example 11 on 49 C60 1 023 0105 en p65 Function Description Examples for protocol sequence Example No 1 Initializing the code tag for the CRC 16 data checking The processing of this command is similar to a write command Start address and number of bytes have to correspond to the maximum number of data to be used In this example the complete memory range of a code tag with 128 bytes shall be used BIS C 1_ _ 03 L with 32 byte block size Because 2 bytes are used for the CRC only 120 bytes can be used as data bytes hence start address 0 number of bytes
20. Mounting the PG Connection on the processor BIS C 6001 60 CE BALLUFF BIS C 6001 Installing the connection cables The BIS C 6001 processor must be opened in order to make the connections for the supply voltage the digital input and the INTERBUS connections see 58 First be sure that the unit is disconnected from power Remove the 4 screws on the BIS C 6001 and lift off the cover Guide the two INTERBUS cables through the PG 11 fittings see D 60 For additional informa tion on wiring see the following CD Push the cable for supply voltage and for the digital input through the PG 9 fitting Close up the processor If the processor is equipped with an adapter BIS C 650 Connect the read write heads to terminals Head 1 and Head 2 BIS C 670 Connect the read write head to terminal Head 1 BALLUFF CE 59 BIS C 6001 Mounting the PG Connection After connecting the field bus leads to the termional block make sure that the shield has proper connection to the PG housing Screw socket Inside O ring Cable clamp Screw the swivel nut with a torque of 4 17 Nm C60 1 023 0105 en p65 Remote bus cable and interfaces for INTERBUS Remote bus cable and interfaces for INTERBUS continued 62 CE BALLUFF BIS C 6001 Interface Information Wiring Diagrams To insert the BIS C 6001 processors into the serial INTERBUS the terminal strip provides terminals 1 5 for the input interface and te
21. data are arranged within 6 configuration bytes that are sent to the BIS C 60 1 proces sor using the command identifier 04uex see Example 13 on C 51 Command identifier O5uex is used to read out the current device configuration see Example 14 on D 52 To input the configuration all 6 bytes must be entered in Hex Only the named bits are permitted to be changed If any of the other bits are changed there is no assurance that the BIS C 60 1 will function properly The default values of the 6 bytes are factory setting 1st byte 2nd byte 3rd byte 4th byte 5th byte 6th byte Hex 00 80 00 82 00 00 Binary Mis 10000000 00000000 10000010 00000000 00000000 bit 3 bit4 bit7 bit2 bit4 bit 5 bit 5 bit8 bit 5 1st byte bit 5 Activate CRC 16 data checking 1st byte bit 3 Activate simultaneous data transmission for both read write heads 2nd byte bit 5 Dynamic mode on read write head 1 for effects on read write times see T 53 54 2nd byte bit4 Activate Auto Read function starting at specified address after CT Present for Head 1 the amount data read is 6 bytes for a double bit header or 7 bytes for a single bit header C60 1 023 0105 en p65 Configuration continued Bit state 0 no 1 yes Reading and writing 28 CE BALLUFF Function Description Configuring the BIS C 60 1 processor 4th byte bit8 Arrange a 2nd bit header at the end of the input and output buffers 4th byte bit 7 Display state
22. is free to select which method of data checking he wishes to use see Parametering on D 26 and 3 31 It is not permitted to operate the system using both check procedures BALLUFF CE 9 BUS interface InTteRBus INTERBUS Communication between the BIS C 60 1 processor and the host system is via INTERBUS The INTERBUS system consists of three components the wiring module rack card for industrial PC or PLC Bus terminal as network node and or the I O modules here the BIS C 60 1 processor Depending on the wiring module up to a maximum of 63 BIS C 60 1 processors can be connected The BIS C 6001 processor is used as a remote bus station The BIS C 6021 can be used as a remote bus or installation bus station Important hints for use with PLC In some control systems the PROFIBUS DP data area is not synchronously transmitted with the updating of the input output content If more than 2 bytes of data are sent a mechanism must be used which guarantees that the data in the PLC and the data in the BIS C are always identical 2nd alternative Set 2nd bit header Data exchange between PLC and BIS is controlled by the so called bit header This is always the first byte of the respective read write head in the data buffer This bit header exists both in the input range data from BIS to the PLC and in the output range data from the PLC to the BIS IIf this bit header is also sent as the last byte a comparis
23. is in the Ready state Cable break from read write head or no read write head connected for read BIS has new additional data ready for write BIS is ready to accept new additional data and the examples on pages 14 35 52 BALLUFF E gt 21 Function Description Input buffer configuration and explanation Sub address Bit Name Description of Meaning Function Description Input Buffer continued O0uex Bit Header continued IN Input If the parameter Input IN is 1 this bit indicates the state of the Input The command was incorrectly processed or aborted The command was finished without error The command was recognized and started Code tag present within the active zone of the read write head AF AE AA CP Command Error Command end Command start Codetag Present Sub address O1uex Meaning Function Description Error number is entered if command was incorrectly processed or aborted Only valid with AF bit No error Reading or writing not possible because no code tag is present in the active zone of a read write head Read error Code tag was removed from the active zone of the read write head while it was being read Write error Code tag was removed from the active zone of the read write head while it was being written AV bit is set but the command designator is missing or invalid or Number of bytes is OOhex continued on next C Error code OOHex
24. read write head 2 Read write command at read write head 2 in process Cable break to read write head or not connected No code tag in read write range of read write head 2 If all three LED s are synchronously flashing it means a hardware error Return the unit to the factory Function displays BALLUFF ED 55 4 diagnostic LEDs on the motherboard inside the processor report the key operating states on the INrERBus LED State INTERBUS message UL green off Reset Protocol chip is is not supplied with power RC CC Remotebus Check Cable Check green off Communication Ready Communication with the IBS Master is is not possible the application has not however yet started to exchange data o BA Bus Active green off data Communication active or also Run Master is is not exchanging user FEE PEPER ERT EET RD Remotebus Disable yellow off turned off Remotebus Disable The extended bus interface is is not C60 1 023 0105 en p65 BIS C 6001 Mounting Head Processor Mounting the Depending on model the processor is equipped with a read write head or the adapter for read write head or offset read write heads Both the read write head and the adapter can be rotated by the user adapter by or 90 deg to the desired position see drawing Be sure that power is off first Loosen Ca
25. size If an error occurs the AF bit is set instead of the AE Bit with a corresponding error number When the AF BIT is set the job is interrupted and declared to be ended Host BIS C 60 1 Identification System 1 Process subaddresses of the output buffer in the order shown Ot Hex Command designator 01 Hex 2 Process subaddresses of the input buffer in the order shown If an error occurs right away O2Hex Start address Low Byte OAHex O8Hex Start address High Byte 00 ue 04H No of bytes Low Byte 1EHe O0He O7 Hex Set AA Bit One Enter error number 00ng 07 Hex Set AF Bit 05nac No of bytes High Byte 00 ua O0us 07us Set CT Bit to 1 64 Byte block siza set AV Bit 3 Process subaddress of the input buffer Ot tex Copy error number Process subaddress of the output buffer O0re O7Hex Reset AV Bit 4 Process subaddresses of the input buffer 00 07 Hex Reset AA Bit and AF Bit An error can also occur after the data have already been sent see example on the next D BALLUFF E gt 41 Function Description Examples for protocol sequence Read 30 bytes starting at code tag address 10 with read error and simultaneous data transmission code tag type with 64 byte block size If an error occurs after data have started to be sent the AF Bit is set instead of the AE Bit along with the corresponding error number The error message
26. the load capacity of the INTERBUS cable and verify during operation that the supply voltage is maintained at the processor see Technical Data for specifications C60 1 023 0105 en p65 BIS C 6021 ST8 Interface Information Wiring Diagrams installation remote bus Wiring diagram for Head2 Head 1 X1 supply voltage and digital input BIS C 6021 ST8 processor on installation remote bus 4 3 Pin 1 2 X2 INrERBus output O000000000000000000 M01817 1615141312111098 7054321 L e X4 Service interface A DO1 4 3 x4 XE T 701 Function zd ground FE d GND1 FE 424V ov BALLUFF CE 73 BIS C 6021 ST8 Interface Information Wiring Diagrams installation remote bus Wiring diagram for To integrate BIS C 6021 processor into the serial INTERBUS two terminals are provided on the BIS C 6021 ST8 housing X2 as INTERBUS output and X3 as INTERBUS input For installation remote bus the processor on stations are supplied through the bus installation remote bus continued Bus station Bus station BIS C 6021 ST8 Bus station DOI DO2 1 DOI DO1 DO2 2 D01 DH DI2 DH DU DI2 DI1
27. 023 0105 en p65 Function Description Examples for protocol sequence Example No 9 35 Process subaddresses of the output buffer 36 Process subaddresses of the input buffer pe reed ACCESS o1 024 T nchtvewendd FFus FFie O0He O7He AE Bit setzen O3us 04ue nicht verwendet FF Hed FF Hex O8te 06He nicht verwendet FFHa FF ie Ons 07u TI Bit invertieren For configuring with double bit header 37 Process subaddresses of the output buffer 38 Process subaddresses of the input buffer O0ns 07ne AV Bit r cksezen O0He O7He AA Bit und AE Bit r cksetzen We recommend that you carefully document which parameters are used for start addresses and number of bytes for writing reading the desired data records The data are sequenced in the exact order specified in the program BALLUFF ED 47 Function Description Examples for protocol sequence Example No 10 Read code tag using Program No 1 code tag type with 32 byte block size Mixed Data Access es as E Host BIS C 60_1 Identification System For configuring with double bit header 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the order shown order shown One Command designator 21 Hex O0He O7 Hex Set AA Bit O2Hex Program number 01 He 01 06Hex Enter first 6 bytes of data O0He 07Hex CT Bit to 0 32 byte block size O0ue 07He
28. 20 96 lt 10 lt 400 mA serial interface for remote bus station Ident No 03 16 bytes IN 16 bytes OUT Terminal block Optocoupler isolated 4Vto40V 1 5Vto 40V 11 mA 5ms Noc STF x BALLUFF E gt 67 RS 232 integrated BIS C 65_ and following 2 x connectors 4 pin male for all read write heads BIS C 3__ with 4 pin connector female not BIS C 350 and BIS C 352 1 x connector 4 pin male for read write heads BIS C 350 BIS C 352 LED red green LED green yellow LED green yellow BIS operating states LED in housing LED green LED green LED green LED yellow INreRBus state LED on side of housing Ready Bus active CT1 Present Operating CT2 Present Operating Reset Cable Check Bus active Remotebus Disable EC Guideline CE EMC requirements of the Generic Standard The CE Mark is your assurance that our products are in conformance with the 89 336 EEC EMC Guideline and the EMC Law Testing in our EMC Laboratory which is accredited by the DATech for Testing of Electromagnetic Compatibility has confirmed that Balluff products meet the EN 50081 2 Emission and EN 50082 2 Noise Immunity C60 1 023 0105 en p65 BIS C 6001 Ordering Information Ordering Code BIS C 6001 023 03 KL2 Balluff Identification System Type C Read Write System Hardware Type 6001 INTERBUS remote bus Software Type 02
29. 3 INTERBUS Read Write Head 000 no read write head 651 with read write head Type 651 with circular antenna on top 652 with read write head Type 652 with circular antenna on front 653 with read write head Type 653 with rod antenna 650 with two connections for external read write heads BIS C 3__ except BIS C 350 and 352 670 with offset connection for an external read write head BIS C 350 or BIS C 352 Interface BUS versions User Connection KL2 Clamp connection via 1 x PG 9 and 2 x PG 11 BALLUFF E 69 BIS C 6021 Mounting Processor Mounting the The processor is mounted using 4 M4 screws BIS C 6021 processor Head2 Head 1 70 CE BALLUFF C60 1 023 0105 en p65 Opening the BIS C 6021 processor Connection diagram for BIS C 6021 processor Connection locations and names Connecting on the remote bus or installation remote bus 72 CE BALLUFF BIS C 6021 Opening the processor Interface information To convert the processor for the power supply via the installation remote bus instead of sup plying it via X1 the internal connections have to be changed Ensure that the device is turned off Remove the 4 screws on the BIS C 6021 and lift off the cover Conversion see the following CE
30. 6 data checking is activated a special error message is output to the interface whenever a CRC error is detected If the error message is not caused by a failed write request it may be assumed that one or more memory cells on the code tag is defective That code tag must then be replaced If the CRC error is however due to a failed write request you must reinitialize the code tag in order to continue using it The checksum is written to the code tag as a 2 byte wide datum Two bytes per page are lost i e the page size becomes 30 bytes or 62 bytes depending on code tag type setup of page size see 16 This means that the actual usable number of bytes is reduced Code tag type Usable bytes 128 bytes 120 bytes 256 bytes 240 bytes 511 bytes 450 bytes 1023 bytes 930 bytes 2047 bytes 1922 bytes 2048 bytes 1984 bytes 8192 bytes 7936 bytes The last code tag page for these EEPROM based code tags is not available BALLUFF E gt 31 Function Description Processing code tags Small read write programs can be stored in the BIS C 60_1 processor s EEPROM The Mixed Data Access function is useful when the required information is stored on the code tag at various addresses This function makes it possible to read out this mixed i e non contiguously stored data from the code tag in a single procedure and using just one com mand Up to 10 programs with up to 25 instructions can be stored Each program instruction c
31. BIS C 60_1 processor is set to be compatible with the BIS C 601 or BIS C 621 all settings for data exchange must be made as described in the sections on parametering function descrip tion protocol sequence and LED display in the user s manual for the BIS C 6_1 processor This user s manual can be mailed on request or you may download it from the Internet at www balluff de Jumper setting Processor Terminal X5 compatible with BIS C 6_1 1 2 no 2 3 yes In the illustration compatibility with the BIS C 6_1 is not set To open the cover of the BIS C 6001 processor see 58 and for BIS C 6021 see D71 eor ee DERE Terminal X5 with cover removed 12 CE BALLUFF C60 1 023 0105 en p65 Basic Procedure Input and Output Buffers Please note the basic procedure on 713 and 28 34 and the examples on pages 1 35 52 14 CE BALLUFF Function Description Communication with the processor Communication between the host system and the processor takes place using a fixed proto col sequence Data integrity from the control to the processor and vice versa is indicated by a control bit This bit is used to implement a handshake between the control and the processor Following is a simplified representation of the sequence of a job sent from the control to the processor 1 The control sends a comm
32. C60 1 023 0105 en p65 No 819 395 D E e Edition 0105 Subject to modification http www balluff de Balluff GmbH Schurwaldstrasse 9 73765 Neuhausen a d F Germany Phone 49 0 71 58 1 73 0 Fax 49 0 71 58 50 10 E Mail balluff balluff de BALLUFF Certified No 376 Electronic Identification Systems BIS Processor BIS C 60_1 INTERBus C60 1 023 0105 en p65 Contents Safety Considerations Introduction BIS C Identification System Application BIS C60 1 Processor Basic knowledge for application BUS interface InterBus Compatibility with BIS C 6 1 processor Function Description Communication with the processor In and output buffer on INTERBUS Output buffer configuration and explanation Input buffer configuration and explanation Configuring the BIS C 60 1 processor Processing code tags Reading and writing Codetag Present Auto Read Reading and writing in dynamic mode Reading and writing with simultaneous data transmission CRC initialization Mixed Data Access Reading and writing with program Examples for protocol sequence Read Write Times LED Display Mounting Head Processor Opening the processor Interface information Installing the connection cables Mounting the PG connection Interface information Wiring diagrams Changing the EEPROM Technical Data Ordering information Appendix ASCII Table BALLUFF CE 3 Safety
33. Considerations Approved operation Series BIS C 60_1 processors along with the other BIS C system components comprise an identification system and may only be used for this purpose in an industrial environment in conformity with Class A of the EMC Law Installation and Installation and operation should be carried out by technically trained personnel only Operation Unauthorized access and improper use will lead to loss of warranty and liability claims When installing the processor consult the section on wiring diagrams carefully Special caution must be used when wiring the processor to external controllers particularly with respect to selection and polarity of the signals and power supply Only approved power supplies may be used with the processor See the section on Technical Data for details Use and Checking The relevant safety procedures must be followed when using the Identification System In particular steps must be taken to ensure that no danger to persons or equipment can arise should a fault occur in the Identification System This includes maintaining the published ambient operating conditions and regular checking of the functionality of the Identification System with all its associated components Fault Conditions As soon as there is evidence that the Identification System is not functioning properly it should be taken out of service and protected against unauthorized use Scope This description is valid for s
34. GND1 GND GND1 RBST FE FE FE 424V 24V ov 0v 7 1 ov Connect shield Connect shield T to connector a toconnector housing housing 9 pin 9 pin 9 pin female male X3 female X2 output input output ONOONKRWAN A ONRONKR WON twisted pair 1 Connect the jumper in the connector if another station is to follow Remove it if no additional station follows The differential signals DO and DO as well as DI and DI must be twisted pair Recommended cable LiYCY 3x2x0 25 mm AWG 24 maximum cable capacitance 120 pF m BALLUFF C60 1 023 0105 en p65 Wiring diagram for BIS C 6021 ST9 processor on remote bus X4 Service interface 4 3 BIS C 6021 ST9 Interface Information Wiring Diagrams remote bus Head2 Head 1 X1 supply voltage and digital input 4 3 1 2 X2 INrERBus output O000000000000000000 M01817 1615141312111098 7054321 E e Prt X4 U Function ground FE Wiring diagram for BIS C 6021 ST9 processor on remote bus continued 76 CE BALLUFF BALLUFF BIS C 6021 ST9 Interface Information Wiring Diagrams remote bus
35. and designator to the processor together with the associated command parameters and sets a bit AV bit This bit indicates to the processor that the transmitted data are valid and that the job is now beginning The processor takes the job and sets a bit AA bit which indicates this to the control If an additional exchange of data between the control and the processor is required to carry out the job each uses a bit TI bit and TO bit to indicate that the control processor is now ready for additional data exchange or has accepted the received data Once the processor has carried out the job correctly it sets a bit AE bit Once the control has accepted all the important data it indicates this to the processor by resetting the bit that was set at the beginning AV bit The processor now in turn sets all the control bits that were set during the sequence AA bit AE bit and is ready for the next job BALLUFF CE 13 Function description In and output buffer on INTERBUS To transmit the control bit commands and data between the BIS C 60_1 processor and the host system the latter must provide two fields These two fields are the output buffer For the control bit bit header and controller commands sent to the BIS identification system For the data to be written and For configuring the BIS C 60_1 processor the input buffer For the control bit bit header of the BIS C 60_1 processor For the data to be r
36. ation System For configuring with i double bit header 1 Process subaddresses of the output buffer in the 2 Process subaddresses of the input buffer in the a order shown order shown OTH Command designator 02ue O0He O7He Set AA Bit invert TO Bit O2ue 03ue Start address 14Hex OOHex O4ue 05ue No of bytes 10na O0Hex O0He O7He CT Bit to 0 32 Byte block size set AV Bit 3 Process subaddresses of the output buffer 4 Process subaddresses of the output buffer 01 06Hex Enter the first 6 data bytes 01 06rex Copy the first 6 data bytes O0He O7Hex Invert TI Bit Process subaddress of the input buffer O0He O7Hex Invert TO Bit 5 Process subaddresses of the output buffer 6 Process subaddresses of the output buffer 01 06Hex Enter the second 6 data bytes 01 06Hex Copy the second 6 data bytes O0He O7Hex Invert TI Bit Process subaddress of the input buffer O0He O7Hex Invert TO Bit 7 Process subaddresses of the output buffer 8 Process subaddresses of the output buffer 01 04Hex Enter the remaining 4 data bytes 01 04 Hex Copy the remaining 4 data bytes O0He O7Hex Invert TI Bit Process subaddress of the input buffer O0He O7Hex Set AE Bit 9 Process subaddresses of the output buffer 10 Process subaddresses of the input buffer O0He O7Hex Reset AV Bit O0He 07He Reset AA Bit and AE Bit
37. been recognized If the code tag is not yet recognized an additional 45 ms for building the required energy field until the code tag is recognized must be added Code tag with 64 byte blocks No of bytes Read time ms from 0 to 3 14 for each additional byte add from 0 to 63 Code tag with 32 byte blocks No of bytes Read time ms from 0 to 3 14 for each additional byte add from 0 to 31 3 5 224 3 5 112 m highest address to be read Formula t m 1 3 5 ms Example Read 11 bytes starting at address 9 i e the highest address to be read is 19 This corresponds to 70 ms C60 1 023 0105 en p65 Function displays on BIS C 60 1 Operating state INTERBUS 56 CE BALLUFF LED Display The BIS C 60 1 uses the three side mounted LED s to indicate important conditions of the identification system Status LED Meaning Ready Bus active red green Supply voltage OK no hardware error however bus not active Supply voltage hardware OK bus active CT1 Present operating green yellow yellow flashes off Code tag read write ready at read write head 1 Read write command at read write head 1 in process Cable break to read write head or not connected No code tag in read write range of read write head 1 CT2 Present operating green yellow yellow flashes off Code tag read write ready at
38. chnical Data Digital input X1 IN IN Control voltage active Control voltage inactive Input current at 24 V Delay time typ galvanically isolated optocoupler Noc i 4Vto 40V 1 5V to 40V 11mA 5ms RS 232 Service interface X4 BIS operating states LED in housing INreRBus state LED on side of housing LED red green LED green yellow LED green yellow LED green LED green LED green LED yellow Ready Bus active CT1 Present Operating CT2 Present Operating Reset Cable Check Bus active Remotebus Disable The CE Mark is your assurance that our products are in conformance with the EC Guideline C 89 336 EEC EMC Guideline and the EMC Law Testing in our EMC Laboratory which is accredited by the DATech for Testing of Electromagnetic Compatibility has confirmed that Balluff products meet the EMC requirements of the Generic Standard EN 50081 2 Emission and EN 50082 2 Noise Immunity BALLUFF CE 79 BIS C 6021 Ordering Information BIS C 6021 023 050 03 ST Balluff Identification System Type C Read Write System Hardware Type 6021 metal housing INTERBUS remote bus or installation remote bus Software Type 023 INTERBUS Adapter 050 with two connections for external read write heads BIS C 3__ except BIS C 350 and 352 Interface 03 BUS versions User Connection ST8 Connector version installation remote bus ST9
39. dresses of the input buffer order shown O1 Hex Command designator 06He 00 Hex 07 Hex Set AA Bit invert TO Bit 02 Program number 01 He O0He O7Hex CFBit toO or 1 depending on block size set AV Bit 3 Process subaddresses of the output buffer 4 Process subaddresses of the input buffer One st start address Low Byte 05ue O0pe 07 Hex Invert TO Bit 02u High Byte 00 Hex 03 1st number of bytes Low Byte 07 Hex 4 Hex High Byte 00 Hex 05H 2nd start address Low Byte 4Bu O06 rex High Byte 00 Hex O0He O7Hex Invert TI Bit Continued on next BALLUFF E 45 Function Description Examples for protocol sequence 5 Process subaddresses of the output buffer 6 Process subaddresses of the input buffer O1 Hex 2nd number of Low Byte 03a 00He O7 He Invert TO Bit 02 bytes High Byte 00 Hex 03 3rd start address Low Byte 38e Oha High Byte 01 Hex OB pax 3rd number of Low Bytg Trax 06a bytes High Byte 00a Ohera Invert T Bit 7 Process subaddresses of the output buffer 8 Process subaddresses of the input buffer O1He O02He Terminator FFHed FFHex O0He 07 Hex Invert TO Bit O3us 04u not used FF Hed FF Hex O5tie 06He not used FFHe FFHex O0He O7 He Invert TI Bit Fill all unused start addresses and number of bytes with FFHex Continued on next D C60 1
40. ead For the ID s and error codes coming from the BIS identification system and For reading out the configuration data The total buffer size of the BIS C 60_1 is 16 bytes for the input buffer and 16 bytes for the output buffer This total buffer size is divided into 2 sectors Buffer sector 1 for Read Write Head 1 8 bytes input buffer 8 bytes output buffer Buffer sector 2 for Read Write Head 2 8 bytes input buffer 8 bytes output buffer C60 1 023 0105 en p65 Function description In and output buffer on INTERBUS Input and Output Example Using a PLC the buffer sector for the BIS C 60 1 will start at input byte EB32 and Buffers output byte AB 32 tinued continued Memory map PLC EBOTABUO BIS Read write head 1 R W1 Head R W 1 Input buffer from EB 32 to EB39 Subaddress 0 Output buffer from AB 32 to AB 39 buffer Xd for R W 1 Subaddress 7 Read write head 2 R W2 y Head R W 2 Input buffer from EB 40 to EB 47 Subaddress 0 p P Subaddress 7 Output buffer from AB 40 to AB 47 IJ Note that these buffers can be in two different Sequence 1 Sequence 2 sequences depending on the type of control Subaddress 00 Subaddress 01 01 00 The following description is based on sequence 1 02 03 Please note the 03 basic procedure on 04 1 13 and 28 34 05 and the examples on 06 pages D 35 52 07 BALLUFF CE 15 Function Description Output buffer configuration and explanat
41. eries BIS C 6001 023 03 KL2 processors and both the ST8 and ST9 versions of series BIS C 6021 023 050 03 ST_ InTERBus is a registered trademark of the Phoenix Corporation 4 CE BALLUFF C60 1 023 0105 en p65 Introduction BIS C Identification System This manual is designed to assist the user in setting up the control program and installing and starting up the components of the BIS C 60 1 Identification System and to assure rapid trouble free operation Principles The BIS C 60 1 Identification System belongs in the category of non contact systems for reading and writing This dual function permits applications for not only transporting information in fixed programmed code tags but also for gathering and passing along up to date information as well If 2 read write heads are connected to a BIS C 60 1 processor both heads can be operated independently of each other This means for example that you can read a code tag from one head while writing to another code tag at the other head Applications Some of the notable areas of application include for controlling material flow in production processes e g in model specific processes for workpiece conveying in transfer lines in data gathering for quality assurance for gathering safety related data in tool coding and monitoring in equipment organization in storage systems for monitoring inventory movement in transporting and conveying systems
42. ex Set AA Bit Enter first 6 bytes of data Invert TO Bit Set AE Bit Command designator 01 Hex Start address Low Byte 0A pe Start address High Byte 00 Hex No of bytes Low Byte 11 Hex No of bytes High Byte 00 Hex CT Bit to 0 32 Byte block size se AV Bit 3 Process subaddresses of the input buffer 01 06 Copy first 6 data bytes Process subaddress of the output buffer O0he 07Ha Invert T Bit 4 Process subaddresses of the input buffer 01 06Hex Enter the second 6 data bytes O0He O7Hex Invert TO Bit O0He O7He Set AE Bit Continued on next C60 1 023 0105 en p65 Function Description Examples for protocol sequence Example No 3 5 Process subaddresses of the input buffer 6 Process subaddresses of the input buffer continued 01 068 Copy second 6 data bytes 01 054 Enter the remaining 5 data bytes like 2nd example but Process subaddress of the output buffer O0us 07ue Invert TO Bit with simultaneous O0He O7Hex Invert TI Bit O0He O7Hex Set AE Bit data transmission 7 Process subaddresses of the input buffer 8 Process subaddresses of the input buffer 01 054 Copy the remaining 5 data bytes O0He O7 He Reset AA Bit and AE Bit Process subaddress of the output buffer O0He O7Hex Reset AV Bit For configuring with double bit header BALLUFF CE 39 Function
43. ex Store the start address for the Auto Read function in the EEPROM 12Hex Initialize the CRC 16 data check 21 Hex Read code tag using Mixed Data Access function corresponding to the program stored in the EEPROM 22Hex Write to code tag using the Mixed Data Access function corresponding to the program stored in the EEPROM Configuration 1st byte OO0Hex Default value factory setting Changes depending on the configuration or Data for writing to the code tag continued next Please note the basic procedure on CD 13 and 28 34 and the examples on pages 14 35 52 BALLUFF CE 17 Function Description Output buffer configuration and explanation Description of Sub Meaning Function Description Output Buffer address continued O2tHex Start address Address at which reading from or writing to the code tag begins Low Byte The Low Byte includes the address range from 0 to 255 or Start address Address for the Auto Read function starting at which the code Low Byte tag is to be read The value is stored in the EEPROM The Low Byte covers the address range from 0 to 255 Program No Number of the program to be stored in the EEPROM in conjunction with command ID 06u for Mixed Data Access function Program No Number of the program stored in the EEPROM for read or write operations in conjunction with command ID 21Hex or 22uex for the Mixed Data Access function Configuration 2nd byte 80Hex
44. from the code tag Configuration 3rd byte O0Hex Default value factory setting Changes depending on the configuration Data Data which was read from the code tag Configuration 4th byte 82uex Default value factory setting Changes depending on the configuration Data Data which was read from the code tag Configuration 5th byte OO0Hex Default value factory setting Changes depending on the configuration Data Data which was read from the code tag Configuration 5th byte O0Hex Default value factory setting Do not change Please note the Data Data which was read from the code tag basic procedure on CO 43 and 28 34 2nd Bit header The data are valid if the 1st and 2nd bit headers are in and the examples on agreement pages CN 35 52 Data Data which was read from the code tag 24 CE BALLUFF C60 1 023 0105 en p65 Configuration Overview Configuration A These are used for configuration Having the following functions Bit state 0 no 1 yes 26 CE BALLUFF Function Description Configuring the BIS C 60 1 processor The following functions can be activated deactivated through the configuration CRC 16 data check If this function is activated the correctness of the read or written data is ensured by a CRC 16 data check see 9 Simultaneous data transmission for both read write heads With simultaneous data trans
45. ion Configuration of the Bit No output buffer for one Subaddress 1 read write head Drac Bit Header cr T One Command Designator O2Hex Start Address Low Byte O3Hex Start Address High Byte O4Hex No of Bytes Low Byte O5Hex No of Bytes High Byte O6Hex O7Hex 2nd Bit Header as above Q Q Q Q Q Q B Description of Sub Bit Meaning Function Description Output Buffer address Name 00 CT Code tag type Select code tag type for code tag type Bit Header 0 32 Byte block size BIS C 1__ 02 03 04 05 1 64 Byte block size BIS C 1__ 10 11 30 TI Toggle Bit In for reading Controller is ready to accept new additional data for writing Controller has prepared new additional data Please note the GR Ground state Causes the BIS system to go to ground state basic procedure on AV Command Signals the ID system that a job is waiting 5 13 and 28 34 and the examples on continued next pages 1 35 52 16 CE BALLUFF C60 1 023 0105 en p65 Function Description Output buffer configuration and explanation Description of Sub Meaning Function Description Output Buffer address continued 01 Command designator 00 No command present OA ex Read code tag O2 ber Write to code tag O4tHex Configure processor O5Hex Read configuration data OGHex Store program in the EEPROM for the Mixed Data Access function O7H
46. ly sends out a carrier signal which supplies the code head as Soon as the required distance between the two is reached The read write operation takes place during this phase Reading and writing may be dynamic or static 8 CE BALLUFF C60 1 023 0105 en p65 BIS C 60 1 Processor Basic knowledge for application Control Function The processor writes data from the host system to the code tag or reads data from the tag through the read write head and prepares it for the host system Host systems may include a host computer e g industrial PC or a programmable logic controller PLC Data checking When sending data between the read write head and the code tag a procedure is required for recognizing whether the data were correctly read or written The processor is supplied with standard Balluff procedure of double reading and comparing In addition to this procedure a second alternative is available CRC 16 data checking Here a test code is written to the code tag allowing data to be checked for validity at any time or location Advantages of CRC 16 Advantages of double reading Data checking even during the non active phase No bytes on the code tag need to be reserved for CT outside read write head zone storing a check code Shorter read times since each page is read only Shorter write times since no CRC needs to be once written Since both variations have their advantages depending on the application the user
47. mes from code tag to processor in dynamic mode parametering 2nd byte bit 5 1 without CRC 16 data check 54 CE BALLUFF Read Write Times For double read and compare Code tag with 64 byte blocks No of bytes Read time ms from 0 to 63 220 for each additional 64 bytes add from 0 to 2047 Code tag with 32 byte blocks No of bytes Read time ms from 0 to 31 110 for each additional 32 bytes add from 0 to 255 230 7350 120 950 Including readback and compare Code tag with 64 byte blocks No of bytes Write time ms from 0 to 63 220 4n 10 for 64 bytes or more y 230 n 10 Code tag with 32 byte blocks No of bytes Write time ms from 0 to 31 110 4 n 10 for 32 bytes or more y 120 n 10 n number of contiguous bytes to write y number of blocks to be processed Example 17 bytes from address 187 have to be written Code tag with 32 bytes per block The blocks 5 and 6 will be processed since the start address 187 is in block 5 and the end address 203 in block 6 t22 1204 17 10 410 ms The indicated times apply after the code tag has been recognized If the code tag is not yet recognized an additional 45 ms for building the required energy field until the code tag is recognized must be added BALLUFF CE 53 Read Write Times Read times within the 1st block for dual read and compare The indicated times apply after the code tag has
48. mission shorter read write times can be achieved depending on the amount of data to be read written and the type of controller Dynamic operation on Read Write Head 1 or 2 If dynamic operation is parametered a read write job can be sent even though there is no code tag in the active zone of the head As soon as a code tag passes by the head the command is immediately carried out Auto Read for Read Write Head 1 or 2 If this function is activated the processor reads out the first max 31 bytes from the code tag starting at a defined start address as soon as the tag enters the active zone of the read write head The start address must first have been stored in the processor s EEPROM with the command ID 07uex 2nd bit header at end of in and output buffer The 2nd bit header factory setting prevents data from being accepted by the bus as long as it is not fully updated Display state of the digital input in the bit header of the input buffer If this function is activated the IN bit displays the state of the digital input of the processor IN 0 gt digital input low IN 1 gt digital input high Reset BIS C 60_1 processor through the digital input If this function is activated the processor is reset when the digital input is set to high BALLUFF ED 25 Function Description Configuring the BIS C 60 1 processor The BIS C 60 1 processor is configured by the controller using the output buffer The configu ration
49. nput buffer 01 06Hex Copy second 6 data bytes Process subaddress of the output buffer O0He O7Hex Invert TI Bit 6 Process subaddresses of the input buffer 01 05u Enter the remaining 5 data bytes O0He O7Hex Invert TO Bit 7 Process subaddresses of the input buffer 01 05He lt Copy the remaining 5 data bytes Process subaddress of the output buffer O0He O7Hex Reset AV Bit 8 Process subaddresses of the input buffer O0He O7 He Reset AA Bit and AE Bit BALLUFF CE 37 Function Description Examples for protocol sequence Read 17 bytes starting at code tag address 10 with simultaneous data transmission code tag type with 32 byte block size While the read job is being carried out and as soon as the input buffer is filled the first data are sent The AE bit is not set until the Read operation is completed by the processor The reply Job End AE bit is reliably set no later than before the last data are sent The exact time depends on the requested data amount the input buffer size and the timing of the controller This is indicated in the following by the note Set AE Bit in italics Host BIS C 60_1 Identification System 1 Process subaddresses of the output buffer in order shown 01 Hex 02u O3Hex O4 Hex 05n 00ne 07 Hex 2 Process subaddresses of the input buffer in order shown O0ne 07 Hex 01 06Hex O0ne 07 Hex O0ne 07 H
50. ocess subaddresses of the output buffer 01 06 Enter the 6 configuration bytes 01 06 Enter the 6 configuration bytes O0He O7Hex Invert TI Bit Process subaddresses of the input buffer O0He O7Hex Set AE Bit 5 Process subaddresses of the output buffer 6 Process subaddresses of the input buffer O0He O7Hex Reset AV Bit O0He O7Hex Reset AA Bit and AE Bit BALLUFF CE 51 Function Description Examples for protocol sequence Example No 14 Read out programmed configuration data Host BIS C 60_1 Identification System rar inh algas with 1 Process subaddresses of the output buffer inthe 2 Process subaddresses of the input buffer in the ouble bit header order shown order shown Olha Command designator 05Hex 00h Set AA Bit O0He O7Hex Set AV Bit 01 064ex Enter the 6 configuration bytes O0tHex Set AE Bit 3 Process subaddresses of the input buffer 4 Process subaddresses of the output buffer 01 06 Copy the 6 configuration bytes O0ns 07He Reset AA Bit and AE Bit Process subaddress of the output buffer O0He O7Hex Reset AV Bit 52 CE BALLUFF C60 1 023 0105 en p65 Read times from code tag to processor in static mode parametering 2nd byte bit 5 0 without CRC 16 data check Write times from processor to code tag in static mode parametering 2nd byte bit 5 0 without CRC 16 data check Read ti
51. of the digital input in the bit header of the input buffers 4th byte bit 2 Reset the BIS C 60 1 processor through the digital input 5th byte bit 5 Dynamic mode on read write head 2 for effects on read write times see 15 53 54 5th byte bit 4 Activate Auto Read function starting at specified address after CT Present for Head 2 the amount data read is 6 bytes for a double bit header or 7 bytes for a single bit header BALLUFF ED 27 Function Description Processing code tags To carry out a read or write job the code tag must be located in the active zone of the read write head A read write job has the following sequence see examples on CA 37 43 1 The host sends to the output buffer the command designator to subaddress 01Hex the start address for reading or writing to subaddress 02uex O3uex the number of bytes for reading or writing to subaddress 04Hex O5Hex the CT bit according to the code tag type block size and sets the AV bit in the bit header to high The processor takes the request AA in the bit header of the input buffer to high begins to transport the data read from code tag to input buffer write from output buffer to code tag Larger data quantities are sent in blocks block size of 6 bytes with 2nd bit header block size of 7 bytes without 2nd bit header The toggle bits in the two bit headers are used as a kind of handshaking between the host and the BIS C 60
52. on tains a start address and a number of bytes specification The amount of data for reading may not exceed 2 kB Storing a program The command identifier O6uex is used to send the read write program to the BIS C 60_1 processor One program per command can be stored All 25 program records plus an addi tional 2 bytes with FFHexFFHex as a terminator must always be sent This means a total of 104 bytes of information per program must be sent including the command identifier and program number The individual program records must all be contiguous They must be sent one after the other and be terminated with FFHexFFHe as a terminator It is recommended that the remaining unused memory sector be filled with FFHeFFHex If an address range is selected twice the data will also be output twice C60 1 023 0105 en p65 Mixed Data Access cont Read from code tag with program Write to code tag with program 34 CE BALLUFF Function Description Processing code tags The following shows the structure of a program Program structure Subaddress Value Range Command designator Ot Hex O6Hex 1 Program record Program number O2Hex O1 Hex O1He to OAH 1st data record Start address Low Byte O3Hex Start address High Byte O4Hex Number of bytes Low Byte O5Hex Number of bytes High Byte O6Hex 2nd data record 25th data record Start address Low Byte O3Hex Start address High Byte O4Hex Number of bytes
53. on of these two bytes can be used to guarantee the consistency of the transmitted data In this method the PLC cycle is unaffected nor is the bus access time changed All that is required is that a byte in the data buffer be used for the 2nd bit header instead of for user data This 2nd alternative is the Balluff recommended setting factory default 10 CE BALLUFF C60 1 023 0105 en p65 BUS interface INrERBus Address setting is done on the module not on the I O modules i e not on the BIS C 60 1 processor There are two types of addressing possible 1 logical addressing and 2 physical addressing Logical Addressing Logical addressing permits free addressing of each module Advantage high security and flexibility Disadvantage more difficult at setup For the BIS C 60 1 Identification System use 1 0 Module Type IDENT No IN Address Byte OUT Address Byte Processor BIS C 60 1 03 16 16 Physical Addressing Physical addressing is rigidly fixed to the system configuration The address of each module depends on its location in the system Advantage easy to configure at setup Disadvantage changes in module location when power was off are recognized upon initialization but are not made known to the user BALLUFF E gt 11 Compatibility with BIS C 6_1 processor Setting compatibility Compatibility with the BIS C 6_1 processors is established using terminal X5 and a jumper IE If the
54. own start address assigned The start addresses are stored in the EEPROM of the BIS C 60 1 processor To obtain correct data output use command identifier 07uex for each partial buffer Head 1 and or Head 2 If the Auto Read function is not activated the processor runs in standard mode and sends 6 bytes for a double bit header or 7 bytes for a single bit header starting with code tag address 0 BALLUFF CE 29 Function Description Processing code tags In normal operation a read write job is rejected by the processor BIS C 60 1 by setting the AF bit and an error number if there is no code tag in the active zone of the read write head If dynamic mode is configured the processor accepts the read write job and stores it When a code tag is recognized the stored job is carried out Reading without simultaneous data transmission In the case of a read job the processor first reads our all requested data from the code tag after receiving the start address and the desired number of bytes and then sets the AE bit Then the data read from the code tag are written to the input buffer In the case of larger data amounts this is done in blocks controlled by the handshake with the toggle bits as described on N 28 Reading with simultaneous data transmission In the case of a read job the processor begins to send the data to the input buffer as soon as the first 6 bytes or 7 bytes for a single bit header have been read from the code
55. rminals 8 12 for the output interface of the INTERBUS The following drawing shows the wiring when the BIS C 6001 processors need to be connected together Bus station Bus station BIS C 6001 Bus station BIS C 6001 BIS C 6001 EN A DI2 10 DI2 10 DI2 11 Di2 11 DO2 8 DO2 8 DO 9 DO 9 GND 12 GND 12 RBST 6 RBST 6 RBST 7 RBST 7 cp il i l Output Input terminal d terminal block m Input Output block d terminal terminal J block block g twisted pair 1 Leave the jumper in the BIS C 6001 if an additional station is to follow Remove it if no additional station follows 2 The differential signals DO and DO as well as DI and DI must be twisted pair Recommended cable LiYCY 3x2x0 25 mm AWG 24 maximum cable capacitance 120 pF m BALLUFF CE 61 BIS C 6001 Interface Information Wiring Diagrams To insert the BIS C 6001 processors into the serial INTERBUS the terminal strip provides terminals 1 5 for the input interface and terminals 8 12 for the output interface of the INTERBUS The following drawing shows the wiring when the BIS C 6001 interface needs to be connected using a 9 pin terminal e g to a BIS C 6021 Bus station Bus station BIS C 6001 2 Bus station DI2 10 o DI2 11 DO2 8 DO2 9 it GND 12 p RBST 6 RBST 7 Shield con to connector nected to housing connector housing 9 pin 9 poliger MIND MIN D female g twisted pair Output Stecker outpu
56. t terminal Eingang block 1 Connect the jumper in the connector if another station is to follow Remove it if no additional station follows 2 The jumper remains in the BIS C 601 if an another station is to follow Remove it if no additional station follows 3 The differential signals DO and DO as well as DI and DI must be twisted pair Recommended cable LiYCY 3x2x0 25 mm AWG 24 maximum cable capacitance 120 pF m C60 1 023 0105 en p65 BIS C 6001 Interface Information Wiring Diagrams Wiring diagram for O60 Terminal block BIS C 6001 C assignments processor with integrated read write head 0000000000000000060 Terminal ourpssuso TOS STSTTSIT LT block INTERBUS Input INTERBUS Output 7 When connecting the bus lines be sure that the shield oe ation and Towa PUPPY ut makes a good connection with the PG housing Please g P note the installation instructions on 60 BALLUFF E 63 BIS C 6001 Interface Information Wiring Diagrams Wiring diagram for Connection for Read Write Head 1 BIS C 6001 processor with BIS mM E C 650 adapter Lr ng Head1 Head 2 000 Terminal block assignments Connection for Read Write Head 2 A
57. tag beginning with the start address and indicates this by inverting the TO bit As soon as the controller inverts the TI bit the processor sends the data that have been read in the meantime to the input buffer This is repeated until the processor has read all the desired data from the code tag Now the processor sets the AE bit and outputs the remaining data to the input buffer Writing without simultaneous data transmission In the case of a write job the processor waits until it has received all the data that need to be written from the controller Only then are the data written to the code tag as described on D 28 Writing with simultaneous data transmission In the case of a write job the processor begins to write the data to the code tag as soon as it has received the first data to be written from the controller s output buffer Once all the data have been written to the code tag the AE bit is set C60 1 023 0105 en p65 CRC initialization Mixed Data Access 32 CE BALLUFF Function Description Processing code tags To be able to use the CRC check the code tag must first be initialized with the command identifier 12uex see D 35 The CRC initialization is used like a normal write job The latter is rejected with an error message if the processor recognizes that the code tag does not con tain the correct CRC Code tags as shipped from the factory all data are 0 can immediately be programmed with a CRC check If CRC 1
58. ution both screws indicated with arrows Carefully pull the head wires inside or adapter out towards the side direction of arrow right drawing Caution wires inside Reattach at the desired orientation and screw tight again Mounting the The processor is attached BIS C 6001 using 4 lateral mounting holes processor Head1 Head 2 e BIS C 6001 Opening the Processor BALLUFF ED 57 Opening the The BIS C 6001 processor must be opened to perform the following steps Processor BIS C 6001 Set change compatibility mode Replace EEPROM Make electrical connections supply voltage in output INTERBUS connections Be sure that the unit is disconnected from power before opening Remove the 4 screws on the BIS C 6001 and lift off the cover Perform the desired action To make the electrical connec tions push the cables through the fittings For additional wiring details see the following D N Mounting of the cover 4 screws max permissible tightening torque 0 15 Nm Opening the processor 58 CE BALLUFF C60 1 023 0105 en p65 Make connections on the BIS C 6001 processor
59. with the cables secured by PG fittings A single read write head from BIS C 65 series can be directly mounted to the processor which creates a compact unit If the BIS C 650 adapter is attached instead of the BIS C 65_ read write head two read write heads may be cable connected If the BIS C 670 adapter is attached one read write head may be cable connected The BIS C 6021 processor has a metal housing Connection is made through round connec tors Two read write heads can be cable connected to the processor Series BIS C 60 1 processors have in addition a digital input The input has various functions depending on the configuration see Parametering Whether the compact version of the processor with integrated read write head makes sense or whether the external solution is preferred depends primarily on the spatial arrangement of the components There are no functional limitations All read write heads are suitable for both static and dynamic reading Distance and relative velocity are based on which code tag is selected Additional information on the read write heads in series BIS C 65 and series BIS C 3 including all the possible code tag read write head combinations can be found in the manuals for the respective read write heads The system components are electrically supplied by the processor The code tag represents an free standing unit and needs no line carried power It receives its energy from the read write head The latter constant
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