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EMMA Mobile1 Application Note SPI Interface

1. Enable TERR TX UDR RX OVR interrupt ITO IENO 24 1 Enable SPIO e Transmit the Reading Address Application Note 19901EJ1VOANOO Chapter 3 Example of SPI Operation 16 41 In the RTC reading test will use R W mode In CPU master mode transfer if error occurs interrupt will occur to indicate transmission error If bit O and bit 6 of SPIO CONTROL register are both 0 the transmission ended normally 1 Write the reading address to SPIO TX DATA 2 Setbit 3 0 of SPIO CONTROL to ODH will start R W mode e Read Received Data Read the received data by reading SPIO RX DATA e SPIO End After the data transmit disable the interrupt before quit from this test Register List and configuration SPO FFCLR 7FH SPO ENCLR 7FH ITO IDSO 24 1 e SPIO Transfer Timing 2 3 4 5 6 7 86 8 DH id 12 13 CLK HE HTG DO DI CS Figure 3 3 SPI R W Mode Timing Application Note S19901EJ1VOANOO Chapter 3 Example of SPI Operation 17 41 3 1 4 Detail of RTC Setting Example Procedure e SPI Init 1 Set SPIO clock and cancel reset state More about clock control please refer to 3 2 Register Functions ASMU of EMMA Mobile 1 SMU amp GPIO User s Manual Register list APBCLKCTRL1 7 0 Disables automatic control 1 Enables automatic control CLKCTRL 2 0 Disables automatic control 1 Enables automatic control GCLKCTRLSENA 22 21 0 Disable setting 1 Enable setting GCLKCTRL3 22 2
2. Open the gate clock GCLKCTRLSENA 26 25 GCLRCTRL3 26 25 Open the auto control clock APBCLKCTRL1 8 CLKCTRL 3 Open the auto control clock APBCLKCTRLO 7 CLKCTRL 4 y CT Figure A 1 Stop Display Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 27 41 A 4 2 SPI Setup Function Function Name em1 spi setup Format DRV RESULT em1 spi setup SPI SETUP ST spi st Argument Parameter Type I O Detail SPI SETUP S odo opi setup param Function Return DRV OK DRV ERR PARAM Flow Chart am Y Switch Pin function and Enable input function Beca ep 2 je Y Reset SPIx ASMU RESETREQ Y Setup SPI work mode SPx MODE SPx POL SPx TX TIM SPx CONTROL2 Set SPIx Interrupt SPx_FFCLR SPx ENCLR SPx ENSET Y SPI Soft Reset SPx CONTROL Y ET Figure A 2 Stop Display Note 1 SPIO switch pin function by setting register CHG_PINSEL_SPO SPIO switch pin function by setting register CHG_PINSEL_G64 and CHG PINSEL G80 SPIO switch pin function by setting register CHG_PINSEL_DTV Enable SPIO pin input function by setting register CHG_PULL1 Enable SPI1 pin input function by setting register CHG PULL G72 Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 28 41 Enable SPI2 pin input function by setting re
3. S19901EJ1VOANOO APPENDIX A SPI Driver Function 37 41 A 4 11 SPI Interrupt Clear Function Name em1 spi clear irq Format DRV RESULT em1 spi clear irq uchar spi n Argument Parameter Type VO Detail spin juchar SPI number Function Return DRV OK DRV ERR PARAM Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 38 41 A 4 12 SPI Send Function Name em1 spi send Format DRV RESULT em1 spi send single word uchar spi n uint data Argument Parameter Type VO Detail sin jubar SPlnumber data fuint Transfer data Function Return DRV OK DRV ERR PARAM DRV ERR STATE Flow Chart m Y Put data to transfer buffer SPx TX DATA Y SPI Start SPx Control 4 Data Transmit Y Abnormal End Normal End B Figure A 4 SPI Send Data Flow Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 39 41 A 4 13 SPI RW Function Name em spi rw Format uint em1 spi rw uchar spi n uint addr Argument Parameter Type VO Detail spin juchar SPlnumber add uit The address which read Function Return DRV ERR PARAM Heceived data Flow Chart 4 Start gt Y Put addr to transfer buffer SPx TX DATA Y SPI R W Start SPx Control a
4. three error interrupt TERR TX UDR RX OVR Register list and configuration SP1 FFCLR 0000 007FH Clear all interrupt source of SPI1 SP1 ENCLR 0000 007FH Disable all issuance of interrupt of SPI1 SP1 ENSET 0000 0013H Enable TERR TX UDR RX OVR Of SPI1 SP2 FFCLR 0000 007FH Clear all interrupt source of SPI2 SP2 ENCLR 0000 007FH Disable all issuance of interrupt of SPI2 Application Note S19901EJ1VOANOO Chapter 3 Example of SPI Operation 23 41 SP2 ENSET 0000 0013H Enable TERR TX UDR RX OVR of SPI2 ITO IENO 25 1 Enable SPI1 interrupt ITO IEN1 10 1 Enable SPI2 interrupt e DMA Start After complete setting of DMA parameters and enable interrupt source configure control register DMA M2P CONT and DMA P2M CONT to active DMA transfer Register list and configuration DMA M2P CONT 13 1B DMA P2M CONT 14 1B e SPI Start After the SPI and DMA registers setting and DMA starting start the SPI to enable the data transfer Register list and configuration SP1 CONTROL 09H SP2 CONTROL 05H e Data Transfer When all the data specified with the length are transmitted the DMA Length interrupt will be issued After received the DMA Length interrupt signal TX EMP of register SPx CONTROL will be checked to adjust whether the transmit FIFO is empty If it is empty the SPI DMA transmission procedure will be end normally e Data Compare After the data transfer compare whether
5. you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics 434 NESAS Application Note Multimedia Processor for Mobile Applications SPI Interface EMMA Mobile1 Document No 19901EJ1VOANOO Date Published Aug 2009 O NEC Electronics Corporation 2009 Printed in Japan PREFACE Purpose Organization Notation Related document PREFACE The purpose of this document is to specify the usage of EMMA Mobile SPI interface This document includes the following e Introduction e Usage of SPI Interface e Example of SPI Operation e SPI Driver Function Here explains the meaning of following words in text Note Explanation of item indicated in the text Caution Information to which user should afford special attention Remark Supplementary information The following tables list related documents Reference Document Document Name Description EMMA Mobile 1 SMU amp GPIO User s 19265EJ1VOUMOO ASMUGIO pdf 1st Edition NECEL manual EMMA Mobile 1 one Chip User s 519268EJ1VOUMO00 1chip pdf 1st Edition NECEL manua S19261EJ1VOUM00 SPI pdf 1st Edition NECEL EMMA Mobile 1 SPI User s manual 19255EJ1VOUMOO DMA PDF 1st Edition NECEL EMMA Mobile 1 DMA User s manual Application N
6. 1 0 Close clock 1 Open clock DIVSPOSCLK 72H SPI SCLK 229 376 MHz 32 7 168 MH RESETREG 22 0 Reset 1 Cancel reset 2 Switch SPIO pin function and enable input function The details please refer to CHAPTER 8 ALTERNATE PIN FUNCTION SWITCHING of EMMA Mobile 1 One Chip User s Manual Hegister list CHG PINSEL SPO 0 CHG PULL1 32 16 1511H 3 Set SPIO mode including set operation mode CPU and master select CSO set transfer bit number 16 select the polarity of SCLK and set SPI register data transfer start signal Hegister list SPO MODE 0f00H SPO POL 7004H SPO TIECS 0 SPO CONTROL2 0 4 SPIO soft reset Register list SPO CONTROL 8 1 SPIO soft reset SPO CONTROL S 0 Cancel SPIO soft reset e Enable the SPI interrupt Enable the SPIO interrupt Add the SPIO interrupt handler function address into the interrupt handler hook function Register List SPO ENCLR 0x7f Mask all interrupt of SPI SPO FFCLR 0x7f Clear interrupt SPO ENSET 0x13 Enable TERR TX UDR RX OVR interrupt ITO IENO 24 1 Enable SPIO Application Note 19901EJ1VOANOO Chapter 3 Example of SPI Operation 18 41 e Data Transmit In the RTC setting test start the SPI by setting the SPO CONTROL to 09H only enable the transmission In CPU master mode transfer if error occurs interrupt will occur to indicate transmission error If bit 0 of SPIO CONTROL register is 0 the transmission ended norma
7. Data Transmit Read data from buffer SPx_RX_DATA Abnormal End Normal End Figure A 5 SPI R W Mode Flow Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 40 41 A 4 14 SPI Receive Function Name emi spi receive Format uint em1 spi receive uchar spi n Argument Parameter Type VO Detall spin uchar SPI number Function Return DRV ERR PARAM Received data Flow Chart C Start D Y SPI Read Start SPx Control a Data Transmit Yes Transmit End Read data from buffer SPx RX DATA Yes Abnormal End Normal End Figure A 6 SPI Receive Data Flow Note None Application Note 319901EJ1VOANOO ANNEX Modification History 41 41 ANNEX Modification History Application Note 19901EJ1VOANOO
8. G PULL G72 selects pull up or pull down and enable inputs for SPI1 CHG PULLO selects pull up or pull down and enable inputs for SPI2 e Set SPI mode including set operation mode CPU or DMA master or slave select CSx set transfer bit number select the polarity of SCLK and set SPI register data transfer start signal Register list SPx MODE specifies the operation mode of the SPx module SPx POL selects the polarity of SCLK and CS SPx TIECS fixes the output of SPx CS0 to SPx CS5 SPx CONTROL2 controls fixed length transfer in DMA master mode X 0 1 or 2 2 2 2 Soft Reset SPI Soft reset by set the RST of the control register SPx CONTROL to 1 And set it to 0 to cancel reset state Hegister list SPx CONTROL x 0 1 or 2 Application Note 19901EJ1VOANOO Chapter 2 Usage of SPI Interface 10 41 More detail about SPI soft reset please refer to 4 6 Reset Control of EMMA Mobile 1 SPI User s Manual 2 2 3 SPI Start Via this step the transfer data will be specified Then start the transfer via setting WRT RD and START of register SPx CONTROL Register List SPx CONTROL x 0 1 or 2 If using DMA for SPI writing operation the SPI interrupt should be enabled and the following settings of DMA must be done before starting transfer operation via setting register SPx CONTROL e DMA Initialization reset and open clock Register list DMA reset setting related regi
9. I OGPU EXIME Lasse 13 92 FIOW 01 Data Transter Procede eirin a A 14 3 1 3 Detail of RTC Reading Example Procedure ococcoococcccooooccccccnnnnccnononnnnnnanannnnccnnnnnnnncnonons 15 3 1 4 Detail of RTC Setting Example Procedure runnrrnnnnnnnnnvvnnnvnnnnnnnnrvnnnnvnnnnnnnnsernnnvnnnnnnnsnee 17 Seo PL DMA EXA cai A DS SPE 19 3 2 1 Outline of SP DMA Example iia 19 3 2 2 Flow or Data Transfer Procedure ni ii ii 20 323 Detall cor Dala Transter PETE Jaa 21 APPENDIX A SPI Driver FunctiOn n runnnannnnannnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnunnnnnnnnnnnnnnnnnnnunnnnnnnneee 24 A e icio MS sala mm 24 A 2 Global Variable Define rrrrrarrernnnnernnnrernnnerrnnnennnnnenrnnnennansennunennnnnennnnennnnsnennunsennunsennunsennnnne 24 AS SUE Delle utet amatent a ets eco ha tetes as e wana sun ond Eee ae el taper keg 25 AST SPEL SETUP SS Tuti aid did 25 A 4 Function Details P sker 26 AA oet SPESE FUNCION SR 26 A edda 27 PIPE 29 Pd d SPISE vestis serie daret A ea ee a a 30 ASS EG rara 31 A 4 6 Get SPI Status FUNCHON cccooonccnnccccocncnnncooncnnnccnonnnnnnnononnnnnnnononnnnnononnnnnnnnonnnnnnnnnnnnnnnnns 32 KA TOPIOINterupt hardest eo usua PE 33 PAS SPE Interrupt ridendo aaa a a sie 34 A 4 9 SPI2 Interrupt Handle rrrrrrnnnnnnovrrnnnnrrvvrnnnnnrnnrnnnnrrrnnnnnnnnsennrnnnnsennnnnnnssennnnnnnsrnnnnnnsnsene 35 RAMOS INEA io 36 P4 NS P LED GE sale 37 Application Note S19901EJ1VOANO
10. J1VOANOO APPENDIX A SPI Driver Function 32 41 A 4 6 Get SPI Status Function Function Name em1 spi get status Format uint em1 spi get status uchar spi n Argument Vo Det spin juchar SPinumber Function Return DRV_ERR_PARAM SPI status register value Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 33 41 A 4 7 SPIO Interrupt Handle Function Name em1 spiO irq Format void em1 spiO irq void Argument None Function Return None Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 34 41 A 4 8 SPI1 Interrupt Handle Function Name em1 spil irq Format void em1 spil irq void Argument None Function Return None Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 35 41 A 4 9 SPI2 Interrupt Handle Function Name em1 spi2 irq Format void em1 spi2 irq void Argument None Function Return None Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 36 41 A 4 10 SPI Interrupt Setup Function Name emi spi set irq Format DRV RESULT em1 spi set irq uchar spi n Argument Parameter Type I O Detail spin uchar SPinumber Function Return DRV OK DRV ERR STATE DRV ERR PARAM Flow Chart None Note None Application Note
11. Memory2 can judge whether the SPI transfer is normal or not Note This example test SPI data transfer in DMA master send and slave receive mode About SPI data transfer in DMA master receive and slave send mode only need to modify SPI mode register and SPI control2 register and other registers is set the same to this example Application Note S19901EJ1VOANOO Chapter 3 Example of SPI Operation 3 2 2 Flow of Data Transfer Procedure The figure 3 6 shows the procedure of SPI DMA data transfer operation Co SPI init y Set SPI clock supply and Cancel reset state Y Switch SPI pin function Y SPI mode setup Y Soft Reset SPI Y Set value to two memory blocks Y DMA Init and register setting Y Enable the SPI interrupt Y DMA and SPI start Y Interrupt Handle lt gt Data Transfer Operation No Yes Compare the data and report Y SPI end and disable the interrupt Y C Figure 3 6 Procedure of SPI DMA Data Transfer Operation Application Note S19901EJ1VOANOO 20 41 Chapter 3 Example of SPI Operation 21 41 3 2 3 Detail of Data Transfer Procedure e SPI Initialize 1 Set SPI clock and cancel reset state More about clock control please refer to 3 2 Register Functions ASMU of EMMA Mobile 1 SMU amp GPIO User s Manual Register l
12. O INDEX 5 41 ya A PR 38 RAT md mu A RR ET EET 39 A VAC 5PIBeCOlVO de dado ido gula D ibi 40 ANNEX Mouificallon Ms ae 41 Application Note S19901EJ1VOANOO INDEX 6 41 LIST OF TABLES Table 1 1 Hardware Environment sees nennen nnne nnne nnns 7 Table 1 2 Software ENvirOnMent ccccccccccceccceeesseeceeeeeceeeseceeeeeseeeeaseeceeeesseaaageeeeeeeseaas 7 Table A 1 SPLDAVET FUNCION LS has Sausen eee 24 Table A 2 Global Variable Define csse 24 Table A 3 Structure DENG Joe 25 Table AA Strudure OF SPI SETUR S Tis ia 25 LIST OF FIGURES Figure 2 1 Normal SPI Data Transfer FlOW occcccccoccccnccccconcncnononcconononancnnnononanennnonnnanennnoss 8 Figure 3 1 Circuit of the SPI CPU Master Mode Data Transfer Example 13 Figure 3 2 Procedure of SPI CPU Master Mode T eSt oocccccccccccconcconooccnnccononccnncnnanenonoos 14 Figure 3 3 SPIRAN Mode TIMES 16 Figure 3 4 SPI Write Mode Timing eese nnnm 18 Figure 3 5 Structure of SPI DMA Mode Data Transfer Example 19 Figure 3 6 Procedure of SPI DMA Data Transfer Operation sess 20 Figure AT SOP DENN gue mec ease as Mae eee 26 Figure AZ Stop DENNA ve 27 FIgULe AN SPE 31 Figure A 4 SPI Send Data FOM as 38 Figure A 5 SPIRW Mode FIOW saadan 39 Figure A 6 SPI Receive Data FOW 2 3 alertas 40 Applicatio
13. To our customers Old Company Name in Catalogs and Other Documents On April 1 2010 NEC Electronics Corporation merged with Renesas Technology Corporation and Renesas Electronics Corporation took over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry 24 NE S AS 8 10 11 12 Notice All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is gra
14. ansmission SP2 MODE 1FO3H SPI2 CSO 32bit DMA slave SP2 POL F000H SP2 CONTROL2 0 4 SPI soft reset Hegister list SP1 CONTROLJ 8 1 SPM soft reset Application Note 319901EJ1VOANOO Chapter 3 Example of SPI Operation 22 41 SP1 CONTROLJ8 1 SPI1 soft reset SP2 CONTROL 8 0 Cancel SPI2 soft reset SP2_CONTROL 8 0 Cancel SPI2 soft reset CAUTION During SPI DMA data transfer please don t use soft reset function In DMA mode SPI soft reset will be used in SPI init part or after SPI transfer finish e Set value to the two memory blocks In order to differentiate the two memory blocks set different value to them Memory 1 all set 5aba 5a5aH Memory 2 all set 1111 1111H e DMA Init and registers setting Set parameters of DMA M2P and P2M transmission For example source data address offset block size data length etc Register list and configuration M2P channel 13 for SPI1 DMA M2P LCH13 AADD 3100 0000H DMA M2P LCH13 ASIZE 0000 0200H DMA M2P LCH13 AOFF 0 DMA M2P LCH13 LENG 0000 0200H DMA M2P LCH13 BADD SP1 TX DATA DMA M2P LCH13 MODE e4e4 0000H P2M channel 14 for SPI2 DMA P2M LCH14 AADD SP2 RX DATA DMA P2M LCH14 ASIZE 0000 0200H DMA P2M LCH14 AOFF 0 DMA P2M LCH14 LENG 0000 0200H DMA P2M LCH14 BADD 3100 2000H DMA P2M LCH14 MODE e4e4 0000H e Enable SPI interrupt Enable the issuance of interrupt request of SPI1 and SPI2 in this example enable
15. fer operation in every mode CPU master CPU slave DMA master and DMA slave please refer to the CHAPTER 5 USAGE of EMMA Mobile 1 SPI User s Manual Application Note S19901EJ1VOANOO Chapter 2 Usage of SPI Interface 9 41 2 2 Detail of Normal SPI Data Transfer Procedure 2 2 1 SPI Initialize e Set SPI clock More about clock control please refer to 3 2 Register Functions ASMU of EMMA Mobile 1 SMU amp GPIO User s Manual Register list APBCLKCTRLO specifies whether to enable automatic control for PCLK of SPI2 APBCLKCTRL1 specifies whether to enable automatic control for PCLK of SPIO 1 CLKCTRL specifies whether to enable automatic control for SCLK of SPIO 1 2 GCLKCTRLSENA enables writing to each bit of the GCLKCTRLS register GCLKCTRL3 specifies whether to supply a clock for SPIO 1 2 DIVSPOSCLK specifies the division factor for SPO SCLK DIVSP1SCLK specifies the division factor for SP1 SCLK DIVSP2SCLK specifies the division factor for SP2 SCLK e Switch SPI pin function and enable input function The details please refer to CHAPTER 8 ALTERNATE PIN FUNCTION SWITCHING of EMMA Mobile 1 One Chip User s Manual Register list CHG PINSEL SPO switches the SPIO pin functions CHG PINSEL G64 switches the SPI1 pin functions CHG PINSEL G80 switches the SPI1 pin functions CHG PINSEL DTV switches the SPI2 pin functions CHG PULL1 selects pull up or pull down and enable inputs for SPIO CH
16. gister CHG PULLO Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 29 41 A 4 3 SPI Start Function Name em 1 spi start Format DRV RESULT em1 spi start uchar spi n uchar mode Argument Parameter Type UO Detail 35353535353 spin uar SPlnumber o mode uchar 1 SPI start mode transfer or receive Function Return DRV OK DRV ERR PARAM Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 30 41 A 4 4 SPI Soft Reset Function Name em1 spi soft reset Format DRV RESULT em1 spi soft reset uchar spi n Argument Parameter Type VO Det _ spin juchar SP number Function Return DRV_OK DRV_ERR_PARAM Flow Chart None Note None Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 31 41 A 4 5 SPI End Function Name em1 spi end Format DRV RESULT em1 spi end uchar spi n uchar dma flg Argument Parameter Type I O Detail spin qucar SPI number dma flag uchar Mode flag Function Return DRV OK DRV ERR PARAM Flow Chart GE y Stop SPI transmit SPx CONTROL 1 Disable SPI interrupt SPx ENCLR SPx FFCLR SPI Soft Reset SPx CONTROL 8 NO DMA mode Yes DMA Stop and Clear Interrupt y C Figure A 3 SPI End Note None Application Note S19901E
17. ility and safety of NEC Electronics products customers agree and acknowledge that possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundanoy fire containment and anti failure features Note 1 NEC Electronics as used in this document means NEC Electronics Corporation and also includes its majority owned subsidiaries NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above All trademarks or registered trademarks are the property of their respective owners Registered trademarks and trademarks are not noted in this document Application Note 19901EJ1VOANOO INDEX 4 41 CONTENTS Chapter T IN OGUCUOM ae 7 DUNGA 7 12 Development Environ MEN varar ae 7 Chapter 2 Usage of SPI Interface usa adelen 8 2 1 QuillneorePlbalta Transfers vvs 8 2 2 Detail of Normal SPI Data Transfer Procedure rrrnnnnnrnnrnnnnnvvnnnnnnnnrvnrnnnnnnennrnnnnnrrnnrnnnsnsennnnn 9 Ce SPAM ARE sirop asi dated I utn Men did MILI aM A DM MM P d E LIE 9 De SOW Rs 9 PENN 10 22 AA alba RANI SION s risu te ud e Corti eiut opcm dr ver Mas eom LL uU nanan EP D Ss LR EE UU 11 2 25 Pl A a aa a a t 11 Chapter 3 Example of SPI Operation ii 13 PLORO PUE XaImple ee 13 3 1 1 Outline or SP
18. ist APBCLKCTRL1 8 0 Disable automatic control 1 Enable PCLK of SPI1 APBCLKCTRLO 7 0 Disable automatic control 1 Enable PCLK of SPI2 CLKCTRL 4 3 0 Disable automatic control 1 Enable SCLK of SPI1 2 GCLKCTRLSENA 26 23 0 Disable setting 1 Enable setting GCLKCTRL3 26 23 0 Close clock 1 Open clock PCLK and SCLR of SPI1 2 DIVSP1SCLK 72H SPH SCLK 229 376 MHz 32 7 168 MH DIVSP2SCLK 72H SPl2_SCLK 229 376 MHz 32 7 168 MH RESETREQ1 24 23 0 Reset 1 Cancel reset 2 Switch SPI pin function and enable input function The details about registers function please refer to CHAPTER 8 ALTERNATE PIN FUNCTION SWITCHING of EMMA Mobile 1 One Chip User s Manual Register list CHG PINSEL G64 25 18 aaH switch pin to the SPI1 ordinary function CHG PULL G72 31 4 555 5555H enable SPI1 input function CHG PINSEL DTV 01H switch pin to the SPI2 ordinary function CHG PULLO 23 8 5555H enable SPI2 input function 3 SPI setup Set operation mode CPU or DMA master or slave select CS set transfer bit number select the polarity of SCLK and set SPI register data transfer start signal The details about SPI registers please refer to CHAPTER 3 REGISTERS of EMMA Mobile 1 SPI User s Manual Register list SP1 MODE 1F01H SPI1 CSO 32bit DMA master SP1 POL F000H SP1 CONTROL2 200H Stop transfer when the transmit FIFO becomes empty during DMA master tr
19. lly e SPIO end After the data transmit disable the interrupt before quit from this test Register List and configuration SPO FFCLR 7FH SPO ENCLR 7FH ITO IDSO 24 1 e SPIO Transfer Timing Allways Hi Z output Figure 3 4 SPI Write Mode Timing Application Note 319901EJ 1VOANOO Chapter 3 Example of SPI Operation 19 41 3 2 SPI DMA Example 3 2 1 Outline of SPI DMA Example This example is designed for the SPI data transfer in DMA master send and DMA slave receive mode First make sure the hardware connect SPI1 CS SPI2 CS SPI1 CLK SPI2 CLK SPI1 SO SPI2 SI SPI1 SI SPI2 SO Figure 3 5 shows the structure of this example SPI1 SO SPI2 SI Transmit FIFO Receive FIFO 4 SPI1 2 SPI2 4 TX_DATA RX DATA 1 5 MEMORY 1 MEMORY 2 Figure 3 5 Structure of SPI DMA Mode Data Transfer Example 1 The data stored in memory 1 are written to SP1 TX DATA with DMA M2P channel 13 by DMA controller 2 The data in TX DATA register will automatically send to transmit FIFO by SPI controller 3 Start SPI transfer the data will transmit from SPI1 to SPI2 4 The data in RX DATA register will automatically read from transmit FIFO by SPI controller 5 The data in RX DATA are written to memory 2 with DMA P2M channel 14 by DMA controller With comparing the data in Memory1 and
20. n Note S19901EJ1VOANOO Chapter 1 Introduction 7 41 Chapter 1 Introduction 1 1 Outline This document will show users how to use the SPI interface of EMMA Mobile1 1 2 Development Environment e Hardware environment of this project is listed as below Table 1 1 Hardware Environment EMMA Mobile 1 evaluation board PSKCH2Y NEC Electronics S 0016 01 PARTNER Jet ICE ARM Ryoto Microcomputer Co Lid e Software used in this project is listed as below Table 1 2 Software Environment GNUARM Toolchain V4 3 2 WJETSET ARM V5 10a Kyoto E Co Ltd Application Note 319901EJ1VOANOO Chapter 2 Usage of SPI Interface 8 41 Chapter 2 Usage of SPI Interface 2 1 Outline of SPI Data Transfer There are four modes of SPI data transfer operation e CPU master e CPU slave e DMA master e DM slave Dual port SRAM with 32 bits x 32 words is used for transmission and reception Normal SPI data transfer procedure flow chart is shown as below G START D Y SPI Initialize SPx MODE etc Y Soft Reset Y Set transfer data and enable Master slave Data Transfer Stop and reset SPI C Figure 2 1 Normal SPI Data Transfer Flow Note 1 About the explanation of all the SPI registers mentioned in this document please refer to CHAPTER 3 REGISTERS of EMMA Mobile 1 SPI User s Manual 2 More details about the trans
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23. ote 19901EJ1VOANOO PREFACE Disclaimers The information contained in this document is subject to change without prior notice in the future Refer to the latest applicable data sheet s and user manual when designing a product for mass production No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this documents or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC Electronics or others Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of a customers equipment shall be done under the full responsibility of the customer NEC Electronics assume no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information While NEC Electronics endeavors to enhance the quality reliab
24. peration mode CPU master CPU slave DMA master and DMA slave 2 2 5 SPI Interrupt Sources SPI can issue seven types of interrupt TX STOP Indicates that data is no longer stored in the transmit FIFO RX STOP Indicates that the amount of received data has reached the value set to the RX FIFO FULL bit of the SPx CONTROL2 register TERR Indicates that the number of SPx SCLK I cycles does not match the value set to the NB A bit of the SPx MODE register RDV Indicates that reception of 1 frame is complete in CPU mode END Indicates that transmission and reception of one frame is complete in CPU mode TX UDR Indicates that an underrun has occurred in the transmit FIFO RX OVR Indicates that an overrun has occurred in the receive FIFO Please refer to 4 2 Interrupt Generation of EMMA Mobile 1 SPI User s Manual Application Note 19901EJ1VOANOO Chapter 2 Usage of SPI Interface 12 41 e SPI Module Interrupt Clear the interrupt source of TX STOP RX STOP TERR RDV END TX EDR and RX OVR After that prohibits issue of the interrupt request to TX STOP RX STOP TERR RDV END TX EDR and RX OVR Register list SPx FFCLR clears interrupt sources SPx ENCLR disables the issuance of interrupt requests SPx ENSET enables the issuance of interrupt requests x 0 1 or 2 e SPI Interrupt Register list INT ITO IDSO enable SPI interrupt Application Note 19901EJ1VOANOO Chapter 3 Example of SPI Ope
25. ration 13 41 Chapter 3 Example of SPI Operation 3 1 SPI CPU Example 3 1 1 Outline of SPI CPU Example This example is designed for the SPI data transfer in CPU master mode In RTC setting example set the RTC time in PMIC by SPIO In RTC reading example read RTC time in PMIC by SPIO Figure 3 1 shows the circuit of the example EMMA Mobile 1 PMIC CSO CS0 CLK CLK SO SI s SO Figure 3 1 Circuit of the SPI CPU Master Mode Data Transfer Example More details about the usage of PMIC registers please refer to the data sheet of the PMIC Application Note S19901EJ1VOANOO Chapter 3 Example of SPI Operation 14 41 3 1 2 Flow of Data Transfer Procedure The figure 3 2 shows the procedure of SPI CPU master mode test C Test Start gt PUER Choose the Test Mode ii v SPI Init SPI Init Y Y Enable Interrupt Enable Interrupt r r Put the reading Address to SPI Transmit the Writing Address and SPO TX DATA Data y y Start SPI R W mode Start SPI Write mode r r Read the Data from SPO_RX_DATA Disable Interrupt Y Disable Interrupt Y C Test End 3 Figure 3 2 Procedure of SPI CPU Master Mode Test Application Note S19901EJ1VOANOO Chapter 3 Example of SPI Operation 15 41 3 1 3 Detail of RTC Reading E
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27. s the output of SPx CS0 to SPx CS5 Permits to issue an interrupt request Control fixed length transfer in DMA master mode Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function A 4 Function Details A 4 1 Set SPI SCLK Function Function Name em1 spi set sclk Format DRV RESULT em1 spi set sclk uchar spi n uint sclk Argument Parameter Type I O Detail 26 41 spin juchar SPI number ck fuint The clock of SPI CLK Function Return DRV OK DRV ERR PARAM Flow Chart SPIO Close the auto control clock APBCLKCTRL1 7 CLKCTRL 2 Close the gate clock GCLKCTRLSENA 22 21 GCLKCTRL3 22 21 Co SPI1 SPI2 Close the auto control clock APBCLKCTRL1 8 CLKCTRL 3 Close the auto control clock APBCLKCTRLO 7 CLKCTRL 4 Close the gate clock GCLKCTRL3ENA 24 23 GCLKCTRL3 24 23 Close the gate clock GCLKCTRLSENA 26 25 GCLKCTRL3 26 25 Set the sclk ASMU DIVSPOSCLK Open the gate clock GCLKCTRLSENA 22 21 GCLKCTRL3 22 21 Open the auto control clock APBCLKCTRL1 7 CLKCTRL 2 Set the sclk ASMU DIVSP1SCLK Set the sclk ASMU DIVSP2SCLK Y Open the gate clock GCLKCTRLSENA 24 23 GCLKCTRL3 24 23
28. ster ASMU RESETREQOENA ASMU RESETREQO DMA clock setting related register ASMU GCLKCTRLO ASMU GCLKCTRLOENA e DMA setting Register list P2M DMA transfer setting related register DMA P2M LCHx AADD DMA P2M LCHx BADD DMA P2M LCHx BOFF DMA P2M LCHx BSIZE DMA P2M LCHx BSIZE COUNT DMA P2M LCHx LENG DMA P2M LCHx MODE M2P DMA transfer setting related register DMA M2P LCHx BADD DMA M2P LCHx AADD DMA M2P LCHx AOFF DMA M2P LCHx ASIZE DMA M2P LCHx ASIZE COUNT DMA M2P LCHx LENG DMA M2P LCHx MODE x 12 13 14 corresponding to SPI 0 1 2 Application Note 19901EJ1VOANOO Chapter 2 Usage of SPI Interface 11 41 e DMA interrupt setup Register list P2M Clear DMA interrupt source related register DMA P2M PEO LCH12LCH14 INT REQ CL DMA P2M PEO LCH12LCH14 INT ENABLE DMA P2M PEO LCH12LCH14 INT ENABLE CL M2P DMA interrupt source related register DMA M2P PEO LCH12LCH14 INT REQ CL DMA M2P PEO LCH12LCH14 INT ENABLE DMA M2P PEO LCH12LCH14 INT ENABLE CL e DMA Start Register list P2M start register DMA P2M CONT M2P start register DMA M2P CONT More about DMA operations please refer to CHAPTER 3 DESCRIPTION OF FUNCTIONS and EMMA Mobile 1 DMA Application Note 2 2 4 Data transfer After setting WRT RD and START of register SPx CONTROL the data transfer operation start and interrupt will occur to indicate the ending The interrupt is different according to the transfer result normal or abnormal and o
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30. the data in two memory blocks is same or not e SPI end After the data transfer and data compare Disable and clear SPI interrupt Register list and configuration SP1 ENCLR 7FH Disable SPI1 issuance of interrupt SP1 FFCLR 7FH Clear SPI1 source SP2 ENCLR 7FH Disable SPI2 issuance of interrupt SP2 FFCLR 7FH Clear SPI2 source ITO IDS0 25 1 Disable SPI1 interrupt ITO IDS1 10 2 1 Disable SPI2 interrupt Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 24 41 APPENDIX A SPI Driver Function A 1 Function List The following table shows the SPI driver interface functions Table A 1 SPI Driver Function List Function Detai em1 spi set sclk Set SPI the clock of SPI CLK em1 spi setup SPI setup em1 spi start SPI start SPisat ZJ LA External function emt spi send A 2 Global Variable Define Table A 2 Global Variable Define Nam Type Detail f spi test BOOL The flag of spi test f spi cpu test BOOL The flag of spi cpu mode test f spi dma test BOOL The flag of spi dma mode test Application Note S19901EJ1VOANOO APPENDIX A SPI Driver Function 25 41 A 3 Structure Define Table A 3 Structure Define Structure Name SPI SETUP ST SPI register sturcture A 3 1 SPI SETUP ST Table A 4 Structure of SPI SETUP ST SPI channel SPIO SPI1 or SPI2 SPI cs channel cs0 1 2 The operation mode Select the polarity of SCLK and cs signals Fixe
31. xample Procedure e SPI Initialize 1 Set SPIO clock and cancel reset state More about clock control please refer to 3 2 Register Functions ASMU of EMMA Mobile 1 SMU amp GPIO User s Manual Register list APBCLKCTRL1 7 0 Disable automatic control 1 Enable automatic control CLKCTRL 2 0 Disable automatic control 1 Enable automatic control GCLKCTRLSENA 22 21 0 Disable setting 1 Enable setting GCLKCTRL3 22 21 0 Close clock 1 Open clock DIVSPOSCLK 72H SPI SCLK 229 376 MHz 32 7 168 MH RESETREG 22 0 Reset 1 Cancel reset 2 Switch SPIO pin function and enable input function The details please refer to CHAPTER 8 ALTERNATE PIN FUNCTION SWITCHING of EMMA Mobile 1 One Chip User s Manual Hegister list CHG PINSEL SPO 0 CHG PULL1 32 16 1511H 3 Set SPIO mode including set operation mode CPU and master select CSO set transfer bit number 16 select the polarity of SCLK and set SPI register data transfer start signal Hegister list SPO MODE 0f00H SPO POL 7004H SPO TIECS 0 SPO CONTROL2 0 4 SPIO soft reset Register list SPO CONTROL 8 1 SPIO soft reset SPO CONTROL S 0 Cancel SPIO soft reset e Enable the Interrupt Enable the SPIO interrupt Add the SPIO interrupt handle function address into the interrupt handler hook function Register List SPO ENCLR Ox7f Mask all interrupt of SPI SPO FFCLR 0x7f Clear interrupt SPO ENSET 0x13

EMMA Mobile1 Application Note SPI Interface

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