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1. 0 0 V Valid bit for entry 1 1 TS Translation space Compared with MSR IS instruction fetch or MSR DS memory reference to determine if this TLB entry may be used for translation 2 5 TSIZE Defines the page size of the TLB entry 6 7 Reserved 8 15 TID Translation identity Defines the process ID for this TLB entry 16 17 NV Next victim Can be used to identify the next victim to be targeted for a TLB miss replacement operation for those TLBs that support the NV field 18 31 Reserved 32 32 W Write through 33 33 Caching inhibited 34 34 M Memory coherency required 35 35 G Guarded 36 36 E Endianness Determines endianness for the corresponding page 37 37 Reserved 38 38 XO Implementation dependent page attribute Implemented as storage 39 39 X1 Implementation dependent page attribute Implemented as storage 40 43 U0 U3 User attribute bits These bits are associated with a TLB entry and can be used by system software 44 44 Reserved 45 45 SR Supervisor read permission bit 46 46 SW Supervisor write permission bit 47 47 SX Supervisor execute permission bit 48 48 UR User read permission bit 49 49 UW User write permission bit 50 50 UX User execute permission bit 51 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualization fault Controls whether a DSI occurs on data accesses to the page regardless of permission
2. Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 97 Build Properties for Power Architecture Table 3 46 Tool Settings General continued e Move up Click to re order the selected file search path one position higher in the list e Move down Click to re order the selected file search path one position lower in the list Supress warnings W Supresses warning messages Announce version v Prints the assembler version 3 3 2 5 PowerPC Preprocessor Use the PowerPC Preprocessor panel to specify specify the command options and expert settings for the preprocessor The table below lists and describes the various options available on the PowerPC Preprocessor panel NOTE The list of tools presented on the Tool Settings page can differ based upon the toolchain used by the project Table 3 47 Tool Settings PowerPC Preprocessor Options Command Specifies the PowerPC GCC command line Pre processor required to pre process the source files All options Shows the actual command line the preprocessor will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 2 5 1 Preprocessor Settings Use the Preprocessor Settings panel to specify preprocessor behavior The following table lists and describes the v
3. 3 3 2 2 5 PowerPC Environment Use the PowerPC Environment panel to specify the configuration files used by the linker The following table lists and describes the various options available on the PowerPC Environment panel Table 3 36 Tool Settings PowerPC Environment Options Map File Xlinker Map Prints a link map to the map specified map file The specified file name must have a map extension LCF File Specifies the path of the linker command file that the linker reads to determine how to build the output file Alternatively click Browse then use the resulting dialog box to specify the linker command file NOTE The specified linker script replaces the default linker script so it must specify everything necessary to describe the output file This setting is equivalent to specifying the 1cf filename command line option 3 3 2 3 PowerPC Compiler Use the PowerPC Compiler panel to specify the compiler options that are specific to Power Architecture software development NOTE The list of tools presented on the Tool Settings page can differ based upon the toolchain used by the project CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 91 Build Properties for Power Architecture The table below lists and describes the various options available on the PowerPC Compiler panel Table 3 37 Tool Settings PowerPC
4. Ey Chapter 7 Debugging Embedded Linux Software 2 Enter the launch configuration settings given in the table below in the Debug Configurations dialog box Table 7 7 Kernel Project Attach Launch Configuration Settings Main Tab Select an appropriate system if existing from the Connection drop down list or define a new system e To define a new system click New e Select Hardware or Simulator Connection from the CodeWarrior Bareboard Debugging list Click Next e Specify a name and a description for the connection e Select an appropriate target if existing from the Target drop down list or define a new target e To define a new target click New on the Hardware or Simulator Connection dialog box e Select Hardware or Simulator Target from the CodeWarrior Bareboard Debugging list Click Next e Specify a name and a description for the target e Select a target from the Target type drop down list On the Initialization tab ensure there are no initialization files selected e Click Finish to create the target and close the Hardware or Simulator Target dialog box e Select the type of connection you will use from the Connection type drop down list e Click Finish e Select all the cores on which Linux is running for example core 0 for single core or cores 0 7 for 8 core SMP Debugger Tab gt Debugger options gt Select the Cache Symbolics between sessions checkbox The Symbolics Tab symbolics are loaded from
5. Chapter 9 Target Initialization Files Tip This command can be useful in cases where you need to execute a command sequence on other cores than the current one for example in a SMP initialization scenario Syntax setCoreID core Arguments core The core index on which to execute Example This command tells the debugger to issue all subsequent commands on the core index 1 setCoreID 1 9 2 1 9 resetCorelD Tells the debugger to revert to executing commands on the current core thus cancelling the effect of a previous setCoreID command Syntax resetCoreID 9 2 1 10 sleep Causes the debugger to pause the specified number of milliseconds before executing the next instruction Syntax sleep milliseconds Arguments milliseconds The number of milliseconds in decimal to pause the debugger Example CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 387 Target initialization commands This command pauses the debugger for 10 milliseconds sleep 10 9 2 1 11 stop Stops program execution and halts the processor on the target board Syntax stop 9 2 1 12 writemem b Writes a byte 8 bits of data to the specified memory address Syntax writemem b address value Arguments address The 32 bit memory address to which to assign the supplied 8 bit value This address may be specified in hexadecimal for example ox
6. AppTRK elf 6969 amp 7 1 2 2 Serial Connections To launch CodeWarrior TRK through a serial connection Tip To improve your debugging experience we recommend the host computer running the IDE have two serial ports In an ideal scenario you would connect one serial port of the host computer to the first serial port of the target board to monitor startup and console log messages You would then connect another serial port of the host computer to the second serial port of the target board the debugger would use this connection to communicate with CodeWarrior TRK on the target system 1 Connect a serial cable between the host computer s serial port and the second serial port of the target system 2 On the host computer start a terminal emulation program such as minicom 3 Configure the terminal emulation program with baud rate stop bit parity and handshake settings appropriate for the target system 4 Connect the terminal emulator to the target system A command prompt appears in the terminal emulation program Nn Boot the system Log in as the root user 6 Use the ca command at the command prompt to navigate to the directory where the CodeWarrior TRK binary executable file apprrx e1s resides on the target system The system changes the current working directory 7 Configure the serial port on which CodeWarrior TRK is going to connect a Enter this command stty F dev ttys1 raw CodeWarrior Development St
7. 1 Start a debugging session 2 Select Window gt Show View gt Other The Show View dialog box appears Expand the Debug group Select Debugger Shell Click OK Ma Bu The Debugger Shell view appears To display a list of the commands supported by the Debugger Shell view enter this at the command prompt help tree For more information about the Debugger Shell support of cache commands enter these commands at the command prompt help cmdwin ca help cmdwin caln The next sections describe these commands in detail 5 12 5 Debugger Shell Global Cache Commands The cm win ca cache commands manage global cache operations That is they affect the operation of the entire cache For multi core processors these commands operate on a specific cache if an optional ID number is provided If the ID number is absent the command operates on the cache that was assigned as the default by the last emdwin ca default Command The table below lists the cache commands CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 209 Viewing Cache Table 5 37 Debugger Shell Global Cache Commands cmdwin ca default Set specified cache as default cmdwin ca enable Enable disable cache cmdwin ca flush Flushes cache cmdwin ca inval Invalidates cache cmdwin ca lock Lock Unlock cache emdwin ca show Show the arc
8. e Debugging the Kernel before the MMU is Enabled e Debugging the Kernel while the MMU is being Enabled e Debugging the Kernel after the MMU is Enabled NOTE You can debug the kernel on all stages from oxo till start_kernel and further without the need of PIC changes breakpoints at start_kernel and multiple debug sessions 7 7 8 1 Debugging the Kernel before the MMU is Enabled This procedure shows how to debug the kernel before the memory management unit MMU is initialized You can always debug assembly before virtual addresses are being used without setting the alternate load address To debug the kernel before the MMU is enabled follow these steps 1 Select Run gt Debug Configurations from the CodeWarrior menu bar to open the Debug Configurations dialog box 2 From the Debugger page select the PIC tab 3 Select the Alternate Load Address checkbox 4 In the Alternate Load Address field type the hexadecimal form of the memory address for example 0x00000000 5 Click Apply The CodeWarrior IDE saves your changes to the launch configuration Click Debug The Debug perspective appears 7 Set a breakpoint early in nead_fs1_booke s ON You can perform source level debug until the rti instruction in nead_fs1_booke s CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 333 Debugging the Linux Kernel E 2 EPPC core 0 vmli
9. 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 On the left panel from the CodeWarrior Attach group select the attach launch configuration you had imported using the nv e1 file 3 On the Main tab in the System panel select all the cores and click Debug The Debug perspective appears 4 In the Editor view in the hca11s c file set a breakpoint at the hcall_ partition restart function The debugger stops at this breakpoint and you can debug this hypercall handle 7 11 User Space Debugging with On Chip Debug The user space on chip debug OCD feature introduces the capability of debugging only one user space application per debug session using the Linux kernel awareness debug feature The advantage of this feature is that the debugger functionality is not conditioned by any target services and the target serial ethernet capabilities do not consume target resources It works regardless of the target s processes state The solution does not require any debugger add on for the target board The Linux kernel awareness debug feature has been enhanced to accept the on source debugging for one user space application per debug session The limitation is multiple applications are linked and run on different virtual addresses In real time user space applications are linked to the same virtual address so that only one can be debugged on the source CodeWarrior Development Studio for Power Archi
10. Controls period usage for directives Check this option to ensure that each directive must start with a period This setting is equivalent to specifying the option period off on reset assembler control option Case Sensitive Identifier Specifies case sensitivity for identifiers This setting is equivalent to specifying the option case off on reset assembler control option Allow Space In Operand Field Controls spaces in operand fields Clear this option if a space in an operand field starts with a comment This setting is equivalent to specifying the option space off on reset assembler control option GNU Compatible Syntax CodeWarrior Assembler supports several GNU format assembly language extensions Check this option to control GNU s assembler format conflicts with that of the CodeWarrior assembler Generate Listing File Controls generation of a listing file that includes files source line numbers relocation information and macro expansions Clear this option if no listing file is specified Other Flags Specify assembler flags 3 3 1 7 PowerPC Disassembler Use the PowerPC Disassembler panel to specify the command options and expert settings related to the PowerPC disassembler CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 81 Build Properties for Power Architecture The table below lists and
11. Depending on the method you choose for passing parameters to the kernel during kernel initialization the RAM disk information can be provided in any of the following ways CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 323 Debugging the Linux Kernel e Flattened Device Tree Initialization Specifying a device tree file that contains initialization information e Regular Initialization Parameters are passed through command line settings using the Boot Parameters tab 7 7 6 3 1 Flattened Device Tree Initialization To follow the Flattened device tree initialization method 1 Select the Debugger tab From the Debugger options panel select the OS Awareness tab From the Target OS drop down list select Linux On the Boot Parameters tab select the Enable Initial RAM Disk Settings nA un Open the Debug Configurations dialog box checkbox The options in this group activate In the File Path field type the path of the RAM disk Alternatively click Browse to display a dialog box that you can use to select this path NOTE The RAM disk is created by the build tool and not by the kernel It contains the initial file system For details see the SDK User Manual in iso help documents pdf In the Address text box enter oxo2000000 or another appropriate base address where you want the RAM disk to be written
12. Download Algorithm to Specify the address where the test driver is downloaded in case the Use target CPU is Address selected NOTE The option is not applicable for CodeWarrior StarCore devices 11 3 2 4 1 Walking Ones This test detects these memory faults e Address Line The board or chip address lines are shorting or stuck at O or 1 Either condition could result in errors when the hardware reads and writes to the memory location Because this error occurs on an address line the data may end up in the wrong location on a write operation or the hardware may access the wrong data on a read operation e Data Line The board or chip data lines are shorting or stuck at O or 1 Either condition could result in corrupted values as the hardware transfers data to or from memory e Retention The contents of a memory location change over time The effect is that the memory fails to retain its contents over time The Walking Ones test includes four sub tests e Walking Ones This subtest first initializes memory to all zeros Then the subtest writes reads and verifies bits with each bit successively set from the least significant bit LSB to the most significant bit MSB The subtest configures bits such that by the time it sets the MSB all bits are set to a value of 1 This pattern repeats for each location within the memory range that you specify For example the values for a byte based Walking Ones subtest occur in this
13. Explanation Defined symbols D Specifies substitution strings that the assembler applies to all the assembly language modules in the build target Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 92 Freescale Semiconductor Inc _ _ _ _ _ _ _ AAA Chapter 3 Build Properties Table 3 39 Tool Settings Symbols Options continued NOTE Enter just the string portion of a substitution string The IDE prepends the d token to each string that you enter For example entering opt1 x produces this result on the command line dopt1 x NOTE This option is similar to the DEFINE directive but applies to all assembly language modules in a build target Use these toolbar buttons to work with the panel e Add Click to specify the undefined symbols string e Delete Click to remove the selected string e Edit Click to edit an existing string e Move up Click to move the selected string one position higher in the list e Move down Click to move the selected string one position lower in the list Undefined symbols U Undefines the substitution strings you specify in this panel Use these toolbar buttons to work with the panel e Add Click to specify the undefined symbols string e Delete Click to remove the selected string e Edit Click to edit an existing string e Move up Click to move t
14. GCCPORT_ e GCC requires explicit declarations of global arrays For instance static const mem size fix pool _sizes 4 12 20 36 52 max fix pool size is an invalid declaration under GCC although max_tix_poo1_size is a globally initialized variable To prevent this error replace the variable max_fix_pool_size with an exact value So the code becomes static const mem size fix pool _sizes 4 12 20 36 52 6 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 436 Freescale Semiconductor Inc a a a a Chapter 12 Making a Custom MSL C Library e In CodeWarrior the variables heap addr heap end stack addr and _stack_end are initialized by preference panels To work with GCC you provide the definitions of these variables through a linker command file LCF gecport 1ce e The GCC definitions va_list va_start va_end va_arg and va_copy replace override the CodeWarrior definitions e The nofralloc directive is not available in GCC The functions requiring such a directive have been rewritten in the assembly 12 1 1 Files modified A new file ms1_c directives_to_gcc h has been added to the MSL C library sources This file is used as a prefix to build all the libraries This header file maps the features of CodeWarrior tools and maps them to the features of the GCC tools Following files from the MSL C Library are modified ansi_parms h cctype
15. Interleaves the code disassembly with C or C source code This setting is equivalent to specifying the show source nosource command line option Only Show Operands and mnemonics Controls display of address and op code values This setting is equivalent to specifying the show binary nobinary command line option Show Data Modules Controls display of data sections This setting is equivalent to specifying the show data nodata command line option Disassemble Exception Tables Controls display of C exception tables This setting is equivalent to specifying the show xtab les noxtab les or show exceptions noexceptions command line option Show DWARF Info Controls display of debugging information This setting is equivalent to specifying the show debug nodebug or show dwarf nodwarf command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc E gt Chapter 3 Build Properties Table 3 25 CodeWarrior Build Tool Settings Disassembler Options continued Verbose Controls display of extra information This setting is equivalent to specifying the show detail nodetail command line option 3 3 1 8 PowerPC Preprocessor Use the PowerPC Preprocessor panel to specify the command options and expert settings related to the PowerPC p
16. Q QorIQ communications processors 445 QorIQ Qonverge processors 449 R range 400 Reading JTAG IDCODEs test 154 Reading TLB Registers from Debugger Shell 785 Registers View Context Menu 779 Regular Initialization 325 Release notes 19 Remove action 4 4 Remove Breakpoints using Breakpoints View 167 Remove Breakpoints using Marker Bar 167 Remove Hardware Breakpoints using Debugger Shell 768 Remove Hardware Breakpoints using the IDE 68 Removing a Register Group 182 Removing Breakpoints 167 Removing Hardware Breakpoints 167 Removing Watchpoints 171 reserved 400 reservedchar 401 reset 385 resetCorelD 387 Restoring Build Properties 60 Reverting Debug Configuration Settings 129 run 386 S Secure Unsecure actions 413 Serial Connections 242 setCoreID 386 Setting Breakpoints 163 Setting Hardware Breakpoints 165 Setting Launch Configurations 228 Setting Stack Depth 2 4 Setting up a remote system to use a JTAG configuration file 376 Setting up RAM disk 323 Setting Up the Target Hardware 3 0 Setting Watchpoints 169 Shared Library Settings 90 Signal Inheritance 248 Simics 143 sleep 387 Software floating point emulation support 438 Source 123 Source library modifications 436 Specify Console I O Redirections for the Linux Application 246 Specifying the Launch Configuration Settings 285 Specify launch configuration settings 276 Specify target RAM settings 407 Specify the Source Lookup Path 223
17. n Setting Up the Target Hardware Installing the Board Support Package BSP Configuring the Build Tool Configuring the Linux Kernel Creating a CodeWarrior Project using the Linux Kernel Image Configuring the kernel project for debugging Debugging the kernel to download the kernel RAM disk and device tree Debugging the kernel based on MMU initialization Debugging the kernel by attaching to a running U Boot OMAAINMNBW WN 7 7 1 Setting Up the Target Hardware Before you use the CodeWarrior IDE to debug the Linux kernel you need to set up the target hardware One requirement of the setup is to have a debug probe connected between the Code Warrior debug host and the target board The figure below illustrates the setup required to use the IDE to debug the Linux kernel running on a Power Architecture target board CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 310 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software CodeWarrior Debug Host Freescale BSP for your target i board Hardware debug probe connected to e the target board Power Architecture yA Target Board Figure 7 32 Setup for Kernel Debugging Using the CodeWarrior IDE Connect the hardware debug probe between the target board and the Code Warrior debug host Kernel debugging is possible using a Linux hosted or Windows hosted Code Warrior in
18. Debugger Limitations and Workarounds Describes processor specific CodeWarrior debugger limitations and workarounds 1 3 Accompanying documentation The Documentation page describes the documentation included in this version of CodeWarrior Development Studio for Power Architecture You can access the Documentation page by e Using a shortcut link that the CodeWarrior installer creates by default on the Desktop e Opening the start_Here htm1 file available in the lt cwrnstal1pir gt pa Help folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 20 Freescale Semiconductor Inc Chapter 1 Introduction 1 4 PowerPC Embedded Application Binary Interface The Power Architecture Embedded Application Binary Interface PowerPC EABI specifies data structure alignment calling conventions and other information about how high level languages can be implemented on a Power Architecture processor The code generated by Code Warrior for Power Architecture conforms to the PowerPC EABL To learn more about the PowerPC EABI e Information and documentation about all supported Power Architecture hardware is available here http www freescale com powerarchitecture e PowerPC Embedded Binary Interface 32 Bit Implementation published by Freescale Semiconductor Inc and available here http www freescale com files 32bit doc app_note PPCEABI pdf e System V Applicat
19. Target 7 P4080 Y 500mc 0 e500mc 1 F e500mc 2 E 500mc 3 eS00mc 4 Apply Revert Figure 5 24 Debug Configurations Dialog Box Launch Configuration for Executable File 5 17 2 Edit the Launch Configuration Using the tabs of the Debug Configurations dialog box you can change the launch configuration settings that you specified while importing the e1 file To edit the launch configuration for your executable file follow these steps 1 On the Main tab click Edit in the Connection panel The corresponding Connection page appears 2 Use the Connection type list box to modify the current connection type CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 222 Freescale Semiconductor Inc Chapter 5 Working with Debugger 3 Configure the various connection options as appropriate for your executable file by using the various tabs available on the Connection page For example specify the appropriate target processor any initialization files and connection protocol 4 Click OK to close the Connection page NOTE For more information on how to modify settings using the remote system explorer see CodeWarrior Common Features Guide from the lt cwrnstal1Dir gt Pa Help ppF folder 5 17 3 Specify the Source Lookup Path Source lookup path is specified in terms of the compilation path and the local file system path The CodeWarrio
20. Task Type Flash Programmer Figure 11 3 Create New Target Task window 5 In the Task Name textbox enter a name for the new flash programming target task 6 Choose a launch configuration from the Run Configuration pop up menu e Choose Active Debug Context when flash programmer is used over an active debug session e Choose a project specific debug context when flash programmer is used without an active debug session 7 Choose Flash Programmer from the Task Type pop up menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 405 Flash programmer 8 Click Finish The target task is created and the Flash Programmer Task editor window appears You use this window to configure the flash programmer target task e Flash Devices Lists the devices added in the current task e Target RAM Lets you specify the settings for Target RAM e Flash Program Actions Displays the programmer actions to be performed on the flash devices 11 1 2 Configure flash programmer target task You can add flash devices specify Target RAM settings and add flash program actions to a flash programmer task to configure it This topic contains the following sub topics e Add flash device e Specify target RAM settings e Add flash programmer actions 11 1 2 1 Add flash device To add a flash device to the Flash Devices table 1 Click the Add Device button
21. This is a memory mapped register that relocates with the whole internal memory map Further the debugger uses the special purpose memory base address register MBAR to store the base address of the internal memory mapped registers Each time the location of the internal memory map changes you must maintain the correspondence between the IMMRBAR and MBAR registers 13 3 PowerQUICC Ill processors This section describes the limitations and workarounds of the CodeWarrior debugger for the PowerQUICC HI processors The PowerQUICC III processor family includes these processors e e500 8560 e e500v2 8536 8548 8568 8569 8572 C29x and G1110 MMU configuration through JTAG For e500 cores the debugger is able to read the L2 MMU TLBs registers without using dedicated processor instructions For e500v2 cores the debugger can read and write the L2 MMU TLB registers You can access these registers from the debugger s Registers View or using commands in a target initialization script or the Debugger Shell For more information on the TLB register structure see the rzapme txt file that is included in the default CodeWarrior project for each supported target board CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 443 PowerQUICC III processors Reset workaround To put the e500 and e500v2 cores in debug mode at reset you must ensure that the c
22. v Enable Li Caches early v lt gt Figure 7 29 U Boot Debug Disassembly View 10 Move the Debug Current Instruction Pointer to _start_e500 11 Deselect the Instruction Stepping Mode 1 command You can now do source level debugging and set breakpoints in start s until the address space switch at the rfi before switch_as start s line 326 See Points to remember for more details 7 6 4 4 2 Debugging U Boot in translated address space This section tells how to debug U Boot in the translated address space in a NAND flash device Once you have reached the rfi call the execution moves to the next stage You should now use a memory configuration file for debugging in this section It is necessary to inspect the TLB registers to check if there are address spaces translated or to search in the CW PA10 layout PA PA_SupportNnitialization_Files Memory if there are memory configuration files that match your U Boot debug scenario NOTE For e500v2 cores 36 bit U Boot debug only due to a hardware issue terminating the current debug session will put the core in running another script must be executed before proceeding further with the instructions provided in this section e Open Debugger Shell view e Execute BoardName uboot 36 stage2_ preparation tcl using the following command source BoardName uboot_ 36 stage2 preparation tcl CodeWarrior Development Studio for Power Architecture Processors Targeting
23. 10 When finished you can either a Kill the process by selecting Run gt Terminate b Leave the kernel running on the hardware CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 337 AAA POL Debugging the Linux Kernel 7 7 9 Debugging the kernel by attaching to a running U Boot This section explains how to debug the Linux kernel by attaching it to a running U Boot To debug the kernel by attaching to a running U Boot perform the following 1 2 O oND 10 11 12 Create a project for the Linux kernel image For more details see Creating a CodeWarrior Project using the Linux Kernel Image Configure the launch configuration for Linux kernel debug For more details see Configuring an Attach Kernel Debug Scenario Select Run gt Debug Configurations The Debug Configurations dialog box appears From the left pane expand the CodeWarrior Attach tree and select the appropriate launch configuration From the Debugger tab select the PIC tab Clear the Alternate Load Address checkbox Click Apply Click Debug to start the debug session The Debug perspective appears While the U Boot is running attach the target The debugger displays a warning in the console as the kernel is not being executed on the target NOTE For multi core processors only coreo is targeted in the Debug view This is norm
24. 10 5 0 06 2015 352 Freescale Semiconductor Inc E ey Chapter 7 Debugging Embedded Linux Software e Select the Enable Memory Translation checkbox and configure it according to the Linux MMU settings For example Physical Base Address 0x0 Virtual Base Address 0xc0000000 Memory Size 0x20000000 e Select the Enable Threaded Debugging Support checkbox e The Update Background Threads on Stop option is used to remove the dead threads which were debugged at some point during the debugging session but later were terminated or killed This option might cause a decrease in speed because a big amount of memory must be read at every stop e Do not select the Enable Delayed Software Breakpoint Support checkbox see the figure below Target OS Linux v Boot Parameters Debug Modules Enable Memory Translation Physical Base Address 0x90000000 virtual Base Address oxoo000000 Memory Size 0x00000000 C Enable Threaded Debugging Support C Enable Delayed Software Breakpoint Support Figure 7 40 Boot Parameters Debug and Modules tab c Configure other options in the Debugger options group according to your specific requirements You have successfully created the Attach Launch configuration Click Debug and attach the configuration to the running Linux kernel 7 9 5 3 Creating a Download Launch Configuration to Debug a Linux Partition from an Entry Point or a User Defined Functio
25. 60 87 Reserved 88 115 RPN Real page number 116 127 Reserved 128 179 EPN Effective page number 180 191 Reserved The table below shows e6500 TLB 1 registers starting from L2MMU_CAM0 through L2MMU_CAM63 Table 5 34 e6500 TLB1 Registers L2 MMU_CAMO through L2MMU_CAM63 0 4 TSIZE Encoded Page size 0b00010 4 KB 0b0001 1 8 KB 0b00100 16 KB 0b00101 32 KB 0b00110 64 KB 0b00111 128 KB 0b01000 256 KB 0b01001 512 KB 0b01010 1 MB 0b01011 2 MB 0b01100 4 MB 0b01101 8 MB 0b01110 16 MB 0b01111 32 MB 0b10000 64 MB Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 199 Working with Registers Table 5 34 e6500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 continued 0b10001 128 MB 0b10010 256 MB 0b10011 512 MB 0b10100 1 GB 0b10101 2 GB 0b10110 4GB 0b10111 8 GB 0b11000 16 GB 0b11001 32 GB 0b11010 64 GB 0b11011 128 GB 0b11100 256 GB 0b11101 512 GB 5 5 Reserved 6 6 IND Indirect bit When set this TLB entry is an indirect entry used to locate a page table 7 7 TS Translation address space compared with AS bit of the current access 8 9 Reserved 10 23 TID Translation ID compared with PID 24 26 Reserved 27 31 WIMGE Memory cache attributes write through cache inhibit memory coherence required gua
26. After Setting Breakpoints 7 From the menu bar select Run gt Resume The debugger executes all lines up to but not including the line at which you set the breakpoint The editor view highlights the line at which the debugger suspended execution shown in the figure below Note also that the program counter blue arrow is positioned here TS m PERETI ELELEE ETEISEEN A Project Stationery ILILILILIL include lt stdio h gt printf Welcome to CodeWarrior r n asm sc generate a system call exception to demonstrate the ISR Figure 5 9 Editor Vie w After Reaching a Breakpoint 5 8 2 Setting Hardware Breakpoints This section explains how to set hardware breakpoints within a program in CodeWarrior IDE CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 165 Working with Breakpoints There are two ways to set hardware breakpoints e Using IDE to Set Hardware Breakpoints e Using Debugger Shell to Set Hardware Breakpoints 5 8 2 1 Using IDE to Set Hardware Breakpoints To set a hardware breakpoint using the IDE follow these steps 1 In the Code Warrior IDE select Run gt Breakpoint Types gt C C Hardware Breakpoints 2 In the Editor view click in the source line where you want to place the breakpoint 3 Select Run gt Toggle Breakpoint A hardware breakpoint appears in the marker bar on the left
27. CodeWarrior Build Tool Settings PowerPC Linker Options Explanation Command Specifies the location of the linker executable file All Options Specifies the actual command line the linker will be called with Expert settings Specifies the expert settings command line parameters Command line pattern 3 3 1 4 1 Input Use the Input panel to specify the path to the linker command file and the libraries The table below lists and describes the various options available on the Input panel Table 3 7 CodeWarrior Build Tool Settings Input Options Explanation No Standard Library Uses standard system library access paths as specified by the environment variable 3MWLibraries to add system libraries as specified by the environment variable sMWLibraryFiless at the end of link order This setting is equivalent to specifying the nostdlib command line option Link Command File Icf Specifies the path of the linker command file that the linker reads to determine how to build the output file Alternatively click Browse then use the resulting dialog box to specify the linker command file This setting is equivalent to specifying the 1cf filename command line option Code Address Sets the run time address of the executable code This setting is equivalent to specifying the codeaddr addr command line option The addr value is an address in decimal or hexadecimal format Hexadecimal values must begin with 0x The def
28. DR scan check Arbitrary TAP state move IDCODE scan check and the result of the tests are printed to the console log and in case of an error a CodeWarrior Alert box appears When this option is not selected the CodeWarrior debugger only performs a limited test while configuring the JTAG chain It checks if the PWR pin is correctly connected and displays a Cable disconnected error if not connected properly The connection details are provided in the CCS protocol log along with the JTAG ID and in case of an error a CodeWarrior Alert box appears See JTAG diagnostics tests for more information on JTAG diagnostics tests Secure debug key Select to enable the debugger to unlock the secured board with the secure debug key provided in the associated text box If this option is not selected you will receive a secure debug Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 136 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 4 Ethernet TAP Advanced Tab Options continued A Y gn violation error when you try to debug on the locked board NOTE If you provide a wrong key and an unlock sequence is run by the debugger with the erroneous key the associated part will be locked until a rest occurs and you will need to reset the target to connect again For the P1010 processor if you have one failed
29. Debugging Options Debug Level Specify the debug levels for the compiler the default options are e None No Debug level e Minimal g1 Produces minimal information enough for making backtraces in parts of the program that you don t plan to debug This includes descriptions of functions and external variables but no information about local variables and no line numbers Default g2 same as g The compiler generates DWARF 2 0 conforming debugging information Maximum g3 The compiler provides maximum debugging support Also includes extra information such as all the macro definitions present in the program Other debugging flags Specify the other debugging flags that need to be passed with the compiler Generate prof information p Generate extra code to write profile information suitable for the analysis program prof You must use this option while compiling and linking the source files Generate gprof information pg Generate extra code to write profile information suitable for the analysis program gprof You must use this option while compiling and linking the source files 3 3 2 3 6 Warnings CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 95 Build Properties for Power Architecture Use the Warnings panel to control how the compiler reports the error and warning messages The following table lists an
30. Hostname TP 10 82 136 144 5 Serial number JTAG settings JTAG clock speed kHz 10230 y CCS server Automatic launch Server port number 41475 C CCS executable Manual launch 127 0 0 1 41475 Connect server to TAP Figure 6 3 Properties for lt connection gt Dialog Box Connection Settings 14 Click OK 15 Click the Debugger tab in the Debug Configurations dialog box The Debugger tab page appears 16 Ensure that the Stop on startup at checkbox is selected and main is specified in the User specified text box 17 Click Apply to save the changes You have successfully configured a debug configuration 18 Similarly configure remaining debug configurations NOTE To successfully debug multiple cores the connection settings must be identical for all debug configurations CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 230 Freescale Semiconductor Inc AAA AA Chapter 6 Multi Core Debugging 6 1 2 Debugging Multiple Cores The Code Warrior debugger enables system developers to simultaneously develop and debug applications on a system with multiple processors within the same debug environment NOTE Ensure that you have attached a debug probe to the target board and to the computer hosting the Code Warrior IDE before performing the steps listed in this section To debug multiple cores follow these steps 1 Select a multi core p
31. Inc Chapter 7 Debugging Embedded Linux Software This chapter explains how to use the CodeWarrior Development Studio tools to debug embedded Linux software for Power Architecture processors NOTE This chapter documents debugger features that are specific to the CodeWarrior for Power Architecture Processors product For more information on debugger features that are in all CodeWarrior products see CodeWarrior Development Studio Common Features Guide from the lt cwrnstal1Dir gt PA Help PDF folder This chapter includes the following sections e Debugging a Linux Application e Viewing multiple processes and threads e Debugging applications that use fork and exec system calls e Debugging a shared library e Preparing U Boot for debugging e Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices e Debugging the Linux Kernel e Debugging Loadable Kernel Modules e Debugging Hypervisor Guest Applications e Debugging the P4080 Embedded Hypervisor e User Space Debugging with On Chip Debug 7 1 Debugging a Linux Application This section describes CodeWarrior Target Resident Kernel TRK and provides information related to using it with CodeWarrior projects CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 239 a es Debugging a Linux Application For embedded Linux development CodeWarrior TRK is a user level appli
32. NOTE Ensure that the address you specify does not cause the RAM disk to overwrite the kernel The kernel is loaded to oxoo000000 The address you specify should be greater than the size in bytes of the uncompressed Linux kernel with no debug symbols NOTE If you use a DTB file ensure to use the same addresses for RAM disk and initial RAM disk initra start value from the chosen section The kernel must find the RAM disk at the address specified in the at file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 324 Freescale Semiconductor Inc _ _ _ _ _ __ __ _ E _ _ _ AAA Chapter 7 Debugging Embedded Linux Software 8 In the Size text box enter the size of the RAM disk file To copy all the contents of the RAM disk file enter zero 0 9 Select the Download to target checkbox to download the RAM disk file to the target board The debugger copies the initial RAM disk to the target board only if this checkbox is checked NOTE Most embedded development boards do not just use a small initial RAM disk but a large root file system The Download to target option works in both the cases but for large file systems it is better to deploy the file directly to the target in the flash memory and not have it downloaded by the debugger 7 7 6 3 2 Regular Initialization To follow the regular initialization method 1 Open the Debug
33. This indicates that the Virtual Base Address Memory Size should not be greater than OxFFFFFFFF CodeWarrior displays an error when this happens e Enable Threaded Debugging Support Check this option to enable support for Linux kernel threaded debugging Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 120 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 12 OS Awareness Page Options continued e Update Background Threads on Stop Check this option only if you want to update the background threads on stop Keep this option unchecked as it may increase debug speed e Enable Delayed Software Breakpoint Support Check this option to enable support for delayed software breakpoints during kernel debug Modules tab This tab allows you to add modules to the Linux kernel project and configure the module s symbolics mapping For more information on the Modules tab see Configuring the Modules Symbolics Mapping 4 1 4 Trace and Profile Use this tab to configure the selected launch configuration for simulator and hardware profiling CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 121 Using Debug Configurations Dialog Box B Main 69 Arguments tS Debugger Trace and Profile Ey Source Enviro
34. This section describes how to configure an attach debug scenario For the attach debug scenario Code Warrior does not download any file on the target The kernel is started directly from U Boot You need to burn the U Boot image to the flash memory of the hardware NOTE See the Burning U Boot to Flash cheat sheet for the entire procedure for burning U Boot to flash To access the cheat sheets select Help gt Cheat Sheets from the Code Warrior IDE After the boot process the U Boot console is available and the Linux kernel can be started manually from U Boot For this the following files can be either written into flash memory or can be copied from U Boot using TFTP e Binary kernel image file utmage e Ramdisk to be started from U Boot for example lt target version gt rootfs ext2 gz u boot e dtb file for example ulmage lt target version gt dtb After the Linux boot process the Linux login appears and you can connect to debug the kernel using the CodeWarrior Attach launch configuration As all the files are manually loaded from U Boot these files must not be specified in the launch configuration The table below describes the settings you need to provide in the launch configuration To specify the launch configuration settings in CodeWarrior 1 Select Run gt Debug Configurations CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 320 Freescale Semiconductor Inc
35. To debug this section of code ensure that the Alternate Load Address checkbox in the PIC tab is disabled 7 7 8 3 Debugging the Kernel after the MMU is Enabled This procedure shows how to debug the kernel after the memory management unit is initialized To debug the kernel after the MMU is enabled follow these steps 1 Select Run gt Debug Configurations from the CodeWarrior menu bar to open the DebugConfigurations dialog box From the Debugger tab select the PIC tab Clear the Alternate Load Address checkbox Click Apply Click Debug to start the debug session The Debug perspective appears In the editor area set a breakpoint at start_kernel after the eventpoint in main c This will stop the debug session at start_kerne1 function shown in the figure below DU Bu WN CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 335 Debugging the Linux Kernel 8 e EPPC core 0 vmlinux 8 11 08 4 49 PM Suspended E of Thread ID OxcO3dd618 Suspended Signal Halt received Description User halted thread 2start_kernel D Kernel 8572 Multicore linux 2 6 23 init main c 514 OxcO3b18b4 1 AsmSection home bogdan BSP_8572 ltib mpc8572ds 2007 1203 rpm BUILD inux 2 6 23 arch powerpc k 3 D Kernel85721Multicorelinux 2 6 23Ywmlinux 8 11 08 4 49 PM cpu_set cpu cpu possible map void init attribute weak smp _ setu
36. attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next attempt Reset Delay ms Specifies the time in milliseconds that CodeWarrior takes to gain control of the target after issuing a reset The default value for this option is 200 ms The delay needs to be increased if the debugger connection does not work reliably after issuing the reset This can happen for specific boards and in scenarios where the pre boot loader PBL is used to perform boot image manipulation for example copying U Boot from SPI flash to internal cache SRAM during reset that does not complete within the default reset timeout window A good start value to test out board specific requirements in such cases is 1000 ms however this value may need to be increased for very large PBL transfers NOTE Reset delay is supported for processors based on the e500mc e5500 and e6500 cores 5 3 3 Gigabit TAP Trace Select this connection type when Gigabit TAP and Trace is used as interface to communicate with the hardware device To configure the settings of a Gigabit TAP Trace connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 F
37. e Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears f On the Initialization tab select the checkboxes for all the cores in the Run out of reset column g In the Initialize target column select the checkbox for core 0 h Click the ellipses button in the Initialize target script column The Target Initialization dialog box appears i Click File System and select the target initialization file from the following path lt CWInstallDir gt PA PA Support Initialization_Files lt Processor Family gt lt target gt uboot_ init Linux tcl CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 331 a al Debugging the Linux Kernel NOTE The initialization file is automatically set when you select Linux Kernel as the Target OS while creating a new project using the New Power Architecture Project wizard Click OK to close the Memory Configuration File dialog box Click OK to close the Properties for lt Target gt dialog box Click OK to close the Properties for lt connection gt dialog box On the Debug tab of the Debugger tab select an Program execution option to stop the debug process at the program entry point or at a specified user function or address like start_kernel n On the OS Awareness tab of the Debugger tab select Linux from the Target OS drop down list o On the Boot Para
38. e Creating Code Warrior Linux Application Project 2 3 1 Creating CodeWarrior Bareboard Application Project You can create a Code Warrior bareboard application project using the CodeWarrior Bareboard Project Wizard To create a Code Warrior bareboard application project perform these steps 1 Select Start gt All Programs gt Freescale Code Warrior gt CW for Power Architecture vnumber gt Code Warrior IDE where number is the version number of your product The Workspace Launcher dialog box appears prompting you to select a workspace to use NOTE Click Browse to change the default location for workspace folder You can also select the Use this as the default and CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 45 Creating projects 10 do not ask again checkbox to set default or selected path as the default location for storing all your projects Click OK The default workspace is accepted The CodeWarrior IDE launches and the Welcome page appears NOTE The Welcome page appears only if the CodeWarrior IDE or the selected workspace is started for the first time Otherwise the Workbench window appears Click Go to Workbench from the Welcome page The workbench window appears Select File gt New gt CodeWarrior Bareboard Project Wizard from the CodeWarrior IDE menu bar The CodeWarrior Bareboard Project Wi
39. of the form include lt xyz gt the same as the form include xyz This setting is equivalent to specifying the nosyspath command line option User Path i Use this panel to specify multiple user paths and the order in which to search those paths The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the i command line option User Recursive Path ir Appends a recursive access path to the current User Path list The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the ir path command line option System Path I 1 Changes the build target s search order of access paths to start with the system paths list The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the I I path command line option System Recursive Path I ir Appends a recursive access path to the current System Path list The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the I ir command line option The table below lists and describes the toolbar buttons that help work with the Input panel Table 3 22 CodeWarrior Build Tool Settings Input Toolbar Buttons on
40. perform these steps CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 171 Se al Working with Registers 1 Open the Breakpoints view if it is not already open by selecting Window gt Show View gt Breakpoints The Breakpoints view appears displaying a list of watchpoints 2 Right click on the watchpoint you wish to remove and select Remove from the menu that appears The selected watchpoint is removed and it disappears from the list in the Breakpoints view 5 10 Working with Registers Use the Registers view to display and modify the contents of the registers of the processor on your target board To display the Registers view select Window gt Show View gt Other gt Debug gt Registers The Registers view appears shown in the figure below The default state of the Registers view provides details on the processor s registers The Registers view displays categories of registers in a tree format To display the contents of a particular category of registers expand the tree element of the register category of interest The figure below shows the Registers view with the General Purpose Registers tree element expanded Tip You can also view and update registers by issuing the reg change and display commands in the Debugger Shell view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 0
41. simulators are not usually limited by the available comparator resources and allow a much higher number of watchpoints 1024 Working with hardware breakpoints The e6500 cores implement eight address instruction breakpoints hardware breakpoints that can be used in a debug session As opposed to hardware simulators are not usually limited by the available comparator resources and allow a much higher number of hardware breakpoints 1024 Thread representation of multi threaded processor The e6500 core is multi threaded implementation of the resources for embedded processors defined by the Power ISA The core supports the simultaneous execution of two threads CodeWarrior shows each thread as a separate core thus core 2n corresponds to thread 0 of the physical core n core 2n 1 corresponds to thread 1 of physical core n Individual thread control For e6500 multi threaded processors the epscro p1s_crx register is modified by the debugger unconditionally on any connection to the target and after any Reset action to disable cross thread halt to allow individual thread control during multi threaded debugging Changing the register value set by the debugger can cause the debugger behave unexpectedly Maintaining thread time base synchronization For e6500 processors the TTBHLTCR register in RCPM block is modified by the debugger unconditionally on any connection to the target and after any Reset action to enable correct time b
42. to occur e TMS disconnected or stuck This may prevent the target from making any JTAG state changes e TCK disconnected or stuck This may prevent any state changes or clocking of data e TDI disconnected or stuck This may prevent the test pattern data from getting into the target e TDO disconnected or stuck This may prevent the test pattern data from getting out of the target If the test fails then it is possible that there is a physical connection problem with the JTAG pins or the JTAG frequency is too high 5 4 3 Bypass scan test The bypass scan test uses the TCK and TMS pins to move the target into the Shift Bypass state and then sends a long test pattern through the data register DR by holding TMS 0 clocking TCK and feeding the test pattern bits in the TDI pin It captures the bits coming out on the TDO pin If the connection is working correctly the TDI bits pass through the DR shift register and eventually show up on TDO The test compares the TDO data it captures against the TDI test pattern it sent to see if TDO contains the test pattern It expects to find the test pattern in the TDO but bit shifted to the left by some number of bits corresponding to the bypass length If the test fails to find the test pattern then it reports an error Error testing bypass scan If the test fails to measure the length of the data register then an error Error measuring bypass length is thrown The error might be due to one
43. 0xc000 0000 for 32 bits and 0xC000 0000 0000 0000 for 64bits e Memory Size is the kernel space translation size NOTE The values shown above should be set as configured in the linux config file config You can read the MMU registers to verify what you have configured and do a correction if required Select the Enable Threaded Debugging Support checkbox Select the Enable Delayed Software Breakpoint Support checkbox Debugger Tab gt Debugger options gt OS e Select the Detect module loading checkbox Awareness Tab gt Modules Tab e Click Add to insert the kernel module file See Configuring the Modules Symbolics Mapping e Select the Prompt for symbolics path if not found checkbox 22 Click the Source page to add source mappings for rootfs and 1inux lt version gt 23 Click Apply to save the settings 7 8 3 Configuring the Modules Symbolics Mapping CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 343 LAT Debugging Loadable Kernel Modules You can use the Modules tab shown in the figure below in the Debug Configurations dialog box to add modules to the Linux kernel project and configure the module s symbolics mapping Detect module loading Modules symbolics mappings Module gt Symbolics Path moxe_rtic_best D workilinux_2_6_18my_bulldiLinux_11_07_2007isources miscimodule_testimmac_rtic_test ko mocc_wdog
44. 15 Enter in the Remote download path text box the path of a target computer directory to which the Linux application running on the target hardware can read and write files NOTE The specified directory must exist on the target system 16 If required specify information about other executable files to debug in addition to the Linux application a Click the Other Executables tab The corresponding sub page appears b Use the sub page settings to specify information about each executable file 17 Click Apply The IDE saves the pending changes you made to the launch configuration You just finished creating a CodeWarrior download launch configuration that you can use to debug the Linux application 7 1 4 Specify Console I O Redirections for the Linux Application CodeWarrior TRK allows you to specify I O redirections as arguments for applications to be debugged This feature allows users to use a file on the target or even the target console for file descriptors including stdin stdout and stderr By default the CodeWarrior TRK running on the target forwards the output of the application to the host CodeWarrior The host CodeWarrior will be able to print the received output only if the Allocate Console necessary for input checkbox is selected in the Common tab of the Debug Configurations dialog box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 246 Freescale Semi
45. 2 4 reservedchar This command sets the reserved character for the memory configuration file When the debugger attempts to read a reserved or invalid memory location it fills the buffer with this character Syntax reservedchar rChar Arguments rChar the one byte character the debugger uses when it accesses reserved or invalid memory Example CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 401 Memory configuration commands To set the reserved character to x reservedchar 0x78 10 2 5 translate This command lets you configure how the debugger performs virtual to physical memory address translations Typically you use address translations to debug programs that use a memory management unit MMU that performs block address translations NOTE Using the translate commands in the memory configuration file prevents the debugger from automatically reading the translations from the target MMU For more information see Memory translations Syntax translate virtualAddress physicalAddress numBytes Arguments virtualAddress the address of the first byte of the virtual address range to translate physicalAddress the address of the first byte of the physical address range to which the debugger translates virtual addresses numBytes the size in bytes of the address range to translate Example The following translate command e Def
46. 2015 160 Freescale Semiconductor Inc AAA E Chapter 5 Working with Debugger S Debugger Shell 2 Bio about about display version information alias al create remove or list a comman alias bp b set remove or list breakpoint s cd cd change directory change c changes memory registers or variable cls cls clear screen cmdregistry cmdr display defined custom commands cmdwin eppc e300c1 adjust_pc e300c1 adj e300c1 auto adjust PC cmdwin eppc e300c1 cache coherence e300c1 cache Configure e300c1 cache coherence mechanism v lt gt page 1 of 8 press Space End or Esc i Figure 5 5 Debugger Shell View If you work with hardware as part of your project you can use the command line debugger to issue commands to the debugger while the hardware is running Tip To view page wise listing of the debugger shell commands right click in the Debugger Shell view and select Paging from the context menu Alternatively click the Enable Paging icon from the view toolbar The table below lists the instructions for common command line debugging tasks Table 5 19 Common Command Line Debugging Tasks a Y ome Open the Debugger Shell view Select Windows gt Show View gt Other The Debugger Shell view appears gt Debugger Shell Use the help command 1 On the Debugger shell command prompt gt type help 2 Press Enter key The command list for CodeWarrior appears E
47. 30 G Guarded 31 31 E Endianness Determines endianness for the corresponding page 32 32 UR User read permission bit 33 33 UW User write permission bit 34 34 UX User execute permission bit 35 35 SR Supervisor read permission bit 36 36 SW Supervisor write permission bit 37 37 SX Supervisor execute permission bit 38 38 X0 Implementation dependent page attribute Implemented as storage 39 39 x1 Implementation dependent page attribute Implemented as storage 40 43 U0 U3 User attribute bits These bits are associated with a TLB entry and can be used by system software 44 44 IPROT Invalidate protect Set to protect this TLB entry from invalidate operations from tlbivax tlbilx or MMUCSRO TLB flash invalidates 45 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualization fault Controls whether a DSI occurs on data accesses to the page regardless of permission bit settings 54 59 LPIDR Translation logical partition ID 60 83 RPN Real page number 84 95 Reserved 96 115 EPN Effective page number 116 126 Reserved 127 127 V Valid bit for entry CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 195 ee Working with Registers 5 10 5 4 4 e5500 Registers This section provides information about e5500 TLBO registers starting from L2MMU_TLBO through LLMMU_TLB511 Table 5 31 e5500 TLBO Registers L2MMU_TLBO through L2MMU_TLB511
48. 9 5 3 Creating a Download Launch Configuration to Debug a Linux Partition from an Entry Point or a Miser Dremel Uti spa A AAA Kis 3 10 Debugging the P4080 Embedded Ra 356 7 10 1 Debugging Hypervisor During the Boot and Initialization Process essssssesesseeeeeeeeeeeeeeeceeeereeeaseaeeaeeaeeas 359 7101 1 Debugging Hyp rvisor irom the Entry Policia 359 7 10 1 2 Debugging Hypervisor from Relocation Till Release of Secondary Cores 362 7 10 1 3 Debugging Hypervisor after Release gf Secondary COS ici ca doncs 364 7 10 1 4 Debugging the Hypervisor Partitions Initialization ProcesS oononnncnonninnnncnnnnconnnnncnnnonncnn conc cano cnnonnss 365 7 10 1 5 Debugging the Hypervisor Partitions Image Loading Process ccssssssssessseeeseeeeeeceeceeeneseeeneenes 366 7 10 1 6 Debugging All Cores when Starting the Guest Applications eile eeceeesceeeeeeeeeseeeaeeeeenaeeaees 366 T10 1 7 Debuseing the Hypervisor Partition Maid iii 366 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 13 Section number Title Page 3 11 User Space Debarsins with De Cl Debig encinas a EER NAER ER take 367 TILI Attaching Core to the Debug Applicat Gt eiiicciecssssiscaeusnatasaansisaensavshearcnsesnitnenertanepenwasentessariasavarsavensetaeoeineunenedy 369 711 2 Debugging the Application from the mai PONCHO iia tetris 370 Chapter 8 JTAG Configuration Files al IEA tie
49. AMP One build configuration per core option displays a checkbox Set up build references for build configurations of all cores just below this option If you select the Set up build references for build configurations of all cores checkbox then building the project for one core will automatically build the project for other cores as well If you do not select this checkbox then you would need to manually build the project for each core Core Index Select the processor core that executes the project 2 1 6 Trace Configuration Page Use this page to enable collection of trace and profiling data CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 37 aaa gt CodeWarrior Linux Project Wizard ic CodeWarrior Bareboard Project Wizard xs lam Trace Configuration You can start a trace session automatically on debug launch _ Start a trace session on debug launch Generate trace configurations Y DDR Buffer V NPC Buffer _ Gigabit TAP Trace Enable circular collection DDR and NPC only Enable circular collection 9 gt aii Figure 2 6 The Trace Configuration Page The table below describes the various options available on the Trace Configuration page Table 2 6 Trace Configuration Page Settings O Option LI Start a trace session on debug Allows you to enable trac
50. Click New The New Connection wizard appears Expand the CodeWarrior Bareboard Debugging group and select Hardware or Simulator Connection Click Next The Hardware or Simulator Connection page appears Specify a name and a description for the connection Click New next to the Target drop down list The New Connection wizard appears Expand the CodeWarrior Bareboard Debugging group and select Hardware or Simulator System Click Next Select a processor from the Target type drop down list On the Initialization tab clear the Execute reset checkbox Select the checkbox for the respective core in the Initialize target column Click the ellipsis button in the Initialize target column The Initialization target dialog box appears Click File System and select the target initialization file from the following path lt CWInstallDir gt PA PA Support Initialization Files NOTE If you want to use an initialization file that initializes CCSR and PIXIS before U Boot you can uncomment the specific lines in the lt board_name gt _uboot_ lt numbits gt tc1 initialization file where lt numbits gt Can be 32 Or 36 Based on the target you select you may also have to specify the memory configuration file details by selecting the Memory Configuration checkbox on the Memory tab Click the ellipsis button in the Memory Configuration column The Memory Configuration dialog box appears Click File System and
51. CodeWarrior Build Tool Settings Preprocessor Options continued Show full path Controls generation of full paths or just the base file name This setting is equivalent to specifying the ppopt nojfull path command line option Keep comment Controls generation of comments This setting is equivalent to specifying the ppopt no Jcomment command line option Use line Controls generation of 1ine directives This setting is equivalent to specifying the ppopt nojline command line option Keep whitespace Controls generation of white spaces This setting is equivalent to specifying the ppopt no space command line option 3 3 2 GCC Build Tool Settings GNU compiler collection GCC build tools are open source tools that you can use in your CodeWarrior projects In the current installation every core or target has a separate GCC build tool attached to it For example projects created for es00mc bareboard use powerpc eabi toolchain whereas projects created for e5500 OF e6500 32 64 bareboard use powerpc aeabi e5500 OF powerpc aeabi e6500 toolchain NOTE For more information about the GCC build tools see documents available in the lt CWInstallDir gt Cross_ Tools gcc lt version gt lt target gt powerpc lt eabi eabispe aeabi linux libc gt share docs pdf folder For this version of CodeWarrior Development Studio for Power Architecture the default version of GCC PowerPC toolchain ba
52. Compiler Options A A ATEN Command Specifies the PowerPC GCC command line driver or compiler required to build the source files in the project All options Specifies the actual command line the compiler will be called with Expert settings Specifies the expert settings command line parameters Command line pattern 3 3 2 3 1 Preprocessor Use the Preprocessor panel to specify preprocessor behavior You can specify whether to search system directories or preprocess only based on the options available in this panel The table below lists and describes the various options available on the Preprocessor panel Table 3 38 Tool Settings Preprocessor Options Do not search system directories nostdinc Specifies compiler to not to search the standard system directories for header files Only the directories specified by the user with I option and the directory of the current file if appropriate are searched This setting is equivalent to specifying the nostdinc command line option Preprocess only E Specifies command line tool to preprocess the source files and not to run the compiler This setting is equivalent to specifying the E command line option 3 3 2 3 2 Symbols Use the Symbols panel to control how the compiler structures generated object code The table below lists and describes the various options available on the Symbols options Table 3 39 Tool Settings Symbols Options
53. Configurations dialog box Select the Debugger tab From the Debugger options panel select the OS Awareness tab From the Target OS drop down list select Linux On the Boot Parameters tab select the Enable Command Line Settings checkbox Mm BW bd The options in this group activate 6 Specify the RAM disk parameters for use in the Command Line field For example e You can specify the following when the regular initialization of the kernel is used root dev ram rw e Sample NFS parameters root dev nfs ip 10 171 77 26 nfsaddr 10 171 77 26 10 171 77 21 nfsroot tftpboot 10 171 77 26 root dev nfs rw nfsroot 10 171 77 21 tftpboot 10 171 77 26 ip 10 171 77 26 10 171 77 21 10 171 77 254 255 255 255 0 8280x eth0 o0ff where 10 171 77 21 is the IP address of the NFS server and 10 171 77 26 is the IP address of the target platform t ftpboot 10 171 77 26 1S a directory on the host computer where the target platform file system is located CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 325 Debugging the Linux Kernel 8280x 1S the host name s Sample flash parameters root dev mtdblock0 or root dev mtdblock2 depending on your configuration 7 7 6 4 Using Open Firmware Device Tree Initialization method You can use the Open Firmware Device Tree Initialization method as an alternate way of loading paramete
54. Execute target reset applies to initial launch only Target Core reset Run out of reset Initialize target Initialize target script P4080 O O ne O O ProjDirPath CFG P40 Ez e500mc 1 F e500mc 2 F O e500mc 3 O O e500mc 4 O O e500mc 5 O O e500mc 6 O O e500mc O O Note Target initialization files and core reset only apply to cores being launched Figure 9 1 Initialization Tab In the Initialize target script column click the ellipsis button as shown in the figure above CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 380 Freescale Semiconductor Inc Chapter 9 Target Initialization Files Tip Click in the specified cell of the Initialize target script column for the ellipsis button to appear The Target Initialization File dialog box appears as shown in the figure below 2 Target Initialization File Select a file to apply to the currently selected system node and recursively to all descendant nodes if any D PA 10 Installed Build CW PA v10 1 PA PA_Support Initialization_Files QorIQ_P4 Figure 9 2 Target Initialization File Dialog Box 10 Select the target initialization file by using the buttons provided in the dialog box and click OK The target initialization files are available at the following path lt CWInstallDir gt PA PA Support Initialization_Files You can also write your own target initialization files
55. Hardware Tools 11 3 2 4 4 Address lines To force bit flips in address lines the test uses three approaches e Sequential This approach works sequentially through all of the memory under test from lowest address to highest address This sequential approach results in an average number of bit flips from one access to the next Full Range Converging This approach works from the fringes of the memory range toward the middle of the memory range Memory access proceeds in this pattern where number and number indicate the next item location the specific increment or decrement depends on byte word or long word address mode e the lowest address e the highest address e the lowest address 1 e the highest address 1 e the lowest address 2 e the highest address 2 e Maximum Invert Convergence This approach uses calculated end point addresses to maximize the number of bits flipping from one access to the next This approach involves identifying address end points such that the values have the maximum inverted bits relative to one another Specifically the test identifies the lowest address with all oxs values in the least significant nibbles and the highest address with all oxa values in the least significant nibbles After the test identifies these end points memory access alternates between low address and high address working towards the center of the memory under test Accessing memory in this manner the test achieves the
56. ISO images for e500mc core c23174e5e3d187f43414e5b4420e8587 QorlQ SDK V1 2 PPCE500MC 20120603 yocto iso partl 292c6e1c5e97834987fbdb5f69635a1d QorIQ SDK V1 2 PPCE500MC 20120603 yocto iso part2 NOTE You can see the SDK Manual for instructions about how to build the BSP images and run different scenarios from the iso help documents pdf location 7 5 2 Configure U Boot and build U Boot images with CodeWarrior debugger support After installing the BSP you need to configure the BSP U Boot package to place debugger symbolic information in the U Boot binary executable file and build the U Boot images with CodeWarrior debugger support on the Linux host computer For more information on configuring the U Boot and building U Boot images see the SDK User Manual available in the iso help documents pdf folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 274 Freescale Semiconductor Inc E Chapter 7 Debugging Embedded Linux Software 7 5 3 Configure hardware to use U Boot image To configure the hardware to use U Boot image you need to burn the U Boot image to the flash memory of the hardware NOTE See the Burning U Boot to Flash cheat sheet for the entire procedure for burning U Boot to flash To access the cheat sheets select Help gt Cheat Sheets from the CodeWarrior IDE menu bar 7 5 4 Create a CodeWarrior project to debug U Boot Create a new CodeWarrior project
57. In case the lt CWInstal1Dir gt PA PA_Too1s HyperTrk directory contains newer HyperTRK patch see Applying New HyperTRK Patches from CodeWarrior Install Layout NOTE For more details on configuring or compiling the Hypervisor refer the SDK Manual available in the iso help documents pdf folder 7 9 3 2 Applying New HyperTRK Patches from CodeWarrior Install Layout CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 347 BI Debugging Hypervisor Guest Applications The lt cwrnstallDir gt PA PA_Tools HyperTrRK directory contains new patches To apply the new patches see the procedures defined in the SDK manual 7 9 3 3 Modifying and Building the HyperTRK Manually To modify the HyperTRK sources 1 Apply the new HyperTRK patches if any see Applying New HyperTRK Patches from CodeWarrior Install Layout The hypervisor and the HyperTRK sources are extracted to this directory lt BSP Directory gt rpm BUILD embedded hv version 2 Ensure that the environment variables point to the correct compiler that BSP uses so that it correctly builds HyperTRK and the hypervisor NOTE For more details on adding new patches modifying the HyperTRK and building the packet see the SDK manual available in the SDK Manual available in the iso ne1p document s pdf folder 7 9 4 Preparing Connection to P4080DS Target This section explains how to debug AM
58. Initialization tab options II PC scriptic O Execute Target reset Select to execute target system reset Core reset Select to include the respective core for core reset operation Run out of reset Select to include the respective core for run out of reset operation Initialize target Click to specify a target initialization file for the respective core Initialize target script Lists the path to a Debugger Shell Tcl script that runs when launching a debug session for the respective core To edit select a cell then click the ellipsis button to open the Target InitializationFile dialog box The settings for a group of cores can be changed all at once by editing the cell of a common ancestor node in the Target hierarchy 5 5 2 Memory tab Use the Memory tab to specify memory configuration file for various cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 156 Freescale Semiconductor Inc y Chapter 5 Working with Debugger Initialization IE Memory Advanced eoscesesoscssesososesos Target Memory configuration Memory configuration file P4080 e500mc 0 4ProjDirPath CFG P4080D5 e500mc 1 4ProjDirPath CFG P4080D5 e500mc 2 4ProjDirPath CFG P4080DS e500mc 3 4ProjDirPath CFG P4080DS e500mc 4 4 ProjDirPath CFG P4080DS e500mc 5 4ProjDirPath CFG P4080DS e500mc 6
59. JTAG configuration file to override RCW e Using a JTAG configuration file to specify multiple linked devices on a JTAG chain e Setting up a remote system to use a JTAG configuration file 8 1 JTAG configuration file syntax This section describes the syntax of a JTAG configuration file You can create a JTAG configuration file that specifies the type chain order and various settings for the devices you want to debug To create the JTAG configuration file list each device on a separate line starting with the device that is directly connected to the transmit data out TDO signal Pin 1 of the 16 pin COP JTAG debug connector on the hardware target and conclude with a blank line The listing below shows the complete syntax for a JTAG configuration file Listing 8 1 JTAG Configuration File Syntax cfgfile n any other characters until end of line line cfgfile line CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 371 AAA NN AAN Using a JTAG configuration file to override RCW line target target filter list_or params target target_name target_name target_id Generic number number number filter _list_or params filter list entity filter list_or params filter list _entity filter list entity number number filter_name 9 GI In the listing above target_name represents a processor name such as P1010 P20
60. Kernel Modules b Leave the kernel running on the hardware 7 8 Debugging Loadable Kernel Modules This section explains how to use the CodeWarrior debugger to debug a loadable kernel module e Loadable Kernel Modules An Introduction e Creating a CodeWarrior Project from the Linux Kernel Image e Configuring the Modules Symbolics Mapping 7 8 1 Loadable Kernel Modules An Introduction The Linux kernel is a monolithic kernel that 1s 1t 1s a single large program in which all the functional components of the kernel have access to all of its internal data structures and routines Alternatively you may have a micro kernel structure where the functional components of the kernel are broken into pieces with a set communication mechanism between them This makes adding new components to the kernel using the configuration process very difficult and time consuming A more reliable and robust way to extend the kernel is to dynamically load and unload the components of the operating system using Linux loadable kernel modules A loadable kernel module is a binary file that you can dynamically link to the Linux kernel You can also unlink and remove a loadable kernel module from the kernel when you no longer need it Loadable kernel modules are used for device drivers or pseudo device drivers such as network drivers and file systems When a kernel module is loaded it becomes a part of the kernel and has the same rights and responsibilities as r
61. L2MMU_TLBO through L2MMU_TLB1023 Table 5 33 e6500 TLBO Registers L2MMU_TLBO through L2MMU_TLB1023 0 0 V Valid bit for entry 1 1 TS Translation address space compared with AS bit of the current access 2 6 TSIZE Encoded page size Only present in TLB1 however software should always set page sizes for TLBO for future compatibility 7 9 Reserved 10 23 TID Translation ID compared with PID 24 26 NV 27 31 Reserved 32 36 WIMGE Memory cache attributes write through cache inhibit memory coherence required guarded endian 37 37 Reserved 38 38 X0 Extra system attribute bit 39 39 x1 Extra system attribute bit 40 43 U0 U3 User attribute bits used only by software Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 198 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 33 e6500 TLBO Registers L2MMU_TLBO through L2MMU_TLB1023 continued 44 44 Reserved 45 45 SR Supervisor read permission bit 46 46 Sw Supervisor write permission bit 47 47 SX Supervisor execute permission bit 48 48 UR User read permission bit 49 49 UW User write permission bit 50 50 UX User execute permission bit 51 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualization fault 54 59 LPIDR Translation logical partition ID
62. Library Figure 2 2 Processor Page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 31 ES SS SS a E a CodeWarrior Bareboard Project Wizard The table below describes the various options available on the Processor page Table 2 2 Processor Page Settings prt CR scriptiors OO O O O O O Processor Expand the processor family tree and select a supported target The toolchain uses this choice to generate code that makes use of processor specific features such as multiple cores Project Output Select any one of the following supported project output Application Select to create an application with e1 extension that includes information related to the debug over a board e Static Library Select to create a library with a extension that can be included in other projects Library files created using this option do not include board specific details 2 1 3 Debug Target Settings Page Use this page to select debugger connection type board type launch configuration type and connection type for your project This page also lets you configure connection settings for your project NOTE This wizard page will prompt you to either create a new remote system configuration or select an existing one A remote system is a system configuration that defines connection initialization and target parameters The remote syst
63. Linux application Language C The IDE creates a project with a debug launch configuration 2 Create a new build configuration Right click on the project folder and select Build Configurations gt Manage The Fork Manage Configurations dialog box appears 3 Rename the default debug configuration to Fork 4 Click New to create a new build configuration The Create New Configuration dialog box appears In the Name field enter the configuration name rork2c1one From the Copy settings from options select Existing configuration 7 Click OK The Fork Manage Configurations dialog box appears shown in the figure below NN CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 253 Debugging applications that use fork and exec system calls Fork Manage configurations Configuration Description Status Fork Fork functionality Active Fork2done Fork2done impleme sane Figure 7 10 Fork Manage Configurations Dialog Box 8 Activate the rork2clone build configuration 9 Build the rork2clone build configuration by right clicking it in the CodeWarrior Projects view and selecting Build Project from the context menu The CodeWarrior IDE builds the project and stores the support library 1ibfork2c1one a in the Output directory within the project directory NOTE Remember to build the rork2clone build conf
64. Manual Rev 10 5 0 06 2015 304 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software To debug U Boot in the translated address space in flash before switching back to initial address space start s bl cpu_init_f line 396 L 2 3 13 Click E on the Debug view toolbar to terminate the current debug session Select Run gt Debug Configurations The Debug Configurations dialog box appears From the left pane in the CodeWarrior Attach container select the appropriate launch configuration In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears On the Memory tab select the checkbox for the respective core in the Memory configuration column Click the ellipsis button in the Memory configuration file column The Memory Configuration File dialog box appears Click File System and select the memory configuration file from the path lt CWInstallDir gt PA PA Support Initialization_Files Memory NOTE To select an appropriate memory configuration file it is necessary to inspect the TLB registers and check if there are address spaces translated or if there are memory configuration files available in the CodeWarrior layout that match your U Boot debug scenario Click OK to close the Memory Configurat
65. PA10 layout PA PA_Support Initialization_Files Memory if there are memory configuration files that match your U Boot debug scenario NOTE For e500v2 cores 36 bit U Boot debug only due to a hardware issue terminating the current debug session will put the core in running another script must be executed before proceeding further with the instructions provided in this section 1 Open Debugger Shell view 2 Execute BoardName uboot 36 stage2 preparation tcl using the following command source BoardName uboot 36 stage2 preparation tcl To debug U Boot in the translated address space in flash before switching back to initial address space start s bl cpu_init_f line 396 1 2 Click E on the Debug view toolbar to terminate the current debug session Select Run gt Debug Configurations The Debug Configurations dialog box appears Expand the CodeWarrior group and select the appropriate launch configuration In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears On the Memory tab select the checkbox for the respective core in the Memory configuration column Click the ellipsis button in the Memory configuration file column The Memory Configuration File dialog box appears Click File System and select the memory configurat
66. Services Other Executables Symbolics 05 Awareness C Cache Symbolics Between Sessions C Create and Use Copy of Executable Note Caching without copying the executable will keep the File locked Rebuilding the project or using Purge Symbolics Cache in the context menu of the Debug View unlocks the file Figure 4 10 Debugger Options Symbolics page The table below lists the various options available on the Symbolics page Table 4 11 Debugger Options Symbolics A O A ee Cache Symbolics Between Sessions Check this option to have the debugger cache symbolics between debugging sessions If you check this checkbox and clear the Create and Use Copy of Executable checkbox the executable file remains locked after the debugging session ends In the Debug view right click the locked file and select Un target Executables to have the debugger delete its symbolics cache and release the file lock The IDE enables this menu command when there are currently unused cached symbolics that it can purge Clear this option so that the debugger does not cache symbolics between debugging sessions Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 118 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 11 Debugger Options Symbolics continued Create and Use Copy of Executable Check this option to have the debugger
67. Software 9 When you select the connection type the corresponding Connection tab appears shown in the figure below New Connection Linux AppTRK Connection configuration for a Linux target running the AppTRK debug agent Parent profile B34930 01 Name Linux AppTRK Description Template None Connection type Ethernet Connection Advanced Ethernet settings Hostname IP 10 82 176 1 Port number 12345 C Enable logging Figure 7 2 Remote Linux AppTRK System Connection Page 10 Specify the settings as appropriate for the connection between the host computer and the target hardware on this page 11 Click Finish The new remote system that you just created appears in the Connection drop down list 12 Click the Debugger tab The Debugger options panel appears with the respective tabs CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 245 EA Debugging a Linux Application 13 On the Debug tab if required specify a function or address in the application where you want the program control to stop first in the debug session a Select the Stop on startup at checkbox The IDE enables the corresponding text box b Enter in the text box an address or a function inside the application 14 Click the Remote tab The corresponding sub page comes forward
68. Specifies linker to not to use the standard system startup files when linking The standard system libraries are used normally unless nostdlib or nodefaultlibs command line options are used This setting is equivalent to specifying the nostartfiles command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 88 Freescale Semiconductor Inc Chapter 3 Build Properties Table 3 31 Tool Settings General Options continued Description Do not use default libraries nodefaultlibraries Specifies linker to not to use the standard system libraries when linking Only the libraries you specify will be passed to the linker Options specifying linkage of the system libraries such as static libgcc or shared libgcc will be ignored This setting is equivalent to specifying the nodefaultlibraries command line option No startup or default libs nostdlib Specifies linker to not to use the standard system startup files or libraries when linking This setting is equivalent to specifying the nostdlib command line option Omit all symbol information s Specifies linker to remove all symbol table and relocation information from the executable This setting is equivalent to specifying the s command line option No shared libraries static Specifies linker to prevent linking with the shared libraries This setting is
69. The Add Device dialog appears 2 Select a flash device from the device list 3 Click the Add Device button The flash device is added to the Flash Devices table in the Flash Programmer Task editor window NOTE You can select multiple flash devices to add to the Flash Devices table To select multiple devices hold down the Control key while selecting the devices 4 Click Done CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 406 Freescale Semiconductor Inc Chapter 11 Working with Hardware Tools The Add Device dialog closes and the flash device appears in the Flash Devices table in the Flash Programmer Task editor window NOTE For NOR flashes the base address indicates the location where the flash is mapped in the memory For SPI and NAND flashes the base address is usually oxo 11 1 2 2 Specify target RAM settings The Target RAM is used by Flash Programmer to download its algorithms NOTE The Target RAM memory area is not restored by flash programmer If you are using flash programmer with Active Debug Context it will impact your debug session The Target RAM Add flash device group contains fields to specify settings for the Target RAM e Address textbox Use it to specify the address from the target memory The Address textbox should contain the first address from target memory used by the flash algorithm running on a target board e Size textbox U
70. The next section documents the commands that can appear in such files 9 2 Target initialization commands Target initialization commands are of two types cfg commands and tc1 commands The syntax of each target initialization command follows these rules e Spaces and tabs white space are ignored e Character case is ignored e Unless otherwise noted values may be specified in hexadecimal octal or decimal e Hexadecimal values are preceded by ox for example oxbzansEEF e Octal values are preceded by o for example 01234567 e Decimal values start with a non zero numeric character for example 1234 e Comments start with a semicolon or pound sign and continue to the end of the line CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 381 Target initialization commands This section explains e cfg target initialization commands e tcl target initialization commands 9 2 1 cfg target initialization commands This section describes for each cfg target initialization command a brief statement of what the command does the command s syntax a definition of each argument that can be passed to the command and examples showing how to use the command Some commands described in this section allow access to memory mapped register by name as well as address Based on the processor selection in the debugger settings these commands wil
71. The table below describes various options available on the Connection tab page Table 5 13 USB TAP Connection Tab Options O CI USB TAP USB serial number Select and specify the USB serial number of the USB TAP required only if using multiple USB TAPs JTAG settings JTAG clock speed kHz Specifies the JTAG clock speed By default set to 10230 kHz CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Click to specify the path of or browse to the executable file of the CCS server Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 146 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 13 USB TAP Connection Tab Options continued Manual launch Select to manually launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the TAP The table below describes the various options available on the Advanced tab page Table 5 14 USB TAP Advanced Tab Options Target connection lost settings Try
72. Trace and Profile tab page Table 4 13 Trace and Profile Tab Options II o Description O O U O Start a trace session Select to start the trace session immediately on launch Default trace Configuration Select the default trace configuration The Show all configurations option will display all the trace configurations available in the Default trace Configuration drop down list and the Only show configurations for the associated project option will display those configurations which are related to the selected project Edit Trace Collection Click to modify the selected configuration Select the trace collection mode Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 122 Freescale Semiconductor Inc Ey Chapter 4 Debug Configurations Table 4 13 Trace and Profile Tab Options continued TOO gt D CodeWarrior configures the target and enables Select to configure and control trace collection If the target is running trace collection and must be suspended to configure trace hardware Click to suspend the target to configure trace hardware e Suspend and resume the target automatically Select to suspend the target automatically for trace configuration If this option is enabled and you choose to configure trace while the target is running the target suspends immediately while trace configuration
73. Users b34823 workspace Hello_World core00 Bro Finish Cancel Figure 2 1 Create a CodeWarrior Bareboard Project page The table below describes the various options available on the Create a CodeWarrior Bareboard Project page Table 2 1 Create a CodeWarrior Bareboard Project page settings Option O Doeoription O Project name Enter the name for the project in this text box Use default location Select to choose the directory to store the files required to build the program Use the Location option to select the desired directory Location Specifies the directory that contains the project files Use Browse to navigate to the desired directory This option is only available when Use default location is cleared CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 30 Freescale Semiconductor Inc Chapter 2 Working with Projects 2 1 2 Processor Page This page displays the target devices supported by the current installation Use this page to specify the type of processor and the output for the new project Choose the processor for this project Processor type filter text 4 Power Architecture Family B2xx B3xx b 85x C29x gt Qonverge gt QorlQ_ P1 gt QorlQ_P2 gt QorlQ_P3 QorlQ_P4 P4040 P4080 gt QorlQ_P5 gt QorlQ_T1 gt QorlQ_T2 gt QorlQ_T4 Project Output 9 Application D Static
74. address and memory space on which the data transfer is performed The Literal address field allows only decimal and hexadecimal values Expression Enter the memory address or expression at which the data transfer starts Access Size Denotes the number of addressable units of memory that the debugger accesses in transferring one data element The default values shown are 1 2 and 4 units When target information is available this list shall be filtered to display the access sizes that are supported by the target Select file Enter the path to the file that contains the data to be imported Click the Workspace button to select a file from the current project workspace Click the System button to select a file from the file system the standard File Open dialog Click the Variables button to select a build variable File Type Defines the format in which the imported data is encoded By default the following file types are supported e Signed decimal Text e Unsigned decimal Text e Motorola S Record format e Hex Text Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 430 Freescale Semiconductor Inc ke eee Chapter 11 Working with Hardware Tools Table 11 4 Controls used for importing data into memory continued e Annotated Hex Text e Raw Binary Number of Elements Enter the total number of elements to be transfe
75. all the code has been copied the e500 core starts to execute the code from the target memory device There are different ways you can utilize the eSDHC eSPI boot feature The simplest way is for the on chip ROM to copy an entire operating system boot image into the system memory and then access it to begin execution This is the preferred way for small applications and for U Boot application debug After the reset sequence all code is in RAM at 0x11000000 The following sections describe four U Boot debug stages for debugging U Boot using the SPI and SD MMC flash devices e Debugging U Boot before switching address space e Debugging U Boot in translated address space e Debugging U Boot after switching back to initial address space e Debugging U Boot in RAM 7 6 4 3 1 Debugging U Boot before switching address space This section tells how to debug U Boot in the SPI and SD MMC flash devices before switching address space To debug U Boot in flash before switching address space 1 Start the CodeWarrior IDE 2 Open the CodeWarrior U Boot project that you created in Creating a CodeWarrior Project to Debug U Boot 3 Select Run gt Debug Configurations The Debug Configurations dialog box appears 4 From the left pane expand the CodeWarrior Attach container and select the appropriate launch configuration 5 Click Debug The Debug perspective appears with the core 0 running 6 Click Reset on the Debug view toolbar The Reset di
76. alternate load address to flash address space by issuing the setpicloadaddr 0xFFF40000 command in the Debugger Shell Now you do not need to manually set it from the Debugger Shell in Stage 1 7 6 4 3 Debugging U Boot using SPI and SD MMC flash This section explains how to debug U Boot using the SPI and SD MMC flash devices in different U Boot debug stages U Boot debug using the SPI and SD MMC flash devices is similar The only difference between these devices is how the final image u boot bin and the configuration and control words is built For more details see Configuring and Building U Boot CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 295 LTE Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices After the device has completed the reset sequence if the ROM location selects the on chip ROM eSDHC eSPI Boot configuration the e500 core starts to execute code from the internal on chip ROM The e500 core configures the eSDHC eSPI controller enabling it to communicate with the external SD SPI card The SD SPI device should contain a specific data structure with control words device configuration information and initialization code The on chip ROM boot code uses the information from the SD SPI card content to configure the device and to copy the initialization code to a target memory device through the eSDHC interface After
77. as Secure Copy SCP or File Transfer Protocol FTP to download the Code Warrior TRK binary executable file apprrx e1 to a suitable location on the file system of the target system You also need to place the unstripped versions of the 1a so libpthread so aNd 1ibthread_db so files in the 1i directory of the target system to debug shared library code or multi threaded code with Code Warrior TRK CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 240 Freescale Semiconductor Inc EE eee Chapter 7 Debugging Embedded Linux Software 7 1 2 Start CodeWarrior TRK on Target System This section explains how to start CodeWarrior TRK on target system How you start CodeWarrior TRK on the target hardware depends on the type of connection between the host computer and that target hardware e Transmission Control Protocol Internet Protocol TCP IP The host computer communicates with the target hardware over a TCP IP connection e Serial cable A serial cable connecting the host computer to the target hardware CodeWarrior TRK can be started as either a root user or a normal user however if the application to be debugged requires root permission then you need to start CodeWarrior TRK as a root user In other words CodeWarrior TRK must have all the privileges required by the application that it will debug You also need to ensure that the download directory specified in the Remote
78. bit GPR5 register writereg64 GPR5 0x01234567 Ox89ABCDEF 9 2 1 18 writereg128 Writes the supplied 32 bit values to the specified TLB register NOTE This command is applicable only to Book E cores like the e500 or e500mc variants Syntax writereg128 regName valuel value2 value3 value4 Arguments regName The name or number of the TLB register to which to assign the specified values Tip Valid TLBO register names range from L2mmu_rieo through L2MMU_TLB255 L2MMU_TLB511 for e500v2 and e500mc Tip Valid TLB1 register names range from 12umu_camo through Lommu_camis5 and LAMMU_CAM63 for e500mc valuel value2 value3 value4 The four 32 bit values that together make up the 128 bit value to assign to the specified TLB register CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 392 Freescale Semiconductor Inc Chapter 9 Target Initialization Files Each value must be specified in hexadecimal for example oxrrrrascp Example This command writes the values oxa1002 oxB1003 oxc1004 and oxb1005 to the 12mmu_camo TLB register writereg128 L2MMU_CAM1 0x7000000A 0x1C080000 OxFE000000 OxFE000001 9 2 1 19 writereg192 Writes the supplied 32 bit values to the specified TLB register NOTE This command is applicable only to 64 bit Book E cores like the e5500 variant Syntax writereg192 regName valuel value2 value3 value4 value5 value Arguments regNa
79. by the CodeWarrior compiler This setting is equivalent to specifying the func_align command line option Relax HW IEEE Controls the use of relaxed IEEE floating point operations This setting is equivalent to specifying the relax_ieee command line option Use Fused Mult Add Sub Generate FSEL Instructions equivalent to specifying the maf on off command line option Controls the use of fused multiply addition instructions This setting is Controls the use of FSEL instructions NOTE Do not turn on this option if the Power Architecture processor of your target platform does not have hardware floating point capabilities that includes fsel This option only has an effect if Relax HW IEEE option or relax_ieee command line option is also specified The default is of This setting is equivalent to specifying the gen_fsel command line option Assume Ordered Compares Controls the assumption of no unordered values in comparisons This setting is equivalent to specifying the ordered fp compares no ordered fp compares command line options Vector Support Specifies supported vector options Default settings are None Turns off vectorization e SPE Enables the SPE vector support This option needs to be enabled when the floating point is set to SPFP or DPFP as both SPFP and DPFP require support from the SPE vector unit If the option is not turned on the compiler generates a warning and automati
80. cache line The pane to the right of the divider line displays the actual contents of each displayed cache line You can modify information in this pane and click Write to apply those changes to the cache on the target board Above the cache line display panes are Refresh and Write and the View As drop down menu Click Refresh to clear the entire contents of the cache re read status information from the target hardware and update the cache lines display panes Click Write to commit cache content changes from this window to the cache memory on the target hardware if the target hardware supports doing so Select Raw Data or Disassembly from the View As drop down menu to change the way the IDE displays the data in the cache line contents pane on the right side of the window You can perform all cache operations from assembly code in your programs For details about assembly code see the core documentation for the target processor You can also perform cache operations by clicking Menu shown as an inverted triangle which opens a pull down menu that contain actions for the Cache view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 208 Freescale Semiconductor Inc EES Chapter 5 Working with Debugger 5 12 4 Using Debugger Shell to View Caches Another way to manipulate the processor s caches is by using the Debugger Shell view To display the Debugger Shell view follow these steps
81. configuration e Debug the shared library 7 4 1 Create an example project First of all you need to create an example Linux project that uses a shared library To create an example Linux project perform the following steps 1 In the Code Warrior IDE use File gt New gt Code Warrior Linux Project Wizard to create a new Linux project with the settings given in the table below NOTE Instead of creating a new Linux project you can import an example Linux project sharedLibrary available in the lt CWInstallDir gt PA CodeWarrior_Examples Linux_Examples folder as areference The example project can be imported as a CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 262 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software CodeWarrior Example Project using the File gt Import menu bar option Table 7 4 Example Project Settings Project name SharedLibraryExample Location lt workspace dir gt SharedLibraryExample Project type Linux application Language C Build configurations e LibExample generates the dynamic library needed by the launch configurations e SharedLib_IM used to demonstrate implicit linking with the library generated by LibExamp1e build configuration Launch configurations SharedLib_IM launches the application that demonstrates implicit linking with a shared library NOTE In the current example only impl
82. create and use a copy of the executable file Using the copy helps avoid file locking issues with the build system If you check this checkbox the IDE can build the executable file in the background during a debugging session Clear this option so that the debugger does not create and use a copy of the executable file 4 1 3 8 OS Awareness Use this page to specify the operating system OS that resides on the target device Debugger options Debug EPPC Exceptions Download PIC Target OS v Boot Parameters Debug Modules System Call Services Other Executables Symbolics 05 Awareness C Enable Command Line Settings cxoo000000 C Enable Initial RAM Disk Settings Open Firmware Device Tree Settings File Path Address 0x00000000 Figure 4 11 Debugger Options OS Awareness page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 119 Using Debug Configurations Dialog Box The table below lists the options available on the OS Awareness page Table 4 12 OS Awareness Page Options IN ee AA IA Target OS Use the Target OS list box to specify the OS that runs on the target device or specify None to have the debugger use the bareboard Boot Parameters tab Enable Command Line Settings Check this option to specify settings for regular initiali
83. data access This instruction is called the watchpoint hit instruction Unfortunately when an e300 core hits a watchpoint the debugger cannot determine the circumstances under which the target stopped because these cores do not update the necessary status registers As a result it is impossible to resume run or step the target after a watchpoint has been hit because the debugger cannot temporarily disable the watchpoint generated by the hit instruction As a CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 442 Freescale Semiconductor Inc Sy Chapter 13 Debugger Limitations and Workarounds result for an e300 core you must manually disable a watchpoint before you can resume execution from the watchpoint hit instruction e 64 bit alignment The e300 core implements two data address registers The CodeWarrior debugger uses both registers to place a single watchpoint on a variable or memory range Any watchpoint set on a variable or memory address is equivalent to a watchpoint set on an aligned address and a range of 64 bit multiple This limitation stems from the e300 cores data breakpoints implementation Working with hardware breakpoints The e300 core implements two address instruction breakpoints hardware breakpoints that can be used in a debug session Working with memory mapped registers e300 cores have an internal memory mapped registers base address register IMMRBAR
84. debug a ezs file Click Next 00 Tp The Import a CodeWarrior Executable page appears In the Project name text box specify a name for the imported project Click Next 7a The Import C C Assembler Executable Files page appears i Click Browse next to the Executable option The Select file page appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 356 Freescale Semiconductor Inc LES a Chapter 7 Debugging Embedded Linux Software j Select the nv e1 file obtained from the output folder of the package k Click Open 1 The Select file dialog box closes The path to the executable file appears in the Executable text box m Click Next The Processors page appears n Select the processor family toolchain and target operating system for the executable file o Click Next The Debug Target Settings page appears p Specify the debugger connection type board launch configuration and connection options for the executable file q Click Next The Configurations page appears r Select the core index for the executable file s Click Finish The Import a Code Warrior Executable window closes The project for the imported elf file appears in the CodeWarrior Projects view You can now open the Debug Configurations dialog box by selecting Run gt Debug Configurations The Debug Configurations dialog box shows the current settings for the lau
85. debugging session 2 From the Code Warrior IDE menu bar select Window gt Show View gt Other The Show View dialog box appears Expand the Debug group Select Cache Click OK UU CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 205 Viewing Cache Variables o Breakpoints J Cache L1 Data Cache 23 gt tts Registers E Modules Set 63 40 39 38 The Cache view appears as shown in the figure below Way Address 0 0 0 0 0x00003DFFCO 0x000010CA00 0x000010C9C0 0x000010C980 Tip You can use the type filter text box as a shortcut to specify the Cache view Start typing cache into the text box The Show View dialog box shortens the list of views to those whose names match the characters you type The list continues to shorten as you type each additional character When the list shows just the Cache view select it and click OK to open that view You can click Clear E to empty the text box and restore the full list of views Siy er Rawdata 7 7 amp Ye Os 0 G e Dirty Lock Valid Share LRU Castout z Word0 00 03 Word1 0x4 0x7 Word2 08 0xB Word3 0xC No No Yes Yes 11 Yes DEADBEEF DEADBEEF 003DFFE0 DEADBEEF Yes No Yes No 11 Yes 00000000 00000000 00000000 00000000 Yes No Yes No 11 Yes 00000000 00000000 00000000 00000000 Yes No Yes No 11 Yes 00114998 0010C998 0010C9D
86. debugging session the consistent debug control feature enables the debugger to report core s Doze and Nap low power management states In addition the debugger at the same time grants you access to the system states such as core registers TLB registers caches and so on When you attempt to resume the debugging session the debugger displays a warning message and puts the respective core in the same power management state Doze or Nap whichever is the previous one The debugger waits for the core to exit out of Doze or Nap state to continue with the attempted operation 5 3 Connection types This section describes the different connection types provided by CodeWarrior debugger for connecting the target board to a computer The connection types supported by CodeWarrior debugger are e CCSSIM2 ISS e Ethernet TAP e Gigabit TAP Trace e Gigabit TAP e Simics e TCF e USB TAP e CodeWarrior TAP 5 3 1 CCSSIM2 ISS Select this connection type to connect to simulators based on the CCSSIM2 ISS interface To configure the settings of the CCSSIM2 ISS connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 133 Connection types The
87. dialog box and update the selected file or directory Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 89 Build Properties for Power Architecture Table 3 33 Tool Settings Libraries Toolbar Buttons continued es Y in Move up Click to re order the selected file or search path one position higher in the list Move down Click to re order the selected file or search path one position lower in the list gt gyi 3 3 2 2 3 Miscellaneous Use the Miscellaneous panel to specify linker behavior The following table lists and describes the various options available on the Miscellaneous panel Table 3 34 Tool Settings MiscellaneousOptions Explanation Linker flags Specify flags to be passed to the linker Other options Enter additional linker command line options The IDE passes these options to the linker shell during the link phase NOTE The IDE passes command line options to the shell exactly as you enter them in this text box Other objects Add other objects or libraries that needs to be passed tothe linker These objects or libraries will be linked at the end 3 3 2 2 4 Shared Library Settings Use the Shared Library Settings panel to specify the path to the shared libraries You can specify multiple additional shared libraries and library
88. displaying a list of breakpoints 2 Right click on the hardware breakpoint you wish to remove and select Remove from the menu that appears The selected breakpoint is removed and it disappears from the both the marker bar and the list in the view 5 8 4 2 Remove Hardware Breakpoints using Debugger Shell To remove a hardware breakpoint using the Debugger Shell view follow these steps 1 Open the debugger shell 2 Begin the command line with the text bp hw 3 Complete the command line by specifying the function address or file at which you want to remove the hardware breakpoint For example to remove a breakpoint at line 6 in your program type bp hw 6 off CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 168 Freescale Semiconductor Inc a NN ns Chapter 5 Working with Debugger 4 Press the Enter key The debugger shell executes the command and removes the hardware breakpoint 5 9 Working with Watchpoints A watchpoint is another name for a data breakpoint that you can set on an address or a range of addresses in the memory The debugger halts execution each time the watchpoint location is read written or accessed read or written You can set a watchpoint using the Add Watchpoint dialog box To open the Add Watchpoint dialog box use one of the following views e Breakpoints view e Memory view e Variables view The deb
89. elements 0x 10 E Verify memory writes Import Export Fill Memory Action Figure 11 8 Import Export Memory Action editor 11 4 2 Importing data into memory You can import the encoded data from a user specified file decode it and copy it into a user specified memory range Select the Import memory option from the Import Export Fill Memory Action editor to import data into memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 429 Import Export Fill memory Fit Test Import 2 H Import Export Fill Memory Action Action type _ Select the type of action you want to perform Import memory Export memory Fill memory Memory Access Provide memory location or memory space and address Address Expression Access Size Memory space and address Ox 0 1 unit r 2 units O Expression main 4 units v Input Output Provide source or destination for the operation File Selection Select file File Type Annotated Hex Workspace System Variables FF Number of elements 0x 10 Verify memory writes Import Export Fill Memory Action Figure 11 9 Import Export Memory Action editor Importing data into memory The following table explains the import memory options Table 11 4 Controls used for importing data into memory Memory space and address Enter the literal
90. equivalent to specifying the pragma fp constants merge pragma Other Flags Specify linker flags CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 68 Freescale Semiconductor Inc a Chapter 3 Build Properties 3 3 1 4 4 Output Use the Output panel to specify the configuration of your final output file The table below lists and describes the various options available on the Output panel Table 3 11 CodeWarrior Build Tool Settings Output Options Output Type Specifies the generated output type The default options are e Application e Static Library e Partial Link This setting is equivalent to specifying the application library partial command line options Optimize Partial Link Specifies the use of a linker command file create tables for C static constructors C static destructors and C exceptions This option also configures the linker to build an executable image even if some symbols cannot be resolved NOTE Select Partial Link from the Output Type list box to enable this option This setting is equivalent to specifying the opt partial command line option Deadstrip Unused Symbols Removes unreferenced objects on a partially linked image NOTE Select Partial Link from the Output Type list box to enable this option This setting is equivalent to specifying the strip partial command line option Require Resolved Symbols Fini
91. equivalent to specifying the static command line option 3 3 2 2 2 Libraries Use the Libraries panel to specify the libraries and their search paths if the libraries are available in non standard location You can specify multiple additional libraries and library search paths The following table lists and describes the various options available on the Libraries panel Table 3 32 Tool Settings Libraries Options Explanation Libraries Lists the libraries that are to be passed to the linker while building the project The Linker uses the libraries in the same order as shown in this list The table that follows lists and describes the toolbar buttons that help work with the library file Library search path Use this panel to specify multiple paths that the Power Architecture linker searches for libraries The linker searches the paths in the order shown in this list The table that follows lists and describes the toolbar buttons that help work with the library search paths The table below lists and describes the toolbar buttons that help work with the libraries Table 3 33 Tool Settings Libraries Toolbar Buttons e Add Click to open the Add file path or the Add directory path dialog box and add a file or directory path ra Delete Click to delete the selected file or directory To confirm deletion click Yesin the Confirm Delete dialog box g Edit Click to open the Edit file name or Edit directory path
92. for lt Target gt dialog box Click OK to close the Properties for lt connection gt dialog box Click Debug The instruction pointer is now on the cpu_init_ function call NOTE For e500v2 cores 36 bit u boot debug only a reset using s BoardName uboot 36 stage2 tcl is needed If you used a different PIC value in the Debugger Shell view issue the following command to reset PIC load address to the location specified in u boot el setpicloadaddr reset CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 307 22 O Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 12 From the Debug view toolbar select the Instruction Stepping Mode 1 command 13 From the Debug view toolbar select the Step Into command to step into cpu_init_f You can set breakpoints and use the Step Over Step Into and Step Out commands from line 396 in start s bl cpu init to line 980 in start s blr NEVER RETURNS NOTE To access breakpoints set on a previous debug session after changing the PIC address you will need to disable and enable back those breakpoints after the PIC value was changed 7 6 4 4 4 Debugging U Boot in RAM This section tells how to debug U Boot in RAM using a NAND flash device To debug U Boot in RAM 1 In the Debugger Shell view issue the following command to reset PIC load address t
93. format This is the default choice e UNIX Use a UNIX style end of line format NOTE Select Generate S Record File to enable this option This setting is equivalent to specifying the sreceol keyword command line option Generate Warning Messages Turns on most warning messages issued by the build tools This setting is equivalent to specifying the w on command line option Heap Address Sets the run time address of the heap The specified address must be in decimal or hexadecimal format Hexadecimal values must begin with 0x The default is stack_address heap_size stack_size where stack_address is the address of the stack heap_size is the size of the heap and stack _size is the size of the stack This setting is equivalent to specifying the heapaddr address command line option Stack Address Sets the run time address of the stack The specified address must be in decimal or hexadecimal format Hexadecimal values must begin with ox This setting is equivalent to specifying the stackaddr address command line option Generate ROM Image Enables generation of a program image that may be stored in and started from ROM ROM Image Address Generates a ROM image and specifies the image s starting address at run time NOTE Select Generate ROM Image to enable this option This setting is equivalent to specifying the romaddr address command line option RAM Buffer Address of ROM Image Specifies a ru
94. freescale com linux Download the BSP image file for your target board NOTE You will need to log in or register to download the BSP image file The downloaded image file has an iso extension For example QorIQ DPAA SDK lt yyyymmdd gt yocto iso Mount the image file to the CDROM as root or using sudo lt sudo gt mount o loop QorIQ DPAA SDK lt yyyymmdd gt yocto iso mnt cdrom CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 273 ee AA K K KKK Preparing U Boot for debugging NOTE sudo 18 a Linux utility that allows users to run applications as root You need to be setup to run sudo commands by your system administrator to mount and install the BSPs 4 Execute the BSP install file to install the build tool files to a directory of your choice where you have privileges to write files mnt cdrom install NOTE The BSP must be installed as a non root user otherwise the install will exit 5 Answer the questions from the installation program until the file copy process begins You will be prompted to input the required build tool install path Ensure you have the correct permissions for the install path 6 Upon successful installation you will be prompted to install the ISO for the core s you want to build For example if you want to build the SDK for P4080 that is a e500mc core then you have to install the
95. in the small data section This setting is equivalent to specifying the sdata threshold size command line option The size value specifies the maximum size in bytes of all objects in the small data section sdata The default value for size is 8 The linker places objects that are greater than this size in the data section data instead Small Data2 Limits the size of the largest objects in the small constant data section This setting is equivalent to specifying the sdata2 threshold size command line option The size value specifies the maximum size in bytes of all objects in the small constant data section sdata2 The default value for size is 8 The linker places constant objects that are greater than this size in the constant data section rodata instead 3 3 1 2 Debugging Use the Debugging panel to specify the global debugging options for the project CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 64 Freescale Semiconductor Inc Chapter 3 Build Properties The table below lists and describes the various options available on the Debugging panel Table 3 4 CodeWarrior Build Tool Settings Debugging Options Generate DWARF Information Generates DWARF 2 x conforming debugging information This setting is equivalent to specifying the sym dwarf 2 command line option Store Full Paths To Source Files Stores absolute paths of the source files i
96. information as needed then click the OK button to update the entry in the File list Remove Click to remove the entry currently selected in the File list 4 1 3 7 Symbolics Use this page to specify whether the IDE keeps symbolics in memory Symbolics represent an application s debugging and symbolic information Keeping symbolics in memory known as caching symbolics is beneficial when you debug a large size application Consider a situation in which the debugger loads symbolics for a large application but does not download content to a hardware device and the project uses custom makefiles with several build steps to generate this application In such a situation caching CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 117 AT E E Using Debug Configurations Dialog Box symbolics helps speed up the debugging process The debugger uses the readily available cached symbolics during subsequent debugging sessions Otherwise the debugger spends significant time creating an in memory representation of symbolics during subsequent debugging sessions NOTE Caching symbolics provides the most benefit for large applications where doing so speeds up application launch time If you debug a small application caching symbolics does not significantly improve the launch times Debugger options Debug EPPC Exceptions Download PIC System Call
97. into that address space and a new instance is created NOTE You can also pick up sample Linux applications from the following folder lt CWInstallDir gt PA CodeWarrior _ExampleslLinux Examples For Code Warrior debugging purposes when applications call the fork system call the debugger instead calls the c1one system call with the flag cnowz_prrace This causes CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 252 Freescale Semiconductor Inc SSS ee ee ee ee Chapter 7 Debugging Embedded Linux Software e The operating system to attach CodeWarrior TRK to the child process e The child process to stop with a srerrar on return from the clone system call To make this happen you must add a static library to your CodeWarrior project The source code for building the static library is described later in this section Before you start following the steps given in this section ensure that you have e Installed the BSP on Linux e Created a TCP IP connection between the host computer and the remote target e Launched CodeWarrior TRK on the target system These steps demonstrate how to use the CodeWarrior IDE to debug programs that contain fork and exec system calls 1 Create a CodeWarrior project with the settings listed in the table below Table 7 2 Static Library Project Settings Project name Fork Location lt workspace dir gt Fork Project type
98. is the default option e One Generates a single binary file with all the loadable code and data even if S record generation is off e Multiple Generates separate binary files for each MEMORY directive even if S record generation is off Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 69 al Build Properties for Power Architecture Table 3 11 CodeWarrior Build Tool Settings Output Options continued Explanation This setting is equivalent to specifying the genbinary keyword command line option Generate S Record File Generates an S record file This setting is equivalent to specifying the srec command line option Sort S Record Sorts the records in ascending order in an S record file NOTE Select Generate S Record File to enable this option This setting is equivalent to specifying the sortsrec command line option Max S Record Length Specifies the length of S records You can select a value from 8 to 255 The default is 26 NOTE Select Generate S Record File to enable this option This setting is equivalent to specifying the sreclength command line option EOL Character Specifies the end of line style to use in an S record file The default options are e Mac Use Mac OS style end of line format e DOS Use Microsoft Windows style end of line
99. issue warning messages for local variables that are not referred to ina function This setting is equivalent to specifying the warn_unusedvar pragma and the warnings unusedvar command line option Missing return Statement Select to issue warning messages if a function that is defined to return a value has no return statement This setting is equivalent to specifying the warn_missingreturn pragma and the warnings missingreturn command line option Expression Has No Side Effect Select to issue warning messages if a statement does not change the program s state This setting is equivalent to specifying the warn_no side effect pragma and the warnings unusedexpr command line option Extra Commas Select to issue a warning messages if a list in an enumeration terminates with a comma The compiler ignores terminating commas in enumerations when compiling source code that conforms to the ISO IEC 9899 1999 C99 standard This setting is equivalent to specifying the warn_extracomma pragma and the warnings extracomma command line option Empty Declarations Select to issue warning messages if a declaration has no variable name This setting is equivalent to specifying the warn_emptydecl pragma and the warnings emptydecl command line option Inconsistent class struct Usage Select to issue warning messages if the class and struct keywords are used interchangeably in the definition and declaration of the same identi
100. it as small as possible Ox6C 0x7F Reserved 0x80 0x83 Config Address 1 0x84 0x87 Config Data 1 0x88 0x8B Config Address 2 0x8C 0x8F Config Data 2 0x80 8 N 1 Config Address N 0x80 8 N 1 4 Config Data N Final Config Data N optional User s Code Your U Boot code 7 6 1 1 Writing configuration words in U Boot code You can use the boot format tool to write the configuration words to the beginning of the U Boot code The boot format tool is used only for SPI and SD flash devices To use the boot format tool 1 Access the BSP folder to access the boot format tool NOTE See the BSP documentation to read more about the boot format tool 2 Issue the following commands cd boot_format make al1 3 Issue the following command for the SPI flash device CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 283 AAA A Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices boot_format config _XXX_ddr dat u boot bin spi spi boot bin where config_xxx_ddr dat is the appropriate DDR init file for your board 4 For the SD flash device you need to format your SD device to vfat sbin mkfs vfat dev sdcl boot_format config _ddr3_xxx dat u boot bin sd dev sdcl where aev sac is the SD flash device 7 6 2 Creating a CodeWarrior Project to Debug U Boot This section p
101. next to the Connection drop down list box The Properties for lt connection gt window appears j In the Memory tab select the created memory configuration file at the processor level NOTE By default the memory configuration files P4080 HV EntryPoint mem and P4080 HV mem needed for debugging the hypervisor included in P4080 2 1 software bundle are provided with the CodeWarrior layout in the PA PA Support Initialization_Files Memory folder If you use a different hypervisor or use a hypervisor with different MMU entries you need to follow the steps above You are now ready to debug the hypervisor at different stages 7 10 1 Debugging Hypervisor During the Boot and Initialization Process This section discusses the various debug scenarios while debugging hypervisor from the boot This section explains e Debugging Hypervisor from the Entry Point e Debugging Hypervisor from Relocation Till Release of Secondary Cores e Debugging Hypervisor after Release of Secondary Cores e Debugging the Hypervisor Partitions Initialization Process e Debugging the Hypervisor Partitions Image Loading Process e Debugging All Cores when Starting the Guest Applications e Debugging the Hypervisor Partition Manager 7 10 1 1 Debugging Hypervisor from the Entry Point CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 359 LEL Debugging the P4080 Embedded
102. of times a test will be executed e Use Target CPU set the Address to which the test driver algorithm is to be downloaded 4 Save the settings 5 Press Execute to execute the action 11 4 Import Export Fill memory The Import Export Fill Memory utility lets you export memory contents to a file and import data from a file into memory The utility also supports filling memory with a user provided data pattern 11 4 1 Creating task for import export fill memory You can use the Import Export Fill Memory utility to perform various tasks on memory The utility can be accessed from the Target Tasks view To open the Target Tasks view 1 Choose Window gt Show View gt Other from the IDE menu bar The Show View dialog appears 2 Expand the Debug group 3 Select Target Tasks CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 427 Import Export Fill memory 4 Click OK The first time it opens the Target Tasks view contains no tasks You must create a task to use the Import Export Fill Memory utility To create a task 1 Click the Create a new Target Task button on the toolbar of the Target Tasks view Alternatively right click the left hand list of tasks and choose New Task from the shortcut menu that appears The Create a New Target Task page appears Create New Target Task Create a new target task Task Name Impor
103. on any variable or memory range The variable or memory range is 1 byte aligned Working with hardware breakpoints The e500mc and e5500 cores implement two address instruction breakpoints hardware breakpoints that can be used in a debug session Cross triggering Cross triggering Halt groups functionality is only available when debugging e500mc and e5500 processors through a JTAG connection Individual Hardware Breakpoints and Watchpoints halt contexts are not working on current e500mc and e5500 processors The workaround is to enable all halt contexts for a group SW BP HW BP WP thus defining a general debug stop halt group CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 446 Freescale Semiconductor Inc Ty Chapter 13 Debugger Limitations and Workarounds The number of multicore groups that can be defined depends on the actual configuration of the halt contexts defined for each group Each defined group consumes internal EPU resources There is not a simple formula to estimate in advance the number of available groups The groups will be configured in the same order as they are defined In case of running out of resources an error will be shown The cross triggering functionality is edge based rather then state based which means that only transitions from running to stopped state will be considered as triggers This has the downside that if any core from the g
104. on the selected sector NOTE Press the Control or Shift key for selecting multiple sectors from the Sectors table Click the Add Unprotect Action button to add an unprotect action on the selected sector Select the All Device checkbox to add action on full device Click Done The Add Protect Unprotect Action dialog closes and the added protect or unprotect actions appear in the Flash Programmer Actions table in the Flash Programmer Task editor window 1 2 3 7 Secure Unsecure actions The secure unsecure actions help you change the security of a flash device NOTE The Secure Unsecure flash actions are not supported for StarCore devices To add a secure unsecure action L Choose the Secure Unsecure Action from the Add Action pop up menu The Add Secure UnSecure Action dialog appears Select a device from the Flash Devices table Click the Add Secure Action button to add Secure action on the selected flash device a Enter password in the Password textbox b Choose the password format from the Format pop up menu Click the Add Unsecure Action button to add an unprotect action on the selected sector Click Done CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 413 Flash programmer The Add Secure UnSecure Action dialog closes and the added secure or unsecure action appears in the Flash Programmer Actions
105. or more of the following reasons e TRST stuck low This would hold the target JTAG logic in reset preventing any shifts to occur e TMS disconnected or stuck This would prevent the target from making any JTAG state changes e TCK disconnected or stuck This would prevent any state changes or clocking of data CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 153 See el Editing remote system configuration e TDI disconnected or stuck This would prevent the test pattern data from getting into the target e TDO disconnected or stuck This would prevent the test pattern data from getting out of the target If the test fails then it is possible that there is a physical connection problem with the JTAG pins or the JTAG frequency is too high 5 4 4 Arbitrary TAP state move test The arbitrary TAP state move test tries to exercise the TMS pin more rigorously than the other tests Usually there is a little bit of TMS activity at the beginning and end of every test but this test keeps it toggling frequently during the entire test If other tests are passing and this test is failing then it might be due to a signal integrity problem on the TMS pin Errors may occur at the first TAP state move operation Error performing first TAP state move or at the second TAP state move operation Error performing second TAP state move or the IR scan operation m
106. order 0x01 0x03 0x07 Ox0F 0x1F Ox3F Ox7F OxFF e Ones Retention This subtest immediately follows the Walking Ones subtest The Walking Ones subtest should leave each memory location with all bits set to 1 The Ones Retention subtest verifies that each location has all bits set to 1 e Walking Zeros This subtest first initializes memory to all ones Then the subtest writes reads and verifies bits with each bit successively set from the LSB to the CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 423 el Hardware diagnostics MSB The subtest configures bits such that by the time it sets the MSB all bits are set to a value of 0 This pattern repeats for each location within the memory range that you specify For example the values for a byte based Walking Zeros subtest occur in this order OxFE OxFC 0xF8 OxXFO OxEO OxC0O 0x80 0x00 e Zeros Retention This subtest immediately follows the Walking Zeros subtest The Walking Zeros subtest should leave each memory location with all bits set to 0 The Zeros Retention subtest verifies that each location has all bits set to 0 11 3 2 4 2 Address This test detects memory aliasing Memory aliasing exists when a physical memory block repeats one or more times in a logical memory space Without knowing about this condition you might conclude that there is much more physical memory than what act
107. pane items Walking 1 s Select the checkbox to have the hardware diagnostic tools perform the Walking Ones test Deselect to have the diagnostic tools skip the Walking Ones test Address Select to have the hardware diagnostic tools perform the Address test Deselect to have the diagnostic tools skip the Address test Bus Noise Select to have the hardware diagnostic tools perform the Bus noise test Deselect to have the diagnostic tools skip the Bus noise test Test Area Size Specify the size of memory to be tested This setting along with Target Address defines the memory range being tested Number of Passes Enter the number of times that you want to repeat the specified tests Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 422 Freescale Semiconductor Inc EEE ee a Chapter 11 Working with Hardware Tools Table 11 3 Memory Tests pane items continued Use Target CPU Select to have the hardware diagnostic tools download the test code to the hardware device Deselect to have the hardware diagnostic tools execute the test code through the remote connection interface Execution performance improves greatly if you execute the test code on the hardware CPU but requires that the hardware has enough stability and robustness to execute the test code NOTE The option is not applicable for CodeWarrior StarCore devices
108. private resources of another The P4080 PAMU an iommu is used by Topaz to ensure device to memory accesses are constrained to allowed memory regions only Sharing Mechanisms are provided to selectively enable partitions to share certain hardware resources such as memory Virtualization Support for mechanisms that enable the sharing of certain devices among partitions such as the system interrupt controller Performance The hypervisor software uses the features of the Freescale Embedded Hypervisor APU to provide security and isolation with very low overhead Guest operating systems take external interrupts directly without hypervisor involvement providing very low interrupt latency Ease of migration The hypervisor uses a combination full emulation and para virtualization to maintain high performance and requiring minimal guest OS changes when migrating code from an e500mc CPU to the hypervisor 7 9 2 Prerequisites for Debugging a Guest Application The P4080 software bundle is the prerequisite for debugging a hypervisor guest application using the CodeWarrior IDE The software bundle used in the current example is P4080 Beta 2 0 2 SW Bundle 7 9 3 Adding CodeWarrior HyperTRK Debug Stub Support in Hypervisor for Linux Kernel Debugging This section explains how to add CodeWarrior HyperTRK debug stub support in the hypervisor for guest LWE or Linux kernel debugging To add CodeWarrior HyperTRK debug stub support CodeWarrior Develo
109. processes and threads This section explains how to view all processes and threads on a target When you debug an application the Code Warrior debugger opens the Debug view In this view you can see only processes and threads tasks on which debugger is attached as shown in the figure below 5 Debug 23 D gt gt 22 RAZA os EPPC Linux Applications SharedLib_IM elf PID 1000 Suspended A E 2 Thread ID 0 Suspended 6 add_example_local D Profiles b 14446 Uboot SharedLibrary Source LibExample c 28 OxOffdf 5 add_example D Profiles b 14446 Uboot SharedLibrary Source LibExample c 20 Ox0ffdf4f0 4 mainQ D Profiles b 14446 Uboot SharedLibrary Source SharedLib_IM c 30 0x 10001514 3 OxOFESE1C4 0x0FE3E1C4 0 OxOfeBe1c4 l 2 OxOFE8E348 OxO0FE8E348 Q Ox0fe8e348 10x00000000 0x00000000 0x00000000 Liq Pe D Profiles b 14446 Uboot SharedLibrary SharedLib_IM SharedLib_IM elf 8 6 08 10 48 AM vw lt il gt Figure 7 8 Debug view processes and threads For Linux debugging you can view all processes on a target in the System Browser view To view processes and threads in System Browser view 1 Open a Linux application in the CodeWarrior IDE 2 Select Run gt Debug The Debug perspective appears 3 While the application is running select Window gt Show View gt Other The Show View dialog box appears 4 From the Debug group select System Browser Click OK Nn The Sys
110. references This setting is equivalent to specifying the model keyword command line option ABI Chooses which ABI Application Binary Interface to conform to This setting is equivalent to specifying the abi keyword command line option Tune Relocations Ensures that references made by the linker conform to the PowerPC EABI Embedded Application Binary Interface or position independent ABI Application Binary Interface Use this option only when you select EABI or SDA PIC PID from the ABI drop down list to ensure that references in the executable image conform to these ABls To conform to both of these ABls the linker will modify relocations that do not reach the desired executable code The linker first converts near branch instructions to far branch instructions Then it will convert absolute branches to PC relative branches For branches that cannot be converted to far or PC relative addressing the linker will generate branch islands To conform to the SDA PIC PID ABI the linker will generate the appropriate style of addressing This setting is equivalent to specifying the tune_relocations command line option Compress for PowerPC VLE Zen Specifies compression of the VLE Variable Length Encoding code by shortening the gaps between the functions NOTE For Power Architecture processors that do not have the VLE capability this option is disabled and cannot be selected Small Data Limits the size of the largest objects
111. register Syntax ANDmmr regName mask Arguments regName The name of the memory mapped register upon which to perform a bit AND mask 32 bit mask to use in the bit AND operation Example This command bit ANDs the contents of the acre register with the value oxo0002000 ANDmmr ACFG 0x0000200 9 2 1 4 IncorMMR Performs a bitwise OR using the contents of the specified memory mapped register MMR and the supplied 32 bit mask and writes the result back to the specified register Syntax incorMMR regName mask Arguments regName CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 384 Freescale Semiconductor Inc Chapter 9 Target Initialization Files The name of the MMR register upon which to perform a bit OR mask 32 bit mask to use in the bit inclusive OR operation Example This command bit ORs the contents of the acre register with the value oxo0002000 incorMMR ACFG 0x00002000 9 2 1 5 ORmem l Performs a bit OR using the 32 bit value at the specified memory address and the supplied 32 bit mask and writes the result back to the specified address No read write verify is performed Syntax ORmem 1 address mask Arguments address The address of the 32 bit value upon which to perform the bit OR operation This address may be specified in hexadecimal for example oxascnoooo octal for example 025363200000 or decimal for example 28823
112. reliably after issuing the reset This can happen for specific boards and in scenarios where the PBL is used to perform boot image manipulation for example copying U Boot from SPI flash to internal cache SRAM during reset that does not complete within the default reset timeout window A good start value to test out board specific requirements in such cases is 1000 ms however this value may need to be increased for very large PBL transfers NOTE Reset delay is supported for processors based on the e500mc e5500 and e6500 cores 5 3 4 Gigabit TAP Select this connection type when Gigabit TAP is used as interface to communicate with the hardware device To configure the settings of a Gigabit TAP connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 140 Freescale Semiconductor Inc Chapter 5 Working with Debugger 3 Select the Gigabit TAP from the Connection type drop down list The Connection and Advanced tabs display options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table
113. run by the debugger with the erroneous key the associated part will be locked until a rest occurs and you will need to reset the target to connect again For the P1010 processor if you have one failed attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next attempt Reset Delay ms Specifies the time in milliseconds that CodeWarrior takes to gain control of the target after issuing a reset The default value for this option is 200 ms The delay needs to be increased if the debugger connection does not work reliably after issuing the reset This can happen for specific boards and in scenarios where the PBL is used to perform boot image manipulation for example copying U Boot from SPI flash to internal cache SRAM during reset that does not complete within the default reset timeout window A good start value to test out board specific requirements in such cases is 1000 ms however this value may need to be increased for very large PBL transfers NOTE Reset delay is supported for processors based on the e500mc e5500 and e6500 cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 148 Freescale Semiconductor Inc EES Chapter 5 Working with Debugger 5 3 8 CodeWarrior TAP Select this connection type when either the CodeW
114. select the memory configuration file from the following path lt CWInstallDir gt PA PA Support Initialization_Files Memory Click Finish From the Connection type drop down list select the type of connection you plan to use CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 277 Preparing U Boot for debugging The Connection tab appears along with the other tabs on the page r On the Connection tab specify the IP address of the TAP s Click Finish t From the System panel select all the cores on which U Boot is running Click the Debugger tab On the PIC page select the Alternate Load Address checkbox In the text box that comes up enter the oxrrr40000 address Click the Source tab and verify the source mapping configuration Click Apply to save the settings made to the various tabs Click Debug The Debug perspective appears with the core 0 stopped at the reset vector shown in the figure below OnNN NB Y NOTE You will need to press Reset in the Debug view Select the Core reset checkboxes for all cores except core 0 You will then see core O stopped at the reset vector F Debug 23 Oo amp D gt dI 2 e w of mY E Debug u boot CodeWarrior Attach E ge EPPC u boot core 0 Suspended E o Thread ID 0x0 Suspended Signal Halt received Description User halted tH 1 AsmSection home oc
115. set a breakpoint at the code s exit point For multicore projects when you set this option for one project on one core it is set for projects on the other cores Clear this option to prevent the debugger from setting a breakpoint at the code s exit point Install regular breakpoints as Check this option to install breakpoints as either e Regular e Hardware e Software Clear this option to install breakpoints as Regular breakpoints Restore watchpoints Check this option to restore previous watchpoints Disable display of variable values by default Check this option to disable the display of variable values Clear this option to enable the display of variable values Disable display of register values by default Check this option to disable the display of register values Clear this option to enable the display of register values Refresh while running period seconds Specifies the refresh period used when a view is configured to refresh while the application is running By default the refresh period is set to two seconds 4 1 3 2 EPPC Exceptions The EPPC Exceptions target settings panel lists each of the EPPC exceptions that the CodeWarrior debugger can catch Use this page to specify which processor exceptions you want the debugger to catch CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 109 Using Debug Configuration
116. sets of launch configurations referencing the two different systems For example the BSC9131 target type debug configuration is used when the processor board is configured for both the PA and the SC cores in chained mode Dual TAP mode on Power Architecture JTAG port and BSC9131PA target type debug configuration is used when the processor board is configured only for the PA core on the Power Architecture JTAG port Single TAP modes Preventing debug halt requests caused by cross triggering cores For BSC9132 processors the Halted to Halt Request Mask register GUTS_HALTED_TO_HALT_REQ MASK_REG is modified by the debugger unconditionally on any connection to the target and after any Reset action to prevent debug halt requests caused by cross triggering cores Changing the register value set by the debugger can cause the debugger behave unexpectedly 13 7 Generic processors This section talks about the limitations and workarounds of the CodeWarrior debugger for generic Power Architecture processors Working with uninitialized stack CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 450 Freescale Semiconductor Inc bB5WW Chapter 13 Debugger Limitations and Workarounds Debugging while the stack is not initialized can cause uninitialized memory accesses errors This situation occurs when the debugger tries to construct the stack trace To avoi
117. socket NOTE You can also use the redirect command in debugger shell to redirect standard output streams to a socket Act as Server Select to redirect the output from the current process to a local server socket bound to the specified port Hostname IP Address Select to redirect the output from the current process to a server socket located on the specified host and bound to the specified port The debugger will connect and write to this server socket via a client socket created on an ephemeral port Launch in background Select to launch configuration in background mode 4 2 Customizing Debug Configurations When you use the CodeWarrior wizard to create a new project the wizard sets the project s launch configurations to default values You can change the default values of your project s launch configurations according to your program s requirements To modify the launch configurations 1 Start the CodeWarrior IDE 2 From the main menu bar of the IDE select Run gt Debug Configurations The Debug Configurations dialog box appears The left side of this dialog box has a list of debug configurations that apply to the current application 3 Expand the CodeWarrior configuration 4 From the expanded list select the debug configuration that you want to modify The follwoing figure shows the Debug Configurations dialog box with the settings for the debug configuration you selected CodeWarrior Developm
118. susie cncdncatia Sha EEEE R 425 LAA Momor FOS WSS CU eea e a dd 426 1 331 Use Case l Execute host based Scope Loop on targat esriicneeiorenneonaneo nidie 426 113 32 Use Case 2 Execute target based Memory Tests on argelino cies 426 LLA Tipon e non BA GEMI a a E E A EA 427 114 1 Creating task for importexport E Mis iii 427 CLAS Imporine data into Menio y enserrer inoran a a 429 143 Exp ring memory son 431 11d PUE ii 432 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 16 Freescale Semiconductor Inc Section number Title Page Chapter 12 Making a Custom MSL C Library RI lc A ced cee satceig cpg sker saci utah ca a ads Satu beyaten pid ad tgcaaaonesadectuncdiaes 436 t2 Bee agra sss ec aa Scan agai Sasa a 437 122 Modifications ta avoid emos fom GCC LO ala 437 al Ele o A N A 438 12 3 Software floating point emmlation Suppor iii iia 438 124 Puking agusan Mob C ND ii iia 439 Chapter 13 Debugger Limitations and Workarounds BLU Peer RC UN ar asada did 441 182 POW er CU H Pro PEE ld 442 18 POWErQUECE PSU aati aane AEA A EEA E AR A RE 443 BA Gong Gata A A 445 ea ASES PS rei N A di oleate 447 130 Qari Gomer se Processo Biaon area A EAO EA REI E Ai 449 Ea O A an eiaacormtendnaiaeeaueiolat 450 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 17 CodeWarrior Development Studio fo
119. symbolics path if not found Prompts to locate the symbolics file if a mapping for it is not available in the settings A Browse dialog box appears that allows you to browse for a module file containing symbolics The debugger will add the specified symbolics to the modules symbolics mapping Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 344 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software Table 7 9 Kernel Module Project Launch Configuration Modules Tab Settings continued A oe A ne Keep target suspended Keeps the target suspended after the debugger loads the symbolics file for a module This option is useful if you want to debug the module s initialization code It allows you to set breakpoints in the module s initialization code before running it NOTE This option is automatically enabled when activating the Prompt for symbolics path if not found option NOTE Breakpoints are resolved each time a symbolics file is loaded and the debugger uses the modules unload events for symbolics disposal and breakpoints cleanup 7 9 Debugging Hypervisor Guest Applications This section shows you how to debug hypervisor guest applications This section explains e Hypervisor An Introduction e Prerequisites for Debugging a Guest Application e Adding CodeWarrior HyperTRK Debug Stub Support i
120. system configuration shown in the figure below Initialization Memory Advanced Target Memory configuration Memory configuration file P4080 F e500mc 0 e500mc 1 e500mc 2 e500mc 3 e500mc 4 e500mc 5 eS500mc 6 e500mc 7 mmoga Figure 10 1 Specifying a memory configuration file You can also write your own memory configuration files The next section documents the commands that can appear in such files 10 2 Memory configuration commands This section describes for each memory configuration command a brief statement of what the command does the command s syntax a definition of each argument that can be passed to the command and examples showing how to use the command CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 398 Freescale Semiconductor Inc Ey Chapter 10 Memory Configuration Files In general the syntax of memory configuration commands follows these rules e Spaces and tabs white space are ignored e Character case is ignored e Unless otherwise noted values may be specified in hexadecimal octal or decimal e Hexadecimal values are preceded by ox for example oxpzapBzzF e Octal values are preceded by o for example 01234567 e Decimal values start with a non zero numeric character for example 1234 e Addresses are values that might be prefixed with the memory space command line prefix lt Memsp gt lt value gt Fo
121. table in the Flash Programmer Task editor window 11 1 2 3 8 Duplicate action You can duplicate a flash programmer action from the Flash Programmer Actions table 1 Select the action in the Flash Programmer Actions table 2 Click the Duplicate Action button The selected action is copied in the Flash Programmer Action table 11 1 2 3 9 Remove action You can remove a flash programmer action from the Flash Programmer Actions table 1 Select the action in the Flash Programmer Actions table 2 Click the Remove Action button The selected action is removed from the Flash Programmer Action table 11 1 3 Execute flash programmer target task You can execute the flash programmer tasks using the Target Tasks view To execute the configured flash programmer target task select a target task and click the Execute button in the Target Tasks view toolbar Alternatively right click on a target task and choose Execute from the shortcut menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 414 Freescale Semiconductor Inc SSSSIRI A Chapter 11 Working with Hardware Tools Tasks Name Task Type Run Configuration 5 Root lFs1 Flash Programmer TestProject_C_ Figure 11 4 Execute target task NOTE You can use predefined target tasks for supported boards To load a predefined target task right click in the Target Tasks view and choose Im
122. target hardware into an Excel file e Apply multi level filters to isolate data e Apply multi level searches to find specific data e Display results in an intuitive user friendly manner in the trace critical code and performance views e Show or hide columns and also reorder the columns e Copy and paste a cell or a line of the trace alu agu and performance data generated by simulator and target hardware e Control trace collection by using start and stop tracepoints to reduce the amount of unwanted trace events in the trace buffer making the trace data easier to read e View the value of the DPU counters in form of graphs pie charts and bar charts while the application is in debug mode e Display real time cycle count for simulated targets to allow quick monitoring of evolution of application in time For more information see Tracing and Analysis Tools User Guide available in the lt CWInstallDir gt PA Help PDF folder 1 6 CodeWarrior IDE This section explains the CodeWarrior IDE and tells how to perform basic IDE operations While working with the CodeWarrior IDE you will proceed through the development stages familiar to all programmers such as writing code compiling and linking and debugging See CodeWarrior Development Studio Common Features Guide for e Complete information on tasks such as editing compiling and linking e Basic information on debugging The difference between the CodeWarrior development environment and tradi
123. the SPI and SD MMC flash devices To debug U Boot in RAM L In the Debugger Shell issue the following command to reset PIC load address to RAM Space setpicloadaddr 0xxxxx0000 NOTE Oxxxxx0000 is the address printed by U Boot at line Now running in ram You can also see this address in the Disassembly view and observe the current address space you are in CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 301 AER Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 2 From the Debug view toolbar select the Instruction Stepping Mode 1 command 3 From the Debug view toolbar select the Step Into command to step into vir The Disassembly view appears mr r3 r9 Init Data pointer mr r4 ri0 Destination Address bl board init r Copy exception vector r3 dest_addr r7 source address r8 end address r9 target address Figure 7 28 U Boot Debug Running in RAM 4 Deselect the Instruction Stepping Mode command when the instruction pointer is at in_ram You can now do source level debugging and set breakpoints in all RAM area including boara_init_r See Points to remember for more details NOTE Before closing the debug session change back the alternate load address to flash address space by issuing the setpicloadaddr oxFFF40000 command in the Debugger Shell Now you do not need to manually s
124. the TRK debug agent System type f type filter text 2 CodeWarrior Application Debugging 3 CodeWarrior Bareboard Debugging Hardware or Simulator Connection Hardware or Simulator Target TRK Target General fi TcF Figure 7 39 Select Remote System Type Dialog Box b Click Next The TRK Connection window appears c Click Edit next to the Target drop down list The Properties for lt target gt window appears d Click Edit next to the Target type drop down list The Target Types dialog box appears O Click Import and import the used hypervisor at file Click OK to close the Target Types dialog box g Configure the following settings in the Properties for lt target gt window rh CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 351 AAA AAA lt A lt A AAA A KA lt K lt K lt K lt K lt K lt K lt 2 lt 2 lt 2 lt lt 2 A Debugging Hypervisor Guest Applications e In the Initialization tab ensure that Execute target reset checkbox is not selected e In the Memory tab do not add any memory configuration files for the debugged Linux partition cores h Click OK The TRK Connection page reappears i Select Trk Muxer in the Connectiontype drop down list e Select Use existing host muxer process and type the IP address of the Linux host on which the mux_server is running e Alternatively fo
125. the elf file to the debugger for the first session only This shows a speed improvement for vmlinux elf as the size is bigger than around 100 MB Debugger Tab gt Debugger options gt OS Select Linux from the Target OS drop down list Awareness Tab Debugger Tab gt Debugger options gt OS Disable all settings on the Boot Parameters tab Awareness Tab gt Boot Parameters NOTE For details on the options available on the Boot Parameters tab see Setting up RAM disk Debugger Tab gt Debugger options gt OS Debug tab Awareness Tab gt Debug Tab e Select the Enable Memory Translation checkbox Physical Base Address is set to value CONFIG_KERNEL_START 0x0 Virtual Base Address is set to value CONFIG_KERNEL_START 0xc000 0000 for 32 bits and 0xC000 0000 0000 0000 for 64bits e Memory Size is the kernel space translation size NOTE The values shown above should be set as configured in the linux config file config You can read the MMU registers to verify what you have configured and do a correction if required CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 321 Debugging the Linux Kernel Table 7 7 Kernel Project Attach Launch Configuration Settings Debug Window Component e Select Enable Threaded Debugging Support checkbox e Select Enable Delayed Software Breakpoint Support e f required also sele
126. the following languages e C Select to generate ANSI C compliant startup code and initializes global variables e C Select to generate ANSI C startup code and performs global class object initialization Build Tools Architecture Specifies the processor used by the new project The current installation supports the following architectures e 32 bit 32 bit option is available by default for QorlQ_P4 processors e 64 bit 64 bit option is only available for QorlQ_P5 processors NOTE For QorlQ_P4 processors 32 bit option is selected by default and 64 bit is unavailable But if you are using QorlQ_P5 processors both the options are enabled CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 43 AAA AAA CodeWarrior Linux Project Wizard 2 2 4 Linux Application Page Use this page to specify how the debugger communicates with the host Linux system and controls your Linux application NOTE The Linux Application page appears in the Code Warrior Linux Project Wizard only when you add the Linux build tools support by installing the corresponding service pack for the required target For more information on installing service packs see the Service Pack Updater Quickstart available in the lt CWInstallDir gt PA folder Y CodeWarrior Linux Project Wizard Linux Application Linux Application Settings Connection Ty
127. to debug U Boot on the target system To create a CodeWarrior project use these steps 1 Launch CodeWarrior IDE 2 Select File gt Import The Import wizard appears 3 Expand the CodeWarrior group and select CodeWarrior Executable Importer 4 Click Next The Import a CodeWarrior Executable file page appears Nn Specify a name for the project to be imported in the Project name text box If you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired location from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location 7 Click Next ON The Import C C Assembler Executable Files page appears 8 Click Browse next to the Executable field CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 275 LE Preparing U Boot for debugging 9 Select the U Boot ELF file obtained after the U Boot compilation NOTE You can see the SDK Manual for instructions about how to generate an U Boot ELF file from the iso ne1p documents pdf location 10 Click Open 11 From the Processor list expand the processor family and select the required processor 12 Select Bareboard Applica
128. tools support Toolchain GCC EABI e500mc Floating Point Hardware v O E a Gees Figure 2 4 Build Settings Page The table below describes the various options available on the Build Settings page Table 2 4 Build Settings Page C om AE AAA ian Language Specifies the programming language used by the new project The current installation supports the following languages e C Select to generate ANSI C compliant startup code and initializes global variables e C Select to generate ANSI C startup code and performs global class object initialization Toolchain Specifies the toolchains supported by the current installation Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform Floating Point Specifies how the compiler handles floating point operations encountered in the source code CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 35 LTD CodeWarrior Bareboard Project Wizard 2 1 5 Configurations Page Use this page to specify the processing model and the processor core that executes the project X CodeWarrior Bareboard Project Wizard o tajm Configurations Choose the configurations you want to create Processing Model SMP AMP One project per core O AMP One buil
129. transfer is performed The Literal address field allows only decimal and hexadecimal values Expression Enter the memory address or expression at which the data transfer starts Access Size Denotes the number of addressable units of memory that the debugger accesses in transferring one data element The default values shown are 1 2 and 4 units When target information is available this list shall be filtered to display the access sizes that are supported by the target Select file Enter the path of the file to write data Click the Workspace button to select a file from the current project workspace Click the System button to select a file from the file system the standard File Open dialog Click the Variables button to select a build variable File Type Defines the format in which encoded data is exported By default the following file types are supported e Signed decimal Text e Unsigned decimal Text e Motorola S Record format e Hex Text e Annotated Hex Text e Raw Binary Number of Elements Enter the total number of elements to be transferred 11 4 4 Fill memory You can fill a user specifie d memory range with a user specified data pattern Select the Fill memory option from the Import Export Fill Memory Action editor window to fill memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 432 Freescale Semicon
130. type drop down list e Select Use existing host muxer process and type the IP address of the Linux host on which the mux_server is running e Alternatively for Linux host only you can select Launch host muxer process for automatically launching the muxer process If you follow this step you need to select the mux_server executable and a TCP IP target muxer with an IP address and a starting port on which you want to launch the For TRK muxer ports click Sequence and type the first port on which the mux server Started The channels and ports on which the debugger accesses the cores appear e The channels must correspond to the trk stub s mux channels added in the hypervisor ats file 3 Click Finish The New Connection wizard disappears and the new remote system that you just created appears in Connection drop down list in the Remote system group 5 Select all the cores that you want to debug from the Linux partition CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 354 Freescale Semiconductor Inc eee ee AAA Chapter 7 Debugging Embedded Linux Software NOTE You can use the new remote system which you just created in other launch configurations also by selecting different cores and making other necessary adjustments 6 Select the Debugger page to configure the debugger specific settings a In the Debugger options group select the OS Awareness tab b Select Linux i
131. types of standalone assemblers e CodeWarrior assembler e GCC assembler The assembler translates assembly language source code to machine language object files or executable programs Either you can provide the assembly language source code to the assembler or the assembler can take the assembly language source code generated by the compiler CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 23 el CodeWarrior Development Studio tools For more information about the CodeWarrior Power Architecture assembler see the Power Architecture Build Tools Reference manual from the lt cwrnstal1pDir gt PA Help PDF folder For more information about the GCC Power Architecture assembler see the as pat manual from the lt CWInstallDir gt Cross_Tools gcc lt version gt lt target gt powerpc lt feabi eabispe aeabi linux libc gt share docs pdf folder 1 5 4 Linker CodeWarrior Eclipse IDE for Power Architecture processors supports two types of linkers e CodeWarrior linker e GCC linker The linker generates binaries that conform to the PowerPC EABI Embedded Application Binary Interface The linker combines object modules created by the compiler and or assembler with modules in static libraries to produce a binary file in executable and linkable ELF format Among many powerful features the linker lets you e Use absolute address
132. use the file from the launch run configuration associated with the task 4 Specify the file name in the File textbox You can use Workspace File System or Variables buttons to select the desired file 5 Choose a file type from the File Type pop up menu You can select any one of the following file types e Auto Detects the file type automatically e Elf Specifies executable in ELF format e Srec Specifies files in Motorola S record format e Binary Specifies binary files Select the Erase sectors before program checkbox to erase sectors before program 7 Optional Select the Verify after program checkbox to verify after the program NOTE The Verify after program checkbox is available only with the processors supporting it ON 8 Select the Restricted To Address in this Range checkbox to specify a memory range The write action is permitted only in the specified address range In the Start textbox specify the start address of the memory range sector and in the End textbox specify the end address of the memory range 9 Select the Apply Address Offset checkbox and set the memory address in the Address textbox Value is added to the start address of the file to be programmed or verified 10 Click the Add Program Action button to add a program action on the flash device 11 Click the Add Verify Action button to add a verify action on the flash device 12 Click Done The Add Program Verify Action dialog closes and the add
133. view 5 10 4 Working with Register Groups This section describes different operations that can be performed on register groups You can perform the following operations on the register groups e Adding a Register Group e Editing a Register Group e Removing a Register Group 5 10 4 1 Adding a Register Group The default display of the Registers view groups related registers into a tree structure You can add a custom group of registers to the default register tree structure To add a new register group perform these steps 1 Right click in the Registers view A context menu appears 2 Select Add Register Group from the context menu The Register Group dialog box appears as shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 180 Freescale Semiconductor Inc Chapter 5 Working with Debugger Register Group Select the group registers Group Name TENE 2 General Purpose Registers 3 General Purpose Registers 4 General Purpose Registers 5 General Purpose Registers 6 General Purpose Registers 7 General Purpose Registers 8 General Purpose Registers 9 General Purpose Registers TETH Pa Figure 5 17 Register Group Dialog Box 3 Enter in the Group Name text box a descriptive name for the new group 4 Select the checkbox next to each register you want to appear in the new group Tip Click Select A
134. 0 x3FFFFFFF 8 0x40000000 0x7FFFFFFF 9 xF40 0000 OxF40FFFFF 10 xF4100000 xF41FFFFF 11 0xF4200000 0xF42FFFFF 12 xF4300000 OxF43FFFFF 13 xF 000000 OxFO3FFFFF v1 0 Real address xOFFFFFOQO OxOFFFFFFFF xOF EQ00000 OxOFEFFFFFF x E000000 OXBEFFFFFFF x 80000000 OxOBFFFFFFF x C 0000000 xOCFFFFFFF x D0000000 xODFFFFFFF x F 800000 xOF 8O3F FFF x000000000 xO3FFFFFFF x040000000 0xO7F FFFFFF x0F 4000000 OxOF40F FFFF xOF4100000 OxOF41FFFFF x F4200000 OxOF42FFFFF x0F4300000 OxOF43FFFFF x F 0000000 OxOFO3FFFFF SIZE WIMGE 4K 01000 16M 01010 256M 01010 16 01010 256M 01010 256M 01010 256K 01010 1G 01000 1G 01000 1M 01000 1M 01010 1M 01000 1M 01010 4M 01010 SRWX URWX TS TID 111 111 111 111 111 111 111 111 111 111 111 111 esca e exe exa exa exa exa exo exa exa exa exa exa exo exa exa TLPID GS VF IPROT exa exa Figure 5 20 Output of Running the displaytlb 1 Command for P2040DS 5 10 5 3 Initializing TLB Registers This section describes how to initialize TLB registers using commands You can use reg writereg128 writereg192 commands in the debugger initialization files to set up TLB registers at target system startup For more details see writereg128 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06
135. 000000 000000000000 Field G 35 35 01111010011110000110 Description L2MMU_TLB6 4S5b00002224c8b7955100007a786000 TLBO array entry lt Figure 5 19 Registers View This window allows you to view register contents in different formats and change portions of the selected register 5 10 5 2 Reading TLB Registers from Debugger Shell This section explains how to read TLB registers from the Debugger Shell view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 Freescale Semiconductor Inc 185 SSS el Working with Registers TLB registers are very complex so to easily understand TLB register information the information should be provided in a format that is easy to read and understand The Debugger Shell command disp1ayt1b extracts the meaningful information about a TLB register set and presents it in an easy to understand format This command outputs only valid entries from the TLB register set The aisp1ayt1 command is very useful when debugging a Linux kernel The syntax of the aisp1ayt19 command is as follows displaytlb TLBSetNumber printInvalid The command arguments are explained below e TLBSetNumber Indicates a number representing the TLB register set that the user wants to print Each value for this argument corresponds to one TLB register set displayed in the Registers view The table below shows all the values taken by the
136. 0011398c li r8 0 90113990 bl dt for es gt secondary_map_mem cpu gt console_ok 1 Figure 7 43 Hypervisor Debug Release of Secondary Cores 7 10 1 3 Debugging Hypervisor after Release of Secondary Cores To debug Hypervisor after the release of secondary cores perform the following 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 On the left panel from the CodeWarrior Attach group select the attach launch configuration you had imported using the nv e1 file 3 On the Main tab in the System panel select all the cores and click Debug The Debug perspective appears 4 When the secondary cores are released set a hardware breakpoint at the start_secondary spin table function in the mp c file 5 Boot the hypervisor The first core will stop at the start_secondary_spin_table function NOTE For debugging the secondary cores set a breakpoint either at the secondary start entry point for secondary cores from libos 1ib head s Or at a function called by secondary cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 364 Freescale Semiconductor Inc 10 Chapter 7 Debugging Embedded Linux Software for example set a breakpoint at the secondary init function in the init c file Find out the address of the secondary_start entry point by using the elf dump file powerpc linux gnu objdum
137. 08 Ses Vime Debugger Shellto vien Lab ud ia ea 208 3 125 Debugger Shell Global Cache Commands cirio AE 209 3128 Debugger Shell Cache Line Committee 210 Dalit Processor ECTS Cache PE ca 211 3134 Chemie Proa Comter Yassin iO 213 A A 213 SUS SM AI i O A E EA E AE AT A E A E E E A ON 214 316 Import a CodeWarrior Pxecutabbe me Mia 214 5 10 1 Importa Code w arrior Executable fle a 213 5 16 2 Import C CH Assembler Executable Files Par da 215 A aba vbeidieasalaplaniucsuabiariaigaacdactl 216 5 164 Linux Application Launch Configurations Para isis 216 2105 Debur Tager Setters Par ai AAA 217 5 166 Condioticalons Par ii A Ren 218 3 17 Debiiseino Externally Built Executable Pl ia 218 J171 Importan Executable Pile aiii AA 219 572 Editie Latish COn ar di A iia 222 SUS Specie e Somos Lookup Pa msn iaa 223 SATA Debe Exerutable Please eaeeaiay 226 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page Chapter 6 Multi Core Debugging 61I Debucsins Multi Core Propet oi ai 227 GLI Seine Launch CRON einen e aia 227 l2 Demmesi s Mille Coti li 231 E Mii Cue Debus ze Commands n R E OA 234 pal Multi Core Commands m ade Wan ME iia E A 234 Ba Molares Commend an sere wer Shell ii 236 Chapter 7 Debugging Embedded Linux Software Pel Debigane a Lina Appere E diia 239 TL mall Code amor TRE o Target SYM nana arani aesan aa anada aani 240 FA S
138. 1010 r0 gt E See mtspr LiCSRi r0 invalidate i cache mtspr LicSRO r0 invalidate d cache Oxfffff008 lt AsmSection 8 gt mtspr spri011 r0 mtspr L1CSR1 r0 invalidate i cache mfspr ri DBSR m spr ri DBSR Oxfffff00c lt AsmSection 12 gt mfspr rsp spr304 mtspr DBSR r1 Clear all valid bits mtspr DBSR r1 Clear all valid bits Oxfffff010 lt AsmSection 16 gt mtspr spr304 rsp Enable L1 Caches early fe v Enable L1 Caches early v lt gt Figure 7 23 U Boot Debug Disassembly View 10 Move the Debug Current Instruction Pointer to _start_e500 11 Deselect the Instruction Stepping Mode 17 command You can now do source level debugging and set breakpoints in start s until the address space switch at the rfi before switch_as start s line 326 See Points to remember for more details 7 6 4 2 2 Debugging U Boot in translated address space This section tells how to debug U Boot in the translated address space in a NOR flash device Once you have reached the ri call the execution will move to the next stage You should now use a memory configuration file for debugging in this section CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 290 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software It is necessary to inspect the TLB registers to check if there are address spaces translated or to search in the CW
139. 129 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page Chapter 5 Working with Debugger ELL IAEA AA bli 132 32 Comitem eme COTO ES 132 33 TOMAN DA Ss 133 Sl CESSISSE e A A satan aaa E N 133 e MEMS TAF sanaan AS oa 135 Shr Dil Lar A A SO 137 A EA E A ERA RN 140 A ER ER E Re eS 143 2 TB rain 144 Se USB DA A AAA A ia 146 S30 Code W amit ERP ari 149 e M E EE n e n A eee rr er mere ee A cree epee tea AE A T E A tere ere cere Teer area tre gy errr 151 SALI I 152 Dee ESO Us 152 3A ERAS BO A n E N R A E A A Mamkesuninaymuad 153 De state more ar aiii asocia 154 S43 Reame JTAG IMLE ODES tesi AAA a S 154 39 Eta remate system conii O da 154 A 155 Ja Memory TAD ics AAA AA ANA AA 156 Sete A e te o O A A 158 20 MERO as ue tddi laa 158 a CodeWwamorComaand Lino Debut 159 0 Won mu Brea pon asa dali iii cba 162 A A AE e A A 163 Shc Seine Hardware Br a EEEE E EE E EA AEE 165 S5821 Using IDE to S t Hardware Bi asa 166 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page 5 8 2 2 Using Debusper Shell to Set Hardware Break po nia 166 303 Removing Break ci q 166 So Remove Breakpomts using Marker Bars suit din 167 568 32 Remove Breakpomts using Break points Met td 167 es Renta Hanware Er a dE
140. 167 5341 Remove Hardware Breakpoints using the IDE oi oia 168 5 8 4 2 Remove Hardware Breakpoints using Debugger Shell ooocnonnonnnnnninnnconcnnonnnccnconcononnroncnnorcronnnnanons 168 A Vake aT Wa UA dg ccna ps ccc see Sai agape aaa acs Sasa as ace aces cat clcg ues A pace eas ama cmae aed 169 Sol Sekme WAS usina 169 Sk REMOS MAIS A in 171 LIO Workin with Re Ra 172 S101 Changing Bit Va ncaa teasers E A AE NEE EA TEENE S 173 De 10 2 Viene Reiter Dell nda RAR 174 SAMUEL DE A as 175 AE A 176 AULA AE pi II SIMA DE APRO EE AREE cies E EATE S AI 178 53 103 Peeters View Comet Meal aia 179 34104 Working with Resister Grop coses a AEE E EEEE AO ENEE EE AE EREE E 180 SHAT Adine a RES PO a 180 SIA Edine a Reenter Or poi 181 SAME e Removing a Renter Ang E 0 A 182 SS aros wa FLE AS ii a 182 103 1 Viewing TLE Registers im Reristers Vic Wisner E E R 183 5 1032 Reading TLB Resisters ftom Debugger Slds 185 SACS Mmitaizmie TLB REISE a 187 USA TLE Restore pi ni 188 A E il A PP E A T E 188 AMA UD RORE aa 190 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page SOSA a A e A 193 E O o PP 196 SSA BOO RI it das 198 IG o ASA A e aE de tauaeea ead SEEREN E EEA E E 201 SI Vean E Gs ccc aaa a aea aar 201 SALI Addins Memon MA iii 202 SL IES ibi 205 A aci 205 le Cache View Toolbar MIS ii iia 206 3123 Corpus a Esc Ei A 2
141. 2 Click the Debug button from the IDE toolbar The IDE switches to Debug perspective listing the debugging output CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 226 Freescale Semiconductor Inc Chapter 6 Multi Core Debugging This chapter explains how to use the multi core debugging capability of the CodeWarrior debugger In this chapter e Debugging Multi Core Projects e Multi Core Debugging Commands 6 1 Debugging Multi Core Projects This section explains how to set launch configurations and how to debug multiple cores in a multi core project The CodeWarrior debugger provides the facility to debug multiple Power Architecture processors using a single debug environment The run control operations can be operated independently or synchronously A common debug kernel facilitates multi core run control debug operations for examining and debugging the interaction of the software running on the different cores on the system NOTE This procedure assumes that you have already created a multi core project named board _project To debug a multi core project perform the steps given in the following sections e Setting Launch Configurations e Debugging Multiple Cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 227 LERE Debugging Multi Core Projects 6 1 1 Setting La
142. 20 P4080 and so on NOTE If a JTAG scan chain contains a processor such as P1011 P1012 P1013 P1015 P1016 P1017 and P2010 then an additional parameter 0x80000000 1 needs to be specified in the JTAG configuration file An example of this parameter is given in Using a JTAG configuration file to specify multiple linked devices on a JTAG chain 8 2 Using a JTAG configuration file to override RCW You can use a JTAG configuration file to override Reset Configuration Word RCW for a processor such as P4080 The JTAG configuration files are used in the following situations for e Target boards that do not have RCW already programmed e New board bring up e Recovering boards with blank or damaged flash CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 372 Freescale Semiconductor Inc TE Chapter 8 JTAG Configuration Files NOTE For more information on RCW see the Reference Manual for your processor The CodeWarrior IDE includes examples of JTAG configuration files that can be used for overriding the RCW see the listing below The JTAG Configuration files are available at the following location lt CWInstallDir gt PA PA Support Initialization Files jtag_chains Listing 8 2 Sample JTAG Configuration File for Overriding RCW Example file to allow overriding the whole RCW or only parts of it Syntax P4080 2 RCW_option RCWn value wher
143. 2015 258 Freescale Semiconductor Inc eee A AAA eee Chapter 7 Debugging Embedded Linux Software 17 Add the source files exec c and exec 1 c to the exec project e exec c The code demonstrating exec functionality e exec 1 c Generates the executable file exec 1 e1f As you step through the code of the exec e1s file the exec function call executes and a separate debugger window for the exec 1 e1f appears You can perform normal debug operations in this window The debugger destroys the instance of the previous file exec e1 and creates a new instance for the exec 1 e1 file 18 Enter the below code in the editor window Of Exec lt file Listing 7 6 Source Code for Exec c Exec c Demonstrates Exec system call functionality Sr At Oe eet eee eee ee ee oo ot oe a ee Soa a a S E rae a n a System Include files q a a ee ee eee nt a tt o oot So include lt stdio h gt include lt unistd h gt eS a ie a Fed aN Et St i ys Best Slee ale ke eh oh Stats Bake ee Eg ie ds Ne RS ee lee eet he ae eS ht ee ele rp et eS Constant Defintions AA A yt ech a at a a a A a Pact Sete Es ls NS I E oD i he e OS e ee Sa cea Pech pene E e fe define EXEC 1 tmp Exec 1 elf A A A NI as SS Sp A FR ae To ate A e y A A rte a a Main Program kosas rs eee es ease be e Se ee See eee te ese eee eee eee eee o ee ee See a eke int main void char argv 2 printf Exec Testing r n printf Bef
144. 2015 Chapter 5 Working with Debugger Freescale Semiconductor Inc 187 Working with Registers 5 10 5 4 TLB Register Details This section provides detailed information on TLB registers categorizing the registers based on the processor core used This section explains the following registers e e500 Registers e500v2 Registers e e500mc Registers e5500 Registers e6500 Registers 5 10 5 4 1 e500 Registers This section provides information about e500 TLBO registers starting from L2MMU_TLBO through LAMMU_TLB255 Table 5 25 e500 TLBO Registers L2MMU_TLBO through L2MMU_TLB255 0 0 V Valid bit for entry 1 1 TS Translation address space compared with AS bit of the current access 2 5 TSIZE Encoded Page size 0000 Reserved 0001 4 Kbyte 0010 16 Kbyte 0011 64 Kbyte 0100 256 Kbyte 0101 1 Mbyte 0110 4 Mbyte 0111 16 Mbyte 1000 64 Mbyte 1001 256 Mbyte 6 7 RESERVED 8 15 TID Translation ID compared with PIDO PID1 PID2 or TIDZ all zeros 16 17 NV Next Victim bits used for LRU replacement algorithm 18 31 RESERVED Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 188 Freescale Semiconductor Inc eee a Chapter 5 Working with Debugger Table 5 25 e500 TLBO Registers L2MMU_TLBO through L2MMU_TLB255 continued 32 36 WIMGE Me
145. 2015 Freescale Semiconductor Inc 49 Creating projects 4 10 11 12 Select File gt New gt CodeWarrior Bareboard Project Wizard from the CodeWarrior IDE menu bar The CodeWarrior Bareboard Project Wizard launches and the Create a CodeWarrior Bareboard Project page appears Specify a name for the new project in the Project name text box For example enter the project name as library project If you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired location from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location Click Next The Processor page appears Select the target processor for the new project from the Processor list Select Static Library from the Project Output group to create a library with a extension that can be included in other projects Library files created using this option do not include board specific details Click Next The Build Settings page appears Select the programming language you want to use from the Language group The language you select determines the libraries that are linked with your program and the contents of the main source file that the wizard generates Select a toolchain from t
146. 2080 T2081 T4160 and T4240 NOTE For e5500 processors see QorIQ communications processors All the information from QorIQ communications processors CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 447 EP AAA T series processors related to e5500 cores also applies to T series processors based on e5500 core MMU configuration through JTAG For e6500 cores the debugger is able to read and write the L2 MMU TLB and LRAT registers without using dedicated processor instructions You can access these registers from the debugger s Registers View or using commands in a target initialization script or Debugger Shell For more information on the TLB register structure see the rzapme txt file that is included in the default CodeWarrior project for each supported target board Using memory configuration files for bareboard debugging For e6500 cores it is critical to use the correct cacheable or cache inhibited attribute for physical memory accesses Failing to do so can lead to unreliable memory access stale data data corruption For more information see Viewing memory When debugging bareboard applications CodeWarrior needs to be informed of the actual MMU configuration regarding translated areas and cacheable cache inhibited attribute of the memory ranges For example Translate virtual addresses to corresponding physical cacheable p or
147. 38816 mask 32 bit mask to use in the bit OR operation Example The command below performs a bit OR operation using the 32 bit value at memory location oxc30a0008 and the 32 bit mask 0xo1000800 The command then writes the result back to memory location oxc30a0004 ORmem 1 0xC30A0008 0x01000800 9 2 1 6 reset CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 385 Target initialization commands Resets the processor on the target board Syntax reset code Arguments code Number that defines what the debugger does after it resets the processor on the target board The table below describes the Post Reset Actions Use any one of the values specified Table 9 2 Post Reset Actions 0 reset the target processor then run 1 reset the target processor then stop 9 2 1 7 run Starts program execution at the current program counter PC address Syntax run 9 2 1 8 setCorelD Tells the debugger to issue all subsequent commands on the specified core index disregarding the actual core index on which the initialization is executed NOTE Ensure to reset the core index after the sequence of commands intended to execute on the other core is finished see the resetCoreID command CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 386 Freescale Semiconductor Inc
148. 4 8 2 1963 4 8 2 E Q Service Pack for Windows GccE500v1 Linux Build Tool version 4 8 2 1963 48 2 E 42 Service Pack for Windows GccE500v2Linux Build Tool version 4 8 2 1963 4 8 2 E 42 Service Pack for Windows GccE5500Linux Build Tool version 4 8 2 1963 4 8 2 E Ge Service Pack for Windows GccE6500Linux Build Tool version 4 8 2 1963 48 2 000 PA GCC ELF Build Tools Service Packs 000 PA GCC LinuxGNU Build Tools Service Packs 4 mo sal SelectAll DeselectAll 1 item selected Details V Show only the latest versions of available software Hide items that are already installed Y Group items by category What is already installed Show only software applicable to target environment V Contact all update sites during install to find required software O a ik Figure 3 1 Selecting a service pack 4 Click Next and complete the remaining wizard steps The service pack along with the new toolchain will be installed on your computer CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 85 a A A a A Build Properties for Power Architecture NOTE For more information on service packs see the Service Pack Updater Quickstart available in the lt cwrnsta11pir gt pa folder After installing the service pack you need to set the new toolchain as the default toolchain t
149. 4080DS P2040RDB P2010DS and so on bits are any token from 32 or 36 FlashDevice is any token from NOR NAND SPI and SD stage can be any token from 1 2 3 4 1_2 3_4 NOTE Note that the configuration files in which the stage token is missing for example P1024RpB_uboot_32 tc1 can be used in all debug stages Whenever you want to set a breakpoint verify the following e A valid opcode at the debug exception interrupt vector In a scenario where the valid opcode is missing when a breakpoint is hit an exception is generated for the invalid opcode found at the debug interrupt vector memory location All available support for debug For example a very common error is when the code is relocated from reset space Oxfffffxxx to flash space Oxefffxxxx for the NOR and NAND flash devices In such a scenario IVPR remains at Oxffff0000 and IVOR15 at 0x0000f000 Any access to Oxfffff000 the debug exception generates a TLB miss exception The workaround is to set IVPR to Oxefff0000 before the U Boot relocation To hit breakpoints set on a previous debug session after changing the PIC address verify the following CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 288 Freescale Semiconductor Inc _ _ _ _ _ _ _ AAA A A AAA Chapter 7 Debugging Embedded Linux Software e Do not disable and enable back those breakp
150. 4ProjDirPath CFG P4080DS e500mc 7 ProjDirPath CFG P4080DS Figure 5 2 USB TAP connection type Memory tab Initialization VO Model Advanced Target Memory configuration Memory configuration file a B4860 T 6500 0 6500 1 6500 2 6500 3 6500 4 6500 5 6500 6 6500 7 S C3900 0 C3900 1 E C3900 2 E 5C3900 3 C3900 4 F C3900 5 Figure 5 3 Memory tab The table below lists the various options available on the Memory tab page Table 5 18 Memory tab options II scriptics O Target Lists the targets and the supported cores Memory configuration Select to specify a memory configuration file for the respective core Memory configuration file Lists the path to the memory configuration file for the respective core To edit select a cell then click the ellipsis button to open the Memory Configuration File dialog box The settings for a group of cores can be changed all at once by editing the cell of a common ancestor node in the Target hierarchy CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 157 Memory translations 5 5 3 Advanced tab Use the Advanced tab to specify that Palladium is used to emulate the target C Target is emulated by Palladium Figure 5 4 USB TAP connection type Advanced tab 5 6 Memory translations This section tells how to inform the CodeWarrior debugg
151. 5 Fe Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices g From the Target type drop down list expand the eppe group and select the required processor h On the Initialization tab clear the Execute system reset checkbox i Select the checkbox for the respective core in the Initialize target column j Click the ellipsis button in the Initialize target script column The Target Initialization File dialog box appears k Click File System and select the target initialization file from the following path lt CWInstallDir gt PA PA Support Initialization Files NOTE If you want to use an initialization file that initializes CCSR and PIXIS before U Boot you can uncomment the specific lines in the lt boardname gt _uboot_ lt Numbits gt tcl initialization file where lt NumBits gt can be 32 or 36 1 Click Finish m From the Connection type drop down list select the type of connection you want to use Ethernet TAP Gigabit TAP or Simulator The Connection tab appears along with the other tabs on the page n On the Connection tab specify the IP address of the TAP if you are using a TAP or configure the Simics paths model startup script simics executable and CodeWarrior add on if you are using Simics For Simics select the Manual launch option from the CCS server panel and enter the IP address of the CCS server in the Server hostname IP text box o Click Finish p From the Target panel select all t
152. 5 7 Gigabit TAP Connection Tab Options Gigabit TAP Hostname IP Specifies hostname or the IP address of the TAP JTAG settings JTAG clock speed kHz Specifies the JTAG clock speed By default set to 10230 kHz CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Manual launch Click to specify the path of or browse to the executable file of the CCS server Select to manually launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the TAP The table below describes the various options available on the Advanced tab page Table 5 8 Gigabit TAP Advanced Tab Options Target connection lost settings Try to reconnect Terminate the debug session If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the
153. 53 OxcO3b1 bbs 1 AsmSection home bogdan BSP_8572 ltib mpc8572ds 2007 1203 rpm BUILD inux 2 6 23 archipower Ely Thread ID Oxeffc1ae0 Suspended Signal Process Suspended received Description Process Suspended 4 _ switch_to homelbogdan BSP_85721ltib mpce572ds 200712031rpmiBUILDlinux 2 6 23 archipowerp 3 schedule D Kernel 8572 Multicore linux 2 6 23 kernelisched c 1897 Oxc02e6670 2 do_wait homelbogdan BSP_85721ltib mpce572ds 200712031rpm BUILDilinux 2 6 23 kernellexit c 164 1 AsmSectiom home bogdan BSP_8572 ltib mpc8572ds 2007 1203 rpm BUILD linux 2 6 231archipower Secondary Process Suspended E el Thread ID OxeffcO4b0 Suspended Signal Process Suspended received Description Process Suspended 5 __switch_tof home bogdan BSP_8572 ltib mpc8572ds 2007 1203 rpm BUILD linux 2 6 23 arch powerp 4 schedule D Kernel 8572 Multicore linux 2 6 23 kernel sched c 1897 Oxc02e6670 O idle c 3 void cpu_idle void 23 archipowerpc ke e if ppe md idle loop ppc md idle loop doesn t return set_thread_flag TIF_ POLLING NRFLAG while 1 gt while need resched amp cpu should die ppc 4 runlatch offi if ppe md pover_save clear thread flag TIF_POLLING NRFLAG a smp mb is so clearing of TIF _ POLLING NRFLAG is ordered w r t need resched test smp_mb local _ irq disable im Figure 7 37 Kernel Stopped by User 9 Continue debugging
154. 6 Debug Target Settings page settings continued e Gigabit TAP Trace JTAG over JTAG cable Select to use the Gigabit TAP and Trace probe to send JTAG commands over the JTAG cable e Gigabit TAP Trace JTAG over Aurora cable Select to use the Gigabit TAP and Trace probe to send JTAG commands over the Aurora cable For more details on Gigabit TAP see Gigabit TAP Users Guide available in the lt CWInstall1Dir gt PA Help PDF folder TAP address Enter the IP address of the selected TAP device NOTE The Debug Target Settings page may prompt you to either create a new remote system configuration or select an existing one A remote system is a system configuration that defines connection initialization and target parameters The remote system explorer provides data models and frameworks to configure and manage remote systems their connections and their services For more information see the CodeWarrior Development Studio Common Features Guide available in the lt CWInstallDir gt PA Help PDF folder 5 16 6 Configurations Page Use the Configurations page to select the processor core that executes the project The table below lists the options available on the page Table 5 47 Configurations Page pation Doseription Core Index Select the processor core that executes the project 5 17 Debugging Externally Built Executable Files CodeWarrior Development Studio for Power Architecture Processors Targ
155. 6 0011403E il lt m Basy OxF Word 4 0x10 0010C9B4 DEADBEEF 00000000 0010C03E Figure 5 23 Cache View 6 Use the Choose a Cache list box to specify the cache that you want to examine NOTE If the Choose a Cache list box is grayed out the current target does not support viewing cache If a cache line appears in red it indicates that the line has been changed by the processor in the cache but has not been updated in the storage This is also suggested by the Dirty flag that reads Yes in this case 5 12 2 Cache View Toolbar Menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 206 Freescale Semiconductor Inc Chapter 5 Working with Debugger Use the Cache view toolbar menu is to configure the cache information To display this menu click the Menu button inverted triangle in the Cache view toolbar Tip The Cache view toolbar buttons are alternative ways to implement the control actions defined in the toolbar menu NOTE Certain toolbar buttons are unavailable grayed out if the target hardware does not support their corresponding functions or if a specific operation can be performed in assembly language and is not supported by the Cache view The table below describes the Cache view toolbar menu options Table 5 36 Cache View Toolbar Menu Options BE AA AA Write Commits content changes
156. 6 2015 172 Freescale Semiconductor Inc Chapter 5 Working with Debugger 0d Variables Breakpoints O Cache tio Registers 53 BA Modules tE joey Ap Y Oo Name Location value A e General Purpose Registers dia GPRO GPRO 0x1000b4 air SP 5P Ox3dffe0 aor GPR2Z GPR2 0x338dd50 it GPR3 GPR3 0x0 aioi GPR4 GPR4 0x0 aiai GPRS GPR5 oxo 0 GPR6 GPR6 0x100180 aia GPR GPR7 0x1 iia GPRS GPR8 0x3dfa8c dior GPR GPRO Oxlacif8 v Figure 5 11 Registers View In this section e Changing Bit Value of a Register e Viewing Register Details e Registers View Context Menu e Working with Register Groups e Working with TLB Registers e Working with IMMR 5 10 1 Changing Bit Value of a Register You can change the bit value of a register in the Registers view To change a bit value in a register first switch the IDE to the Debug perspective and start a debugging session Then proceed as follows 1 Open the Registers view by selecting Window gt Show View gt Other gt Debug gt Registers 2 In the Registers view expand the register group that contains the register with the bit value that you want to change 3 Click the register s current bit value in the view s Value column The value becomes editable 4 Type in the new value Press the Enter key MN CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semicondu
157. 7 4 Sending a Signal to a Process or Thread To catch a signal perform the following steps 1 Right click the signal in the Signals view and select Signal Properties The Properties for window appears shown in the figure below 2 Select the Suspend the program when this signal happens checkbox as shown in the figure below Properties for type filter text Common Common Process Information Description User defined signal 1 Pass this signal to the program Figure 7 5 Catching a Signal The figure below shows a child process stopped on receiving the SIGUSRI signal CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 249 AAA Debugging a Linux Application a E Fork_Linux_Debug_Download CodeWarrior a 2 EPPC Linux Applications Fork elf PID 2653 p Thread ID 0 Running a 2 EPPC Linux Applications Fork elf PID 2654 Suspended 4 2 Thread ID 0 Suspended Signal Exception 10 received Description PowerPC Exception 4 main Fork c 54 0x10000710 3 00FE9E36C Ox0FE9E36C OxOfede36c 2 OxOFEQE4SFS OxOFEQE4F8 Ox0fe9e4 f8 Figure 7 6 A Stopped Child Process Some signals cannot be caught but they can be passed to the debugged application These signals have read only properties One such signal is SIGKILL 7 1 6 Debug the Linux Application You can use the CodeWarrior download la
158. 8 10 Preprocessor Senini aens a A RA N RAS 83 3 2 GCC Brid Lobl SENES onna E EAA TAE A OE 84 dl AOS a AAA il 87 e POR iaa dd paria 88 ll DS 88 Jorde TIM ME casa audigy gsasste a cy Seca nk ae oae Sliaa ces Danse Sgaaaacaaeabedsaalgs 89 As Me a 90 a AICA LLE S eE Seea R naib reuianss 90 e O BN dies ia ON aiinninniiae Weinman opacduiaulquasaiaulanieuatubaneetineaes 91 as POR PO COM ple a de Ai 91 E A PROPTOCCS a OO O NN ePQa g Ia AU ii 92 ERE PAE IO E LE o PO A o A AE P A E 93 a A AN ia A da 94 E A O 95 Be E a O 95 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 5 Section number Title Page a td WHBCCTBME OUR annan R E EN 96 S24 PowerPC Assembler soii AA 97 SOG NST ri nimi mnie uae E E 97 E O E T E AE T E A E A T 98 So Preprocessor SeN PE o e A 98 Ia PowerPC ASAS a ceea i EEE ANAA vlan E AE 99 Dede Di assembler SOUS dido 99 Chapter 4 Debug Configurations 4 1 Using Debug Contiguradions Dialog Do ai 101 ADA Miina pa 102 AZ SRNR A o 105 LEE DoUe O NO 106 LLL Delia A A 108 A132 EPPC EXPO a ibi 109 ALIS Dd a A E A A E A EEA 111 LIA Ta aa 113 Al Sytem C al Se VCS ia a O 114 AN Ze Oher Exccutables asii 116 Abar Syot Salio bi 117 Lle OS AWIN a NSR 119 ALA Trac Po AA Ran 121 ns E E E opandinieanate E 123 AU CERA rado 124 ASA Come Aa 125 a2 Tustomans Debug Lon ars Ar 127 A3 Revela Debug COREA EAS a ii
159. 8 ori 0x0000001c mtlr 0x00000020 b static void early _bind_ccm_law_devices void 0x00000024 lis ied 1 I P Figure 7 42 Hypervisor Debug Setting Breakpoint 5 Debug until the secondary cores are being released from the spin table in the release_secondary function from init c at start_secondary_spin_table call CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 363 ATA a Debugging the P4080 Embedded Hypervisor Debug Y A fo Variables Breakpoints 3 Cache ii Registers BA Modules f 7 Xe S A SEE oD ib a 2 2 i gt fw Name Context Address Type v E Debug hv CodeWarrior Attach gt 3 address 0x0000000000113 Regular vV Y EPPC hv core 0 Suspended gt E 4 homeltesi 0x00000000 Hardware Y a Thread ID 0x0 Suspended D a nomestest Hardware 0x00000010 0x00000010 0x00000010 Y 2 EPPC hv core 1 x IG _ lr a E fe init c 3 gt 0x00000010 0x00000010 0x00000010 A Disasse X Bs Outline 7 S create_doorbells 0X0011396C lv 2 Main device tree must be const after this point 50 a release_secondary_cores isos na SEa partition A0rE hi 00113974 lis r5 21 00113978 Lis 7 14 void secondary_init void spt cee bik 00113984 addi r7 r7 1 00113988 li r6 4 _
160. Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target does not respond in the provided time interval you receive a CCS timeout error Enable logging Select to display protocol logging in console JTAG config file This panel displays the JTAG configuration file being used This panel is populated only if you have select a JTAG configuration file for your project If a JTAG configuration file is not selected this panel displays a None value For more details on JTAG configuration files see the JTAG Configuration Files chapter Advanced TAP settings Force shell download Select to force a reload of the TAP shell software Disable fast download Select to disable fast download NOTE This option is not available for e500mc e5500 and e6500 core based targets Enable JTAG diagnostics When selected the option enables performing advanced diagnostics of the JTAG connection to be used during custom board bring up After the connection to the probe has been established the debugger performs the JTAG diagnostics tests Power at probe IR scan check Bypass DR scan check Arbitrary TAP state move IDCODE scan check and the result of the tests are printed to the console log and in case of an error a Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 150 Freescale Semiconductor Inc Chapt
161. Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc SSL ee ee Chapter 3 Build Properties Table 3 18 CodeWarrior Build Tool Settings Processor Options continued the same type The compiler only applies this option to a function if the function refers to at least 3 similar sized objects The objects must be global or static At the beginning of the function the compiler generates instructions to load the address of the first similar sized object The compiler then uses this address to generate 1 instruction for each subsequent reference to other similar sized objects instead of the usual 2 instructions for loading an object using absolute addressing This setting is equivalent to specifying the pool_data pragma and pool data command line option Use Common Section Moves uninitialized data into a common section The default is off This setting is equivalent to specifying the common command line option Use LMW STMW Controls the use of multiple load and store instructions for function prologues and epilogues The default is off NOTE This option is only available for big endian processors This option is not available for big endian e500v1 and e500v2 architectures when vector and double precision floating point instructions are used This setting is equivalent to specifying the use_1mw_stmw command line option Inlined Assembler is Volatile Controls whether or not inlin
162. CCS server on CCS executable Click to specify the path of or browse to the executable file of the CCS server Manual launch Select to manually launch the specified CCS server on the specified port Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 149 Connection types Table 5 15 CodeWarrior TAP Connection Tab Options continued Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the CodeWarrior TAP The table below describes the various options available on the Advanced tab page Table 5 16 CodeWarrior TAP Advanced Tab Options Target connection lost settings Try to reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Terminate the debug session If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated
163. Click Import The Import Target Type dialog box appears Select the JTAG initialization file that describes the items on the JTAG chain from this location lt CWInstallDir gt PA PA Support Initialization Files jtag_ chains Click OK The items on the JTAG chain described in the file appear in the Target Types dialog box Click OK The selected JTAG configuration file appears on the Advanced tab shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 377 Setting up a remote system to use a JTAG configuration file Connection Advanced Target connection lost settings When an active connection is lost do the following O Try to reconnect O Terminate the debug session s Ask me Advanced CCS settings CCS timeout seconds 100 C Enable logging JTAG config file D PA 10 Installed Build CW PA v10 0 1 PA PA_Support Initialization_Files jtag_chains P4080DS_RCW _1200 500 800 txt Advanced TAP settings C Force shell download Disable fast download C Enable JTAG diagnostics C Secure debug key Figure 8 6 Advanced Tab Showing the JTAG Configuration File 16 Click OK 17 Click the Debugger tab The Debugger page appears 18 Ensure that the Stop on startup at checkbox is selected and main is specified in the User specified text box 19 Click App
164. Click to move the selected file search path one position higher in the list Ls Move down Click to move the selected file search path one position lower in the list CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 72 Freescale Semiconductor Inc Ey Chapter 3 Build Properties 3 3 1 5 3 Warnings Use the Warnings panel to control how the compiler reports the error and warning messages The table below lists and describes the various options available on the Warnings panel Table 3 16 CodeWarrior Build Tool Settings Warnings Treat All Warnings As Errors Select to make all warnings into hard errors Source code which triggers warnings will be rejected Illegal Pragmas Select to issue a warning message if the compiler encounters an unrecognized pragma This setting is equivalent to specifying the pragma warn_illpragma pragma and the warnings illpragmas command line option Possible Errors Select to issue warning messages for common usually unintended logical errors in conditional statements using the assignment operator instead of the equality comparison operator in expression statements using the operator instead of the operator placing a semicolon immediately after a do while if or for statement This setting is equivalent to specifying the warn_possunwant pragma and the warnings possible command line option Extended Er
165. CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Document Number CWPADBGUG Rev 10 5 0 06 2015 V Wo freescale CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Contents Section number Title Page Chapter 1 Introduction Lil Rellano AAA ARA AAA 19 2 CG eii 19 1 3 ACCOMPARFINE DOCM 20 ld PowerPC Embedded Application Binary Interface sic dit 21 LS CodeWamor Dsre lo puerta e lina 22 LS Beas IDE ado dina 22 LD UA a ad 23 Io A a A EA A 23 Lor A A alae aa sabemcecas 24 LaS DEPOR AAA aa 24 LS Monsei AAI ii Ni 23 157 Cede Waris Profile md Andien 100 Bis casiscic i siapionincamiesanioiotaevansuisuranieeisdacapiauiorabawianieleidecontolaiaulanionmiunanians 25 lo Cod Wamot TIE Ra 26 LOL Prieta daa 27 E A A eine ai a ay eE COD naaa 27 LAS Ta nia 28 LAS MCI us P EE A E E EN A E E 28 Chapter 2 Working with Projects 21 Code Warrior Bareb Gare Project Wizard ei ri 29 211 Create aCodew ariot Barebaard Project Pitt 30 212 Processot Pri is 31 21S Derug Target Seti A 32 E Puid Setin PAE oaia E PEENE AEA ETE EAEE A NE AE 34 2 Cros PA id E E 39 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 3 Section number Title Page 26 Trace Companion Pao 37 22 CodeWarnior La Project Wizard ascona a iaa 38 22 Crede a Coue W amor
166. CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 269 I Debugging a shared library g Click Apply to save the launch configuration settings The target settings are saved shown in the figure below E Main 69 Arguments ME Environment 5 Debugger E Source E Common Environment variables to set Variable Value gt AVOID_SYSTEM_PATH YES 8 LD_LIBRARY_PATH tmp Append environment to native environment O Replace native environment with specified environment Figure 7 15 Environment Variables Shared Library Project h Click OK to close the Debug view 7 4 7 Debug the shared library Finally you need to debug the shared library In the steps that follow you will launch the debugger Next you will step through the code of the executable file shareanip_1m e1 until you reach the code that makes a call to the ad _examp1e function implemented in the shared library At this point you will step into the code of the ada_exampie function to debug it 1 Activate the shareanip_1m launch configuration in the project 2 Select Run gt Debug The debugger starts and downloads the shareanib_1M e1f and 1ibexample so files to the specified location on the remote target one after another The Debug perspective appears 3 Click Step Over in the debugger window until you reach the following line of code shown in the fi
167. Core index list select the required core e Click Next e Specify connection type and TAP address if you are using Ethernet or Gigabit TAP NOTE If you are using the simulator to debug U Boot this page will show the simulator options e Click Finish The imported project appears in the CodeWarrior Projects view You just finished creating a CodeWarrior project to debug the U Boot image 7 6 3 Specifying the Launch Configuration Settings You can specify settings for the launch configuration created earlier using the Debug Configurations dialog box To specify settings for the newly created Attach launch configuration 1 Select Run gt Debug Configurations 2 On the Main tab if you have an already existing system for the attach configuration select it from the Connection drop down list else create a new one by following the steps given below a Click New The New Connection wizard appears b Expand the CodeWarrior Bareboard Debugging group and select Hardware or Simulator Connection c Click Next The Hardware or Simulator Connection page appears d Specify a name and a description for the connection e Click New next to the Target drop down list The New Connection wizard appears f Expand the CodeWarrior Bareboard Debugging group and select Hardware or Simulator System CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 28
168. DCache is used for initial RAM Allocate Initial RAM in data cache lis r3 CFG INIT RAM ADDREh ori r3 r3 CFG_INIT RAM ADDR 1 Oxfffff184 lt AsmSection 140 gt lis r3 560 mfspr r2 L1CFGO ori r3 r3 CFG_INIT_RAM ADDR 1 andi 22 42 UXILE Oxfffff188 lt AsmSection 144 gt ori r3 r3 0000 cache size 1024 12 11 line Y mfanr r2 TICFGO Figure 7 27 U Boot Debug Translated Address Space in Flash 16 Deselect the Instruction Stepping Mode command when the instruction pointer is at switch_as You can set breakpoints and use the Step Over Step Into and Step Out commands from line switch_as label in start s to line switch back to as o 1M start s At these locations the Instruction Address Space IS and Data Address Space DS bits from MSR are cleared so that the processor uses only the TLB entries with TS 0 See Points to remember for more details NOTE To set breakpoints in Stage2 after rfi start s you can set the Alternate Load Address by using setpicloadaddr reset For low end processors e500v1 e500v2 set DE Debug Enable from MSR register via the Debugger Shell or the CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 299 AE Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices Registers view You can then perform the set resume and remove operations on the breakpoints
169. Diagnostics Action Figure 11 6 Hardware Diagnostics Action editor e Action Type e Memory Access e Loop Speed e Memory Tests The Hardware Diagnostics Action editor window includes the following groups 11 3 2 1 Action Type The Action Type group in the Hardware Diagnostics Action editor window is used for selecting the action type You can choose any one of the following actions e Memory read write Enables the options in the Memory Access group 420 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc E a Chapter 11 Working with Hardware Tools e Scope loop Enables the options in the Memory Access and the Loop Speed groups e Memory test Enables the access size and target address from the access settings group and the settings present in the Memory Tests group 11 3 2 2 Memory Access The Memory Access pane configures diagnostic tests for performing memory reads and writes over the remote connection interface The table below lists and describes the items in the pane Table 11 1 Memory Access Pane Items fe SMS A rie Read Select to have the hardware diagnostic tools perform read tests Write Select to have the hardware diagnostic tools perform write tests 1 unit Select to have the hardware diagnostic tools perform one memory unit access size operations 2 units Select to have the hardware diagnostic tools pe
170. EE Outline l EA General Purpose Regist e z i z SBm 3 Bl sm ER A 0000000000000000000000000000 _ a pde xa e 26 mfspratispr286 pal CA Users b34823 workspace board_project core04 RAM board_pr 5 i 4 Vall ve E board_project core05_RAM_B4860_Download CodeWarrior Field GPR 0 63 z 28100 Ba Commander 23 Y OJ E Console 2N Tasks O Memory 4 EPPC board_project core05 elf core 5 Suspended roca coo acen uP Thread 1D 040 Suspended Signal Halt received Description Actions Project Creation Build D 2 main0 main c 14 0x0000000028100194 Fever una Raset Summa y Import project gt 1_start _start_e6500_32bit_crt0 c 264 Ox00000000281000 revert Write Reset Summar CodeWarrior Bareboard Project pi C Users b34823 workspace board_project core05 RAM board_pr y i 7 Description r 322 0004 r mo 8 main c 23 0 Ex Disassembly 23 N BE Outline Bl Enter location here X A Commander 3 Y OJ E Console 23 _ amp Tasks J Memory 4f Remote S TA Target Ta 2 Problems Executabl 5 a E a Ps Pi e iaa EPPC board_project core05 elf core 5 a amp Be e Gly ry a Import project 2 a J CodeWarrior Bareboard Project lt m mo Figure 6 6 Viewing Multiple Instances of Active Debug Session 8 Select a thread from core 1 in the Debug view of the newly opened Debug lt project gt window All the views in the Debug pe
171. ELF file can be run on Simics CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 440 Freescale Semiconductor Inc Chapter 13 Debugger Limitations and Workarounds This chapter documents processor specific CodeWarrior debugger limitations and workarounds The chapter includes the following sections e PowerQUICC II processors e PowerQUICC II Pro processors e PowerQUICC III processors e QorlQ communications processors e T series processors e QorlQ Qonverge processors e Generic processors 13 1 PowerQUICC Il processors This section talks about the limitations and workarounds of the Code Warrior debugger for the PowerQUICC II processors The PowerQUICC II processor family includes G2 8250 processors Working with watchpoints G2 cores do not support watchpoints Working with hardware breakpoints G2 cores implement one address instruction breakpoint hardware breakpoint that can be used in a debug session Working with memory mapped registers CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 441 EA A PowerQUICC II Pro processors For G2 cores you must provide the internal memory map base address before the CodeWarrior debugger can access the internal memory mapped registers MMR There are two ways to provide this address e Use the setMMRBaseA ddr command in a targ
172. Erases the sectors that are occupied with data and then programs the file If the flash device can not be accessed at sector level then the flash device is completely erased This feature helps you perform these basic flash operations CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 416 Freescale Semiconductor Inc NN aaa Chapter 11 Working with Hardware Tools e Erasing flash device e Programming a file 11 2 1 Erasing flash device To erase a flash device follow these steps 1 Click the Flash Programmer button on the IDE toolbar The Flash File to Target dialog appears 2 Choose a connection from the Connection pop up menu NOTE If a connection is already established with the target this control is disabled The Flash Configuration File pop up menu is updated with the supported configurations for the processor from the launch configuration 3 Choose a flash configuration from the Flash Configuration File pop up menu 4 Select the Unprotect flash memory before erase checkbox to unprotect flash memory before erasing the flash device 5 Click the Erase Whole Device button 11 2 2 Programming a file 1 Click the Flash Programmer button on the IDE toolbar The Flash File to Target dialog appears 2 Choose a connection from the Connection pop up menu NOTE If a connection is already established with the target this control is disabled The Fl
173. Executable file Wizard The Import a CodeWarrior Executable file wizard helps you to import a CodeWarrior executable file and create a new project To use the Import a CodeWarrior Executable file wizard perform these steps 1 From the CodeWarrior IDE menu bar select File gt Import The Import wizard launches and the Select page appears 2 Expand the CodeWarrior group 3 Select the CodeWarrior Executable Importer to import a Power Architecture e1 file 4 Click Next The wizard name changes to Import a CodeWarrior Executable file and the Import a CodeWarrior Executable file page appears The following sections describe the various pages that the wizard displays as it assists you in importing an executable elf file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 214 Freescale Semiconductor Inc SSE eee Chapter 5 Working with Debugger e Import a CodeWarrior Executable file Page Import C C Assembler Executable Files Page e Processor Page e Linux Application Launch Configurations Page e Debug Target Settings Page e Configurations Page 5 16 1 Import a CodeWarrior Executable file Page Use the Import a CodeWarrior Executable file page to specify the name and location for your project The table below describes the options available on this page Table 5 42 Import a CodeWarrior Executable file page settings A A A AA Project name Specify the name
174. Fill Memory Action Task View or in the Debugger Shell view using the designated memory space prefix Use the mem ms command to list the supported memory spaces for a processor To display the Memory view select Window gt Show View gt Other gt Debug gt Memory The figure below shows a Memory view displaying physical memory address space s Executables J Memory Browser Oo Memory X3 RSA y Physical 0x100002428 lt Hex gt 52 a New Renderings Address 0 3 4 7 8 B C F 0100002420 480032E1 4BFFFFED 3BDEOOO1 4BFFFFFC 0100002430 9421FFE0 7C080246 90010024 93E1001C 0100002440 93C10018 7C7E15785 7FEQOOA6 67FFO200 0100002450 0x100002430 2ci1Eocoo 405820020 45000051 0100002460 70641B78 30600000 30636EA0 4CC63162 0100002470 48003291 453000020 45000035 7C641B75 0100002480 30600000 39636ECC 7FC5F378 4CC63162 0100002490 48003271 a3E1001c e3ci0015 60010024 0100002440 70080386 36210020 4E500020 7C7E42A6 0100002450 4E500020 9421FFFO 36210010 4E500020 0100002400 9421FFFO 7C0802 26 90010014 45000015 Figure 5 21 Memory View NOTE The Memory view seamlessly displays 32 bit 36 bit 40 bit and 64 bit addresses depending upon the selected memory space and the target processor currently under debug process 5 11 1 Adding Memory Monitor This section describes how to add memory monitor in the Memory view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 202 Free
175. Hypervisor In this section you will see how the hypervisor code is debugged from the _start function in the 1ibos 1ib heaa s file until the t1bwe from branch _to_reloc from the scr misc s file when the new text mapping is created and the initial one is removed To debug hypervisor from the entry point until the hypervisor relocation L 2 Download the appropriate P4080 SW Bundle image the BSP in iso format to a Linux computer Mount the iso image file using this command mount o loop BSP Image Name iso mnt iso Install the BSP image file according to the instructions given in the BSP documentation help documents pdf BSP User Manual Configure lt build tool gt to have U Boot boot the hypervisor as per instructions given in the BSP documentation help documents pdf BSP_ User Manual Import the U Boot file and create an Attach launch configuration a b Q O O Launch the Code Warrior IDE From the main menu bar select File gt Import The Import wizard appears Expand the CodeWarrior group Select Code Warrior Executable Importer to debug a ezs file Click Next The Import a Code Warrior Executable file page appears Specify the project name for the imported project Click Next The Import C C Assembler Executable Files page appears Click Browse next to the Executable option Select the nv e1 file Click Next The Processor page appears Select the processor fa
176. II Family Supported Cache Operations L1D L1 data cache e 16 KB size e enable disable cache e 128 sets e lock unlock cache e 4ways e invalidate cache e 8 words line e read modify data L11 L1 instruction cache e 16 KB size e enable disable cache e 128 sets e lock unlock cache e 4ways e invalidate cache e 8 words line e read modify data The table below lists cache features supported by PowerQUICC III processors CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 212 Freescale Semiconductor Inc eS AAA Chapter 5 Working with Debugger Table 5 41 PowerQUuICC III Family Supported Cache Operations invalidate line read modify data L1D L1 data cache e 32 KB size e enable disable cache e 128 sets e lock unlock cache e 8 ways e invalidate cache e 8 words line e lock unlock line e invalidate line e read modify data L11 L1 instruction cache e 32 KB size e enable disable cache e 128 sets e lock unlock cache e 8 ways e invalidate cache e 8 words line e lock unlock line L2 L2 cache data only instruction only 256 KB 512 KB size enable disable cache unified e 1024 2048 sets e lock unlock cache e 8 ways e invalidate cache e 8 words line e read modify data 5 13 Changing Program Counter Value This section explains how to change the program counter value in the Code Warrior IDE to make the debugger execute a specific line
177. KKKKAKAAKKAAAAAAAAAAAAA Working with Registers Table 5 26 e500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM15 continued 8 15 TID Translation ID compared with PIDO PID1 PID2 or TIDZ all zeros 16 23 MASK SIZE MASK 4KB 0x0000000000 16 KB 0x0000000001 64 KB 0x0000000011 256 KB 0x0000000111 1 MB 0x0000001111 4 MB 0x0000011111 16 MB 0x0000111111 64 MB 0x0001111111 256 MB 0x0011111111 24 26 RESERVED 27 31 WIMGE Memory cache attributes write through cache inhibit memory coherence required guarded endian 32 32 UR User read permission bit 33 33 UW User write permission bit 34 34 UX User execute permission bit 35 35 SR Supervisor read permission bit 36 36 SW Supervisor write permission bit 37 37 SX Supervisor execute permission bit 38 38 X0 Extra system attribute bits for definition by system software 39 39 x1 Extra system attribute bits for definition by system software 40 43 UO U3 User attribute bits used only by software These bits exist in the L2 MMU TLBs only TLB1 and TLBO 44 44 IPROT Invalidation protection exists in TLB1 only 45 63 RESERVED 64 83 RPN Real page number 84 95 RESERVED 96 115 EPN Effective page number 116 126 RESERVED 127 127 V Valid bit for entry 5 10 5 4 2 e500v2 Registers CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 190 Freescale Semicon
178. Linux Project Pase nai tio cia 39 Bet D e e T N A N E A E E E O E 40 Le Pund A EEEE E ET 42 DA A RA 43 2 AE A ii 45 23 1 Creating CodeWarrior Bareboard Application Pr 45 222 Credtine Codew amir Bareboard Library Prode tl e icnolanatio ici iii io pan quiclis osas 49 22a gt Creatine Code w amor Linux Application Propecia iea 51 2A DEE PRO iii A 54 241 VB A a a 54 Aaa Anto Build MO A a 13 25 Emportiie Classic Code Wamior Pr as 56 20 DIEGO PO indeseable 56 Chapter 3 Build Properties al tiie ise ula Properles ride bananta nj ecanieiobassanluianrah Saimin in ames daniauesatiacenemauianinis 59 a Retorne Bond PEoperlesS ii A E 60 23 Build Properties for Power Architecte ade 60 33 1 CodeWarrior Build Tod A A A GAA 62 Jalil Povar CFU AA AAA 63 LaL Demer ao 64 aek A O 65 ALA PowerPC LO ii sdb a io de aioa a E 65 SO ala 66 Le LN A a 67 IES E a 68 LAA ad 68 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 4 Freescale Semiconductor Inc Section number Title Page lo Povere Combi eh is casessssssvasanvehesecsenvsnsdeasavacdiadendanaassaunssacuShavepanvibeivantavenidiadawsietadewsonemseaussealeaeene 70 SOA Procesan Ria 71 3d PU di A A a 71 Sige Seabees iia ties 73 Se Nae A A O 74 SA A E E EAA ER T5 ILLI CFF AAA A R Err TI LA PARE A a 79 O a a A 80 IG tii io 81 de FORE EC Dima seen Blan ip 81 Blt DIRA EMS Ses A E AR E 82 SLR PowerPC PreprocES SOl io AAA RO 83 2 1
179. NIT RAM ADDR 1 Oxfffff184 lt AsmSection 140 gt lis r3 560 mfspr r2 LiCFGO ori r3 r3 CFG_INIT_ RAM ADDR 1 andi 2 r2 Oxifft Oxfffff188 lt AsmSection 144 gt ori r3 r3 0000 cache size 1024 12 T 1 line vi mfanr r TICFGO Figure 7 30 U Boot Debug Translated Address Space in Flash 16 Deselect the Instruction Stepping Mode command when the instruction pointer is at switch_as You can set breakpoints and use the Step Over Step Into and Step Out commands from line switch_as label in start s to line switch back to as o in Start S At these locations the Instruction Address Space IS and Data Address Space DS bits from MSR are cleared so the processor will use only the TLB entries with TS 0 See Points to remember for more details NOTE To access breakpoints set on a previous debug session after changing the PIC address you will need to disable and enable back those breakpoints after the PIC value was changed NOTE To set breakpoints in Stage2 after rfi start s you can set the Alternate Load Address by using setpicloadaddr reset For low end processors e500v1 e500v2 set DE Debug Enable from MSR register using the Debugger Shell or the Registers view You can then perform the set resume and remove operations on the breakpoints CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 306 Freescale Semiconductor Inc Chapter 7 D
180. NOTE To access breakpoints set on a previous debug session after changing the PIC address you will need to disable and enable back those breakpoints after the PIC value has been changed 7 6 4 3 3 Debugging U Boot after switching back to initial address space This section tells how to debug U Boot in the SPI and SD MMC flash devices after switching back to initial address space While debugging U Boot when you reach the cpu_init_ call you are back to address space 0 you now need to remove the memory configuration file used in the previous section or set another memory configuration file for U Boot compiled on 36 bits To debug U Boot in flash after switching back to initial address space 1 Click E on the Debug view toolbar to terminate the current debug session 2 Select Run gt Debug Configurations The Debug Configurations dialog box appears 3 From the left pane in the CodeWarrior Attach container select the appropriate launch configuration 4 In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears 5 Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears 6 On the Memory tab clear the checkbox for the respective core in the Memory configuration column to remove the memory configuration file you had set in the previous section NOTE If required you can set another memory configuration file for
181. P SMP guest application on the P4080DS target board You must have a serial cable connected between the board UARTO and the UARTO ports of your Linux host The debugger connects to the running mx_server from the Linux host and then communicates with the target board through the serial connection between the Linux host and the target board The steps to start the mux_server are given below 1 Telnet is not recommended to be used with the mux server Use socat instead The syntax is socat raw echo 0 tcp lt address gt lt port gt For example socat raw echo 0 tcp rhuath 9002 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 348 Freescale Semiconductor Inc ee ee Chapter 7 Debugging Embedded Linux Software 2 For the standalone P4080DS target board which is connected with the serial cable you can use the makefile for starting the mux_server and the xte1 shipped with the SDK a Run make xtel_p4osops if you want to automatically launch the mux_server and have eight serial consoles started b Run make mux_server P4080DS TARGET dev ttyso Which will connect the mux_server to the dev ttyso device using the ports from 12000 to 12015 However in this case you need to manually run socat to open the serial consoles c If you need to change the ports edit the tool you are using for starting the mux_server d In case you are running only the mux_server and not the xt
182. PA PA_Support Initialization_Files Memory 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 On the left panel from the CodeWarrior Attach group select the attach launch configuration you had imported using the nv e1 file 3 On the Main tab in the System panel select all the cores and click Debug The Debug perspective appears 4 In the Editor view open the init c file and set a hardware breakpoint at the branch to reloc function call from the init_hv mem function Debug z B 6 Variables Breakpoints z B Cache iit TET BA Modules jm eS Xx Ko gt ArxiBmBS Y oD amp a 2 Q i gt S Ww off Name Context Address Type y E Debug hv CodeWarrior Attach b A momerest 0x00000000 Hardware V EPPC hv core 0 Suspended i homestest Hardware Y a Thread ID 0x0 Suspended Breakpoint hit E Pu ox00000000 0 00000000 000000000 Y EPPC hv core 1 p Thread ID 0x0 Running Y EPPC hv core 7 p Thread ID 0x0 Running vi EN 4 itc E3 gt 0x00000000 0x00000000 0x00000000 O Il Disassemb X gt G Outline Bl barrier 250x00000000 li IFA memcpy new_text void PHYSBASE uintptr_t amp end PHYSBASE 0x00000004 tlbivax ENS mew_text text_phys MAS3_RPN TLB_MAS3_KERN 0x00000008 isync E text_phys gt gt 32 0x0000000c sync 0x00000010 nop 0x00000014 lis return 0 0x0000001
183. PN 64 83 RPN Real page number Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 191 Working with Registers Table 5 27 e500v2 TLBO Registers L2MMU_TLBO through L2MMU_TLB511 continued 84 95 RESERVED 96 115 EPN Effective page number 116 127 RESERVED The table below shows e500v2 TLB 1 registers starting from L2MMU_CAMO through L2MMU_CAMIS Table 5 28 e500v2 TLB1 Registers L2MMU_CAMO through L2MMU_CAM15 0 3 TSIZE Encoded Page size 0000 Reserved 0001 4 Kbyte 0010 16 Kbyte 0011 64 Kbyte 0100 256 Kbyte 0101 1 Mbyte 0110 4 Mbyte 0111 16 Mbyte 1000 64 Mbyte 1001 256 Mbyte 1010 1 Gbyte 1011 4 Gbyte 4 4 TS Translation address space compared with AS bit of the current access 5 7 RESERVED 8 15 fD Translation ID compared with PIDO PID1 PID2 or TIDZ all zeros 16 25 MASK SIZE MASK 4 KB 0x0000000000 16 KB 0x0000000001 64 KB 0x0000000011 256 KB 0x00000001 11 1 MB 0x0000001111 4 MB 0x0000011111 16 MB 0x0000111111 64 MB 0x0001111111 256 MB 0x0011111111 1 GB 0x0111111111 Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 192 Freescale Semiconductor Inc ES ee eae Chapter 5 Working with Debugger Table 5 28 e500v2 TLB1 Re
184. Perspective U Boot Debug 7 6 4 Debugging U Boot using Flash Devices This section explains how to debug U Boot using different flash devices From a memory layout perspective U Boot has four different stages till you get the U Boot prompt Code Warrior debug settings required to debug U Boot in flash memory differ from the settings required to debug U Boot in RAM Each of these stages requires specific debug settings that are described in the following sections for each flash device NOR NAND SPI and SD MMC e Points to remember e Debugging U Boot using NOR flash e Debugging U Boot using SPI and SD MMC flash e Debugging U Boot using NAND flash CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 287 pe Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 7 6 4 1 Points to remember This section talks about some important points to remember while debugging U Boot using a flash device Before debugging U Boot you should be aware of the board you are using if the U Boot was built on 32 or 36 bits and the configuration files you will use from the layout Select the correct initialization and memory files used by the CodeWarrior Debugger These configuration files have various names BoardName _uboot_ bits _ FlashDevice _ stage mem BoardName _uboot_ bits tcl BoardName is any available board for example P
185. Preprocessor Input Warnings Optimization Processor C C Language PowerPC Assembler Input General PowerPC Disassembler Disassembler Settings PowerPC Preprocessor Preprocessor Settings 3 3 1 1 PowerPC CPU Use the PowerPC CPU panel to specify the Power Architecture processor family for the project The properties specified on this page are also used by the build tools compiler linker and assembler The table below lists and describes the various options available on the PowerPC CPU panel Table 3 3 CodeWarrior Build Tool Settings PowerPC CPU Options Explanation Processor Generates and links object code for a specific processor This setting is equivalent to specifying the proc essor keyword command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 63 Build Properties for Power Architecture Table 3 3 CodeWarrior Build Tool Settings PowerPC CPU Options continued Floating Point Controls floating point code generation This setting is equivalent to specifying the fp keyword command line option Byte Ordering Generates object code and links an executable image to use the specified data format This setting is equivalent to specifying the big or 1ittle command line options Code Model Specifies the addressing mode that the linker uses when resolving
186. Properties for lt connection launch configuration gt window appears 3 Select CCSSIM2 ISS from the Connection type drop down list The Connection and Advanced tabs display options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 1 CCSSIM2 ISS Connection Tab Options E O O ae lle e 1 CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Select to specify the path of or browse to the executable file of the CCS server Manual launch Select to manually launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the TAP The table below describes the various options available on the Advanced tab page Table 5 2 CCSSIM2 ISS Advanced Tab Options oe O EA Target connection lost settings Try to reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Terminate the debug session If this option
187. SRR1 r6 SPRN_SRR0 r7 Oxfffff17c lt AsmSection 132 gt mtsrri r6 SPRN_SRR1 r6 El Oxfffff180 lt AsmSection 136 gt rfi 237switch as switch as 238 L1 DCache is used for initial RAM L1 DCache is used for initial RAM Allocate Initial RAM in data cach Allocate Initial RAM in data cache lis 13 CFG_INIT_RAM ADDRG h lis r3 CFG_INIT RAM ADDREh ori r3 r3 CFG_INIT RAM ADDR 1 Oxfffff184 lt AsmSection 140 gt lis r3 560 mfspr r2 LiCFGO ori r3 r3 CFG_INIT_RAM ADDR 1 andi E2 22 Oxiff Oxfffff188 lt AsmSection 144 gt ori r3 r3 0000 b mfanr r2 TICFGO cache size 1024 T 1 line Figure 7 24 U Boot Debug Translated Address Space in Flash 16 Deselect the Instruction Stepping Mode command when the instruction pointer is at switch as You can set breakpoints and use the Step Over Step Into and Step Out commands from line switch_as label in start s to line switch back to as 0 in start s At these locations the Instruction Address Space IS and Data Address Space DS bits from MSR are cleared so that the processor uses only the TLB entries with TS 0 See Points to remember for more details NOTE To set breakpoints in Stage2 after rfi start s you can set the Alternate Load Address by using setpicloadaddr reset CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 292 Freescale Semiconductor Inc Chap
188. Second Device In the above example the entry for the 8306 also includes the Hard Reset Control Word HRCW data that will overwrite the HRCW fetched by the 8306 upon power up or Hard Reset The Hard Reset Control Word parameters are optional The Code Warrior debugger not only supports Freescale devices but also supports non Freescale devices in a JTAG scan chain Each non Freescale device used in a scan chain is declared as Generic and it takes the following three parameters e JTAG Instruction Length CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 375 LEETE Setting up a remote system to use a JTAG configuration file e Bypass Command e Bypass Length The values for these three parameters are available in the device s data sheet or can be obtained from the manufacturer of the device The listing and figure below show a Freescale device 8560 connected with a non Freescale device PLA in a JTAG scan chain From the PLA s data sheet the JTAG Instruction Length 5 the Bypass Command 1 and the Bypass Length Ox1F Listing 8 7 Sample JTAG Initialization File including Non Freescale Devices 8560 Generic 5 1 0x1F TDI TDO TDI TDO PLA 8560 Chain pos 1 Chain pos 0 Figure 8 5 A Freescale Device and a Non Freescale Device in a JTAG Chain 8 4 Setting up a remote system to use a JTAG configuration file This section
189. Settings page select the tool for which you want to modify properties 9 Change the settings that appear in the page 10 Click Apply The IDE saves your new settings You can select other tool pages and modify their settings When you finish click OK to save your changes and close the Properties for lt project gt window 3 2 Restoring Build Properties If you had modified a build configuration of a project in the past you can restore the build properties to have a factory default configuration or to revert to a last known working build configuration To undo your modifications to build properties click Restore Defaults at the bottom of the Properties window This changes the values of the options to the absolute default of the toolchain By default the toolchain options are blank For example when a Power Architecture project is created the Power ELF Linker panel has some values set which are specific to the project By selecting Restore Defaults the default values of settings will return to blank state of the toolchain 3 3 Build Properties for Power Architecture Based on different processor families CodeWarrior for Power Architecture supports both Code Warrior and GCC builds tools CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 60 Freescale Semiconductor Inc EE ay Chapter 3 Build Properties The build tools used in a project depend upon the processo
190. Simics 8578 CodeWarrior Download E 2 CodeWarrior Debugger for EPPC 4 7 08 2 08 PM Suspended E Thread ID 0x0 Suspended Signal Halt received Description User halted thread 2main Q D Profiles b 14446 WKS test Source main core0 c 8 0x00100248 1 AsmSection D Profiles b 14446 WKS test Runtime crt0_e500 s 68 0x00100078 pe D Profiles b 14446 WKS test Debug Version test elf 4 7 08 2 08 PM Figure 5 6 Debug View 3 Expand the Thread group 4 Under the Thread group select the thread that has the main function The source code appears in the Editor view shown in the figure below The small blue arrow to the left of the source code indicates which code statement the processor s program counter is set to execute next CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 163 Working with Breakpoints e c main cored c 3 O F f d Ff A Project Stationery E j Fa j F PS r include lt stdio h gt a void main int i 0 printf Welcome to CodeWarrior lrin asm sc generate a system call exception to demonstrate the ISR Figure 5 7 Editor View 5 In the Editor view place the cursor on the line that has this statement print Welcome to CodeWarrior r n 6 Select Run
191. Start CodeWarrior TRK on Target System 24 stop 388 Symbolics 117 Symbols 92 System Call Services 114 T Target initialization commands 381 Target Initialization Files 379 TCF 144 TCP IP Connections 241 Testing a DTB File 330 TLB Register Details 788 Trace and Profile 727 Trace Configuration Page 37 translate 402 T series processors 447 U Updating the Linux Kernel Image 318 USB TAP 146 USB TAP Connections 311 User Space Debugging with On Chip Debug 367 Using a JTAG configuration file to override RCW 372 Using a JTAG configuration file to specify multiple inked devices on a JTAG chain 373 sing Debug Configurations Dialog Box 701 sing Debugger Shell to Set Hardware Breakpoints 66 sing Debugger Shell to View Caches 209 sing IDE to Set Hardware Breakpoints 166 sing memory configuration files 398 Gat a cad CodeWarrior Development Studio for Power Architecture Processors Targeting Manual 456 Freescale Semiconductor Inc Index Using Open Firmware Device Tree Initialization method 326 Using target initialization files 379 V Viewing Cache 205 Viewing memory 202 Viewing multiple processes and threads 257 Viewing Register Details 174 Viewing TLB Registers in Registers view 183 W Walking Ones 423 Warnings 73 95 Working with Breakpoints 162 Working with Debugger 131 Working with Hardware Diagnostic Action editor 419 Working with Hardware Tools 403 Working with IMMR 20
192. Syna A A A 371 8 3 Using a JTAG contraen file to override ROW sisi is EE Se aoai 312 8 3 Using a JTAG configuration file to specify multiple linked devices on a JTAG chain Jla 84 Setting up a remote system to tse a JTAG Comm Pirate Te ri 376 Chapter 9 Target Initialization Files 21 Unge eae didnt 379 92 ir SUNN gc nag adap IS 381 9al Pe rn lia i a A 382 Dan ake a E mime can iacer aia omapmeioned 382 Me FUN aie caisalas 383 Dah ANDI oor E 384 DZ UA Me MMR idad 384 ILLS DA a 385 A E o vines saveneaTaneReaniemaeaes 385 Pye 1 A A A E A E E ane ahaa eee 386 SEAL AS dada did 386 A A O nye ais 387 a LO E A ii 387 A ccceacstascheesiie alsa a tesesecat a A e E a adsueeeigecetas 388 E ER bey EE anit A gaa cbi yeqnedubacasasauunn tubes spunsgneas 388 A O O 388 Aislado aaa a 389 AS CIO iii dci 390 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page E eerie 391 DLL WARSI AA aaa 391 ALS Muela do 392 SPAMO A A e a desea E 393 AA E Pi ii di E A E is 394 2 A lr a A A E E A NE E 394 Chapter 10 Memory Configuration Files 101 Us memory ro lA as 398 10 2 Memory EE A a 398 1021 arto En TC OS os cece peas casas savdasneaiavanst E E T A E R 399 MA A ated pte dah rca A a 400 A a e E E madi ens E E E E E 400 AA TESSA aia A AAA A E AA e E da O gender 401 LES lA iis pics ncsacansecia casa vars copia a E R E ples sas edhe
193. Syntax mc go Examples mc go Resumes the selected cores associated with the current thread context mc group mc gr Display or edit multicore groups Syntax group group new lt type name gt lt name gt group rename lt name gt lt group index gt lt new name gt group remove lt name gt lt group index gt group removeall group enable disable lt index gt all Examples mc group Shows the defined groups including indices for use in the mc group rename enable remove set of commands mc group new 8572 Creates a new group for system type 8572 The group name will be based on the system name and will be unique The enablement of the group elements will be all non cores enabled all cores disabled mc group rename 0 My Group Name Renames the group at index 0 to My Group Name mc group enable 0 0 0 Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 236 Freescale Semiconductor Inc a a RE Chapter 6 Multi Core Debugging Table 6 2 Multi Core Debugging Commands continued Enables the group at index 0 and the element at index 0 0 of the mc group command mc group remove My Group Name Removes the group named My Group Name mc group removeall Removes all groups mc kill mc kill Terminates the debug session for selected cores associated wi
194. TAP Connection Tab Options A AA ES IN Ethernet TAP Hostname IP Specifies hostname or the IP address of the TAP JTAG settings JTAG clock speed kHz Specifies the JTAG clock speed By default set to 10230 kHz CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Click to specify the path of or browse to the executable file of the CCS server Manual launch Select to manually launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the TAP The table below describes the various options available on the Advanced tab page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 135 Connection types Table 5 4 Ethernet TAP Advanced Tab Options Target connection lost settings Try to reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Termi
195. TLBSetNumber argument Table 5 24 TLBSetNumber Values TLBSetNumber Value TLB Register Set Name 0 regPPCTLBO 1 regPPCTLB1 2 LRAT available only for e6500 core e printInvalid Determines whether only valid TLB register set entries will get displayed or all entries will get displayed It is an optional argument If no value is given to this argument it takes the value 0 which means only valid TLB register set entries will be displayed in the output If a non zero value is given to this argument then all the TLB register set entries will get displayed in the output To use the disp1ayt1 command perform the following steps 1 From the Code Warrior IDE menu bar select Window gt Show View gt Other The Show View dialog box appears 2 Expand the Debug group Select Debugger Shell 4 Click OK Go The Debugger Shell view appears in the view stack at the bottom of the IDE 5 In the Debugger Shell view run the following command displaytlb 1 The command output is shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 186 Freescale Semiconductor Inc CodeWarrior Debugger Shell X gt displaytlb 1 ID Effective address O OxFFFFFO O exFFFFFFFF 1 OxXFEO00000 OXFEFFFFFF 2 xE 0000 OxEFFFFFFF 3 0x30000000 OXBFFFFFFF 4 xC 000000 xCFFFFFFF 5 xD 0000 OxDFFFFFFF 6 xF80 0000 OxF803FFFF 7 x 0 000
196. The 32 bit address to assign to the program counter register This address may be specified in hexadecimal for example oxascpoo00 octal for example 025363200000 or decimal for example 2882338816 Example This command assigns the address oxc28737a4 to the program counter register alternatePC 0xc28737a4 9 2 1 2 ANDmem Performs a bit AND using the 32 bit value at the specified memory address and the supplied 32 bit mask and writes the result back to the specified address No read write verify is performed Syntax ANDmem 1 address mask Arguments address The address of the 32 bit value upon which to perform the bit AND operation This address may be specified in hexadecimal for example oxascnoooo octal for example 025363200000 or decimal for example 2882338816 mask 32 bit mask to use in the bit AND operation Example CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 383 Target initialization commands The command below performs a bit AND operation using the 32 bit value at memory location oxc30a0004 and the 32 bit mask oxrrrrrrrr The command then writes the result back to memory location oxc30a0004 ANDmem 1 0xC30A0004 OxFFFFFEFF 9 2 1 3 ANDmmr Performs a bit AND using the contents of the specified memory mapped register MMR and the supplied 32 bit mask and writes the result back to the specified
197. U Boot compiled on 36 bits on the Memory tab 7 Click OK to close the Memory Configuration File dialog box Click OK to close the Properties for lt Target gt dialog box 9 Click OK to close the Properties for lt connection gt dialog box oo CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 300 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software 10 Click Debug 11 12 13 The instruction pointer is now on the cpu_init_ function call NOTE For e500v2 cores 36 bit U Boot debug only a reset using BoardName uboot_36 stage2 tcl is needed If you used a different PIC value issue the following command in the Debugger Shell to reset PIC load address to the location specified in u boot el setpicloadaddr reset From the Debug view toolbar select the Instruction Stepping Mode 1 command From the Debug view toolbar select the Step Into gt command to step into cpu_init_f You can set breakpoints and use the Step Over Step Into and Step Out commands from line 396 in start s bl cpu init to line 980 in start s blr NEVER RETURNS NOTE To access breakpoints set on a previous debug session after changing the PIC address you will need to disable and enable back those breakpoints after the PIC value has been changed 7 6 4 3 4 Debugging U Boot in RAM This section tells how to debug U Boot in RAM using
198. Working with Projects 29 Working with Register Groups 180 Working with Registers 172 Working with TLB Registers 82 Working with Watchpoints 169 writemem b 388 writemem l 389 writemem w 389 writemmr 390 writereg 39 writereg128 392 writereg192 393 writereg64 391 writespr 394 Writing configuration words in U Boot code 283 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Freescale Semiconductor Inc 457 Index CodeWarrior Development Studio for Power Architecture Processors Targeting Manual 458 Freescale Semiconductor Inc How to Reach Us Home Page freescale com Web Support freescale com support Information in this document is provided solely to enable system and software implementers to use Freescale products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document Freescale reserves the right to make changes without further notice to any products herein Freescale makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale data sheets a
199. Y Y en e Add Click to open the Add file path or the Add directory path dialog box and create a file or directory path 2 Delete Click to delete the selected file or directory To confirm deletion click Yes es f in the Confirm Delete dialog box g Edit Click to open the Edit file path or Edit directory path dialog box and update the selected file or directory 5 Move up Click to move the selected file search path one position higher in the list Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 80 Freescale Semiconductor Inc Ey Chapter 3 Build Properties Table 3 22 CodeWarrior Build Tool Settings Input Toolbar Buttons continued on a g Move down Click to move the selected file search path one position lower in the list 3 3 1 6 2 General Use the General panel to specify the PowerPC assembler options that are specific to Power Architecture software development The table below lists and describes the various options available on the General panel Table 3 23 CodeWarrior Build Tool Settings General Options Labels Must End With Specifies whether labels must end with a colon Clear this option to omit the ending colon from label names that start in the first column This setting is equivalent to specifying the option colon off on reset assembler control option Directives Begin With
200. Yes in the Confirm Delete dialog box Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 93 Build Properties for Power Architecture Table 3 40 Tool Settings Includes Options continued e Edit Click to open the Edit directory path dialog box and update the selected directory search path Move up Click to re order the selected directory search path one position higher in the list e Move down Click to re order the selected directory search path one position lower in the list Include files include Process file as if include file appeared as the first line of the primary source file However the first directory searched for file is the preprocessor s working directory instead of the directory containing the main source file If not found the preprocessor s working directory is searched for in the remainder of the include search chain as normal If multiple include options are specified the files are included in the order they appear on the command line Use these toolbar buttons to work with the Include files include panel e Add Click to open the Add file path dialog box and specify the file Delete Click to delete the selected file To confirm deletion click Yes in the Confirm Delete dialog box Edit Click to open the Edit directory path dialog box and update the sel
201. _tm D workiUinux_2_6_168 mny_bulld Linux_11_07_2007 sources misc module_test mxc_wdog_tmn ko my_dev D workiLinux_jtag_onimy_devimy_dev ko Remove Remove Al Y Prompt for symbolics path not found Keep target suspended Figure 7 38 Kernel Module Debug Modules Tab The table below describes the various options available on the Modules tab Table 7 9 Kernel Module Project Launch Configuration Modules Tab Settings ee A A ATA Detect module loading Enables the debugger to detect module load events and insert an eventpoint in the kernel Disabling this setting delays the module loading This is useful in scenarios where multiple modules are loaded to the kernel and not all of them need to be debugged You can enable this setting again in the Modules dialog box The dialog box is available during the Debug session from the System Browser View toolbar gt Module tab Add Adds a module name along with the corresponding symbolic path This option displays a dialog box in the following scenarios e The file that you have selected is not a valid compiled kernel module e If the selected module already exists in the list with the same path Scan Automatically searches for module files and populates the kernel module list Remove Removes the selected items This button will be enabled only if a row is selected Remove All Removes all items This button will be enabled only if the kernel list contains any entries Prompt for
202. a san A Guin caeaphabinsaaaaauLanians 402 Chapter 11 Working with Hardware Tools ILI Flash pire or anime ii AAA 403 11 1 1 Cr ailash proprammer ia 404 11 1 2 Con gure ilash programmer target taS Keien reas 406 MAZA A a ta ae e a tinea 406 1 122 perito eet RAM REE pira tdt EEA A 407 ALZAS Add asn rie TO elisa tido ai 407 AAA Erasg Blank check ACOSO 408 LETAL Pro Ven cO Eoaea a a aea ai 409 Hia CUE A da 410 A o apitmisuranioemteranty 411 Liao Dump Blas Bete aici tema A 412 ILLA Profe Voprotect AMOS niicnisiii i msde eatanioeneatystatdereidaneplalaiaatantutueieealaaetiags 412 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 15 Section number Title Page 23 7 Secre LECHE AU 413 1 1238 Duplicato Acipa a RRR E 414 ILL239 Remove BOMOD nd ak nahn Eaa aane i aieiaa 414 11 13 Excoute Hash proorammer target la ra e ici 414 112 He Pedo di id 415 112 1 Erasme tash SS UC esa scanning sca shea cpap Sade EE R 417 11 22 We aA le ib 417 TES A ad 418 Lipase Creatine Harare Marnotes tab sail iia 418 11 332 Working with Hardware Diagnostic Acondic 419 Saa aon T yee E A 420 113 22 Memory ACCESE earen naris EE O A AA vepeuscnedeaanaedrunseostiaopoavewimeloneaens 421 T323 Loop Speel eraoro a a a ERRE E Ai 421 1132A Memory Te A 422 IESS Walkie Gie dc AEE EE 423 IL IE rt AA E E E 424 LIZA DI adi dada ode 424 LALA Address UE ds 424 ALAS Data I biia E A haa
203. abled every operation that triggers cache refresh such as step run to breakpoint will have to wait for cache data loading and sorting Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 207 Viewing Cache Table 5 36 Cache View Toolbar Menu Options continued ie ON E i aou View Memory Allows you to view the corresponding memory for the selected cache lines Lock Line Locks the selected cache lines Invalidate Line Invalidates the selected cache lines Flush Line Flushes the entire contents of the selected cache lines Synchronize Line Synchronizes selected cache data with memory data Lock Way Locks the cache ways specified with the Lock Ways menu option Locking a cache way means that the data contained in that way must not change If the cache needs to discard a line it will not discard locked lines such as lines explicitly locked or lines belonging to locked ways Unlock Way Unlocks the cache ways specified with the Lock Ways menu option Lock Ways Specifies the cache ways on which the Lock Way and Unlock Way menu options operate 5 12 3 Components of Cache View Below the toolbar there are two panes in the window separated by another vertical divider line The pane to the left of the divider line displays the attributes for each displayed
204. ach three 19 register IntHndlr isr InterruptHandler i InterruptHandeler routine in SPRGO SPR 272 eeeeeeeeeeleeia4 lis r9 16 eeeeeeeeee1ee1a8 addi r31 r9 388 register IntHndlr isr InterruptHandler 20 asm mtspr 272 0 r isr asm mtspr 272 rc isr E 0900000001001ac mtspr spr272 r31 4 m Y OJ E console 2N A Tasks J Memory a Remote Systems TA Target Tasks El Problems Executables EPPC board_project core00 elf core 0 Ba Commander 23 v Project Creation v Build Debug v Settings g Import project gt All J2 CodeWarrior Bareboard Project W All a oT P Figure 6 5 Viewing Debug Information for Core 0 5 Select and expand the General Purpose Registers group 6 Select Run gt Step Over The following actions occur Al CAME Drama Location SGPR31 0x00000000003dffb8 Virtual 0x00000000003dffbc Virtual e eE uu gt D EE t E 1 20 e Debugger executes the current statement and halts at the next statement e The program counter PC indicator moves to the next executable source line in the Source view Modified register values are highlighted in yellow 7 Select Window gt New Window Another instance of the Debug perspective opens in a new window displays multiple instances of an active debug session In the Debug view the status of the program changes to suspended The figure below CodeWarrior Development Studio for Power Architecture Proc
205. address space by issuing the setpicloadaddr oxFFF40000 command in the Debugger Shell Now you do not need to manually set it from the Debugger Shell in Stage 1 7 7 Debugging the Linux Kernel This section shows you how to use the CodeWarrior debugger to debug the Linux kernel The Linux operating system OS works in two modes kernel mode and user mode The Linux kernel operates in kernel mode and resides at the top level of the OS memory space or kernel space The kernel performs the function of a mediator among all the CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 309 AET Debugging the Linux Kernel currently running programs and between the programs and the hardware The kernel manages the memory for all the programs processes currently running and ensures that the processes share the available memory such that each process has enough memory to function adequately In addition the kernel allows application programs to manipulate various hardware architectures via a common software interface User mode uses the memory in the lowest level of the OS memory space called the user space or the application level At the application level a program accesses memory or other hardware through system calls to the kernel as it does not have permission to directly access these resources Debugging the Linux kernel involves the following major actions
206. ag Style Displays debug information using the ctags style Display STABS Information Displays any STABS information in the file in raw form Display DWARF Information Displays any DWARF information in the file Display Symbol Table Content Displays the contents of the symbol tables Display Dynamic Symbol Table Content Displays the contents of the dynamic symbol table Display Relocation Entries Displays the relocation entries in the file Display Dynamic Relocation Entries Displays the dynamic relocation entries in the file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 100 Freescale Semiconductor Inc Chapter 4 Debug Configurations A CodeWarrior project can have multiple associated debug configurations A debug configuration is a named collection of settings that the CodeWarrior tools use Debug configurations let you specify settings such as e The files that belong to the debug configuration e Behavior of the debugger and the related debugging tools This chapter explains e Using Debug Configurations Dialog Box e Customizing Debug Configurations e Reverting Debug Configuration Settings 4 1 Using Debug Configurations Dialog Box The Debug Configurations dialog box allows you to specify debugger related settings for your CodeWarrior project NOTE As you modify a launch configuration s debugger settings you create pending or unsaved changes to that l
207. age mem Click OK Click OK Select Run gt Debug Configurations to open the Debug Configurations dialog box Expand the CodeWarrior Attach group Right click the P4080 u Boot stage 1 launch configuration and select Duplicate from the context menu that appears A new launch configuration appears in the CodeWarrior Attach group On the right hand side in the Name text box enter an appropriate name For example P4080 U Boot Stage 2 On the Main page in the Remote system panel from the System drop down list select the p1080Ds u boot mem translation system On the Debugger tab in the PIC page clear the Alternate Load Address checkbox Duplicate the p4080 u Boot stage 1 launch configuration On the right hand side in the Name text box enter an appropriate name For example P4080 U Boot Stage 3 On the Debugger tab in the PIC page clear the Alternate Load Address checkbox Duplicate the p4080 u Boot stage 1 launch configuration On the right hand side in the Name text box enter an appropriate name For example P4080 U Boot Stage 4 On the Debugger tab in the PIC page select the Alternate Load Address checkbox In the text box that comes up enter the address printed by U Boot as Now running in RAM You have successfully created launch configurations for all the four stages of U Boot debug From a memory layout perspective U Boot has four different stages till you get the U Boot prompt CodeWarrior debug settings re
208. ain symbolic debugging information and have no optimizations while the binary product by a Release build configuration might contain no symbolics and be highly optimized NOTE The settings of the CodeWarrior IDE s build and launch configuration correspond to an object called a target made by the classic CodeWarrior IDE This chapter explains e Changing Build Properties e Restoring Build Properties e Build Properties for Power Architecture 3 1 Changing Build Properties You can modify the build properties of a project to better suit your needs To change build properties of a project perform the steps given below 1 Start the CodeWarrior IDE 2 In the CodeWarrior Projects view select the project for which you want to modify the build properties 3 Select Project gt Properties from the menu bar CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 59 AAA A A lt lt Restoring Build Properties The Properties for lt project gt window appears The left pane of this window shows the build properties that apply to the current project 4 Expand the C C Build property 5 Select Settings 6 Use the Configuration drop down list in the right pane to specify the launch configuration for which you want to modify the build properties 7 Click the Tool Settings tab The corresponding page appears 8 From the list of tools on the Tool
209. al Cache Inhibited option disregards the cache and accesses whatever is in the memory This option allows you to access the data directly from the main memory even if the data or address is available in one of the caches The Physical Cache Inhibited memory space is only available on processors based on e500mc e5500 e6500 cores CAUTION The e500mc e5500 e6500 core architecture specifies that it is a programming error to inter mix cache inhibited with cacheable accesses to the same memory range If this error is encountered it can lead to a number of problems like stale data and un intended corruption of neighboring locations Also you should not perform a cacheable access to a memory range which is defined as cache inhibited in the MMU When using the Virtual memory space the debugger performs virtual to physical translations and based on the MMU setup it requires the correct cacheable cache inhibited attribute for the particular memory range e For Linux debugging CodeWarrior uses the Kernel Awareness plug in to automatically extract the cacheable cache inhibited attribute from the CAM TLB registers I bit of the WIMGE or the PTE kernel structure e For bareboard debugging when CodeWarrior is not configured for reading the MMU it relies on the information available in the memory configuration file The translate directives are used to inform the debugger of MMU translations and cacheable cache inhibited attribute even for 1 1 tra
210. al as the secondary cores are initialized in the Linux kernel after MMU initialization Code Warrior will automatically add other cores in the Debug view after the kernel initializes the secondary cores Set software or hardware breakpoints for any stage before or after MMU initialization To set a software breakpoint for the entry point address for example address 0x0 issue the following command in the Debugger Shell view bp 0x0 Using the U boot console load the Linux kernel DTB file and RAM disk rootfs from flash or from TFTP Debug the kernel CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 338 Freescale Semiconductor Inc O AAA Chapter 7 Debugging Embedded Linux Software The debugger halts execution of the program at whatever breakpoints have been set in the project Typical stages involved in debugging the kernel are discussed below a Debugging the kernel at the entry point The Code Warrior debugger will stop at the kernel entry point if any software or hardware breakpoint has been set for entry point NOTE For the debugger to stop at the kernel entry point set a breakpoint before loading the kernel from the U boot console At the entry point the MMU is not initialized and therefore debugging before MMU initialization also applies in this stage b Debugging the Kernel before the MMU is enabled Being in early debug stage the user sho
211. al harpreetsethi LinuxBSP tib e500mc 2008051 pe D Temp u boot 1 3 3 1c2 u boot 7 30 08 3 29 PM Ce i gt S resetvec S E m section resetvec ax gt b _start_e500 Figure 7 20 Debug Perspective U Boot Debug 7 5 6 Create launch configurations for U Boot debug stages Finally you need to create launch configurations for different U Boot debug stages CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 278 Freescale Semiconductor Inc eee eee Chapter 7 Debugging Embedded Linux Software During a typical U Boot start up sequence the target processor starts executing U Boot in flash memory U Boot then enables the Memory Management Unit MMU and relocates itself to RAM From the memory layout perspective U Boot debug has four different stages For each of these stages you will need a separate launch configuration You have already configured the launch configuration settings for the first stage in the P4080 U Boot stage 1 launch configuration To create launch configurations for the remaining three stages for U Boot debug NOTE Create these launch configurations only if you are using the hardware option to debug U Boot 1 To open the Remote Systems view select Window gt Show View gt Other The Show View dialog box appears 2 Expand the Remote Systems group and select Remote Systems The Remote Systems view appears as a tabbed view at the bottom
212. ally launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies the port number to launch the CCS server on Connect server to TAP Select to enable the CCS server to connect to the TAP The table below describes the various options available on the Advanced tab page Table 5 6 Gigabit TAP Trace Advanced Tab Options IN gt IA VEAS ee Target connection lost settings Try to reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 138 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 6 Gigabit TAP Trace Advanced Tab Options continued Terminate the debug session If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target does not respond in the provided time interva
213. alog box appears 7 In the Run out of reset column select the checkboxes for all cores except core 0 After the reset completes core 0 appears stopped at the reset vector CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 296 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software NOTE To jump over the on chip ROM code that performs block copy from SD EPROM and the reset sequence you can set a hardware breakpoint at _start_es00 by issuing the bp hw _start_e500 command 8 From the Debug view toolbar select the Instruction Stepping Mode 1 command 9 From the Debug view toolbar select the Step Into gt command to step into _start_e500 The start s file appears in the editor area and the disassembled code with memory addresses appears in the Disassembly view S start s E z DE Outline 51 Disassembly 3 A li r0 2 a clear registers arrays not reset by hardware Oxfffff000 lt AsmSection gt li r0 2 E mtspr L1CSRO r0 invalidate d cache L1 Oxfffff004 lt AsmSection 4 gt mtspr spri010 r0 gt AS mtspr L1CSR1 r0 invalidate i cache mtspr LI1ICSRO ro invalidate d cache Oxfffff008 lt AsmSection 8 gt mtspr spri011 r0 mtspr L1CSR1 r0 invalidate i cache mfspr ri DBSR m spr r1 DBSR Oxfffff00c lt AsmSection 12 gt mfspr rsp spr304 mtspr DBSR r1 Clear all va
214. anage the communications interface between the debugger and Linux system For details see Install Code Warrior TRK on Target System The table below lists the options available on the page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 216 Freescale Semiconductor Inc Ey Chapter 5 Working with Debugger Table 5 45 Linux Application Launch Configurations Page Setting e 22222 DIO 22 el CodeWarrior TRK Select to use the CodeWarrior Target Resident Kernel TRK protocol to download and control application on the Linux host system TAP Address Specifies the IP address of the Linux host system the project executes on Port Specifies the port number that the debugger will use to communicate to the Linux host Remote Download Path Specifies the host directory into which the debugger downloads the application 5 16 5 Debug Target Settings Page Use the Debug Target Settings page to specify debugger connection type board type launch configuration type and connection type for your project This page also allows you to configure connection settings for your project The table below describes the options available on the page Table 5 46 Debug Target Settings page settings E Options Descriptio SS Debugger Connection Types Specifies what target the program executes on e Hardware Select to execute the program on the hardware available for the pr
215. anslated address Space 304 7 6 4 4 3 Debugging U Boot after switching back to initial address space 306 Pose Debizsme U Boot in RAM cia dias 308 ee aa A A A R E A EA 309 Peed Semme Lips Targe HUINI dioss 310 ERLI USE TAF CnES oriee E uisadbsnenc bia aan yous cone aonke TE N 311 TAL Establishing Col Ar 311 fase installing the Board Suppor Packase BSP aa 312 Pade Conecte Bud Toolea E O ead 314 2154 Conie mme the Linos Rel id pa 314 213 Creating a CodeWarrior Project using the Linux Kernel Tate emociono incaico 316 231 Updating the Limix Kernel Image as 318 7 3 1 1 Cache Symbohes Between Sessions is Enabled cinco cita 318 FA5 12 Cache Syinbohes Between Sessions is Disabled oct 318 Fee Contisnane the kermel project Lor sprites 319 176 1 Contigunng a Download Kernel Debog Sonar cir rn iias 319 1182 Conhguring an Attach Kernel Debug Sena essa sitiada i s 320 IS OO P RAM IR 323 Pao Flattened Device Tree Tutal zation a 324 Tipa PESA daa 325 1764 Using Open Firmware Device Tree Initialization method inisiasie 326 ER ea A 326 AOA Edita ke DTS Ple A A A as 328 FAAS Compllide the DIST ias 329 FAA Testing DUB Pl A 330 Sib Modifying a DTS le ra 330 7 7 7 Debugging the kernel to download the kernel RAM disk and device tre oooconinnnonnncnnonnonnnanconnonncnnncnncnnconos 331 7a Debuggme the kernel based on MMU nta is PA a 332 7 7 8 1 Debugeni the Kemiel before the MMU is Enabled ci ccciccccccsscacccsdessassoctasadesbndns
216. arious options available on the Preprocessor Settings panel Table 3 48 Tool Settings Preprocessor Settings Options Explanation Handle Directives Only When preprocessing handle directives but do not expand macros This setting is equivalent to specifying the fdirectives only command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 98 Freescale Semiconductor Inc Ey Chapter 3 Build Properties Table 3 48 Tool Settings Preprocessor Settings Options continued Print Header File Names Select to print the name of each header file used This setting is equivalent to specifying the H command line option 3 3 2 6 PowerPC Disassembler Use the PowerPC Disassembler panel to specify the command options and expert settings for the Power ELF disassembler The table below lists and describes the various options available on the PowerPC Disassembler panel Table 3 49 Tool Settings PowerPC Disassembler Options Command Specifies the PowerPC GCC command line disassembler required to disassemble the generated object code All options Shows the actual command line the disassembler will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 2 6 1 Disassembler Settings Use the Disassembler Settings panel to specify or modify the exi
217. arrior gt CW for Power Architecture vnumber gt CodeWarrior IDE where number is the version number of your product The Workspace Launcher dialog box appears prompting you to select a workspace to use NOTE Click Browse to change the default location for workspace folder You can also select the Use this as the default and do not ask again checkbox to set default or selected path as the default location for storing all your projects 2 Click OK The default workspace is accepted The CodeWarrior IDE launches and the Welcome page appears NOTE The Welcome page appears only if the CodeWarrior IDE or the selected workspace is started for the first time Otherwise the Workbench window appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 51 Creating projects 3 10 11 Click Go to Workbench on the Welcome page The workbench window appears Select File gt New gt CodeWarrior Linux Project Wizard from the CodeWarrior IDE menu bar The CodeWarrior Linux Project Wizard launches and the Create a CodeWarrior Linux Project page appears Specify a name for the new project in the Project name text box For example enter the project name as linux project If you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired loc
218. arrior TAP is used as interface to communicate with the hardware device To configure the settings of a CodeWarrior TAP connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Select CodeWarrior TAP from the Connection type drop down list The Connection and Advanced tabs display the options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 15 CodeWarrior TAP Connection Tab Options Er o O o l S CodeWarrior TAP Hardware Connection Specifies CodeWarrior TAP interface to communicate with the hardware device CodeWarrior TAP supports both USB and Ethernet network interfaces Hostname IP Specifies hostname or the IP address of the TAP NOTE Enabled only if Hardware Connection is set to Ethernet Serial Number Select and specify the USB serial number of the USB TAP required only if using multiple CodeWarror TAPs over USB JTAG settings JTAG clock speed kHz Specifies the JTAG clock speed By default set to 10230 kHz CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the
219. art a debugging session and then open the Registers view To change a bit field perform these steps 1 In the Registers view view register details 2 Expand the register group that contains the bit field you want to change Register details appear in the Registers view shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 176 Freescale Semiconductor Inc Chapter 5 Working with Debugger Bit Fields 0 0 1 0000000000000000000000 0000000 Field SO 0 0 Y 7 0 Actions Format rex v Description XER 20000000 Integer Exception Register XER Bits in the integer exception register XER are set based on the operation of an instruction considered as a whole not on intermediate results for example the Subtract from Carrying instruction subfc the result of which is specified as the sum of three values sets bits in the XER based on the entire operation not on an intermediate sum Bit Field Values so bits 0 0 0 oy bits 1 1 90 CA bitsl zza A bits 3 24 0 5 31 No of bytesbits 25 3 Figure 5 14 Registers View Register Details 3 From the expanded register group above the register details select the name of the register that contains the bit field that you want to change The Bit Fields group displays a graphical representation of the selected bit field The Description group displays explana
220. artition allocates the guest gt gcpus member after this they will enter idle_100p from src misc s The primary core CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 365 AA A A A rt Debugging the P4080 Embedded Hypervisor of each partition will continue in the init guest primary function with different device tree operations 7 10 1 5 Debugging the Hypervisor Partitions Image Loading Process After debugging the hypervisor partitions initialization process the image loading process begins at the start_load_guest OF load_guest functions from the guest c file Each primary boot core will set a event of this type in the init_guest function causing one of this functions to be called 1 From the start_load_guest function the primary core of each partition begins the process of image loading for each partition 2 In the start_guest_primary function the load_images function call will load the specific files for each partition 3 Set different breakpoints in these functions for debugging the image loading process 7 10 1 6 Debugging All Cores when Starting the Guest Applications Once the images for each partition are loaded the primary core of each partition should take the secondary partition cores from the idle loop and start the partition The steps to do this 1 In the start guest primary noload function each partition primary core sets a g
221. as _option has intrinsic has feature and _suppports are treated as macros to the equivalent GCC directives Therefore has intrinsic _has feature and _suppports have been set to false Equivalent GCC options are used to replace the various capabilities provided by the _option directive e The dec1spec keyword has been replaced with _attribute_ e The mst tniive_ declaration becomes _in1ine under CodeWarrior To avoid multiple definition errors generated by the GCC linker replace _in1ine with with _attribute_ weak e For function definitions under CodeWarrior the function attribute mst cant THROW follows the function name For instance isalnum int c MSL CANT THROW To avoid an error message under GCC the function attribute must be moved before the function name For instance msi CANT THROW isalnum int c e GCC does not allow pointer arithmetic unless it results in a lvalue Otherwise the compiler issues an error For example 11 int left is an error in GCC To overcome this error split the pointer arithmetic by introducing temporary pointers of the appropriate type e In the math_api h file certain function definitions are located under a conditional statement if MSL use INLINE If this condition is not set the code for these functions is not generated The result is a linker error for all the function definitions that fall under this conditional statement To prevent the error enable the declaration
222. ascp octal for example 0125715 or decimal 43981 value The 8 bit value to write to the specified memory address This value may be specified in hexadecimal for example oxrr octal for example 0377 or decimal for example 255 Example This command writes the byte ox1a to the memory location ox0001FF00 writemem b 0x0001FF00 0x1A CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 388 Freescale Semiconductor Inc Chapter 9 Target Initialization Files 9 2 1 13 writemem w Writes a word 16 bits of data to the specified memory address Syntax writemem w address value Arguments address The 32 bit memory address to which to assign the supplied 16 bit value This address may be specified in hexadecimal for example oxascnoooo octal for example 025363200000 or decimal for example 2882338816 value The 16 bit value to write to the specified memory address This value may be specified in hexadecimal for example oxrrrr octal for example 0177777 Or decimal for example 65535 Example This command writes the word ox1234 to memory location 0x0001FF00 writemem w 0x0001FF00 0x1234 9 2 1 14 writemem Writes a long integer 32 bits of data to the specified memory location Syntax writemem 1 address value Arguments address The 32 bit memory address to which to assign the supplied 32 bit value This address may b
223. ase handling during multi core debugging specifically during Linux kernel debugging Changing the register value set by the debugger can cause the target software behave unexpectedly during debug sessions if the target software relies on time base synchronization 13 6 QoriQ Qonverge processors This section talks about the limitations and workarounds of the CodeWarrior debugger for the QorIQ Qonverge processors CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 449 Generic processors The Qonverge processor family includes the following processors e e500v2 BSC9131 and BSC9132 e e6500 B4420 B4460 B4860 and G4860 NOTE For e500v2 processors see PowerQUICC III processors All the information from PowerQUICC III processors related to e500v2 cores also applies to Qonverge processors based on e500v2 core Similarly for e6500 processors see T series processors Choosing appropriate target type Qonverge processors bundle together the cores of different architectures for example BSC9131 includes a Power e500v2 core and a StarCore SC3850 core The JTAG topology can be configured to either include cores of both architectures in the same daisy chain or to access only the Power cores on the JTAG port To distinguish between the two modes in which the processor can be configured the debugger uses two different target types and consequently two
224. ash Configuration File pop up menu is updated with the supported configurations for the processor from the launch configuration 3 Choose a flash configuration from the Flash Configuration File pop up menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 417 TE Hardware diagnostics 4 Select the Unprotect flash memory before erase checkbox to unprotect flash memory before erasing the flash device 5 Type the file name in the File textbox You can use the Workspace File System or Variables buttons to select the desired file 6 Type the offset location in the Offset textbox 7 Click the Erase and Program button 11 3 Hardware diagnostics The Hardware Diagnostics utility lets you run a series of diagnostic tests that determine if the basic hardware is functional These tests include e Memory read write This test only makes a read or write access to the memory to read or write a byte word 2 bytes and long word 4 bytes to or from the memory For this task the user needs to set the options in the Memory Access group e Scope loop This test makes read and write accesses to memory in a loop at the target address The time between accesses is given by the loop speed settings The loop can only be stopped by the user which cancels the test For this type of test the user needs to set the memory access settings and the loop speed e Memor
225. at you can use to interact with CodeWarrior debugger by issuing commands You can use the command line interface together with various scripting engines such as the Microsoft Visual Basic script engine the Java script engine TCL Python and Perl You can even issue a command that saves your command line activity to a log file You use the Debugger Shell view to issue command lines to the IDE For example you enter the command debug in this window to start a debugging session The window displays the standard output and standard error streams of command line activity To open the Debugger Shell view follow these steps 1 Switch the IDE to the Debug perspective and start a debugging session 2 Select Window gt Show View gt Other The Show View dialog box appears Expand the Debug group Select Debugger Shell Click OK The Debugger Shell view appears in the view stack at the bottom of the IDE nA To issue a command line command type the desired command at the command prompt gt in the Debugger Shell view then press Enter or Return The command line debugger executes the specified command NOTE To display a list of the commands the command line debugger supports type help at the command prompt and press Enter The help command lists each supported command along with a brief description of each command CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06
226. ation Select clear to enable disable automatic selection of the configuration to be built based on the path to the program Enable auto build Enables auto build for the debug configuration which can slow down launch performance e Disable auto build Disables auto build for the debug configuration which may improve launch performance No build action will be performed before starting the debug session You have to rebuild the project manually e Use workspace settings default Uses the global auto build settings e Configure Workspace Settings Opens the Launching preference panel where you can change the workspace settings It will affect all projects that do not have project specific settings Target settings Specifies the connection and other settings for the target The options include e Connection Specifies the applicable Remote System configuration e Edit Click to edit the selected Remote System configuration e New Click to create a new Remote System configuration for the selected project and application e Execute reset sequence Select to apply reset settings specified in the target configuration when attaching to a target Alternatively clear the option to ignore reset settings NOTE This option is not available when Attach debug session type is selected e Execute initialization script s Select to execute the initialization script s specified in the target configuration when attaching to a tar
227. ation from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location Click Next The Processor page appears Select the target processor for the new project from the Processor list Select Application from the Project Output group to create an application with e1 extension that includes information required to debug the project Click Next The Build Settings page appears Select a toolchain for Linux applications from the Toolchain group Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform NOTE The current release does not include toolchains for Linux applications by default To add the required Linux build tools support you should install the corresponding service pack for the required target For more information on CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 52 Freescale Semiconductor Inc 12 13 14 15 16 17 18 19 20 Chapter 2 Working with Projects installing service packs see the Service Pack Updater Quickstart available in the lt cwrnsta1ipir gt pa folder Select the programming language you want to use from the Languag
228. ault is 65536 This option is disabled and cannot be selected if you have specified the 1cf file in the Link Command File Icf text box Data Address Sets the loading address of the data This setting is equivalent to specifying the dataaddr addr command line option The addr value is an address in decimal or hexadecimal format Hexadecimal values must begin with 0x The default is the address after the code and large constant sections This option is disabled and cannot be selected if you have specified the 1cf file in the Link Command File Icf text box Small Data Address Sets the loading address of small data This setting is equivalent to specifying the sdataaddr addr command line option The addr value is an address in decimal or hexadecimal format Hexadecimal values must begin with 0x The default is the address after the large data section This option is disabled and cannot be selected if you have specified the 1cf file in the Link Command File Icf text box Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 66 Freescale Semiconductor Inc Chapter 3 Build Properties Table 3 7 CodeWarrior Build Tool Settings Input Options continued Small Data 2 Address Sets the loading address of small constant data This setting is equivalent to specifying the sdata2addr addr command line option The addr value is an a
229. aunch configuration To save the pending changes you must click the Apply button of the Debug Configurations dialog box or click the Close button and then the Yes button Table 4 1 Debug Configuration Tabs Main Arguments Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 101 Using Debug Configurations Dialog Box Table 4 1 Debug Configuration Tabs continued Debugger Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness Trace and Profile Source Environment Common 4 1 1 Main Use this tab to specify the project and the application you want to run or debug You can also specify a remote system configuration on this tab The remote system configuration is separated into connection and system configurations allowing you to define a single system configuration that can be referred to by multiple connection configurations The launch configurations refer to a connection configuration which in turn refers to a system configuration NOTE The options displayed on the Main tab vary depending on the selected debug session type The following figure shows the Main tab CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 102 Fre
230. aunch configurations to default values You can change these default values as per your requirements To change the debugger settings and start debugging a CodeWarrior project perform these steps 1 From the CodeWarrior IDE menu bar select Run gt Debug Configurations The CodeWarrior IDE uses the settings in the launch configuration to generate debugging information and initiate communications with the target board The Debug Configurations dialog box appears The left side of this dialog box has a list of debug configurations that apply to the current application 2 Expand the CodeWarrior configuration 3 From the expanded list select the debug configuration that you want to modify 4 Click Apply to save the new settings Tip You can click Revert to undo any of the unsaved changes The CodeWarrior IDE restores the last set of saved settings to all pages of the Debug Configurations dialog box Also the IDE disables Revert until you make new pending changes 5 Click Debug to start the debugging session You just modified the debugger settings and initialized a debugging session 5 2 Consistent debug control This section describes the consistent debug control feature of the CodeWarrior debugger CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 132 Freescale Semiconductor Inc E 7 Chapter 5 Working with Debugger When you attempt to stop the target during a
231. ay fail after performing the state move operations Error on IR scan after state moves 5 4 5 Reading JTAG IDCODEs test This test scans all JTAG IDCODEs on the JTAG chain and displays the detected JTAG IDCODEs If the test fails then an error Failed to scan the JTAG IDCODEs on the chain is displayed The method used to scan the IDCODEs depends on a feature that is recommended by the JTAG standard but is not mandatory It works on most parts but not on all parts If the JTAG chain has a part provided by Freescale or third party that does not implement the recommended behavior then the test results might be wrong and misleading and confirming the successful completion of the test will be difficult 5 5 Editing remote system configuration CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 154 Freescale Semiconductor Inc SSS Chapter 5 Working with Debugger The remote system configuration model defines the connection and system configurations where you can define a single system configuration that can be referred to by multiple connection configurations To edit the system configuration perform these steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Click Edit next to the Tar
232. bit settings 54 59 LPIDR Translation logical partition ID 60 91 Reserved 92 115 RPN Real page number 116 127 Reserved Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 196 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 31 e5500 TLBO Registers L2MMU_TLBO through L2MMU_TLB511 continued 128 179 EPN Effective page number 180 191 Reserved The table below shows e5500 TLB 1 registers starting from L2zMMU_CAMO through L2MMU_CAM63 Table 5 32 e5500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 0 3 TSIZE Defines the page size of the TLB entry 4 4 TS Translation space Compared with MSR IS instruction fetch or MSR DS memory reference to determine if this TLB entry may be used for translation 5 7 Reserved 8 15 TID Translation identity Defines the process ID for this TLB entry 16 25 MASK SIZE MASK 4 KB 0x0000000000 16 KB 0x0000000001 64 KB 0x000000001 1 256 KB 0x00000001 11 1 MB 0x0000001111 4 MB 0x0000011111 16 MB 0x0000111111 64 MB 0x0001111111 256 MB 0x0011111111 1GB 0x0111111111 4 GB 0x1111111111 26 26 Reserved 27 27 W Write through 28 28 Caching inhibited 29 29 M Memory coherency required 30 30 G Guarded 31 31 E Endianness Determines endianness for the corresponding page 32 32 UR User r
233. board through a monitor program such as CodeWarrior TRK or through a hardware probe such as CodeWarrior TAP over USB For more information see CodeWarrior Development Studio Common Features Guide and the Working with Debugger chapter of this manual 1 5 6 Main standard libraries The main standard libraries MSL are ANSI compliant C and C standard libraries Use these libraries to help you create applications for Power Architecture processors The Power Architecture versions of the MSL libraries have been customized and the runtime has been adapted for Power Architecture processor development For more information about MSL see MSL C Reference and MSL C Reference 1 5 7 CodeWarrior Profiling and Analysis tools CodeWarrior Profiling and Analysis tools provide visibility into an application as it runs on the simulator and hardware This visibility can help you understand how your application runs as well as identify operational problems The tools also provide user friendly data viewing features e Simultaneously step through trace data and the corresponding source and assembly code of that trace data e Export source line information of the performance data generated by the simulator into an Excel file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 25 CodeWarrior IDE e Export the trace and function data generated by simulator and
234. bugger displays the register s contents The options are e Default Viewer The register s contents are displayed as a hexadecimal value e Register Details Panel The register s values are display in a bit format along with a description of their purpose Add Register Group Opens a dialog box that you can use to create a new collection of registers to display in the Registers view Restore Default Register Groups Resets the custom groups of registers created using the Add Register Group option and restores the default groups provided by the debugger as they were when Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 179 Working with Registers Table 5 23 Registers View Context Menu Options continued A sion CodeWarrior was installed Note that if you select this option all custom groupings of registers done by you are lost Add Watchpoint C C Opens the Add Watchpoint dialog box proposing to set a watchpoint on an expression representing the register The debugger sets the watchpoint according to the settings that you specify in the Add Watchpoint dialog box The Breakpoints view shows information about the newly set watchpoint The Problems view shows error messages when the debugger fails to set the watchpoint Watch Adds a new watch expression entry to the Expressions
235. c 445 QorlQ communications processors When debugging bareboard applications CodeWarrior needs to be informed of the actual MMU configuration regarding translated areas and cacheable cache inhibited attribute of the memory ranges For example Translate virtual addresses to corresponding physical cacheable i addresses translate v 0x00000000 p 0x00000000 0x80000000 translate v 0xE0000000 1 0xE0000000 0x10000000 translate v 0xF4000000 p 0xF4000000 0x00100000 translate v 0xF4100000 i 0xF4100000 0x00100000 translate v 0xF4200000 p 0xF4200000 0x00100000 translate v 0xF4300000 i 0xF4300000 0x00100000 translate v 0xFE000000 i 0xFE000000 0x01000000 translate v 0xFFFFFO00 i 0xFFFFFO00 0x00001000 or cache inhibited See translate for more information on the translate command NOTE The debugger can also automatically read the translations from the target MMU To have this behavior all transiate directives need to be removed from the memory configuration file For more information see Memory translations Working with software breakpoints For e500mce and e5500 cores the debugger implements software breakpoints by using the dedicated debug notify halt dnh instruction When the dnh opcode is encountered the target stops without taking an exception Working with watchpoints The e500mc and e5500 cores implement two data address compare registers The CodeWarrior debugger uses both these registers to place a single watchpoint
236. c fork fork _ attribute weak alias __libe fork 14 Create a header file ab_fork n in your project directory and add the below code in the header file Listing 7 4 Source Code for db_fork h include lt asm unistd h gt include lt sys syscall h gt include lt errno h gt include lt signal h gt include lt sched h gt define NR db clone NR clone define _ db fork syscall __ NR__ db clone SIGCHLD CLONE PTRACE 0 15 Enter the below code in the editor window of fork c file Listing 7 5 Source Code for fork c fork c include lt stdio h gt include lt unistd h gt include lt stdlib h gt include lt sys ptrace h gt include lt sys errno h gt include lt sys types h gt include lt signal h gt include lt sched h gt include lt fcntl h gt include lt dlfcn h gt Function Prototypes CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 256 Freescale Semiconductor Inc SSS a ew ee ee ee Chapter 7 Debugging Embedded Linux Software int fni int j int fn2 int 1 int main void int pid x int shared local printf Fork Testing r n fflush stdout gint 5 shared local 5 pid fork if pid 0 x 0 gint 10 shared local fn1 9 printf nForked Child printf nChild Global d Shared_Local d gint shared_local printf nChild pid d pa
237. cable from a serial port of the CodeWarrior debug host to a serial port of the target board 2 On the CodeWarrior debug host computer open a terminal emulator program of your choice for example minicom for a Linux host 3 From the terminal emulator program open a console connection to the target hardware Use the connection settings given in the table below Table 7 6 Terminal Connection Settings Baud rate 115 200 bits per second Data bits 8 Parity None Stop bits 1 Flow control Hardware NOTE See the board specific README file inside the stationery wizard project to find out more details on the serial connection settings changing the serial port on the board and the type of serial cable to use 4 Test the connection by turning on the test board with the power switch and viewing the boot messages in the console connection CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 312 Freescale Semiconductor Inc E Ey Chapter 7 Debugging Embedded Linux Software 7 7 2 Installing the Board Support Package BSP This section describes installation of a BSP on a Linux computer NOTE The BSP versions keep changing frequently For different BSP versions you might encounter build environments based on ltib bitbake or other tools The subsequent sections will describe necessary procedures and use specific examples from real Freescale BSPs for illus
238. cache inhibited i addresses translate v 0x00000000 p 0x00000000 0x80000000 translate v 0xE0000000 i 0xE0000000 0x10000000 translate v 0xF4000000 p 0xF4000000 0x00100000 translate v 0xF4100000 i 0xF4100000 0x00100000 translate v 0xF4200000 p 0xF4200000 0x00100000 translate v 0xF4300000 i 0xF4300000 0x00100000 translate v 0xFE000000 i 0xFE000000 0x01000000 translate v 0xFFFFFO00 i 0xFFFFF000 0x00001000 See translate for more information on the translate command NOTE The debugger can also automatically read the translations from the target MMU To have this behavior all transiate directives need to be removed from the memory configuration file For more information see Memory translations For more information see Viewing memory Working with software breakpoints For e6500 cores the debugger implements software breakpoints by using the dedicated debug notify halt dnh instruction When the dnh opcode is encountered the target stops without taking an exception Working with watchpoints CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 448 Freescale Semiconductor Inc ES ee Chapter 13 Debugger Limitations and Workarounds The e6500 cores implement two data address compare registers The CodeWarrior debugger uses both these registers to place a single watchpoint on any variable or memory range The variable or memory range is 1 byte aligned As opposed to hardware
239. cally enables the SPE vector generation e AltiVec Enables the Altivec vector support and generate AltiVec vectors and related instructions This setting is equivalent to specifying the spe_vector and vector keyword command line options Generate VRSAVE Instructions Specifies generation of AltiVec vectors and instructions that use VRSAVE prologue and epilogue code This setting is equivalent to specifying the vector novrsave vector vrsave command line options AltiVec Structure Moves Controls the use of Altivec instructions to optimize block moves This setting is equivalent to specifying the noaltivec_ move block altivec_move_block command line options Make Strings ReadOnly Places string constants in a read only section This setting is equivalent to specifying the readonlystrings command line options Merges String Constants Specifies how the compiler will place strings of a file If this option is selected the strings of a file will be kept as a pool otherwise they will be placed separately NOTE This option is enabled only when the Make Strings ReadOnly option is selected Pool Data Controls the grouping of similar sized data objects Use this option to reduce the size of executable object code in functions that refer to many objects of the same size These similar sized objects do not need to be of Table continues on the next page CodeWarrior Development Studio for Power
240. cation project according to your specifications You can access the project from the CodeWarrior Projects view on the Workbench The new project is ready for use You can now customize the project by adding your own source code files changing debugger settings and adding libraries 2 3 2 Creating CodeWarrior Bareboard Library Project You can create a CodeWarrior bareboard library project using the CodeWarrior Bareboard Project Wizard To create a CodeWarrior bareboard library project perform these steps 1 Select Start gt All Programs gt Freescale CodeWarrior gt CW for Power Architecture vnumber gt CodeWarrior IDE where number is the version number of your product The Workspace Launcher dialog box appears prompting you to select a workspace to use NOTE Click Browse to change the default location for workspace folder You can also select the Use this as the default and do not ask again checkbox to set default or selected path as the default location for storing all your projects 2 Click OK The default workspace is accepted The CodeWarrior IDE launches and the Welcome page appears NOTE The Welcome page appears only if the CodeWarrior IDE or the selected workspace is started for the first time Otherwise the Workbench window appears 3 Click Go to Workbench on the Welcome page The workbench window appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06
241. cation that resides on target embedded Linux systems and accepts connections from the CodeWarrior debugger You use the CodeWarrior remote connections feature to download and debug applications built with CodeWarrior projects The CodeWarrior debugger connects to CodeWarrior TRK on the remote target system through a serial or ethernet connection On embedded Linux systems CodeWarrior TRK is packaged as a regular Linux application named apptrx This application runs on the remote target system along side the program you are debugging to provide application level debug services to the CodeWarrior debugger To debug a Linux application using CodeWarrior TRK e Install CodeWarrior TRK on Target System e Start CodeWarrior TRK on Target System e Create a CodeWarrior Download Launch Configuration for the Linux Application e Specify Console I O Redirections for the Linux Application e Debug the Linux Application 7 1 1 Install CodeWarrior TRK on Target System This section talks about installation of Code Warrior TRK on target system To connect the CodeWarrior debugger to Code Warrior TRK the Code Warrior TRK binary executable file must be installed and running on the remote target system Once Code Warrior TRK is running on the target system the debugger can upload your application and debug the application on the target system NOTE If Code Warrior TRK is not present on a given target system you need to use a file transfer facility such
242. ce To add a dump flash action 1 Choose Dump Flash Action from the Add Action pop up menu The Add Dump Flash Action dialog appears 2 Specify the file name in the File textbox The flash is dumped in this selected file 3 Choose the file type from the File Type pop up menu You can choose any one of the following file types e Srec Saves files in Motorola S record format e Binary Saves files in binary file format 4 Specify the memory range for which you want to add dump flash action e Enter the start address of the range in the Start textbox e Enter the end address of the range in the End textbox 5 Click the Add Dump Flash Action button to add a dump flash action 6 Click Done The Add Dump Flash Action dialog closes and the added dump flash action appear in the Flash Programmer Actions table in the Flash Programmer Task editor window 11 1 2 3 6 Protect Unprotect actions The protect unprotect actions allow you to change the protection of a sector in the flash device To add a protect unprotect action CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 412 Freescale Semiconductor Inc 11 Chapter 11 Working with Hardware Tools Choose the Protect Unprotect Action from the Add Action pop up menu The Add Protect Unprotect Action dialog appears Select a sector from the Sectors table and click the Add Protect Action button to add a protect operation
243. ckbox for the respective core in the Memory configuration column to remove the memory configuration file you had set in the previous section NOTE If required you can set another memory configuration file for U Boot compiled on 36 bits on the Memory tab Click OK to close the Memory Configuration File dialog box Click OK to close the Properties for lt Target gt dialog box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 293 AE Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 9 Click OK to close the Properties for lt connection gt dialog box 10 Click Debug The instruction pointer is now on the cpu_init_ function call NOTE For e500v2 cores 36 bit U Boot debug only a reset using BoardName uboot_36 stage3 tcl is needed 11 If you used a different PIC value in the Debugger Shell issue the following command to reset PIC load address to the location specified in u boot e1 setpicloadaddr reset 12 From the Debug view toolbar select the Instruction Stepping Mode 1 command 13 From the Debug view toolbar select the Step Into gt command to step into cpu_init_f You can set breakpoints and use the Step Over Step Into and Step Out commands from line 396 in start s bl cpu init to line 980 in start s blr NEVER RETURNS NOTE To access breakpoints set on a previous deb
244. conductor Inc Ey Chapter 7 Debugging Embedded Linux Software NOTE The CodeWarrior console allocated for the debugged application can only be used to view the output of the application running on the target forwarding the input from a CodeWarrior console to the debugged application is not supported currently for Linux applications The listing below displays the syntax to specify I O redirections for the stdin stdout and stderr file descriptors Listing 7 1 Specifying I O Redirections lt lt filename gt stdin redirection from lt filename gt gt lt filename gt stdout redirection to lt filename gt 2 gt lt filename gt stderr redirection to lt filename gt To specify I O redirections for a Linux application 1 In the CodeWarrior Projects view of the C C perspective select the name of the project that builds the Linux application 2 Select Run gt Debug Configurations The Debug Configurations dialog box appears 3 Expand CodeWarrior group and select the launch configuration associated with the project The settings pages for the selected launch configuration appears on the right hand side of the Debug Configurations dialog box 4 Click the Arguments tab 5 Specify the I O redirections in the Program arguments text box 6 Click Apply to save the changes The listing below displays an example of redirections added to the list of arguments to forward the output to the console wher
245. conductor Inc 111 AA AAA Using Debug Configurations Dialog Box Debugger options Debug EPPC Exceptions Download pic System Call Services Other Executables Symbolics OS Awareness Select download options subsequent options are used For restart and when symbolics are cached Perform standard download First Subsequent Program Section Download Verify Download Verify Executable O O Constant Data O O Initialized Data O O Uninitialized Data O O O O Note Standard download availability depends on connection type C Execute Tasks Name Task Type First Subsequ Figure 4 6 Debugger Options Download page The table below lists the various options available on the Download page Table 4 7 Debugger Options Download Perform standard download Controls download of the target application using memory write command First Represents a group of settings that are used when an application is debugged for the first time Subsequent Represents a group of settings that are used when the application is debugged subsequent times To make these settings be used during debugging you need to select the Cache Symbolics Between Sessions option on the Symbolics page Executable Controls downloading and verification for executable sections Check appropriate checkboxes to specify downloading and verifications for initial launch and for successive runs Constant Data Controls downloading and verification
246. core 0 After the reset completes core 0 appears stopped at the reset vector In the Debugger Shell view issue the following command to enter the PIC alternate load address setpicloadaddr 0xFFF40000 From the Debug view toolbar select the Instruction Stepping Mode 1 command From the Debug view toolbar select the Step Into command to step into _start_e500 The start s file appears in the editor area and the disassembled code with memory addresses appear in the Disassembly view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 303 LERE Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices S starts 2 O BE Outline or Disassembly 23 E li ro0 2 2 clear registers arrays not reset by hardware Oxfffff000 lt AsmSection gt 13 r0 2 gt mtspr LicSRO r0 invalidate d cache L1 Oxfffff004 lt AsmSection 4 gt mtspr spri010 r0 gt 3i rd mtspr L1CSR1 r0 invalidate i cache mtspr LicSRO ro invalidate d cache Oxfffff008 lt AsmSection 8 gt mtspr spri011 r0 mtspr L1CSR1 r0 invalidate i cache mfspr r1 DBSR m spr r1 DBSR Oxfffff00c lt AsmSection 12 gt mfspr rsp spr304 mtspr DBSR r1 Clear all valid bits mtspr DBSR r1 Clear all valid bits Oxfffff010 lt AsmSection 16 gt mtspr spr304 rsp Enable L1 Caches early qu
247. create the final boot image See the figure below for the required eSPI SD EEPROM data structure CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 281 a NN A AAN Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices Ox00 Ox3F 0x40 Control Words 0x63 0x64 Reserved Ox7F 0x80 Configuration Words Source Address Figure 7 21 eSPI SD EEPROM Data Structure The table below describes the eSPI SD EEPROM data structure Table 7 5 eSPI SD EEPROM Data Structure Details 0x00 0x3F Reserved 0x40 0x43 BOOT signature This location should contain the value 0x424f_4f54 which is the ASCII encoding for BOOT The eSPI loader code searches for this signature initially in 24 bit addressable mode If the value at this location does not match the BOOT signature the EEPROM is accessed again but in 16 bit mode If the value in this location still does not match the BOOT signature the eSPI device does not contain a valid user code In such a case the eSPI loader code disables the eSPI and issues a hardware reset request of the SoC by setting RSTCR HRESET_REQ 0x44 0x47 Reserved 0x48 0x4B User s code length Number of bytes in the user s code to be copied The value must be a multiple of 4 4 lt User s code length lt 2GBytes 0x4C 0x4F Reserved 0x50 0x53 Source Address Contains the starting address of the
248. ct 7 5 Preparing U Boot for debugging U Boot resides in flash memory on target systems and boots an embedded Linux image developed for those systems Before debugging U Boot on a target system follow these steps CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 272 Freescale Semiconductor Inc Du Eu Dn Chapter 7 Debugging Embedded Linux Software Install BSP Configure U Boot and build U Boot images with Code Warrior debugger support Configure hardware to use U Boot image Create a Code Warrior project to debug U Boot Specify launch configuration settings Create launch configurations for U Boot debug stages 7 5 1 Install BSP Install the board support package BSP for the target system you want to debug on the Linux host computer NOTE The BSP versions keep changing frequently For different BSP versions you might encounter build environments based on various tools The subsequent sections will describe necessary procedures and use specific examples from real Freescale BSPs for illustration The examples in these sections need to be adapted based on the BSP versions or build tools you are currently using Follow these steps to install the BSP 1 On the Linux computer download the BSP for your target hardware to install kernel files and Linux compiler toolchains on your system BSP image files for target boards are located at http www
249. ct Update Background Threads on Stop When enabled the debugger reads the entire thread list when the target is suspended This decreases the speed If the option is disabled the speed is increased but the Debug window might show non existent threads as the list is not refreshed 3 Click the Source page to specify path mappings Path mappings are not required if the debug host is similar to the compilation host If the two hosts are separate the cir file contains the paths for the compilation host Specifying the path mappings helps establish paths from compilation host to where the sources are available to be accessed by the debugger on the debugger host If no path mapping is specified when you perform a debug on the specified target a source file missing message appears shown in the figure below TD sor 2 2 Belvo 2 08 am gt gt c P4080_kernel_Linux_SDK1 2_download 1 CodeWarrior Download 6 EPPC vmlinux 3 0 18 00525 96158334 core 0 Suspended E 2 Thread ID 0 Suspended Signal Halt received Description User halted thread 4 atomic_dec_return atomic h 165 Oxc008b1cc 3 mem_init mem c 354 Oxc06cb338 2mm_init main c 450 Oxc06c45f8 1 AsmSection head_fsl_booke S 227 0xc00003fc C work images P 4080_1 2 vmlinux 3 0 18 00525 96 15e334 3 20 12 11 27 AM Can t find a source file at data git yocto sdk devel linux arch powerpc indude asm atomic h V
250. ct files are located J CodeWarrior Linux Project Wizard o EE Create a CodeWarrior Linux Project Choose the location for the new project Project name Hello_World Y Use default location C Users b34823 workspace Hello_World Browse O B Next gt Finish Figure 2 7 Create a CodeWarrior Linux Project Page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 39 CodeWarrior Linux Project Wizard The table below describes the various options available on the Create a CodeWarrior Linux Project page Table 2 7 Create a CodeWarrior Linux Project Page Settings Se Project name Enter the name for the project in this text box Use default location Select to choose the directory to store the files required to build the program Use the Location option to select the desired directory Location Specifies the directory that contains the project files Use Browse to navigate to the desired directory This option is only available when Use default location is cleared Ensure that you append the name of the project to the path to create a new location for your project 2 2 2 Processor Page This page displays the processors supported by the current installation Use this page to specify the type of processor and the output for the new project CodeWarrior Development Studio for Power Architecture Proces
251. ctor Inc 173 A A o A Working with Registers The debugger updates the bit value The bit value in the Value column changes to reflect your modification 5 10 2 Viewing Register Details This section explains how to use the Registers view to show the details of a register To open the Registers view you must first start a debugging session To see the registers and their descriptions follow these steps 1 In the Debug perspective click the Registers view tab The Registers view appears 2 Click the View Menu button the inverted triangle on the Registers view toolbar 3 Select Layout gt Vertical or Layout gt Horizontal to show register details NOTE Selecting Layout gt Registers View Only hides the register details The details of the register selected by default in the Registers view are displayed as shown in the figure below Bit Fields 00000000000 1000000000000 10110100 Field 0 31 v gt 1000b4 Actions comal rex Y Description GPRO 1000b4 General Purpose Register 0 This register serves as the data source or destination for all integer instructions Integer data is manipulated using these registers which are cleared by hard reset Bit Field Values bits 0 31 1000b4 Figure 5 12 Registers View Register Details 4 Expand a register group to see individual registers 5 Select a specific register by clicking it CodeWarrior Development Studio for Power Architec
252. d Target initialization commands Debugger Shell equivalent ORmem 1 change address format x expr mem address d np expr mask ormem address format x expr mem address d np amp expr mask alternatePC N A Tip When accessing registers for best performance you can add the register group name followed by before the name of the register for example reg e500mc Special Purpose Registers MSR 0x00002000 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 396 Freescale Semiconductor Inc Chapter 10 Memory Configuration Files A memory configuration file is a command file containing commands that define the rules the debugger follows when accessing a target board s memory NOTE Memory configuration files do not define the memory map for the target Instead they define how the debugger should treat the memory map the target has already established The actual memory map is initialized either by a target resident boot loader or by a target initialization file For more information see the Target Initialization Files chapter of this manual If necessary you can have the CodeWarrior debugger execute a memory configuration file immediately before the debugger downloads a bareboard binary to a target board The memory configuration file defines the memory access rules restrictions translations used each time the debugger nee
253. d internal linkages will be dead stripped in the compiler rather than in the linker This setting is equivalent to specifying the ipa command line option Other flags Specify compiler flags 3 3 1 6 PowerPC Assembler Use the PowerPC Assembler panel to determine the format used for the assembly source files and the code generated by the PowerPC assembler The table below lists and describes the various options available on the PowerPC Assembler panel Table 3 20 CodeWarrior Build Tool Settings PowerPC Assembler Options Command Shows the location of the assembler executable file All Options Shows the actual command line the assembler will be called with Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 79 Build Properties for Power Architecture Table 3 20 CodeWarrior Build Tool Settings PowerPC Assembler Options continued Expert settings Shows the expert settings command line parameters Command line pattern 3 3 1 6 1 Input Use the Input panel to specify the path and search order of the include files The table below lists and describes the various options available on the Input panel Table 3 21 CodeWarrior Build Tool Settings Input Options Always Search user Paths Performs a search of both the user and system paths treating include statements
254. d configuration per core Core index Corel Core 2 Core3 Core 4 Core5 Core6 Core7 0 Gee Gad aw Figure 2 5 Configurations Page The table below describes the various options available on the Configurations page Table 2 5 Configurations Page Setting Option Ei eseription OOO O O Processing Model The current installation supports the following processing models e SMP Select this option to generate a single project for the selected cores The cores share the same interrupt vector text data sections and heap memory Each core has its own dedicated stack A single initialization file should be executed for each core NOTE The SMP option is available for selection only while creating projects for some e500mc e5500 and e6500 core targets Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 36 Freescale Semiconductor Inc AAA AA AAA Chapter 2 Working with Projects Table 2 5 Configurations Page Setting continued a Y gn AMP one project per core Select this option to generate a separate project for each selected core The option will also set the core index for each project based on the core selection AMP one build configuration per core Select this option to generate one project with multiple targets each containing an Icf file for the specified core NOTE Selecting the
255. d describes the various options available on the Warnings panel Table 3 43 Tool settings Warnings Options Check syntax only fsyntax only Pedantic pedantic Explanation Check the code for syntax errors but do not do anything beyond that Select to issue all the mandatory diagnostics listed in the C standard Some of them are left out by default since they trigger frequently on harmless code Pedantic warnings as errors pedantic errors Select to issue all the mandatory diagnostics and make all mandatory diagnostics into errors This includes mandatory diagnostics that GCC issues without pedantic but treats as warnings Inhibit all warnings w Select to suppress all warnings including those which GNU CPP issues by default All warnings Wall Select to turn on all optional warnings which are desirable for normal code At present this is Wcomment Wtrigraphs Wmultichar and a warning about integer promotion causing a change of sign in i expressions NOTE Many of the preprocessor s warnings are on by default and have no options to control them Warnings as errors Werror Select to make all warnings into hard errors Source code which triggers warnings will be rejected 3 3 2 3 7 Miscellaneous Use the Miscellaneous panel to specify compiler options The following table lists and describes the various options available on the Miscellaneous panel Table 3 44 Tool S
256. d pragma and the warnings notinlined command line option CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc AAA Chapter 3 Build Properties 3 3 1 5 4 Optimization Use the Optimization panel to control the code optimization settings The table below lists and describes the various options available on the Optimization panel Table 3 17 CodeWarrior Build Tool Settings Optimization Options Optimization Level Specifies code optimization options to apply to object code This setting is equivalent to specifying the opt keyword command line option Speed vs Size Specifies code optimization for speed or size This setting is equivalent to specifying the optimize for size onoroptimize for size off pragmas and opt speed or opt size command line option Inlining Specifies inline options Default settings are e Smart The compiler considers the functions declared with inline Auto Inline Inlines small functions even if they are not declared with the inline qualifier e Off Turns off inlining This setting is equivalent to specifying the inline inline auto or inline off command line option Bottom up Inlining Select to instruct the compiler to inline functions from the last function called to the first function in a chain of function calls This setting is equivalent to specifying the inline bottom_up pragma and inli
257. d target s executable thereby denying access to source level debugging and variable display The Connect command resets the target if the launch configuration specifies this action Further the command stops the target optionally runs an initialization script does not load symbolics download an ELF file or modify the program counter PC NOTE The default debugger configuration causes the debugger to cache symbolics between sessions However selecting the Connect option invalidates this cache If you must preserve the contents of the symbolics cache and you plan to use the Connect option clear the Cache Symbolics Between Sessions checkbox in the Symbolics tab page Custom Provides user an advantage to create a custom debug configuration C C application Specifies the settings for the C C application The options include Project Specifies the name of the project associated with the selected debug launch configuration Click Browse to select a different project Application Specifies the name of the C or C application executable NOTE This option is disabled when Connect debug session type is selected Search Project Click to open the Program Selection dialog box and select a binary NOTE This option is disabled when Connect debug session type is selected Variables Click to open the Select build variable dialog box and select the build variables to be associated with the program The dialog box display
258. d this problem stop the debugger from constructing a stack trace by adding a command to your target initialization file that sets the stack pointer SP register to an unaligned address For example you could put this command in your target initialization file writereg SP 0x0x0000000F Secure debug If the processor is in the Secure Debug mode and if the unlock key is not provided then a popup is displayed requesting the unlock key If a wrong unlock key is provided in the Debugger settings and an unlock sequence is initiated by the debugger you will receive a Secure debug violation error and the connection to the target will fail For the P4080 processor after this error is encountered you will not be able to successfully unlock the processor even with a correct key In such a scenario the board should be hard reset first For the P1010 processor if you have one failed attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next attempt Hypervisor debug Kernel download over Hypervisor does not work correctly For example the kernel is not stopped at entry point or the kernel module information is incorrect The workaround is to use the attach configuration If you want to debug early phases of the kernel initialization after attach set a hardware breakpoint at address oxo or at any kernel function for example s
259. ddress in decimal or hexadecimal format Hexadecimal values must begin with ox The default is the address after the small data section This option is disabled and cannot be selected if you have specified the 1cf file in the Link Command File Icf text box Entry Point Specifies the main entry point for the executable image This setting is equivalent to specifying the m ain symbol command line option The maximum length of symbol is 63 characters The default is start Library Search Paths Use this panel to specify multiple paths that the Power Architecture linker searches for libraries The linker searches the paths in the order shown in this list The table that follows lists and describes the toolbar buttons that help work with the library search paths Library Files Lists paths to libraries that the Power Architecture linker uses The linker uses the libraries in the order shown in this list The table that follows lists and describes the toolbar buttons that help work with the library file search paths The table below lists and describes the toolbar buttons that help work with the library search paths Table 3 8 CodeWarrior Build Tool Settings Input Toolbar Buttons on YY pin Add Click to open the Add file path or the Add directory path dialog box and create a file or directory path 5 Delete Click to delete the selected file or directory To confirm deletion click Yes in the Confirm Del
260. deWarrior Development Studio for Power Architecture uses the Eclipse IDE whose user interface is substantially different from the classic CodeWarrior IDE For more details on these interface differences see CodeWarrior Development Studio Common Features Guide available in the lt cwrnstal1pir gt pa Help ppF folder The following are some important tools of CodeWarrior Development Studio e Eclipse IDE e C C compiler e Assembler e Linker e Debugger e Main standard libraries e CodeWarrior Profiling and Analysis tools 1 5 1 Eclipse IDE The Eclipse Integrated Development Environment IDE is an open source development environment that lets you develop and debug your software It controls the project manager the source code editor the class browser the compilers and linkers and the debugger The Eclipse workspace organizes all files related to your project This allows you to see your project at a glance and navigate easily through the source code files The Eclipse IDE has an extensible architecture that uses plug in compilers and linkers to target various operating systems and microprocessors The IDE can be hosted on Microsoft Windows Linux and other platforms There are many development tools available for the IDE including C C and Java compilers for desktop and embedded processors For more information about the Eclipse IDE read the Eclipse documentation at http www eclipse org documentation CodeWarrior Devel
261. default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target does not respond in the provided time interval you receive a CCS timeout error Enable logging Select to display protocol logging in console Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 141 Connection types Table 5 8 Gigabit TAP Advanced Tab Options continued JTAG config file This panel displays the JTAG configuration file being used This panel is populated only if you have selected a JTAG configuration file for your project If a JTAG configuration file is not selected this panel displays a None value For more details on JTAG configuration files see the JTAG Configuration Files chapter Advanced TAP settings Force shell download Select to force a reload of the TAP shell software Disable fast download Select to disable fast download NOTE This option is not available for processors based on e500mc e5500 and e6500 cores Enable JTAG diagnostics When selected the option enables performing advanced diagnostics of the JTAG connection to be used during custom board bring up After the connection to the probe ha
262. describes the various options available on the PowerPC Disassembler panel Table 3 24 CodeWarrior Build Tool Settings PowerPC Disassembler Options Pp Option tT Epio OOS Command Shows the location of the disassembler executable file All options Shows the actual command line the disassembler will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 1 7 1 Disassembler Settings Use the Disassembler Settings panel to specify the PowerPC disassembler options that are specific to Power Architecture software development The table below lists and describes the various options available on the Disassembler panel Table 3 25 CodeWarrior Build Tool Settings Disassembler Options Show Headers Explanation Controls display of object header information This setting is equivalent to specifying the show headers noheaders command line option Show Symbol and String Tables Controls display of character string and symbol tables This setting is equivalent to specifying the show tables notables command line option Show Core Modules Controls display of executable code sections This setting is equivalent to specifying the show code nocode command line option Show Extended Mnemonics Controls display of extended mnemonics This setting is equivalent to specifying the show extended noextended command line option Show Source Code
263. dialog appears 2 Select a sector from the Sectors table and click the Add Erase Action button to add an erase operation on the selected sector NOTE Press the Control or the Shift key for selecting multiple sectors from the Sectors table 3 Click the Add Blank Check button to add a blank check operation on the selected sector 4 Select the Erase All Sectors Using Chip Erase Command checkbox to erase the entire flash memory NOTE After selecting the Erase All Sectors Using Chip Erase Command checkbox you need to add either erase or blank check action to erase all sectors 5 Click Done The Add Erase Blank Check Action dialog closes and the added erase blank check actions appear in the Flash Programmer Actions table in the Flash Programmer Task editor window 11 1 2 3 2 Program Verify actions The Program action allows you to program the flash device and the verify action verifies the programmed flash device NOTE The program action will abort and fail if it is performed in a bad block for NAND flashes To add a program verify action 1 Choose Program Verify Action from the Add Action pop up menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 409 Flash programmer The Add Program Verify Action dialog appears 2 Select the file to be written to the flash device 3 Select the Use File from Launch Configuration checkbox to
264. ds 209 Debugging 28 64 95 Debugging a CodeWarrior project 32 Debugging a Linux Application 239 Debugging All Cores when Starting the Guest Applications 366 Debugging AMP SMP Guest Linux Kernels Running Under Hypervisor 349 Debugging applications that use fork and exec system calls 252 Debugging a shared library 262 Debugging Embedded Linux Software 239 Debugging Externally Built Executable Files 2 8 Debugging Hypervisor after Release of Secondary Cores 364 Debugging Hypervisor During the Boot and Initialization Process 359 Debugging Hypervisor from Relocation Till Release of Secondary Cores 362 Debugging Hypervisor from the Entry Point 359 Debugging Hypervisor Guest Applications 345 Debugging Loadable Kernel Modules 340 Debugging Multi Core Projects 227 Debugging Multiple Cores 2317 Debugging the Application from the main Function 370 Debugging the Hypervisor Partition Manager 367 Debugging the Hypervisor Partitions Image Loading Process 366 Debugging the Hypervisor Partitions Initialization Process 365 Debugging the Kernel after the MMU is Enabled 335 Debugging the kernel based on MMU initialization 333 Debugging the Kernel before the MMU is Enabled 333 Debugging the kernel by attaching to a running U Boot 338 Debugging the kernel to download the kernel RAM disk and device tree 331 Debugging the Kernel while the MMU is being Enabled 334 Debugging the Linux Kernel 309 Debugging the P4080 Embedded Hy
265. ds from the Debug perspective follow these steps 1 Start a debugging session by selecting the appropriately configured launch configuration 2 If necessary expand the desired core s list of active threads by clicking on the tree control in the Debug view 3 Click the thread you want to use with multi core operations 4 From the Run menu specify the multi core operation to perform on the thread NOTE The keyboard shortcut for the Multicore Resume operation is Alt Shift F8 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 235 Multi Core Debugging Commands 6 2 2 Multi Core Commands in Debugger Shell This section describes the multi core commands in debugger shell In addition to the multicore specific toolbar buttons and menu commands available in the Debug view the Debugger Shell has multi core specific commands that can control the operation of one or more processor cores at the same time Like the menu commands the multi core debugger shell commands allow you to select start and stop a specific core You can also restart or kill sessions executing on a particular core The table below lists and defines the affect of each multi core debugging command mc config Table 6 2 Multi Core Debugging Commands ad Y Y en SSSC Sd List or edit multicore group options Syntax mc config mc go Resume multiple cores
266. ds to access memory on the target board NOTE Assign a memory configuration file to bareboard build targets only The memory of a board that boots embedded Linux is already set up properly A memory configuration file defines memory access rules for the debugger the file has nothing to do with the OS running on a board If needed a memory configuration file should be in place at all times The Linux Kernel Aware Plugin performs memory translations automatically relieving the user from specifying them in the memory configuration file In addition for certain processors the debugger can automatically read the translations from the target in a bareboard scenario relieving the user from specifying them in the memory configuration file For more information see Memory translations This chapter explains CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 397 Using memory configuration files e Using memory configuration files e Memory configuration commands 10 1 Using memory configuration files This section describes how to configure the CodeWarrior debugger to use a specific memory configuration file A memory configuration file contains memory access rules that the CodeWarrior debugger uses each time the build target the configuration file is assigned to is debugged You specify a memory configuration file in the Memory tab of the remote
267. ductor Inc EE ay Chapter 5 Working with Debugger This section provides information about e500v2 TLBO registers starting from L2MMU_TLBO through L2MMU_TLB511 Table 5 27 e500v2 TLBO Registers L2MMU_TLBO through L2MMU_TLB511 0 0 V Valid bit for entry 1 1 TS Translation address space compared with AS bit of the current access 2 5 TSIZE Encoded Page size 0000 Reserved 0001 4 Kbyte 0010 16 Kbyte 0011 64 Kbyte 0100 256 Kbyte 0101 1 Mbyte 0110 4 Mbyte 0111 16 Mbyte 1000 64 Mbyte 1001 256 Mbyte 1010 1 Gbyte 1011 4 Gbyte 6 7 RESERVED 8 15 TID Translation ID compared with PIDO PID1 PID2 or TIDZ all zeros 16 17 NV Next Victim bits used for LRU replacement algorithm 18 31 RESERVED 32 36 WIMGE Memory cache attributes write through cache inhibit memory coherence required guarded endian 37 37 RESERVED 38 38 X0 Extra system attribute bits for definition by system software 39 39 x1 Extra system attribute bits for definition by system software 40 43 UO U3 User attribute bits used only by software These bits exist in the L2 MMU TLBs only TLB1 andTLBO 44 44 RESERVED 45 45 SR Supervisor read permission bit 46 46 Sw Supervisor write permission bit 47 47 SX Supervisor execute permission bit 48 48 UR User read permission bit 49 49 UW User write permission bit 50 50 UX User execute permission bit 51 59 RESERVED 60 63 Extended R
268. ductor Inc Chapter 11 Working with Hardware Tools Um Import Export Fill Memory Action Action type Select the type of action you want to perform D Import memory v Memory Access Export memory Provide memory location or memory space and address Address Expression Memory space and address O Expression v Input Output Access Size Ox 0 1 unit e 2 units main 4 units Provide source or destination for the operation File Selection Motorola S Record Fill pattern Ox FF Number of elements 0x 10 E Verify memory writes Import Export Fill Memory Action Workspace System Variables Figure 11 11 Fill memory The following table explains the fill memory options Table 11 6 Controls used for filling memory with data pattern Memory space and address Enter the literal address and memory space on which the fill operation is performed The Literal address field allows only decimal and hexadecimal values Expression Enter the memory address or expression at which the fill operation starts Access Size Denotes the number of addressable units of memory that the debugger accesses in modifying one data element The default values shown are 1 2 and 4 units When target information is available this list shall be filtered to display the access sizes that are supported by the target Fill Pattern Denotes the sequence of bytes ordered from low to high memory mirrored i
269. e rootfs ex2 gz uboot if this is not present check if the Target Image Generation gt Create a ramdisk that can be used by u boot option is enabled e A device tree blob DTB obtained from the kernel sources To convert this into a DTB use the Device Tree Compiler DTC that is available in the BSP dtc f b 0 S 0x3000 R 8 I dtb O dts lt target gt dtb gt lt target gt dts NOTE Standard DTS files are available along with Linux kernel source files in lt SDK_ Linux sources _root gt arch powerpc boot dts For the exact location of where the kernel images are stored see the SDK User Manual from iso nelp documents pdf Power on the target Wait until the uboot prompt is displayed Ensure that networking is working on the target You need to have a network cable plugged in and set several variables ipaddr netmask serverip gatewayip including the IP address of the TFTP server For example ipaddr 10 171 77 230 netmask 255 255 255 0 serverip 10 171 77 192 gatewayip 192 168 1 1 Check that network connectivity is working by pinging the TFTP server ping serverip On the uboot prompt download the DTS and configure it for the current target For example tftp 3000000 tftpboot lt target gt dtb fdt addr 0x3000000 fdt boardsetup fdt print Copy the output of this command as a DTS file Modify the memreserve statement at the beginning of the DTS fie The first parameter is the start address of the me
270. e RCW_option 0 RCW Override disabled 1 RCW Override enabled 2 Reset previous RCW Override parts RCWn 21000 n n 1 16 index of RCW value value 32bit value The JTAG configuration files as specified in the listing above can be used to override a portion or the complete RCW for P4080 by specifying index value pairs for some or all of the 16 x 32bit words of the RCW NOTE You can use the Pre Boot Loader PBL tool to configure the various settings that make up the RCW and output the RCW in multiple formats including CodeWarrior JTAG configuration files For more information on the PBL tool see PBL Configuration Tool User Guide 8 3 Using a JTAG configuration file to specify multiple linked devices on a JTAG chain This section explains how to connect multiple processors through a single JTAG chain and how to describe such a JTAG chain in a JTAG configuration file The listing and figure below show a sample JTAG initialization file with a single core Listing 8 3 Sample JTAG Initialization File for P1010 Processor A single device in the chain P1010 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 373 Using a JTAG configuration file to specify multiple linked devices on a JTAG chain TDI TDO ae Chain pos 0 Figure 8 1 A Single Device in a JTAG Chain The listing and figure b
271. e project from the CodeWarrior Projects view on the Workbench Configure the launch configuration for linux kernel debug a Select Run gt Debug Configurations The Debug Configurations dialog box appears Enter the launch configuration settings in the Debug Configurations dialog box The table below lists the launch configuration settings Table 7 8 Kernel Project Download Launch Configuration Settings Main Tab Select an appropriate system if existing from the Connection drop down list or define a new system e To define a new system click New e Select Hardware or Simulator Connection from the CodeWarrior Bareboard Debugging list Click Next Specify a name and a description for the connection Select an appropriate target if existing from the Target drop down list or define a new target To define a new target click New on the Hardware or Simulator Connection dialog box Select Hardware or Simulator Target from the CodeWarrior Bareboard Debugging list Click Next Specify a name and a description for the target Select a processor from the Target type drop down list On the Initialization tab ensure that there are no initialization files selected Click Finish to create the target and close the Hardware or Simulator Target dialog box Select the type of connection you will use from the Connection type drop down list Table continues on the next page CodeWarrior Development Studio for Power Architect
272. e Action Lets you add secure or unsecure action e Duplicate Action button Allows you to duplicate a flash program action in the Flash Programmer Actions table e Remove Action button Allows you to remove a flash program action from the Flash Programmer Actions table e Move Upbutton Allows you to move up the selected flash action in the Flash Programmer Actions table e Move Down button Allows you to move down the selected flash action in the Flash Programmer Actions table NOTE Actions can also be enabled or disabled using the Enabled column The Description column contains the default description for the flash programmer actions You can also edit the default description 11 1 2 3 1 Erase Blank check actions The Erase action erases sectors from the flash device You can also use the erase action to erase the entire flash memory without selecting sectors The blank check action verifies if the specified areas have been erased from the flash device CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 408 Freescale Semiconductor Inc SSS____ _ y Chapter 11 Working with Hardware Tools NOTE Flash Programmer will not erase a bad sector in the NAND flash After the erase action a list of bad sectors is reported if any To add an erase blank check action 1 Choose Erase Blank Check Action from the Add Action pop up menu The Add Erase Blank Check Action
273. e CodeWarrior TRK was started Listing 7 2 Sample I O Redirections lt proc self fd 0 gt use target console for stdin this way stdin is functional and can be used using a CW console it isn t gt proc self fd 1 gt use target console for stdout 2 gt proc self fd 2 gt use target console for stderr 7 1 5 Configure Linux Process Signal Policy This section explains how to control applications being debugged using signals and how to manage signals using CodeWarrior IDE CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 247 Debugging a Linux Application AppTRK and CodeWarrior can be configured to stop the application being debugged whenever the application receives a signal A user can send signals to the application directly from CodeWarrior when the application resumes execution To send a signal to an application right click the signal name in the Signals view and select Resume With Signal from the context menu that appears 7 1 5 1 Signal Inheritance When a new process is forked it inherits the signal settings from the parent process For example if a process has a setting that if the SIGUSR1 signal is received the application being debugged will be stopped then a child process forked by this process will also inherit this setting It will stop the application being debugged if the SIGUSR1 signal is received A
274. e Downloads the e1 file to the target from the vmiinux e1 file CodeWarrior writes the binary file to the target memory e Sets the entry point based on the information available from the e1 file e Runs the target For a download debug scenario to boot the Linux kernel Code Warrior requires the RAMDISK or ROOTES file in addition to the vmlinux e1 file This file is also built along with the image files when the kernel is compiled using the build tool CodeWarrior also requires a DTB file that specifies the resources to be used by the kernel during its execution For a download debug scenario you need to configure the vm1inux e1 file RAMDISK or ROOTES file and the DTB files to be downloaded into the target memory All these files can be found in the specific target images folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 319 Debugging the Linux Kernel NOTE The location of the images directory might differ based on the BSP version being used For the correct location of where the kernel images are stored see the SDK User Manual in iso ne1p documents pdf These files are specified in the Download launch configuration after you have created the Code Warrior project with the Linux kernel image Table 7 8 describes the settings you need to provide in the launch configuration 7 7 6 2 Configuring an Attach Kernel Debug Scenario
275. e Gigabit TAP and Trace probe to send JTAG commands over the JTAG cable e Gigabit TAP Trace JTAG over Aurora cable Select to use the Gigabit TAP and Trace probe to send JTAG commands over the Aurora cable For more details on Gigabit TAP see Gigabit TAP Users Guide available in the lt CWInstall1Dir gt PA Help PDF folder where lt CWInsta11Dir gt is the installation directory of your Codewarrior software TAP address Enter the IP address of the selected TAP device 2 1 4 Bu ild Settings Page Use this page to select a programming language toolchain and the output project type for your proj CodeWarrio ect NOTE The current release does not include toolchains for Linux applications by default To add the required build tools support you should install the corresponding service pack for the required target For more information on installing service packs see the Service Pack Updater Quickstart available in the lt CWInstallDir gt PA folder r Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Chapter 2 Working with Projects z AAA AAA gt CodeWarrior Bareboard Project Wizard o late Build Settings Choose the build settings for the project Language c C C m Note F the toolchain you want to use is disabled please install the corresponding package for adding the build
276. e Tool Settings page can differ based upon the toolchain used by the project Table 3 45 Tool Settings PowerPC Assembler Options Y Command Specifies the PowerPC GCC command line Assembler required to build the assembly files in the project All options Shows the actual command line the assembler will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 2 4 1 General Use the General panel to specify the assembler behavior The following table lists and describes the various options available on the General panel Table 3 46 Tool Settings General Assembler flags Specify the flags that need to be passed with the assembler Include paths l Add a path to the list of directories assembler searches for files specified in include directives I can be used multiple times as required to include a variety of paths The current working directory is always searched first followed by any 1 directories in the order they were specified left to right on the command line Use these toolbar buttons to work with the Include paths I panel e Add Click to open the Add directory path dialog box and specify the file search path e Delete Click to delete the selected file search path To confirm deletion click Yes in the Confirm Delete dialog box e Edit Click to open the Edit directory path dialog box and update the selected object file search path
277. e and profile for your project launch Generate trace configurations Specifies the source used for collecting trace data The current installation supports the following options e DDR Buffer Select to send trace to a DDR memory buffer e NPC Buffer Select to send trace data to a small dedicated trace buffer e Gigabit TAP Trace Select to collect trace data on a GigabitTAP Trace probe Enable circular collection DDR and Specifies circular collection of trace data in the generated trace configurations If NPC only selected the trace buffer is treated as a circular buffer and tracing continues even after the buffer is full by replacing the oldest entries 2 2 CodeWarrior Linux Project Wizard CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 38 Freescale Semiconductor Inc E7 Chapter 2 Working with Projects The CodeWarrior Linux Project Wizard helps you create a Linux project by displaying various pages that allow you to specify settings for your project NOTE The pages that the wizard presents can differ based upon the choice of project type or execution target The pages of the CodeWarrior Linux Project Wizard are e Create a CodeWarrior Linux Project Page e Processor Page e Build Settings Page e Linux Application Page 2 2 1 Create a CodeWarrior Linux Project Page Use this page to specify the project name and the directory where the proje
278. e assembly statements will be optimized This setting is equivalent to specifying the volatileasm novolatileasm command line options Instruction Scheduling Controls the rearrangement of instructions to reduce the effects of instruction latency The default is off This setting is equivalent to specifying the schedule command line option Peephole Optimization Specifies peephole optimization This setting is equivalent to specifying the peephole pragma and the opt peep hole command line option Profiler Information Controls the appearance of calls to a profiler library at the entry and exit points of each function The default is off This setting is equivalent to specifying the profile command line option Generate ISEL Instructions e500 Zen Controls the use of isel instructions The default is off NOTE If the Power Architecture processor of your target platform does not implement the Freescale ISEL APU this option appears disabled and cannot be selected This setting is equivalent to specifying the use isel command line option Translate PPC Asm to VLE Asm Zen Controls VLE code generation for inline assembly statements NOTE If the Power Architecture processor of your target platform does not have the VLE capability this option appears disabled and cannot be selected This setting is equivalent to specifying the ppc_asm_to_vle command line option 3 3 1 5 6 C C Language CodeWarrio
279. e core in running another script must be executed before proceeding further with the instructions provided in this section 1 Open Debugger Shell view 2 Execute BoardName uboot_36 stage2 preparation tcl using the following command source BoardName uboot 36 stage2 preparation tcl To debug U Boot in the translated address space in flash before switching back to initial address space start s bl cpu_init_f line 396 1 Click E on the Debug view toolbar to terminate the current debug session 2 Select Run gt Debug Configurations The Debug Configurations dialog box appears 3 Expand the CodeWarrior group and select the appropriate launch configuration 4 In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears 5 Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears 6 On the Memory tab select the checkbox for the respective core in the Memory configuration column 7 Click the ellipsis button in the Memory configuration file column The Memory Configuration File dialog box appears 8 Click File System and select the memory configuration file from the following path lt CWInstallDir gt PA PA Support Initialization_Files Memory NOTE To select an appropriate memory configuration file it is necessary to inspect the TLB registers and check if there are address spaces translated or if th
280. e group The language you select determines the libraries that are linked with your program and the contents of the main source file that the wizard generates Select the architecture type used by the new project from the Build Tools Architecture group NOTE For projects created for QorIQ_P5 processors both the 32 bit and 64 bit options are enabled and can be selected For all other processors 32 bit option is selected by default and 64 bit is disabled and cannot be selected Click Next The Linux Application page appears Select CodeWarrior TRK to use the CodeWarrior Target Resident Kernel TRK protocol to download and control application on the Linux host system NOTE When debugging a Linux application you must use the CodeWarrior TRK to manage the communications interface between the debugger and Linux system For details see Install CodeWarrior TRK on Target System Specify a Remote System Configuration option In the IP Address text box enter the IP Address of the Linux host system the project executes on In the Port text box enter the port number that the debugger will use to communicate to the Linux host system In the Remote Download Path text box enter the absolute path for the host directory into which the debugger downloads the application Click Finish The wizard creates a CodeWarrior Linux application project according to your specifications You can access the project from the CodeWarrior Projects vie
281. e imported executable file and also specify the toolchain to be used The table below describes the options available on the page Table 5 44 Processor page settings A AL A Processor Expand the processor family and select the appropriate target processor for the execution of the specified executable file The toolchain uses this choice to generate code that makes use of processor specific features such as multiple cores Tip You can also type the processor name in the text box Toolchain Chooses the compiler linker and libraries used to build the program Each toolchain generates code targeted for a specific platform These are e Bareboard Application Targets a hardware board without an operating system e Linux Application Targets a board running the Linux operating system Target OS Select if the board runs no operation system or imports a Linux kernel project to be executed on the board The option is applicable only for bareboard application projects 5 16 4 Linux Application Launch Configurations Page Use the Linux Application Launch Configurations page to specify how the debugger communicates with the host Linux system and controls your Linux application NOTE The Linux Application page appears only when select the Linux Application toolchain option on the Processor page in the Import a Code Warrior Executable file wizard NOTE When debugging a Linux application you must use the Code Warrior TRK to m
282. e preprocessor behavior by providing details of the file whose contents can be used as prefix to all source files The table below lists and describes the various options available on the Preprocessor panel Table 3 13 CodeWarrior Build Tool Settings Preprocessor Options Prefix Files Adds contents of a text file or precompiled header as a prefix to all source files This setting is equivalent to specifying the prefixfile command line option Source encoding Specifies the default source encoding used by the compiler The compiler automatically detects UTF 8 Unicode Transformation Format header or ucS 2 uUcs 4 Uniform Communications Standard encodings regardless of setting The default setting is ascii This setting is equivalent to specifying the enc oding keyword command line option Defined Macros D Defines a specified symbol name This setting is equivalent to specifying the D name command line option where name is the symbol name to define Undefined Macros U Undefines the specified symbol name This setting is equivalent to specifying the U name command line option where name is the symbol name to undefine 3 3 1 5 2 Input Use the Input panel to specify the path and search order of the include files CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 71 Build Properties for Power Architecture The table be
283. e specified in hexadecimal for example oxascpoo00 octal for example 025363200000 or decimal for example 2882338816 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 389 Target initialization commands value The 32 bit value to write to the specified memory address This value may be specified in hexadecimal for example oxrrrrascp octal for example 037777725715 or decimal for example 4294945741 Example This command writes the long integer 0x12345678 to the memory location oxoo001FFO0O0 writemem w 0x0001FF00 0x12345678 9 2 1 15 writemmr Writes a value to the specified memory mapped register MMR Syntax writemmr regName value Arguments regName The name of the memory mapped register the supplied value is assigned to NOTE This command accepts most Power Architecture processor memory mapped register names value The value to write to the specified memory mapped register This value may be specified in hexadecimal for example oxrrrrascp octal for example 037777725715 or decimal for example 4294945741 Example This command writes the value oxt e3 to the syrcr register writemmr SYPCR Oxffffffc3 This command writes the value oxo001 to the rmx register writemmr RMR 0x0001 This command writes the value 0x3200 to the merer register CodeWarrior Development Studio for Power Architect
284. e1 you need to open the serial consoles for the hypervisor and the guest applications To know on which port you can access the serial console of the hypervisor or the guest application check the hypervisor device tree the ats file that is used for starting the application e Check for stdout nodes for example the hypervisor is using the nvbc node which is using the muxer on channel 0 This means that the hypervisor serial console can be reached on the first port given as argument to the mux_server e Look at the first partition partl stdout is using part1_bco which is using muxer channel This means that the serial port will be mux_server base_port 1 The same concept applies to other partitions or other device trees as well 7 9 5 Debugging AMP SMP Guest Linux Kernels Running Under Hypervisor This section describes how to debug AMP SMP guest Linux kernels running under the hypervisor This section explains e Prerequisites e Creating an Attach Launch Configuration to Debug a Linux Partition after Kernel Boot e Creating a Download Launch Configuration to Debug a Linux Partition from an Entry Point or a User Defined Function CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 349 a Se sl Debugging Hypervisor Guest Applications 7 9 5 1 Prerequisites As prerequisites ensure that e For Download debug session the hypervis
285. ead from the hardware For all successive read operations the hardware diagnostic tools compare the read value to the stored value from the first read operation If the Scope Loop test determines that the value read from the hardware is not stable the diagnostic tools report the number of times that the read value differs from the first read value Following table lists and describes the items in Loop Speed pane Table 11 2 Loop Speed Pane Items pom scriptions OO O O O O Set Loop Speed Enter a numeric value between 0 to 1000 in the textbox to adjust the speed You can also move the slider to adjust the speed at which the hardware diagnostic tools repeat successive read and write operations Lower speeds increase the delay between successive operations Higher speeds decrease the delay between successive operations 11 3 2 4 Memory Tests The Memory Tests pane lets you perform three hardware tests Walking Ones Bus Noise and Address You can specify any combination of tests and number of passes to perform For each pass the hardware diagnostic tools performs the tests in turn until all passes are complete The tools compare memory test failures and display them in a log window after all passes are complete Errors resulting from memory test failures do not stop the testing process however fatal errors immediately stop the testing process The following table explains the items in the Memory Tests pane Table 11 3 Memory Tests
286. ead permission bit 33 33 UW User write permission bit 34 34 UX User execute permission bit 35 35 SR Supervisor read permission bit 36 36 SW Supervisor write permission bit 37 37 SX Supervisor execute permission bit 38 38 XO Implementation dependent page attribute Implemented as storage Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 197 er a Working with Registers Table 5 32 e5500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 continued 39 39 x1 Implementation dependent page attribute Implemented as storage 40 43 U0 U3 User attribute bits These bits are associated with a TLB entry and can be used by system software 44 44 IPROT Invalidate protect Set to protect this TLB entry from invalidate operations from tlbivax tlbilx or MMUCSRO TLB flash invalidates 45 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualization fault Controls whether a DSI occurs on data accesses to the page regardless of permission bit settings 54 59 LPIDR Translation logical partition ID 60 91 Reserved 92 115 RPN Real page number 116 127 Reserved 128 179 EPN Effective page number 180 190 Reserved 191 191 V Valid bit for entry 5 10 5 4 5 e6500 Registers This section provides information about e6500 TLBO registers starting from
287. ebugging Embedded Linux Software 7 6 4 4 3 Debugging U Boot after switching back to initial address space This section tells how to debug U Boot in a NAND flash device after switching back to initial address space While debugging U Boot when you reach the cpu_init_ call you are back to address space 0 you now need to remove the memory configuration file used in the previous section or set another memory configuration file for U Boot compiled on 36 bits To debug U Boot in flash after switching back to initial address space L 2 3 O V ooN 11 Click E on the Debug view toolbar to terminate the current debug session Select Run gt Debug Configurations The Debug Configurations dialog box appears From the left pane in the CodeWarrior Attach container select the appropriate launch configuration In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears On the Memory tab clear the checkbox for the respective core in the Memory configuration column to remove the memory configuration file you had set in the previous section NOTE If required you can set another memory configuration file for U Boot compiled on 36 bits on the Memory tab Click OK to close the Memory Configuration File dialog box Click OK to close the Properties
288. ebugging the Linux kernel The various use cases for the Linux kernel debug scenario are e Code Warrior allows you to download this Linux kernel image vmiinux e1 RAM disk and dtb files to the target e You can start the Linux kernel and RAM disk manually from U Boot The U Boot the kernel RAM disk and dtb images are written into flash memory e You can download the Linux kernel and RAM disk from Code Warrior without using U Boot e You can perform an early kernel debug before the MMU is enabled or debug after the Linux kernel boots and the login prompt is shown The Linux kernel debug scenarios are explained in the following sections e Creating a Code Warrior Project using the Linux Kernel Image e Configuring the kernel project for debugging e Debugging the kernel to download the kernel RAM disk and device tree e Debugging the kernel based on MMU initialization e Debugging the kernel by attaching to a running U Boot 7 7 5 Creating a CodeWarrior Project using the Linux Kernel Image After creating a Linux kernel image with symbolic debugging information you need to create a CodeWarrior project using the kernel image To create a CodeWarrior project CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 316 Freescale Semiconductor Inc BR WN kr Nn 12 13 14 Chapter 7 Debugging Embedded Linux Software Start the CodeWarrior IDE from the Windows
289. ect Project gt Build Project The CodeWarrior IDE builds the project and stores the output file 1ibexamp1e so in the Output directory within the project directory 7 4 5 Build the executable Now you need to build the executable that uses the shared library To build the executable perform the following steps 1 Select the sharednibraryzxample project in the CodeWarrior Projects view 2 Select the shareatib_1m build configuration by selecting Project gt Build Configurations gt Set Active gt lt Build Configuration Name gt Tip You can also select a build configuration from the drop down list that appears when you click the down arrow next to the project name in the CodeWarrior Projects view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 266 Freescale Semiconductor Inc OOO AAA Chapter 7 Debugging Embedded Linux Software 3 Select Project gt Build Project The Code Warrior IDE builds the project and stores the output file snareanib_tm e1 in the Output directory within the project directory 7 4 6 Configure the launch configuration The next action is to configure the shareanio_1m launch configuration You can configure the shareani _1m launch configuration by 1 Specifying the remote download path of the final executable file 2 Specifying the host side location of the executable file to be used for debugging the shared library 3 Specifying the e
290. ected file Move up Click to re order the selected file one position higher in the list Move down Click to re order the selected file one position lower in the list 3 3 2 3 4 Optimization Use the Optimization panel to control compiler optimizations Compiler optimization can be applied in either global or non global optimization mode You can apply global optimization at the end of the development cycle after compiling and optimizing all source files individually or in groups The table below lists and describes the various options available on the Optimization panel Table 3 41 Tool Settings Optimization Options Optimization Level Specifies the optimization that you want the compiler to apply to the generated object code The default options are e None O0 Disable optimizations Reduce compilation time and make debugging produce the expected results This is the default This setting is equivalent to specifying the 00 command line option Optimize 01 Optimizing compilation takes more time and a lot more memory for a large function With 0 01 the compiler tries to reduce code size and execution time without performing any optimizations that take a great deal of compilation time This setting is equivalent to specifying the 01 command line option Optimize more O2 Optimize even more GCC performs nearly all supported optimizations that do not involve a space speed tradeoff As compared to 0 01 thi
291. ed configuration options for Linux kernel debug Select Exit to return to the main configuration menu Select the General Setup option Select Configure standard kernel features expert users and ensure that the Sysctl syscall support option is selected If you are using the Open Source Device Tree debugging method under the General Setup gt Configure standard kernel features expert users option then select e Load all symbols for debugging ksymoops e Include all symbols in kallsyms NOTE These settings are optional They aid the debugging process by providing the vmlinux symbols in proc kallsyms Select Exit to exit the configuration screen CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 315 AAA AA MAA Debugging the Linux Kernel 16 Select Yes when asked if you want to save your configuration 17 Execute the following command to rebuild the Linux kernel bitbake virtual kernel The uncompressed Linux kernel image with debug symbols vmlinux e1 is created NOTE The location of the images directory might differ based on the BSP version being used For the correct location of where the Linux kernel images are stored see the SDK User Manual from iso help documents pdf You just created a Linux kernel image that contains symbolic debugging information Now you can use this image and create a Code Warrior project for d
292. ed program verify actions appear in the Flash Programmer Actions table in the Flash Programmer Task editor window 11 1 2 3 3 Checksum actions The checksum can be computed over host file target file memory range or entire flash memory To add a checksum action 1 Choose Checksum Action from the Add Action pop up menu CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 410 Freescale Semiconductor Inc Chapter 11 Working with Hardware Tools The Add Checksum Action dialog appears Select the file for checksum action Select the Use File from Launch Configuration checkbox to use the file from the launch run configuration associated with the task Specify the filename in the File textbox You can use the Workspace File System or Variables buttons to select the desired file Choose the file type from the File Type pop up menu Select an option from the Compute Checksum Over options The checksum can be computed over the host file the target file the memory range or the entire flash memory Specify the memory range in the Restricted To Addresses in this Range group The checksum action is permitted only in the specified address range In the Start textbox specify the start address of the memory range sector and in the End textbox specify the end address of the memory range Select the Apply Address Offset checkbox and set the memory address in
293. ed toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform NOTE The current release does not include toolchains for Linux applications by default To add the required Linux build CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 47 LEESE E Creating projects tools support you should install the corresponding service pack for the required target For more information on installing service packs see the Service Pack Updater Quickstart available in the lt cwrnsta1ipir gt pa folder 20 Select an option from the Floating Point drop down list to prompt the compiler to handle the floating point operations by generating instructions for the selected floating point unit 21 Click Next The Configurations page appears 22 Select a processing model option from the Processing Model group NOTE The SMP option is available for selection only while creating projects for some e500mc and e5500 core targets e Select SMP One build configuration for all the cores to generate a single project for the selected cores The cores share the same interrupt vector text data sections and heap memory Each core has its own dedicated stack A single initialization file should be executed for each core e Select AMP One project per core to generate a separa
294. egular kernel code Debugging a loadable kernel module consists of several general actions performed in the following order 1 Create a CodeWarrior Linux kernel project for the loadable kernel module to be debugged See Creating a CodeWarrior Project from the Linux Kernel Image 2 Add the modules and configure their symbolics mapping See Configuring the Modules Symbolics Mapping CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 340 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software 7 8 2 Creating a CodeWarrior Project from the Linux Kernel Image The steps in this section show how to create a Code Warrior project from a Linux kernel image that contains symbolic debugging information BR WN Nn 10 11 NOTE The following procedure assumes that you have made an archive of the Linux kernel image and transferred it to the Windows machine For kernel modules debugging ensure that you build the kernel with loadable module support and also make an archive for the rootfs directory which contains the modules for transferring to Windows Launch CodeWarrior IDE Select File gt Import The Import wizard appears Expand the CodeWarrior group and select CodeWarrior Executable Importer Click Next The Import a CodeWarrior Executable file page appears Specify a name for the project to be imported in the Project name text box I
295. el configuration in the OS Awareness tab and the startup stop function to start_kernel Click Next The Debug Target Settings page appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 317 PVD PPP Debugging the Linux Kernel 15 From the Debugger Connection Types list select the required connection type 16 Specify the settings such as board configuration launch configuration connection type and TAP address if you are using Ethernet or Gigabit TAP 17 Click Next The Configurations page appears 18 From the Core index list select the required core 19 Click Finish The wizard creates a project according to your specifications You can access the project from the CodeWarrior Projects view on the workbench 7 7 5 1 Updating the Linux Kernel Image By modifying the Linux kernel image you can update the project you just created This debug scenario has two use cases e Cache Symbolics Between Sessions is Enabled e Cache Symbolics Between Sessions is Disabled 7 7 5 1 1 Cache Symbolics Between Sessions is Enabled You have built a new vmlinux e1 file with some changes as compared to the current vmlinux e1f file being used in the CodeWarrior project you created To replace the modified vmlinux elf file 1 Terminate the current debug session 2 Right click in the Debug window 3 From the context menu select Pur
296. elow shows a graphical representation of the selected register s bit values This graphical representation shows how the register organizes bits You can use this representation to select and change the register s bit values Hover the cursor over each part of the graphical representation to see additional information CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 175 Working with Registers Bit Fields 00000000001111011111101010001100 Field 0 31 w 3dfa8c Figure 5 13 Register Details Bit Fields Group Tip You can also view register details by issuing the reg command in the Debugger Shell view A bit field is either a single bit or a collection of bits within a register Each bit field has a mnemonic name that identifies it You can use the Field list box to view and select a particular bit field of the selected register The list box shows the mnemonic name and bit value range of each bit field In the Bit Fields graphical representation a box surrounds each bit field A red box surrounds the bit field shown in the Field list box After you use the Field list box to select a particular bit field you see its current value in the text box If you change the value shown in the text box the Registers view shows the new bit field value 5 10 2 2 Changing Bit Fields To change a bit field in a register you must first st
297. elow show a sample JTAG initialization file with two devices in a JTAG chain Listing 8 4 Sample JTAG Initialization File for P1014 and P2020 Processors Two devices in a JTAG chain P1014 P2020 TDI TDO a Ma Chain pos 1 3 Chain pos 0 Figure 8 2 Two Devices in a JTAG Chain NOTE The devices are enumerated in the direction starting from TDO output to TDI input The listing and figure below show two devices connected in a JTAG chain Listing 8 5 Sample JTAG Initialization File for P2010 and P4080 Processors Two devices in a JTAG chain P2010 0x80000000 1 P4080 2 1 210005 0x90404000 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 374 Freescale Semiconductor Inc Chapter 8 JTAG Configuration Files TDI TDO P4080 P2010 Chain pos 1 9 Chain pos 0 Index 2 Data 1 Index 0x80000000 Data 1 Index 210005 Data 0x90404000 Figure 8 3 Two Devices in a JTAG Chain The listing and figure below show two devices connected in a JTAG chain with a filter applied for the second device Listing 8 6 Sample JTAG Initialization File for Two Devices with Filter for Second Device H Two devices in a JTAG chain 8306 1 1 2 0x44050006 3 0x00600000 8309 log Chain pos 1 Chain pos 0 Index 1 Data 1 Index 2 Data 0x44050006 Index 3 Data 0x00600000 Figure 8 4 Two Devices in a JTAG Chain with Filter Applied to
298. em explorer provides data models and frameworks to configure and manage remote systems their connections and their services For more information see Code Warrior Development Studio Common Features Guide available in the lt cwrnstal1Dir gt PA Help PDF folder where lt cwrnstalipir gt is the installation directory of your CodeWarrior software CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 32 Freescale Semiconductor Inc Chapter 2 Working with Projects 5 CodeWarrior Bareboard Project Wizard i Debug Target Settings Target Settings Debugger Connection Types 0 Hardware Simulator Board P4080ComE z Launch Connection Y Download Default z F Attach aif F Connect dE C X P Cache Download 4 X C ROM Attach Po F Download SRAM amp Def X Connect SRAM E Connection Type CodeWarrior TAP over USB Figure 2 3 Debug Target Settings Page The table below describes the various options available on the Debug Target Settings page Table 2 3 Debug Target Settings page settings o Oion EI Debugger Connection Types Specifies the available target types Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 33 A CodeWarrior Bareboard Project Wizard Table 2 3 Debug Target Settings
299. ent Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 127 ATA Customizing Debug Configurations Main 69 Arguments Debugger Trace and Profile Es Source PE Environment E Common Debug session type Choose a predefined debug session type or custom type for maximum Flexibility Download Connect O Attach 5 Custom C C application Project Demo coreD M Application RAM Demo corebD elf Search Project v Build if required before launching Build if required before launching Build configuration RAM v C select configuration using C C Application O Enable auto build O Disable auto build Use workspace settings Configure Workspace Settings v Target settings Connection 6 Demo core0_RAM_P4080_Download Execute reset sequence Execute initialization script s The connection is for a multicore target Please select a core or multiple cores in the case of SMP Target v P4080 e500mc 0 C eS00mc 1 C eS00mc 2 C eS00mc 3 C eS00mc 4 C eS00mc 5 C e500mc 6 C e500mc 7 Figure 4 16 CodeWarrior Debug Configuration Main tab 5 In the group of tabs in the upper right side of the dialog box click a tab 6 Change the settings on the debug configuration page as per your requirements See Using Debug Configurations Dialog Box for details on the va
300. ent Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 403 A DD LLL AAA Flash programmer e Configure flash programmer target task e Execute flash programmer target task NOTE Click the Save button or press Ctrl S to save task settings 11 1 1 Create a flash programmer target task You can create a flash programmer task using the Create New Target Task wizard 1 Choose Window gt Show View gt Other from the CodeWarrior IDE menu bar The Show View dialog appears 2 Show View aio Registers 5 Sional Elf System Browser 3 Target Tasks 0 Variables Loc JL cos Figure 11 1 Show View dialog 2 Expand the Debug group and select Target Tasks 3 Click OK The Target Tasks view appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 404 Freescale Semiconductor Inc Ey Chapter 11 Working with Hardware Tools 8 Target Tasks 3 5DOs ES ma Arrange By Task Groups 7 E Tasks 0 E amp Root Name Task Type Run Configuration Flash Programmer Active Debug C Figure 11 2 Target Tasks view 4 Click the Create a new Target Task button in the Target Tasks view toolbar The Create New Target Task wizard appears 2 Create New Target Task Create a new target task Task Name FS Task Group I Run Configuration Active Debug Context
301. eplace the current native environment with the specified environment set 4 1 7 Common CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 125 I Using Debug Configurations Dialog Box Use this tab to specify the location to store your run configuration standard input and output and background launch options E Main 69 Arguments Debugger Trace and Profile Source MB Environment E Common Save as O Local file Shared file hello_world coreO Debug_Settings Display in Favorites menu Encoding O debug Default inherited Cp1252 DO Run O Other Standard Input and Output Allocate Console necessary For input CIFile Port Y Launch in background Figure 4 15 Debug Configuration Common tab The table below lists the various options available on the Common tab page Table 4 16 Common Tab Options option O es Cd Local file Select to save the launch configuration locally Shared file Select to specify the path of or browse to a workspace to store the launch configuration file and be able to commit it to a repository Display in favorites menu Select to add the configuration name to Run or Debug menus for easy selection Encoding Select an encoding scheme to use for console output Allocate Console necessary for Select to assign a cons
302. er 5 Working with Debugger Table 5 16 CodeWarrior TAP Advanced Tab Options continued Secure debug key CodeWarrior Alert box appears When this option is not selected the CodeWarrior debugger only performs a limited test while configuring the JTAG chain It checks if the PWR pin is correctly connected and displays a Cable disconnected error if not connected properly The connection details are provided in the CCS protocol log along with the JTAG ID and in case of an error a CodeWarrior Alert box appears See JTAG diagnostics tests for more information on JTAG diagnostics tests Select to enable the debugger to unlock the secured board with the secure debug key provided in the associated text box If this option is not selected you will receive a secure debug violation error when you try to debug on the locked board NOTE If you provide a wrong key and an unlock sequence is run by the debugger with the erroneous key the associated part will be locked until a rest occurs and you will need to reset the target to connect again For the P1010 processor if you have one failed attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next attempt Reset Delay ms Specifies the time in milliseconds that CodeWarrior takes to gain control of the target after issuing a reset The default value for t
303. er about the Memory Management Unit MMU translations When debugging a Linux kernel the debugger is automatically aware of the memory translations When debugging a bareboard system there are two mutually exclusive ways of informing the debugger about memory translations e A memory configuration file containing translate directives can be used to instruct the debugger about memory translations These translations are considered to be static for the duration of the debug session e The debugger can actively monitor the target MMU and read the currently active translations This MMU awareness feature is activated only if there are no translate directives defined in the memory configuration file or no such file is specified CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 158 Freescale Semiconductor Inc Ey Chapter 5 Working with Debugger NOTE The MMU awareness for bareboard is supported only for processors based on e500v2 e500mc e5500 and e6500 cores Choose one of the two alternatives based on processor support see Note above the type of application being debugged whether the translations are static or can change dynamically at runtime and performance note that constantly reading the MMU from the target can have a certain performance penalty on the debugger operation NOTE Stationary projects in CodeWarrior are pre configured to use a memory configuration
304. ere are memory configuration files available in the CodeWarrior layout that match your U Boot debug scenario 9 Click OK to close the Memory Configuration File dialog box 10 Click OK to close the Properties for lt Target gt dialog box 11 Click OK to close the Properties for lt connection gt dialog box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 298 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software 12 Click Debug The instruction pointer is now on the rti function call NOTE For e500v2 cores 36 bit U Boot debug only a reset using BoardName uboot_36 stage2 tcl is needed 13 In the Debugger Shell issue the following command to reset PIC load address to the location specified in u boot e1 setpicloadaddr reset From the Debug view toolbar select the Instruction Stepping Mode 1 command Ensure the Debug Current Instruction Pointer is at ri From the Debug view toolbar select the Step Into gt command to step into rti The Disassembly view appears 14 15 S resetvec S SPRN_SRRO r7 SPRN_SRR1 r6 237switch as 238 L1 DCache is used for initial RAM Allocate Initial RAM in data cach lis 13 CFG_INIT_RAM ADDRG h Outline 51 Disassembly 3 mtspr SPRN_SRR1 r6 Oxfffff17c lt AsmSection 132 gt mtsrri r6 rfi Oxfffff180 lt AsmSection 136 gt rfi switch as L1
305. ersions Select to issue warning messages for implicit conversions from floating point values to integer values This setting is equivalent to specifying the warn_impl_ f 2i conv pragma and the warnings impl_ float2int command line option Implicit Signed Unsigned Select to issue warning messages for implicit conversions from a signed or unsigned Conversions integer value to an unsigned or signed value respectively This setting is equivalent to specifying the warn_impl_s2u_conv pragma and the warnings signedunsigned command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 73 Build Properties for Power Architecture Table 3 16 CodeWarrior Build Tool Settings Warnings continued Pointer Integral Conversions Explanation Select to issue warning messages for implicit conversions from pointer values to integer values and from integer values to pointer values This setting is equivalent to specifying the warn_any ptr _int_convand warn _ptr_int_conv pragmas and the warnings ptrintconv anyptrinvconv command line option Unused Arguments Select to issue warning messages for function arguments that are not referred to ina function This setting is equivalent to specifying the warn_unusedarg pragma and the warnings unusedarg command line option Unused Variables Select to
306. escale Semiconductor Inc AAA enn Chapter 4 Debug Configurations Main 6 Arguments Debugger Trace and Profile Es Source PE Environment E Common Debug session type Choose a predefined debug session type or custom type for maximum Flexibility O Download O Connect O Attach 5 Custom C C application Project Demo coreD M Application RAM Demo corebD elf Search Project v Build if required before launching Build if required before launching Build configuration RAM v C select configuration using C C Application O Enable auto build O Disable auto build Use workspace settings Configure Workspace Settings v Target settings Connection 6 Demo core0_RAM_P4080_Download Execute reset sequence Execute initialization script s The connection is for a multicore target Please select a core or multiple cores in the case of SMP Target v P4080 e500mc 0 C eS00mc 1 C eS00mc 2 C eS00mc 3 C eS00mc 4 C eS00mc 5 C eS00mc 6 C eS00mc 7 Figure 4 1 Debug Configurations Main Tab The table below lists the various options available on the Main tab page Table 4 2 Main Tab Options Option scriptions Debug session type Specifies the options to initiate a debug session using pre configured debug configurations The options include e Download Resets the target if the debug configuration specifies t
307. essors Targeting Manual Rev 10 5 0 06 2015 232 Freescale Semiconductor Inc EET 7y Chapter 6 Multi Core Debugging Y Debug board_project core00 Sources main c CodeWarrior Development Studio ECE File Edit Source Refactor Navigate Search Project Run Window Help ti S OQ Fr M MM O E AA m HS Debug T C C X X X 35 Debug 22 E 09 Variables So Breakpoints J Cache itt Registers 23 EA Modules Dom x Gel A e s o Sari ax 130 23 1932 name Value 2 Bit Fields a E wm lt 3 3 bith General Purpose Registers 000000000000000000000000000000000000000000010 PRO 0x0000000000 0x0000000000 Field GPR 0 63 y 100040 Y Debug board_project core05 Sources main c CodeWarrior Development Studio tedka File Edit Source Refactor Navigate Search Project Run Window Help board_project core00_RAM_B4860_Download CodeWai amp EPPC board_project core00 elf core 0 Suspended 3 aP Thread ID 0x0 Suspended 2 main main c 26 0x00000000001001b8 rie E BQ Fr M M M amp O Q Oer s BED 1_start _start_e6500_32bit_crt0 c 264 0x00 ra RA p CAUsers b34823 workspace board_project core00 F E board_project core01_RAM_B4860_Download CodeWai Debug E E 0 Variabl Breakp Cache Mi Registe 3 BA Module O e EPPC board_project coredL elf core 1 Suspended 3 B E5 7 ge mm 7 a AN SRA Name 2 Bit Fields 8 maine 23 O E Disassembly 23
308. essors Targeting Manual Rev 10 5 0 06 2015 86 Freescale Semiconductor Inc Chapter 3 Build Properties The table below lists the GCC build tool settings specific to developing software for Power Architecture Table 3 28 GCC Build Tool Settings for Power Architecture Build Tool Build Properties Panels Architecture PowerPC Linker General Libraries Miscellaneous Shared Library Settings PowerPC Environment PowerPC Compiler Preprocessor Symbols Includes Optimization Debugging Warnings Miscellaneous PowerPC Assembler General PowerPC Preprocessor Preprocessor Settings PowerPC Disassembler Disassembler Settings The CodeWarrior build tools listed in the above table share some properties panels such as Include Search Paths Properties specified in these panels apply to the selected build tool on the Tool Settings page of the Properties for lt project gt window 3 3 2 1 Architecture Use the Architecture panel to specify the Power Architecture processor family for the build The properties specified on this page are also used by the build tools compiler linker and assembler The table below lists and describes the options available on the Architecture panel Table 3 29 Tool Settings Architecture Options Architecture Specifies which architecture variant is used by the target Table continues on the next page CodeWarrior Deve
309. et initialization file e During a debug session in the Debugger Shell issue this command cmdwin eppc setMMRBaseAdar 13 2 PowerQUICC II Pro processors This section talks about the limitations and workarounds of the Code Warrior debugger for the PowerQUICC II Pro processors The PowerQUICC II Pro processor family includes these processors e e300c3 8306 and 8309 e e300c4 8377 Single stepping exception generating instructions e300c2 c4 cores When single stepping a branch instruction for example blr to an address for which the translation is unavailable an I TLB miss exception is generated However the run control stops the target while being in an incomplete state The PC points to the requested address instead of the I TLB interrupt vector the SRRO and SRR1 do not contain the values of PC and MSR at the time of the exception just the IMISS register is updated correctly The further execution is not possible because of the incomplete state The user has to manually adjust the aforementioned registers to their intended values PC lt I TLB miss vector address 0x1100 SRRO lt the value of PC at the time of the exception SRR1 lt the interrupt specific information and MSR bit values Working with watchpoints e Resuming execution after a watchpoint is hit When a target is under the debugger s control and a watchpoint data breakpoint condition is met the core stops execution at the instruction that generated the
310. et it from the Debugger Shell in Stage 1 7 6 4 4 Debugging U Boot using NAND flash This section explains how to debug U Boot using the NAND flash device in different U Boot debug stages The following sections describe four U Boot debug stages for debugging U Boot using the NAND flash device e Debugging U Boot before switching address space e Debugging U Boot in translated address space CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 302 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software e Debugging U Boot after switching back to initial address space e Debugging U Boot in RAM 7 6 4 4 1 Debugging U Boot before switching address space This section tells how to debug U Boot in a NAND flash device before switching address space To debug U Boot in flash before switching address space L 2 3 Start the CodeWarrior IDE Open the CodeWarrior U Boot project that you created in Creating a CodeWarrior Project to Debug U Boot Select Run gt Debug Configurations The Debug Configurations dialog box appears From the left pane expand the CodeWarrior Attach container and select the appropriate launch configuration Click Debug The Debug perspective appears with the core 0 running Click Reset on the Debug view toolbar The Reset dialog box appears In the Run out of reset column select the checkboxes for all cores except
311. ete dialog box g Edit Click to open the Edit file path or Edit directory path dialog box and update the selected file or directory Move up Click to move the selected file search path one position higher in the list Ls Move down Click to move the selected file search path one position lower in the list 3 3 1 4 2 Link Order Use the Link Order panel to control the link input order CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 67 Build Properties for Power Architecture The table below lists and describes the various options available on the Link Order panel Table 3 9 CodeWarrior Build Tool Settings Link Order Options Customize linker input order Allows to change the default link input order Selecting this option enables the Link Order panel allowing you to change the default link input order by using the Move Up and Move Down buttons on the Link Order panel toolbar Link Order Shows the default link input order that you can change by selecting a link input and clicking the Move Up or Move Down button on the Link Order panel toolbar 3 3 1 4 3 General Use the General panel to specify the linker performance and optimization parameters The table below lists and describes the various options available on the General panel Table 3 10 CodeWarrior Build Tool Settings General Options Link Mode Controls the
312. eting Manual Rev 10 5 0 06 2015 218 Freescale Semiconductor Inc E7 Chapter 5 Working with Debugger You can use the Import a CodeWarrior Executable file wizard to debug an externally built executable file that is an executable e1 file that has no associated CodeWarrior project For example you can debug a e1 file that was generated using a different IDE The process of debugging an externally built executable file can be divided into the following tasks e Import an Executable File e Edit the Launch Configuration e Specify the Source Lookup Path e Debug Executable File 5 17 1 Import an Executable File First of all you need to import the executable file that you want the CodeWarrior IDE to debug The IDE imports the executable file into a new project To import an externally built executable file follow these steps 1 From the CodeWarrior IDE menu bar select File gt Import The Import wizard appears 2 Expand the CodeWarrior group Select CodeWarrior Executable Importer to import a Power Architecture e1 file 4 Click Next Go The wizard name changes to Import a CodeWarrior Executable file and the Import a CodeWarrior Executable file page appears 5 In the Project name text box enter the name of the project This name identifies the project that the IDE creates for debugging but not building the executable file 6 Clear the Use default location checkbox and click Browse to specify a dif
313. eting Projects 2 1 CodeWarrior Bareboard Project Wizard The term bareboard refers to hardware systems that do not need an operating system to operate The CodeWarrior Bareboard Project Wizard presents a series of pages that prompt you for the features and settings to be used when making your program This wizard also helps you specify other settings such as whether the program executes on a simulator rather than actual hardware This section describes the various pages that the CodeWarrior Bareboard Project Wizard displays as it assists you in creating a bareboard project NOTE The pages that the wizard presents can differ based upon the choice of project type or execution target The pages of the CodeWarrior Bareboard Project Wizard are CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 29 CodeWarrior Bareboard Project Wizard e Create a CodeWarrior Bareboard Project Page e Processor Page e Debug Target Settings Page Build Settings Page Configurations Page Trace Configuration Page 2 1 1 Create a CodeWarrior Bareboard Project Page Use this page to specify the project name and the directory where the project files are located ic 2 CodeWarrior Bareboard Project Wizard o lees Create a CodeWarrior Bareboard Project Choose the location for the new project Project name Hello_World Y Use default location C
314. ettings Miscellaneous Options Other flags Explanation Specify the compiler flags Verbose v Select to print on console the commands executed to run the stages of compilation Also print the version number of the compiler driver program the preprocessor and the compiler proper Support ANSI programs ansi Compiler strictly conforms to ANSI standard In C mode this is equivalent to std c89 In C mode it is equivalent to std c 98 Position Independent Code fPIC If supported for the target machine emits position independent code which is suitable for dynamic linking and avoids any limit on the size of the global offset table Other Assembler options Xassembler option Allows you to make GCC pass an option to the assembler It is generally used to supply system specific assembler options that are not recognized by GCC To supply an option that takes an argument use Xassembler twice first for the option and then for the argument CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Ey Chapter 3 Build Properties 3 3 2 4 PowerPC Assembler Use PowerPC Assembler panel to specify the command options and expert settings for the build tool assembler The table below lists and describes the various options available on the PowerPC Assembler panel NOTE The list of tools presented on th
315. ev_start event and will wait on a barrier until all the cores from the partition become active 2 The secondary partition cores will continue in the start_guest_secondary function and will wait in the while loop for different events 3 After all the partition cores become active and they are waiting for events in the while loop the primary core moves over the barrier sets the partition state to running sets the srri variable to guest state and at the return from exception will start executing the guest application 4 The other secondary cores from the partition set srri to guest state and at the return from exception will start executing the guest application 5 Set different breakpoints in these start_guest_primary noload and start_guest_secondary functions for debugging CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 366 Freescale Semiconductor Inc EEEE __ _ y Chapter 7 Debugging Embedded Linux Software 7 10 1 7 Debugging the Hypervisor Partition Manager If you want to verify the behavior of different commands on a user space you can use partman which is a Linux user space application For debugging the associated hypercalls routines you will need to attach to the hypervisor with all the eight cores and set breakpoints at the required function calls In this section we will take an example of issuing the partition restart command from partman
316. ew bit field value or if you have not made any changes to that value Reset Change each bit of the bit field value to its register reset value The register takes on this value after a target device reset occurs To confirm the bit field change click Write To cancel the change click Revert Summary Display Description group content in a pop up window Press the Esc key to close the pop up window Format Specify the data format of the displayed bit field values 5 10 2 4 Description The Description group of the Registers view see the figure below shows explanatory information for the selected register Description GPRS Sdfasc General Purpose Register 8 This register is either 32 bits wide in 32 bit PowerPC microprocessors or 64 bits wide in 64 bit PowerPC microprocessors It serves as the data source or destination for integer instructions and provide data for generating addresses Bit Field Values bits 0 31 3dfa8c Figure 5 16 Register View Description Group The register information covers e Current value CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 178 Freescale Semiconductor Inc LE Chapter 5 Working with Debugger e Description e Bit field explanations and values Some registers have multiple modes meaning that the register s bits can have multiple meanings depending on the current mode If the register you exa
317. explains how to configure a remote system to use a JTAG configuration file To connect to a JTAG chain specify these settings in the launch configurations 1 Create a JTAG initialization file that describes the items on the JTAG chain For more information on how to create a JTAG initialization file see JTAG configuration file syntax and Using a JTAG configuration file to specify multiple linked devices on a JTAG chain 2 Open the CodeWarrior project you want to debug 3 Select Run gt Debug Configurations The Debug Configurations dialog box appears with a list of debug configurations that apply to the current application 4 Expand the CodeWarrior tree control CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 376 Freescale Semiconductor Inc aN 10 11 12 13 14 15 Chapter 8 JTAG Configuration Files From the expanded list select the debug configuration for which you want to modify the debugger settings The Debug view shows the settings for the selected configuration Select a remote system from the Connection drop down list Select a core from the Target list In the Connection group click Edit The Properties for lt project gt window appears Click Edit next to the Target list The Properties for lt remote system gt window appears Click Edit next to the Target type drop down list The Target Types dialog box appears
318. f you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired location from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location Click Next The Import C C Assembler Executable Files page appears Click Browse next to the Executable field Select the vmlinux elf file Click Open From the Processor list expand the processor family and select the required processor CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 341 a E Debugging Loadable Kernel Modules 12 13 14 15 16 17 18 19 20 21 Select Bareboard Application from the Toolchain group Select Linux Kernel from the Target OS list Click Next The Debug Target Settings page appears From the Debugger Connection Types list select the required connection type Specify the settings such as board launch configuration connection type and TAP address if you are using Ethernet or Gigabit TAP Click Next The Configuration page appears From the Core index list select the required core Click Finish The wizard creates a project according to your specifications You can access th
319. ferent location for the new project By default the Use default location checkbox is selected 7 Click Next The Import C C Assembler Executable Files page appears 8 Click Browse CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 219 Joer Debugging Externally Built Executable Files The Select file dialog box appears Use the dialog box to navigate to the executable file that you want to debug 9 Select the required file and click Open The Select file dialog box closes The path to the executable file appears in the File to import text box Tip You can also drag and drop a e1 file in the CodeWarrior Eclipse IDE When you drop the e1 file in the IDE the Import a CodeWarrior Executable file wizard appears with the e1 file already specified in the Project Name and File to Import text box 10 Check the Copy the selected file to current project folder checkbox to copy the executable file in the current workspace 11 Click Next The Processor page appears 12 Select the processor family for the executable file 13 Select a toolchain from the Toolchain group Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform 14 Select if the board runs no operation system or imports a Linux kernel project to be executed o
320. fied in hexadecimal for example oxrrrrascp octal for example 037777725715 Or decimal for example 4294945741 Example This command writes the value 0x0220000 to SPR register 638 writespr 638 0x0220000 9 2 2 tcl target initialization commands This section describes the tool command language TCL based commands that are used to initialize a target Similar to a cfg initialization file a TCL based initialization file can contain target specific initialization processor core initialization or debugger specific initialization CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 394 Freescale Semiconductor Inc Chapter 9 Target Initialization Files The tc1 file format offers some advantages over the cfg file format for example it implements a better memory management approach and allows you to use memory address ranges higher than 32 bit and use flow control statements The tc1 file format is the recommended target initialization file format The debugger automatically executes the TCL script when you debug the launch configuration You can also execute the script manually at any time from the Debugger Shell by using the source command The TCL based target initialization is basically a debugger shell script and implicitly supports all Debugger Shell commands For more details on the Debugger Shell commands see CodeWarrior Development Studio Common Feat
321. fier in C source code This setting is equivalent to specifying the warn_structclass pragma and the warnings structclass command line option Include File Capitalization Select to issue warning messages if the name of the file specified in a include file directive uses different letter case from a file on disk This setting is equivalent to specifying the warn_filenamecaps pragma and the warnings filecaps command line option Check System Includes Select to issue warning messages if the name of the file specified in a include file directive uses different letter case from a file on disk This setting is equivalent to specifying the warn_filenamecaps system pragma and the warnings sysfilecaps command line option Pad Bytes Added Select to issue warning messages when the compiler adjusts the alignment of components in a data structure This setting is equivalent to specifying the warn_padding pragma and the warnings padding command line option Undefined Macro in if Select to issue warning messages if an undefined macro appears in if and elif directives This setting is equivalent to specifying the warn_undefmacro pragma and the warnings undefmacro command line option Non Inlined Functions Select to issue warning messages if a call to a function defined with the inline _inline or_inline keywords could not be replaced with the function body This setting is equivalent to specifying the warn_notinline
322. file To enable the debugger MMU awareness you need to remove the translate directives from the memory configuration file for processors that support this feature e500v2 e500mc e5500 and e6500 cores 36 Bit Physical Address Support In general a 32 bit processor core including e500v2 and e500mc has virtual memory support for 23 bytes of effective address space and real memory support for 236 bytes of physical address space Therefore only the physical address space is 36 bit wide whereas the effective address space remains 32 bit wide The processor executes in the effective address space Therefore to have the processor use the entire 36 bit physical address space you need to configure the MMU to translate 32 bit effective addresses to 36 bit real addresses When debugging a bareboard system you can either use a memory configuration file to instruct the debugger about non 1 1 MMU translations or let the debugger read the MMU translations automatically from the target Tip A memory configuration file must not be related directly only to the 36 bit addressing features For more information on memory configuration files see the Memory Configuration Files chapter 5 7 CodeWarrior Command Line Debugger CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 159 CodeWarrior Command Line Debugger Code Warrior supports a command line interface th
323. for constant data sections Check appropriate checkboxes to specify downloading and verifications for initial launch and for successive runs Initialized Data Controls downloading and verification for initialized data sections Check appropriate checkboxes to specify downloading and verifications for initial launch and for successive runs Uninitialized Data Controls downloading and verification for uninitialized data sections Check appropriate checkboxes to specify downloading and verifications for initial launch and for successive runs Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 112 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 7 Debugger Options Download continued Execute Tasks Enables the execution of target tasks Name For target tasks this is the name of the target task as seen in the Target Task view For Debugger Shell scripts this is the path to the CLDE script Task Type Contains either Debugger Shell scripts or target tasks such as Flash Programmer Add Adds a download task that can be either a target task or Debugger shell script Remove Removes the selected target task or debugger shell script Up Moves the selected task up the list Down Moves the selected task down the list 4 1 3 4 PIC Use this page to specify an alternate address a
324. from the Cache view to the cache registers on the target hardware if the target hardware supports doing so Refresh Reads data from the target hardware and updates the Cache view display Invalidate Discards the cache Flush Flushes the entire contents of the cache This option commits uncommitted data to the next level of the memory hierarchy then invalidates the data within the cache Lock Locks the cache and prevent the debugger from fetching new lines or discarding current valid lines Enable Disable Turns on off the cache Disable LRU Removes the Least Recently Used LRU attribute from the existing display for each cache line This option is never activated because the function does not apply to Power Architecture processors Enable Disable Parity Turns on off the line data parity checksum calculation Inverse LRU Copy Cache Displays the inverse of the Least Recently Used attribute for each cache line This option is never activated because the function does not apply to Power Architecture processors Copies the cache contents to the system clipboard Export Cache Exports the cache contents to a file Search Finds an occurrence of a string in the cache lines Search Again Finds the next occurrence of a string in the cache lines Preserve Sorting Preserves sorting of the cache when the cache data is updated and the cache is refreshing This option is disabled by default If en
325. ge Symbolics Cache The old vmiinux e1 file is being used by the debugger but after you select this option the debugger stops using this file in the disk 4 Copy the new vmiinux e1 file over the old file Now when you re initiate a debug session the updated vmiinux eir file is used for the current debug session 7 7 5 1 2 Cache Symbolics Between Sessions is Disabled CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 318 Freescale Semiconductor Inc E y Chapter 7 Debugging Embedded Linux Software To replace the modified vmiinux e1 file if the Cache symbolics between sessions is disabled 1 Terminate the current debug session 2 Copy the new vmiinux e1f file over the old file Now when you re initiate a debug session the updated vmiinux eir file is used for the current debug session 7 7 6 Configuring the kernel project for debugging Once you have created a CodeWarrior project using the Linux kernel image the next action is to configure this project for debugging e Configuring a Download Kernel Debug Scenario e Configuring an Attach Kernel Debug Scenario e Setting up RAM disk e Using Open Firmware Device Tree Initialization method 7 7 6 1 Configuring a Download Kernel Debug Scenario This section describes how to configure a download debug scenario For a download debug scenario CodeWarrior e Resets the target e Runs the initialization file
326. get Alternatively clear the option to ignore the initialization script s e Target multicore only Select the core to be debugged For SMP debugging select all cores in the SMP group 4 1 2 Arguments Use this tab to specify the program arguments that an application uses and the working directory for a run or debug configuration CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 105 Using Debug Configurations Dialog Box E Main 69 Arguments Debugger Trace and Profile Es Source PE Environment E Common Program arguments Working directory Use default Figure 4 2 Debug Configurations Arguments Tab The table below lists the various options available on the Arguments tab page Table 4 3 Arguments Tab options an O en O Program arguments Specifies the arguments passed on the command line Variables Click to select variables by name to include in the program arguments list Working Directory Specifies the run debug configuration working directory Use default Select to specify the default run debug configuration working directory which is a directory within the current project directory or clear to specify a different workspace a file system location or a variable For Linux applications the default working directory is the current directory on the process that sta
327. get drop down list The Properties for lt system launch configuration gt window appears Select the appropriate system type from the Target type drop down list Make the respective settings in Initialization tab Memory tab and Advanced tab Click OK to save the settings Click OK to close the Properties window IANA In this section e Initialization tab e Memory tab e Advanced tab 5 5 1 Initialization tab Use the Initialization tab to specify target initialization file for various cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 155 Editing remote system configuration Initialization Memory Advanced Execute target reset applies to initial launch only Target Core reset Run out of reset Initialize target Initialize target script P4080 O O e500mc 0 F O 4ProjDirPath CFG P408 e500mc 1 O O 4ProjDirPath CFG P408 e500mc 2 O Fi 4ProjDirPath CFG P408 e500mec 3 O O ProjDirPath CFG P408 e500mc 4 O O ProjDirPath CFG P408 e500mc 5 O O ProjDirPath CFG P408 e500mc 6 O O 4ProjDirPath CFG P408 e500mc 7 O O ProjDirPath CFG P408 Note Target initialization files and core reset only apply to cores being launched Figure 5 1 USB TAP connection type Initialization tab The table below lists the various options available on the Initialization tab page Table 5 17
328. gisters L2MMU_CAMO0 through L2MMU_CAM15 continued 4 GB 0x1111111111 26 26 RESERVED 27 31 WIMGE Memory cache attributes write through cache inhibit memory coherence required guarded endian 32 32 UR User read permission bit 33 33 UW User write permission bit 34 34 UX User execute permission bit 35 35 SR Supervisor read permission bit 36 36 Sw Supervisor write permission bit 37 37 SX Supervisor execute permission bit 38 38 X0 Extra system attribute bits for definition by system software 39 39 x1 Extra system attribute bits for definition by system software 40 43 UO U3 User attribute bits used only by software These bits exist in the L2 MMU TLBs only TLB1 and TLBO 44 44 IPROT Invalidation protection exists in TLB1 only 45 59 RESERVED 60 63 Extended RPN 64 83 RPN Real page number 84 95 RESERVED 96 115 EPN Effective page number 116 126 RESERVED 127 127 V Valid bit for entry 5 10 5 4 3 e500mc Registers This section provides information about e500mc TLBO registers starting from L2MMU_TLBO through L2MMU_TLB511 Table 5 29 e500mc TLBO Registers L2MMU_TLBO through L2MMU_TLB511 0 0 V Valid bit for entry 1 1 TS Translation space Compared with MSR IS instruction fetch or MSR DS memory reference to determine if this TLB entry may be used for translation 2 5 TSIZE Defines the page
329. gram that is from the main function Before executing the main function the application load process must be interrupted by setting a breakpoint after the MMU setup and before the main execution It can be performed in two steps 1 Attach to a running instance of the application as described above and set the breakpoint a Right click the selected thread in the application stack The context menu appears b Select the Debug option to debug the application after the application stack is displayed in the Disassembly view c Click the thread in the Debug view The program counter icon on the marker bar points to the next statement to be executed d Set breakpoint at the stack frame under main gt 2 Click Resume and restart the application from the console 3 When the breakpoint is hit set a new breakpoint on source and repeat the above steps CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 370 Freescale Semiconductor Inc Chapter 8 JTAG Configuration Files This chapter explains about JTAG configuration files that pass specific configuration settings to the debugger and support chaining of multiple devices A JTAG configuration file is a text file specific to the CodeWarrior debugger which describes a custom JTAG scan chain You can specify the file in the remote system settings This chapter explains e JTAG configuration file syntax e Using a
330. gt Toggle Line Breakpoint A blue dot appears in the marker bar to the left of the line shown in the figure below This dot indicates an enabled breakpoint After the debugger installs the breakpoint a blue checkmark appears beside the dot The debugger installs a breakpoint by loading into the Java virtual machine the code in which you set that breakpoint Tip An alternate way to set a breakpoint is to double click the marker bar to the left of any source code line If you set the breakpoint on a line that does not have an executable statement the debugger moves the breakpoint to the closest subsequent line that has an executable statement The marker bar shows the installed breakpoint location If you want to set a hardware breakpoint instead of a software breakpoint use the bp command in the Debugger Shell view You can also right click on the marker bar to the left of any source code line and select Set Special Breakpoint from the context menu that appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 164 Freescale Semiconductor Inc AAA A A Chapter 5 Working with Debugger Lie 3in core0 m ILLL Project Stationery ESAAAAAAAA AAA AAA AAA NADAN include lt stdio h gt void main int i 0 printf Welcome to CodeWarrior r n asm sc generate a system call exception to demonstrate the ISR Figure 5 8 Editor View
331. gure below ret add_example a b Tip Before you set breakpoints in the code of an imported shared library to step into the code you can use the Executables view to navigate and check the source files of the library For more information on the Executables view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 270 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software open CodeWarrior Eclipse Help by selecting Help gt Help Contents in the CodeWarrior IDE and then select Third Party References gt C C Development User Guide gt Reference gt C C Views and Editors gt Executables view in the Contents pane int ret int a b a 10 b 20 ret temp a b ib N NN ret add example a b Step In here Figure 7 16 SharedLib_IM c Step In Location 4 In the Debug view click Step Into to step into the code of the ada_exampie function The debugger steps into the source code of the ada_examp1e function in the Libexample c file shown in the figure below Le LibExample c 3 1 B Qutine or Disassembly 09 17 p 100 Name Value 18 q p 200 Mes 2 add example local 2 3 Step In here 09 y 3 return Xx y q 6 p 100 add example local int x int y LL int p q p 100 a p 200 return x y q 8 lw m Figure 7 17 LibExample c add_example Function 5 After stepping in
332. h cinttypes h cmath h cwctype h math_api h wstdio h alloc c math_api c math_double c math_float c math_fma c math_longdouble c mem_funcs c string c fminmaxdim c math_sun c ansi prefix PPCEABI bare h stdarg EPPC h math_ppc c CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 437 Software floating point emulation support 12 2 Modifications to avoid errors from GCC LD tool This section talks about modifications done to avoid getting errors from the GCC linker load LD tool The GCC LD tool throws errors for the _rom_copy_info and _bss_init_info Symbols when used with the run time libraries built with CodeWarrior This is because the CodeWarrior linker stores the symbols internally and so they are not available for the GCC LD To overcome this problem a new LCF file gccport 1cf which contains the symbols required by the GCC LD has been introduced without changing the MSL C library sources The modifications are summarized below e The call to rom copy info from init data has been commented out e The stack is always aligned to 16 bytes e Two new symbols _ s1 bss start and _fs1_bss_ena have been introduced in the _ppc_eabi_linker h file The values of these symbols are set by the gecport 1ce file 12 2 1 Files modified The gccport 1cr file provides definitions for the fo
333. h L2MMU_LRAT7 0 4 LSIZE Logical page size Describes the size of the logical page of the LRAT entry The possible values are the same as for TSIZE field from TLBO and TLB1 5 25 Reserved 26 31 LPID Logical partition ID value Is compared with LPIDR during translation to help select an LRAT entry 32 55 Reserved 56 83 LRPN Real page number 84 119 Reserved 120 147 LPN Logical page number Describes the logical address of the start of the page 148 158 Reserved 159 159 V LRAT valid bit 5 10 6 Working with IMMR This section describes internal memory map register IMMR Use the Debugger Shell eppc sermmrpaseadar command to define the memory location of the IMMR This information lets the CodeWarrior debugger find the IMMR register during a debug session NOTE The Change IMMR command is applicable to 825x or 826x processors CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 201 Viewing memory 5 11 Viewing memory This section explains how to view memory of a target processor The debugger allocates multiple memory spaces in the IDE for flexible control over the memory access The number of supported memory spaces and their properties depends upon the debugged processor You can display and access the supported memory spaces for a target in the Memory and Memory Browser views in the Import Export
334. hared library a Click the Other Executables tab in the Debugger page b Click Add The Debug Other Executable dialog box appears c Click Workspace The Open dialog box appears d Navigate to the location where you have stored the 1ibexamp1e so file in your project directory Select the libexample so file name f Click Open The host side location of the shared library appears in the Specify the location of the other executable field g Select the Load Symbols checkbox so that the debugger has visibility of symbols within the library h Select the Download to Device checkbox The Specify the remote download path field is activated i Type tmp in the Remote download path text box The shared library will be downloaded to this location when you debug or run the executable file O The default location of shared libraries on the embedded Linux operating system iS usr 1ib In the current example the remote download location Of 1ibexample so is tmp j Click OK The settings shown in the figure below are saved CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 268 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software Debug Other Executable Specify the location of the additional executable Additional Executable File D Profiles b34930 workspace SharedLibrary LibExample libexample so Load Symbols Download to Device Specify the re
335. he IDE starts a debug session connects to the target system and halts the system at the program entry point 4 Select Window gt Show View gt Registers The Registers view appears as shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 183 Working with Registers bat Registers 5 st E EA 7 pu Y Name E ee General Purpose Registers E mM e500mc Special Purpose Registers ma Performance Monitor Registers a a Floating Point Registers amp fii regPPCTLBO arai L2MMU_TLBO Ox4d400005044ecd99F51000034900000 L2MMU_TLB1 0x44e00000e3a0edd1e14cc00092081000 L2MMU_TLB2 Ox44a6000020d2af531207b0002d902000 L2MMU_TLE3 0x44e0000e1c44db3571870009e703000 L2MMU_TLB4 0x44dc0000f877e0ce93d310005c584000 L2MMU_TLES 0x4dF0000a850e1f522447000c0505000 L2MMU_TLB6 Ox45b00002224c8b7955 1000074786000 L2MMU_TLB Ox4bd0000F1310e027b18c000d4107000 L2MMU_TLBS Ox44c 90000b91544890aa4900003908000 L2MMU_TLB9 0x4411000062a523295034b00015f09000 L2MMU_TLB10 Ox4770000c9966dba1e52a000F5a0a000 L2MMU_TLB11 0x43e00008903058a586ea00041bs8b000 L2MMU_TLB12 0x44270000c945a5c93e5b4000e9f8c000 L2MMU_TLB13 0x41500006380657531ea60009570d000 L2MMU_TLB14 _Ox4de00000a77899bc03840005b10e000 01 10 01 10 01 10 ol 10 01 10 01 10 01 10 01 10 01 10 01 10 01 10 01 10 ol 10 01 10 01 Figure 5 18 Registers View TLB Register Groups Disp
336. he Toolchain group Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform NOTE The current release does not include toolchains for Linux applications by default To add the required build tools support you should install the corresponding service pack for the required target For more information on installing CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 50 Freescale Semiconductor Inc Chapter 2 Working with Projects service packs see the Service Pack Updater Quickstart available in the lt cwrnstallpir gt pa folder 13 Select an option from the Floating Point drop down list to prompt the compiler to handle the floating point operations by generating instructions for the selected floating point unit 14 Click Finish The wizard creates a library project according to your specifications You can access the project from the CodeWarrior Projects view on the Workbench The new library project is ready for use You can now customize the project to match your requirements 2 3 3 Creating CodeWarrior Linux Application Project You can create a CodeWarrior Linux application project using the CodeWarrior Linux Project Wizard To create a CodeWarrior Linux application project perform these steps 1 Select Start gt All Programs gt Freescale CodeW
337. he action Further the command stops the target optionally runs an initialization script downloads the specified ELF file and modifies the program counter PC Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 103 Using Debug Configurations Dialog Box Table 4 2 Main Tab Options continued Attach Assumes that code is already running on the board and therefore does Description not run a target initialization file The state of the running program is undisturbed The debugger loads symbolic debugging information for the current build target s executable The result is that you have the same source level debugging facilities you have in a normal debug session the ability to view source code and variables and so on The function does not reset the target even if the launch configuration specifies this action Further the command loads symbolics does not stop the target run an initialization script download an ELF file or modify the program counter PC NOTE The debugger does not support restarting debugging sessions that you start by attaching the debugger to a process Connect Runs the target initialization file specified in the RSE configuration to set up the board before connecting to it The Connect debug session type does not load any symbolic debugging information for the current buil
338. he connection protocol For example CCS Memory tests are the complex tests that can be executed in two modes Host based and Target based depending upon the selection made for the Use Target CPU checkbox e Selected Target Based e Deselected Host Based The Host Based tests are slower than the Target Based tests 11 3 3 1 Use Case 1 Execute host based Scope Loop on target You need to perform the following action to execute the host based scope loop on the target 1 Select Scope loop in the Action Type 2 Set Memory Access settings from the Memory Access section 3 Set the speed used for the scope loop diagnostic from the Loop Speed section 4 Save the settings 5 Press Execute to execute the action CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 426 Freescale Semiconductor Inc Chapter 11 Working with Hardware Tools 11 3 3 2 Use Case 2 Execute target based Memory Tests on target You need to perform the following action to execute the target based memory test on the target 1 Select Memory Test in the Action Type 2 Specify Target Address and Access Size settings from the Memory Access section 3 Specify the following settings for Memory Tests section e Test Area Size The tested memory region is computed from Target Address until Target Address Test Area Size e Tests to Run Select tests to run on the target e Number of passes Specify number
339. he cores on which U Boot is running 3 On the Debugger tab in the Other Executables page specify the second elf file needed to perform U Boot debug in NAND a Click Add The Debug Other Executable dialog box appears b In the Additional Executable File text box browse to the U Boot folder and select the U Boot file c Select the Load Symbols checkbox d Click OK On the Debugger tab in the PIC page clear the Alternate Load Address checkbox On the Source tab specify the source mapping configuration Click Apply to save the settings made to the various tabs Click Debug YAN The Debug perspective appears with the core 0 stopped at the reset vector shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 286 Freescale Semiconductor Inc NO Chapter 7 Debugging Embedded Linux Software NOTE Select the Core reset checkboxes for all cores except core 0 and then click Reset in the Debug view You will then see core O stopped at the reset vector AS Debug B sis D gt b gt 223 PR ae El E Debug u boot CodeWarrior Attach E ge EPPC u boot core 0 Suspended E a Thread ID 0x0 Suspended Signal Halt received Description User halted tr 1 AsmSection home ocal harpreetsethi LinuxBSP Itib e 500mc 2008051 A lo S resetvec s 53 O section resetvec ax gt b start_e500 Figure 7 22 Debug
340. he installation program until the file copy process begins You will be prompted to input the required build tool install path Ensure you have the correct permissions for the install path 6 Upon successful installation you will be prompted to install the ISO for the core s you want to build For example if you want to build the SDK for P4080 that is a e500mc core then you have to install the ISO images for e500mc core c23174e5e3d187f43414e5b4420e8587 QorlQ SDK V1 2 PPCE500MC 20120603 yocto iso partl 292c6e1c5e97834987fbdb5f69635a1d QorlQ SDK V1 2 PPCE500MC 20120603 yocto iso part2 NOTE You can see the SDK User Manual for instructions about how to build the BSP images and run different scenarios from the iso help documents pdf location 7 7 3 Configuring the Build Tool After installing the BSP you need to configure the build tool and build the Linux kernel and U boot images for CodeWarrior debug For more information on configuring the build tool see the SDK User Manual from iso help documents pdf 7 7 4 Configuring the Linux Kernel After you complete the BSP configuration configure the Linux kernel to enable Code Warrior support To configure the Linux kernel perform the following steps 1 Launch a terminal window and navigate to the lt yocto_installtion path gt build_ lt board gt _ release folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 314 F
341. he port number to launch the CCS server on The table below describes the various options available on the Advanced tab page Target connection lost settings Try to reconnect Terminate the debug session Table 5 10 Simics Advanced Tab Options in O n If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout seconds Specifies the CCS timeout period If the target does not respond in the provided time interval you receive a CCS timeout error Enable logging Select to display protocol logging in console 5 3 6 TCF Select this connection type when Simics simulator is used CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 144 Freescale Semiconductor Inc eeeEyEyEyEyEyyyyEEEEE y Chapter 5 Working with Debugger To configure the settings of a TCF connection type perform the following steps 1 Select Run gt Debug Configura
342. he selected string one position higher in the list e Move down Click to move the selected string one position lower in the list 3 3 2 3 3 Includes Use this panel to specify paths to search for tincluae files NOTE The IDE displays an error message if a header file is in a different directory from the referencing source file In some instances the IDE also displays an error message if a header file is in the same directory as the referencing source file For example if you see the message could not open source file myfile h you must add the path for myri1e n to this panel The table below lists and describes the various options available on the Includes panel Table 3 40 Tool Settings Includes Options Include paths 1 Adds the directory to the list of directories to be searched for header files Directories named by 1 are searched before the standard system include directories If the directory is a standard system include directory the option is ignored to ensure that the default search order for system directories and the special treatment of system headers are not defeated If the directory name begins with then the will be replaced by the sysroot prefix Use these toolbar buttons to work with the Include paths I panel e Add Click to open the Add directory path dialog box and specify the directory search path e Delete Click to delete the selected directory search path To confirm deletion click
343. his option is 200 ms The delay needs to be increased if the debugger connection does not work reliably after issuing the reset This can happen for specific boards and in scenarios where the PBL is used to perform boot image manipulation for example copying U Boot from SPI flash to internal cache SRAM during reset that does not complete within the default reset timeout window A good start value to test out board specific requirements in such cases is 1000 ms however this value may need to be increased for very large PBL transfers NOTE Reset delay is supported for processors based on the e500mc e5500 and e6500 cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 Freescale Semiconductor Inc 151 p JTAG diagnostics tests 5 4 JTAG diagnostics tests JTAG diagnostics tests are advanced diagnostics tests performed on the JTAG connection to be used during custom board bring up Once connection to the probe has been established the debugger performs JTAG diagnostics tests and prints the test results to the console log Five JTAG header pins TDI TDO TMS TCK and TRST are used in JTAG diagnostics tests Failing of any of these pins can generate errors Other JTAG header pins such as HRESET are architecture specific and not directly related to JTAG JTAG diagnostics tests available in CodeWarrior are e Power at probe test e IR scan test e Bypass scan
344. his setting to generate smaller and faster code This setting is equivalent to specifying the cpp_exceptions command line option Enable RTTI Allows the use of the C run time type information RTTI capabilities including the dynamic_cast and typeid operators This setting is equivalent to specifying the RTTI command line option Enable C bool type true and false Constants Instructs the C compiler to recognize the bool type and its true and false values specified in the ISO IEC 14882 1998 C standard This setting is equivalent to specifying the bool command line option Enable wchar_t Support Instructs the C compiler to recognize the wchar_t data type specified in the ISO IEC 14882 1998 C standard This setting is equivalent to specifying the wchar_t command line option EC Compatibility Mode Verifies C source code files for Embedded C source code This setting is equivalent to specifying the dialect ec command line option ANSI Strict Recognizes source code that conforms to the ISO IEC 9899 1990 standard for C This setting is equivalent to specifying the ansi strict command line option ANSI Keywords Only Generates an error message for all non standard keywords NOTE Enable this setting only if the source code strictly adheres to the ISO standard This setting is equivalent to specifying the stdkeywords command line option Expand Trigraphs Specifies comp
345. hitecture of the cache The basic format of a shell global cache command is command lt cache ID gt on off The optional cache ID number argument selects the cache that the command affects The optional on or off argument changes a cache s state For example to display a particular cache s characteristics gt cmdwin ca show 1 displays the characteristics of the second processor cache You use the cmd ca default to assign a default cache that becomes the target of global cache commands For example gt cmdwin ca default 0 makes the first processor cache the default cache Subsequent global cache commands that do not specify a cache ID will affect this cache Other cache commands require the off or on state argument When specifying a particular cache the state argument follows the ID argument For example gt cmdwin ca lock 2 on locks the contents of the third processor cache while gt cmdwin ca enable 1 off disables the second processor cache 5 12 6 Debugger Shell Cache Line Commands The cm win caln Commands manage cache line operations They affect memory elements within a designated cache The table below lists these commands CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 210 Freescale Semiconductor Inc LE y Chapter 5 Working with Debugger Table 5 38 Debugger Shell Cache Line Commands cmdwin ca
346. ibrary for the new board s hardware configuration The location of the customized library installation must differ from the existing MSL libraries to ensure that it does not affect the creation of new projects for the Linux operating system Otherwise every time you run the wizard to create a new bareboard application the CodeWarrior IDE would automatically use the customized C library NOTE The custom MSL C Library discussed in this chapter is already installed as a part of the CodeWarrior installation process and can be located under the 1pa1pa_supportms1 directory This chapter explains e Source library modifications e Modifications to avoid errors from GCC LD tool e Software floating point emulation support e Building a custom MSL C library CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 435 Source library modifications 12 1 Source library modifications This section describes the modifications done to the existing MSL C library sources to make them compatible with the GCC compiler The existing MSL C library sources when built with GCC compiler generate error messages due to language syntax and implementation differences To overcome these errors some modifications to the existing library sources are necessary The modifications handled by the conditional directive _eccrorr_ are summarized below e CodeWarrior directives such
347. icit library linking is mentioned however in the example project shipped with Code Warrior sharedLibrary we have also demonstrated explicit library loading For explicit library loading we have used another build launch configuration sharedLib_ExX 2 Remove the default main c file and add the source files shareanib_1m c and LibExample c to your project 3 In the Code Warrior IDE create a header file nibexamp1e n as depicted in the listing below Listing 7 8 Source Code for LibExample h LibExample h int add_example int x int y int add_example local int x int y 4 Save the Libexample n file in the project directory 5 Enter the below code into the editor window of the shareaib_1m c file Listing 7 9 Source Code for SharedLib_IM c Sharedlib_IM c Demonstrates implicit linking User Include files include LibExample h function prototype declaration CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 263 ae Debugging a shared library int temp int int main program int main int ret int a b a 10 b 20 ret temp a b ret add_example a b step in here return ret int temp int i int j return i j 6 Enter the below code into the editor window of the Libzxample c file Listing 7 10 Source Code for LibExample c LibExample c user include fi
348. ick to move selected items down the Source Lookup Path list Restore Default Click to restore the default source search list Search for duplicate source files on the path Select to search for files with the same name on a selected path 4 1 6 Environment CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 124 Freescale Semiconductor Inc Chapter 4 Debug Configurations Use this tab to specify the environment variables and values to use when an application runs E Main 69 Arguments Debugger Trace and Profile y Source PE Environment E Common Environment variables to set Variable Value Figure 4 14 Debug Configuration Environment tab The table below lists the various options available on the Environment tab page Table 4 15 Environment Tab Options Potion escription O O Environment Variables to set Lists the environment variable name and its value New Click to create a new environment variable Select Click to select an existing environment variable Edit Click to modify the name and value of a selected environment variable Remove Click to remove selected environment variables from the list Append environment to native environment Select to append the listed environment variables to the current native environment Replace native environment with specified environment Select to r
349. iconductor Inc ey Chapter 2 Working with Projects Close Project Build All Ctrl B Build Configurations Build Project Build Working Set Clean Build Automatically Make Target gt Generate Makefiles Ctrl 6 Properties Figure 2 12 Project Menu Build All 2 4 2 Auto Build mode CodeWarrior IDE takes care of compiling source files automatically When auto build is enabled project build occurs automatically in the background every time you change files in the workspace for example saving an editor To automatically build all the projects in a workspace select Project gt Build Automatically from the CodeWarrior IDE menu bar Close Project E Build All Ctrl B Build Configurations Build Project Build Working Set gt Clean Build Automatically Make Target Generate Makefiles Ctrl 6 Properties Figure 2 13 Project Menu Build Automatically If auto build is taking too long and is interfering with ongoing development it can be turned off Select Project gt Build Automatically from the CodeWarrior IDE menu bar to disable auto build mode CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 55 Sa AAA lt A lt q K K K K K K K K K K K K K K K K KAKAKAKAKAAAA Importing Classic CodeWarrior Projects NOTE It is advised that you do not use the Build Automatically
350. iew Disassembly Locate File Edit Source Lookup Path TF Apply to Common Source Lookup Path Figure 7 33 Debug View When No Path Mapping is Specified CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 322 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software You can specify the path mappings either by adding a new path mapping on the Source tab or by clicking the appropriate buttons Locate File Edit Source Lookup Path that appear when a source path mapping is not found 4 Click Apply to save the settings 5 Click Close 7 7 6 3 Setting up RAM disk This section describes specifying RAM disk information that is used by the Linux kernel when it is booted You can specify RAM disk information in the Boot Parameters tab which is present on the OS Awareness tab of the Debugger tab of the Debug Configurations dialog box as shown in the figure below Table 7 8 lists the instructions to set up the RAM disk Target OS Linux vw Boot Parameters Debug Modules _ Enable Command Line Settings 000000000 Y Enable Initial RAM Disk Settings File Path D Temp yootfs ext2 qz Address 0x02000000 Size 0x00000000 Download to target Open Firmware Device Tree Settings File Path p4080sim dtb Address 0x00600000 Figure 7 34 Kernel Debug OS Awareness Tab
351. iguration before the rorx build configuration to avoid getting a library file missing error as the 1ibfork2c1one a is used in the Fork project 10 To specify the linker settings and add the support library to the project a Right click the rorx build configuration in the CodeWarrior Projects view b Select Properties from the context menu The Properties window for the shared library project appears c From the C C Build group select Settings d On the Tool Settings page from the Power ELF Linker container select Libraries In the Libraries 1 panel click Add 8 The Enter Value dialog box appears f Enter the library file name in the Libraries field 8 In the Libraries search path L panel click Add 8 The Add directory path dialog box appears h Enter the library path in the Directory field as shown in the figure below NOTE These settings enable the Code Warrior IDE linker to locate the shared library 1ibfork2clone a For detailed information on other linker command line arguments see GNU linker manuals You can find GNU documentation here http www gnu org CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 254 Freescale Semiconductor Inc A 7y Chapter 7 Debugging Embedded Linux Software Properties for Fork coreO Settings Resource Builders 7 C C Build Build configuration Fork x Build Variables Discovery Options Envi
352. iler to recognize trigraph sequences clear this option to use many common characters that look like trigraph sequences without including escape characters This setting is equivalent to specifying the trigraphs command line option Legacy for scoping Generates an error message when the compiler encounters a variable scope usage that the ISO IEC 14882 1998 C standard disallows but is allowed in the C language specified in The Annotated C Reference Manual ARM This setting is equivalent to specifying the for _scoping command line option Require Prototypes Specifies compiler to enforce the requirement of function prototypes Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc EEEa Chapter 3 Build Properties Table 3 19 CodeWarrior Build Tool Settings C C Language Options continued NOTE The compiler generates an error message if you define a previously referenced function that does not have a prototype The compiler generates a warning message if you define the function before it is referenced but do not give it a prototype This setting is equivalent to specifying the requireprotos command line option Enable C99 Extensions Specifies compiler to recognize ISO IEC 9899 1999 C99 language features This setting is equivalent to specifying the dialect c99 command line o
353. implements two address instruction breakpoints hardware breakpoints that can be used in a debug session Debugging interrupt handlers The e500v2 debug support in Code Warrior relies on Debug Interrupt functionality Due to interrupt priority levels debugging Machine Check interrupt handlers is not possible Also debugging Critical interrupt handlers is supported only in the range after the prolog saves the values of CSSRO and CSRRI1 registers and before the epilogue restores the aforementioned registers Otherwise hitting a breakpoint outside of this range will result in CSRR registers being overwritten thus causing incorrect return address for the interrupt Using memory configuration files for bareboard debugging When debugging bareboard applications CodeWarrior needs to be informed of the actual MMU configuration regarding translated areas For example CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 444 Freescale Semiconductor Inc Chapter 13 Debugger Limitations and Workarounds Translate virtual address to corresponding physical cacheable p address translate v 0xFE000000 p 0xFFE000000 0x00100000 NOTE For e500v2 cores the debugger can also automatically read the translations from the target MMU To have this behavior all translate directives need to be removed from the memory configuration file For more information see Memory translations 13 4 QorlQ co
354. ines a one megabyte address range ox100000 bytes is one megabyte e Instructs the debugger to convert a virtual address in the range 0xco000000 tO oxco100000 to the corresponding physical address in the range oxo0000000 tO 0x00100000 translate v 0xC0000000 p 0x00000000 0x100000 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 402 Freescale Semiconductor Inc Chapter 11 Working with Hardware Tools This chapter explains how to use the CodeWarrior hardware tools Use these tools for board bring up test and analysis In this chapter e Flash programmer e Flash File to Target e Hardware diagnostics e Import Export Fill memory 11 1 Flash programmer Flash programmer is a CodeWarrior plug in that lets you program the flash memory of the supported target boards from within the IDE The flash programmer can program the flash memory of the target board with code from a CodeWarrior IDE project or a file You can perform the following actions on a flash device using the flash programmer e Erase Blank check actions e Program Verify actions e Checksum actions e Diagnostics actions e Dump Flash actions e Protect Unprotect actions e Secure Unsecure actions The flash programmer runs as a target task in the Eclipse IDE To program the flash memory on a target board you need to perform the following tasks e Create a flash programmer target task CodeWarrior Developm
355. ing e Create multiple user defined sections e Generate S Record files e Generate PIC PID binaries The IDE runs the linker each time you build your project For more information about the CodeWarrior Power Architecture linker see the Power Architecture Build Tools Reference manual from the lt cwrnstal1pir gt Pa Help por folder For more information about the GCC Power Architecture linker see the 14 pat manual from the lt CWInstallDir gt Cross_ Tools gcc lt version gt lt target gt powerpc lt eabi eabispe aeabi linux libc gt share docs pdf folder 1 5 5 Debugger CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 24 Freescale Semiconductor Inc SSSSSSSSSSSS SSS __________ Chapter 1 Introduction The CodeWarrior Power Architecture debugger controls the execution of your program and allows you to see what is happening internally as the program runs You can use the debugger to find problems in your program The debugger can execute your program one statement at a time and suspend execution when control reaches a specified point When the debugger stops a program you can view the chain of function calls examine and change the values of variables and inspect the contents of registers The debugger allows you to debug your CodeWarrior project using either a simulator or target hardware The Power Architecture debugger communicates with the
356. ins various aspects of CodeWarrior debugging such as debugging a project connection types setting breakpoints and watchpoints working with registers viewing memory viewing cache and debugging externally built executable files NOTE This chapter documents debugger features that are specific to CodeWarrior Development Studio for Power Architecture For more information on debugger features that are common in all CodeWarrior products see CodeWarrior Development Studio Common Features Guide This chapter explains e Debugging a CodeWarrior project e Consistent debug control e Connection types e JTAG diagnostics tests e Editing remote system configuration e Memory translations e CodeWarrior Command Line Debugger e Working with Breakpoints e Working with Watchpoints e Working with Registers e Viewing memory e Viewing Cache e Changing Program Counter Value e Hard resetting e Setting Stack Depth e Import a CodeWarrior Executable file Wizard e Debugging Externally Built Executable Files CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 131 Debugging a CodeWarrior project 5 1 Debugging a CodeWarrior project This section explains how to change the debugger settings and how to debug a CodeWarrior project The CodeWarrior Bareboard Project Wizard or the CodeWarrior Linux Project Wizard sets the debugger settings of a project s l
357. ion Binary Interface available here http www freescale com files archives doc app_note PPCABI pdf The PowerPC EABI also specifies the object and symbol file format It specifies Executable and Linkable Format ELF as the output file format and Debug With Arbitrary Record Formats DWARF as the debugging information format For more information about those formats see e Executable and Linkable Format Version 1 1 published by UNIX System Laboratories e DWARF Debugging Standard website available at www dwarfstd org e DWARF Debugging Information Format Revision Version 1 1 0 published by UNIX International Programming Languages SIG October 6 1992 and available here www nondot org sabre os files Executables dwarf v1 1 0 pdf e DWARF Debugging Information Format Revision Version 2 0 0 Industry Review Draft published by UNIX International Programming Languages SIG July 27 1993 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 21 CodeWarrior Development Studio tools 1 5 CodeWarrior Development Studio tools This section talks about some important tools of CodeWarrior Development Studio Programming for Power Architecture processors is much like programming for any other CodeWarrior platform target If you have not used CodeWarrior tools before start by studying the Eclipse IDE which is used to host the tools Note that Co
358. ion File dialog box 10 Click OK to close the Properties for lt connection gt dialog box 12 Click OK to close the Properties for lt Target gt dialog box Click Debug The instruction pointer is now on the rfi function call NOTE For e500v2 cores 36 bit U Boot debug only a reset using BoardName uboot_ 36 stage2 tcl is needed In the Debugger Shell issue the following command to reset PIC load address to the location specified in u boot e1 setpicloadaddr reset CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 305 L Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 14 From the Debug view toolbar select the Instruction Stepping Mode 1 command 15 Ensure the Debug Current Instruction Pointer is at rti From the Debug view toolbar select the Step Into gt command to step into rti The Disassembly view appears S resetvec S sta K O 52 outline i Disassembly 33 232 mtspr SPRN_SRR1 r6 mtspr SPRN_SRRO 17 Oxfffff17c lt AsmSection 132 gt mtsrri r6 mtspr SPRN_SRR1 r6 rfi pri Oxfffff180 lt AsmSection 136 gt rfi 237switch as switch_as 238 L1 DCache is used for initial RAM L1 DCache is used for initial RAM Allocate Initial RAM in data cach Allocate Initial RAM in data cache lis r3 CFG INIT RAM ADDRGh lis r3 CFG_INIT_RAM ADDRG h ori r3 r3 CFG I
359. ion file from the following path lt CWInstallDir gt PA PA Support Initialization_Files Memory NOTE To select an appropriate memory configuration file it is necessary to inspect the TLB registers and check if there are address spaces translated or if there are memory configuration files available in the CodeWarrior layout that match your U Boot debug scenario CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 291 AAA Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 9 Click OK to close the Memory Configuration File dialog box 10 Click OK to close the Properties for lt Target gt dialog box 11 Click OK to close the Properties for lt connection gt dialog box 12 Click Debug The instruction pointer is now on the rti function call NOTE For e500v2 cores 36 bit U Boot debug only a reset using BoardName uboot_36 stage2 tcl is needed 13 In the Debugger Shell issue the following command to reset PIC load address to the location specified in u boot e1 setpicloadaddr reset 14 From the Debug view toolbar select the Instruction Stepping Mode 1 command 15 Ensure the Debug Current Instruction Pointer is at rti From the Debug view toolbar select the Step Into gt command to step into rti The Disassembly view appears S resetvec S sta X TE Outline Disassembly 3 232 mtspr SPRN_
360. is applied and then resumes automatically e Wait until the target is resumed manually Select to suspend and resume the target for trace configuration manually If this option is enabled and you choose to configure trace while the target is running the configuration is changed but not applied to the target until the target is suspended and resumed After configuring trace hardware start trace collection Select the option to start trace collection after configuring the trace hardware e Automatically Select to start trace collection immediately after configuring trace hardware Manually from the toolbar or by an Analysis Point Click to start your trace session and configure trace hardware with trace collection disabled Trace collection will be enabled later by clicking Start Collection or by executing code at an Analysis Point Stop trace collection when the core is suspended Select to stop trace collection When the trace collection stops upload trace results Select to upload trace results after the trace collection is stopped e Automatically Click to save data to the Trace dat file automatically after collection completes or is stopped e Manually from the toolbar Click to save the trace data manually to the Trace dat file The application configures the target and Click to start collecting new trace data for the trace session using your enables trace collection application Trace display Display ne
361. is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target does not respond in the provided time interval you receive a CCS timeout error Enable logging Select to display protocol logging in console CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 134 Freescale Semiconductor Inc 5 3 2 Ethernet TAP Chapter 5 Working with Debugger Select this connection type when Ethernet network is used as interface to communicate with the hardware device To configure the settings of an Ethernet TAP connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Select the Ethernet TAP from the Connection type drop down list The Connection and Advanced tabs display options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 3 Ethernet
362. k is created in the Target Tasks view NOTE You can perform various actions on a hardware diagnostic task such as renaming deleting or executing the task using the shortcut menu that appears on right clicking the task in the Target tasks view 11 3 2 Working with Hardware Diagnostic Action editor The Hardware Diagnostic Action editor is used to configure a hardware diagnostic task To open the Hardware Diagnostic Action editor for a particular task double click the task in the Target Tasks view The following figure shows the Hardware Diagnostics Action editor CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 419 SEE EEE AA Hardware diagnostics mu Test TengetTack 2 ie Hardware Diagnostics Action Action Type Specify the action Memory read write Scope loop Memory Test v Memory Access Specify the access parameters for memory accesses These parameters are used for all types of diagnostic actions Memory space and address Ox 00100000 Access Type Write Options Access Size O Read 67 9 1 unit Write Verify Memory Writes 2 units 3 4 units v Loop Speed Specify the speed used for the scope loop diagnostic Value from 0 to 1000 in milliseconds 900 v Memory Tests Specify options for memory tests to be run on the target OO0OOFFFO 1 Tests To Run Use Target CPU Walking 1 s 00000010 Bus Noise Address Hardware
363. kpoint using the Breakpoints view follow these steps 1 Open the Breakpoints view if it is not already open by selecting Window gt Show View gt Breakpoints The Breakpoints view appears displaying a list of breakpoints 2 Right click on the breakpoint you wish to remove and select Remove from the menu that appears The selected breakpoint is removed and it disappears from the both the marker bar and the list in the view NOTE To remove all of the breakpoints from the program at once select Remove All from the menu 5 8 4 Removing Hardware Breakpoints CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 167 Working with Breakpoints This section explains how to remove hardware breakpoints from a program in CodeWarrior IDE There are two ways to remove existing hardware breakpoints e Remove Hardware Breakpoints using the IDE e Remove Hardware Breakpoints using Debugger Shell 5 8 4 1 Remove Hardware Breakpoints using the IDE To remove a hardware breakpoint follow these steps 1 Right click on the existing breakpoint in the marker bar 2 Select Toggle Breakpoint from the menu that appears Alternatively you can remove the breakpoint from the Breakpoints view using the following steps 1 Open the Breakpoints view if it is not already open by choosing Window gt Show View gt Breakpoints The Breakpoints view appears
364. ks J Remote Systems T Target Tasks Problems Executables ory x 0 LB debugger Shel TTI a t E2 8 gt d 3 Be Physical cache inhibited 0xFE008000 OxFE008000 lt Hex gt 3 gt gt New Renderings 9 Physical cache inhbited OxFE008000 Address 0 3 4 7 8 B c F OOFEOOSOOO MS 00000000 00000000 00000000 CodeVarrior Debugger Shell v1 0 OOFEOOS010 00000000 00000000 00000000 00000000 gt mem ms OOFEOOSOZ0 00000000 00000000 00000000 00000000 S or v Virtual OOFEO0S030 00000000 00000000 00000000 00000000 6 or p Physical OOFEO0S040 00000000 00000000 00000000 00000000 7 or i Physical cache inhibited OOFEOOSOSO 00000000 00000000 00000000 00000000 k gt merm 1 0xFE008000 OOFEOOS0 0 00000000 00000000 oco000000 00000000 Y fe008000 0x00000FFF lt gt gt ors Figure 5 22 Monitor Memory Dialog Box 3 Select one of the supported memory spaces from the Memory space drop down list e Virtual v Indicates that the specified address space is same as the address space in which the processor executes When you select the Virtual option the debugger performs virtual to physical translations based on the MMU translations read from the target or based on the translate directives specified in the memory configuration file for bareboard debugging or the kernel awareness plug in for Linux debugging In addition the Virtual memory space is the one that is relevant for the Program Counter PC and the Stack Pointer SP register
365. l you receive a CCS timeout error Enable logging Select to display protocol logging in console JTAG config file This panel displays the JTAG configuration file being used This panel is populated only if you have selected a JTAG configuration file for your project If a JTAG configuration file is not selected this panel displays a None value For more details on JTAG configuration files see the JTAG Configuration Files chapter Advanced TAP settings Force shell download Select to force a reload of the TAP shell software Disable fast download Select to disable fast download NOTE This option is not available for processors based on e500mc e5500 and e6500 cores Enable JTAG diagnostics When selected the option enables performing advanced diagnostics of the JTAG connection to be used during custom board bring up After the connection to the probe has been established the debugger performs the JTAG diagnostics tests Power at probe IR scan check Bypass DR scan check Arbitrary TAP state move IDCODE scan check and the result of the tests are printed to the console log and in case of an error a CodeWarrior Alert box appears When this option is not selected the CodeWarrior debugger only performs a limited test while configuring the JTAG chain It checks if the PWR pin is correctly connected and displays a Cable disconnected error if not connected properly The connection details are
366. l accept the register names shown in the debugger s Registers view There are also commands to access built in registers of a processor core for example writereg The names of these registers follow the architectural description for the respective processor core for general purpose and special purpose registers Note that these names for example GPR5 might be different from names used in assembly language for example r5 You can identify the register names by looking at the debugger s Registers view NOTE The current release does not include c g initialization files but provides backward compatibility to these files The table below lists each command that can appear in a cfg target initialization file Table 9 1 cfg target initialization commands alternatePC reset stop writemem b ANDmmr resetCorelD writemem writemem w ANDmem run writemmr writereg IncorMMR setCorelD writereg64 writereg128 ORmem l sleep writereg192 9 2 1 1 alternatePC Sets the initial program counter PC register to the specified value disregarding any entry point value read from the ELF application being debugged CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 382 Freescale Semiconductor Inc _ _ _ _ _ _ _ _ _ a aa Chapter 9 Target Initialization Files Syntax alternatePC address Arguments address
367. lash DeviCeS oooococcoccconnconcononnconcnonncconcnnaneconccnnnos 280 761 Conftevang and Balding Botica 281 761 1 Writing configuration words ln BOOT CONE iaa 283 T02 Creating a Code warrior Presto Debug UB a 284 2635 Specie the Launch Contigurtation Stuart tdi 285 26 Debugsme U Boot ose Flash Devir A in laa 287 BOA POMO TADEO 287 TOAZ Debusping U Boot wate NOR als in 289 7 6 4 2 1 Debugging U Boot before switching address SPAC8 ooooocnnnnnonnnoncnnnnonnncnnanonncnnonononncnn non 289 7 6 4 2 2 Debugging U Boot in translated address SPACE oooococnicnnnnconnnnonnccnncnncnnonnnononnrrn ronca canon 290 7 6 4 2 3 Debugging U Boot after switching back to initial address space 293 ut Debugame U Boot m RA Mecane O 294 7643 Debugging U Boot using SPI and SD MMC Tas avincinsinc narran 295 7 6 4 3 1 Debugging U Boot before switching address space eeeeeseeseeeeeseeeseteeeeseeseeeaeeeees 296 3643 22 Debugging U Boot in translated address space ita 297 7 6 4 3 3 Debugging U Boot after switching back to initial address space 300 Pose Dezem Bool n RAW tira cie 301 Peas Debugging U Boot usme NAND Dato rd 302 7 6 4 4 1 Debugging U Boot before switching address SPAC ocococioconcnnccnnconnnncnnnnncnncnnoncnnnoncnnno 303 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 11 Section number Title Page THAAD Debueging U Boot in tr
368. layed The Registers view shows all registers supported by the target system The Registers view groups all regp crimo registers and regppctipi registers in the separate groups see the figure above To view all of the elements of a TLB register group double click the group you want to view A window appears that displays all of the elements of the selected TLB This window shows all of the TLB registers and their contents To modify TLB registers during a Code Warrior debug session select the TLB register you want to modify from the Registers view as shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 184 Freescale Semiconductor Inc ASA A A Chapter 5 Working with Debugger 2MMU_TLB 2MMU_TLBS 2MMU_TLB9 2MMU_TLB10 2MMU_TLB11 2MMU_TLB12 ORARALL MAA 1010 Pegisters 7 ot E 19o 1019 ame Ox4d400005044ecd99F5 1000034900000 0x44e00000e3a0edd1e14cc00092081000 0x44a6000020d2af531207b0002d902000 0x44e0000e1c44db3571870009e703000 0x44dc0000f377e0ce93d310005c584000 0x4dF0000a850e1f522447000c0505000 c8b79551000073786000 Ox4bd0000F1310e027b18c000d4107000 0x44c90000b91544890334900003908000 0x4411000062a523295034b00015F09000 Ox4770000c9966dba1e52a000F5a0a000 0x43e00008903058a586ea00041b8b000 0x44270000c945a5c93e5b4000e9f8c000 a al 0007 io o 1 o o fo 1 fo 0010 o 1 fo fo 1 1 fo fo f1 fo 001011 011110010101010100010000 000000
369. les include LibExample h functions definitions int add_example int x int y int p q p 100 a p 200 add example local 2 3 step in here return X y q int add example local int x int y int Pa p 100 q p 200 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 264 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software return x y qQ 7 4 2 Configure the shared library build configuration The next action is to configure the nibexamp1e build configuration which generates libexample so The steps are given below 1 Select the sharednibraryzxample project in the CodeWarrior Projects view 2 Select the nibexamp1e build configuration by selecting Project gt Build Configurations gt Set Active gt lt Build Configuration Name gt 3 Check nibzxample c and LibExample h in the Build column Tip Use the Code Warrior example project sharedLibrary as a reference to set up the build configuration settings of the LibExample build configuration 7 4 3 Configure the executable build configuration Now you need to set up the sharearip_1m build configuration The steps are given below 1 Select the sharednibraryzxample project in the CodeWarrior Projects view 2 Select the shareanib_1m build configuration by selecting Project gt Build Configurations gt Set Active gt lt Build Configuration Name gt 3 Specify the li
370. library so that it is different from the library built by the CodeWarrior tools 3 CodeWarrior run time libraries built with CodeWarrior are provided as Build Runtime Libraries NOTE The _start o and _ppc_eabi_init o files are to be included individually Otherwise the linker wont be able to locate the _start function the in _start o file 4 Reuse the pre built 1ibgcc a archive 5 To build an application a Use the below files e The MSL header files e The gccport icet linker command file b Set up the definitions for cccport_ POWERPC_ _PPC_EABI_ aNd _MWERKS c Use the following compiler options to build the libraries with the appropriate processor and compiler settings and to specify the include files nostdinc CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 439 Building a custom MSL C library S INCLUDE include msl_c directives to gcc h e fno builtin mcpu e500me c NOTE s incLupE denotes the path of the MSL header files 6 With the program s object file generated invoke the linker with the following options nostdlib nostartfiles nostdlib static e T gccport lcf e e start 7 And link it with the following files a _start o b _ppc_eabi_init o C syscall a d MSL C _PPCEABI bare N UC a Runtime PPCEABI N UC a 8 Use the gccport 1ct file as an input to the linker The generated
371. lid bits mtspr DBSR r1 Clear all valid bits Oxfffff010 lt AsmSection 16 gt mtspr spr304 rsp jue Enable L1 Caches early qu w v Enable L1 Caches early v lt gt Figure 7 26 U Boot Debug Disassembly View 10 Move the Debug Current Instruction Pointer tO _start_e500 11 Deselect the Instruction Stepping Mode 1 command You can now do source level debugging and set breakpoints in start s until the address space switch at the rfi before switch_as start s line 326 See Points to remember for more details 7 6 4 3 2 Debugging U Boot in translated address space This section tells how to debug U Boot in the translated address space in the SPI and SD MMC flash devices Once you have reached the rti call the execution will move to the next stage You should now use a memory configuration file for debugging in this section It is necessary to inspect the TLB registers to check if there are address spaces translated or to search in the CW PA10 layout PA PA_Support Initialization Files Memory if there are memory configuration files that match your U Boot debug scenario CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 297 AE Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices NOTE For e500v2 cores 36 bit U Boot debug only due to a hardware issue terminating the current debug session will put th
372. ll the threads created by a process share the signal settings of that process Signal settings cannot be configured at thread level 7 1 5 2 Default Signal Policy By default the SIGINT SIGILL SIGTRAP SIGSTOP and SIGSEGV signals are caught by the debugger The debugger stops the application being debugged if any of these signals is received 7 1 5 3 Modifying Signal Policy CodeWarrior IDE provides a view Signals which can be used to view signals and change the debugger s policy for a signal To open the Signals view perform the following steps 1 Select Window gt Show View gt Other in the CodeWarrior IDE The Show View dialog box appears 2 Select Debug gt Signals The Signals view appears as shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 248 Freescale Semiconductor Inc AAA gt Chapter 7 Debugging Embedded Linux Software 09 Variables Breakpoints J Cache iti Registers BA Modules amp Signals 3 SIGHUP 3y SIGINT 59 SIGQUIT 5 SIGILL 5 SIGTRAP 5 SIGABRT SIGBUS SIGFPE SIGKILL SIGUSR1 SIGSEGV git St gt git gi Figure 7 3 Signals View To send a signal to a stopped process or thread right click the signal in the Signals view and select Resume With Signal as shown in the figure below SIGUSR1 SIGSEGV Signal Properties n giilgn SIGUSR2 amp Resume With Signal Figure
373. ll to check all of the checkboxes Click Deselect All to clear all of the checkboxes 5 Click OK The Register Group dialog box closes The new group name appears in the Registers view 5 10 4 2 Editing a Register Group In the Registers view you can edit both the default register groups and the groups that you add To do so use the following steps 1 In the Registers view right click the name of the register group you want to edit CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 181 ee al Working with Registers A context menu appears 2 Select Edit Register Group from the context menu The Register Group dialog box appears 3 If you wish enter in the Group Name text box a new name for the group 4 Check the checkbox next to each register you want to appear in the group Tip Click Select All to check all of the checkboxes Click Deselect All to clear all of the checkboxes 5 Click OK The Register Group dialog box closes The new group name appears in the Registers view 5 10 4 3 Removing a Register Group In the Registers view you can remove register groups To remove a register group follow these steps 1 In the Registers view right click the name of register group that you wish to remove A context menu appears 2 Select Remove Register Group from the context menu The selected register group disappears from
374. llowing symbols stack _addr stack_end heap addr heap end e SDA BASE e SDA2 BASE e fsl bss _start e fsl bss end Following files are modified e start c ppc eabi_linker h 12 3 Software floating point emulation support This section tells how to access the emulation functions needed by the GCC compiler CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 438 Freescale Semiconductor Inc EES Chapter 12 Making a Custom MSL C Library The GCC compiler generates calls to the emulation functions found in the 1ibgcc a archive You can access this archive from the following path opt freescale usr local gcec 4 2 82 eglibc 2 5 82 2 powerpc linux gnu lib gcc powerpc linux gnu 4 2 1 nof libgec a 12 4 Building a custom MSL C library A custom MSL C library can be built with the makefile mst_c eppc cnu mak Which was derived from the MSL C For ARM implementation To build a custom MSL C library 1 Change directory to s lt cwInstal1Dir gt PA_Support MSL MSL_C PPC_EABI Project 2 Invoke make as follows gt make f MSL_C EPPC GNU mak TARGETS MSL C LINUXABI bare N UC The make file generates ms _c_LINUxABI_bare_N_uc a in the s lt cwInstal1Dir gt PA Support MSL MSL_C PPC_EABI Lib folder NOTE Change the environment variable of lt cwrnstal1pir gt ecc accordingly Some developers use an underscore to change the name of the GCC built
375. ln get Display cache line cmdwin caln flush Flush cache line cmdwin caln inval Invalidate cache line cmdwin caln lock Locks unlocks cache line emdwin caln set Writes specified data to cache line The basic format for a shell cache line command is command lt cache ID gt lt line gt lt count gt The optional cache ID argument specifies the cache that the command affects otherwise it affects the default cache as set by the cmawin ca default Command The required line argument specifies the cache line to affect The optional count argument specifies the number of cache lines the command affects The default is one line For example gt cmdwin caln flush 2 flushes line 2 of the default cache The cm win caln set Command varies from the other commands in that you must specify data words that fill the cache line For example gt cmdwin caln set 2 0112358 13 Sets the contents of cache line two where the first word has a value of 0 the second word has a value of 1 the third word has a value of 1 the fourth word has a value of 2 and so on NOTE If the command specifies a list of data values that are less than one line s worth of words then the values are repeated from the beginning of the list to complete the filling the cache line If too many data words are specified for the cache line to hold the extra values are discarded 5 12 7 Processor Specific Cache Features This section list
376. lopment Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 87 Build Properties for Power Architecture Table 3 29 Tool Settings Architecture Options continued Target Mode Specifies the target environment 32 bit 64 bit mode on which your generated code will run This option takes the following values e 32 bit Enables 32 bit code generation e 64 bit Enables 64 bit code generation 3 3 2 2 PowerPC Linker Use the PowerPC Linker panel to specify the GCC linker options that are specific to Power Architecture software development NOTE The list of tools presented on the Tool Settings page can differ based upon the toolchain used by the project The table below lists and describes the various options available on the PowerPC Linker panel Table 3 30 Tool Settings PowerPC Linker Options PA RRA A Command Specifies the PowerPC GCC command line driver or linker required to build the project All options Shows the actual command line the linker will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 2 2 1 General Use the General panel to specify the general linker behavior The following table lists and describes the various options available on the General panel Table 3 31 Tool Settings General Options II E Doseription Do not use standard start files nostartfiles
377. low lists and describes the various options available on the Input panel Table 3 14 CodeWarrior Build Tool Settings Input Options Compile Only Do Not Link Instructs the compiler to compile but not invoke the linker to link the object code This setting is equivalent to specifying the c command line option Do not use MWClncludes variable Restricts usage of standard system include paths as specified by the environment variable sMWCIncludess This setting is equivalent to specifying the nostdinc command line option Always Search User Paths Performs a search of both the user and system paths treating include statements of the form include lt xyz gt the same as the form include xyz This setting is equivalent to specifying the nosyspath command line option User Path i Use this panel to specify multiple user paths and the order in which to search those paths The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the i command line option User Recursive Path ir Appends a recursive access path to the current User Path list The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the ir path command line option System Path I 1 Changes the build target s search order of access paths to start with the system paths list The
378. ly to save the changes You have successfully configured a debug configuration CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 378 Freescale Semiconductor Inc Chapter 9 Target Initialization Files A target initialization file is a file that contains commands that initialize registers memory locations and other components on a target board The most common use case is to have the CodeWarrior debugger execute a target initialization file immediately before the debugger downloads a bareboard binary to a target board The commands in a target initialization file put a board in the state required to debug a bareboard program NOTE The target board can be initialized either by the debugger by using an initialization file or by an external bootloader or OS U Boot Linux In both cases the extra use of an initialization file is necessary for debugger specific settings for example silicon workarounds needed for the debug features This chapter explains e Using target initialization files e Target initialization commands 9 1 Using target initialization files This section describes how to configure the CodeWarrior debugger to use a specific target initialization file A target initialization file contains commands that the CodeWarrior debugger executes each time the launch configuration the initialization file is assigned to is debugged You can use the target i
379. maximum number of bits flips from one access to the next 11 3 2 4 5 Data lines To force bit flips in data lines the test uses two sets of static data a pseudo random set and a fixed pattern set Each set contains 31 elements a prime number The test uses a prime number of elements to avoid coinciding with binary math boundaries The sets are unique to each addressing mode so as to occupy the full range of bits e The test uses the pseudo random data set to stress the data lines in a repeatable but pattern less fashion e The test uses the fixed pattern set to force significant numbers of data bits to flip from one access to the next CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 425 EA el Hardware diagnostics The sub tests execute similarly in that each subtest iterates through static data writing values to memory The test combines the three address line approaches with the two data sets to produce six unique sub tests e Sequential with Random Data e Sequential with Fixed Pattern Data e Full Range Converging with Random Data e Full Range Converging with Fixed Pattern Data e Maximum Invert Convergence with Random Data e Maximum Invert Convergence with Fixed Pattern Data 11 3 3 Memory test use cases The memory read write and scope loop tests are host based tests The host machine issues read and write action to the memory through t
380. me The name or number of the TLB register to which to assign the specified values Tip Valid TLBO register names range from L2mmu_rieo through L2MMU_TLB511 Tip Valid TLB 1 register names range from 12umu_camo through L2MMU_CAM63 valuel value2 value3 value4 value5 value6 The six 32 bit values that together make up the 192 bit value to assign to the specified TLB register Each value must be specified in hexadecimal for example OXFFFFABCD Example This command writes the values 0x7000000A 0x 1C080000 0x00000000 OxFEO00000 0x00000000 OxFE000001 to the LAMMU_CAM1 TLB register CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 393 Target initialization commands writereg192 L2MMU_CAM1 0x7000000A 0x1C080000 0x00000000 OxFE000000 0x00000000 OxFE000001 9 2 1 20 writespr Writes the specified value to the specified SPR register NOTE This command is similar to the writereg sprxxx command except that writespr lets you specify the SPR register to modify by number in hexadecimal octal or decimal Syntax writespr regNumber value Arguments regNumber The number of the SPR register to which to assign the supplied value This value may be specified in hexadecimal for example 0x272 octal for example 01176 or decimal for example 638 value The value to write to the specified SPR register This value may be speci
381. mebase frequency lt 0x47865d2 gt bus frequency lt 0x23c346005 clock frequency lt 0x5967f477 gt 1 Y c The same busfreq value is the clock frequency for the serial ports and must be updated in the DTS file also serial0 seriale4500 clock frequency lt 0x23c346005 NOTE If you are using hardware for kernel debugging see Editing the DTS File 7 7 6 4 2 Editing the DTS File If you have a DTS file specifically designed for your target board you should modify only the RAM disk end address and reserved memory area in case you are using a RAM disk A standard ats text file has a number of nodes which are given no value actually lt 0 gt or are missing nodes for example the chosen branch When the Linux kernel is started from u oo with bootm u Boot dynamically edits the atb file in RAM so as to fill in the missing values and add the chosen branch based on the v Boot environment variables The CodeWarrior IDE does not fill in the missing values and branches when it downloads the atb file to RAM You must manually create and compile a separate and complete ats file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 328 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software The following steps detail the changes that must be applied to the ats file so the kernel bo ots successfully when the CodeWarrior IDE load
382. meters tab of the OS Awareness tab 1 Select the Enable Initial RAM Disk Settings checkbox z Au The fields in that panel are enabled 2 In the File Path text box enter the location of the BSP file rootfs ext2 gz 3 In the Address text box enter the address where you want to add the RAM disk 4 In the Size text box enter 0 if you want the entire RAM disk to be downloaded Select the Open Firmware Device Tree Settings checkbox In the File Path text box enter the location of the device tree file 7 In the Address text box enter the location in memory where you want to place the device tree NN NOTE Ensure that the memory areas for kernel RAM disk and device tree do not overlap p Click Apply to save the settings you made to the launch configuration 3 Click Debug to start debugging the kernel NOTE If the kernel does not boot correctly check the values entered in the Boot Parameters tab Also ensure that you provided a valid device tree and RAM disk CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 332 Freescale Semiconductor Inc Ey Chapter 7 Debugging Embedded Linux Software 7 7 8 Debugging the kernel based on MMU initialization This section describes how to debug the Linux kernel based on whether the MMU is disabled being enabled or enabled Debugging the Linux kernel involves three stages with different views and functionality
383. mily and toolchain for the executable file Click Next The Debug Target Settings page appears Specify the debugger connection type board launch connection and connection type for the executable file Click Next The Configurations page appears Select a core index CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 360 Freescale Semiconductor Inc aa Chapter 7 Debugging Embedded Linux Software Click Finish The Import a Code Warrior Executable window closes Select Run gt Debug Configurations The Debug Configurations dialog box appears with the specified launch configuration settings Click Edit near the Connection list box to check or edit the settings you made during the creation of the launch configuration The Properties window appears for the selected launch configuration Select the type of connection using the Connection type drop down list The Connection tab page appears Ensure that CCS executable is selected in the CCS server panel Specify the path of the executable file of the CCS server Enter the IP address in the Hostname IP Address text box NOTE Use the default port 41475 and JTAG clock speed 16000 kHz Click Edit next to the System drop down list The System tab page appears Select P4080 HV _EntryPoint mem from CWInstall_ dir PA PA Support Initialization_ Files Memory in the Ini
384. mine has multiple modes you must select the appropriate mode 5 10 3 Registers View Context Menu The Registers view context menu provides you various options for working with registers To display the Registers view context menu right click a register in the Registers view The table below lists the options of the Registers view context menu Table 5 23 Registers View Context Menu Options ISA A A gt IA Select All Selects the entire contents of the current register Copy Registers Copies to the system clipboard the contents of the selected register Enable Allows the debugger to access the selected register Disable Prevents the debugger from accessing the selected register View Memory Displays the corresponding memory for the selected register Format Use to specify the displayed data format for the selected register e Natural Default data format e Decimal Decimal data format Hexadecimal Hexadecimal data format e Binary Binary data format e Fractional Fractional data formats Q0 Q31 Cast to Type Opens a dialog box that you can use to cast the selected register value to a different data type Restore Original Type Reverts the selected register value to its default data type Find Opens a dialog box that you can use to select a particular register Change Value Opens a dialog box that you can use to change the current register value Show Details As Allows you to specify how the de
385. ming advanced diagnostics of the JTAG connection to be used during custom board bring up After the connection to the probe has been established the debugger performs the JTAG diagnostics tests Power at probe IR scan check Bypass DR Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 147 Connection types Table 5 14 USB TAP Advanced Tab Options continued A Y scan check Arbitrary TAP state move IDCODE scan check and the result of the tests are printed to the console log and in case of an error a CodeWarrior Alert box appears When this option is not selected the CodeWarrior debugger only performs a limited test while configuring the JTAG chain It checks if the PWR pin is correctly connected and displays a Cable disconnected error if not connected properly The connection details are provided in the CCS protocol log along with the JTAG ID and in case of an error a CodeWarrior Alert box appears See JTAG diagnostics tests for more information on JTAG diagnostics tests Secure debug key Select to enable the debugger to unlock the secured board with the secure debug key provided in the associated text box If this option is not selected you will receive a secure debug violation error when you try to debug on the locked board NOTE If you provide a wrong key and an unlock sequence is
386. mmunications processors This section talks about the limitations and workarounds of the CodeWarrior debugger for the QorIQ communications processors The QorIQ processor family includes the following processors e eS00v2 P1010 1 1 12 13 14 15 16 17 P1020 2 1 22 23 24 25 and P2020 10 e e500mc P2041 0 P3041 and P4080 40 e e5500 P5010 P5020 P5021 and P5040 NOTE For e500v2 processors see PowerQUICC III processors All the information from PowerQUICC III processors related to e500v2 cores also applies to QorIQ processors based on e500v2 core MMU configuration through JTAG For e500mc and e5500 cores the debugger is able to read and write the L2 MMU TLBs registers without using dedicated processor instructions You can access these registers from the debugger s Registers view or using commands in a target initialization script For more information on the TLB register structure see the rzanme txt file that is included in the default CodeWarrior project for each supported target board Using memory configuration files for bareboard debugging For e500mc and e5500 cores it is critical to use the correct cacheable or cache inhibited attribute for physical memory accesses Failing to do so can lead to unreliable memory access stale data data corruption For more information see Viewing memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor In
387. mory cache attributes write through cache inhibit memory coherence required guarded endian 37 37 RESERVED 38 38 X0 Extra system attribute bits for definition by system software 39 39 x1 Extra system attribute bits for definition by system software 40 43 UO U3 User attribute bits used only by software These bits exist in the L2 MMU TLBs only TLB1 and TLBO 44 44 RESERVED 45 45 SR Supervisor read permission bit 46 46 SW Supervisor write permission bit 47 47 SX Supervisor execute permission bit 48 48 UR User read permission bit 49 49 UW User write permission bit 50 50 UX User execute permission bit 51 59 RESERVED 60 63 Extended RPN 64 83 RPN Real page number 84 95 RESERVED 96 115 EPN Effective page number 116 127 RESERVED The table below shows e500 TLB 1 registers starting from Lz2MMU_CAMO through L2MMU_CAMIS Table 5 26 e500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM15 0 3 TSIZE Encoded Page size 0000 Reserved 0001 4 Kbyte 0010 16 Kbyte 0011 64 Kbyte 0100 256 Kbyte 0101 1 Mbyte 0110 4 Mbyte 0111 16 Mbyte 1000 64 Mbyte 1001 256 Mbyte TS Translation address space compared with AS bit of the current access RESERVED Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 189 EA A X lt X lt lt lt AKAKAKAKKAA
388. mory reserved for the RAM disk The second parameter is the size of the RAM disk and must be modified each time the RAM disk is repackaged as you might add additional packages to the RAM disk For example memreserve 0x20000000 0x453ecc Modify the chosen node in the DTS file The linux initrd start argument must be the start address of the RAM disk and the linux initrd end value must be the end address of the RAM disk For example chosen linux initrd start lt 0x2000000 gt linux initrd end lt 0x2453ecc gt linux stdout path soc8572 ffe00000 serial 4500 Ensure that the frequencies of the target are correct If the DTS was generated in U Boot as described above the frequencies should be correct However if you update CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 327 rr Debugging the Linux Kernel an existing DTS file for a new board revision the frequencies might have changed and they need to be corrected in the DTS file a At the U Boot prompt inspect the current configuration bdinfo intfreq 1500 MHz busfreq 600 MHz b The intfreq value from the U Boot output must be converted to a hexadecimal value and added to the clock frequency value of the CPU node in the DTS file The busfreq value must be placed in the same way in the bus frequency parameter For example cpus PowerPC lt target gt 0 ti
389. mote download path itmp Figure 7 14 Debug Other Executable Dialog Box 4 Specify the environment variable that enables the shared object loader to locate the shared library on the remote target at run time At run time the shared object loader first searches for a shared library in the path specified by the 10_1israry_ para environment variable s value In this case the value of this environment variable will be tmp which is the remote download path for the shared library you specified in the Debug Other Executable dialog box If you have not specified the environment variable or have assigned an incorrect value the shared object loader searches for the shared library in the default location usr 1ib Qo Cde o In the Debug window click Environment to open the Environment page Click New to open the New Environment Variable dialog box In the Name field type 1o_LIBRARY_ PATH In the Value field type tmp NOTE Ensure that you type the same remote download path in the Value field that you specified in the Debug Other Executable dialog box Click OK The environment variable is added to the launch configuration Add another environment variable with name avorn system pars and value ves NOTE The AVOID_SYSTEM_PATH variable sets the launch configuration to use the library path settings you specify By specifying the value ves you avoid the launch configuration from picking up any other system path
390. mpt Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 142 Freescale Semiconductor Inc SSS SSE AX Chapter 5 Working with Debugger Table 5 8 Gigabit TAP Advanced Tab Options continued E ee eee 1 Reset Delay ms Specifies the time in milliseconds that CodeWarrior takes to gain control of the target after issuing a reset The default value for this option is 200 ms The delay needs to be increased if the debugger connection does not work reliably after issuing the reset This can happen for specific boards and in scenarios where the PBL is used to perform boot image manipulation for example copying U Boot from SPI flash to internal cache SRAM during reset that does not complete within the default reset timeout window A good start value to test out board specific requirements in such cases is 1000 ms however this value may need to be increased for very large PBL transfers NOTE Reset delay is supported for processors based on the e500mc e5500 and e6500 cores 5 3 5 Simics Select this connection type when Simics simulator is used To configure the settings of a Simics connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties f
391. n 1 Import the vmiinux e1 file from the ssp pirectory 1inux directory by using the PA ELF Import feature in CodeWarrior IDE 2 Create a new CodeWarrior download launch configuration The steps that follow describe how to configure the required settings 3 Select the Main page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 353 VE Debugging Hypervisor Guest Applications 4 Click New in the Remote system group to create a new remote system The New Connection wizard appears a In the Select Remote System Type window select CodeWarrior Bareboard Debugging and then TRK Connection b Click Next c In the TRK Connection click Edit next to the Target drop down list The Properties for lt target gt window appears d Click Edit next to the Target type drop down list The Target Types dialog box appears O Click Import and import the used hypervisor at file Click OK to close the Target Types dialog box g Configure the following settings in the Properties for lt target gt window e In the Initialization tab select the Execute system reset checkbox e Ensure that no init files exist for the debugged Linux partition cores e In the Memory tab do not add any memory configuration files for the debugged Linux partition cores h Click OK az The TRK Connection page reappears i Select Trk Muxer in the Connection
392. n Hypervisor for Linux Kernel Debugging e Preparing Connection to P4080DS Target e Debugging AMP SMP Guest Linux Kernels Running Under Hypervisor e Debugging Hypervisor During the Boot and Initialization Process 7 9 1 Hypervisor An Introduction The embedded hypervisor is a layer of software that enables the efficient and secure partitioning of a multi core system A system s CPUs memory and I O devices can be divided into groupings or partitions Each partition is capable of executing a guest operating system Key features of the hypervisor software architecture are summarized below e Partitioning Support for partitioning of CPUs memory and I O devices CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 345 AA A AAA AAA AKI Debugging Hypervisor Guest Applications e CPUs Each partition is assigned one or more CPU cores in the system e Memory Each partition has a private memory region that is only accessible to the partition that is assigned the memory In addition shared memory regions can be created and shared among multiple partitions e I O devices P4080 I O devices may be assigned directly to a partition Direct I O making the device a private resource of the partition and providing optimal performance e Protection and Isolation The hypervisor provides complete isolation of partitions so that one partition cannot access the
393. n address e A memory range e An access type on which to trigger To open the Add Watchpoint dialog box follow these steps 1 Open the Debug perspective 2 Click one of these tabs e Breakpoints e Memory e Variables The corresponding view appears 3 Right click the appropriate content inside the view as mentioned in the table below Table 5 20 Opening the Add Watchpoint dialog box Breakpoints An empty area inside the view Memory The cell or range of cells on which you want to set the watchpoint Variables A global variable NOTE The debugger does not support setting a watchpoint on a stack variable or a register variable 4 Select Add Watchpoint C C from the context menu that appears The Add Watchpoint dialog box appears shown in the figure below The debugger sets the watchpoint according to the settings that you specify in the Add Watchpoint dialog box The Breakpoints view shows information about the newly set watchpoint The Problems view shows error messages when the debugger fails to set the watchpoint CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 170 Freescale Semiconductor Inc a ey Chapter 5 Working with Debugger Add Watchpoint E Figure 5 10 Add Watchpoint Dialog Box The table below describes the options available in the Add Watchpoint dialog box Table 5 21 Add Watchpoint dialog box
394. n fault Controls whether a DSI occurs on data accesses to the page regardless of permission bit settings 54 59 LPIDR Translation logical partition ID 60 83 RPN Real page number 84 95 Reserved 96 115 EPN Effective page number 116 127 Reserved The table below shows e500mc TLB 1 registers starting from L2MMU_CAM6O through L2MMU_CAM63 Table 5 30 e500mc TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 0 3 TSIZE Defines the page size of the TLB entry 4 4 TS Translation space Compared with MSR IS instruction fetch or MSR DS memory reference to determine if this TLB entry may be used for translation 5 7 Reserved 8 15 TID Translation identity Defines the process ID for this TLB entry 16 25 MASK SIZE MASK Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 194 Freescale Semiconductor Inc EET Chapter 5 Working with Debugger Table 5 30 e500mc TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 continued 4 KB 0x0000000000 16 KB 0x0000000001 64 KB 0x0000000011 256 KB 0x0000000111 1 MB 0x0000001111 4 MB 0x0000011111 16 MB 0x0000111111 64 MB 0x0001111111 256 MB 0x0011111111 1GB 0x0111111111 4GB 0x1111111111 26 26 Reserved 27 27 W Write through 28 28 Caching inhibited 29 29 M Memory coherency required 30
395. n now debug from this location until hypervisor relocation 5 Debug E O 00 Variables o Breakpoints B Cache it Registers BA Modules O iz xR 9 FEASBY oD amp a 2 Q i S ow it df name Context Address Type v E Debug hv CodeWarrior Attach D i nomestest 0x00000000 Hardware Y EPPC hv core 0 Suspended Y a Thread ID 0x0 Suspended Breakpoint hit 0x00000000 0x00000000 0x00000000 homeltestfarm Hypervisor hv 0 6 output bin hv 6 2 10 2 34 PM fe 0x00000000 0x00000000 Ox00000000 E3 A Disassemb X N G Outline 7 O No source available for 0x00000000 0x00000000 9 0x00000000 li 0x00000004 tlbivax 0x00000008 isync View Disassembly Ox0000000c sync 0x00000010 nop 0x00000014 lis 0x00000018 ori 0x0000001c mtlr 0x00000020 b 0x00000024 lis lr E I Figure 7 41 Hypervisor Debug Entry Point 7 10 1 2 Debugging Hypervisor from Relocation Till Release of Secondary Cores CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 362 Freescale Semiconductor Inc 7y Chapter 7 Debugging Embedded Linux Software After the hypervisor relocation the MMU entry from TLB 1 is changed Therefore to continue debugging of the hypervisor the used memory configuration file should use the new translation NOTE For debugging hypervisor from relocation use the p4080_Hv mem file from CWPAv10 0
396. n the Target OS drop down list Note that it is mandatory to select Linux for the specific scenario described in this section The Boot Parameters Debug and Modules tabs appear In the Boot Parameters tab e Ensure that you disable all the options available on this tab In the Debug tab e Select the Enable Memory Translation checkbox and configure it according to the Linux MMU settings For example Physical Base Address 0x0 Virtual Base Address 0xc0000000 Memory Size 0x20000000 Select the Enable Threaded Debugging Support checkbox The Update Background Threads on Stop option is used to remove the dead threads which were debugged at some point during the debugging session but later were terminated or killed This option might cause a decrease in speed because a big amount of memory must be read at every stop Do not select the Enable Delayed Software Breakpoint Support checkbox c In the Debugger options group select the Debug tab d Select the Stop on startup at checkbox in the Program execution options group e Select the Program entry point option if you want the debugging session to start from 0x0 e Specify the function name in the User specified field if you want the debugging session to start from a specific kernel function e In the Debugger options group select the Download tab NOTE Ensure that the Perform standard download checkbox is not selected Hypervisor transfers the required kernel images for partition b
397. n the board The Target OS options are applicable only for bareboard application projects 15 Click Next The Debug Target Settings page appears 16 Select a supported connection type from the Debugger Connection Types group Your selection determines the launch configurations that you can include in your project 17 Select the hardware or simulator you plan to use from the Board drop down list NOTE Hardware or Simulators that supports the target processor selected on the Processors page are only available for selection 18 Select the launch configurations that you want to include in your project and the corresponding connection CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 220 Freescale Semiconductor Inc 19 20 21 22 23 Chapter 5 Working with Debugger Select the interface to communicate with the hardware from the Connection Type drop down list Enter the IP address of the TAP device in the TAP address text box This option is disabled and cannot be edited if you select USB TAP from the Connection Type drop down list Click Next The Configurations page appears Select the processor core that executes the project from the Core index list Click Finish The Import a CodeWarrior Executable file wizard ends The project for the imported e1 file appears in the CodeWarrior Projects view You can now open the Debug Configurations dial
398. n the target The field accept only hexadecimal values If the width of the pattern exceeds the access size an error message Number of Elements Enter the total number of elements to be modified Verify Memory Writes Select the checkbox to verify success of each data write to the memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 433 el Import Export Fill memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 434 Freescale Semiconductor Inc Chapter 12 Making a Custom MSL C Library This chapter describes porting a main standard libraries MSL C library to the GNU compiler collection GCC tool to support bareboard applications that execute on the Power Architecture based boards NOTE If you target P10 0 or P20 0 bareboard application using CodeWarrior toolchain you use Embedded Warrior Library EWL instead of MSL The CodeWarrior stationery wizard is already setup to automatically configure the correct library and toolchain depending on the target processor selected For more information on EWL see EWL C Reference Occasionally you must create bareboard applications that while invoking the services of the MSL C Library must execute on new Power Architecture based boards You can manage this by using the GCC tool to customize the MSL C l
399. n time address in which to store the executable image in RAM so that it may be transferred to flash memory NOTE Select Generate ROM Image to enable this option This option specifies information for a legacy flashing tool some development boards that used the Power Architecture 821 processor This tool required that the executable image must first be loaded to an area in RAM before being transferred to ROM NOTE Do not use this option if your flash memory tool does not follow this behavior This setting is equivalent to specifying the rombuffer address command line option CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Chapter 3 Build Properties 3 3 1 5 PowerPC Compiler Use the PowerPC Compiler panel to specify the compiler options that are specific to Power Architecture software development The table below lists and describes the various options available on the PowerPC Compiler panel Table 3 12 CodeWarrior Build Tool Settings PowerPC Compiler Options Command Specifies the location of the PowerPC ELF compiler executable file that will be used to build the project All Options The actual command line the compiler will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 1 5 1 Preprocessor Use the Preprocessor panel to specify th
400. nate the debug session If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target does not respond in the provided time interval you receive a CCS timeout error Enable logging Select to display protocol logging in console JTAG config file This panel displays the JTAG configuration file being used This panel is populated only if you have selected a JTAG configuration file for your project If a JTAG configuration file is not selected this panel displays a None value For more details on JTAG configuration files see the JTAG Configuration Files chapter Advanced TAP settings Force shell download Select to force a reload of the TAP shell software Disable fast download Select to disable fast download NOTE This option is not available for e500mc e5500 and e6500 core based targets Enable JTAG diagnostics When selected the option enables performing advanced diagnostics of the JTAG connection to be used during custom board bring up After the connection to the probe has been established the debugger performs the JTAG diagnostics tests Power at probe IR scan check Bypass
401. nc mi Chapter 5 Working with Debugger Add Source Add a container to the source lookup path 4 path mapping a or Absolute File Path gt File System Directory l Project E Workspace gt Workspace Folder FO Figure 5 26 Add Source Dialog Box Click OK The Add Source dialog box closes The Path Mappings dialog box appears In the Name text box enter the name of the new path mapping Click Add The cursor blinks in the Compilation path column In the Compilation path column enter the path to the parent project of the executable file relative to the computer that generated the file Suppose the computer on which you debug the executable file is not the same computer that generated that executable file On the computer that generated the executable file the path to the parent project is D 1workspaceloriginalproject Enter this path in the Compilation path text box Tip You can use the IDE to discover the path to the parent project of the executable file relative to the computer that generated the file In the C C Projects view of the C C perspective expand the project that contains the executable file that you want to debug Next expand the group that has the name of the executable file itself A list of paths appears relative to the computer that generated the file Search this list for the names of source files used to build the executable file The path to the pare
402. nch configuration that you just created The Debug Configurations dialog box appears t Expand the CodeWarrior group and select the launch configuration u In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears v Select the appropriate lt Connection type gt from the drop down list The Connection tab page appears w Ensure that CCS executable is selected in the CCS server panel x Specify the path of the executable file of the CCS server y Enter the IP address in the Hostname IP address text box NOTE Use the default port 41475 and JTAG clock speed 16000 kHz z In the Advanced tab none of the checkbox should be selected CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 357 GEA el Debugging the P4080 Embedded Hypervisor aa Click Edit next to the Target drop down list The Properties for lt system launch configuration gt window appears ab In the Initialization tab clear any reset options if checked ac Clear the Initialize target options for any of the cores so that no initialization file is selected ad In the Memory tab nothing should be selected because we currently do not have a memory configuration file The file will be created later with hypervisor MMU entries The Properties window appears for the Attach launch configu
403. nd or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including typicals must be validated for each customer application by customer s technical experts Freescale does not convey any license under its patent rights nor the rights of others Freescale sells products pursuant to standard terms and conditions of sale which can be found at the following address freescale com SalesTermsandConditions Freescale the Freescale logo CodeWarrior QorlQ QorlQ Qonverge and StarCore are trademarks of Freescale Semiconductor Inc Reg U S Pat amp Tm Off All other product or service names are the property of their respective owners The Power Architecture and Power org word marks and the Power and Power org logos and related marks are trademarks and service marks licensed by Power org 2008 2015 Freescale Semiconductor Inc Document Number CWPADBGUG Revision 10 5 0 06 2015 e Po Oo freescale
404. ne bottomup command line option 3 3 1 5 5 Processor Use the Processor panel to control the processor dependent code generation settings The table below lists and describes the various options available on the Processor panel Table 3 18 CodeWarrior Build Tool Settings Processor Options Struct Alignment Specifies structure and array alignment The default options are e PowerPC Use conventional Power Architecture alignment This choice is the default e 68K Use conventional Mac OS 68K alignment e 68K 4 Byte Use Mac OS 68K 4 byte alignment This setting is equivalent to specifying the align keyword command line option Function Alignment Specifies alignment of functions in executable code The default alignment is 4 However at an optimization level 4 the alignment changes to 16 If you are using func_align 4 or none and if you are compiling for VLE then the linker will compress gaps between VLE functions Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 75 Build Properties for Power Architecture Table 3 18 CodeWarrior Build Tool Settings Processor Options continued Explanation e f those functions are not called by a Classic PPC function e The function has an alignment greater than 4 NOTE Compression of the gaps will only happen on files compiled
405. nitialization file for all launch configuration types Attach Connect and Download The target initialization file is executed after the connection to the target is established but before the download operation takes place CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 379 Using target initialization files The debugger executes the commands in the target initialization file using the target connection protocol such as a JTAG run control device NOTE You do not need to use an initialization file if you debug using the CodeWarrior TRK debug protocol To instruct the CodeWarrior debugger to use a target initialization file BR WN GN 9 Start the CodeWarrior IDE Open a bareboard project Select one of this project s build targets Select Run gt Debug Configurations The Debug Configurations dialog box appears Select the appropriate launch configuration from the left panel In the Main tab from the Connection panel click Edit next to the Connection drop down list The Properties for lt Launch Configuration Name gt window appears Click Edit next to the Target drop down list The Properties for lt remote system gt window appears In the Initialization tab select the appropriate cores checkboxes from the Initialize target column as shown in the figure below Initialization Memory Advanced
406. nker settings a Select the snareanib_1m build configuration in the CodeWarrior Projects view b Select Project gt Properties The Properties window for the shared library project appears c In the Tool settings page from the Power ELF Linker container select Libraries d In the Libraries I panel click Add H The Enter Value dialog box appears e Enter the library file name example in the Libraries field CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 265 Debugging a shared library f In the Libraries L panel click Add 5 The Add directory path dialog box appears g Enter the library path in the Directory field The library path is the path of the Output directory that is used by tibzxampie build configuration NOTE These settings enable the CodeWarrior IDE linker to locate the shared library 1ibexamp1e so For detailed information on other linker command line arguments see GNU linker manuals You can find GNU documentation here http www gnu org 7 4 4 Build the shared library The next action is to build the shared library To build the shared library perform the following steps 1 Select the sharednibraryzxample project in the CodeWarrior Projects view 2 Select the nibexamp1e build configuration by selecting Project gt Build Configurations gt Set Active gt lt Build Configuration Name gt 3 Sel
407. nment E Common Trace session control settings For multicore systems when a trace session is started From the toolbar please note that the debug context selected in the Debug View is used to determine which trace session control settings are used On debug launch O Start a trace session Default trace configuration Select the default trace configuration used by the Start Trace Session toolbar button and the On debug launch setting above NPC Buffer Demo core0 y Show all configurations O Only show configurations for the associated project Trace collection CodeWarrior configures the target and enables trace collection If the target is running and must be suspended to configure trace hardware Suspend and resume the target automatically v After configuring trace hardware start trace collection Automatically s Stop trace collection when the core is suspended Note The trace collection can also be stopped from the toolbar by an Analysis Point or when the trace buffer is Full and circular collection is not selected When trace collection stops upload trace results Automatically v The application configures the target and enables trace collection Trace display Display new trace data automatically Open trace at offset 0 approximate J Figure 4 12 Debug Configurations Trace and Profile Tab The table below lists the various options available on the
408. nslations using the appropriate memory space for example CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 204 Freescale Semiconductor Inc Chapter 5 Working with Debugger translate v lt v_addr gt p lt p_addr gt for cacheable ranges translate v lt v_addr gt i lt p_addr gt for cache inhibited ranges e CodeWarrior can also automatically read the translations from the target while debugging bareboard applications for most processors based on e500v2 e500mc e5500 and e6500 cores relieving the user from specifying the translations in the memory configuration file For more information see Memory translations 5 12 Viewing Cache This section provides detailed information on working with caches The CodeWarrior debugger allows you to view and modify the instruction cache and data cache of the target system during a debug session In this section e Cache View e Cache View Toolbar Menu e Components of Cache View e Using Debugger Shell to View Caches e Debugger Shell Global Cache Commands e Debugger Shell Cache Line Commands e Processor Specific Cache Features 5 12 1 Cache View This section describes how to use Cache view Use the Cache view to examine L1 cache such as instruction cache or data cache Also you can use the viewer to display L2 and L3 cache for targets that support it To open the Cache view use the following steps 1 Start a
409. nstallation Use this page to specify the toolchain for the new project NOTE The current release does not include toolchains for Linux applications by default To add the required build tools support you should install the corresponding service pack for the required target For more information on installing service packs see the Service Pack Updater Quickstart available in the lt CWInstallDir gt PA folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 42 Freescale Semiconductor Inc Chapter 2 Working with Projects Y CodeWarrior Linux Project Wizard Build Settings Choose the build settings For this project Note If the toolchain you want to use is disabled please install the corresponding ServicePack For adding the build tools support Toolchain Linux GCC LINUX e500me Language Oc Oct Build Tools Architecture 532 bit Figure 2 9 Build Settings Page The table below describes the various options available on the Build Settings page Table 2 9 Build Settings Page Setting Opon scription O O _ Toolchain Specifies the toolchains supported by the current installation Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform Language Specifies the programming language used by the new project The current installation supports
410. nstead of relative paths This setting is equivalent to specifying the sym full path command line option 3 3 1 3 Messages Use the Messages panel to specify the error and warning message options for the project The table below lists and describes the various options available on the Messages panel Table 3 5 CodeWarrior Build Tool Settings Messages Options Controls the style used to show error and warning messages This setting is equivalent to specifying the msgstyle keyword command line option Message Style Maximum Number of Errors Specifies the maximum number of errors messages to show This setting is equivalent to specifying the maxerrors number command line option Maximum Number of Warnings Specifies the maximum number of warning messages to show This setting is equivalent to specifying the maxwarnings number command line option 3 3 1 4 PowerPC Linker Use the PowerPC Linker panel to specify the CodeWarrior linker options that are specific to Power Architecture software development NOTE The list of tools presented on the Tool Settings page can differ based upon the toolchain used by the project CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 65 Build Properties for Power Architecture The table below lists and describes the various options available on the PowerPC Linker panel Table 3 6
411. nt project of one of these source files is the path you should enter in the Compilation path column CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 225 JE Debugging Externally Built Executable Files 8 In the Local file system path text box enter the path to the parent project of the executable file relative to your computer Click the ellipsis button to specify the parent project Suppose the computer on which you debug the executable file is not the same computer that generated that executable file On your current computer the path to the parent project of the executable file is c projects thisproject Enter this path in the Local file system path text box 9 Click OK The Path Mapping dialog box closes The mapping information now appears under the path mapping shown in the Source Lookup Path list of the Source page 10 If needed change the order in which the IDE searches the paths The IDE searches the paths in the order shown in the Source Lookup Path list stopping at the first match To change this order select a path then click Up or Down to change its position in the list 11 Click Apply The IDE saves your changes 5 17 4 Debug Executable File You can use the CodeWarrior debugger to debug the externally built executable file To debug the executable file 1 Select the project in the CodeWarrior Projects view
412. nter a command 1 On the Debugger shell type a command followed by a space 2 Type any valid command line options separating each with a space 3 Press Enter key You can use shortcuts instead of complete command names such as k for kill View debug command hints Type alias followed by a space The syntax for the rest of the command appears Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 161 Working with Breakpoints Table 5 19 Common Command Line Debugging Tasks continued Y rn JO mens Review previous commands Press Up Arrow and Down Arrow keys Clear command from the command line Press the Esc key Stop an executing script Press the Esc key Toggle between insert overwrite mode Press the Insert key Scroll up down a page Press Page Up or Page Down key Scroll left right one column Press Ctrl Left Arrow or Ctrl Right Arrow keys Scroll to beginning or end of buffer Press Ctrl Home or Ctrl End keys 5 8 Working with Breakpoints A breakpoint is set on an executable line of a program if the breakpoint is enabled when you debug the execution suspends before that line of code executes The different breakpoint types that you can set are listed below e Software breakpoints The debugge
413. nux 8 12 08 10 40 4M Suspended lg Thread ID OxcO3dd618 Suspended Breakpoint hit 1 AsmSection D Kernel 8572 Multicore linux 2 6 23 arch powerpc kernelihead_Fsl_booke 5 66 Ox pe D Kernel 8572 Multicore linux 2 6 23 vmlinux 8 12 08 10 40 AM SSS LE ee r7 End of kernel command line string section text head ax _ENTRY _stext _ENTRY _ start e Reserve a word at a fixed location to store the address of abatron _pteptrs af nop i Save parameters we are passed y 2a me r31 r3 mr r30 r4 mr r29 r5 mre r28 r6 mre r27 r7 li r24 0 CPU number We try to not make any assumptions about how the boot loader setup or used the TLBs We invalidate all mappings from the boot loader and load a single entry in TLB1 0 to map the first 16M of kernel memory lt Any boot info passed from the A A o E e m AA A oe 12m A E aaa Figure 7 35 Kernel Debug Before MMU is Enabled NOTE You must stop the debug session and clear the Alternate Load Address checkbox in the PIC tab to debug after the rti instruction in head _fs1_booke s 7 7 8 2 Debugging the Kernel while the MMU is being Enabled CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 334 Freescale Semiconductor Inc EES y Chapter 7 Debugging Embedded Linux Software This procedure shows how to debug the kernel while the memory management unit is being initialized
414. nvironment variable that enables the shared object loader to locate the shared library on the remote target at run time Following are complete steps of configuring a launch configuration 1 Activate the shareanip_1m launch configuration in the project 2 Specify the remote download path of the final executable file a Select Run gt Debug Configurations to open the Debug Configurations dialog box b In the left pane from the Code Warrior group select the shareanib_1m launch configuration c On the Debugger page click the Remote tab d Type tmp in the Remote Download Path field as shown in the figure below This specifies that the final executable file will be downloaded to this location on the target platform for debugging NOTE In the current example the remote download path is specified as tmp You can replace tmp with any other directory for which CodeWarrior TRK has the necessary access permissions CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 267 Debugging a shared library Main 60 Arguments Debugger gt Trace and Profile Source Environment E Common g gg Y Debugger options Debug Remote Other Executables Symbolics Remote download path tmp Figure 7 13 Remote Download Path Shared Library Project 3 Specify the host side location of the executable file to be used for debugging the s
415. o RAM space setpicloadaddr Oxxxxx0000 NOTE Oxxxxx0000 is the address printed by U Boot at line Now running in ram You can also see this address in the Disassembly view and observe the current address space you are in 2 From the Debug view toolbar select the Instruction Stepping Mode 1 command 3 From the Debug view toolbar select the Step Into command to step into b1r CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 308 Freescale Semiconductor Inc DAA Chapter 7 Debugging Embedded Linux Software m r3 xr9 Init Data pointer mr r4 ri0 Destination Address board init r Copy exception vector code to low memory 13 dest_addr r7 source address r8 end address r9 target address k Figure 7 31 U Boot Debug Running in RAM 4 Deselect the Instruction Stepping Mode command when the instruction pointer is at in_ram You can now do source level debugging and set breakpoints in all the RAM area including board_init_r See Points to remember for more details NOTE You can enter the board init r nand boot and uboot functions Beginning with the uboot function the second image is relocated to RAM at 0x11000000 and you begin to execute the entire code again from RAM address space See Points to remember to avoid any debugging issues NOTE Before closing the debug session change back the alternate load address to flash
416. o build your project with the new toolchain To set the new toolchain as the default toolchain and to build the project use these steps 1 Select Project gt Properties from the Code Warrior IDE menu bar The Properties dialog box appears 2 In the left pane select C C Build gt Settings 3 In the right pane select the Build Tool Versions tab 4 Select the required toolchain version and click Set As Default as shown in the figure below Properties for Test_project core00 kolbos type filter text Settings Test_project core00 gt an Resource Builders C C Build Configuration RAM Active gt Manage Configurations Build Variables Discovery Options PS Tool Settings amp Build Steps QL Build Artifact lor Binary Parsers Error Parsers Build Tool Versions a Available versions for current build tools Default version is in bold letters Add 5 Tool Chain Editor Version Path z C C General r ERTER A Edit Dd cas 48 2 S CROSS_TOOLS_HOME gcc 4 8 2 Ee500mc eabi bin 9 9 4 7 2 S CROSS_TOOLS_HOME gcc 4 7 2 Ee500mc eabi bin Delete 4 9 2 CROSS_TOOLS_HOME gcc 4 9 2 Ee500mc eabi bin Set As Default o mea Figure 3 2 Setting a toolchain as default toolchain 5 Click OK 6 Select Project gt Build Project from the Code Warrior IDE menu bar The project is built using the new toolchain CodeWarrior Development Studio for Power Architecture Proc
417. o reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Terminate the debug session If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 145 Connection types Table 5 12 TCF Advanced Tab Options continued co o APA VES gt lt ee Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated 5 3 7 USB TAP Select this connection type when USB TAP is used as interface to communicate with the hardware device To configure the settings of a USB TAP connection type perform the following steps 1 Select Run gt Debug Configurations The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Select USB TAP from the Connection type drop down list The Connection and Advanced tabs display the options with respect to the settings of the selected connection type 4 n
418. od seconds 2 0 Figure 4 4 Debugger Options Debug Page NOTE The options displayed on the Debug tab varies depending on the selected launch configuration CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 108 Freescale Semiconductor Inc as Chapter 4 Debug Configurations The table below lists the various options available on the Debug page Table 4 5 Debugger Options Debug II eecription OOO Initialize program counter at Controls the initialization of program counter e Program entry point Select to initialize the program counter at a specified program entry pont e User specified Select to initialize the program counter at a user specified function The default location is main NOTE Disabling this option will also disable the Resume program and Stop on startup at options Resume program Select to resume the execution after the program counter is initialized NOTE Disabling this option will also disable the Stop on startup at option Stop on startup at Stops program at specified location When cleared the program runs until you interrupt it manually or until it hits a breakpoint e Program entry point Select to stop the debugger at a specified program entry point e User specified Select to stop the debugger at a user specified function The default location is main Stop on exit Check this option to have the debugger
419. oduct e Simulator Select to execute the program on a software simulator e Emulator Select to execute the program on a hardware emulator Board Specifies the hardware board supported by the selected processor Launch Specifies the launch configurations and corresponding connection configurations supported by the selected processor Connection Type Specifies the interface to communicate with the hardware e USB TAP Select to use the USB interface to communicate with the hardware device Ethernet TAP Select to use the Ethernet interface to communicate with the target hardware e CodeWarrior TAP over USB Select to use the CodeWarrior TAP interface over USB to communicate with the hardware device e CodeWarrior TAP over Ethernet Select to use the CodeWarrior TAP interface over Ethernet to communicate with the hardware device For more details on CodeWarrior TAP see the CodeWarrior TAP User Guide available in the lt CWInstal1Dir gt Help PDF folder e Gigabit TAP Corresponds to a Gigabit TAP that includes an Aurora daughter card which allows you to collect Nexus trace in a real time non intrusive fashion from the high speed serial trace port the Aurora interface Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 217 Debugging Externally Built Executable Files Table 5 4
420. of code To change the program counter value follow these steps 1 Start a debugging session 2 In the Editor view place the cursor on the line that you want the debugger to execute next 3 Right click in the Editor view A context menu appears 4 From the context menu select Move To Line The Code Warrior IDE modifies the program counter according to the specified location The Editor view shows the new location 5 14 Hard resetting Use the reset hard command in the Debugger Shell view to send a hard reset signal to the target processor CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 213 Setting Stack Depth NOTE The Hard Reset command is enabled only if the debug hardware you are using supports it Tip You can also perform a hard reset by clicking Reset 2 on the Debug perspective toolbar 5 15 Setting Stack Depth This section describes how to control the depth of the call stack displayed by the debugger Select Window gt Preferences gt C C gt Debug gt Maximum stack crawl depth option to set the depth of the stack to read and display Showing all levels of calls when you are examining function calls several levels deep can sometimes make stepping through code more time consuming Therefore you can use this menu option to reduce the depth of calls that the debugger displays 5 16 Import a CodeWarrior
421. of the project The specified name identifies the project created for debugging but not building the executable file Use default location If you select this option the project files required to build the program are stored in the current workspace directory of the workbench If you clear this option the project files are stored in the directory that you specify in the Location option Location Specifies the directory that contains the project files Use the Browse button to navigate to the desired directory This option is only available when the Use default location option is cleared 5 16 2 Import C C Assembler Executable Files Page Use the Import C C Assembler Executable Files page to select an executable file or a folder to search for C C assembler executable files The table below explains the options available on the page Table 5 43 Import C C Assembler Executable Files page settings II CI File to import Specifies the C C assembler executable file Click Browse to choose an executable file Copy the selected file to current project folder Select this option to copy the executable file in the project folder CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 215 Import a CodeWarrior Executable file Wizard 5 16 3 Processor Page Use the Processor page to specify the processor family for th
422. of the workbench 3 Select the p4080 u Boot stage 1 remote system from the view 4 Right click and from the context menu select Copy The Copy Resource dialog box appears 5 Select the active profile from the list Click OK The Duplicate Name Collision message box appears 6 Select the Rename option The Rename to text box is enabled 7 Enter the name for the copied remote system For example p4osops u boot mem translation The new remote system appears in the Remote Systems view NOTE This remote system will be used in the second stage of U Boot debug 8 Right click P4080DS u boot mem translation and select Properties from the context menu The Properties for P4080DS u boot mem translation window appears 9 On the System tab select the checkbox for the respective core in the Memory configuration column CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 279 ee Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Click the ellipsis button in the Memory configuration file column The Memory Configuration File dialog box appears Click File System and select the memory configuration file from this path lt CWInstallDir gt PA PA Support Initialization_ Files Memory BoardName _uboot_ bits _ FlashDevice st
423. og box by selecting Run gt Debug Configurations The Debug Configurations dialog box shows the current settings for the launch configuration that you just created A remote system is created with details of all the connection initialization and target parameters you had set while importing the e1 file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 221 A A E Debugging Externally Built Executable Files Name Test_import_Debug_P4080_Download Ej Main gt 69 Arguments Debugger 3 Trace and Profile tj Source IM Environment E Common Debug session type Choose a predefined debug session type or custom type for maximum flexibility 9 Download Connect Attach Custom v C C application Project Test_import Application Debug Test_import core00 elf Search Project Browse Variables v Build if required before launching Build if required before launching Build configuration Use Active nA E Select configuration using C C Application Enable auto build Disable auto build Use workspace settings Configure Workspace Settings v Target settings Connection amp Test_import_Debug_P4080_Download Edit New Execute reset sequence Execute initialization script s The connection is for a multicore target Please select a core or multiple cores in the case of SMP
424. oints after the PIC value has been changed Use the breakpoints relocation feature to deal with these changes e Do not set breakpoints in Stage 4 relocation to RAM until you move execution there e Do not set breakpoints from Stage 1 to Stage 2 The Instruction Address Space IS and Data Address Space DS bits from MSR are cleared in Stage 1 So the processor will use only the TLB entries with Translation Space TS 0 instead of Stage 2 where TS 1 7 6 4 2 Debugging U Boot using NOR flash This section explains how to debug U Boot using the NOR flash device in different U Boot debug stages During a typical U Boot start up sequence the target processor starts executing U Boot in flash memory U Boot then enables the Memory Management Unit MMU and relocates itself to RAM From the memory layout perspective U Boot debug has four different stages The following sections describe four U Boot debug stages for debugging U Boot using the NOR flash device e Debugging U Boot before switching address space e Debugging U Boot in translated address space e Debugging U Boot after switching back to initial address space e Debugging U Boot in RAM 7 6 4 2 1 Debugging U Boot before switching address space This section tells how to debug U Boot in a NOR flash device before switching address space To debug U Boot in flash before switching address space 1 Start the CodeWarrior IDE 2 Open the CodeWarrior U Boot project that you c
425. ole view to receive the output You must select this option if you input want to use the host CodeWarrior to view the output of the debugged application File Specify the file name to save output For Linux applications this option provides a way to select a host side file to redirect the output forwarded by CodeWarrior TRK to host CodeWarrior if redirections are specified in the Arguments tab then this feature makes no sense because redirections are using target side files Workspace Specifies the path of or browse to a workspace to store the output file File System Specifies the path of or browse to a file system directory to store the output file Variables Select variables by name to include in the output file Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 126 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 16 Common Tab Options continued PM e Append Select to append output Clear to recreate file each time Selecting this option means that the file host side file in case of Linux applications mentioned in the File text box will not be overwritten for new content Instead the new content will be appended to the file Port Select to redirect standard output stdout stderr of a process being debugged to a user specified
426. ommunication Framework Application RAM board_project core00 elf Search Project Browse Variables gt Build if required before launching v Target settings Connection 4 board_project core00_RAM_B4860_Download Edit New Execute reset sequence Execute initialization script s The connection is for a multicore target Please select a core or multiple cores in the case of SMP Target 7 B4860 x Y 6500 0 Filter matched 9 of 9 items 6500 1 Filter by Project e6500 2 e6500 3 gt board_project core00 6500 4 13 board_project core01 ml 12 board_project core02 2 board_project core03 _ B Apply a O Clos Figure 6 1 Debug Configurations Dialog Box 6 On the Main tab select a connection from the Connection drop down list 7 Select a core from the Target list 8 Click Edit next to the Connection drop down list CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 228 Freescale Semiconductor Inc Chapter 6 Multi Core Debugging The Properties for lt connection gt dialog box appears Hardware or Simulator Connection R SS Properties for board_project core00_RAM_B4860_Download Hardware or Simulator Connection Parent profile B34823 02 Name board_project core00_RAM_B4860_Download Description Template None Apply Defaults Target board_project core00_RAM_B4860_D
427. oot to memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 355 ES ae PE Debugging the P4080 Embedded Hypervisor f Configure other option in the Debugger options group according to your specific requirements You have successfully created the Download Launch configuration Click Debug and observe the Linux partition restarting hypervisor loading the kernel images and the debug session stopping at the Stop on startup at point function if specified 7 10 Debugging the P4080 Embedded Hypervisor You can debug the P4080 embedded hypervisor during the boot and initialization process by using a JTAG probe and by creating an attach launch configuration To debug the hypervisor perform the following steps 1 Download the appropriate P4080 SW Bundle image the BSP in iso format to a Linux computer 2 Mount the iso image file using this command mount o loop BSP Image Name iso mnt iso 3 Install the BSP image file according to the instructions given in the BSP documentation P4080_BSP_User_Manual NOTE Ensure that you are able to boot the hypervisor on the P4080 board 4 Import the hv e1s file and create an Attach launch configuration Start the Code Warrior IDE From the Code Warrior menu bar select File gt Import The Import wizard appears Expand the CodeWarrior group Select Code Warrior Executable Importer to
428. opment Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 22 Freescale Semiconductor Inc Chapter 1 Introduction 1 5 2 C C compiler The CodeWarrior Eclipse IDE for Power Architecture processors supports two types of C C compilers e CodeWarrior C C compiler e GCC C C compiler Each supported compiler is ANSI compliant It compiles C and C statements and assembles inline assembly language statements You can generate Power Architecture applications and libraries that conform to the PowerPC EABI by using the CodeWarrior GCC compiler in conjunction with the CodeWarrior GCC linker for Power Architecture processors The IDE manages the execution of the compiler The IDE invokes the compiler if you e Change a source file and issue the make command e Select a source file in your project and issue the compile preprocess or precompile command For more information about the CodeWarrior Power Architecture C C compiler and its inline assembler see the Power Architecture Build Tools Reference Manual from the lt CWInstallDir gt PA Help PDF folder For more information about the GCC Power Architecture C C compiler see the gcc pat manual from the lt CWInstallDir gt Cross_Tools gcc lt version gt lt target gt powerpc lt feabi eabispe aeabi linux libc gt share docs pdf gcc folder 1 5 3 Assembler The CodeWarrior Eclipse IDE for Power Architecture processors supports two
429. option for C C development Using this option will result in building the entire project whenever you save a change to the makefile or source files This can take a significant amount of time for very large projects 2 5 Importing Classic CodeWarrior Projects The CodeWarrior Project Importer feature in Eclipse IDE helps automate the conversion of a legacy C C CodeWarrior IDE project to a project supported by the latest versions of the CodeWarrior IDE This feature lets you e Select the classic CodeWarrior project e Set targets to import e Configure source trees and shielded folders e Edit access paths for each target e List files that are not found in the previous settings e Specify the new project name and location e List warnings or errors in the conversion process e Open the newly created Eclipse project NOTE For more information on importing classic CodeWarrior projects to the latest versions of the CodeWarrior IDE see the CodeWarrior Common Features Guide from the lt CWInstallDir gt PA Help PDF folder 2 6 Deleting Projects Using the options available in CodeWarrior IDE you can delete a project and optionally the resources linked to the project To delete a project follow these steps 1 Select the project you want to delete in the CodeWarrior Projects view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 56 Freescale Semiconductor Inc Cha
430. options AS A AA Expression to watch Enter an expression that evaluates to an address on the target device When the specified expression evaluates to an invalid address the debugger halts execution and displays an error message You can enter these types of expressions e An r value such as amp variable e Aregister based expression Use the character to denote register names For example enter sP 12 to have the debugger set a watchpoint on the stack pointer address minus 12 bytes The Add Watchpoint dialog box does not support entering expressions that evaluate to registers Memory space Select this option to specify an address including memory space at which to set the watchpoint Use the text box to specify the address or address range on which to set the watchpoint If a debugging session is not active the text list box is empty but you can still type an address or address range Units Enter the number of addressable units that the watchpoint monitors Write Select this option to enable the watchpoint to monitor write activity on the specified memory space and address range Clear this option if you do not want the watchpoint to monitor write activity Read Select this option to enable the watchpoint to monitor read activity on the specified memory space and address range Clear this option if you do not want the watchpoint to monitor read activity 5 9 2 Removing Watchpoints To remove a watchpoint
431. or lt connection launch configuration gt window appears 3 Select Simics from the Connection type drop down list The Connection and Advanced tabs display the options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 9 Simics Connection Tab Options Specifies the Simics startup script Table continues on the next page Simics settings Model startup script CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 143 Connection types Table 5 9 Simics Connection Tab Options continued Simics executable Specifies the Simics executable file CodeWarrior add on Specifies the Simics add on for CodeWarrior IDE Show Simics Control window Select to allow control of the Simics environment CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Click to specify the path of or browse to the executable file of the CCS server Manual launch Select to manually launch the specified CCS server on the specified port Server hostname IP Specifies hostname or the IP address of the CCS server Server port number Specifies t
432. or Families continued P2041 GCC tools QorlQ_P3 P3041 GCC tools QorlQ_P4 P4040 GCC tools P4080 GCC tools QorlQ_P5 P5010 GCC tools P5020 GCC tools P5021 GCC tools P5040 GCC tools QorlQ_T1 T1013 GCC tools T1014 GCC tools T1020 GCC tools T1022 GCC tools T1023 GCC tools T1024 GCC tools T1040 GCC tools T1042 GCC tools QorlQ_T2 T2080 GCC tools T2081 GCC tools QorlQ_T4 T4160 GCC tools T4240 GCC tools The following sections will help you with more details on the build tools supported by the current installation e CodeWarrior Build Tool Settings e GCC Build Tool Settings 3 3 1 CodeWarrior Build Tool Settings CodeWarrior build tools are build tools developed by Freescale The table below lists the CodeWarrior build tool settings specific to developing software for Power Architecture CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 62 Freescale Semiconductor Inc EO Chapter 3 Build Properties NOTE For more details on CodeWarrior build tools see the Power Architecture Build Tools Reference Manual available in the lt CWInstallDir gt PA Help PDF folder Table 3 2 CodeWarrior Build Tool Settings for Power Architecture Build Tool Build Properties Panels PowerPC CPU Debugging Messages PowerPC Linker Input Link Order General Output PowerPC Compiler
433. or core O and click the Resume i gt button Core 0 enters an infinite loop and core 1 continues to execute in its loop ns Select main thread from core 1 and click the Suspend button The debugger halts core at the current statement and the status of the program changes to Haitea Core O continues to execute 19 Select Run gt Multicore Terminate The debugger terminates the active debug session The threads associated with each core in the Debug view disappear 6 2 Multi Core Debugging Commands This section describes the multi core commands available in the Run menu of CodeWarrior IDE and in the Debugger Shell If you are debugging a multi core project you can use single and multi core debugging commands to debug parts of each core project e Multi Core Commands in CodeWarrior IDE e Multi Core Commands in Debugger Shell 6 2 1 Multi Core Commands in CodeWarrior IDE This section describes the multi core commands in the CodeWarrior IDE CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 234 Freescale Semiconductor Inc Chapter 6 Multi Core Debugging When you start a multi core debug session multi core commands are enabled on the CodeWarrior IDE Run menu These commands when issued affect all cores simultaneously The table below describes each menu choice For detailed information on these commands see CodeWarrior Development Studio Common Features G
434. or loads the kernel images because CodeWarrior does not support this option e For Download launch configuration the Linux partitions do not have the no auto start option set in the hypervisor DTS file The CodeWarrior IDE resets the Linux partition and the hypervisor starts the partition by default e If you want to use the Windows version of CodeWarrior you need to transfer the Linux directory along with the vmiinux e1f the associated sources and the used atb file from the BSP directory to the Windows computer 7 9 5 2 Creating an Attach Launch Configuration to Debug a Linux Partition after Kernel Boot Follow these steps 1 Import the vmiinux e1 file from the BSP Directory 1inux directory by using the PA ELF Import feature in CodeWarrior IDE 2 Create a new CodeWarrior Attach launch configuration The steps that follow describe how to configure the required settings 3 Select the Main page 4 Click New in the Remote System group to create a new remote system The New Connection wizard appears a In the Select Remote System Type page expand the CodeWarrior Bareboard Debugging group and select TRK Connection as shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 350 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software New Connection Select Remote System Type Connection configuration for 4 target running
435. or the compiler and linker options for each build configuration You can modify these settings using the IDE or with the pragma statements in your code 1 6 2 Code editing Code Warrior IDE has an integral text editor designed for programmers It handles text files in ASCII Microsoft Windows and UNIX formats To edit a file in a project double click the file name in the CodeWarrior Projects view CodeWarrior IDE opens the file in the editor associated with the file type The editor view has excellent navigational features that allow you to switch between related files locate any particular function mark any location within a file or go to a specific line of code CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 27 CodeWarrior IDE 1 6 3 Compiling To compile a source code file it must be among the files that are part of the current launch configuration If the file is in the configuration select it in the CodeWarrior Projects view and select Project gt Build Project from the CodeWarrior IDE menu bar To automatically compile all the files in the current launch configuration after you modify them select Project gt Build Automatically from the CodeWarrior IDE menu bar 1 6 4 Linking Select Project gt Build Project from the CodeWarrior IDE menu bar to link object code into a final binary file The Build Project command make
436. ore is running The target initialization file sets a hardware breakpoint at the reset address The core is stopped at the reset address to be put in the debug mode Working with breakpoints For e500 and eS00v2 cores the debugger implements software and hardware breakpoints by using debug exceptions and the corresponding interrupt handler Therefore MSR DE bit must remain set to allow debug interrupts to be taken When a debug exception is encountered the target is expected to stop at the debug exception handler pointed by rver IVOR15 However for e500 and e500v2 cores there is a chance that the first few instructions of the debug exception handler are fetched and even executed before processor halts As a result the core must be able to fetch and execute valid instructions from the interrupt handler location pointed by rver rvor15 without raising a TLB miss exception or any other exception Also the first few instructions of the debug interrupt handler must not perform any Load or Store operations that would corrupt the application s context if executed If any of these conditions is not satisfied the breakpoints will not work Working with watchpoints The e500 and e500v2 cores implement two data address compare registers The CodeWarrior debugger uses both these registers to place a single watchpoint on any variable or memory range The variable or memory range is 1 byte aligned Working with hardware breakpoints The e500 core
437. ore exec my ID is d n getpid printf My parent process s ID is d n getppid fflush stdout Calling another program exec 1 elf argv 0 EXEC 1 argv 1 NULL printf exec starts n execv argv 0 argv printf This will not print n fflush stdout return 0 19 Enter the below code in the editor window of Exec 1 lt file Listing 7 7 Source Code for Exec 1 c Exec 1 c Demonstrates Exec system call functionality ea ft a a a Feet Beh pe at e o po o ANEN fs NS ee SR ce Sle ea ee ee include lt stdio h gt include lt unistd h gt O Fa a i ah O a Se A A A AN A A eS Main Program E A res Rak a A o Ih ER ee a e Nh Ne at E Al oe T a Se a ta ae int main void CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 259 Debugging applications that use fork and exec system calls printf After exec my process ID is d n getpid printf My parent process s ID is d n getppid printf exec ends n fflush stdout return 0 20 Create the build configurations for building exec e1 and Exec 1 e1 similar to creating the build configurations for the rorx project 21 Build exec project a Select the Exec build configuration if not selected b Select Project gt Build Project The CodeWarrior IDE generates the exec e1f and exec 1 e1 executable files and
438. ot from U Boot Alternatively you may e Enable ft_dump_blob call from the u boot common cmd_bootm c file By default this is disabled CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 330 Freescale Semiconductor Inc _ AAA Chapter 7 Debugging Embedded Linux Software e Build the U Boot and write it on the target to have this enabled when booting the kernel e After this configure U Boot as described in the BSP documentation to boot the kernel and save the boot log e Check the device tree displayed during kernel boot and accordingly modify your DTS file 7 7 7 Debugging the kernel to download the kernel RAM disk and device tree This section describes how to debug the Linux kernel using CodeWarrior IDE to download the kernel RAM disk and device tree Perform the following steps 1 Create a project for the Linux kernel image See Creating a CodeWarrior Project using the Linux Kernel Image 2 Configure the launch configuration for Linux kernel debug a Select Run gt Debug Configurations The Debug Configurations dialog box appears b From the left pane in the CodeWarrior group select the appropriate launch configuration c On the Main page in the Connection panel select the appropriate system from the Connection drop down list d Click Edit The Properties for lt connection gt window appears
439. ow perform normal debugging operations in this window Step over the code in the child process debugger window a couple of times Next step over the code in the parent process debugger window a couple of times NOTE The console window of the parent process is shared by the child process Terminate the debug session Select Run gt Debug for zxec project Set a breakpoint in the exec c file on the line containing the execv function call CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 261 rr Debugging a shared library 34 Click Resume The target stops at the line where you set the breakpoint 35 Click Resume The exec call is executed and the debugger stops in the main function of the exec 1 e1 file 36 Execute some steps in zxec 1 c file 37 Terminate the debug session and remove all breakpoints 7 4 Debugging a shared library Code Warrior allows you to do source level debugging of shared libraries When you debug an executable file using a shared library you can step into the shared library code This section demonstrates how to debug a shared library that is implicitly linked to an application In this section e Create an example project e Configure the shared library build configuration e Configure the executable build configuration e Build the shared library e Build the executable e Configure the launch
440. ownload Target X Edit Connection type USB TAP Connection Advanced USB TAP E USB serial number JTAG settings JTAG clock speed kHz 10230 CCS server 9 Automatic launch m Server port number 41475 E CCS executable Manual launch 127 0 0 1 41475 Connect server to TAP Figure 6 2 Properties for lt connection gt Dialog Box 9 Select a target from the Target drop down list 10 Select the required TAP connection from the Connection type drop down list For example CodeWarrior TAP 11 On the Connection tab specify the hostname IP of the target board in the Hostname IP text box 12 Enter the JTAG clock speed in the JTAG clock speed text box 13 Specify the port number of the CCS server in the Server port number text box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 229 AE Debugging Multi Core Projects N 2 Properties for board_project core00_RAM_B4860_Download Hardware or Simulator Connection Hardware or Simulator Connection v Parent profile B34823 02 Name board_project core00_RAM_B4860_Download Description Template None Target 3 board_project core00_RAM_B4860_Download Target v Edit New Connection type CodeWarrior TAP y Connection Advanced CodeWarrior TAP Hardware connection Ethernet v
441. p D hv gt hv objdump Open the generated dump and search for secondary_start address for example 0x10006c After having the translation from 0x00100000 to 0x7f900000 add a breakpoint at 0x7f90006c Resume the first core which was stopped at the start_secondary_spin_table function Each secondary core will stop at the specified breakpoint either at the entry point or the secondary init function Debug all the cores until the init_guest function call from the partition init function 7 10 1 4 Debugging the Hypervisor Partitions Initialization Process To debug Hypervisor partition initialization process perform the following L Nn Select Run gt Debug Configurations The Debug Configurations dialog box appears On the left panel from the CodeWarrior Attach group select the attach launch configuration you had imported using the nv e1 file On the Main tab in the System panel select all the cores and click Debug The Debug perspective appears In the Editor view open the init c file and set a hardware breakpoint at the partition_init function Debug the init_guest function on each core Set a breakpoint in the init_guest_primary function for debugging each primary core of a partition Set a breakpoint in the register_cpu_with_guest function for the other cores of a partition NOTE The secondary cores wait on a barrier in the register cpu with guest function until the primary core of that p
442. p Your selection determines the launch configurations that you can include in your project Select the board you are targeting from the Board drop down list NOTE Hardware or Simulators that supports the target processor selected on the Processors page are only available for selection If you are using the Simics simulator see https www simics net for latest version and installation instructions for Simics Select the launch configurations that you want to include in your project and the corresponding connection from the Launch group Select the interface to communicate with the hardware from the Connection Type drop down list Enter the IP address of the TAP device in the TAP address text box This option is disabled and cannot be edited if you select USB TAP from the Connection Type drop down list Click Next The Build Settings page appears Select the programming language you want to use from the Language group The language you select determines the libraries that are linked with your program and the contents of the main source file that the wizard generates Select the architecture type used by the new project from the Build Tools Architecture group NOTE For projects created for QorIQ_P5 processors both the 32 bit and 64 bit options are enabled and can be selected This option may not be available for some target processors selected on the Processors page Select a toolchain from the Toolchain group Select
443. p processor_idi void asmlinkage void init start _ kernel void char command line extern struct kernel param _ start__ param _ stop param smp setup _processor_id qa Need to run as early as possible to initialize the lockdep hash t7 unwind init lockdep_init local_irq disable early boot_irqs off early init irq lock _class Lt Figure 7 36 Kernel Debug After MMU is Enabled 7 Click Run The debugger halts execution of the program at whatever breakpoints have been set in the project if any breakpoints have been set 8 Run through the rest of the code until the kernel starts to boot When the kernel boots boot status messages appear in the simulator window CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 336 Freescale Semiconductor Inc AAA a Chapter 7 Debugging Embedded Linux Software NOTE You can click Terminate to halt running of the kernel and set breakpoint watchpoints in the debug window as shown in the figure below S oe EPPC core 0 vmlinux 8 11 08 4 49 PM Suspended aerial Thread ID OxcO3dd618 Suspended Signal Halt received Description User halted thread cou idle home bogdan BSP_8572 tib mpc8572ds 20071203 rpm BUILD linux 2 6 3 rest_init D Kernel 8572 Multicore linux 2 6 23 init main c 460 OxcO2e5ad4 2 start_kernel D Kernel 8572 Multicore linux 2 6 23 init main c 6
444. page settings continued A YA gn e Hardware Select to execute the program on the target hardware available e Simulator Select to execute the program on a software simulator e Emulator Select to execute the program on a hardware emulator Board Specifies the hardware supported by the selected processor Launch Specifies the launch configurations and corresponding connection supported by the selected processor Connection Type Specifies the interface to communicate with the hardware e CodeWarrior TAP over USB Select to use the CodeWarrior TAP interface over USB to communicate with the hardware device e CodeWarrior TAP over Ethernet Select to use the CodeWarrior TAP interface over Ethernet to communicate with the hardware device e USB TAP Select to use the USB interface to communicate with the hardware device Ethernet TAP Select to use the Ethernet interface to communicate with the target hardware For more details on CodeWarrior TAP see CodeWarrior TAP User Guide available in the lt cWInstallDir gt PA Help PDF folder where lt CWInstallDir gt is the installation directory of your Codewarrior software e Gigabit TAP Corresponds to a Gigabit TAP that includes an Aurora daughter card which allows you to collect Nexus trace in a real time non intrusive fashion from the high speed serial trace port the Aurora interface e Gigabit TAP Trace JTAG over JTAG cable Select to use th
445. pe Remote System Configuration amp Default IP Address 127 0 0 1 Port 12345 Remote Download Path lusrjlocal bin Figure 2 10 Linux Application Page NOTE When debugging a Linux application you must use the CodeWarrior TRK to manage the communications interface between the debugger and Linux system For details see Install CodeWarrior TRK on Target System CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 44 Freescale Semiconductor Inc E7 Chapter 2 Working with Projects The table below describes the various options available on the Linux Application page Table 2 10 Linux Application Page Setting a A CodeWarrior TRK Select to use the CodeWarrior Target Resident Kernel TRK protocol to download and control application on the Linux host system IP Address Specifies the IP address of the Linux host system the project executes on Port Specifies the port number that the debugger will use to communicate to the Linux host Remote Download Path Specifies the host directory into which the debugger downloads the application 2 3 Creating projects You can use a project creation wizard provided by Code Warrior Development Studio to create a Code Warrior project according to your requirements This section explains e Creating Code Warrior Bareboard Application Project e Creating CodeWarrior Bareboard Library Project
446. performance of the linker The default options are e Normal Uses little memory but may take more processing time e Use Less RAM Uses medium amount of memory for medium processing time e Use More RAM Uses lots of memory to improve processing time This setting is equivalent to specifying the linkmode keyword command line option Code Merging Code merging reduces the size of object code by removing identical functions This option takes the following values e Off Disables code merging optimization This is the default value All Functions Controls code merging for all identical functions e Safe Functions Controls code merging for weak functions This setting is equivalent to specifying the code merging off all safe command line option Aggresive Merging The code merging optimization will not remove an identical copy of a function if your program refers to its address In this case the compiler keeps this copied function but replaces its executable code with a branch instruction to the original function To ignore references to function addresses use aggressive code merging This setting is equivalent to specifying the code merging all aggressive or code merging safe aggressive command line options Merges FP Constants Compiler pools strings of a file when the option is checked Clear this option to keep individual the strings of each file This permits deadstripping of unused strings This setting is
447. pervisor 356 Debugging U Boot after switching back to initial address space 293 300 307 Debugging U Boot before switching address space 289 296 303 Debugging U Boot in RAM 294 301 308 Debugging U Boot in translated address space 290 297 304 Debugging U Boot using Flash Devices 287 Debugging U Boot using NAND flash 302 Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 28 Debugging U Boot using NOR flash 289 Debugging U Boot using SPI and SD MMC flash 295 Debug Target Settings Page 32 217 Debug the Executable File 226 Debug the Linux Application 250 Debug the shared library 270 Default Signal Policy 248 Deleting Projects 56 Description 178 Diagnostics actions 41 1 Disassembler Settings 82 99 Download 11 Dump Flash actions 4 2 Duplicate action 414 E e500mc Registers 193 e500 Registers 188 e500v2 Registers 190 e5500 Registers 196 e6500 Registers 198 Eclipse IDE 22 Editing a Register Group 181 Editing remote system configuration 154 Editing the DTS File 328 Edit the Launch Configuration 222 Enabling HyperTRK Debug Support Directly in Build Tool 347 Environment 24 EPPC Exceptions 109 Erase Blank check actions 408 Erasing flash device 417 Establishing a Console Connection 312 Ethernet TAP 35 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual 454 Freescale Semiconductor Inc Execute flash programmer target task 4 4 Execute hos
448. places them in the project folder 22 Specify the remote download path of the executable files to be launched by the exec system call a Select Run gt Debug Configurations to open the Debug Configurations dialog box b In the left panel from the CodeWarrior group select the exec launch configuration c On the Debugger page click the Remote tab d Type tmp in the Remote Download Path field as shown in the figure below This specifies that the final executable file will be downloaded to this location on the target platform for debugging NOTE In the current example the remote download path is specified as tmp If you wish you may specify an alternate remote download path for the executable file E Main 69 Arguments 5 Debugger gt Trace and Profile E Source PB Environment Common Debugger options Debug Remote Other Executables Symbolics Remote download path tmp Figure 7 12 Remote Download Path Shared Library Project 23 Specify the host side location of the executable files to be launched by the exec system call a Click the Other Executables tab b Click Add The Debug Other Executable dialog box appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 260 Freescale Semiconductor Inc 24 23 26 27 28 29 30 Clear previously set breakpoints 32 33 Chapter 7 Debugging Embedded Lin
449. pment Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 346 Freescale Semiconductor Inc ee Chapter 7 Debugging Embedded Linux Software 1 Download the appropriate P4080 software bundle image the BSP in iso format to a Linux computer 2 Mount the iso image file using this command mount o loop BSP Image Name iso mnt iso 3 Install the BSP image file according to the instructions given in the BSP documentation 4 Add Code Warrior HyperTRK debug support to the hypervisor image nv utmage You can enable the HyperTRK debug support directly in the ssr Alternatively you can modify and build the HyperTRK manually and then enable it in the hypervisor Perform the steps given below a Enabling HyperTRK Debug Support Directly in Build Tool Follow this procedure only if the lt cwrnsta11Dir gt PA PA_Too1s HyperTrK directory does not contain any newer HyperTRK patches than the ones in the SW bundle b Applying New HyperTRK Patches from Code Warrior Install Layout Follow this procedure to manually apply new HyperTRK patches from Code Warrior install layout c Modifying and Building the HyperTRK Manually Follow this procedure only if you need to modify the HyperTRK sources 7 9 3 1 Enabling HyperTRK Debug Support Directly in Build Tool Follow this procedure only if the lt cwrnsta11Dir gt PA PA_Too1s HyperTrK directory does not contain any newer HyperTRK patches than the ones in the SW bundle
450. port Target Task from the shortcut menu To save your custom tasks right click in the Target Tasks view and then choose Export Target Task from the shortcut menu You can check the results of flash batch actions in the Console view The green color indicates the success and the red color indicates the failure of the task Se Slash Programmer Console Writing the address of the sector list Writing the sector list Erasing Sector OxO0000000 to OxOOOOFFFF Erasing Sector Ox00010000 to OxOOO1FFFF Clearing the status setting up Registers Commanding target to run Erasing Erase Command Succeeded Le O Figure 11 5 Console view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 415 Flash File to Target 11 2 Flash File to Target You can use the Flash File to Target feature to perform flash operations such as erasing a flash device or programming a file You do not need any project for using Flash File to Target feature only a valid Remote System is required To open the Flash File to Target dialog click the Flash Programmer button on the IDE toolbar e Connection pop up menu Lists all run configurations defined in Eclipse If a connection to the target has already been made the control becomes inactive and contains the text Active Debug Configuration Flash Configuration File pop up menu Lists predefined target task
451. provided in the CCS protocol log along with the JTAG ID and in case of an error a CodeWarrior Alert box appears See JTAG diagnostics tests for more information on JTAG diagnostics tests Secure debug key Select to enable the debugger to unlock the secured board with the secure debug key provided in the associated text box If this option is not selected you will receive a secure debug violation error when you try to debug on the locked board Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 139 Connection types Table 5 6 Gigabit TAP Trace Advanced Tab Options continued A ee eee ae NOTE If you provide a wrong key and an unlock sequence is run by the debugger with the erroneous key the associated part will be locked until a rest occurs and you will need to reset the target to connect again For the P1010 processor if you have one failed attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next attempt Reset Delay ms Specifies the time in milliseconds that CodeWarrior takes to gain control of the target after issuing a reset The default value for this option is 200 ms The delay needs to be increased if the debugger connection does not work
452. pter 2 Working with Projects 2 Select Edit gt Delete The Delete Resources dialog box appears NOTE Alternatively you can also select Delete from the context menu that appears when you right click the project 3 Select the Delete project contents on disk cannot be undone option to delete the project contents permanently NOTE You will not be able to restore your project using Undo if you select the Delete project contents on disk cannot be undone option 4 Click OK NOTE In case the Unreferenced Remote Systems dialog box appears displaying a list of remote systems used by the deleted project click Remove to delete the unreferenced remote systems Alternatively click Cancel to reuse the remote systems The selected project is deleted and relevant details of the project are removed from the CodeWarrior Projects view CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 57 Deleting Projects CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 58 Freescale Semiconductor Inc Chapter 3 Build Properties A build configuration is a named collection of build tools options The set of options in a given build configuration causes the build tools to generate a final binary with specific characteristics For example the binary produced by a Debug build configuration might cont
453. ption Enable GCC Extensions Specifies compiler to recognize language features of the GNU Compiler Collection GCC C compiler that are supported by CodeWarrior compilers This setting is equivalent to specifying the gcc_ extensions command line option Enum Always Int Specifies compiler to use signed integers to represent enumerated constants This setting is equivalent to specifying the enum command line option Use Unsigned Chars Specifies compiler to treat char declarations as unsigned char declarations This setting is equivalent to specifying the char unsigned command line option Pool Strings Specifies compiler to collect all string constants into a single data section in the object code it generates This setting is equivalent to specifying the strings pool command line option Reuse Specifies compiler to store only one copy of identical string literals This setting is equivalent to specifying the string reuse command line option IPA Specifies the Interprocedural Analysis IPA policy The default values are e Off No interprocedural analysis but still performs function level optimization Equivalent to the no deferred inlining compilation policy of older compilers e File Completely parse each translation unit before generating any code or data Equivalent to the deferred inlining option of older compilers Also performs an early dead code and dead data analysis in this mode Objects with unreference
454. quired to debug U Boot in flash memory differ from the settings required to debug U Boot in RAM CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 280 Freescale Semiconductor Inc e 2 Chapter 7 Debugging Embedded Linux Software 7 6 Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices U Boot resides in flash memory on target systems and boots an embedded Linux image developed for those systems This section shows you how to use the CodeWarrior debugger to debug the U Boot using NOR NAND SPI and SD Card MMC flash devices This section explains e Configuring and Building U Boot e Creating a CodeWarrior Project to Debug U Boot e Specifying the Launch Configuration Settings e Debugging U Boot using Flash Devices 7 6 1 Configuring and Building U Boot This section explains how to configure and build U Boot and how to write configuration words in the U Boot code to create the final boot image See Preparing U Boot for debugging to install and configure the BSP For more information on configuring the build tool and building U Boot with Code Warrior debugger support see the SDK User Manual available in the iso nelp documents pat folder Upon successful compilation of U Boot the binary images for NOR and NAND flash devices are written to the flash For the SPI and SD flash devices write the configuration words at the beginning of the u boot bin file to
455. r Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 77 Build Properties for Power Architecture Use the C C Language panel to control compiler language features and some object code storage features for the current build target The table below lists and describes the various options available on the C C Language panel Table 3 19 CodeWarrior Build Tool Settings C C Language Options Force C Compilation Explanation Translates all C source files as C source code This setting is equivalent to specifying the cplusplus pragma and lang c command line option ISO C Template Parser Enforces the use of ISO IEC 14882 1998 standard for C to translate templates and more careful use of the typename and template keywords The compiler also follows stricter rules for resolving names during declaration and instantiation This setting is equivalent to specifying the parse _func_templ pragma and iso_templates command line option Use Instance Manager Reduces compile time by generating any instance of a C template or non inlined inline function only once This setting is equivalent to specifying the instmgr command line option Enable C Exceptions Generates executable code for C exceptions Enable this option if you use the try throw and catch statements specified in the ISO IEC 14882 1998 C standard Otherwise disable t
456. r Linux host only you can select Launch host muxer process for automatically launching the muxer process If you follow this step you need to select the mux_server executable and a TCP IP target muxer with an IP address and a starting port on which you want to launch the e For TRK muxer ports click Sequence and type the first port on which the mux server Started The channels and ports on which the debugger accesses the cores appear e The channels must correspond to the trk stub s mux channels added in the hypervisor ats file j Click Finish The New Connection wizard disappears and the new remote system that you just created appears in Connection drop down list in the Remote system group 5 Select all the cores that you want to debug from the Linux partition NOTE You can use the new remote system which you just created in other launch configurations also by selecting different cores and making other necessary adjustments 6 Select the Debugger page to configure the debugger specific settings a In the Debugger options group select the OS Awareness tab b Select Linux in the Target OS drop down list Note that it is mandatory to select Linux for the specific scenario described in this section The Boot Parameters Debug and Modules tabs appear In the Boot Parameters tab e Disable all the options available on this tab In the Debug tab CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev
457. r Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Chapter 1 Introduction This manual explains how to use CodeWarrior Development Studio tools to develop software for bareboard applications and embedded Linux operating system running on Freescale Power Architecture processors The topics covered here are as follows e Release notes e Contents of this manual e Accompanying documentation e PowerPC Embedded Application Binary Interface e CodeWarrior Development Studio tools e CodeWarrior IDE 1 1 Release notes Release notes include information about new features last minute changes bug fixes incompatible elements or other sections that may not be included in this manual You should read release notes before using the Code Warrior IDE NOTE The release notes for specific components of the Code Warrior IDE are located in the release notes folder in the Code Warrior installation directory 1 2 Contents of this manual CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 19 Accompanying documentation Each chapter of this manual describes a different area of software development The table below lists each chapter in the manual Table 1 1 Organization of this manual Introduction This chapter Working with Projects Describes the different types of projects you can crea
458. r Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 110 Freescale Semiconductor Inc EES AAA AAA Chapter 4 Debug Configurations The table below lists the various options available on the EPPC Exceptions page Table 4 6 EPPC Exceptions Page Options pti 222 Doeoription Exception handling Select the checkboxes in this panel if you want the debugger to catch the required exceptions By default catching all exceptions is disabled Only the Debug exception is caught as the debugger uses this exception for setting breakpoints Catching the debug exception cannot be unset 4 1 3 3 Download Use this page to specify which executable code sections the debugger downloads to the target and whether the debugger should read back those sections and verify them NOTE Selecting all options in the Program Download Options group significantly increases download time Initial Launch options apply to the first debugging session Successive Runs options apply to subsequent debugging sessions The Download options control whether the debugger downloads the specified Program Section Data type to the target hardware The Verify options control whether the debugger reads the specified Program Section Data type from the target hardware and compares the read data against the data written to the device CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semi
459. r and the build toolchain that is selected while creating a project The table below lists the build tools supported by different processors Table 3 1 Build Tools for Power Architecture Processor Families 82xx 8250 CodeWarrior tools 83xx 8306 CodeWarrior tools 8309 CodeWarrior tools 8377 CodeWarrior tools 85xx 8536 CodeWarrior tools 8548 CodeWarrior tools 8560 CodeWarrior tools 8568 CodeWarrior tools 8569 CodeWarrior tools 8572 CodeWarrior tools C29x C29x CodeWarrior tools Qonverge B4420 GCC tools B4460 GCC tools B4860 GCC tools BSC9131 CodeWarrior GCC tools BSC9132 CodeWarrior GCC tools G1110 CodeWarrior GCC tools G4860 GCC tools QorlQ_P1 P1010 CodeWarrior tools P1011 CodeWarrior tools P1012 CodeWarrior tools P1013 CodeWarrior tools P1014 CodeWarrior tools P1015 CodeWarrior tools P1016 CodeWarrior tools P1017 CodeWarrior tools P1020 CodeWarrior tools P1021 CodeWarrior GCC tools P1022 CodeWarrior tools P1023 CodeWarrior tools P1024 CodeWarrior tools P1025 CodeWarrior tools QorlQ_P2 P2010 CodeWarrior tools P2020 CodeWarrior tools P2040 GCC tools Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 61 Build Properties for Power Architecture Table 3 1 Build Tools for Power Architecture Process
460. r debugger uses both these paths to debug the executable file The compilation path is the path to the original project that built the executable file If the original project is from an IDE on a different computer you need to specify the compilation path in terms of the file system on that computer The local file system path is the path to the project that the CodeWarrior IDE creates to debug the executable file To specify a source lookup path for your executable file perform the following steps 1 Click the Source tab of the Debug Configurations dialog box The corresponding page appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 223 ELA A a Debugging Externally Built Executable Files Name Test_import_Debug_P4080_Download Ej Main 09 Arguments ES Debugger Trace and Profile 2 Source Li Environment E Common Source Lookup Path Z Path Mapping cygdrive Add t Default Edit Remove Up Down Restore Default Search for duplicate source files on the path Apply Revet Figure 5 25 Debug Configurations Dialog Box Source Page 2 Click Add The Add Source dialog box appears 3 Select Path Mapping from the available list of sources CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 224 Freescale Semiconductor I
461. r example p 0xs0000004 OF 0x80000004 e Comments start with standard C and C comment characters and continue to the end of the line The table below lists each command that can appear in a memory configuration file Table 10 1 Memory configuration commands autoEnableTranslations range reserved reservedchar translate 10 2 1 autoEnableTranslations The autoEnableTranslations command configures if the translate commands are considered by the debugger or not Syntax autoEnableTranslations enableFlag Arguments enableFlag Pass true to instruct the debugger to consider the translate commands If this command is not present the translations will not be considered so this command should usually be present and have a true argument Examples This command enables the debugger to consider the translate commands AutoEnableTranslations true CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 399 Memory configuration commands 10 2 2 range This command sets debugger access to a block of memory Note that the range command must have both the 1oaddress and niaddress in the same memory space Syntax range loAddress hiAddress size access Arguments loAddress the starting address of the memory range hiAddress the ending address of the memory range size the size in bytes the debug monitor or emulator use
462. r sets a software breakpoint into target memory When program execution reaches the breakpoint the processor stops and activates the debugger The breakpoint remains in the target memory until the user removes it The breakpoint can only be set in writable memory such as SRAM or DDR You cannot use this type of breakpoints in ROM e Hardware breakpoints Selecting the Hardware menu option causes the debugger to use the internal processor breakpoints These breakpoints are usually very few and can be used with all types of memories ROM RAM because they are implemented by using processor registers Tip You can also set breakpoint types by issuing the vp command in the Debugger Shell view In this section e Setting Breakpoints e Setting Hardware Breakpoints e Removing Breakpoints e Removing Hardware Breakpoints CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 162 Freescale Semiconductor Inc AAA AAA AAA AA Chapter 5 Working with Debugger 5 8 1 Setting Breakpoints This section explains how to set breakpoints within a program in Code Warrior IDE To set a breakpoint perform the following steps 1 Switch to the Debug perspective in Code Warrior IDE 2 Open the Debug view if it is not already open by selecting Window gt Show View gt Debug The Debug view appears shown in the figure below Debug E Ss gt lay is gt v m E test Debug Version
463. r the file e Cleared The debugger does not load symbolics for the file Download column e Checked The debugger downloads the file to the Target Device e Cleared The debugger does not download the file to the Target Device Add Click to open the Debug Other Executable dialog box and add other executable file to debug while debugging this target Use this dialog box to specify the following settings e Specify the location of the additional executable Enter the path to the executable file that the debugger controls in addition to the current project s executable file Alternatively click Workspace File System or Variables to specify the file path Load symbols Check to have the debugger load symbols for the specified file Clear to prevent the debugger from loading the symbols The Debug column of the File list corresponds this setting Download to device Check to have the debugger download the specified file to the target device Specify the path of the file in the Specify the remote download path text box Clear the Download to device checkbox to prevent the debugger from downloading the file to the device The Download column of the File list corresponds to the Download to device setting OK Click to add the information that you specify in the Debug Other Executable dialog box to the File list Change Click to change the settings for the entry currently selected in the File list column Change this
464. rary 266 Configuration for the Linux Application 243 Bus noise 424 Create a CodeWarrior Linux Project Page 39 Bypass scan test 153 Create a Code Warrior project to debug U Boot 275 Create a flash programmer target task 404 Create an example project 262 C Create launch configurations for U Boot debug stages 278 ee Cane Creating a CodeWarrior Project from the Linux Bass Kernel Image 34 Cache Symbolics Between Sessions is Disabled 3 8 Creating a CodeWarrior Project to Debug U Boot Cache Symbolics Between Sessions is Enabled 3 8 284 Cache View ae Creating a CodeWarrior Project using the Linux Cache View Toolbar Menu 206 Kernel Image 316 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Freescale Semiconductor Inc 453 Index Creating a Download Launch Configuration to Debug a Linux Partition from an Entry Point or a User Defined Function 353 Creating an Attach Launch Configuration to Debug a Linux Partition after Kernel Boot 350 Creating CodeWarrior Bareboard Library Project 49 Creating CodeWarrior Bareboard Project 45 Creating CodeWarrior Linux Application Project 57 Creating hardware diagnostics task 4 8 Creating Projects 45 Creating task for import export fill memory 427 Customizing Debug Configurations 127 D Data lines 425 Debug 108 Debug Configurations 0 Debugger 24 107 Debugger Limitations and Workarounds 441 Debugger Shell Cache Line Commands 2 0 Debugger Shell Global Cache Comman
465. ration ae Click OK The Properties window closes af On the Main tab in the Connection panel check all the core checkboxes ag Click Debug The Debug view appears with the debugger attached to each core of the selected processor 5 Create the required memory configuration file based on the hypervisor MMU entries a In the Debug view select the first core and click Suspend b In the Registers view expand the regppctiei group c Find the MMU entries corresponding to the 0x00100000 address NOTE The MMU entry for this translation uses the physical address 0x7f900000 and the translation size is 1 MB d Add the following code to the memory configuration file AutoEnableTranslations true translate v 0x00100000 p 0x7 900000 0x00100000 e Add specific translations to access memory areas for which the translation is not 1 1 NOTE The memory mapped registers are accessed directly on physical memory space no translation is required in such cases f Save the memory configuration file and add it to the attach launch configuration g Select Run gt Debug Configurations The Debug Configurations dialog box appears h Expand the CodeWarrior group and select the launch configuration you created CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 358 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software i In the Connection panel click Edit
466. rded endian 32 32 UR User read permission bit 33 33 UW User write permission bit 34 34 UX User execute permission bit 35 35 SR Supervisor read permission bit 36 36 SW Supervisor write permission bit 37 37 SX Supervisor execute permission bit 38 38 X0 Extra system attribute bit 39 39 x1 Extra system attribute bit 40 43 U0 U3 User attribute bits used only by software 44 44 IPROT Invalidation protection 45 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualization fault 54 59 LPIDR Translation logical partition ID 60 87 Reserved 88 115 RPN Real page number depending on page size only the bits associated with a page boundary are valid Bits that represent offsets within a page are ignored and should be zero 116 127 Reserved Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 200 Freescale Semiconductor Inc Chapter 5 Working with Debugger Table 5 34 e6500 TLB1 Registers L2MMU_CAMO through L2MMU_CAM63 continued 128 179 EPN Effective page number Depending on page size only the bits associated with a page boundary are valid Bits that represent offsets within a page are ignored and should be zero 180 190 Reserved 191 191 V Valid bit for entry The table below shows e6500 LRAT registers starting from L2MMU_LRATO through L2MMU_LRAT7 Table 5 35 e6500 LRAT Registers L2MMU_LRATO throug
467. reated in Creating a CodeWarrior Project to Debug U Boot 3 Select Run gt Debug Configurations The Debug Configurations dialog box appears 4 Expand the CodeWarrior group and select the appropriate launch configuration 5 Click Debug The Debug perspective appears with the core 0 running CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 289 Debugging U Boot using NOR NAND SPI and SD Card MMC Flash Devices 6 Click Reset on the Debug view toolbar The Reset dialog box appears 7 In the Run out of reset column select the checkboxes for all cores except core 0 After the reset completes core 0 appears stopped at the reset vector In the Debugger Shell view issue the following command to enter the PIC alternate load address setpicloadaddr 0xFFF40000 8 From the Debug view toolbar select the Instruction Stepping Mode command 9 From the Debug view toolbar select the Step Into command to step into _start_e500 The start s file appears in the editor area and the disassembled code with memory addresses appears in the Disassembly view 3 starts 3 B Outline 51 Disassembly 3 A li r0 2 A clear registers arrays not reset by hardware Oxfffff000 lt AsmSection gt 33 r0 2 3 mtspr LicSRO r0 invalidate d cache L1 Oxfffff004 lt AsmSection 4 gt mtspr spr
468. reboard and Linux is GCC v4 9 2 rev1182 NOTE By default GCC v4 9 x generates DWARF4 To generate an older DWARF version DWARF2 DWARF3 use g with gdwarf 2 OF gdwarf 3 For older versions of GCC PowerPC toolchain such as GCC v4 8 2 rev963 or for toolchains not available in the current release by default install the corresponding service pack by performing these steps 1 Select Help gt Install New Software from the CodeWarrior IDE menu bar The Install wizard launches and the Available Software page appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 84 Freescale Semiconductor Inc Chapter 3 Build Properties 2 Select FSL PA Build Tools from the Work with drop down list A list of PA GCC service packs is displayed in the pane below the Work with drop down list 3 Select the appropriate service pack as shown in the figure below E Available Software Check the items that you wish to install 5 Work with FSL PA Build Tools http freescale com lgfiles updates Eclipse PA10_4 0 com freescale pa buildtools_ win v Find more software by working with the Available Software Sites preferences type filter text Name Version p 000 PA GCC 4 7 2 1817 Build Tools Service Packs 4 a 000 PA GCC 4 8 2 1963 Build Tools Service Packs Y lt Service Pack for Windows GccE500mcLinux Build Tool version
469. reescale Semiconductor Inc ON 11 12 13 14 15 Chapter 7 Debugging Embedded Linux Software Execute the following command to get a new and clean kernel tree bitbake c configure f virtual kernel Configure the Linux kernel using the various configuration options available in the kernel configuration user interface For example run the following command to display the kernel configuration user interface bitbake c menuconfig virtual kernel The kernel configuration user interface appears CodeWarrior supports both SMP and non SMP debug To change the default settings you can make changes by selecting the Processor support options To run a monolithic kernel you do not need to enable loadable module support However during the debug phase of drivers it is easier to debug them as loadable modules to avoid rebuilding the Linux kernel on every debug iteration If you intend to use loadable modules select the Loadable module support menu item Select the Enable loadable module support option Select the Module unloading option NOTE If you want to use the rmmod lt mod_name gt command for kernel modules under development select the Forced module unloading option Select Exit to return to the main configuration menu Select Kernel hacking Select Include Code Warrior kernel debugging by pressing Y Enabling this option allows the Code Warrior debugger to debug the target Select other desir
470. reescale Semiconductor Inc 137 Connection types 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Select the Gigabit TAP Trace from the Connection type drop down list The Connection and Advanced tabs display the options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 5 Gigabit TAP Trace Connection Tab Options potion CI Gigabit TAP Trace Hostname IP Specifies hostname or the IP address of the TAP Debug connection Specifies the type of debug connection to use The options available are JTAG over JTAG cable connection JTAG over Aurora cable connection and Aurora connection JTAG settings JTAG clock speed kHz Specifies the JTAG clock speed By default set to 10230 kHz Aurora settings Aurora data rate Specifies the Aurora data rate which refers to the frequency with which the raw data bits are transferred on the wire The Aurora connection is used only for trace analysis CCS server Automatic launch Select to automatically launch the specified CCS server on the specified port Server port number Specifies the port number to launch the CCS server on CCS executable Select to specify the path of or browse to the executable file of the CCS server Manual launch Select to manu
471. rent pid d n getpid getppid fflush stdout gint 12 shared_local fn2 11 printf nForked Parent CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 257 Debugging applications that use fork and exec system calls printf nParent Global d Shared_Local d gint shared_local printf nParent pid d Parent s parent pid d In getpid getppid fflush stdout return 0 int fni int j j return j int fn2 int i i return i The code of the parent process creates a forked process child process when the _ab fork function executes The debugger opens a separate thread window for the child process When the child process finishes executing the debugger closes the thread window To debug the code of the child process you need to set a breakpoint in the child process code You can debug the code of the child process the same way you debug code of any other process 16 Create another project exec and create two new build configurations with the following settings Table 7 3 Exec Example Project Settings Project name Exec Location lt workspace dir gt Exec Project type Linux application Language C Build configurations e Exec e Exec 1 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06
472. reprocessor The table below lists and describes the various options available on the PowerPC Preprocessor panel Table 3 26 CodeWarrior Build Tool Settings PowerPC Preprocessor Options Opon lanai O O E Command Shows the location of the preprocessor executable file All options Shows the actual command line the preprocessor will be called with Expert settings Shows the expert settings command line parameters Command line pattern 3 3 1 8 1 Preprocessor Settings Use the Preprocessor Settings panel to specify the PowerPC preprocessor options that are specific to Power Architecture software development The table below lists and describes the various options available on the Preprocessor panel Table 3 27 CodeWarrior Build Tool Settings Preprocessor Options Mode Specifies the tool to preprocess source files This setting is equivalent to specifying the E command line option Emit file change Controls generation of file and line breaks This setting is equivalent to specifying the ppopt nojbreak command line option Emit pragmas Controls generation of pragma directives This setting is equivalent to specifying the ppopt no pragma command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 83 Build Properties for Power Architecture Table 3 27
473. rform two memory units access size operations 4 units Select to have the hardware diagnostic tools perform four memory units access size operations Target Address Specify the address of an area in RAM that the hardware diagnostic tools should analyze The tools must be able to access this starting address through the remote connection after the hardware initializes Value Specify the value that the hardware diagnostic tools write during testing Select the Write option to enable this textbox Verify Memory Writes Select the checkbox to verify success of each data write to the memory 11 3 2 3 Loop Speed The Loop Speed pane configures diagnostic tests for performing repeated memory reads and writes over the remote connection interface The tests repeat until you stop them By performing repeated read and write operations you can use a scope analyzer or logic analyzer to debug the hardware device After the first 1000 operations the Status shows the estimated time between operations NOTE For all values of Speed the time between operations depends heavily on the processing speed of the host computer CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 421 LATT Hardware diagnostics For Read operations the Scope Loop test has an additional feature During the first read operation the hardware diagnostic tools store the value r
474. rious settings of this page 7 Click Apply to save the new settings When you finish you can click Debug to start a new debugging session or click Close to save your changes and close the Debug Configurations dialog box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 128 Freescale Semiconductor Inc ES AAA Chapter 4 Debug Configurations 4 3 Reverting Debug Configuration Settings After making some modifications in a debug configuration s settings you can either save the pending unsaved changes or revert to last saved settings To save the pending changes click the Apply button of the Debug Configurations dialog box or click the Close button and then the Yes button To undo pending changes and restore the last saved settings click the Revert button at the bottom of the Debug Configurations dialog box The IDE restores the last set of saved settings to all pages of the Debug Configurations dialog box Also the IDE disables the Revert button until you make new pending changes CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 129 fe EI Reverting Debug Configuration Settings CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 130 Freescale Semiconductor Inc Chapter 5 Working with Debugger This chapter expla
475. rm any required relocations 4 1 3 5 System Call Services Use this page to activate the debugger s support for system calls and to select options that define how the debugger handles system calls The CodeWarrior debugger provides system call support over JTAG System call support lets bareboard applications use the functions of host OS service routines This feature is useful if you do not have a board support package BSP for your target board The host debugger implements these services Therefore the host OS service routines are available only when you are debugging a program on a target board or simulator NOTE The OS service routines provided must comply with an industry accepted standard The definitions of the system service functions provided are a subset of Single UNIX Specification SUS CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 114 Freescale Semiconductor Inc AAA e Chapter 4 Debug Configurations Debugger options Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness Fj Activate Support for System Services Figure 4 8 Debugger Options System Call Services page The table below lists the various options available on the System Call Services page Table 4 9 System Call Services Page Options WII SA IAN AIDA Activate Supportfor System Services Check this option to enable
476. roject in the CodeWarrior Projects view 2 Select Run gt Debug The debugger downloads core O and switches to the Debug perspective The debugger halts execution at the first statement of main The Debug view displays all the threads associated with the core FS Debug 3 gt 20 SA a EA board_project core00_RAM_B4860_Download CodeWarrior 4 oe EPPC board_project core00 elf core 0 Suspended a 2 Thread ID 0x0 Suspended Signal Halt received Description User halted thread 2 main main c 14 0x0000000000100194 1_start _ start_e6500_32bit_crt0 c 264 0x00000000001000d0 pol C Users b34823 workspace board_project core00 RAM board_project core00 elf 8 8 13 4 19 PM 28 eke p F Se if E m a 4 Figure 6 4 Multi Core Debugging Debug Core 0 3 Download all other cores associated with the project 4 Select a thread from core 0 in the Debug view All the views in the Debug perspective will be updated to display the debug session for the selected core The figure below displays the debug session for a selected thread in core 0 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 231 Debugging Multi Core Projects l Debug board_project core00 Sources main c CodeWarrior Development Studio File Edit Source Refactor Navigate Search Project Run Window Help b E OS Q MyM amp OrQ ae
477. ronment Logging Settings il ua Architecture Libraries I Bas Tool Chain Editor a ELF Linke E C C General i ead sl w Project References 5 General r 1 Run Debug Settings 5 Libraries Miscellaneous amp Shared Library Settings amp Power Environment S Power ELF Compiler Preprocessor Symbols 3 Includes Optimization amp Debugging Warnings 3 Miscellaneous S83 Power ELF Assembler 3 General SS Power ELF Preprocessor workspace_loc Fork Fork2clone ES Preprocessor Settings B Power ELF Disassembler 3 Disassembler Settings Tool Settings se Build Steps Build Artifact 65 Binary Parsers Error Parsers Build Tool Versions Fork2clone Library search path L Restore Defaults Apply Figure 7 11 Libraries Linker Settings Fork Project 11 Remove the default main c file from the project 12 Add a new ab_fork c file to the project 13 Enter the below code in the editor window Of db_fork c file Listing 7 3 Source Code for db_fork c include db_fork h y int _ libc_fork void CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 255 Debugging applications that use fork and exec system calls return db fork extern _ typeof _ libc fork fork attribute weak alias __libc_fork extern _ typeof _ lib
478. ror Checking Select to issue warning messages for common programming errors mis matched return type in a function s definition and the return statement in the function s body mismatched assignments to variables of enumerated types This setting is equivalent to specifying the extended_errorcheck pragma and the warnings extended command line option Hidden virtual functions Select to issue warning messages if you declare a non virtual member function that prevents a virtual function that was defined in a superclass from being called This setting is equivalent to specifying the warn_hidevirtual pragma and the warnings hidevirtual command line option Implicit Arithmetic Conversions Select to issue warning messages when the compiler applies implicit conversions that may not give results you intend assignments where the destination is not large enough to hold the result of the conversion a signed value converted to an unsigned value an integer or floating point value is converted to a floating point or integer value respectively This setting is equivalent to specifying the warn_implicitconv pragma and the warnings implicitconv command line option Implicit Integer To Float Conversions Select to issue warning messages for implicit conversions from integer to floating point values This setting is equivalent to specifying the warn_impl_i2f conv pragma and the warnings impl_int2float command line option Implicit Float To Integer Conv
479. roup is already halted when a trigger is happening on another running core the cross trigger will not activate for the group To work around this limitation it is advisable to control the group synchronously by using the multicore commands Multicore Run and Multicore Suspend Maintaining core time base synchronization For e500mc and e5500 processors the crennrcrr register in RCPM block is modified by the debugger unconditionally on any connection to the target and after any Reset action to enable correct time base handling during multi core debugging specifically during Linux kernel debugging Changing the register value set by the debugger can cause the target software behave unexpectedly during debug sessions if the target software relies on time base synchronization P2020 ComExpress Linux kernel debug Linux kernel debug using download launch configuration is not supported The workaround is to use Linux kernel debug with attach configuration For early boot debug set a hardware breakpoint at address O debugger shell bp hw oxo then start the kernel from u boot console After the breakpoint is hit the kernel can be debugged from the entry point 13 5 T series processors This section describes the limitations and workarounds of the CodeWarrior debugger for the T series processors The T series processor family includes the following processors e e5500 T1013 T1014 T1020 T1022 T1023 T1024 T1040 and T1042 e e6500 T
480. rovides steps to create a Code Warrior project for debugging U Boot To create a Code Warrior project to debug U Boot 1 Start the Code Warrior IDE 2 Select File gt Import The Import wizard appears 3 Expand the CodeWarrior group and select CodeWarrior Executable Importer 4 Click Next The Import a Codewarrior Executable file page appears Nn Specify the project name in the Project name text box Click Next 7 Click Browse next to the Executable text box e For NOR SPI and SD browse to the U Boot folder and select the U Boot file e For NAND browse to the U Boot folder and select the u boot spl file from the nand_spl folder You need two e1 files when performing U Boot debug in NAND To specify the second e1 file see Specifying the Launch Configuration Settings e Click Open e Click Next e From the Processor list expand the processor family and select the required processor e From the Toolchain list select Bareboard Application e Click Next e From the Debugger Connection Types list select the required connection type ON CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 284 Freescale Semiconductor Inc Ey Chapter 7 Debugging Embedded Linux Software NOTE Select the Simulator option from the Debugger Connection Types list if you want to use the simulator to debug U Boot e Select a required launch configuration From the
481. rred Verify Memory Writes Select the checkbox to verify success of each data write to the memory 11 4 3 Exporting memory to file You can read data from a user specified memory range encode it in a user specified format and store this encoded data in a user specified output file Select the Export memory option from the Import Export Fill Memory Action editor to export memory to a file Import Export Fill Memory Action Action type Select the type of action you want to perform Import memory Fill memory v Memory Access Provide memory location or memory space and address Address Expression Access Size Memory space and address Ox 0 1 unit 2 unit 0 Expression main i e 4 units v Input Output Provide source or destination for the operation File Selection Select file File Type Annotated Hex y Workspace System Variables FF Number of elements 0x 10 E Verify memory writes Import Export Fill Memory Action Figure 11 10 Exporting memory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 431 Import Export Fill memory The following table explains the export memory options Table 11 5 Controls used for exporting data from memory into file Memory space and address Explanation Enter the literal address and memory space on which the data
482. rrior TAP 149 Adding Memory Monitor 202 Common 25 Address 424 Compiling 28 Address lines 425 Compiling the DTS file 329 Advanced tab 158 Components of Cache View 208 alternatePC 382 Configurations Page 36 218 ANDmem 383 Configure flash programmer target task 406 ANDmmr 384 Configure hardware to use U Boot image 275 Applying New HyperTRK Patches from Configure Linux Process Signal Policy 247 CodeWarrior Install Layout 347 Configure the executable build configuration 265 Arbitrary TAP state move test 154 Configure the launch configuration 267 Architecture 87 Configure the shared library build configuration 265 Arguments 05 Configure U Boot and build U Boot images with Assembler 23 CodeWarrior debugger support 274 Attaching Core to the Debug Application 369 Configuring a Download Kernel Debug Scenario Auto Build Mode 55 319 autoEnableTranslations 399 Configuring an Attach Kernel Debug Scenario 320 Configuring and Building U Boot 287 B Configuring the Build Tool 3 4 Configuring the kernel project for debugging 319 Bit Fields 175 Configuring the Linux Kernel 3 4 Building a custom MSL C library 439 Configuring the Modules Symbolics Mapping 343 Building Projects 54 Connection types 133 Build eos 59 Consistent debug control 132 Build Properties for Power Architecture 60 Contents of this manual 9 Build Settings Page 34 42 Create a Code Warrior Bareboard Project Page 30 Build the executable 266 Create a CodeWarrior Download Launch Build the shared lib
483. rs to the kernel from a bootloader on Power Architecture processors Since downloading the kernel with the CodeWarrior IDE emulates bootloader behavior the IDE provides this way of passing the parameters to the kernel Use of the Open Firmware Device Tree initialization method consists of several general actions discussed below in the order of their execution e Obtaining a device tree settings ats file see Obtaining a DTS File This is a text file that contains the kernel setup information and parameters e Editing the settings ats file see Editing the DTS File Edit the file with information relevant to the current target board and kernel e Compiling the settings ats file to a binary file at if you want to use a atb file see Compiling the DTS file The binary file is the one downloaded to the board to set up the kernel parameters e Using the atb binary file in the CodeWarrior IDE in the Boot Parameters tab see Configuring an Attach Kernel Debug Scenario 7 7 6 4 1 Obtaining a DTS File To obtain a device tree source file that can be used with CodeWarrior 1 Configure a TFTP server on a Linux PC 2 Copy the Linux images on the TFTP server PC in the specific directory The following files are needed e ulmage CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 326 Freescale Semiconductor Inc 10 Chapter 7 Debugging Embedded Linux Softwar
484. rspective will be updated to display the debug session for the selected core 9 Select and expand the External Debug Registers group 10 Select Run gt Step Over The following actions occur e Debugger executes the current statement and halts at the next statement e The program counter PC indicator moves to the next executable source line in the Source view 11 Issue several more Step Over commands and watch the register values change 12 Select maino thread from core 0 again Notice that the register values remain unchanged This is because the Code Warrior debugger controls each core s execution individually i eee l With core 0 still selected click the Step Over_ _ button several times until you reach the prints statement Debugger executes the current statement the following statements and halts at the printf Statement CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 233 A Multi Core Debugging Commands 14 Switch to the other debug window 15 Select the main thread for core 1 by clicking it Notice that the program counter icon in the Source view did not move The debugger controls the execution of each core individually 16 In the Debug view click the Resume button Core 1 enters an infinite loop The status of the program changes to running me In the Debug view click the main thread f
485. rted CodeWarrior TRK on the target This should not be confused with the directory where the CodeWarrior TRK binary resides Workspace Click to specify the path of or browse to a workspace relative working directory File System Click to specify the path of or browse to a file system directory Variables Click to specify variables by name to include in the working directory CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 106 Freescale Semiconductor Inc Chapter 4 Debug Configurations 4 1 3 Debugger Use this tab to configure debugger settings The Debugger tab presents different pages for specifying different settings NOTE The content in the Debugger Options panel changes depending on the Debug session type selected on the Main tab page E Main 60 Arguments Debugger Trace and Profile Ey Source ME Environment E Common Debugger options Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness Program execution Initialize program counter at O Program entry point O User specified Resume program Stop on startup at O Program entry point User specified main C Stop on exit Breakpoints and watchpoints C Install regular breakpoints as Restore watchpoints Data access C Disable display of variable values by default Disable display of register values b
486. s The width of the Virtual memory space is determined by the target processor s effective address size For e500v2 and e500mc processors the width of the Virtual memory space is 32 bit For e5500 and e6500 processors the width of the Virtual memory is 64 bit Note that the Virtual memory space is the default memory space in the Disassembly view e Physical p Indicates that the specified address is interpreted as a physical address The debugger does not attempt to perform virtual to physical translations therefore it simply accesses the specified address as a physical address When you select the CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 203 i Viewing memory Physical option any translations read from the target MMU or defined in the memory configuration file or the kernel awareness plug in are disregarded In addition the behavior is cache coherent If the data is in cache the debugger gets it from there otherwise the access goes to the memory Note that a Physical cacheable read access can cause modified cache lines to be flushed to the memory before being accessed For processors based on e500v2 e500mc e5500 cores the width of the physical memory address space is 36 bit The e6500 core has a 40 bit physical memory space Older cores like e300 and e500 only support 32 bit physical addresses Physical Cache Inhibited The Physic
487. s Dialog Box Below is an example of the EPPC Exceptions page view NOTE The EPPC Exceptions panel currently provides options to configure projects created for PowerQUICC III and QorlQ processors based on the e500v2 core NOTE The features of this page view are currently not supported by this implementation Debugger options Debug EPPC Exceptions Download IPIC System Call Services Other Executables Symbolics OS Awareness Exception handling check the exceptions to always catch C Critical input C Fixed Interval Timer C Machine Check C Watchdog Timer O Data Storage O Data TLB error O Instruction Storage O Instruction TLB Error External O Alignment O Performance Monitor O Program C System Call _ Decrementer Option pre selected by default to allow debugger to control the target Users cannot change this option Figure 4 5 Debugger Options EPPC Exceptions page Selecting any of the checkboxes available on the EPPC Exceptions page configures the core to automatically halt when the corresponding exception is taken The debugger stops at the entry point of the interrupt handler for the selected exception allowing you to inspect the processor state and continue debugging from there NOTE Catching the selected exceptions works only if the target is debugged To ensure that the CodeWarrior debugger works properly the debug exception is set and cannot be selected CodeWarrior Development Studio fo
488. s an aggregation of multiple variable databases and not all these variables are suitable to be used from a build environment Given below are the variables that should be used ProjDirPath returns the absolute path of the current project location in the file system ProjDirPath Source main c workspace_loc returns the absolute path of a workspace resource in the file system or the location of the workspace if no argument is specified workspace_loc ProjectName Source main c workspace_loc Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 104 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 2 Main Tab Options continued a YA Gnu_Make Install_Dir returns the absolute path of the GNU make exe tool Gnu_Make Install _Dir make exe NOTE This option is disabled when Connect debug session type is selected Build if required before launching Controls how auto build is configured for the launch configuration Changing this setting overrides the global workspace setting and can provide some speed improvements NOTE These options are set to default and collapsed when Connect debug session type is selected The options include Build configuration Specifies the build configuration either explicitly or use the current active configuration e Select configuration using C C Applic
489. s been established the debugger performs the JTAG diagnostics tests Power at probe IR scan check Bypass DR scan check Arbitrary TAP state move IDCODE scan check and the result of the tests are printed to the console log and in case of an error a CodeWarrior Alert box appears When this option is not selected the CodeWarrior debugger only performs a limited test while configuring the JTAG chain It checks if the PWR pin is correctly connected and displays a Cable disconnected error if not connected properly The connection details are provided in the CCS protocol log along with the JTAG ID and in case of an error a CodeWarrior Alert box appears See JTAG diagnostics tests for more information on JTAG diagnostics tests Secure debug key Select to enable the debugger to unlock the secured board with the secure debug key provided in the associated text box If this option is not selected you will receive a secure debug violation error when you try to debug on the locked board NOTE If you provide a wrong key and an unlock sequence is run by the debugger with the erroneous key the associated part will be locked until a rest occurs and you will need to reset the target to connect again For the P1010 processor if you have one failed attempt with a wrong key then a subsequent unlock sequence with a valid key will succeed But if you provide a wrong key twice you will need to hard reset the board before the next atte
490. s for memory accesses access controls what type of access the debugger has to the memory block supply one of reaa Write Of ReadWrite Examples To set memory locations oxrroo0000 through oxrroooorr to read only with a size of 4 bytes range OxFF000000 OxFFOOOOFF 4 Read To set memory locations oxrFroo01000 through oxrrooo1FF to write only with a size of 2 bytes range 0xFF000100 OxFFOOO1FF 2 Write To set memory locations oxrroo02000 through oxrrrrrrrr to read and write with a size of 1 byte range 0xFF000200 OxFFFFFFFF 1 ReadWrite 10 2 3 reserved CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 400 Freescale Semiconductor Inc Chapter 10 Memory Configuration Files This command allows you to specify a reserved range of memory If the debugger attempts to read reserved memory the resulting buffer is filled with the reserved character If the debugger attempts to write to reserved memory no write takes place Note that the reservea command must have both the 1oaddress and niaddress in the same memory space NOTE For information showing how to set the reserved character see reservedchar Syntax reserved loAddress hiAddress Arguments loAddress the starting address of the memory range hiAddress the ending address of the memory range Examples To reserve memory starting at OxFFOO0024 and ending at Ox FFO00002F reserved 0xFF000024 OxFF00002F 10
491. s for the processor selected in the Launch Configuration and tasks added by user with the Browse button The items in this pop up menu are updated based on the processor selected in the launch configuration For more information on launch configurations see product s Targeting Manual e Unprotect flash memory before erase checkbox Select to unprotect flash memory before erasing the flash device This feature allows you to unprotect the flash memory from Flash File To Target dialog File to Flash group Allows selecting the file to be programmed on the flash device and the location e File textbox Used for specifying the filename You can use the Workspace File System or Variables buttons to select the desired file e Offset 0x textbox Used for specifying offset location for a file If no offset is specified the default value of zero is used The offset is always added to the start address of the file If the file does not contain address information then zero is considered as start address e Save as Target Task Select to enable Task Name textbox e Task Name textbox Lets you to save the specified settings as a Flash target task Use the testbox to specify the name of the target task e Erase Whole Device button Erases the flash device In case you have multiple flash blocks on the device all blocks are erased If you want to selectively erase or program blocks use the Flash programmer feature e Erase and Program button
492. s option increases both compilation time and the performance of the generated code This setting is equivalent to specifying the 02 command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 94 Freescale Semiconductor Inc eeEyEyEEyyyy__ y Chapter 3 Build Properties Table 3 41 Tool Settings Optimization Options continued e Optimize most 03 Turns on all optimizations specified by 02 and also turns on the finline functions funswitch loops fpredictive commoning fgcse after reload and ftree vectorize options At this optimization level the compiler generates code that is usually faster than the code generated from level 2 optimizations This setting is equivalent to specifying the 03 command line option Optimize for size Os Optimize for size Os enables all 02 optimizations that do not typically increase code size It also performs further optimizations designed to reduce code size This setting is equivalent to specifying the Os command line option Other optimization flags Specifies individual optimization flag that can be turned ON OFF based on the user requirements 3 3 2 3 5 Debugging Use the Debugging panel to set the debugging information The following table lists and describes the various options available on the Debugging panel Table 3 42 Tool Settings
493. s the at file into RAM with a Linux kernel and a initial RAM disk L Za 3 Update the bus frequency and clock frequency nodes from the value KRD gt bi_busfreq Update the c1ock frequency nodes from the value KRD gt bi_initfreq Update the following nodes from the value KRD gt bi_tbfreq cpus PowerPC 8349 0 timebase frequency Create the following node from the size on disk of the file entered in LKBP gt Enable Initial RAM Disk gt File Path or from the address entered in LKBP gt Enable Initial RAM Disk gt Address memreserve Create the following node from LKBP gt Command Line chosen bootargs Create the node linux stdout path Create the following node from the address entered in LKBP gt Enable Initial RAM Disk gt Address chosen linux initrd start Create the following node from the size on disk of the file entered in LKBP gt Enable Initial RAM Disk gt File Path and from the address entered in LKBP gt Enable Initial RAM Disk gt Address chosen linux initrd end 7 7 6 4 3 Compiling the DTS file 1 2 Ensure that you have the DTC device tree compiler on your host machine If the DTC device tree compiler is missing get the latest DTC source archive from bitshrine org Extract the archive run make and put the binary somewhere reachable by your PATH wget dtc 20070307 tar bz2 wget dtc 20070307 tar bz2 md5 wget dtc 20070307 tar gz wget dtc 20070307 tar gz md5 Navigate
494. s the active project up to date and links the resulting object code into a final output file You can control the linker through the IDE There is no need to specify a list of object files The workspace tracks all the object files automatically You can also modify the build configuration settings to specify the name of the final output file 1 6 5 Debugging Select Run gt Debug from the CodeWarrior IDE menu bar to debug your project This command downloads the current project s executable to the target board and starts a debug session NOTE The CodeWarrior IDE uses the settings in the launch configuration to generate debugging information and initiate communications with the target board You can now use the debugger to step through the program code view and change the value of variables set breakpoints and much more For more information see CodeWarrior Development Studio Common Features Guide and the Working with Debugger chapter of this manual CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 28 Freescale Semiconductor Inc Chapter 2 Working with Projects This chapter explains how to create and build projects for Power Architecture processors using the CodeWarrior tools This chapter explains e CodeWarrior Bareboard Project Wizard e CodeWarrior Linux Project Wizard e Creating projects e Building projects e Importing Classic CodeWarrior Projects e Del
495. s the cache features and supported status flags by this product CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 211 Viewing Cache The table below lists cache features supported by P4080 QorIQ processors Table 5 39 P4080 QorlQ Supported Cache Operations L1 data cache e 32 KB size e enable disable cache e valid e 64 sets e lock unlock cache e lock e 8 ways e invalidate cache e shared e 16 words line e lock unlock line e dirty e invalidate line e castout e read modify data e plru e flush cache e flush line L1 instruction cache e 32 KB size e enable disable cache e valid e 64 sets e lock unlock cache e lock e 8 ways e invalidate cache e plru e 16 words line e lock unlock line e invalidate line e read modify data L2 cache e 128 KB size e enable disable cache e valid e 256 sets e lock unlock cache e lock e 8 ways e invalidate cache e shared e 16 words line e lock unlock line e dirty e invalidate line e non coherent e read modify data e plru e flush cache e flush line L3 cache e 2 banks e enable disable cache e valid e 512KB bank e lock unlock cache e locked e 512 sets e invalidate cache e modified e 32 ways e lock unlock line e plru e 16 words line e invalidate line e read modify data e flush cache e flush line The table below lists cache features supported by PowerQUICC II processors Table 5 40 PowerQUICC
496. scale Semiconductor Inc Chapter 5 Working with Debugger To display the supported memory spaces for a target in the Memory view perform the following steps L Tn the Memory view click the Add Memory Monitor icon The Monitor Memory dialog box appears shown in the figure below 2 Specify the address in the Enter address or expression to monitor drop down list Omne Rte E D Disassembly C Outine Memory Browser 2 o n BR N tt Nd Import Export Fill Memory Action Ax Virtual vw ox100230 Go New Tab keii c Select the type of action you want to perform gt Monitor Memory Virtual 0x100230 lt Tradtional gt 3 O pat memory O Export menory 0x0000000000100230 00000000 A Enter address or expression to monitor 0x0000000000100234 00000000 y Memory Access Provide omar EEA T monary space end address Oxfe009000 0x0000000000100238 00010001 Address i Dipreatlan Accents a lt a 7 0x000000000010023C DBEIFFFS ayo O Memory space and address Physical Ox 110011 O1 byte BxOOOOOCOLOCLNNZ AD 38000000 Sisa O 0x0000000000100244 9001FFDO D O4 bytes Ox0000000000100248 60000000 0x000000000010024C 7D204B78 Kx Input Output 0x0000000000100250 7C090378 x Provide source or destination for the operation 0x0000000000100254 C3E28000 i oa 0x0000000000100258 60000000 Select file Y 0x000000000010025C 7D204B78 Kx Import Export Fil Memory Action Ox0000000000100260 7C090378 x y E console 2 tas
497. se it to specify the size of the target memory The flash programmer does not modify any memory location other than the target memory buffer and the flash memory e Verify Target Memory Writes checkbox Select this checkbox to verify all write operations to the hardware RAM during flash programming 11 1 2 3 Add flash programmer actions In the Flash Programmer Actions group in the Flash Programmer Task editor window Create a flash programmer target task you can add following actions on the flash device e Erase Blank check actions e Program Verify actions e Checksum actions e Diagnostics actions CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 407 TA AAA DAA Flash programmer e Dump Flash actions e Protect Unprotect actions e Secure Unsecure actions The Flash Programmer Actions group contains the following UI controls to work with flash programmer actions e Add Action pop up menu e Erase Blank Check Action Allows you to add erase or blank check actions for a flash device e Program Verify Action Allows you to add program or verify flash actions for a flash device e Checksum Action Allows you to add checksum actions for a flash device e Diagnostics Action Lets you add a diagnostics action e Dump Flash Action Lets you add a dump flash action e Protect Unprotect Action Lets you add protect or unprotect action e Secure Unsecur
498. search paths NOTE The options provided on the Shared Library Settings panel are only applicable to Linux projects The table below lists and defines the various options available on the Shared Libraries Settings panel Table 3 35 Tool Settings Shared Libraries Settings Options Explanation Shared shared Controls generation of a shared object which can be linked with other objects to form an executable This setting is equivalent to specifying the shared command line option Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 90 Freescale Semiconductor Inc EEE a Chapter 3 Build Properties Table 3 35 Tool Settings Shared Libraries Settings Options continued Shared object name WI soname Specifies the internal DT_SONAME field to the specified name when creating a shared object When an executable is linked with a shared object which has a DT_SONAME field and the executable is run the dynamic linker will attempt to load the shared object specified by the DT_SONAME field rather than the using the file name given to the linker Import Library name WI out implib Creates a file containing an import library corresponding to the shared object generated by the linker DEF file name WI output def Creates a file containing a DEF file corresponding to the shared object generated by the linker
499. sechsvecnasbiesaadesteasentoc 333 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page 77582 Debugging the Kernel while the MMU is beitig Edabled som 334 2369 Debiggine the Kernel after the MMU is Enabled aa rennarar 335 39 Debugging the kernel by attaching toa running U Dodks cisne stands saecaauntenssesuaulen ices 338 Pa Denigpas Logdable kenisi Morla as 340 726 1 Loatable Kernel Modules An IO O ia iii dd oie 340 7 8 2 Creating a Code Warrior Project from the Linux Kernel Imag sssrinin sinanasi 341 7 83 Configuring the Modules Symbolics Mapping siccis aeai e aiaia 343 TE Dis 345 Ta ro o N 345 222 Prerequisites tor Debuggmeo a Guest Applca lOs diia dpi dias 346 7 9 3 Adding Code Warrior HyperTRK Debug Stub Support in Hypervisor for Linux Kernel Debugging 346 7 9 3 1 Enabling HyperTRK Debug Support Directly in Build Tool oouonncnmmrsrssm 347 7 9 3 2 Applying New HyperTRK Patches from CodeWarrior Install Layout 347 7 93 3 Modifying ond Building the Hyper TRK Mantilla 348 fa Preparing Comeci n ta PAOSUDS Tarrasa dali 348 7 9 5 Debugging AMP SMP Guest Linux Kernels Running Under HypervisSOT ooooncnnncnnnononcnnnonncononancnncnancnn cnn ncnnon 349 Perel PROCS IU O 349 7 9 5 2 Creating an Attach Launch Configuration to Debug a Linux Partition after Kernel Boot 350 7
500. shes a partial link operation and issues error messages for unresolved symbols NOTE Select Partial Link from the Output Type list box to enable this option This setting is equivalent to specifying the resolved_partial command line option Heap Size k Sets the run time size of the heap in kilobytes This setting is equivalent to specifying the heapsize size command line option Stack Size k Sets the run time size of the stack in kilobytes This setting is equivalent to specifying the stacksize size command line option Interpreter Specifies the interpreter file used by the linker Generate Link Map Generates a text file that describes the contents of the linker s output file This setting is equivalent to specifying the map filename command line option List Closure Controls the appearance of symbol closures in the linker map file This setting is equivalent to specifying the listclosure command line option List Unused Objects Controls the appearance of a list of unused symbols in the linker map file This setting is equivalent to specifying the mapunused command line option List DWARF Objects Controls the appearance of DWARF debugging information in the linker map file This setting is equivalent to specifying the listdwarf command line option Generate Binary File Controls generation of the binary files The default options are None Generates no binary file even if S record generation is on This
501. side of the source line 5 8 2 2 Using Debugger Shell to Set Hardware Breakpoints You can use the Debugger Shell view to set hardware breakpoints Follow these steps to set a hardware breakpoint using the Debugger Shell view 1 Open the Debugger Shell view 2 Begin the command line with the text bp hw 3 Complete the command line by specifying the function address or file at which you want to set the hardware breakpoint For example to set a breakpoint for line 6 in your program type bp hw 6 4 Press the Enter key The debugger shell executes the command and sets the hardware breakpoint Tip Enter help bp at the command line prompt to see examples of the bp command syntax and usage CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 166 Freescale Semiconductor Inc SS ey Chapter 5 Working with Debugger 5 8 3 Removing Breakpoints This section explains how to remove breakpoints from a program in CodeWarrior IDE To remove a breakpoint from your program you have two options e Remove Breakpoints using Marker Bar e Remove Breakpoints using Breakpoints View 5 8 3 1 Remove Breakpoints using Marker Bar To remove an existing breakpoint using the marker bar follow these steps 1 Right click the breakpoint in the marker bar 2 Select Toggle Breakpoint from the menu that appears 5 8 3 2 Remove Breakpoints using Breakpoints View To remove an existing brea
502. size of the TLB entry 6 7 Reserved 8 15 TID Translation identity Defines the process ID for this TLB entry 16 17 NV Next victim Can be used to identify the next victim to be targeted for a TLB miss replacement operation for those TLBs that support the NV field Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 193 el Working with Registers Table 5 29 e500mc TLBO Registers L2MMU_TLBO through L2MMU_TLB511 continued 18 31 Reserved 32 32 W Write through 33 33 Caching inhibited 34 34 M Memory coherency required 35 35 G Guarded 36 36 E Endianness Determines endianness for the corresponding page 37 37 Reserved 38 38 XO Implementation dependent page attribute Implemented as storage 39 39 X1 Implementation dependent page attribute Implemented as storage 40 43 U0 U3 User attribute bits These bits are associated with a TLB entry and can be used by system software 44 44 Reserved 45 45 SR Supervisor read permission bit 46 46 SW Supervisor write permission bit 47 47 SX Supervisor execute permission bit 48 48 UR User read permission bit 49 49 UW User write permission bit 50 50 UX User execute permission bit 51 51 Reserved 52 52 GS Translation guest space 53 53 VF Virtualizatio
503. sors Targeting Manual Rev 10 5 0 06 2015 40 Freescale Semiconductor Inc E7 Chapter 2 Working with Projects Choose the processor for this project Processor type filter text 85x C29x Qonverge QorlQ P1 QorlQ_P2 QorlQ_P3 QorlQ P4 P4040 P4080 QorlQ P5 QorlQ Ti QorlQ_T2 QorlQ_T4 Project Output 9 Application Library o ro Fn Figure 2 8 Processor Page The table below describes the various options available on the Processor page Table 2 8 Processor Page Settings II scriptions O O O O Processor Expand the processor family tree and select a supported target The toolchain uses this choice to generate code that makes use of processor specific features such as multiple cores Project Output Select any one of the following supported project output CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 41 CodeWarrior Linux Project Wizard Table 2 8 Processor Page Settings ee a eee e Application Select to create an application with e1 extension that includes information related to the debug over a board e Library Select to create a library with a extension that can be included in other projects Library files created using this option do not include board specific details 2 2 3 Build Settings Page This page displays the toolchains supported by the current i
504. stallation There are a variety of debug probes The current kernel debugging example uses the USB TAP Connection information for other debug probes can be determined from documentation provided with the probes 7 7 1 1 USB TAP Connections _ Ensure that the power switch on the target board is OFF 2 Connect the square end USB B connector of the USB cable to the USB TAP 3 Connect the rectangular end USB A connector of the USB cable to a free USB port on the host Linux machine 4 Connect the ribbon cable coming out of the USB TAP to the 16 pin connector on the target board Connect the power supply to the USB TAP 6 Establish a console connection before applying power to the board so that boot messages can be viewed in a terminal window Nn CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 311 Debugging the Linux Kernel 7 7 1 2 Establishing a Console Connection You need to establish a console connection to the target hardware to e View target generated log and debug messages e Confirm successful installation of the bootloader U Boot e Use the bootloader to boot the Linux OS e Halt the booting of the Linux OS The bootloader receives keyboard input through a serial port that has default settings 115 200 8 N 1 Follow these steps to establish a console connection to the target hardware 1 Connect a serial
505. sting settings for the disassembler The following table lists and describes the various options available on the Disassembler Settings panel Table 3 50 Tool Settings Disassembler Settings Options Disassemble All Section Content including debug Disassembles the content of all sections not just those information expected to contain instructions Disassemble Executable Section Content Disassembles all executable content and send output to a file Intermix Source Code With Disassembly Intermixes source code with disassembly Display All Header Content Displays the contents of all headers Display Archive Header Information Displays archive header information Display Overall File Header Content Displays the contents of the overall file header Display Object Format Specific File Header Contents Displays the file header contents and object format Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 99 Ee Build Properties for Power Architecture Table 3 50 Tool Settings Disassembler Settings Options continued Display Section Header Content Displays the section header of the file Display Full Section Content Displays the full section of the file Display Debug Information Displays debug information in the object file Display Debug Information Using ct
506. support for system services All the other options on the System Call Services panel are enabled only if you check this checkbox stdout stderr By default the output written to stdout and stderr appears ina CodeWarrior IDE console window To redirect console output to a file select the stdout stderr checkbox Click Browse to display a dialog box and specify the path and name of this file Use shared console window Check this option if you wish to share the same console window between different debug targets This setting is useful in multi core or multi target debugging Trace level Use this drop down list to specify the system call trace level The place where the debugger displays the traced system service requests is determined by the Trace checkbox The system call trace level options available are e No Trace system calls are not traced e Summary the requests for system services are displayed e Detailed the requests for system services are displayed along with the arguments parameters of the request Trace By default traced system service requests appear in a CodeWarrior IDE console window To log traced system service requests to a file select the Trace checkbox Click Browse to display a dialog box and define the path and name of this file In a project created through the Power Architecture New Project Wizard use the library syscall a rather than a UART library for handling the output Table con
507. system Select File gt Import The Import wizard appears Expand the CodeWarrior group and select CodeWarrior Executable Importer Click Next The Import a CodeWarrior executable file page appears Specify a name for the project to be imported in the Project name text box If you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired location from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location Click Next The Import C C Assembler Executable Files page appears Click Browse next to the Executable field Select the vmlinux file obtained 10 11 Click Open From the Processor list expand the processor family and select the required processor Select the Bareboard Application toolchain from the Toolchain group Selected toolchain sets up the default compiler linker and libraries used to build the new project Each toolchain generates code targeted for a specific platform Select the Linux Kernel option from the Target OS list NOTE Selecting Linux Kernel will automatically configure the initialization file for kernel download the default translation settings these settings need to be adjusted according to the actual Linux kern
508. t based Scope Loop on target 426 Execute target based Memory Tests on target 427 Exporting memory to file 43 F Files modified 437 438 Fill Memory 432 Flash File to Target 416 Flash programmer 403 Flattened Device Tree Initialization 324 G GCC Build Tool Settings 84 General 68 81 88 97 Generic processors 450 Gigabit TAP 140 Gigabit TAP Trace 137 H Hard resetting 2 3 Hardware diagnostics 4 8 Hypervisor An Introduction 345 Import Export Fill memory 427 Import a CodeWarrior Executable file Page 2 5 Import a CodeWarrior Executable file Wizard 2 4 Import an Executable File 2 9 Import C C Assembler Executable Files Page ES Importing Classic Code Warrior Projects 56 Importing data into memory 429 Includes 93 IncorMMR 384 Initialization tab 155 Initializing TLB Registers 187 Input 66 71 80 Install BSP 273 Install Code Warrior TRK on Target System 240 Installing the Board Support Package BSP 313 Introduction 19 IR scan test 152 J JTAG Configuration Files 377 JTAG configuration file syntax 377 JTAG diagnostics tests 152 Index L Libraries 89 Linker 24 Linking 28 Link Order 67 Linux Application Launch Configurations Page 216 Linux Application Page 44 Loadable Kernel Modules An Introduction 340 Loop Speed 421 Main 02 Main standard libraries 25 Making a Custom MSL C Library 435 Manual Build Mode 54 Memory Access 421 Memory configuration commands 398 Memory Configura
509. t which the debugger loads the PIC module onto target memory Usually Position Independent Code PIC is linked in such a way that the entire image starts at address Ox00000000 Debugger options Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness C alternate Load Address Figure 4 7 Debugger Options PIC page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 113 VO Using Debug Configurations Dialog Box The table below lists the various options available on the PIC page Table 4 8 PIC Page Options Oeton scriptions OO O Alternate Load Address Specify the starting address at which the debugger loads your program You can also use this setting when you have an application which is built with ROM addresses and then relocates itself to RAM such as U Boot Specifying a relocation address lets the debugger map the symbolic debugging information contained in the original ELF file built for ROM addresses to the relocated application image in RAM Clear the checkbox to have the debugger load your program at a default starting address NOTE The debugger does not verify whether your code can execute at the specified address As a result the PIC generation settings of the compiler linker and your program s startup routines must correctly set any base registers and perfo
510. tM1 Task Group Run Configuration Active Debug Context Task Type Import Export Fil Memory Figure 11 7 Create New Target Task Window 2 In the Task Name textbox enter a name for the new task 3 Use the Run Configuration pop up menu to specify the configuration that the task launches and uses to connect to the target NOTE If the task does not successfully launch the configuration that you specify the Execute button of the Target Tasks view toolbar stays unavailable 4 Use the Task Type pop up menu to specify Import Export Fill Memory 5 Click Finish CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 428 Freescale Semiconductor Inc _ _ _ _ _ T7 Chapter 11 Working with Hardware Tools The Import Export Fill Memory target task is created and it appears in the Import Export Fill Memory Action editor Import Export Fill Memory Action Action type Select the type of action you want to perform Import memory Export memory Fill memory v Memory Access Provide memory location or memory space and address Address Expression Access Size Memory space and address Ox 0 1 unit 2 unit 0 Expression i gigs D 4 units v Input Output Provide source or destination for the operation File Selection Select file File Type Annotated Hex y Workspace System Variables FF Number of
511. tab of the launch configuration matches the user privileges of the CodeWarrior TRK running on the target system 7 1 2 1 TCP IP Connections To start CodeWarrior TRK through a TCP IP connection 1 Connect to the remote target system a On the host computer open a new terminal window b At the command prompt in the terminal window enter the following command where IPAddress represents the target system s IP address telnet IPAddress The telnet client connects to the telnet daemon on the target system 2 Navigate to the directory that contains the apprrx e1f binary executable file The system changes the current working directory 3 Type the following command where Port is the listening port number optionally specified in the Connections panel of Debug window typically 1000 AppTRK elf Port CodeWarrior TRK starts on the target system and listens to the specified TCP IP port for connections from the CodeWarrior IDE CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 241 EA el Debugging a Linux Application Tip To continue use of the terminal session after launching CodeWarrior TRK start CodeWarrior TRK as a background process by appending the ampersand symbol amp to the launch command For example to start CodeWarrior TRK as a background process listening to TCP IP port number 6969 you would enter the following command
512. table that follows lists and describes the toolbar buttons that help work with the file search paths e The compiler can search include files in several different ways Use this panel to set the search order as follows e For include statements of the form include xyz the compiler first searches user paths then the system paths e For include statements of the form include lt xyz gt the compiler searches only system paths This setting is equivalent to specifying the I I path command line option System Recursive Path I ir Appends a recursive access path to the current System Path list The table that follows lists and describes the toolbar buttons that help work with the file search paths This setting is equivalent to specifying the I ir command line option Disable CW Extensions Controls deadstripping files Not all third party linkers require checking this option The table below lists and describes the toolbar buttons that help work with the Input panel Table 3 15 CodeWarrior Build Tool Settings Input Toolbar Buttons a Y pin Add Click to open the Add file path or the Add directory path dialog box and create a file or directory path 5 Delete Click to delete the selected file or directory To confirm deletion click Yes in the Confirm Delete dialog box g Edit Click to open the Edit file path or Edit directory path dialog box and update the selected file or directory sl Move up
513. tart CodeWarrior TRK on Tarzet SiN 240 Pastel TRIPP CONECO A PA 241 PLS anal COORD ia 242 7 1 3 Create a Code Warrior Download Launch Configuration for the Linux Application 243 714 Specify Console VO Redirections for the Linux Application ccoo rar iaa eri 246 LS Contiene Linux Process Signal Poli AR 247 ALSI Signal A A A A 248 TAa Detanlt Sienal Poll iii AAA 248 ES Momos Br Pol apa 248 TLG Deppe mie Linis APPO said de ias 250 Ez Viesme maultple processes and IA a a Ri 231 73 Debusting applications that us fork and exec systemi calls ci inenen eane cial 252 TA DIE AAA aa 262 DE CES ia ia 262 742 Configure the shared Library build pon iia clap 265 tao Configure the executable build conter ii di 265 AR Pond ese oralidad 266 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc Section number Title Page A PPP o An 266 TAG Tories ts JARED III Aina 267 TA Depue Me SEO IA a a 270 da Prepare U Boot for Wee iaa 212 Peek SM N T E dl Ze 7 5 2 Configure U Boot and build U Boot images with CodeWarrior debugger SUPPOTt eseseeeeeeeeeeeeeeeeeeees 274 foi Configure hardware to use U Boot IMA dic RIO JaA Li ste a CodeWarrior project to debug UB i 210 755 Specify kneh configuration N iia 276 2156 Create launch configurations for U Boot debug slap nin aia 278 7 6 Debugging U Boot using NOR NAND SPI and SD Card MMC F
514. tart_kerne1 Then in the Hypervisor console restart the partition for example partition 1 with the following commands stop 1 start load 1 This is equivalent to download with stop at entry point Stepping in interrupt handler An error sometimes occurs when stepping in an interrupt handler The workaround to avoid this problem is to use the default memory configuration file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 451 Generic processors CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 452 Freescale Semiconductor Inc Index Index N CCSSIM2 ISS 133 cfg target initialization commands 382 Changing Bit Fields 176 tcl target initialization commands 394 Changing Bit Value of a Register 173 Changing Build Properties 59 A Changing Program Counter Value 2 3 Checksum actions 4 0 Accompanying documentation 20 Code editing 27 Actions 177 CodeWarrior Bareboard Project Wizard 29 Action Type 420 CodeWarrior Build Tool Settings 62 Add flash device 406 CodeWarrior Command Line Debugger 59 Add Flash Programmer Actions 407 CodeWarrior Development Studio tools 22 Adding a Register Group 80 CodeWarrior IDE 26 Adding CodeWarrior HyperTRK Debug Stub CodeWarrior Linux Project Wizard 38 Support in Hypervisor for Linux Kernel Debugging CodeWarrior Profiling and Analysis tools 25 346 CodeWa
515. te provides an overview of CodeWarrior project wizards Build Properties Explains build properties for Power Architecture projects Debug Configurations Describes the different types of launch configurations you can create provides an overview of the debugger Working with Debugger Explains various aspects of CodeWarrior debugging such as debugging a project connection types setting breakpoints and watchpoints working with registers viewing memory viewing cache and debugging externally built executable files Multi Core Debugging Explains multi core debugging capabilities of CodeWarrior debugger Debugging Embedded Linux Software Explains debugging activities related to embedded Linux software JTAG Configuration Files Explains JTAG configuration files that pass specific configuration settings to the debugger and support chaining of multiple devices Target Initialization Files Discusses how to use a target initialization file and describes cfg and tcl target initialization commands Memory Configuration Files Discusses how to use a memory configuration file and describes memory configuration commands Working with Hardware Tools Explains CodeWarrior hardware tools used for board bring up test and analysis Making a Custom MSL C Library Discusses how to port an MSL C library to the GNU Compiler Collection GCC tool to support bareboard applications that execute on the Power Architecture based boards
516. te project for each selected core The option will also set the core index for each project based on the core selection e Select AMP One build configuration per core to generate one project with multiple targets each containing an 1c file for the specified core 23 Select the processor core that executes the project from the Core index list 24 Click Next The Trace Configuration page appears 25 If you plan to collect the trace details a Select the Start a trace session on debug launch checkbox to start a trace session automatically on debug launch b Select the source used for collecting trace data from the Generate trace configurations group e Select the DDR Buffer checkbox to send the trace data to a DDR memory buffer e Select the NPC Buffer checkbox to send the trace data to a small dedicated trace buffer e Select the Gigabit TAP Trace checkbox to collect trace data on a Gigabit TAP Trace probe c Select the Enable circular collection checkbox from the Enable circular collection DDR and NPC only group to treat the trace buffer as a circular CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 48 Freescale Semiconductor Inc Chapter 2 Working with Projects buffer Selection of this checkbox ensures continuation of trace collection even after the buffer is full by replacing the oldest entries 26 Click Finish The wizard creates an appli
517. tecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 367 E User Space Debugging with On Chip Debug A typical Linux kernel debug session attach or download adds the symbolics information for the user space application The symbolic information must be added before starting the debug session Follow these steps to add the information 1 11 Select Run gt Debug Configurations The Debug Configurations dialog box appears Click the Debugger tab The Debugger options group appears Select the Other Executables tab Click Add to add the application elf file The Debug Other Executable dialog box appears Select the Load Symbols checkbox and clear the Download to Device checkbox To download and start the application on the target board the application should be included in the target file system using RAM disk or rootfs You can either include the application manually or using SDK e From the SDK The application is included in the root s file from the SDK The application will be downloaded on the target board with the rest of the file system using the RAM disk download feature Follow all the steps from the BSP user manual iso nelp documents paz On the BSP image to include the application in the target file system Place the application manually You can place the application manually in the target file system by copying the application to the target after the linu
518. tem Browser view appears with the process and thread information shown in the figure below CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 251 RS Debugging applications that use fork and exec system calls CodeWarrior Debugger for EPPC Linux Applications 4 18 08 10 49 AM Process amp Threads f ID Status AppDbg lt 927 gt 927 apptrk lt 926 gt R 926 apptrk lt 922 gt S 922 sh lt 921 gt Sleep 921 telnetd lt 920 gt 920 sh lt 853 gt Sleep 853 portmap lt 849 gt 849 inetd lt 846 gt Sle 846 kload lt 824 gt Sle 824 syslogd lt 822 gt 822 init lt 1 gt Sleepin 1 Se AA ee ee Figure 7 9 System Browser view 7 3 Debugging applications that use fork and exec system Calls This section describes how to use the CodeWarrior debugger to debug programs that contain fork and exec system calls The table below describes the fork and exec system calls Table 7 1 fork and exec Description fork This generic Linux system call creates a new process that is the exact replica of the process that creates it This call returns O to the child process and returns the PID Process ID of the newly created child process to the parent process exec This Linux system call launches a new executable in an already running process The debugger destroys the instance of the previous executable loaded
519. ter 7 Debugging Embedded Linux Software For low end processors e500v1 e500v2 set DE Debug Enable from MSR register using the Debugger Shell or the Registers view You can then perform the set resume and remove operations on the breakpoints NOTE To access breakpoints set on a previous debug session after changing the PIC address you need to disable and enable back those breakpoints after the PIC value has been changed 7 6 4 2 3 Debugging U Boot after switching back to initial address space This section tells how to debug U Boot in a NOR flash device after switching back to initial address space While debugging U Boot when you reach the cpu _init_ call you are back to address space 0 You now need to remove the memory configuration file used in the previous section or set another memory configuration file for U Boot compiled on 36 bits To debug U Boot in flash after switching back to initial address space 1 2 3 Click E on the Debug view toolbar to terminate the current debug session Select Run gt Debug Configurations The Debug Configurations dialog box appears Expand the CodeWarrior group and select the appropriate launch configuration In the Connection panel click Edit next to the Connection drop down list The Properties for lt connection gt dialog box appears Click Edit next to the Target drop down list The Properties for lt Target gt dialog box appears On the Memory tab clear the che
520. test e Arbitrary TAP state move test e Reading JTAG IDCODEs test 5 4 1 Power at probe test This test checks if the PWR pin is correctly connected If not an error message Error No target power detected is displayed 5 4 2 IR scan test The IR scan test uses the TCK and TMS pins to move the target into the Shift IR state and then sends a long test pattern through the IR by holding TMS 0 clocking TCK and feeding the test pattern bits in the TDI pin It captures the bits coming out on the TDO pin If the connection is working correctly the TDI bits pass through the IR shift register instruction register and eventually show up on the TDO pin The test compares the TDO data it captures against the TDI test pattern it sent to see if TDO contains the test pattern It expects to find the test pattern in the TDO but bit shifted to the left by some number of bits corresponding to the IR length If it fails to find the test pattern then the test reports an error Error testing IR scan CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 152 Freescale Semiconductor Inc eS AAA Chapter 5 Working with Debugger If the test fails to measure the length of the instruction register then an error Error measuring IR length is thrown The error might be due to one or more of the following reasons e TRST stuck low This may hold the target JTAG logic in reset preventing any shifts
521. th the current thread context Syntax mc ki111 Examples mc k111 Terminates multiple cores mc reset mc reset Resets multiple cores Syntax mc reset mc restart mc restart Restarts the debug session for selected cores associated with the current thread context Syntax mc restart Examples mc restart Restarts multiple cores mc stop mc stop Stops the selected cores associated with the current thread context Syntax mc stop Examples mc stop Suspends multiple cores mc type mc t Shows the system types available for multicore debugging as well as type indices for use by the mc type remove and mc group new commands Syntax type type import lt filename gt type remove lt filename gt lt type index gt type removeall Examples mc type Display or edit system types mc type import 8572 jtag txt Creates a new type from the JTAG configuration file CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 237 rl Multi Core Debugging Commands Table 6 2 Multi Core Debugging Commands a Y en mc type remove 8572 jtag txt Removes the type imported from the specified file mc type removeall Removes all imported types CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 238 Freescale Semiconductor
522. the Address textbox Value is added to the start address of the file to be programmed or verified Click the Add Checksum Action button Click Done The Add Checksum Action dialog closes and the added checksum actions appear in the Flash Programmer Actions table in the Flash Programmer Task editor window 11 1 2 3 4 Diagnostics actions The diagnostics action generates the diagnostic information for a selected flash device NOTE Flash Programmer will report bad blocks if they are present in the NAND flash To add a diagnostics action L Choose Diagnostics from the Add Action pop up menu The Add Diagnostics Action dialog appears 2 Select a device to perform the diagnostics action 3 Click the Add Diagnostics Action button to add diagnostic action on the selected flash device CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 411 OR A 2 22 lt 2 lt 2 lt lt gt gt gt gt gt gt 2 22 Flash programmer NOTE Select the Perform Full Diagnostics checkbox to perform full diagnostics on a flash device 4 Click Done The Add Diagnostics Action dialog closes and the added diagnostics action appears in the Flash Programmer Actions table in the Flash Programmer Task editor window 11 1 2 3 5 Dump Flash actions The dump flash action allows you to dump selected sectors of a flash device or the entire flash devi
523. the Registers view 5 10 5 Working with TLB Registers This section explains how to work with translation look aside buffer TLB registers TLB registers can be classified into the following three categories e TLBO A 256 entry 2 way e500v1 or 512 entry 4 way e500v2 e500mc e5500 or 1024 entry 8 way e6500 set associative unified for instruction and data accesses array supporting only 4 KB pages CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 182 Freescale Semiconductor Inc E7 Chapter 5 Working with Debugger e TLB1 A 16 entry e500v1 e500v2 or 64 entry e500mc e5500 e6500 fully associative unified for instruction and data accesses array supporting a range of variable sized pages VSP page sizes e Real Address Translation LRAT An 8 element fully associative array LRAT registers are available only for e6500 core In this section e Viewing TLB Registers in Registers View e Reading TLB Registers from Debugger Shell e Initializing TLB Registers e TLB Register Details 5 10 5 1 Viewing TLB Registers in Registers View This section explains how to find TLB registers using the Registers view To view TLB registers in the Registers view follow these steps 1 Start the CodeWarrior IDE 2 Open or create a project that targets the Power Architecture system you want to debug 3 From the CodeWarrior IDE menu bar select Run gt Debug T
524. tialize target script column Click OK The Properties window closes On the Main tab in the System panel list ensure that esoomc o is selected Run the launch configuration Click Finish NOTE You can attach to all 8 cores but for this example you will just select the first core In the beginning the hypervisor runs from address oxo and uses this translation v 0x00100000 p 0x00000000 oxoo100000 in its TLB1 MMU 6 Open the Debugger Shell and set a hardware breakpoint at the entry point _start function from 1ibos 1ib head s by issuing this command bp hw 0x0 or bp hw libos_client_entry CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 361 EI S Debugging the P4080 Embedded Hypervisor 7 Find the address of this entry point by using the elf dump file powerpc linux gnu objdump D hv gt hv objdump 8 Open the generated dump and search for start address for example 0x100000 NOTE You use the objdump utility here because nead s is not present in the nv e1 file To set a hardware breakpoint you can also expand the nv e1 file open the required file if present and set a hardware breakpoint directly at the desired function for example the 1ibos_client_entry Or any other function 9 Boot the hypervisor at the U Boot prompt The debugger stops at the specified hardware breakpoint see the figure below You ca
525. tinues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 115 Using Debug Configurations Dialog Box Table 4 9 System Call Services Page Options continued potions Deseription Root folder The directory on the host system which contains the OS routines that the bareboard program uses for system calls 4 1 3 6 Other Executables Use this page to specify additional ELF files to download or debug in addition to the main executable file associated with the launch configuration Debugger options Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness Specify other executable files to debug while debugging this target File 5 Figure 4 9 Debugger Options Other Executables Page The table below lists the various options available on the Other Executables page Table 4 10 Debugger Options Other Executables AA File list Shows files and projects that the debugger uses during each debug session Table continues on the next page Debug column CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 116 Freescale Semiconductor Inc Chapter 4 Debug Configurations Table 4 10 Debugger Options Other Executables continued A A AAA e Checked The debugger loads symbolics fo
526. tion Files 397 Memory tab 156 Memory Tests 422 Memory test use cases 426 Memory translations 158 Messages 65 Miscellaneous 90 96 Modifications to avoid errors from GCC LD tool 438 Modifying a DTS file 330 Modifying and Building the HyperTRK Manually 348 Modifying Signal Policy 248 Multi Core Commands in Code Warrior IDE 234 Multi Core Commands in Debugger Shell 236 Multi Core Debugging 227 Multi Core Debugging Commands 234 O Obtaining a DTS File 326 Optimization 75 94 ORmem 385 OS Awareness 719 Other Executables 716 Output 69 P PIC 113 Points to remember 288 Power at probe test 752 PowerPC Assembler 79 97 PowerPC Compiler 71 91 PowerPC CPU 63 PowerPC Disassembler 87 99 PowerPC Embedded Application Binary Interface 21 CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Freescale Semiconductor Inc 455 Index PowerPC Environment 9 PowerPC Linker 65 88 PowerPC Preprocessor 83 98 PowerQUICC III processors 443 PowerQUICC II processors 441 PowerQUICC II Pro processors 442 Preparing Connection to P4080DS Target 348 Preparing U Boot for debugging 272 Preprocessor 71 92 Preprocessor Settings 83 98 Prerequisites 350 Prerequisites for Debugging a Guest Application 346 Processor 75 Processor Page 3 40 216 Processor Specific Cache Features 21 Program Verify actions 409 Programming file 4 7 Project files 27 Protect Unprotect actions 4 2
527. tion from the Toolchain group The selected toolchain sets up the default compiler linker and libraries used to build the new project 13 Select None from the Target OS list 14 Click Next The Debug Target Settings page appears 15 From the Debugger Connection Types list select the required connection type 16 Specify the settings such as board launch configuration connection type and TAP address if you are using Code Warrior TAP over Ethernet Ethernet TAP or Gigabit TAP 17 Click Next The Configurations page appears 18 From the Core index list select Core 0 19 Click Finish The wizard creates a CodeWarrior project to debug the U Boot image You can access the project from the Code Warrior Projects view on the workbench 7 5 5 Specify launch configuration settings Now you need to specify the settings for the newly created Attach launch configuration in the Debug Configuration dialog box To specify launch configuration settings follow these steps 1 Select Run gt Debug Configurations CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 276 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software 2 On the Main tab if you have an already existing system for the attach configuration select it from the Connection drop down list else create a new one by following the steps given below a b ao Aw m D IQ
528. tional command line environments is how the software in this case the CodeWarrior IDE helps you manage your work more effectively The following sections explain the CodeWarrior IDE and describe how to perform basic CodeWarrior IDE operations e Project files e Code editing e Compiling CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 26 Freescale Semiconductor Inc SSS Chapter 1 Introduction e Linking e Debugging 1 6 1 Project files A Code Warrior project is analogous to a set of make files because a project can have multiple settings that are applied when building the program For example you can have one project that has both a debug version and a release version of your program You can build one or the other or both as you wish The different settings used to launch your program within a single project are called launch configurations The Code Warrior IDE uses the Code Warrior Projects view to list all the files in a project A project includes files such as source code files and libraries You can add or remove files easily You can assign files to one or more different build configurations within the project so files common to multiple build configurations can be managed simply The Code Warrior IDE itself manages all the interdependencies between files and tracks which files have changed since the last build The Code Warrior IDE also stores the settings f
529. tions The Debug Configurations dialog box appears 2 In the Connection group click Edit next to the Connection drop down list The Properties for lt connection launch configuration gt window appears 3 Select TCF from the Connection type drop down list The Connection and Advanced tabs display the options with respect to the settings of the selected connection type The table below describes various options available on the Connection tab page Table 5 11 TCF Connection Tab Options potion eriptton Connection Hostname IP Specifies hostname or IP address of the host TCF agent runs on 127 0 0 1 is used if the agent runs locally Port Specifies the TCP port the agent is listening on Enable Logging Select to enable logging of all ongoing TCF traffic in the Console view Connection timeout Specifies connection timeout in seconds Agent Start Agent Select to start the agent and specify the run time properties Path to executable Specifies the path to the TCF agent executable file Arguments to pass Specifies all the command line arguments to be passed to the TCF agent while starting up Redirect stdout Select to have the standard output and standard error output redirected to the Console view in CodeWarrior IDE The table below describes the various options available on the Advanced tab page Table 5 12 TCF Advanced Tab Options E AMES ae Target connection lost settings Try t
530. to reconnect If this option is selected the lost CCS connection between the target and host is reset Select the Timeout checkbox to specify the time interval in seconds after which the connection will be lost Terminate the debug session If this option is selected the debug session is terminated and the lost connection between JTAG and CCS server is not reset Ask me This is the default setting If the CCS connection is lost between the target and host the user is asked if the connection needs to be reset or terminated Advanced CCS settings CCS timeout Specifies the CCS timeout period If the target Enable logging does not respond in the provided time interval you receive a CCS timeout error Select to display protocol logging in console JTAG config file This panel displays the JTAG configuration file being used This panel is populated only if you have select a JTAG configuration file for your project If a JTAG configuration file is not selected this panel displays a None value For more details on JTAG configuration files see the JTAG Configuration Files chapter Advanced TAP settings Force shell download Select to force a reload of the TAP shell software Disable fast download Enable JTAG diagnostics Select to disable fast download NOTE This option is not available for processors based on e500mc e5500 and e6500 cores When selected the option enables perfor
531. to the folder containing DTS files CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 329 sl Debugging the Linux Kernel NOTE The location of the DTS file might differ based on the BSP version being used For the correct location of the file see the SDK User Manual in iso help documents paf 3 Compile the ats device tree source file for the board cd arch powerpc boot dts dtc I dts O dtb V 0x10 b 0 lt target gt dts gt lt target gt dtb 7 7 6 4 4 Testing a DTB File To test the DTB file outside of the CodeWarrior IDE 1 Load the ulmage rootfs ext2 gz uboot and lt target gt dtb file onto the board 2 Boot the board and verify that Linux comes up fine bootm lt kerneladdress gt lt ramdiskaddress gt lt dtbaddress gt NOTE The target board must have U Boot present in the flash at the reset address so that U Boot can run and set board configurations 7 7 6 4 5 Modifying a DTS file If using a BSP version not supported by CodeWarrior DTS file or a custom board 1 Obtain a DTS file NOTE The location of the DTS file might differ based on the BSP version being used For the correct location of the file see the SDK User Manual in iso help documents paf 2 Modify this DTS file with the information provided by U Boot To do this e Check the proc device tree directory for the required information after kernel bo
532. tory information about the selected bit field and parent register 4 In the Bit Fields group click the bit field that you want to change Alternatively use the Field list box to specify the bit field that you want to change 5 In the text box type the new value that you want to assign to the bit field 6 In the Action group click Write The debugger updates the bit field value The bit values in the Value column and the Bit Fields group change to reflect your modification NOTE Click Revert to discard your changes and restore the original bit field value 5 10 2 3 Actions CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 177 Working with Registers Use the Actions group of the Registers view see the figure below to perform various operations on the selected register s bit field values Actions comal v Figure 5 15 Register View Actions Group The table below lists each item in the Actions group and explains the purpose of each Table 5 22 Actions Group Items PI scriptic O S Revert Discard your changes to the current bit field value and restore the original value The debugger disables this button if you have not made any changes to the bit field value Write Save your changes to the current bit field value and write those changes into the register s bit field The debugger disables this button after writing the n
533. tration The examples in these sections will need to be adapted based on the BSP versions or build tools you are currently using To install a BSP perform the following steps 1 On the Linux computer download the Board Support Package BSP for your target hardware to install kernel files and Linux compiler toolchains on your system Board Support Package image files for target boards are located at http www freescale com linux 2 Download the BSP image file for your target board NOTE You will need to log in or register to download the BSP image file The downloaded image file has an iso extension For example QorIQ DPAA SDK lt yyyymmdd gt yocto iso 3 Mount the image file to the CDROM as root or using sudo lt sudo gt mount o loop QorIQ DPAA SDK lt yyyymmdd gt yocto iso mnt cdrom NOTE sudo 18 a Linux utility that allows users to run applications as root You need to be setup to run sudo commands by your system administrator to mount the BSP image files 4 Execute the BSP install file to install the build tool files to a directory of your choice where you have privileges to write files mnt cdrom install CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 313 el Debugging the Linux Kernel NOTE The BSP must be installed as a non root user otherwise the install will exit 5 Answer the questions from t
534. ture Processors Targeting Manual Rev 10 5 0 06 2015 174 Freescale Semiconductor Inc AAA B D yy Chapter 5 Working with Debugger The details of the selected register get displayed NOTE Use the Format list box to change the format of data displayed for the selected register 6 Examine register details For example e Use the Bit Fields group to see a graphical representation of the selected register s bit fields You can use this graphical representation to select specific bits or bit fields e Use the Actions group to perform operations such as update bit field values and format the displayed register data e Use the Description group to see an explanation of the selected register bit field or bit value Tip To enlarge the Registers view click Maximize on the view s toolbar After you finish looking at the register details click Restore on the view s toolbar to return the view to its previous size Alternatively right click the Registers tab and select Detached The Registers view becomes a floating window that you can resize After you finish looking at the register details right click the Registers tab of the floating window and select Detached again You can rearrange the re attached view by dragging its tab to a different collection of view tabs In this section e Bit Fields e Changing Bit Fields e Actions e Description 5 10 2 1 Bit Fields The Bit Fields group of the Registers view see the figure b
535. ually exists The address test uses a simplistic technique to detect memory aliasing The test writes sequentially increasing data values starting at one and increasing by one to each successive memory location The maximum data value is a prime number and its specific value depends on the addressing mode so as to not overflow the memory location The test uses a prime number of elements to avoid coinciding with binary math boundaries e For byte mode the maximum prime number is 28 5 or 251 e For word mode the maximum prime number is 216 15 or 65521 e For long word mode the maximum prime number is 232 5 or 4294967291 If the test reaches the maximum value the value rolls over to 1 and starts incrementing again This sequential pattern repeats throughout the memory under test Then the test reads back the resulting memory and verifies 1t against the written patterns Any deviation from the written order could indicate a memory aliasing condition 11 3 2 4 3 Bus noise This test stresses the memory system by causing many bits to flip from one memory access to the next both addresses and data values Bus noise occurs when many bits change consecutively from one memory access to another This condition can occur on both address and data lines CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 424 Freescale Semiconductor Inc SSS _ y Chapter 11 Working with
536. udio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 242 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software This command configures the serial port for raw mode of operation If you do not use raw mode special characters sent as part of packets may be interpreted dropped causing the connection to break Enter this command stty F dev ttyS1 ispeed 115200 The serial input speed is set to 115200 baud Enter this command stty F dev ttyS1 ospeed 115200 The serial output speed is set to 115200 baud Enter this command stty F dev ttyS1 crtscts The terminal emulation program enables handshake mode Enter this command stty a F dev ttys1 The system displays the current device settings 8 Enter the command AappTRK elf dev ttys1 Code Warrior TRK launches on the remote target system 7 1 3 Create a CodeWarrior Download Launch Configuration for the Linux Application This section explains how to create a CodeWarrior download launch configuration for debugging a Linux application on target system To create a Code Warrior download launch configuration perform the following steps L De In the CodeWarrior Projects view of the C C perspective select the name of the project that builds the Linux application Select Run gt Debug Configurations The Debug Configurations dialog box appears Select CodeWarrior on the left hand side of the Deb
537. ug Configurations dialog box Click the New launch configuration toolbar button of the Debug Configurations dialog box The IDE creates a new launch configuration under the CodeWarrior group The settings pages for this new launch configuration appear on the right hand side of the Debug Configurations dialog box CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 243 AAA E E Debugging a Linux Application 5 In the Main tab of the Debug Configuration dialog box a Select Download from the Debug session type group b Click New next to the Connection drop down list The New Connection wizard appears 6 Expand the CodeWarrior Application Debugging group and select Linux AppTRK as shown in the figure below New Connection Select Remote System Type Connection configuration for 4 Linux target running the AppTRK debug agent System type type filter text S CodeWarrior Application Debugging de Linux AppTRK gt CodeWarrior Bareboard Debugging Figure 7 1 Remote System New Connection Wizard 7 Click Next The Linux AppTRK page appears 8 Specify the connection name description template and connection type on this page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 244 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux
538. ug session after changing the PIC address you need to disable and enable back those breakpoints after the PIC value has been changed 7 6 4 2 4 Debugging U Boot in RAM This section tells how to debug U Boot in RAM using a NOR flash device To debug U Boot in RAM 1 In the Debugger Shell view issue the following command to reset PIC load address to RAM space setpicloadaddr Oxxxxx0000 NOTE The address printed by U Boot at line Now running in ram is Oxxxxx0000 You can also see this address in the Disassembly view and observe the current address space you are in CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 294 Freescale Semiconductor Inc EE ey Chapter 7 Debugging Embedded Linux Software 2 From the Debug view toolbar select the Instruction Stepping Mode 1 command 3 From the Debug view toolbar select the Step Into command to step into vir m mr r3 r9 Init Data pointer r4 ri0 Destination Address board init r Copy exception v r3 dest addr 7 source address r8 end address r9 target address Figure 7 25 U Boot Debug Running in RAM 4 Deselect the Instruction Stepping Mode command when the instruction pointer is at in_ram You can now do source level debugging and set breakpoints in all RAM area including board_init_r See Points to remember for more details NOTE Before closing the debug session change back the
539. ugger handles both watchpoints and breakpoints in similar manners You can use the Breakpoints view to manage both watchpoints and breakpoints It means you can use the Breakpoints view to add remove enable and disable both watchpoints and breakpoints The debugger attempts to set the watchpoint if a session is in progress based on the active debugging context the active context is the selected project in the Debug view If the debugger sets the watchpoint when no debugging session is in progress or when re starting a debugging session the debugger attempts to set the watchpoint at startup as it does for breakpoints The Problems view displays error messages when the debugger fails to set a watchpoint For example if you set watchpoints on overlapping memory ranges or if a watchpoint falls out of execution scope an error message appears in the Problems view You can use this view to see additional information about the error The following sections explain how to set or remove watchpoints e Setting Watchpoints e Removing Watchpoints 5 9 1 Setting Watchpoints CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 169 Ee Working with Watchpoints Use the Add Watchpoint dialog box to create a watchpoint for a memory range You can specify these parameters for a watchpoint e An address including memory space e An expression that evaluates to a
540. uide Multicore Resume Table 6 1 Multi Core Debugging Commands ad Y Y en ow Starts all cores of a multi core system running simultaneously Multicore Suspend e Stops execution of all cores of a multi core system simultaneously Multicore Restart in Restarts all the debug sessions for all cores of a multi core system De simultaneously Multicore Terminate de Kills all the debug sessions for all cores of a multi core system simultaneously Multicore Groups ml Use All Cores If the selected debug context is a multi core system then all cores are used for multi core operations Disable Halt Groups Disables breakpoint halt groups For more information on halt groups see Multicore Breakpoint Halt Groups in CodeWarrior Development Studio Common Features Guide Limit new breakpoints to current group If selected all new breakpoints set during a debug session are reproduced only on cores belonging to the group of the core on which the breakpoint is set Edit Target Types Opens Target Types dialog box that lets you add and remove system types Edit Multicore Groups Opens the Multicore Groups dialog box to create multi core groups You can also use this option to modify the existing multi core groups NOTE For more information about creating modifying multi core groups or editing target type see Multicore Groups in CodeWarrior Development Studio Common Features Guide To use the multi core comman
541. uld set the correct PIC value to see the source correspondence by issuing the setpicloadaddr oxo command in the Debugger Shell view Before setting a breakpoint for the stage after MMU initialization for example breakpoint at start_kerne1 the correct PIC should be set by issuing the setpicloadaddr reset Command in the Debugger Shell view This is required to ensure that the new breakpoint is set with the correct PIC for the stage after MMU initialization The user can set breakpoints and run step to navigate before MMU initialization The correct PIC should be set by issuing the setpicloadaddr reset command in the Debugger Shell view before the debuggers enters the next stage c Debugging the Kernel after the MMU is enabled After the MMU is initialized the PIC value must be reset y issuing the setpicloadaddr reset Command in the Debugger Shell view During the Linux Kernel booting you can debug this stage directly if no breakpoint has been set for the stage before MMU initialization Alternatively you can also debug this stage after run or step from the stage before initialization NOTE In case of SMP all the secondary cores are targeted and displayed in the Debug view 13 When finished you can either a Kill the process by selecting Run gt Terminate CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 339 Ea Debugging Loadable
542. unch Configurations Setting a launch configuration allows you to specify all core specific initializations To set up the launch configurations follow these steps 1 Open the CodeWarrior project you want to debug 2 Switch to the Debug perspective 3 Select Run gt Debug Configurations The Debug Configurations dialog box appears shown in the figure below with a list of debug configurations that apply to the current application 4 Expand the CodeWarrior tree control 5 From the expanded list select the debug configuration for which you want to modify the debugger settings For example boara_project core00_RAM_B4860_Download rr gt Debug Configurations Create manage and run configurations Debug or run an application to a target SB x El gt s Name board_project core00_RAM_B4860_Download type filter text E Main 6 Arguments 5 Debugger Trace and Profile Source PB Environment Common a E CodeWarrior Debug session type E E board_project core00_RAM_B4860_Download Choose a predefined debug session type or custom type for maximum flexibility E board_project core01_RAM_B4860_Download Download Connect E board_project core02_RAM_B4860_Download Attach Cant E board_project core03_RAM_B4860_Download E board_project core04_RAM_B4860_Download C C application E board_project core05_RAM_B4860_Download Project board_project core00 Browse gt Launch Group its Target C
543. unch configuration created earlier to debug the Linux application on the target system To debug the Linux application perform the following steps 1 On the left hand side of the Debug Configurations dialog box ensure to select the CodeWarrior download launch configuration that you created to debug the Linux application 2 Click Debug in the Debug Configurations dialog box The IDE uses the selected CodeWarrior download launch configuration to start a debug session and opens the Debug view as shown in the figure below S Debug 23 oD i gt 30 311 gr A El E AppDbg Application Debug Debug CodeWarrior Download E 2 CodeWarrior Debugger for EPPC Linux Applications 4 17 08 2 43 PM Suspended EP Thread ID 0x0 Suspended Signal Halt received Description User halted thread 4main D Profiles b 14446 WKS AppDbg Source main c 6 0x 10000554 3 OXOFEBO1C4 OXOFEBO1C4 0 Ox0feb0ic4 2 0x0FEBO348 0x0FEB0348 0 OxOfeb0348 1 0x00000000 0x00000000 0 0x00000000 pe D Profiles b 14446 WKS AppDbg Application Release AppDbg 4 17 08 2 43 PM Figure 7 7 Debug View A Sample Linux Application CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 250 Freescale Semiconductor Inc E A AAA AAA AAA Chapter 7 Debugging Embedded Linux Software You just finished using the Code Warrior download launch configuration to debug a Linux application 7 2 Viewing multiple
544. ure Processors Targeting Manual Rev 10 5 0 06 2015 342 Freescale Semiconductor Inc AAA eee Chapter 7 Debugging Embedded Linux Software Table 7 8 Kernel Project Download Launch Configuration Settings continued e Click Finish e Select all the cores on which Linux is running for example core 0 for single core or cores 0 7 for 8 core SMP Debugger Tab gt Debugger options gt Select the Cache Symbolics between sessions checkbox The Symbolics Tab symbolics are loaded from the elf file to the debugger for the first session only This shows a speed improvement for vmlinux elf as the size is bigger than around 100 MB Debugger Tab gt Debugger options gt OS Select Linux from the Target OS drop down list Awareness Tab Debugger Tab gt Debugger options gt OS Select the Enable Initial RAM Disk Settings checkbox Awareness Tab gt Boot Parameters Tab e File Path Path of the RAM disk that you transferred from the Linux machine Address The address specified in Linux initrd start from the dts file Select the Download to target checkbox Select the Open Firmware Device Tree Settings checkbox e File Path Path to the lt target gt dtb file e Address 0x00600000 Debugger Tab gt Debugger options gt OS e Select the Enable Memory Translation checkbox Awareness Tab gt Debug Tab Physical Base Address is set to value CONFIG_KERNEL_START 0x0 Virtual Base Address is set to value CONFIG_KERNEL_START
545. ure Processors Targeting Manual Rev 10 5 0 06 2015 390 Freescale Semiconductor Inc Chapter 9 Target Initialization Files writemmr MPTPR 0x3200 9 2 1 16 writereg Writes the supplied data to the specified register Syntax writereg regName value Parameters regName The name of the register to which to assign the supplied value value The value to write to the specified register This value may be specified in hexadecimal for example oxrrrrascp octal for example 037777725715 or decimal for example 4294945741 Example This command writes the value oxo0001002 to the msr register writereg MSR 0x00001002 9 2 1 17 writereg64 Writes the supplied 32 bit values to the specified 64 bit register NOTE This command is applicable only to 64 bit Book E cores like the e5500 Syntax writereg regName valuel value2 Arguments regName The name of the 64 bit register to which to assign the supplied value CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 391 Target initialization commands valuel value2 The two 32 bit values that together make up the 64 bit value to assign to the specified register Each value may be specified in hexadecimal for example OXFFFFABCD octal for example 037777725715 or decimal for example 4294945741 Example This command writes the 64 bit value 0x0123456789ABCDEF to the 64
546. ures Guide The table below lists the equivalent Debugger Shell commands that you can include in a TCL script for target initialization Table 9 3 tcl target initialization commands Target initialization commands Debugger Shell equivalent writereg writereg64 writeregl28 reg or change writereg192 writespr reg or change partial equivalence uses the register name instead of the spr number writemem 1 mem 32bit or change 32bit writemem w mem 16bit or change 16bit writemem b mem 8bit or change 8bit sleep wait writemmr reg or change IncOrmmr change regName format x expr reg regName sd np expr mask Of reg regName format x expr reg regName d np expr mask ANDmmr change regName format x expr reg regName d np amp expr mask Orreg regName format x expr reg regName d np expr mask setCorelD eppc setcoreid resetCorelD eppc setcoreid default run go stop stop reset reset ANDmem 1 change address format x expr mem address d np expr mask ormem address format x expr mem address d np expr mask Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 395 Target initialization commands Table 9 3 tcl target initialization commands continue
547. user s code as an offset from the EEPROM starting address In the 24 bit addressing mode the 8 most significant bits of the source address should be written to as zero because the EEPROM is accessed with a 3 byte 24 bit address In 16 bit addressing mode the 16 most significant bits of the source address should be written as zero 0x54 0x57 Reserved Table continues on the next page CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 282 Freescale Semiconductor Inc Chapter 7 Debugging Embedded Linux Software Table 7 5 eSPI SD EEPROM Data Structure Details continued 0x58 0x5B Target Address Contains the target address in the system s local memory address space in which the user s code is copied This is a 32 bit effective address The core is configured in such a way that the 36 bit real address is equal to the target address with 4 most significant bits zero Ox5C 0x5F Reserved 0x60 0x63 Execution Starting Address Contains the jump address of the system s local memory address space into which the user s code first instruction is executed This is a 32 bit effective address The core is configured in such a way that the 36 bit real address is equal to this with 4 most significant bits zero 0x64 0x67 Reserved 0x68 0x6B N Number of Config Address Data pairs This address must be lt 1024 but it is recommended to keep
548. utes the current statement and halts at the next statement Set the breakpoint on the appropriate function You can inspect the variables view the Disassembly or perform any other debug capability as required NOTE The Linux kernel and user space stack frames are not simultaneously supported for a thread In a system call the kernel stack is displayed corresponding to the kernel function system call called from the application 7 11 1 Attaching Core to the Debug Application In this section we will take an example to attach the target to an already executed debugging application 1 2 Click Suspend from the debug view to suspend the debug session or Multicore Suspend if a multicore target is used Select Window gt Show View gt Other The Show View dialog box appears From the Debug group select System Browser Click OK The System Browser window appears Select and double click on the particular thread to attach it to the target CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 369 PA AAA AAA User Space Debugging with On Chip Debug NOTE If the application stack does not appear in the Debug view go to System Browser view and attach the application 7 11 2 Debugging the Application from the main Function In this section we will describe the steps to debug the application from the beginning of the pro
549. ux Software Click File System The Open dialog box appears Navigate to the location of the exec 1 e1 file in your project directory Select the exec 1 e1 file name Click Open The host side location of exec 1 e1 appears in the Additional Executable File text box Select the Load Symbols checkbox Select the Download to Device checkbox The Specify the remote download path field is activated 0 aO 0 NOTE If you do not want to download the selected file on the target platform do not select the Download to Device checkbox i Type tmp in the Remote download path text box The shared library will be downloaded to this location when you debug or run the executable file j Click OK The settings are saved Click Apply to save the settings made to the launch configuration Set breakpoints in the child and parent processes a Double click the fork c file name in the Code Warrior Projects view b Set a breakpoint in the code of the child process at this line x 0 c Set a breakpoint in the code of the parent process d Close the fork c file Select Run gt Debug The debugger window appears and the rork project starts debugging As a result the Fork elf and 1ibfork2clone a files are downloaded on the target system Step over the code until you reach the line of code that calls the forko system call pid fork When the forko system call is called the child process debugger window appears You can n
550. w on the Workbench The new CodeWarrior Linux application project is ready for use You can now customize the project to match your requirements CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 53 Building projects 2 4 Building projects CodeWarrior IDE supports two modes of building projects manual build mode and auto build mode 2 4 1 Manual Build mode In large workspaces building the entire workspace can take a long time if users make changes with a significant impact on dependent projects Often there are only a few projects that really matter to a user at a given time To build only the selected projects and any prerequisite projects that need to be built to correctly build the selected projects select Project gt Build Project from the CodeWarrior IDE menu bar Close Project K Build all Ctrl B Build Configurations Build Working Set Clean Build Automatically Make Target gt Generate Makefiles Ctrl 6 Properties Figure 2 11 Project Menu Build Project Alternatively right click on the selected project in the CodeWarrior Projects view and select Build Project from the context menu To build all projects available in the CodeWarrior Projects view select Project gt Build All CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 54 Freescale Sem
551. w trace data automatically For more information on Trace see the Tracing and Analysis Tools User Guide available in the lt cwinstal1pir gt PA Help PDF folder where cwinstalipir is the installation directory of your CodeWarrior software 4 1 5 Source Use this tab to specify the location of source files used when debugging a C application By default this information is taken from the build path of your project CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 123 Using Debug Configurations Dialog Box E Main 69 Arguments Debugger Trace and Profile ly Source Source Lookup Path PG Environment ES Common Et Z Path Mapping cygdrive H E Default Restore Default C Search for duplicate source files on the path Figure 4 13 Debug Configurations Source tab The table below lists the various options available on the Source tab page Table 4 14 Source Tab Options potion o eseription E Source Lookup Path Lists the source paths used to load an image after connecting the debugger to the target Add Click to add new source containers to the Source Lookup Path search list Edit Click to modify the content of the selected source container Remove Click to remove selected items from the Source Lookup Path list Up Click to move selected items up the Source Lookup Path list Down Cl
552. x application is running on the target board using the file transfer protocol like FTP TFTP or SCP If you use NFS copy the application on the NFS server location of the RAM disk Click Debug The debugged application processes will be presented as kernel tasks with the respective PID If a core is terminated while running inside the application the corresponding thread will appear in the System Browser view Select Window gt Show View gt Other The Show View dialog box appears From the Debug group select System Browser Click OK The System Browser window appears with the process and thread information Locate the particular thread among the other threads and double click on it to debug the selected thread You can also right click the thread and select the Debug option CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 368 Freescale Semiconductor Inc 12 13 14 15 Chapter 7 Debugging Embedded Linux Software The selected thread appears in the Debug perspective for the current core NOTE On multi core systems the application can be found on any core and if it creates multiple threads processes each has a separate entry in System Browser view Click on the thread in the Debug view the program counter icon on the marker bar points to the next statement to be executed In the Debug view click Step Into The debugger exec
553. y default Refresh while running period seconds 2 0 Figure 4 3 Debug Configurations Debugger Tab The table below lists the various options available on the Arguments tab page Table 4 4 Debugger tab options Oeton scription O O Debugger Options Displays configuration options specific to the selected debugger type See the following sections for more details Debug e EPPC Exceptions CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 107 Using Debug Configurations Dialog Box Table 4 4 Debugger tab options A AR OA Download PIC System Call Services Other Executables Symbolics OS Awareness 4 1 3 1 Debug Use this page to specify the program execution options Breakpoint and watchpoint options and target access behavior Debugger options Debug EPPC Exceptions Download PIC System Call Services Other Executables Symbolics OS Awareness Program execution Initialize program counter at Program entry point O User specified Resume program Stop on startup at O Program entry point User specified main E Stop on exit Breakpoints and watchpoints C Install regular breakpoints as Restore watchpoints Data access Disable display of variable values by default C Disable display of register values by default Refresh while running peri
554. y li A 0 Variables 3 bro o Breakpoints J Cache ifs Registers mA Modules oir Value 0x00ab4000 559038737 3735928559 it D mo a Name ATA EE mv 5 sis 6 i gt 09 proc_id a E board_project core00_RAM_B4860_Download CodeWarrior a Q EPPC board_project core00 elf core 0 Suspended 4 a Thread ID 0x0 Suspended Signal Halt received Description User halted thread 2 mainO main c 14 00000000000100194 1 _start _start_e6500_32bit_crt0 c 264 0x00000000001000d0 pi C Users b34823 workspace board_project core00 RAM board_project core00 elf 8 8 13 4 19 PM a E board_project core01_RAM_B4860_Download CodeWarrior 4 amp EPPC board_project core01L elf core 1 Suspended m 4 o Thread ID 0x0 Suspended Signal Halt received Description User halted thread 2 main main c 14 0x0000000008100194 1_start _ start_e6500_32bit_crt0 c 264 0x00000000081000d0 pi C Users b34823 workspace board_project core01 RAM board_project core01 elf 8 8 13 4 30 PM sf board_project core02_RAM_B4860_Download CodeWarrior a 2 EPPC board_project core02 elf core 2 Suspended A main c 58 O E Disassembly 23 _G Outline Enter location here endif Z 14 gt 9000000000100194 000000000100198 000000000010019c 00000000001001a0 stwu rsp 48 rsp mflr re stw r0 52 rsp stw r31 44 rsp int main m Because the interrupt vector code shared e
555. y tests This test requires the user to set the access size and target address from the access settings group and the settings present in the Memory Tests group This topic contains the following sub topics e Creating hardware diagnostics task e Working with Hardware Diagnostic Action editor e Memory test use cases 11 3 1 Creating hardware diagnostics task You can create a hardware diagnostic task using the Create New Target Task wizard To create a task for hardware diagnostics 1 Choose Window gt Show View gt Other from the IDE menu bar The Show View dialog appears CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 418 Freescale Semiconductor Inc Go Nn Chapter 11 Working with Hardware Tools Expand the Debug group and select Target Tasks Click OK Click the Create a new Target Task button on the Target Tasks view toolbar Alternatively right click in the Target Tasks view and choose New Task from the shortcut menu The Create a New Target Task wizard appears Type name for the new task in the Task Name textbox Choose a launch configuration from the Run Configuration pop up menu NOTE If the task does not successfully launch the configuration that you specify the Execute button on the Target Tasks view toolbar stays unavailable Choose Hardware Diagnostic from the Task Type pop up menu Click Finish A new hardware diagnostic tas
556. you can step through the rest of the code CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 Freescale Semiconductor Inc 271 BR Preparing U Boot for debugging The Debug view shows the function calls to the ad _examp1e function shown in the figure below oD gt O Po EPPC Linux Applications SharedLib_IM elf PID 1000 Suspended E oP Th Thread ID 0 Suspended 6 add_example_local D Profiles b 14446 Uboot SharedLibrary Source LibExample c 28 OxOffdf 5 add_example D profiles b 14446 Uboot SharedLibrary Source LibExample c 20 Ox0ffdf4f0 4 main D Profiles b 14446 Uboot SharedLibrary Source SharedLib_IM c 30 0x 10001514 3 OxOFE8E1C4 OxOFE8E1C4 Q Ox0fe8eic4 2 OxOFE8E348 0x0FESE348 0 Ox0fe8e348 10x00000000 0x00000000 Q 0x00000000 p D Profiles b 14446 Uboot SharedLibrary SharedLib_IM SharedLib_IM elf 8 6 08 10 48 AM ith Figure 7 18 Debug View Shared Library Project 6 View the output of the program The rest of the code is executed and the output appears in the Variables view shown in the figure below E SharedLib_IM c 23 A GE Outine E Disassembly 00 Variables 7 126 b 20 A Name Value 28 ret temp a b a 10 29 b 20 30 ret add example a b Step In here 31 gt 33 return ret 36 7 nt temp int i int j lt sin i i gt Figure 7 19 Variables View Shared Library Proje
557. zard launches and the Create a CodeWarrior Bareboard Project page appears Specify a name for the new project in the Project name text box For example enter the project name as He11o_world If you do not want to create your project in the default workspace a Clear the Use default location checkbox b Click Browse and select the desired location from the Browse For Folder dialog box c In the Location text box append the location with the name of the directory in which you want to create your project In the Location text box append the location with the name of the directory in which you want to create your project NOTE An existing directory cannot be specified for the project location If created the CodeWarrior will prompt an error message Click Next The Processor page appears Select the target processor for the new project from the Processor list 9 Select Application from the Project Output group to create an application with e1 extension that includes information required to debug the project Click Next CodeWarrior Development Studio for Power Architecture Processors Targeting Manual Rev 10 5 0 06 2015 46 Freescale Semiconductor Inc 11 12 13 14 15 16 17 18 19 Chapter 2 Working with Projects The Debug Target Settings page appears Select a supported connection type hardware simulator or emulator from the Debugger Connection Types grou
558. zation Enter the specific command line parameters in the Command Line and Base Address text boxes Enable Initial RAM Disk Settings Check this option to specify settings for flattened device tree initialization that downloads parameters to the kernel during its initialization You can specify a dts file that contains initialization information e File Path Specifies the path of the RAM disk that you transferred from the Linux machine e Address Specifies the address specified in Linux initrd start from the dts file e Size Specifies the size of the dts file e Download to target Downloads the initial RAM disk settings to the target Open Firmware Device Tree Settings Check this option to load parameters to the kernel from a bootloader on Power Architecture processors e File Path Specifies the path to the dtb file for kernel debug e Address Specifies the address specified in Linux initrd start from the dts file Debug tab Specifies the parameters required for Linux kernel debug Enable Memory Translation Check this option to translate memory by specifying the following values e Physical Base Address This is the CONFIG_PHYSICAL_START option of the kernel configuration e Virtual Base Address This is the CONFIG_KERNEL_START option of the kernel configuration e Memory Size This is the CONFIG_LOWMEM_SIZE option of the kernel configuration Note The virtual memory space should not overflow the 32 bit memory space

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