TIP500 User Manual
Contents
1. 41 43 B3 18 S10 00 00 00 15 variable 0A board dependent board dependent board dependent board dependent board dependent board dependent board dependent board dependent Figure 2 ID PROM Contents TIP500 10 V1 0 TIP500 User Manual Version 1 2 TEWS DATENTECHNIK ADDRESS 01 03 05 07 09 OB OD OF 11 13 15 17 19 FUNCTION ASCII 49 ASCII P 50 ASCII A 41 ASCII C 43 Manufacturer ID B3 Model Number 18 Revision 10 RESERVED 00 Driver ID low byte 00 Driver ID high byte 00 number of bytes used 15 CRC variable Version 11 OB Offset Error at Gain 1 board dependent Offset Error at Gain 2 board dependent Offset Error at Gain 4 board dependent Offset Error at Gain 8 board dependent Gain Error at Gain 1 board dependent Gain Error at Gain 2 board dependent Gain Error at Gain 4 board dependent Gain Error at Gain 8 board dependent Not used 00 Figure 3 ID PROM Contents TIP500 11 V1 0 TIP500 User Manual Version 1 2 TEWS DATENTECHNIK ADDRESS FUNCTION 01 ASCII 49 03 ASCII P 50 05 ASCII A 41 07 ASCII C 43 09 Manufacturer ID B3 0B Model Number 18 0D Revision 10 OF RESERVED 00 11 Driver ID low byte 00 13 Driver ID high byte 00 15 number of bytes used 15 17 CRC variable 19 Version 20 12. TIP500 User Manual Version 1 2 26 TEWS DATENTECHNIK 7 IP I O connector 7 1 Analog Input Connections Mode Pin Number Single Ended Differential 01 ADC Input 1 ADC Input 1 02 ADC Input 9 ADC Input 1 03 AGND AGND 04 ADC Input 10 ADC Input 2 05 ADC Input 2 ADC Input 2 06 AGND AGND 07 ADC Input 3 ADC Input 3 08 ADC Input 11 ADC Input 3 09 AGND AGND 10 ADC Input 12 ADC Input 4 11 ADC Input 4 ADC Input 4 12 AGND AGND 13 ADC Input 5 ADC Input 5 14 ADC Input 13 ADC Input 5 15 AGND AGND 16 ADC Input 14 ADC Input 6 17 ADC Input 6 ADC Input 6 18 AGND AGND 19 ADC Input 7 ADC Input 7 20 ADC Input 15 ADC Input 7 21 AGND AGND 22 ADC Input 16 ADC Input 8 23 ADC Input 8 ADC Input 8 24 AGND AGND Figure 22 TIP500 Analog Input Connections TIP500 User Manual Version 1 2 27 TEWS DATENTECHNIK 7 2 Power Input Connections Pin Number Function 44 AGND 45 15V 46 AGND 47 15V 48 AGND 49 5V 50 AGND Figure 23 TIP500 Power Input Connections Note The power input connections are reserved for special versions of the TIP500 without on board DC DC converter TIP500 User Manual Version 1 2 28
3. nennen Figure 14 INTVEC Interrupt Vector Register Figure 15 Operating Modes 2a Figure 16 State Diagram Automatic Mode 2 000005 Figure 17 Flowchart Automatic Mode with Data Pipeline Figure 18 Flowchart Automatic Mode without Data Pipeline Figure 19 State Diagram Normal Mode aaa Figure 20 Flowchart Normal Mode with Data Pipeline Figure 21 Flowchart Normal Mode without Data Pipeline Figure 22 TIP500 Analog Input Connections Figure 23 TIP500 Power Input Connections 00 DO O MN DO m m m m m m m m m m m m uala OONDOITRWA Z AQD DD O N N QW N TIP500 User Manual Version 1 2 TEWS DATENTECHNIK 1 Product Description The TIP500 is an IndustryPack compatible module providing a galvanically isolated 16 channel multiplexed 12 bit ADC with on board DC DC converter Data acquisition and conversion time is mode dependent up to 10 us without channel gain change and up to 12 5 us with channel gain change The 16 input channels of the multiplexer can be configured by software to operate either in single ended mode or in differential mode with eight inputs The multiplexer of the ADC circuit is over voltage protected up to 70 Vp p A programmable gain amplifier allows gains of 1 2 5 10 TIP500 10 20 or 1 2 4 8 TIP500 11
4. Automatic Mode Normal Mode After the settling time A write access to the has expired conversion CONVERT register CONTREG Bit 8 1 N is started and the starts conversion N and result of conversion shifts the result of Pipline Mode N 1 is shifted into the conversion N 1 into the ADC Data Register ADC Data Register After the settling time A write access to the has expired conversion CONVERT register CONTREG Bit 8 Nis started and the starts conversion N and result of conversion N shifts the result of No Pipline Mode is shifted into the ADC conversion N into the Data Register ADC Data Register Figure 15 Operating Modes Note In Normal Mode the user should observe the settling time by the settle busy flag in the ADC Status Register TIP500 User Manual Version 1 2 20 TEWS DATENTECHNIK 6 2 Automatic Mode The Automatic Mode is enabled by setting bit 7 of the ADC Control Register CONTREG to 1 A write access to the ADC Control Register CONTREG with bit 7 set to 1 start a conversion for the programmed channel and gain after the settling time has expired In Pipeline Mode bit 8 of the ADC Control Register CONTREG set to 11 the result of the previous conversion is shifted into the ADC Data Register DATAREG during the actual con version If the Pipeline Mode is switched off the result of the actual conversion is shifted into the ADC Data Regi ster DATAREG 6 2 1 State Diagram Automatic Mode no c
5. N 1 is shifted into the ADC Data Register DATAREG during the conversion N Pipline Mode select Figure 9 CONTREG Pipeline Mode Control 5 1 1 5 ADC Interrupt Enable Bit 8 of the ADC Control Register CONTREG is used to enable interrupt generation of the module If this bit is set to 1 interrupts are always initiated whenever the settling time is over on IP_INTREQ1 and data conver sion has been completed on IP INTREQO If the module is in the automatic mode bit7 set to 1 only one interrupt at the end of data conversion on IP_INTREQO is being generated 10 9 8 r e Interrupt Enable Figure 10 CONTREG Interrupt Enable 5 1 2 ADC Data Register Address 02 The ADC Data Register DATAREG contains the converted data value The 12 bit ADC value is shifted in the higher bit s of the data register by hardware This allows direct processing of the data as a 16 bit two s comple ment integer value for the TIP500 10 11 and 16 bit straight binary for TIP500 20 21 15 14 8 12 1 0 9 8 7 6 5 4 3 2 1 0 16 bit ADC data Figure 11 ADC Data Register Figure 12 Data Register Description TIP500 User Manual Version 1 2 16 TEWS DATENTECHNIK DIGITAL OUTPUT DESCRIPTION binary two s straight binary complement TIP500 10 11 TIP500 20 21 Full Scale FS 1LSB Midscale One LSB Below Midscale Full Scale Note The contents of ADC Data Register DATAREG is not valid as l
6. Write access to ADC Start Convert Register starts conversion N and shifts result of conversion N 1 into the ADC Data Register Read bit1 of the ADC Status Register to check for end of conversion Note For conversions without channel and gain change it is not necessary to observe the settle busy flag of the ADC Status Register TIP500 User Manual Version 1 2 25 TEWS DATENTECHNIK 6 3 3 Normal Mode without Data Pipeline If Normal Mode without Pipeline is selected the result of the actual conversion is shifted into the ADC Data Regi ster DATAREG In this mode it is possible that the settling time and conversion time simultaneous proceed The acquisition and conversion time in this mode is 20us Write access to ADC Control Register select gain amp channel Read bit 0 of ADC Status Register to check for end of settling time Write access to ADC Start Convert Register starts conversion and shifts result of conversion into the ADC Data Register Select a new channel and a new gain during conversion proceeds by a write access to the ADC Control Register Read bit1 of the ADC Status Register to check for end of conversion Read result of the conversion from ADC Data Register read data of conversion Figure 21 Flowchart Normal Mode without Data Pipeline Note For conversions without channel and gain change it is not necessary to observe the settle busy flag of the ADC Status Register
7. eee eee eae 6 2 Automatic Mode 000 cece eee eee 6 2 1 State Diagram Automatic Mode 2 cece 6 2 2 Automatic Mode with Data Pipeline 6 2 3 Automatic Mode without Data Pipeline 6 3 Normal Mode 0c cece eee nennen nennen 6 3 1 State Diagram Normal Mode 0 0c aaa 6 3 2 Normal Mode with Data Pipeline a 6 3 3 Normal Mode without Data Pipeline 7 IP VO Connector NA Kab Dan D Eh LAAN 7 1 Analog Input Connections een nenn 7 2 Power Input Connections nennen een eee oon SA oa Qi TIP500 User Manual Version 1 2 TEWS DATENTECHNIK Figure 1 TIP500 Block Diagram a Figure 2 ID PROM Contents TIP500 10 V1 0 0005 Figure 3 ID PROM Contents TIP500 11 V1 0 0005 Figure 4 ID PROM Contents TIP500 20 V1 0 0005 Figure 5 ID PROM Contents TIP500 21 V1 0 000 Figure 6 CONTREG Input Channel Selection and Mode Figure 7 CONTREG Input Gain Selection aa Figure 8 CONTREG Automatic Settling Time Control Figure 9 CONTREG Pipeline Mode Control Figure 10 CONTREG Interrupt Enable 000005 Figure 11 ADC Data Register 000 cece eee eee Figure 12 Data Register Description aa Figure 13 ADC Status Register
8. mode is 30us select new Write access to the ADC Control Register gain amp channel Auto active starts automatically the conversion after the settling time has expired and shifts the result into the ADC Data Register Bit1 of the ADC Status Register indicates ADC busy during the whole cycle Read data of the actual conversion from the read data of conversion n ADC Data Register Figure 18 Flowchart Automatic Mode without Data Pipeline TIP500 User Manual Version 1 2 23 TEWS DATENTECHNIK 6 3 Normal Mode The Normal Mode is enabled by setting bit 7 of the ADC Control Register CONTREG to 0 A write access to the ADC Control Register CONTREG with bit 7 set to 0 Normal Mode enabled selects a new channel and gain for the next conversion As long as the settling time expires bit 0 of the ADC Status Register STATREG settle busy flag reads as 1 After the settling time has expired a conversion can be started by writing to the ADC Convert Start Register CONVERT To achieve higher conversion rates it is possible to select a new channel and gain for the next conversion after the previous conversion has been started In this mode the settling time for the new channel and the conversion time of the actual channel proceed simultaneously As long as bit 1 of the ADC Status Register STATREG ADC busy flag reads as 1 conversion is in progress Reading bit 1 of the ADC Status Register as O indicates that t
9. 21 The full scale input range is 10V for the TIP500 10 11 and OV to 10V for the TIP500 20 21 for a gain of 1 Each TIP500 is calibrated at the factory Calibration information is stored in the Identification PROM unique to each IP optocouplers annel i fh exer IndustryPack I O interface o O je v Pe 2 p o x o O oO gt ee per n o G Figure 1 TIP500 Block Diagram TIP500 User Manual Version 1 2 6 TEWS DATENTECHNIK 2 Technical Specification Logic Interface Size I O Interface Analog Inputs Input Isolation Input Gain Amplifier Input Voltage Range Input Over Voltage Input ADC Calibration Data Accuracy Linearity Wait States Power Requirements Temperature Range Humidity IndustryPack Logic Interface single wide IP 50 conductor flat cable 16 single ended channels or 8 differential channels All channels are galvanically isolated from the IP Interface DC DC converter on board Programmable for gain 1 2 5 10 TIP500 10 and TIP500 20 Programmable for gain 1 2 4 8 TIP500 11 and TIP500 21 TIP500 10 TIP500 20 10V OV to 10V gain 1 5V OV to 5V gain 2 2V OV to 2V gain 5 1V OV to 1V gain 10 TIP500 11 TIP500 21 10V OV to 10V gain 1 5V OV to 5V gain 2 2 5V OV to 2 5V gain 4 1 25V OV to 1 25V gain 8 Input over voltage protection up to 70V p p 12 bit ADC data acquisition and conversio
10. 4 1B Offset Error at Gain 1 board dependent 1D Offset Error at Gain 2 board dependent 1F Offset Error at Gain 5 board dependent 21 Offset Error at Gain 10 board dependent 23 Gain Error at Gain 1 board dependent 25 Gain Error at Gain 2 board dependent 27 Gain Error at Gain 5 board dependent 29 Gain Error at Gain 10 board dependent 2B Not used 00 3F 00 Figure 4 ID PROM Contents TIP500 20 V1 0 TIP500 User Manual Version 1 2 12 TEWS DATENTECHNIK ADDRESS 01 03 05 07 09 OB OD OF 11 13 15 17 19 FUNCTION ASCII 49 ASCII P 50 ASCII A 41 ASCII C 43 Manufacturer ID B3 Model Number 18 Revision 10 RESERVED 00 Driver ID low byte 00 Driver ID high byte 00 number of bytes used 15 CRC variable Version 21 15 Offset Error at Gain 1 board dependent Offset Error at Gain 2 board dependent Offset Error at Gain 4 board dependent Offset Error at Gain 8 board dependent Gain Error at Gain 1 board dependent Gain Error at Gain 2 board dependent Gain Error at Gain 4 board dependent Gain Error at Gain 8 board dependent Not used 00 Figure 5 ID PROM Contents TIP500 21 V1 0 TIP500 User Manual Version 1 2 TEWS DATENTECHNIK 5 IP Addressing The TIP500 is controlled by a set of registers which are directly accessible in the IO address space of the IP ADDRESS
11. 6 Differential Mode Note In differential mode only channels 1 to 8 may be selected In this mode channels 9 to 16 are used as input for channels 1 to 8 5 1 1 2 ADC Gain Selection Bit 5 and bit 6 of the ADC Control Register CONTREG are used to program the gain of the input amplifier Gain Selection TIP500 10 20 TIP500 11 21 0 G1 00 G1 01 G2 01 G2 10 G5 10 G4 11 G10 11 G8 Figure 7 CONTREG Input Gain Selection 5 1 1 3 ADC Automatic Settling Time Control If bit 7 of the ADC Control Register CONTREG is set to 717 the Automatic Mode for the settling time is enabled In this mode a data conversion is initiated by writing to the ADC Control Register CONTREG but however is automatically delayed by hardware until the gain depended settling time has expired If bit 7 of the ADC Control Register CONTREG is set to O the Normal Mode for the settling time is enabled In this mode a data conversion is initiated by writing to the ADC Convert Start Register CONVERT after selecting the desired channel and gain by writing to the ADC Control Register CONTREG Automatic Settling Time Control Enable Figure 8 CONTREG Automatic Settling Time Control TIP500 User Manual Version 1 2 15 TEWS DATENTECHNIK Note The settling time for all TIP500 Modules is 10us for all gains 5 1 1 4 ADC Pipeline Mode Control If bit 8 is set to 1 the pipeline mode is selected In pipeline mode the result from the conversion
12. EN TECHNIK GmbH is not liable for any damage arising out of the application or use of the device described herin 1996 by TEWS DATENTECHNIK GmbH IndustryPack is a registered trademark of GreenSpring Computers Inc TIP500 User Manual Version 1 2 3 TEWS DATENTECHNIK 1 Product Description en ae ae awed 2 Technical Specification 00 eee eee eee 3 Functional Description 0 0ee eee eee eee 321 Anal g INPut ur ee dee ne ide al 3 2 Data Correction 00 0 teen eens 3 2 1 ADC Correction Formula 00 0 0 a 4 ID Prom Contents 2002e eee e eee cece eee ee nun 5 IP Addressing 22am awan aa Ka KA 5 1 ADC Register Set 2 nennen nenn 5 1 1 ADC Control Register Address 00 2222222 22 5 1 1 1 ADC Channel Selection a 5 1 1 2 ADC Gain Selection ccc eens 5 1 1 3 ADC Automatic Settling Time Control 5 1 1 4 ADC Pipeline Mode Control 0 0 00 cece eee ees 5 1 1 5 ADC Interrupt Enable 0 00 cece eee eee 5 1 2 ADC Data Register Address 02 0 0 ccc eee eee 5 1 3 ADC Status Register Address 05 5 1 4 ADC Convert Start Register Address 07 5 1 5 Interrupt Vector Register Address 09 5 1 6 ID Write Enable Register Address 0B 6 Operating Modes 6 1 Mode Overview cece
13. NAME FUNCTION SIZE ACCESS 00 CONTREG ADC Control Register word R W 02 DATAREG ADC Data Register word R W 05 STATREG ADC Status Register byte RO 07 CONVERT ADC Convert Start Register byte WO 09 INTVEC Interrupt Vector Register byte R W OB IDWRENA ID PROM write enable byte WO Note IDWRENA is for factory use only do not write to this register 5 1 ADC Register Set The ADC of the TIP500 is controlled by a set of 4 registers All registers are cleared by IP_RESET ADC Control Register ADC Data Register ADC Status Register ADC Convert Start Register 5 1 1 ADC Control Register Address 00 The ADC Control Register CONTREG is used to select an input channel the gain and the mode for the next data conversion This is done by writing the corresponding bit pattern into bit 0 to bit 9 15 14 8 12 1 0 9 8 7 6 5 4 3 2 1 0 unused bits read access undefined write access don t care 5 1 1 1 ADC Channel Selection Bit 0 to bit 3 of the ADC Control Register CONTREG are used to select an input channel for the data conversion Bit 4 of the ADC Control Register CONTREG is used to control if the module operates in differential or in single ended mode If this bit is set to 1 differential mode is selected Figure 6 CONTREG Input Channel Selection and Mode TIP500 User Manual Version 1 2 14 TEWS DATENTECHNIK Input Channel Selection Differential Single Ended 0000 CH1 0000 CH1 01115 CH8 1111 CH1
14. TEWS DATENTECHNIK TIP500 Optically Isolated 16 Channel 12 Bit ADC Version 1 0 Revision A User Manual Issue 1 2 14 April 1999 D75500801 TEWS DATENTECHNIK GmbH Am Bahnhof 7 D 25469 Halstenbek Germany Tel 49 0 4101 4058 0 Fax 49 0 4101 4058 19 TEWS DATENTECHNIK TIP500 User Manual Version 1 2 1 TEWS DATENTECHNIK TIP500 10 optically isolated 16 channel 12 bit ADC input voltage range 10V gain 1 2 5 10 TIP500 11 optically isolated 16 channel 12 bit ADC input voltage range 10V gain 1 2 4 8 TIP500 20 optically isolated 16 channel 12 bit ADC input voltage range OV to 410V gain 1 2 5 10 TIP500 21 optically isolated 16 channel 12 bit ADC input voltage range OV to 410V gain 1 2 4 8 This manual covers all products This document contains information which is proprietary to TEWS DATEN TECHNIK GmbH Any reproduction without written permission is forbidden TEWS DATENTECHNIK GmbH has made any effort to ensure that this manual is accurate and complete How ever TEWS DATENTECHNIK GmbH reserves the right to change the product described in this document at any time without notice Description Date First issue 07 Feb 1996 Technical Spec 03 April 1996 TIP500 User Manual Version 1 2 2 TEWS DATENTECHNIK This product has been designed to operate with IndustryPack compatible carriers Connection to incompatible hardware is likely to cause serious damage TEWS DAT
15. es are stored in the ID PROM as two s complement byte wide values in the range 128 to 127 For higher accuracy they are scaled to 4 LSB 3 2 1 ADC Correction Formula The basic formula for correcting any ADC reading for the TIP500 10 11 input voltage range 10V is Value Reading 1 G incorr 8192 Offset corr 4 The basic formula for correcting any ADC reading for the TIP500 20 21 input voltage range OV to 10V is Value Reading il 1 Gain corr 16384 Offsetcorr 4 Value is the corrected result Reading is the data read from the ADC Gaincorr and Offsetcorr are the correction factors from the ID PROM Gaineorr and Offsetcorr correction factors are stored for each for the possible gain settings Note Floating point arithmetics or scaled integer arithmetics is necessary to avoid rounding error while computing above formula TIP500 User Manual Version 1 2 9 TEWS DATENTECHNIK 4 ID Prom Contents ADDRESS 01 03 05 07 09 OB OD OF 11 13 15 17 FUNCTION ASCII I ASCII P ASCII A ASCII C Manufacturer ID Model Number Revision RESERVED Driver ID low byte Driver ID high byte number of bytes used CRC Version 10 Offset Error at Gain 1 Offset Error at Gain 2 Offset Error at Gain 5 Offset Error at Gain 10 Gain Error at Gain 1 Gain Error at Gain 2 Gain Error at Gain 5 Gain Error at Gain 10 Not used 49 50
16. he conversion result is accessible in the ADC Data Register DATA REG If interrupts are enabled two interrupts will be generated the first interrupt at the end of the settling time the second interrupt at the end of conversion 6 3 1 State Diagram Normal Mode ADC busy 1 Settle busy 1 A Write access to CONTREG B Settling time expired C Write access to CONVERT D ADC ready conversion result in ADC Data Register RESET no cycle next Figure 19 State Diagram Normal Mode TIP500 User Manual Version 1 2 24 TEWS DATENTECHNIK 6 3 2 Normal Mode with Data Pipeline If Normal Mode with Pipeline is selected during conversion N the result of conversion N 1 is shifted into the ADC Data Register DATAREG In this mode it is possible that the settling time and conversion time simultaneous pro ceed The acquisition and conversion time in this mode is 10us with no change of channel gain and 12 5us with change of channel gain select gain amp channel Write access to ADC Control Register Pipeline active a gt i y n select new gain amp new Select a new channel and a new gain channel during conversion proceeds by a write Pipeline active access to the ADC Control Register i ADC BUSY y read data of Read result of the conversion N 1 conversion N 1 from ADC Data Register Figure 20 Flowchart Normal Mode with Data Pipeline Read bit 0 of ADC Status Register to check for end of settling time
17. n the programmed gain At the most analog input solutions it is the responsibility of the user to observe the settling time The TIP500 module has an Automatic Settling Time Control mode If this mode is enabled a write to the ADC Control Register which is necessary to select a new input channel by the multiplexer initiates a data conversion automatically after the settling time has expired The absolute accuracy of the module is increased by using the possibility to correct the data by software with factory calibration factors which are stored in the individual ID PROM of the module TIP500 User Manual Version 1 2 8 TEWS DATENTECHNIK 3 2 Data Correction There are two errors which affect the DC accuracy of the ADC The first is the zero error offset This is the data value when converting with the input connected with its own ground in single ended mode or with shorted inputs in differential mode This error is corrected by subtracting the known error from all readings The second error is the gain error Gain error is the difference between the ideal gain and the actual gain of the programmable gain amplifier and the ADC It is corrected by multiplying the data value by a correction factor The data correction values are obtained during factory calibration and are stored in the modules individual ver sion of the ID PROM The ADC has a pair of offset and gain correction values for each of the programmable gains The correction valu
18. n time up to 10us without channel gain change and up to 12 5us with channel gain change mode dependent Calibration data for gain and offset correction in ID PROM 1LSB after calibration for all TIP500 Modules 1LSB for all TIP500 Modules IDSEL 1 wait state IOSEL O wait state INTSEL 0 wait state typ 310 mA 5V Operating 40 C to 85 C Storage 45 C to 125 C 5 95 non condensing TIP500 User Manual Version 1 2 TEWS DATENTECHNIK 3 Functional Description 3 1 Analog Input The TIP500 provides 16 single ended or 8 differential multiplexed analog inputs for The desired input and the mode single ended or differential is selected by programming the input multiplexer A software programmable gain amplifier with gain settings of 1 2 5 and 10 for the TIP500 10 20 and 1 2 4 and 8 for the TIP500 11 21 allows a direct connection of a wide range of sensors and instrumentation The maxi mum analog input voltage range is 10V at a gain of 1 for the TIP500 10 and TIP500 11 For the TIP500 20 and 21 the maximum analog input voltage range is OV to 10V at a gain of 1 The ADC is a 12 bit ADS7808 with a maximum sample and conversion time of 10us The 12 bit data are alined in the bits 15 4 of a 16 bit data word bits 3 0 are always zero In multiplexed analog input systems a settling time must expire before the data can be converted after the change of the input channel This settling time is depended o
19. ong asthe ADC Busy Flag is read as 1 TIP500 User Manual Version 1 2 TEWS DATENTECHNIK 5 1 3 ADC Status Register Address 05 Bit 0 and bit 1 of the ADC Status Register STATREG reflect the status of the ADC converter As long as bit 0 is read as 1 the settling time did not expire after writing to the ADC Control Register CONTREG Bit 1 indicates the busy status of the ADC converter itself 1 ADC busy If Automatic Mode is active bit 1 indicates a 1 during the settling time and the conversion time 1 0 B a B B Settling Time Busy ADC Busy Figure 13 ADC Status Register Note Bit 2 7 of the ADC Status Register are undefined 5 1 4 ADC Convert Start Register Address 07 If the TIP500 is configured in Normal Mode writing any value into the ADC Convert Register CONVERT starts a data conversion immediately Note In normal mode it is in the responsibility of the user to observe the set tling time busy flag and the ADC busy flag of the ADC Status Register Writes to the ADC Convert Start Register CONVERT during ADC busy 1 are ignored TIP500 User Manual Version 1 2 18 TEWS DATENTECHNIK 5 1 5 Interrupt Vector Register Address 09 The Interrupt Vector Register INTVEC is a byte wide read write register The Interrupt Vector Register is shared between both interrupt sources but both the settlingtime ready and the ADC data ready will create an individual interrupt A read cycle to
20. the INTVEC Register acknowledges and clears the interrupt Will read at interrupt as 0 for ADC data ready 1 for settling time ready Interrupt vector loaded by software Figure 14 INTVEC Interrupt Vector Register For an interrupt from settling time ready bit O of the interrupt vector will read as 1 For an interrupt from the ADC data ready bit O will read as 0 If the vector register is for example loaded with 60 settling time ready will create an interrupt at vector 61 and ADC data ready will create an interrupt at vector 60 Note The interrupt settling time ready is created by the falling edge of settling time busy status and uses the INTREQ1 the interrupt ADC ready is created by the falling edge of ADC busy status and uses the INTREQO interrupt line of the IP bus 5 1 6 ID Write Enable Register Address 0B This register is for factory use only Do not write to this register If bit O is set 1 a write access to the ID PROM is enabled TIP500 User Manual Version 1 2 19 TEWS DATENTECHNIK 6 Operating Modes The TIP500 supports four operating modes which are selected with bit 7 Normal Automatic Mode and bit 8 Pipeline no Pipeline Mode of the ADC Control Register CONTREG 6 1 Mode Overview e Normal Mode No Pipeline Mode e Automatic Mode No Pipeline Mode e Normal Mode Pipeline Mode e Automatic Mode Pipeline Mode CONTREG Bit 7 1 CONTREG Bit 7 0
21. ycle next ADC busy 1 ADC busy 0 RESET write access to CONTREG Figure 16 State Diagram Automatic Mode In Automatic Mode the ADC busy flag is active during the whole cycle of channel gain select settling time and data conversion When the ADC busy flag becomes inactive 0 the conversion result is accessible in the ADC Data Register DATAREG and an interrupt will be generated if interrupts are enabled TIP500 User Manual Version 1 2 21 TEWS DATENTECHNIK 6 2 2 Automatic Mode with Data Pipeline If Automatic Mode with Pipeline is selected during conversion N the result of conversion N 1 is shifted into the ADC Data Register DATAREG The acquisition and conversion time in this mode is 20us select new Write access to the ADC Control Register gain amp channel starts automatically the conversion N after Auto amp Pipeline active the settling time has expired and shifts the result of conversion N 1 into the ADC Data Register Bit1 of the ADC Status Register indicates ADC busy during the whole cycle read data of nl of the conversion N 1 from ADC conversion N 1 ata Register Figure 17 Flowchart Automatic Mode with Data Pipeline TIP500 User Manual Version 1 2 22 TEWS DATENTECHNIK 6 2 3 Automatic Mode without Data Pipeline If Automatic Mode without Pipeline is selected the result of the actual conversion is shifted into the ADC Data Register DATAREG The acquisition and conversion time in this
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