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1. 5 7 5 3 Package Dimensions 5 8 5 4 Recommended Soldering Conditions eese 5 9 5 5 Recommended Reflow Conditions eeeeeeceeeeeeeeee eee een nennen 5 9 vi 5 User s Manual STFECHNICA oe Figures Flg 1 1 Role of Satellite IG oria cree cid Eia aue ie 1 3 Fig 1 2 Internal Structure of MKY35 eee ineo cuti conn unad 1 4 Fig 2 1 MKYS3S Pin ASSIQBIDOBL nna 2 3 Fig 2 2 Pin Electrical Characteristics I O Circuit Types of MKY35 2 6 Fig 3 1 Clock Relationship Diagram for 3 3 Fig 3 2 Hardware saveedacuadedinasiatiacyendsuaviniasedslenceudeaesscantueinae 3 6 Fig 3 3 Recommended Network Connection eese eene 3 8 Fig 3 4 Internal Input Terminal and Internal Output Terminal 3 9 Fig 3 5 1O 1 rire chup 3 11 gt Pee gt 21 fo eee tnn 3 11 19 37 3 12 Fig 38 Mode 2 3 12 29 39 dO Mode S ere aS oe es Nr 3
2. 28 2339 25 2339 CWON 014 23 23394 DRV ERN DRV CCWON 015 3 pur fi d Transmission optical sensor 5 25 2339 CCWP 1013 012 Ci 104 CM1 107 CMO 106 105 Fig 4 19 Example of Feedback Control of Rotational Speed If a terminal with the configuration as shown in Figure 4 19 is connected to the HLS network the user sys tem can easily 1 Control remotely the rotation direction and rotational speed of the DC motor by writing to memory data in the Do area in the center IC 2 Recognize remotely the rotational speed of the fan by reading from memory data in the Di area in the center IC 3 Perform feedback control of the fan rotational speed using 1 and 2 above Caution Figure 4 19 shows a concept for controlling of the DC motor with feedback but the motor operation is not guaranteed Select the components and reference clocks including fre quencies according to the user system STE HNICA CO ITD MKY35 User s Manual 4 3 4 6 Application of Gate Counter In the internal gate 1 internal gate 2 or external gate modes the gate counter counts signal transitions within a given time This operation is the same as that of a frequency counter Therefore a frequency counter can be configured by selecting a proper gate signal or
3. TECHNICA CO LTD Hi speed Link System Satellite IC MKY35 User s Manual Note 1 The information in this document is subject to change without prior notice Before using this product please confirm that this is the latest version of this document 2 Technical information in this document such as explanations and circuit examples are refer ences for this product When actually using this product always fully evaluate the entire sys tem according to the design purpose based on considerations of peripheral circuits and the PC board environment We assume no responsibility for any incompatibility between this product and your system 3 We assume no responsibility whatsoever for any losses or damages arising from the use of the information products and circuits in this document or for infringement of patents and any other rights of a third party 4 When using this product and the information and circuits in this document we do not guaran tee the right to use any property rights intellectual property rights and any other rights of a third party 5 This product is not designed for use in critical applications such as life support systems Con tact us when considering such applications 6 No part of this document may be copied or reproduced in any form or by any means without prior written permission from StepTechnica Co Ltd 5 User s Manual T ECHNICA CO LTD
4. pin while the MKY35 is returning the RP The 5 is designed not to input data when the TXE pin is High so there is no problem STE HNICA MKY35 User s Manual 3 4 2 Recommended Network Connection Figure 3 3 shows the recommended network connection The TRX driver receiver components consists of an RS485 based driver receiver LSI driven at 5 0 V and pulse transformer Recommended network cables include Ethernet LAN network cables LOBASE T Category 3 or higher and shielded network cables When operating the HLS full duplex mode requires two twisted pair cables and half duplex requires one twisted pair cable Fig 3 3 Full duplex mode MKY35 Equivalent 5 751177 transformer Network cable Two twisted pair cables with impedance of 100 Q Connect a 100 Q termination resistor to the end of the network cables Connecting the resistor before or after the pulse transformer has the same effect Half duplex mode MKY35 One twisted pair cable with impedance of 100 Q Connect a 100 termination resistor to the end of the network cables Connecting the resistor before or after the pulse transformer has the same effect Fig 3 3 Recommended Network Connection Caution The TXD pin of the MKY35 goes high impedance while it does not send RP When using driver components that does not allow the driver input to go high impedance connect a
5. or off 2 The user system simply reads memory in the center IC when it wants to obtain the state of the internal input terminals DiO to Dil5 of the MKY35 For example when a sensor is connected to the Io pin to which the internal input terminals DiO to Dil5 of the MKY35 is connected the user system pro gram can obtain the state of the sensor by reading memory in the center IC If the center IC can issue multiple commands 0 to FH the MKY35 responds to command 0 which is a basic function of the HLS Handle the expanded functions of the MKY35 using the command 0 Caution Even if the MKY35 receives a command packet CP other than command 0 it has no operational function In this case the MKY35 returns a response packet RP containing data at OOOOH Chapter 1 Outline of MKY35 Tc HNICA CO LTD 1 4 MKY35 Response Time The main feature of the HLS where a center IC continues to scan is that constancy and real timeness are assured The time required to link data in memory in the center IC with the states of the internal input termi nal Di and internal output terminal Do of the MKY35 essentially matches the scan time of the HLS which is very fast For example in a user system that must detect the exact position of each box on a belt conveyor if four MKY35 with 16 Io pins 100 to 1015 set to input are connected to the center IC and position detection sensors
6. 1 3 1 2 Internal SIFUCIUFB Ea attends 1 4 1 3 Procedure for Operating 5 1 4 L4 MKYS5 Response Tire qtiae ccm inan ed 1 5 1 5 Features OF MKY 35 1 5 1 5 1 Features of Basic Functions of MKY35 as Satellite IC in HLS 1 5 1 5 2 Expanded 1 5 Chapter 2 MKY35 Hardware 2 2445445464454451 5658 244054 425 45 4444444444444 4 2 3 Chapter 3 Connecting Basic Functions of MKY35 NEEUuUDnEeSS 3 3 3 1 1 Self generation of Driving Clock caesis enne nnne nnn nnns 3 3 3 1 2 Supplying Generated Driving COCK eee nnns 3 4 3 1 3 Selecting Driving ClOCK nenne nunne nnmnnn 3 5 3 1 4 Checking Driving 3 5 3 2 Hardware Heset ener uere 3 6 3 3 Setting Satellite Addresses eese enne 3 6 3 4 Connecting Network Interface
7. The satellite IC in HLS returns a response packet RP in response to a command packet CP which matches a SA from the center IC This causes the state of the input pin Di of the satellite IC to be copied directly to the Di area of memory in the center IC The CP issued from the center IC is embedded with one data item arranged in the Do area of memory in the center IC The satellite IC in HLS outputs data in the CP to the output pin Do of the satellite IC each time it receives a CP matching the SA The center IC periodically transmits a CP and receives a RP to continue scanning the satellite IC This series of continuous operation links the state of the input pin Di of the satellite IC with data in the Di area of memory in the center IC and data in the Do area of memory in the center IC with the state of the output pin Do of the satellite IC The Di and Do areas of memory in the center IC are arranged corresponding to each SA that must be set to the satellite IC Fig 1 1 Fig 1 1 Role of Satellite IC The 5 is a miniaturized package satellite IC with 32 I O ports 16 for input Di and 16 for output Do The package has 16 input and output pins that can be connected to any of the 32 input and output I O ports In addition to these input Di and output Do pins the MKY35 has some expanded func tions for embedding in various user systems STE HNICA CO ITD MKY35 User s Manual 1 2 Int
8. ot 1050 i a 1050 i i i 1 1 lt 1 2 HN QR is i 5 i i 3 L OE i g 3 1 3 i 3 i J 23 D r o 9 3 9 Mode 5 9 3 10 I O Mode 6 STE HNICA MKY35 User s Manual 3 6 Connection Example of MKY35 Basic Functions Figure 3 11 shows connection example of the MKY35 basic functions In the example circuit IO mode 1 is selected All the expanded functions except the MON pin function described later are unused The satel lite addresses of the MK Y35 can be set by DIP Switch DIP SW Connect a termination resistor MKY35 to the end of the network cable Ful duplex 16 bit general purpose inputs 100 1015 10 mode 1 selected fe va Mee Half duplex Equivalent to ADM1485 Network cable 4700 7 0 46 When using driver components that does not allow the driver input to go high impedance connect a pull up or pull down resistor to the connection line LED Green between the TXD pin and driver input T Co POI M 1 42 155 SIBZEBS 1 2 of four times the baud rate DR Example 48 MHz for 12 Mbps 38 Frequency varies depending on ies setting of BPSS pin 14 D Hardware reset 777 4 7 uF When focusing on 77 power supply stability mount a voltage detection reset IC 40 SSB ECS 13 12 777 24 Insert a
9. pull up or pull down resistor to the connection line between the TXD pin and driver input Reference The High level signal of the network interface output to the TXE pin pin 44 can be used to detect that the center IC is scanning It can also be used to check the operation of the user system using the HLS and measure the response speed Background information to help build network cables is described in Hi speed Link Sys tem Technical Guide For more information about how to select components or to get recommended components visit our Web site at www steptechnica com Chapter 3 Connecting Bacsic Functions of MKY35 ST ECHNICA CO LTD 3 5 Selecting Operation Mode of MKY35 The MKY35 operation mode can be selected by three IOS IO Select pins The MKY35 has 16 Io pins 100 to Io15 These pins can be used for input or output by setting the IOS pins Caution The user can change the operation mode even during operation of the MKY35 by chang ing the setting of the IOS pins However StepTechnica advises the user not to change the setting of the IOS pins during operation because the I O transition time of active Io pins varies depending on the connection environment including load capacitance and the out put level depends on the operating state If the user wants to change the setting of the IOS pins during operation set the IOS pins carefully to prevent problems such as the input output transi
10. 3 1 1 Self generation of Driving Clock The 5 can be connected to an oscillator to self generate a driving clock In this case connect the oscillator to the Xi pin pin 48 and Xo pin pin 1 The frequency of driving clock to be generated must be four or eight times greater than the baud rate For example if the baud rate is 6 Mbps the frequency of the driving clock is 24 or 48 MHz If the driving clock is generated correctly and the MKY35 is in IO mode 1 to 6 the user can find that the Co Clock out pin pin 11 outputs the clock This clock is output from the Co pin when the BPSS BPS Select pin pin 38 is Low and while the hardware reset is activated Place the oscillator and auxiliary component to be connected to the Xi and Xo pins near the MKY35 Sup ported oscillators include crystal and ceramic types Select an appropriate value for the additional capaci tance depending on the oscillator types and manufacturers Fig 3 1 fe Crystal or ceramic oscillator The frequency should be four or eight times greater than the baud rate Oscillator and auxiliary component MKY35 p gt The driving clock is output when the MKY35 is in IO modes 1 to 6 Role of DR With DR Damping resistor is used to prevent the abnormal oscillation which is caused by high frequency signal Note DR means a damping resistor ES Fig 3 1 Clock Re
11. Preface This manual describes the MKY35 or a kind of satellite IC in the Hi speed Link System Be sure to read Hi speed Link System Introduction Guide before understanding this manual and the MKY35 In this manual the Hi speed Link System is abbreviated as HLS Target Readers This manual is for Those who first build an HLS Those who first use StepTechnica s various ICs to build an HLS Prerequisites This manual assumes that you are familiar with Network technology e Semiconductor products especially microcontrollers and memory e Related Manuals Hi speed Link System Introduction Guide Hi speed Link System Technical Guide Caution To users with Hi speed Link System User s Manual up to Fourth Edition released before March 2001 Some terms in this manual have been changed to conform to International Standards B This manual has been prepared based on Standard English M meeting the requirements of the International Organization for Standardization ISO and the American National Standards Institute ANSI This English manual is consistent with the Japanese document STD HLS35 V6 2J Standard English is a trademark of Win Corporation ii T STE HNICA CO LTD MKY35 User s Manual ECHNICA CO LTD 5 User s Manual T CONTENTS Chapter1 Outline of MKY35 11 Role of Satellite IC and Relationship with 5
12. Temperature 5 2 1 Clock and Reset Timing RST Xi X RST TXI TXIL TRST Passage of time TXI Clock period width 20 ns TXIH Clock High level width 5 ns TXIL Clock Low level width 5 ns TRST Reset enable Low level width 10 x TXI ns Chapter 5 Ratings TEP S TECHNICA Co LTD 5 2 2 Baud Rate Timing TXE TXD RXD TTXEH TXE RZ 1 RZ 1 RZ 0 RZ 0 RZ 1 TXD TBPS TBPS RZ 1 RZ 1 RZ 0 RZ 0 RZ 1 RXD TRNW TRNW TRww TRww Passage of time _ gt Baud rate Short pulse width of sending signal 83 3345 166 67 5 Period in which TXE pin goes High 333 33 5 142 x TBPS 5ns 142 x TBPS Remarks 142 x TBPS 5ns Short pulse width of input signal 0 51 x TBPS 1 0 x TBPS Allowable pulse Ve width as RZ signal Long pulse width of input signal 1 51 x TBPS 2 0 x TBPS Allowable pulse AAS TEPS width as RZ signal STE HNICA CO ITD MKY35 User s Manual 5 2 3 Strobe I O Pin Timing 100 to 1015 in out STB1 STB2 CLR CLR TCLR TDOC 100 to lo15 ALL Lo OUTPUT 1 4 x STB1 SSA Lo STB2 100 to 015 2xTSTB SSA Hi 100 to 1015 INPUT Passage of time Symbol Name Min Typ Max Unit High level width of strobe signal 2 x TBPS 5 2 TBPS 2 TBP
13. 4 24 X STB1 Pin Function sesers eneseeecenteneseeeeneseseveseecesenssccuescuvesuessersteeeeceseeesuetesess 4 6 42 2 Time to Sample State of lo Pin 2 4 6 4 2 3 Setting Strobe Signal Timing SSA Pin eese 4 7 4 24 Enabling Disabling Handshake SSB 4 8 4 2 41 Example of Handshaking Effectiveness eee 4 9 4 2 4 2 Cautions for Sending Character String 4 10 4 2 4 3 Caution for Using Handshaking 1 essere 4 11 4 2 4 4 Caution for Using Handshaking 2 eese 4 11 4 23 AUN DICH M 4 12 4 31 QUI Nurs RA 4 12 4 3 2 Ee 4 13 4 3 2 1 Basic Operation Of PWM 4 14 4 3 2 2 Functions of ECS and EBC 4 14 4 3 2 3 Function of DIR Pin eerie 4 15 4 3 2 4 ncc 4 15 4 3 2 5 Cautions for Using PWM Function essen nnns 4 16 4 3 2 0 Ap
14. 21 lo9 008 20 i i FREU ORE r F Do7 ccwrun PAM i Do6 gt CWRUN Ircul 2 Do5 21 5 0045 90 power CCWON 1015 003 power3 CWON 33 14 1082 Do2 pL Power2 CCWP lo13 Do1 Power 31 12 1081 Do0 E ass i EBC EBC pls i ECS 40 Ecs DIR 39 DIR 3 3 i 2E i Clock with 1 512 frequency LOS of driving clock i 2 Reference clock 7 NE 28 PE 27 05 1 5 26 104 18 17 102 16 101 15 100 Fig 4 9 PWM Mode 1 Caution If the MKY35 is set in the PWM mode the SSA input pin forcibly retains Low internally STB2 signal is generated before STB1 signal and the SSB input pin forcibly retains High internally handshaking disabled The Co output pin and STB2 output pin cannot be used Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 3 2 PWM Circuit The PWM Pulse Width Modulation circuit of the MKY35 is a circuit that generates a clock that can change the duty ratio Fig 4 10 The duty ratio are proportional to the Power values 00H to 3FH set to Power 0 to Power 5 internal output terminals DoO to Do5 The clock period is determined by the reference clock supplied to the PWM circuit The pulse signal generated by the PWM circuit is called a PWM signal However the PWM signal serves as
15. 3 7 3 41 Details of TXE and TXD 3 7 3 4 2 Recommended Network Connection eese eeeeeeeee nennen nennen nnns 3 8 3 5 Selecting Operation Mode of MKY35 creen 3 9 3 5 1 Internal Input Terminal and Internal Output Terminal sess 3 9 3 5 2 List of Operation Modes 5 e nete 3 10 3 5 93 lO Modes 1 and 2 24 cieli c erine ae aait Eaei oiiae sa 3 11 3 5 4 Modes E ade eder 3 12 3 5 5 IQ Modes 5 and rire reete inne iP d tne tug ree 3 13 3 6 Connection Example of MKY35 Basic 3 14 Chapter 4 Expanded Functions of MKY35 4 1 Scan Response Signals and its 4 3 4 1 1 Function of MON Pin 5 iie Lair etin ceder 4 3 4 1 2 Indication of Scan Response nnn inna 4 4 4 1 3 gt Watchdog TIME 4 4 41 4 CLR Pin Function soc 4 5 S TECHNICA Co LTD MKY35 User s Manual 42 Setting Strobe Signal and its 4 6
16. Figure 4 13 shows an example of controlling the rotation direction and rotational speed of a DC motor using the PWM circuit C N MKY35 CWON 1014 CCWP 1013 012 12 V 25 2339 w1 Power 111111B 3FH DIR Hi CWRUN Hi w3 Power 001111B OFH DIR Hi CWRUN Hi 7 w5 Power 100000B 20H DIR Lo CWRUN Hi W2 Power 111111B 3FH DIR Hi CCWRUN Hi W4 Power 001111B OFH DIR Hi CCWRUN Hi 26 W6 Power 100000B 20H DIR Lo CCWRUN Hi 59 Fig 4 13 Example of Motor Control Using PWM Function Note This diagram is an image In this example the ECS External Clock Select and the EBC External Base Clock inputs keep Low and use an internal reference clock If a terminal with the configuration as shown in Figure 4 13 is connected to the HLS network the user sys tem can remotely control the rotation direction and rotational speed of a DC motor by writing to memory data in the Do area in the center IC In Figure 4 13 W1 shows the fan rotates clockwise when 1 is written to the bit corresponding to the CWRUN internal output terminal Do6 and values indicating the maximum rotational speed of the motor is written to the bits corresponding to the Power internal output terminals DoO to Do5 W2 shows the fan rotates counter clockwise when 1 is written to the bit corresponding to the internal
17. Io p NND pins set to input and so on disable handshaking Chapter 4 Expanded Functions of MKY35 TEP S TECHNICA Co LTD 4 2 4 1 Example of Handshaking Effectiveness This section describes an example of the effectiveness of handshaking with the center IC Some user systems may want to send character string data to the center IC in synchrony with the strobe signal output from the STB2 pin For example when transferring charac ter string data consisting of the 5 characters ABCDE to the Io pin Di of the MKY35 set to input one by one at each output of the STB2 strobe signal Fig 4 6A a charac ter may be omitted in the character string data obtained by the center IC when handshaking with the center IC is dis abled For example if there is interference including exter nal noise in the network during sending the letter and the RP is discarded at the center IC the STB2 strobe signal 2 Center Satellite Command 22 5 2 A recognized A transferred STB2 STB2 Passage of time STB2 ow Mus STB2 E E 2 Fig 4 6A Operation with No Failure is output at the next scan Consequently the center IC receives the character string data ABDE omitted Fig 4 6B In contrast when handshaking is enabled the STB2 strobe signal is not output at the next scan even when the RP is discarded at the center IC an
18. a High level status instead of as a clock only when the Power value is set to 3FH 5 Power 0000008 00H The PWM signal has one period of 64 reference clocks Reference 5 PWM Signal _ gt 4 l L When Power 0 The High level period of the pulse is a minimum of 1 CLK The Low level period of the pulse is 64 1 63CLK Power 001111B OFH Reference clock PWM Signal D gt H Noo H H 16CLK When Power 15 The High level period of the pulse is 16 CLK The Low level period of the pulse is 64 16 48 CLK Power 111111B Reference clock _ PWM Signal l 111 0 0 2 When Power 63 The pulse is always output at a High level Passage of time There is no Low level period of the pulse Fig 4 10 PWM Signal The formula for the duty ratio of the PWM signal to the Power value is shown below Duty ratio Power value 1 64 Example Power value 0 OOH Duty ratio 0 1 644 1 6 Example Power value 15 OFH Duty ratio 15 1 64 25 0 Example Power value 32 20H Duty ratio 32 1 64 51 5 Example Power value 63 3FH Duty ratio 63 1 64 100 STE HNICA CO ITD MKY35 User s Manual 4 3 2 1 Basic Operation of PWM Circuit The CWP Clock Wise Pulse and CCWP Counter Clock Wise Pulse output pins of the PWM cir
19. bypass capacitor 25 such as laminated ceramic capacitor of about 0 1 uF between power pins Z7 777 35 37 Connect TEST to GND GND 36 7 777 Fig 3 11 Connection Example of Basic Functions Chapter 4 Expanded Functions of MKY35 This chapter describes the pin functions and connections required to operate the expanded functions of the MKY35 4 1 Scan Response Signals and its Applications 4 3 4 2 Setting Strobe Signal and its Application 4 6 4 3 4 12 Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD Chapter 4 Expanded Functions of MKY35 This chapter describes the pin functions and connections required to operate the expanded functions of the MKY35 4 1 Scan Response Signals and its Applications This section describes how to use the following two functions among the expanded functions described in 1 5 2 Expanded Functions 1 Has pin that outputs scan response signals 2 Has CLR pin that sets internal output terminals DoO to Do15 Low 4 1 1 Function of ZMON Pin The 5 has a MON pin pin 46 that outputs scan response signals The MON pin operates as follows by a retriggerable one shot multivibrator circuit in the MKY35 1 The MON pin goes High when hardware reset becomes a
20. can design peripheral circuits based on each update timing 4 Can set handshake to ensure link with center IC 5 Has two types of PWM Pulse Width Modulation modes to control current and DC motor T STE HNICA CO LTD MKY35 User s Manual Chapter 2 MKY35 Hardware This chapter describes the MK Y35 hardware such as pin assignment pin functions and circuit types Chapter 2 MKY35 Hardware SF ECHNICA CO LTD Chapter 2 MKY35 Hardware This chapter describes the MK Y35 hardware such as pin assignment pin functions and I O circuit types Figure 2 1 shows the MKY35 pin assignment MKY35 64 pins 5 526660 HELLE EET LELTET LI LT LI 0995 ONNNN VDD VDD BPSS 1011 DIR SSA 1010 ECS SSB TEP lo9 STB1 TEC HNICA lo8 EBC STB2 GND TXD lo3 TXE lo2 RXD lot MON 100 CLR RST Xi VDD 2 LILILILILILILILILILILILSI 200008 OO050 Note Pins prefixed with are negative logic active Low Fig 2 1 MKY35 Pin Assignment STE HNICA CO ITD MKY35 User s Manual Table 2 1 lists the pin functions of the MKY35 Table 2 1 Pin Functions of MKY35 Positive Pin that connects oscillator Input pins that sets satellite addresses Set the hexadecimal values 1 to 63 01H to in positive logic assuming a High level as 1 The IA5 pin corre sponds to MSB When thes
21. output terminal Do7 CCWRUN W3 shows the fan rotates clockwise at low speed and W4 shows the fan rotates counter clockwise at low speed W5 and W6 show the fan rotates at medium speed in a direction opposite to CWRUN and CCWRUN when the input state of the DIR pin changes from Low to High When the rotation of the motor axis is transmitted using gears as shown in examples W5 and W6 the rotation direction may vary between the actual motion and the rotation direction as control data In this case the actual rotation direction and rotation direction as control data can be the same by changing the level of the DIR pin Caution Figure 4 13 shows a concept for drive controlling the DC motor but the operation is not guaranteed Select the components and reference clocks including frequencies according to the system Chapter 4 Expanded Functions of 5 SF ECHNICA CO LTD 4 3 3 PWM Mode 2 The MKY35 is set in PWM mode 2 when the IOS2 pin is set to High the IOS 1 pin to High and the IOSO pin to High In PWM mode 2 just as in PWM mode 1 a PWM circuit is inserted between the internal output ter minals Do0 to Do7 and the Io pins 1012 to 1015 Pins 11 and 42 which are the Co output pin and STB2 output pin in the IO mode function as input only pins POI Pwm On Invert and EBC External Base Clock of the PWM circuit and pins 39 and 40 which are the SSA input pin and SSB input pin in the IO mode
22. performing arithmetic operations on the obtained counts in order to match the gate signal For example in the external gate mode if the count value QV is 1500 5 DCH when a 1 kHz clock GF is input to the Gate 105 pin the frequency F of the signal input to the Ci 104 pin is determined as a digital value within a 1 digit accuracy as follows 2 x GF x QV 1 lt F lt 2 x GF x QV 1 2 x 1000 x 1500 1 lt F lt 2 x 1000 x 1500 1 2 998MHz lt F lt 3 002MHz If the output voltage of an analog sensor including a temperature sensor is converted to a clock frequency by the VIF Voltage to Frequency converter using the above formula and is input to the Ci 104 pin the user can know the output voltage value of the analog sensor as a digital value Chapter 5 Ratings This chapter describes the ratings of the MKY35 5 1 Electrical Tu uaa ra CE ERR MIS 5 2 5 3 Package Dimensions eee 5 4 Recommended Soldering Conditions 5 5 Recommended Reflow Conditions Chapter 5 Ratings TEP S TECHNICA Co LTD Chapter 5 Ratings This chapter describes the ratings of the MKY35 5 1 Electrical Ratings Table 5 1 lists the absolute maximum ratings of the MKY35 Table 5 1 Absolute M
23. pull down resistor Input pin that functions as SSA pin when any of the IO modes 1 to 6 is selected by the IOSO to IOS2 pins Set a High level or Low level to select the strobe signal func tions to the SSA pin SSA DIR Positive Input pin that functions as DIR pin when the PWM mode 1 or 2 is selected by the IOSO to IOS2 pins Connect DIR signal supplied to the PWM circuit to the DIR pin When this pin is open it is recognized as a Low level input by the internal pull down resistor Continue Chapter 2 MKY35 Hardware SF ECHNICA CO LTD Table 2 1 Pin Functions of MKY35 Continued Input pin that functions as SSB pin when any of the IO modes 1 to 6 is selected by the IOSO to IOS2 pins Set a High level or Low level to select the strobe signal func tions to the SSB pin SSB ECS Positive Input pin that functions as ECS pin when the PWM mode 1 or 2 is selected by the IOSO to IOS2 pins Connect ECS signal supplied to the PWM circuit to the DIR pin When this pin is open it is recognized as a Low level input by the internal pull down resistor Output pin that outputs High level pulse of strobe signals Positive indicating timing to update state of internal output terminal when command packet received correctly from center IC pin that functions as STB2 pin when any of the IO modes 1 to 6 is selected by the IOSO to IOS2 pins STB2 pin outputs High level pulse of strobe signals indicating timing to input sta
24. 00H Note The illustration is only an image Fig 4 12 Example of Controlling Bulb Using PWM Function In this example the ECS External Clock Select input keeps High to supply a 4 kHz clock to the EBC External Base Clock input The PWM signal output from the CWP pin has a pulse period of 16 ms 62 5 Hz which is close to the commercial power frequency of 60 Hz resulting in imperceptible flickering even though controlled The CCWON Counter Clock Wise ON output and CCWP Counter Clock Wise Pulse output are unused and left open If a terminal configured as shown in Figure 4 12 is connected to the HLS network the user system can remotely control the bulb brightness by writing memory data in the Do area in the center IC For example the user system can control the bulb brightness by writing a brightness value to the bits corre sponding to the Power 0 to Power 5 internal output terminals DoO to Do5 For example the user system can control the bulb on off operation by writing 1 light ON or O light OFF to the bit corresponding to the CWRUN pin internal output terminal Do6 Caution Figure 4 12 shows the concept for controlling a bulb brightness but the operation is not guaranteed Select the components and reference clocks including frequencies according to the system STE HNICA MKY35 User s Manual 4 3 2 7 Application Example of PWM Circuit Operation 2
25. 11 Do10 22 1010 00 1010 0 21 109 o 09 lo9 i 20 Do8 c lo8 007 gt 0 107 g 006 8 g Do6 lo6 3 2 3 lo5 Df 004 1 8 104 003 8 003 1 3 i 002 i Do2 i gt 1082 Dot gt Dot 1 9 i i 1 9 1081 i 1050 i a i i 3 1 1 j 5 i D i D i 5 i 5 O 5 5 i 017 4 0 29 2 i 3 88 18 5 05 4 4 27 105 ro 104 DB 1 1 o Di3 4 18 i 012 17 2 i 16 101 Dio 15 Fig 3 7 Mode Fig 3 8 IO Mode 4 Chapter 3 Connecting Bacsic Functions of MKY35 ST ECHNICA CO LTD 3 5 5 10 Modes 5 and 6 Figure 3 9 and Figure 3 10 show the internal connections in IO mode 5 and IO mode 6 respectively MKY35 MKY35 Satellite IC core Satellite IC core 0015 98 34 1015 1015 0014 1 5 33 1014 i 1014 i Do13 gt 32 1013 1013 i 5 0012 m 31 1012 i 5 1012 Do1 i 23 1011 i 1011 1 m1 H 1 2 22 1010 Po 1010 21 ioo lo9 i Do81 20 i lo8 2 4 29 o7 NE lo7 i g Do6 28 i 8 lo6 1 3 05 77 105 3 105 Pg 26 i 104 003 1 8 lo3 lo3 1052 17 2 082 lo2 Dot gt
26. 1111111 y 1 12 0 75 0 5 0 2 0 05 0 15 0 05 1 2 1 0 0 2 0 15 0 05 20 10 SEATING PLAN Unit mm Chapter 5 Ratings S TECHNICA Co LTD 5 4 Recommended Soldering Conditions Parameter Symbol Reflow Manual soldering iron Peak temperature resin surface Tp 260 max 350 max Peak temperature holding time tp 10 s max 3 s max Cauti on 1 Product storage conditions TA 30 C max RH 70 for prevention of moisture absorption 2 Manual soldering Temperature of the tip of soldering iron 350 C 3 s max Device lead temperature 270 C 10 max 3 Reflow Twice max 4 Flux Non chlorine flux should be cleaned sufficiently 5 Ultrasonic cleaning Depending on frequencies and circuit board shapes ultrasonic cleaning may cause resonance affecting lead strength 5 5 Recommended Reflow Conditions gt Package surface temperature tw Time Parameter Pre heat time 60 to 120 s Pre heat temperature 150 to 180 C Temperature rise rate 2 to 5 C s Peak condition time 10 3 s max Peak condition temperature 255 5 C Cooling rate 2 to 5 C s High temperature area 220 C 60 s max Removal temperature lt 100 C i Caution The recommended conditions apply to hot air reflow or infrared reflow Temperature indi cates resin surface temperature of the
27. 13 Fi 3 10 JO nri metr 3 13 Fig 3 11 Connection Example of Basic Functions 3 14 Fig 4 1 Indication Of Scan 5 4 4 Fig 4 2 Connection Example between MON Pin and CLR Pin 4 5 Fig 4 3 Update Timing of Internal Output Terminals 000 to Dof15 4 6 Fig 4 4 SSA Pin Setting and Update Timing eere 4 7 Fig 4 5 Timing of STB2 Strobe Signal Generation eere 4 8 Fig 4 6A Operation with No Failure eee eee eren een nennen rnnt 4 9 Fig 4 6 Handshaking 5 4 9 Fig 4 6C Handshaking Enabled eese eeecee senescere ettet nennen tnnt 4 9 Fig 4 7 Sending with Character Counter Used eere 4 10 Fig 4 8 Operation 2 522 545 25552 55424255442 4 11 Fig 49 PWM Mode T 4 12 Flg 4 10 PWM Slgtrial 4 13 Fig 4 11 Reverse of Logic of Enable 4 15 Fi
28. 15 0014 Do14 lo14 f Do13 gt lo13 _ Do12t Do12 m lo12 og 0011 g Dott i 3 i 3 0010 1 5 i 2 Dog gt i 2 Dog gt 8 i 8 i gt i i Do7 i 7 i 7 3 Do5 gt 5 Do5 i gt 13 Da 13 9 gt S 003 1 5 7 1052 Do2 gt gt gt i Do0 UM 1051 H3 Do0 Di15 34 015 Di15 i 0114 _ 33 14 lal Di14 i 0113 4 32 1013 1050 0124 31 12 02 5 4 23 1011 i 1011 3 00 22 1010 3 00 lo10 2 Dig ke 21 i 2 pg lo9 i 2 08 20 108 is Di8 lo8 5 DiTi4 29 amp Di lo7 S Die 28 5 Die lo6 1 3 Di5 44 27 105 i 3 Di5 105 i og 26 lo i g Di lo4 Di3i4 4 18 o3 i Di2 17 102 i Di2 lo2 i Di1 16 101 Di1 lo1 i Dio 15 i Dio 100 Fig 3 5 1O Mode 1 Fig 3 6 Mode 2 STE HNICA CO LTD MKY35 User s Manual 3 5 4 IO Modes 3 and 4 Figure 3 7 and Figure 3 8 show the internal connections in IO mode 3 and IO mode 4 respectively MKY35 MKY35 Satellite IC core Satellite IC core Do15 t 34 015 i Do15 gt 1015 i Do14 _33 1014 Do14 gt lo14 i Do13 1 9 32 1013 Do13 t lo13 0012 1 3 31 1012 00125 1012 Dott i 23 1011 8 0
29. S 5 Do data transition time 0 25 Di data setup 40 Di data hold 0 High level sensing of CLR pin 0 25 x TBPS sos 0 6 x TBPS 5 2 4 PWM Output Transition Timing CWON CCWON CWP CCWP Passage of time Level transition time Chapter 5 Ratings TEP S TECHNICA Co LTD 5 2 5 Universal Counter Timing Free Count Mode CRST Ci TRLW CRST 105 TRHC Ci 104 Passage of time High level sensing of CRSTpin CRST pin Low level width 2 TBPS Ci pin High level width 1 5 x TBPS Ci pin Low level width 1 5 x TBPS 5 2 6 Universal Counter Timing External Gate Mode Gate Ci TGHW Gate 105 Tcoc Ci lo4 TcHw Tew Passage of time High level sensing of Gate pin Remarks Gate pin High level width TBPS Gate pin Low level width 2x TBPS Ci pin High level width 1 5 x TBPS Applies to internal gate 1 and 2 modes Ci pin Low level width 1 5 x TBPS Applies to internal gate 1 and 2 modes S TECHNICA Co LTD MKY35 User s Manual 5 3 Package Dimensions MKY35 64 pin TQFP 9 0 0 2 7 0 0 1 0457 24 lt e S 5 E i f H ojo hs lt Index mark 13 HHH HHH 4 11 1
30. Sdect B pin pin 40 When the SSB pin is Low handshaking with the center IC is enabled When the MKY35 inputs the self addressed command packet CP from the center IC it recognizes whether the center IC has received correctly the response packet RP returned to the center IC at the last scan case where handshaking is enabled the MK Y35 outputs a strobe signal from the STB2 pin to sample the internal input terminals Di0 to 0115 only when the center IC has input the previously returned RP cor rectly and the sampled state of the internal input terminals DiO to Dil5 is embedded in the RP If the center IC has not input the previously returned RP correctly the MKY35 neither outputs a strobe sig nal to the STB2 pin nor samples the state of the internal input terminals DiO to 0115 In this case the pre viously sampled state of the internal input terminals 210 to Dil5 is embedded in the RP again Figure 4 5 shows the timing of generating the STB2 strobe signal in the MKY35 with five satellites and 2 in half duplex mode 7 Since Do data is added to all commands the internal Passage of time output terminal of the MKY35 is updated at every scan In a case where handshaking is set if this response does not arrive at the center IC the next STB2 signal is not generated Fig 4 5 Timing of STB2 Strobe Signal Generation In a user system in which real timeness is essential when a sensor is connected to the
31. Table 4 3 Gount Modes gt iota ite colui teste 4 20 Table 4 4 Gate Times in Internal Gate 1 Mode eene 4 23 Table 4 5 Gate Times in Internal Gate 2 Mode eene 4 24 Table 5 1 Absolute Maximum Ratings esses nennen nennen nnn 5 3 Table 5 2 Electrical 5 3 Table 5 3 Characteristics Measurement Conditions ees 5 4 viii Chapter 1 Outline of MKY35 This chapter describes the outline of the MK Y35 in the Hi speed Link System HLS 1 1 1 2 1 3 1 4 1 5 Role of Satellite IC and Relationship with MKY35 1 3 Internal eei ceo oce Ra SUE Rus eran Sp trece Saee oce 1 4 Procedure for Operating 5 1 4 Response Time 1 5 Features of 5 1 5 Chapter 1 Outline of MKY35 Tc HNICA CO LTD Chapter 1 Outline of MKY35 This chapter describes the outline of the MKY35 in the Hi speed Link System HLS 1 1 Role of Satellite IC and Relationship with MKY35 MKY35 is a kind of satellite IC that constitutes the HLS Be sure to read Hi speed Link System Intro duction Guide before understanding the MKY35 and this manual The MKY35 must be assigned individual satellite addresses SAs
32. alues CWRUN and CCWRUN every 64 clock periods of the reference clock for a PWM signal Consequently and regardless of the operating conditions of the PWM circuit hazards or abnormal short pulse does not occur on output signals from the PWM circuit even if the Power values CWRUN and CCWRUN are changed The level transition of DIR DIRection and POI Pwm On Invert inputs is reflected immediately in the CWP CCWP CWON and CCWON outputs Therefore StepTechnica advises the user not to change DIR and POI input levels when the PWM function is activated If the user wants to change the DIR and POI input levels during operation of the PWM function change them carefully to pre vent hazards on abnormal pulse from occurring on the output signals of the PWM circuit When designing a system in which switching type power controller power MOSFET and TRIAC etc are driven by CWP CCWP CWON and CCWON output signals refer to the section 5 2 AC Characteristics and design the system to prevent any trouble Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 3 2 6 Application Example of PWM Circuit Operation 1 Figure 4 12 shows an example of control brightness of electric bulb using the PWM circuit N E Power 111111B 3FH 1 Bulb CCWON 1015 o CCWP 1013 N Oscillator 4 kHz t CWON lo14 Power 001111B OFH Y CWP 1012 MOSFET etc Power 0000008
33. are connected to the Io pins of all MKY35s the state of 64 sensors 16 sensors x 4 MKY35 is stored to memory in the center IC with a scan time intervals of 60 7 us 12 Mbps full duplex keeping data up to date This speed remains unchanged even if the farthest MKY35 is 100 m distant Even if the position detection sensors are placed at every 5 cm they can detect the position of every box on the belt conveyor without mistakes even when the conveyor runs at 823 m s 22900 km h 2 Reference For details of the scan time refer to Scan Time in the User s Manual for the center d IC connecting the MKY35 1 5 Features of MKY35 This section describes the basic and the expanded functions of the MKY35 1 5 1 Features of Basic Functions of MKY35 as Satellite IC in HLS 1 Miniaturized satellite IC 2 Has 16 Io pins 100 to 1015 for input or output 3 Supports baud rates of 12 6 and 3 Mbps 4 Supports full and half duplex modes 5 Has six pins to set satellite addresses SA for any one of 63 terminals at O1H to 3FH 6 Operates on 5 0 V single power supply and available in 0 5 mm pitch 48 pins 1 5 2 Expanded Functions 1 Has pin that outputs scan response signals 2 Has CLR pin that sets internal output terminals DoO to Do15 Low 3 Has strobe output pins that indicate when to update internal output terminals Do0 to Do15 and a timing to receive internal input terminals 1310 to Di15 The user
34. ax lo max 12 max 10 VoL max lo max CMOS level output Type l With high impedance control CMOS level output VoH min VoL max loL max Iz max VoH min VoL max lOH loL max Fig 2 2 Pin Electrical Characteristics in Circuit Types of MKY35 T STE HNICA CO LTD MKY35 User s Manual Chapter 3 Connecting Basic Functions of MKY35 This chapter describes the pin functions and connections required to operate the basic functions of the MKY35 3 1 3 2 3 3 3 4 3 5 3 6 Driving A E 3 3 Hardware 3 6 Setting Satellite Addresses sss 3 6 Connecting Network Interface ccce 3 7 Selecting Operation Mode of 5 3 9 Connection Example of MKY35 Basic Functions 3 14 Chapter 3 Connecting Bacsic Functions of MKY35 TEP S TECHNICA Co LTD Chapter 3 Connecting Basic Functions of MKY35 This chapter describes the pin functions and connections required to operate the basic functions of the MKY35 3 1 Driving Clock This section describes the MKY35 driving clock
35. aximum Ratings Vss 0 V Parameter Power supply voltage VDD 0 3 to 7 0 V Input voltage Vi Vss 0 3 to VDD 0 3 V Output voltage Vo Vss 0 3 to VDD 0 3 V Output current Co lop Peak 12 mA Output current STB1 STB2 TXD TXE lop Peak 36 mA Output current 100 to lo15 MON lop Peak 48 72 mA Allowable power dissipation PT 327 mW Operating temperature Topr 40 to 85 C Storage temperature Tstg 55 to 150 C Table 5 2 lists the electrical ratings of the MKY35 Table 5 2 Electrical Ratings Parameter Conditions TA 25 C Vss 0 V Operating power supply voltage 5 0 Mean operating current Vi VDD or Vss Driving clock 50 MHz 25 output open External input frequency Input to Xi pin 48 Oscillation operating frequency Xi Xo oscillator connecting 24 or 48 Oscillation feedback resistance VI VDD or Vss VDD 5 0 V 1 70 Input pin capacitance Output pin capacitance I O pin capacitance Vi 0 V f 1MHz TA 25 C Rise fall time of input signal Rise fall time of input signal Schmitt trigger input S TECHNICA Co LTD 5 2 AC Characteristics 5 User s Manual Table 5 3 lists the measurement conditions for AC characteristics of the MKY35 Table 5 3 AC Characteristics Measurement Conditions Output load capacitance Power supply voltage
36. ctivated 2 After that when the pin receives command packet self addressed CP transmitted from the center IC to addresses matching SAs set to to IAS correctly it goes Low 3 After that when the pin cannot receive self addressed CP within a given time it goes High The given time mentioned above varies with the HLS operating state It ranges from 393216 x driving clock min to 458752 x driving clock max Table 4 1 lists the given time for the driving clock Table 4 1 Given Time for MON Pin to Change to High BPSS Low level BPSS High level Xi Pin frequency Driving clock Min time Max time Driving clock Min time Max time 8 192 ms 9 557 ms 16 384 ms 19 115 ms 16 384 ms 19 115 ms 32 768 ms 38 229 ms 32 768 ms 38 229 ms 65 536 ms 76 459 ms Reference In a user system using output signals from the MON pin as time up signals for a watchdog timer set the minimum time as the time up STE HNICA CO LTD MKY35 User s Manual 4 1 2 Indication of Scan Response When the LED that goes on at a Low level is con nected to the pin pin 46 it indicates that the MKY35 has responded to a scanning from the center IC The MON pin has a drive capacity of 8 mA If the LED can go on even at 8 mA or less the connec 470 Q Approx 8 mA 5 0V tion in Figure 4 1 is possible In this case the hard ware designer of the terminal with t
37. cuit out put PWM signals The CWON Clock Wise ON and CCWON Counter Clock Wise ON output pins output PWM enable sig nals The DIR DIRection POI On Invert CWRUN Clock Wise RUN and CCWRUN Counter Clock Wise RUN input pins control the output of PWM signals The ECS External Clock Select input pin selects the reference clock for the PWM signal The EBC External Base Clock input pin supplies the reference clock for the PWM signal When the input state of the DIR POI ECS and EBC pins are set Low the PWM circuit executes the follow ing basic operation 1 When the CWRUN internal output terminal is set High the CWON 1014 pin is set High and the PWM signal is output from the CWP 1012 pin 2 When the CCWRUN internal output terminal Do7 is set High the CCWON 1015 pin is set High and the PWM signal is output from the CCWP 1013 pin 3 When both the CWRUN and CCWRUN are set High no pulse is output from the CWP and CCWP and the CWON CCWON CWP and CCWP are set Low 4 A clock with a frequency of 1 512 of the MK Y35 driving clock is used as a reference clock to gener ate a PWM signal Table 4 2 shows the driving clocks reference clocks of PWM signals and clock periods Table 4 2 Driving Clocks Reference Clocks of PWM Signals and Clock Periods BPSS Low level BPSS High level Xi Pin fre Reference clock PWM Signal Reference clock PWM Signal quency 9 of PWM circuit period 9 of PWM ci
38. d character will not be omitted Fig 4 6C 7 di Center Satellite Center Satellite Command Command oe STB2 STB2 wie 1228 STB2 STB2 PS Non updated data B B recognized an Non updated 1 STB2 data left Y STB2 es C lost Error in control word STB2 aa STB2 not generated E p AN E C retransferred automatically x ho STB2 STB2 E E p p STB2 E E Fig 4 68 Handshaking Disabled Fig 4 6C Handshaking Enabled STE HNICA CO LTD MKY35 User s Manual 4 2 4 2 Cautions for Sending Character String Data This section describes the cautions for sending character string data when handshaking is enabled with the SSB pin set Low As described previously enabling handshaking ensures that character string data is sent without omitting character to memory in the center IC In this case the user system program of the center IC must obtain character string data from memory in synchronization with scan timing For the example in Figure 4 6C note the following 1 If character string data is simply obtained from memory in synchronization with the scan timing the character string data including duplicated characters like ABBCDE may be read because the third character cannot reach at the third scan 2 At the third scan the corresponding satellite IC causes an error that can be recognized b
39. e pins are open they are rec ognized as Low level inputs by the internal pull down resistor IAO to 1 5 Positive Input pins that selects MK Y35 operation mode Set hexadecimal values 0 to 7 OH to 7H The IOS2 pin 1050 to 1082 Positive corresponds to MSB Be sure to set these three pins High or Low When the pins are open they are recognized as Low level inputs by the internal pull down resistor pin that functions as Co pin output pin when any of the IO modes 1 to 6 is selected by the 1050 to IOS2 pins It outputs the MKY35 driving clock pin that functions as POI pin input pin when the Positive PWM mode 1 or 2 is selected by the IOSO to 1052 pins The POI pin is an input pin Connect POI signal supplied to the PWM circuit to the POI pin Be sure to set this pin High or Low when the PWM mode 1 or 2 is selected by the IOSO to 1052 pins MKY35 Hardware reset input pin Keep this pin Low for 10 or more clocks of the Xi pin fre quency right after power on or when resetting hardware intentionally Negative 15 to 18 16 bit general purpose I O pins lod to lois 26029 Positive The input output and function are set based on the setting 20 to 23 31 to 34 of the IOSO to IOS2 pins 35 Positive Be sure to connect this pin to GND manufacturer test pin Input pin that selects driving clock 38 Positive When this pin is open it is recognized as a Low level input by the internal
40. ency is not provided 2 VIH min 3 5 V VIL max 1 5 V 3 Clock with a signal rise and fall times of 20 ns or less 4 Clock with a minimum High level or Low level time of 5 ns or more 5 Clock with jitter component of Within 250 ps when input frequency is 25 MHz or more Within 500 ps when input frequency is less than 25 MHz 6 Frequency accuracy of 1000 ppm 40 1406 or better Chapter 3 Connecting Bacsic Functions of MKY35 ST ECHNICA CO LTD 3 1 3 Selecting Driving Clock When the BPSS BPS Select pin pin 38 is Low the driving clock for 5 is either self generated clock or external clock On the other hand when the BPSS BPS Select pin pin 38 is High the driving clock 15 two divided clock into which the MK Y35 dividing circuit divides the frequency of the self gener ated clock or the external clock Set the BPSS pin and the frequency of the self generated or external clock so that they will match the baud rate to be set to the HLS center IC connecting the MK Y35 Table 3 1 Table 3 1 Correspondence between Driving Clock and Baud Rate BPSS Low level BPSS High level Frequency at Xi pin Driving clock Baud rate Driving clock 3 1 4 Checking Driving clock The Co Clock out pin pin 11 of the MK Y35 is connected like an internal equivalent circuit shown in Fig ure 3 1 When the MKY35 is in IO mode 1 to 6 the driving clock can be checked by the Co pin The dri
41. ernal Structure The MKY35 has a standard satellite IC core and also has 16 Io pins 100 to 1015 and three IOS IO Select pins Fig 1 2 The standard satellite IC core has 16 internal input terminals Di and 16 internal output terminals Do but these terminals are not connected directly to the external pins These input and output terminals are con nected to the Io pins 100 to 1015 or external pins by setting three IO select IOS pins e gt 100 to 1015 16 bit lo pins IAO to 1 5 1050 to 10 2 Satellite address setting pins Mode select pins Fig 1 2 Internal Structure of MKY35 2 Reference For details of the connection between the Io pins 100 to Io15 and internal input or output terminals by setting the IOS pins refer to 3 5 Selecting Operation Mode of MKY35 1 3 Procedure for Operating MKY35 The 5 is a passive IC and it is operated by remote control from center ICs In an HLS where a center IC continues to scan the user system for access to center ICs to use the MKY35 is very simple 1 The user system just writes data to memory in the center IC when it wants to change the state of the internal output terminals Do0 to Do15 of the MKY35 For example when a relay is connected to the Io pin to which internal output terminals Do0 to Do15 of the MKY35 is connected the user sys tem program simply writes data to memory in the center IC only when it wants to turn the relay
42. ersal counter is in external gate mode In this mode the signal supplied to the Gate 105 pin from outside the MKY35 is used as the gate signal described in 4 3 4 2 Internal Gate 1 Mode Figure 4 18 shows an equivalent circuit in the external gate mode Prepare the gate signal supplied to the Gate 105 pin according to the user system Temporary register Enable Gate signal 00 CRST Gate signal supplied from outside MKY35 Fig 4 18 Equivalent Circuit in External Gate Mode Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 3 4 5 Application Example of Gate Counter Figure 4 19 shows an example of application using the gate counter This shows a circuit with rotational speed detection of the DC motor as well as rotation control of the motor using the PWM circuit described in section 4 3 2 7 Application Example of PWM Circuit Operation 2 In this example a transmission optical sensor detects the rotational state of the fan driven by motor rotation and the output of the optical sensor is input to the Ci 104 pin of the universal counter The count mode is the internal gate 2 mode If a baud rate of 6 Mbps is set for the MKY35 the gate time of the counter is about 1 398 If the optical sensor detects four fan blades and the count value within gate time is 188 OBCH the calculation 188 4 1 398 s x 60 s shows that the fan rotates at 2017 rpm 12V MKY35 oO
43. es commands other than 0 or 8 basic function specified for the MKY35 no strobe signal is output from the STB2 pin If the MKY35 is set in the PWM mode described later the SSA input pin forcibly retains Low internally STB2 signal is generated before STB1 signal and the SSB input pin forcibly retains High internally hand shaking disabled STE HNICA 5 User s Manual 4 3 PWM Modes This section describes two types of PWM Pulse Width Modulation modes described in 5 in 1 5 2 Expanded Functions 4 3 1 PWM Mode 1 The 5 is set in PWM mode 1 when the IOS2 pin set High the IOS1 pin High and the IOSO pin Low In PWM mode 1 a PWM circuit is inserted between the internal output terminals 000 to Do7 and the Io pins 1012 to 1015 Fig 4 9 Pins 11 and 42 which are the Co output pin and STB2 output pin in the IO mode function as the input only pins POI Pwm On Invert and EBC External Base Clock of the PWM circuit pins 39 and 40 which are the SSA input pin and SSB input pin in the IO mode function as the input only pins DIR DIRection and ECS External Clock Select of the PWM circuit In PWM mode 1 the internal output terminals Do8 to 11 and internal input terminals Di0 to Di7 can be used just as those in the IO mode Satellite IC core MKY35 0015 gt 0014 gt Do13 5 0012 pe Dott 23 011 i 0010 22 1010 Do9
44. function as the input only pins DIR DIRection and ECS External Clock Select of the PWM cir cuit In PWM mode 2 a universal counter is also inserted between the internal input terminals 210 to Di11 and the Io pins 104 to 107 Fig 4 14 and the internal output terminals Do8 to Do11 can be used just as in the IO mode The Io pins 100 to 103 are connected to the internal input terminals Di12 10 Di15 The oper ation of the PWM circuit in PWM mode 2 is the same as that in PWM mode 1 For details refer to 4 3 2 PWM Circuit Satellite IC core MKY35 1777 Dots gt 0014 gt Do13 0012 gt _ Dott 1011 2 Do10 1010 5 109 20 108 2 Dor i ccwrUN PWM it ae Do6 CWRUN powers CCWON 34 1015 3 Do4 power CWON 1014 2 power3 32 013 9 i Power2 31 1012 Clock with fi adn EBC WI requency of 1 512 of driving clock ECS 40 ECS gt POI 0115 18 103 0114 17 102 16 101 5 15 100 E IUE VEA 2 Dit Universal 5 00 010 counter i 3 049 Di8 3i Q8 CM1 29 07 3 Di7 e a lo6 5 Di6 44 a6 Gate amp CRST 27 05 gt 5 Ci 104 i Di3 4 34i a3 i Reference clock DIR 39 DIR i Di2 Q2 Fig 4 14 PWM Mode 2 Caution If the MKY35 is set
45. g 4 12 Example of Controlling Bulb Using PWM 4 17 Fig 4 13 Example of Motor Control Using PWM Function eene 4 18 Fig 414 PWM 2 e icai 4 19 Fig 4 15 Equivalent Circuit in Free Count 4 21 Fig 4 16 Equivalent Circuit in Internal Gate 1 4 22 vii STE CASE HO 5 User s Manual Fig 4 17 Operation of Gate 4 23 Fig 4 18 Equivalent Circuit in External Gate Mode eene 4 24 Fig 4 19 Example of Feedback Control of Rotational Speed 4 25 Tables Table 2 1 Pin Functions ot nk aud 22 cR aad da 2 4 Table 2 2 Electrical Ratings of MKY35 eese eene nennen nnn 2 6 Table 3 1 Correspondence between Driving Clock and Baud Rate 3 5 Table 3 2 5 Operation Modes 3 10 Table 4 1 Given Time for MON Pin to Change to High eese 4 3 Table 4 2 Driving Clocks Reference Clocks of PWM Signals and Clock Periods 4 14
46. g of STB1 signal Frovous New sata id Passage of time STB1 i EE 1 4 TSTB 100 to lo15 set to output TSTB must be twice the time of TBPS 333 3 ns at 24 MHz Fig 4 3 Update Timing of Internal Output Terminals DoO to Do15 ERR The pulse like strobe signal output from the STB1 pin is unaffected by the command value n of the center IC The strobe signal is also output from the STBI pin if the state of the inter nal output terminals after updating is identical to that before updating 4 2 2 Time to Sample State of lo Pin STB2 Pin If the command in the CP issued from the center IC is 0 when the response packet RP is returned in response to the command packet CP matching the SA the MKY35 samples the internal input terminals 210 to 215 The MKY35 outputs a pulse like strobe signal from the STB2 STroBe 2 pin pin 42 to indicate the time to sample the state of the internal input terminals 1310 to Do15 The state of the internal input terminals DiO to Dil5 is sampled at the beginning of the strobe signal Since the bits of the internal input terminals that are not connected to the Io pins are connected to GND the bit value of data to be sent to the center IC is 0 5 Reference When the SSB Strobe Select B pin described in 4 2 4 Enabling Disabling shake SSB Pin is Low no strobe signal may be output from the STB2 pin when the 5 return
47. he MKY35 needs Green LED to determine the current limiting resistor value according to the LED rating Fig 4 1 Indication of Scan Response StepTechnica recommends a green LED indicating stability be connected to the MON pin When not used leave this pin open 4 1 3 Watchdog Timer The function of the MON pin changing from Low to High after the given time has elapsed time up can be used as a watchdog timer for the terminal with the MKY35 embedded Generally the time up time of a watchdog timer needs to be set longer than the allowable time of multiple scan times However the time up time of the MON pin may be inappropriate in the following cases 1 For the user system where HUBs are inserted into network One scan time increases according to the inserted number of HUBs 2 When user program operating center IC pauses scanning 3 When user program operating center IC uses single scan and starts single scan according to inappro priate timing for time up time of watchdog timer 4 When user program operating center IC stops scanning intentionally The user should determine whether the time up time of the pin is appropriate for the user system Ref For details of the scan time scan pausing and single scan refer to User s Manual for KeTerence the center IC that 5 is connected to Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 1 4 CLR Pin Functi
48. in the PWM mode the SSA input pin forcibly retains Low internally STB2 signal is generated before STB1 signal and the SSB input pin forcibly retains High internally handshaking disabled The Co output and STB2 output cannot be used STE HNICA CO LTD MKY35 User s Manual 4 3 4 Universal Counter The universal counter inserted between the internal input terminals Di0 to 0111 and the Io pins 104 to 107 in PWM mode 2 has a 12 bit binary up counter The 12 bit count values are connected to the internal input terminals DiO to Dill When a terminal in PWM mode 2 is connected to the HLS network the user sys tem can remotely reference the count values by reading memory data in the Di area in the center IC The operating specifications for the universal counter are as follows 1 The Low to High transition of a signal input to the Ci pin connected to the Io4 pin is counted from 000H to FFFH 2 When the Low to High transition is input to the Ci pin following FFFH counting starts with OOOH 3 The High level and Low level widths of a signal input to the Ci pin should be longer than 1 5 x TBPS For example if the baud rate is 12 Mbps the High level and Low level must be 125 ns or more 4 When the 5 hardware reset is activated the count value is reset to OOOH The universal counter has four count modes shown in Table 4 3 The count mode varies depending on the combination of levels of the CMO pin co
49. is set High and the PWM signal is output from the CWP 1012 pin 4 3 2 4 Function of POI Pin The POI Pwm On Invert pin of the PWM circuit reverses the logic of the CWON and CCWON outputs to output a PWM enable signal When the POI pin is Low the CWON and CCWON outputs are set High to output a PWM enable signal refer to 1 and 2 described in 4 3 2 1 Basic Operation of PWM Circuit When the POI pin is High the CWON and CCWON outputs are set Low to output a PWM enable signal Fig 4 11 In addition when the POI pin is High 3 described in 4 3 2 1 Basic Operation of PWM Cir cuit is changed as follows When both the CWRUN and CCWRUN are set High no pulse is output from the CWP and CCWP and the CWON and CCWON are set High and the CWP and CCWP are set Low Enable output when POI Low CWON Output level Enable output when POI High CWON Output level Passage of time 10 0 Passage of time H 0000000 1 assage of time Erba Passage of time Enable Caution Fig 4 11 Reverse of Logic of Enable Signal When not reversing the enable signal using the POI pin be sure to keep the POI pin Low so that it does not enter the open state S TECHNICA Co LTD MKY35 User s Manual 4 3 2 5 Cautions for Using PWM Function This section describes the cautions for using the PWM function 1 2 3 The PWM circuit recognizes the Power v
50. l Ratings of MKY35 Negative logic Xo VDD 1 SSA DIR 1 2 SSB ECS STB1 1 4 STB2 EBC 1 5 TXD 1050 1051 1052 MON Co POI CLR GND Xi cjoj o oci o nmi gt gt gt gt gt gt gt gt gt gt gt gt CMOS level input Type A 30 kQ pull down schmitt trigger Type B CMOS level input Vt typ min Vt typ ViL max min min liL max max liL max Rpu typ 30 min 12 KQ max 75 KQ CMOS level input 30 pull up schmitt trigger CMOS level input Schmitt trigger max 3 5 V Vt max typ 2 9 V typ Vt typ 2 1 V Vt typ i 1 5 i min AVt min 0 8 AVt min max max liL max liL max Type C Type D Rpu typ 30 KQ min 12 KQ max 75 KQ min min max VIL liL max VoL VoL max max lo max lo max 12 max 12 Fig 2 2 Pin Electrical Characteristics in I O Circuit Types of MKY35 Chapter 2 5 Hardware SF ECHNICA CO LTD Type G CMOS level input output Type H CMOS level output min ViL max max liL max min VoL max m
51. l counter i i register Counter Di11 i 85 i pg 17 22 abriam 5 i i CO 04 i i 1 NES 05 4 i Dige RB 03 i 5 Count D i i i Enable i Dit 1 i 00164 i Oa i Gate signal i Dividing i Driving clock 4 gt creuit q Fig 4 16 Equivalent Circuit in Internal Gate 1 Mode Unused input pin The output pins of the temporary register are connected to the internal input terminals 210 to Dil1 When the MKY35 hardware reset is activated the temporary register is reset to OOOH The counter unit operates for the gate signal as follows Fig 4 17 1 The Low to High transition of a signal input to the Ci pin connected to the 104 pin is counted while the gate signal is High 2 When the gate signal transits to Low the count value is held in the temporary register 3 When the gate signal transits to High the counter is reset to OOOH and gets ready for the next count of input to the Ci pin Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 1 2 Passage of time Gate signal Not counted during this period c BERBER BORER ENEAN ERE DiO Di11 Count value within T1 period Count value within T2 period Me 2 Fig 4 17 Operation of Gate Counter Table 4 4 lists the gate time
52. lationship Diagram for MKY35 S TECHNICA Co LTD Caution MKY35 User s Manual 1 The MKY35 oscillation frequency ranges from 20 MHz to 50 MHz If the driving clock frequency outside this range is required use the generated clock described in 3 1 2 Supplying Generated Driving clock 2 Some oscillator types may need to be inserted a dumping resistor DR between the Xo and oscillator 3 The allowable oscillating frequency accuracy is within 5 for a frequency four times the baud rate If the frequency accuracy is low the allowable length of the network cable to the center IC may be short To prevent this StepTechnica recommends a crys tal oscillator be used to maintain the accuracy within 1 4 To recognize the oscillating state and measure the oscillating frequencies use the CO pin with the MKY35 being in IO mode 1 to 6 StepTechnica provides some technical information such as an appropriate capacitance for the oscillator how to stabilize oscillation For more information visit our Web site at www steptechnica com 3 1 2 Supplying Generated Driving Clock An oscillator generated external clock can be supplied directly to the MKY35 and used as the driving clock In this case supply the external clock to the Xi pin pin 48 of the MKY35 and leave Xo pin pin 1 open The specifications for direct supplying the external clock are as follows 1 The upper frequency is 50 MHz and a lower frequ
53. lues to the 5 use hexadecimal numbers from 01H addresses 1 to 63 assuming a High level is input to to IAS pins 2 to 7 as 1 and a Low level is input as 0 The most significant bit is IA5 pin 7 These SA settings correspond to the memory addresses in each area in the center IC Example 1 The state of the internal input terminal Di of the MKY35 at SA 1 01H is stored at address 02H in the Di area of memory in the center IC Example 2 The state of the internal input terminal Di of the MKY35 at SA 63 is stored at address 7 in the Di area of memory in the center IC the order in which they are closer to the center IC If the center IC has two input pins RXDI and RXD2 there are no rules such as which pin network the MKY35 in which specific SA values are set is connected to Caution The different SA values must be set to all satellite ICs connected to center ICs The SA value cannot be set to OOH Even if the SA value of is set to a satellite IC by mistake the system 15 not adversely affected but the satellite IC is not scanned by the center IC Chapter 3 Connecting Bacsic Functions of MKY35 ST ECHNICA CO LTD 3 4 Connecting Network Interface The network interface network I F pins of the 5 consist of RXD pin 45 TXE pin 44 and TXD pin 43 3 4 1 Details of RXD TXE and TXD Pins In the MKY35 the RXD pin inputs a co
54. mmand packet CP from the center IC Connect the TRX driver receiver components in the network so that a serial pattern signal for the command packet CP transmitted from the center IC will be input to the RXD pin If the address of the received CP matches the SA set by to IA5 the MK Y35 immediately returns a response packet RP to the center IC The pin goes High while the MKY35 sends the RP When the TXE pin goes high design the TRX so that the enable pin of the TRX is activated thereby enabling the serial pattern signal for the RP output from the TXD pin to be transmitted to the network The pin of the MKY35 outputs High level or Low level pulses comprising the RP during sending the RP The TXD pin goes high impedance when the TXE pin is Low the RP is not transmitted and a hard ware reset is activated enabling wired OR connection when implementing multiple MKY35s on the same circuit board Drive input pins of the TRX driver are pulled up within the driver which allows the TXD pin to be connected to the drive input pin directly When connecting the TXD pin to the drive input pin of a driver not pulled up internally pull it up or down When the hardware reset is activated the TXE pin of the MKY35 keeps the last level The pin always goes Low whenever the hardware reset is canceled i When the HLS operates in half duplex mode the signal output from the TXD pin of the 5 may be input directly to
55. nect the internal input terminals that are not connected to the Io pins to GND 0 and leave the internal output terminals that are not connected to the Io pins open S TECHNICA CO LTD MKY35 User s Manual 3 5 2 List of Operation M odes Table 3 2 lists the MKY35 operation modes IO mode 1 Table 3 2 MKY35 Operation Modes 1050 operation Input output Connection of 100 to 1015 pins etc mode 100 to 1015 pins 010 to 0115 IO mode 2 100 to 1011 pins gt 010 to 0111 0012 0015 gt 1012 to 1015 10 mode 3 100 to 107 pins gt 00 to Di7 Do8 to Do15 108 01015 IO mode 4 100 to 103 pins 010010 Di3 Do4 to 0015 104 to 1015 IO mode 5 100 101 pins DiO to Dif Do2 Do15 gt 02 to 1015 IO mode 6 DoO 0015 100 to lo15 PWM mode 1 Refer to 4 3 1 PWM Mode 1 PWM mode 2 Refer to 4 3 3 PWM Mode 2 Caution Do not leave the Io pins set to input in the user system open Keep these pins High or Low For the unused Io pins of those set to output in the user system leave them open Chapter 3 Connecting Bacsic Functions of MKY35 ST ECHNICA CO LTD 3 5 3 IO Modes 1 and 2 Figure 3 5 and Figure 3 6 show the internal connections in IO mode 1 and IO mode 2 respectively MKY35 MKY35 Satelite IC core Satelite IC core 0015 gt Do15 gt 0
56. nnected to the Io6 pin and the 1 pin connected to the Io7 pin Table 4 3 Count Modes Free count mode CRST Internal gate 1 mode Should be kept High Low Unused input Should be kept High or Low Internal gate 2 mode Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 3 4 1 Free Count Mode When the CMO 106 pin 107 pin are Low the universal counter is in free count mode In this mode the Low to High transition of a signal input to the Ci 104 pin is counted while the CRST 105 pin of the universal counter is High When the CRST pin goes Low the 12 bit binary up counter in the univer sal counter is reset to OOOH The Low to High transition of a signal input to the Ci pin 104 is not counted while the CRST pin is Low Figure 4 15 shows an internal equivalent circuit in free count mode The count value is reset when a Low level is input Fig 4 15 Equivalent Circuit in Free Count Mode S TECHNICA Co LTD MKY35 User s Manual 4 3 4 2 Internal Gate 1 Mode When the CMO 106 pin is High and the CM1 107 is Low the universal counter is in internal gate 1 mode In this mode a clock with a frequency of 1 4 194 304 222 of the MKY35 driving clock is generated as gate signal Figure 4 16 shows an internal equivalent circuit in the internal gate 1 mode ee te eG ae MKY35 9 i Temporary Universa
57. om the MON pin as a watchdog timer to the CLR pin Fig 4 2 Connection Example between MON Pin and CLR Pin Caution Read and understand the description in 4 1 3 Watchdog Timer before using this circuit example STE HNICA CO ITD MKY35 User s Manual 4 2 Setting Strobe Signal and its Application This section describes how to use the following two functions among the expanded functions described in 1 5 2 Expanded Functions 3 Has strobe output pins that indicate when to update internal output terminals 000 to 15 and timing to receive internal input terminals Di0 to 2115 The user can design peripheral circuit based on each update timing 4 Can set handshake to ensure link with center IC 4 2 1 STB1 Pin Function Each time the MKY35 receives the command packet CP matching the SA from the center IC correctly it outputs data in the CP to the internal output terminals Do0 to Do15 of the MK Y35 The state of the inter nal output terminals Do0 to Do15 is updated at 1 4 to 1 2 timing of the pulse like strobe signal from the STB1 STroBe 1 pin pin 41 Fig 4 3 Consequently the state of the Io pins set to output also changes around the same time The function of this STB1 pin can be used to notify a circuit connected to the Io pins set to output that the output state is updated f N The internal output terminals Do0 to Do15 is updated at 1 4 to 1 2 timin
58. on The MKY35 has a CLR CLeaR pin pin 47 that forcibly sets the internal output terminals Do0 to Do15 Low When a High level is input to the CLR pin all the states of the internal output terminals Do0 to Do15 go Low Accordingly of the 16 Io pins 100 to 1015 the Io pins connected to the internal output terminals Do0 to 15 by setting the IOS IO Select pins are also set Low In normal operation design so that a Low level is input to the CLR pin If a period in which the High level signal has been input is less than one clock the signal is ignored to prevent malfunctions The state of the internal output terminals Do0 to Do15 of the MKY35 is updated each time the command packet CP from the center IC transmitted to the addresses matching the SAs set by the to IA5 pins is received correctly However if scanning is stopped for reason such as the disconnection of a network cable or center IC faults the state of the internal output terminals Do0 to Do15 is retained continuously In a user system in which the state of the internal out put terminals Do0 to Do15 is retained inappropri ately when scanning is stopped the MKY35 can use the CLR pin to forcibly clear the state of the internal 470 Approx 8 mA output terminals Do0 to Do15 Low level Figure 5 0 4 2 shows an example of clearing the state of the internal output terminals Do0 to Do15 by connect Green LED ing the signal fr
59. package B North America Distributor Trans Data Technologies Inc 340 Arthur Ave Roselle IL 60172 Telephone 630 440 4075 Facsimile 630 539 4475 e mail info steptechnica us http www steptechnica us E Developed and manufactured by Step Technica Co Ltd 757 3 Shimo fujisawa Iruma shi Saitama 358 0011 TEL 04 2964 8804 FAX 04 2964 7653 http www steptechnica com info steptechnica com Hi speed Link System Satellite IC MKY35 User s Manual Document No STD HLS35 V6 2E Issued April 2009
60. plication Example of PWM Circuit Operation 1 4 17 4 3 2 7 Application Example of PWM Circuit Operation 2 4 18 CERCA inp 4 19 4 3 4 Universal Co niter 5 neces e eicere coded realen er cuin aeger i Mara nenna 4 20 4 3 4 1 Free Count ae es 4 21 4 3 4 2 Internal Gate 1 Mode 4 22 4 3 4 3 Internal Gate 2 4 24 4 3 44 External Gate 4 24 4 3 4 5 Application Example of Gate 4 25 4 3 4 6 Application of Gate Counter eese esee nennen nennen nnns 4 26 Chapter 5 Ratings 5 1 Electrical 5 3 5 2 Characteristics 5 4 5 2 1 Clock and Reset Timing ZRST 5 4 5 2 2 Baud Rate Timing TXD 5 5 5 2 3 Strobe l O Pin Timing 100 to 1015 in out STB1 STB2 CLR 5 6 5 2 4 PWM Output Transition Timing CWON CCWON CWP CCWP 5 6 5 2 5 Universal Counter Timing Free Count Mode CRST Ci 5 7 5 2 6 Universal Counter Timing External Gate Mode Gate Ci
61. rcuit period 93 7500 kHz 1 465 kHz 46 8750 kHz 732 42 Hz 46 8750 kHz 732 42 Hz 23 4375 kHz 366 21 Hz 23 4375 kHz 366 21 Hz 11 71875 kHz 183 11 Hz 4 3 2 2 Functions of ECS and EBC Pins The ECS External Clock Select pin of the PWM circuit selects and sets the reference clock to generate a PWM signal as follows 1 When the ECS pin is set Low a clock with a frequency of 1 512 of the driving clock of the MKY35 is used as a reference clock for a PWM signal Table 4 2 2 When the ECS pin is set High the clock supplied to the EBC External Base Clock pin is used as a reference clock for a PWM signal The maximum frequency that can be input to the EBC pin is 50 MHz and the minimum High level and Low level widths are 10 ns Caution In 1 above keep the EBC pin High or Low so that it does not enter the open state Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 3 2 3 Function of DIR Pin The DIR DIRection pin of the PWM circuit replaces the direction concept indicated by CW Clock Wise and CCW Counter Clock Wise When the DIR pin is High operations 1 and 2 described in 4 3 2 1 Basic Operation of PWM Circuit change as follows 1 When the CWRUN internal output terminal Do6 is set High the CCWON 1015 pin is set High and the PWM signal is output from the CCWP 1013 pin 2 When the CCWRUN internal output terminal Do7 is set High the CWON 1014 pin
62. s corresponding to the driving clock frequencies When using the internal gate 1 mode the Io5 pin serves as an unused input pin Keep it High or Low Table 4 4 Gate Times in Internal Gate 1 Mode BPSS Low level BPSS High level in Driving clock Gate signal Gate time Driving clock Gate signal Gate time 11 444 Hz 43 69 ms 5 722 Hz 87 38 ms 5 722 Hz 87 38 ms 2 861 Hz 174 76 ms 2 861 Hz 174 76 ms 1 430 Hz 349 53 ms STE HNICA CO ITD MKY35 User s Manual 4 3 4 3 Internal Gate 2 Mode When the CMO 106 pin is Low and 107 is High the universal counter is in internal gate 2 mode In this mode a clock with a frequency of 1 67 108 864 226 of the MKY35 driving clock is generated as a gate signal The difference between the internal gate 2 mode and internal gate 1 mode is a period and High level width of the gate signal and the equivalent circuit and counter operation are identical Table 4 5 lists the gate times corresponding to the drive clock frequencies When using the internal gate 2 mode the Io5 pin serves as an unused input pin Keep it High or Low Table 4 5 Gate Times in Internal Gate 2 Mode ond Driving clock Gate signal Gate time Driving clock Gate signal Gate time 0 7153 Hz 0 3576 Hz 0 3576 Hz 0 1788 Hz 0 1788 Hz 0 0894 Hz 4 3 4 4 External Gate Mode When the CMO 106 pin and CM1 107 pin are High the univ
63. s the RP Chapter 4 Expanded Functions of MKY35 TEP S TECHNICA Co LTD 4 2 3 Setting Strobe Signal Timing SSA Pin The following two requests occur in the user system using the HLS 1 To update output state of Io pins set to output after sampling input state of Io pins set to input 2 To sample input state of Io pins set to input after updating output state of Io pins set to output In the MKY35 the user can select the timing of strobe signals output from the STB1 pin and STB2 pin by setting the SSA Strobe Select A pin pin 39 This will enable to meet the two requests The MK Y35 per forms the operation in 1 above when the SSA pin is set Low and the operation in 2 above when the SSA pin is set High Fig 4 4 N Setting for input immediately Setting for input immediately before updating output state after updating output state MKY35 MKY35 STB2 STB2 STB1 STB1 SSA SSA 777 Do0 00015 Previous data Old data to Dots Previous data STB1 STB1 5 2 identical STB2 STB2 2xTSTB in with to STB1 Dio to Di15 C Passage of time 00015 Passage of time Input is sampled on the rising edge of STB2 2 Fig 4 4 SSA Pin Setting and Update Timing STE HNICA CO ITD MKY35 User s Manual 4 2 4 Enabling Disabling Handshake SSB Pin Handshaking with the center IC can be enabled or disabled by setting the SSB Strobe
64. te of Io pin into internal input terminals STB2 EBC Positive pin that functions as EBC pin input pin when any of the PWM mode 1 or 2 is selected by the IOSO to IOS2 pins Connect EBC signal supplied to the PWM circuit to the EBC pin Be sure to set this pin High or Low when the PWM mode 1 or 2 is selected by the IOSO to IOS2 pins Pin that outputs response packet to center IC Positive Connect this pin to the drive input pin of a driver This pin goes high impedance when the TXE pin is Low Output pin that goes High while outputting response Positive packet to center IC Connect this pin to the enable input pin of a driver Input pin that inputs command packet sent from center IC Positive Sains Connect this pin to the output pin of a receiver Output pin that outputs scan response state of MK Y35 Negative s Low level is output when a correct scan response is made Input pin that forcibly set all internal output terminals Low Usually keep this pin Low When this pin is open it is recognized as a Low level input by the internal pull down resistor Positive Positive Pin for connection of oscillator or generated clock Power pin connected to 5 0 V Power pin connected to 0 V Note Pins prefixed with are negative logic active Low STE HNICA CO ITD MKY35 User s Manual Table 2 2 and Figure 2 2 shows the electrical ratings of the MKY35 pins Table 2 2 Electrica
65. the center IC between when an error occurs in the response packet and when an error occurs in the command packet An example of sending character string data is shown If an error occurs in the response packet Figs 4 6C and 4 7 the letter C does not arrive at link failure and does arrive at the next normal scan In contrast if an error occurs in the command packet Fig 4 8 the letter B arrives at the center IC twice at the scan before or after link failure 7 Center Satellite Command io STB2 AN 1 22223 STB2 2 2 X STB2 is not generated Di is not sampled 5 2 is not generated Character counter is 2 Di ie n t sampled B i icall which means data ls 2 is retried automatically previous one before updating STB2 3 3 C STB2 4 D 4 D Fig 4 8 Operation at CP Failure As shown in this example in both cases the data sampled by the satellite IC 1 sent to the center IC without loss However based on the difference in data arrival at the center IC the user system program must handle data in the center IC memory Placing a character counter of at least two or more bits as described in 4 2 4 2 Cautions for Sending Character String Data near the MKY35 can help the user system pro gram to deal with this problem 4 2 4 4 Caution for Using Handshaking 2 When the SSB pin pin 40 is set to enable the handshaking and when the user system execut
66. tion of Io pins and the elec tronic conflict between output pins do not occur 3 5 1 Internal Input Terminal and Internal Output Terminal The MKY35 has 16 bit internal input terminals DiO to 0115 and 16 bit internal output terminals DoO to 15 Fig 3 4 lt Standard satellite IC 100 to 1015 16 bit lo pins IAO to IA5 1050 to 1052 Satellite address setting pins Mode select pins Fig 3 4 Internal Input Terminal and Internal Output Terminal The state of the internal input terminals 1310 to 2115 of the MK Y35 is copied to the memory addresses cor responding to the SAs of the Di area in the center IC When the MKY35 receives a command packet CP sent from the center IC correctly and its addresses match the SAs set by the to IA5 pins the MKY35 sets data contained in the CP to the 16 bit internal output terminals Do0 to Do15 The 16 bit internal output terminals go Low before retaining the above data when a hardware reset is acti vated Even after the hardware reset is canceled the internal output terminals are kept Low until the data is updated When the CLR pin described in 4 1 4 CLR Pin Function becomes activated the 16 bit internal output terminals also go Low before retaining the data just as the hardware reset becomes activated 16 Io pins 100 to 1015 are connected to the 16 bit internal input terminals or 16 bit internal output termi nals by setting three IOS IO Select pins Con
67. v ing clock output from the Co pin can be used for purposes other than checking the driving clock However as shown in Figure 3 1 while a hardware reset is activated with the BPSS pin being High the output level of Co pin keeps Low and no clock is output For the MKY35 operation mode refer to 3 5 Selecting Operation Mode of MKY35 4 3 Modes STE HNICA CO LTD MKY35 User s Manual 3 2 Hardware Reset When a Low level is input to the RST ReSeT pin pin 14 the MKY35 is hardware reset If a period in which the Low level signal has been input is less than one clock the signal is ignored to prevent malfunc tion To reset the MKY35 completely the RST pin must be kept Low for 10 or more clock while supply ing a driving clock The RST pin is connected to an internal Schmitt type input buffer so a constant rise time circuit can be connected directly at power on Fig 3 2 No response to Must be kept Low for 10 or more clock periods less than 1 clock Fig 3 2 Hardware Reset Caution Design the circuit so that a hardware reset is surely activated immediately after MK Y35 power on 3 3 Setting Satellite Addresses The 5 has six satellite address SA setting pins to IA5 Input Addresses 0 to 5 Individual sat ellite addresses SA must be assigned to each satellite IC when using the HLS To set the SA va
68. y a nonre sponding flag bit in the control word in the center IC 3 If the above error occurs ideally it should be handled by the algorithm that does not read data How ever since scanning is very fast and such handling must be set for each satellite IC program execu tion speed may not follow scan speed Based on the above cautions a method for easily creating the program algorithm for the center IC is shown below When all the 16 Io pins 100 to 1015 are set to input if eight pins are used to input a character code 8 bit information eight pins are left When a character counter is used for these eight Io pins the program algorithm for the center IC can be created easily Figure 4 7 shows a example of using the high order one byte 8 bits of data as a character counter C Center Satellite Command STB2 1 A Response T STB2 2 B 2 B STB2 2 lt 3 Character counter is 2 which means data is previous one before updating IH is not generated C is retransferred automatically VT 3 STB2 4 D 4 D STB2 5 E 5 E M 2 Fig 4 7 Sending with Character Counter Used Chapter 4 Expanded Functions of MKY35 SF ECHNICA CO LTD 4 2 4 3 Caution for Using Handshaking 1 In the HLS the handshaking function is intended to send data sampled by the satellite IC to the center IC without loss This will cause a difference in data arrival at

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