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MC9S12G128 Controller Board User Guide

1. JP2 PWM AT 1 PWM AB 2 CS Jat PWM BT 3 3 PWM AT 1 2 PWM BB 4 BAM PWM_AB ER AE PWM_CT 51 O PWM BT PWM BT 5 6 PWM CB 6 5V LI 0 0 TE o PWM_BB 7 8 PWM_BB 91 005 J32 PWM_CT PWM_CB 119917 HANG R70 PWM_CB 00 000 RE ELI 1 0K 15160116 R71 Ji 00 27 EG R72 UNIS 12V 15V PWR OUT iE 00 gt A DCBV 5310 047 gt DCBI NN gt HALLO ZCA OG sl 25 5012 TP S C56 k R73 27 28 47PF 33 9 R74 29 9 9130 6 2K BRAKE gt e 3119 O32 470 S e ZCA ENDD ZCB 35 36 ZCC 37 12 9138 1 5V 39 12 9140 BEMF_A 45V BEMFB oo BEMF C Oo J33 JP1 2 R75 000 CON 2X20 E 1 0K E E R76 kile AU K RO 27 ZCB GNDA GNDA os i GE AE ANA gt HALL1 ZCB odg al G57 33K s l HALL SENSORS 47 F i 2 R78 1 2 6 2K EN Sho uS oc S 510015 INT 5V ENDD MC33937 RST SOUT 7 0 O 8 T g Te 55 IC33937_SCK MC33937 CS gt 00 033937 SIN J35 9 R79 000 HDR_2X5 1 0K R80 lle 27 206 R82 iu g T HALL2 ZCC VAN gt oc oc tf gt Mca3937 OC p58 47PF 3 3K gt R84 3 3K gt Re3 T 6 2K 6 2K u30 9 END N GNDD EN R85 IN A 3 gt mMc33937 INT 33K 7 pap 6 2K Pro Freescale Semiconductor RCSC 7 Pod 1 maje 1009 GNDD fr eescale 765 61 Roznov p R Czech republic Europe semiconductor R87 R88 This document contains information proprietary to Frees
2. u2 PAO PAO PPO KWPO ETRIGO PWMO EA paz g PAI PP1 KWP1 ETRIG1 PWM1 PA2 Pa PP2 KWP2 ETRIG2 PWM2 PAS RR PAS PP3 KW P3 ETRIG3 PWM3 S PAS 17 PA4 PPAJKWPA PWMA a re PAG 18 PAS PP5 KW P5 PWM5 FE Pas PPG KWPG PWMG S ot par PP7 KWP7 PWM7 PBO 25 PBO ECLK PTO IOCO FS PBUAPI EXTCLK PTINOCI LS pes op PB2 ECLKX2 PT2 IOC2 LAS um ae PTSOCS aa Pa ARQ 7 pgs 48 PB4IRO PT4 IOC4 Hat prs ppe ag PBSXIRG PTS IOCS 40 Pte PBE PT6 IOC6 HEM PB7 PIGG FE TT PCO PADO KWADO ANO 25 400 PCI PADI KWADI AN1 55 PpApz PC2 PAD2 KWAD2 AN2 31 PANI PC3 PADS KWADS AN3 PET PANI PC4 PADA KWAD4 AN4 PADE PCS PADS KWADS ANS PADE PCS PADG KWADG ANG 69 PAD PC7 PAD7 KWAD7 AN7 FS TT PDO PADB KWADA AN 28202 PDI PADI KWAD9 AN9 PADIO PD2 PAD10 KWAD10 AN10 62 papi PD3 PAD11 KWAD11 AN11 84 PADI PD4 PADI2 KWAD12 H86 PADIS PD5 PAD13 KWAD13 PADIS PDS PAD14 KWAD14 PADIS PD7 PAD15 KWAD15 S PJO KWJO MISO1 82 PS0 PJ1 KWJ1 MOSI1 PSO RXDO RXDO PJ2 KWJ2 SCK1 PS1 TXDO TXDO PI PJ3 KWJ3 5S1 PS2 RXD1 RXD1 KWJ4 PJA KW JA MISO2 PS3 TXD1 TXD1 KWJ5 PJ5 KWJ5 MOSI2 PS4 MISOO MISO0 KWJE Pir PJ6 KWJ6 SCK2 PS5 MOSIO IOSIO KWJ7 PJ7 KWJ7 SS2 PS6 SCK0 CKO PMO 92 PS7 API_EXTCLK SS0 SSO RXCAN PMO RXCAN TXCAN BMS gg PMI TXCAN c23 pms
3. R 1 0K Jt Es Fee E D3 ENDD ENDD 3 HSMG C170 iL ESWL x CON_1_PWR o li TP2 3 3VA MCU VSUP lt 8V 28V gt n 4 AR J VSUP 1 1000 OHM D4 o ols ca L 4VSUP PWR IN A 4 4 1 n2 TUE ee ESWL eli 05 eli C6 or R3 i sZ AR S0UF I GS0UF ano 10 0K GNDA GNDA 0 1UF oja TP3 3 3VD_MCU END ND 1 8 ai 9 2 BCP52 16 i 1 4 D5 R4 ale A g el co E T 3 3VD_MCU RS e our 08 ESWL 1 0K O 1UF 0AUF DE HSMS C170 TND NDD COND R R7 k D7 3 AA C bunn 1 2 zw zz VSUP o ANN oo zs 9 s 8 1 2 I X A a HSMG C170 s re vsui 2 3 z 7 7 wo o bai vsup2 22 x g ae we E3 wem MMSZ8V2T1G ATK NS Rio 0 RIZ 0 U 18 pao most LS Ane MC33905_ MOSI K 20 SCLK Ane MC33905 SCLK L sese MISO Lz NAK MC33905_MISO cs MC33905 CS 14 RH 0 R13 R14 10 0K MUX OUT gt MC33905 MUX OUT AAA AA 3344 vo o i Bab gn E vo1 5V_CAN 10 0K 0 10F x H vo3 12 B8278900513N002 TD 5 TxD LES GNDA JCAN TX CANH bi ka 7 RXD ig CAN RX CANL T WW T q0 CANH TXD L ag LIN TX T 3 SPLIT RXDL LIN_RX ada 4 CANL gt RIE RI7 K S TN E 604 80 4 z Me gu os 2 CON 1x4 ATPF ATPF al Z z x ii Ur R qur O 1UF pb TERMINATE SNP SNP R B MCZ33905BS3EK o lg le lt le E NUP2105L r S O 8885 1002 Lent T O ale GND GND ND bad RIB DIO zi t Too
4. 3 3VD_MCU O L bun C66 0AUF z U14A R96 CC 1 0K pee 1 2 par A ND HSMS C170 MC74HCO4ADG GNDD U14B R98 1 0K D24 3 4 ipo al HSMS C170 MC74HC04ADG U14C R103 1 0K D2 5 6 c NA Kt HSMG C170 MC74HC04ADG U14D R105 1 0K D2 9 8 c NA KYN HSMG C170 MC74HCO4ADG U14E R107 1 0K D3 ti 10 c ANN 1 4 HSMG C170 MC74HC04ADG U14F 13 12 MC74HC04ADG 3 3VD_MCU 9 2 R99 2 R100 R101 4 7K 4 7K 4 7K sw4 EC11J1524802 ROTA AIA pP ROTSW S common ROTB lt T ry Freescale Semiconductor RCSC Ee Pod 1 maje 1009 fr eescale 765 61 Roznov p R Czech republic Europe semiconductor This document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission T Freescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Drawing Title Designer S12G BLDC Development Kit Drawn by Page Title lt DrawnBy gt LEDs and Control Approved Size Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 9 of 9 1 MC9S12G128 Controller Board Schematic MC9S12G128 Controller Board User Guide Rev 1 0 38 Freescale Semiconductor How to Reach Us Home Page www freescale c
5. 2 5 LIN Connector J9 The MC33905 LIN transceiver is used as an on board LIN interface hardware The LIN node can be configured to either the Master or Slave mode see Table 1 1 A Table 2 4 shows the LIN connector pin out and pin assignment to the MCU Table 2 4 LIN Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 GND Ground 2 GND Ground 3 VSUP Power Supply 4 LIN RXD1 TXD1 LIN bus Dig bidirectional 2 6 CAN Connector J5 The system basis chip on the MC33905 CAN transceiver is used as the CAN hardware interface The on board jumpers J6 J7 enable node termination impedance of 120R see Table 1 1 Table 2 5 shows the CAN connector pin out and pin assignment to the MCU MC9S12G128 Controller Board User Guide Rev 1 0 18 Freescale Semiconductor Interface Description Table 2 5 CAN Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 CANH RXCAN TXCAN CAN bus H Diff bidirectional 2 CANL RXCAN TXCAN CAN bus L Diff bidirectional 3 GND Ground 4 NC Not connected 2 7 USB Connector J36 The USB line is used for board communication with the PC when using e g the Freescale FreeMASTER tool to control the user application The interface uses a B type connector and is isolated from the board environment See Table 2 6 for the pin description and pin
6. PWMA LS nr 4 R51 22 0K SN74LVC2G08DCT ANA d 2 c42 100 PF ONDD CTRLA Figure 3 2 PWM Signal Split and Phase Dead Time Generation MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 23 Design Consideration 3 3 Board Fault Management The Faults can be processed either by MCU software or by an on board hardware The action depends on jumper configuration see Figure 3 3 and Table 1 1 J26 J27 J28 J29 There are two sources of Fault condition U6 comparator output high level e FLT DETO fault is triggered whenever the signal level is below limit set by R57 FLT DETI fault is triggered whenever the signal level is above limit set by R69 The FLT DETO can be used for the DC bus undervoltage fault detection The FLT DET is designed for the DC bus overcurrent detection The jumper J29 selects the source of overcurrent fault Either the on board comparator or the power stage overcurrent fault signal e g when using the MC33937A determine the fault condition In fact there are three options of fault processing i e turning OFF power stage the top and bottom switches 1 MCU using the IRQ pin MCU software is responsible for the power stage switches turn OFF 2 Power Stage Enable pin when the fault is captured by U8 the RS Flip Flop the EN signal goes low The power stage is responsible for turning OFF the switches 3 on board hardware when the fault is captured by
7. HS and LS Signal Split and Phase Dead Time Generation The MC9S12G128 MCU PWM module generates one PWM signal per each phase The power stage requires separate PWM signals for each phase top and bottom switch The Figure 3 2 shows how the PWM signals are generated for motor phase A The other motor phases are controlled using the same logic circuitry The PWMA signal is split using the dual AND gate U3 into PWMA HS signal turn ON the power stage top switch when reaches a low level turn OFF the power stage top switch when reaches a high level PWMA LS signal turn ON the power stage bottom switch when reaches a high level turn OFF the power stage bottom switch when reaches a low level In case of need to turn OFF the top and bottom switch simultaneously the CTRLA signal is driven by MCU low level and PWMA signal is driven high level The RC cell and diode are present on board to insert a dead time approximately 2 micro seconds into the phase PWM signal Optionally this can be disabled using on board jumpers see Section 1 3 Board Jumper Configuration 3 3VD_MCU J20 o C38 000 4 non lie 0 1UF D13 3 R45 1 0K BAT54T1G USA PWMA __ gt _4_ _ N A Ce 14 vec 7 i gt PWMA JHS NN GND R46 15 0K SN74LVC2G08DCT al ad 100 PF ONDD ENDD J22 000 lie T U3B D15 5J R49 620 BAT54T1G 3 A
8. gt Turn ON Digital output 9 PWM CT PWM7 Phase C top switch control H gt Turn OFF Digital output 11 PWM CB PWM7 amp PA2 Phase C bottom switch control H gt Turn ON Digital output 2 09 m 10 shield i pod e side only i 12 13 GND D Digital power supply ground 14 15 5V DC 5V digital power supply 17 18 AGND Analog power supply ground 19 12 15V DC Analog power supply us melse NC i Not connected i 21 VDCBUS PAD6 DC bus voltage sensing OV 3 3V Analog input 22 IpcBus PAD1 DC bus current sensing OV 3 3V Analog input PAD3 PAD5 26 TEMP PAD7 Analog temperature OV 3 3V Analog input 29 BRAKE CONT PA5 DC bus brake control Digital output 30 SERIAL Serial interface Dig bidirectional 31 PFC Power factor correction PWM Digital output 32 PFCEN Power factor correction enable Digital output 33 PFCZC Power factor correction Zero cross Digital input 34 ZCA KWP2 Phase A Back EMF zero crossing Digital input 35 ZCB KWP4 Phase B Back EMF zero crossing Digital input 36 ZCC KWP6 Phase C Back EMF zero crossing Digital input 38 Back EMF_A PADO Phase A Back EMF voltage sensing Analog input 39 Back EMF_B PAD2 Phase B Back EMF voltage sensing Analog input 40 Back EMF_C PAD4 Phase C Back EMF voltage sensing Analog input MC9S12G128 Controller Board User Guide Rev 1 0 16 Freescale Semiconductor Interface Description 2 3 MC33937A Interface J34 When using a Freescale 3 phase low voltage powe
9. D3 for the 5V line and D7 for the 3 3V line see Table 1 2 The board is designed to operate in the voltage range from 8 V to 18 V The board is protected against a reverse battery 2 2 UNI3 Interface J31 The Unified Interface Version 3 UNI 3 defines the interface between the MC9S12G128 Controller Board and the BLDC motor power stage The list of UNI 3 signal is as follows e Control signals PWM phase A B C top and bottom switches control Brake signal control Power Factor Correction PFC Monitor signals DC bus voltage DC bus current Phase A B C current Zero cross signals Back EMF phase A B C Temperature monitoring Power Supply 12V Serial line a bidirectional communication line between the Controller Board and Power Stage The Table 2 1 defines the UNI 3 pin out and pin assignment to the MCU MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 15 Interface Description Table 2 1 UNI 3 Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 PWM AT PWM3 Phase A top switch control H gt Turn OFF Digital output 3 PWM_AB PWM3 amp PAO Phase A bottom switch control H gt Turn ON Digital output 5 PWM_BT PWM5 Phase B top switch control H gt Turn OFF Digital output 7 PWM_BB PWM5 amp PA1 Phase B bottom switch control H
10. MCU 3 3VD_MCU m FLTO_OUTT_ 3 3VD_MCU o 3 3VD_MCU R57 R58 10 0K R59 1 0M 9 9 10K 2 AN AN 3 3VD_MCU C49 T C50 c47 3 3VD_MCU bup 4 1 proo i J26 J27 0 1UF NDD NDD R60 Ret cm Le U 0 1UF 900 10 0K 900 10 0K 0 1UF 0 1UF 10 0K K lla dS lln 3 E U7A s VEG Q FLT Q I 1j vec R63 10 0K 3 1 1 wee 7 N E 3 Sen OUT FLTO DET gt Ked U6A 2 GND GND LM393M NL FLT1_OUT lt GND GNDD USA USA cae T MC74AC32DG SN74LVC2G02DCTR EN IN gt I MC74AC08DG GNDD GNDD C53 3 3VD_MCU NDD GNDD 0 1UF GNDD oued l 5 uo J28 VOC NC K B R64 10 0K R65 10 0K R66 1 0M FLT_OUT lt 4 lt ALE i FLT1 DET s jA m 3 R aro PR 3 3VD_MCU GND 3 Q 2 G54 3 3VD_MCU NC78Zi4 T 4700PF o J29 U8B 3 3VD_MCU R67 000 SN74LVC2G02DCTR al 10 0K R68 lele 10 0K 547 B FLT RST gt 6 p U6B NDD xi LM393M NL Configure on board Fault logic GNDD FLT1_DET_ALT gt 1 Select source of OC protection J29 ea 2 MCU IRO based software based Fault logic jumper on J26 pins 2 3 jumper on J27 open jumper on J28 open 3 HW based Fault logic using gate driver MC33972 EN signal to turn OFF MOSFETs jumper on J26 pins 1 2 FLT Q FLT Q jumper on J27 pins 2 3 jumper on J28 open 4 HW based Fault logic using on board logic to turn OFF U7B MOSFETs HS H LS L 2 6 6 jumper on J26 pins 1 2 PWM
11. Rev 1 0 34 Freescale Semiconductor Acronyms Chapter 7 Acronyms ADC Analog to Digital Converter BEMF Back Electromotive Force BLDC Brushless DC Motor CAN Controller Area Network DT Dead Time LIN Local Interconnect Network MCU Microcontroller Unit PC Personal Computer PWM Pulse Width Modulation USB Universal Serial Bus MC9812G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 35 Acronyms MC9S12G128 Controller Board User Guide Rev 1 0 36 Freescale Semiconductor MC9S12G128 Controller Board Schematic Chapter 8 MC9812G128 Controller Board Schematic MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 37 Sheet 4 Sheet 5 Insert Dead time 2us Sheet 6 Configure Fault logic Sheet 7 Configure BLDC motor BEMF and current sensing Select either Hall sensor or Zero Cross based sensing Description Date Initial version 11 01 2012 Release version 13 01 2012 Ce 7 freescale semiconductor Freescale Semiconductor RCSC 1 maje 1009 765 61 Roznov p R Czech republic Europe This document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission T Freescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Dra
12. X cB53 9 9998 X CBUS4 E OOO C64 FT232RL E Is 04UF N Ne N GND USB Pro Freescale Semiconductor RCSC Pod 1 maje 1009 fr eescale 765 61 Roznov p R Czech republic Europe semiconductor This document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission T Freescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Drawing Title Designer S12G BLDC Development Kit Drawn by Page Title lt DrawnBy USB to RS232 Interface Approved Size Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 8 of 9 4 3 2 1 LED1 Y LED2 Y LED3 Y LED4 G LED5 G LED6 G 3 3VD_MCU 0 3 3VD_MCU Q TA L pe C65 0 1UF U13A R95 CC 1 0K pa 1 2 ANA i ND HSMY C170 MC74HCO4ADG GNDD U13B R97 1 0K D23 3 INA B HSMY C170 MC74HC04ADG U13C R102 1 0K D25 5 6 BAR RR al HSMY C170 MC74HC04ADG U13F R104 1 0K D27 13 12 ANN 4 YN HSMG C170 MC74HC04ADG U13E R106 1 0K D29 11 10 14 ANN xx HSMG C170 MC74HC04ADG U13D R108 1 0K D31 9 8 A ANN 4 ll HSMG C170 MC74HC04ADG LED7_R LED8_R LED9 G LED10 G LED11 G 0 3 3VD_MCU
13. and 000 never occur Based on the Hall sensor signal the BLDC motor commutation table is developed An example is shown in Figure 3 6 The right hand side of the table shows the Hall sensors signal while the left side applied phase voltage MC9S12G128 Controller Board User Guide Rev 1 0 26 Freescale Semiconductor Design Consideration Figure 3 5 BLDC Motor Back EMF and Hall Sensor Signal Alignment www Commutation vector vector Vector Hall sensor pattern definition sensor Hall sensor pattern definition definition Hall sensor Hall riang Hall rand Hall rana presi 3 ma me p E ea Lee mm ome PES LL 46 ode 4e B 9 Y 9 e ae 3e ww J H a pj v x ow Loue pow pow AE vw Figure 3 6 BLDC Motor Commutation Table MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 27 Design Consideration MC9S12G128 Controller Board User Guide Rev 1 0 28 Freescale Semiconductor Chapter 4 Electrical Characteristics The electrical characteristics in Table 4 1 apply to an operation at 25 C Table 4 1 Electrical Characteristics Electrical Characteristics Characteristic Symbol Min Typ Max Units Power supply Voltage Voc 8 12 18 V Current consumption lec 30 mA Input Voltage Range VIN 0 3 3 V Input Voltage Range Hall and MC33937 interface VIN 0 5 V 1 12V power supply MCU witho
14. assignment to the MCU Table 2 6 USB Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 VBUS USB Power Supply 2 D RXDO TXDO Data Dig bidirectional 3 D RXDO TXDO Data Dig bidirectional 4 GNDB USB Ground 2 8 Header JP2 Monitoring the PWM signal is possible using JP2 The Table 2 7 summarizes header pin out Table 2 7 JP2 Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 PWM AT PWM3 Phase A top switch control Digital output 2 PWM_AB PWM3 amp PAO Phase A bottom switch control Digital output 3 PWM_BT PWM5 Phase B top switch control Digital output 4 PWM_BB PWM5 amp PA1 Phase B bottom switch control Digital output 5 PWM CT PWM7 Phase C top switch control Digital output 6 PWM CB PWM7 amp PA2 Phase C bottom switch control Digital output 2 9 Header J30 Header J30 allows monitoring the MC33937A EN and OC pins see Table 2 8 MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 19 Interface Description Table 2 8 J30 Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 MC33937 OC Over current Digital input 2 MC33937 EN PA4 Device enable Digital output 2 10 Headers J14 J15 J16 J17 The MC9S12G128 MCU signals can be monitored using headers J14 J15 J16 J17 see board schematic MC9S1
15. costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part Freescale and the Freescale logo are trademarks of Freescale Semiconductor Inc All other product or service names are the property of their respective owners Freescale Semiconductor Inc 2012 All rights reserved MC9S12G128MCBUG Rev 1 0 08 2012 freescale
16. for this document refer to the world wide web at http www freescale com Revision History Table i Revision History Table Date Revision Description level August 2012 1 0 Initial release Documentation The MC9S12G128 documentation is available at the web site http www freescale com as follows Reference manuals MC9S12G128 modules in detail Data sheets information mainly on the device s AC DC thermal characteristics and packages pin out e Product briefs device overview Application notes address specific design issues MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 5 MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor Introduction Chapter 1 Introduction The MC9S12G128 Controller Board is designed to a drive 3 phase BLDC motor enabling implementation of motor control techniques e Sensorless Back EMF signal sensing using an MCU ADC module Back EMF zero cross signal monitoring e Sensor based Hall sensor signal monitoring On board UNI 3 interface enables control of the BLDC motor power stage The LIN and CAN communication interfaces connect the board to the other automotive network nodes The USB interface is targeted at FreeMASTER PC based application control MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 7 Introduction 1 1 Features The MC9S12G128 Controll
17. the U8 RS Flip Flop the U7 and U9 turn OFF the power stage top and bottom switches For configuration see Table 3 1 Table 3 1 Fault Jumper Configuration Responsibility Fault Action Signals J26 J27 J28 Software MCU IRQ pin low level Placed pins 2 3 Unplaced Unplaced Power Stage J34 EN pin low level Placed pins 1 2 Placed pins 2 3 Unplaced Controller Board HW RS Flip Flop signals Placed pins 1 2 Placed pins 1 2 Placed pins 1 2 MC9S12G128 Controller Board User Guide Rev 1 0 24 Freescale Semiconductor Design Consideration z z EI I z 7 3 3VD_MCU 3 3VD_MCU 7 BT aa 3 3VD MCU roi 3 3VD_MCU R57 R58 100K R59 10M 9 10K 2 NAA T co ox car 3 3VD_MCU i E Me Lt bes A f eim E m Hip aa une 000 10 0K 199 10 0K oaut oUF J a i Ae Lp REI 100K 7 Pr JFLTO DET AA 2 4 2 7 oni 2 j ND T ua USK MC74AC32DG SNTALVC2GO2DCTR ENN O gt MC74ACOBDG R ND TN C53 33VD MCU GNDD 0 1UF GNDD am um s vcc NC P vm aries cala n FLT1 DET EE aai d R E pide F 3 3VD_MCU GND 3 3VD MCU NCTSZIA 6 29 uss 3 3VD_MCU R67 000 SN74LVC2G02DCTR 10 0K R68 lel 100K FLT_RST gt I ueB NBD LMSOSM_NL bi Configure on board Fault logic FLT1_
18. 0 Freescale Semiconductor 1 3 Board Jumper Configuration See Table 1 1 and Figure 1 3 for proper jumper configuration Table 1 1 MC9S12G128 Board Configuration Introduction Jumper Selector Function Connection J3 SBC SBC Debug mode J4 not placed Placed Debug Mode ON placed OFF unplaced J4 SBC SBC Normal mode J3 not placed Unplaced Fail Safe Mode ON placed OFF unplaced J6 J7 CAN CAN bus termination Placed Termination 120R placed without termination unplaced J8 LIN LIN mode Placed Master Slave Master placed Slave unplaced J18 RESET SBC and MCU RESET pins connected Unplaced connected placed unconnected unplaced J20 J22 PHASE A Dead Time Dead time 2us generated by on board HW Placed pins 1 2 ON placed pins 1 2 OFF placed pins 2 3 J21 J23 PHASE C Dead Time Dead time 2us generated by on board HW Placed pins 1 2 ON placed pins 1 2 OFF placed pins 2 3 J24 J25 PHASE B Dead Time Dead time 2us generated by on board HW Placed pins 1 2 ON placed pins 1 2 OFF placed pins 2 3 J26 FAULTS Fault is processed by Placed pins 1 2 on board HW placed pins 1 2 MCU software IRQ placed pins 2 3 J27 J28 FAULTS In case of Fault the power stage switched turned OFF by Placed pins 1 2 on board HW placed pins 1 2 power stage HW EN pin placed pins 2 3 J29 FAULTS Overcurrent diagnostic input Placed pins 1 2 on boa
19. 00 rule U4B D18 5 R55 620 BAT54T1G 3 A 6 gt PWMB_LS ND V 4 R56 22 0K SN74LVC2G08DCT AN 4 cag 100 PF GNDD PWMC CTRLC 3 3VD_MCU J21 o C39 000 pre kle 0 1UF D14 R47 1 0K BATS4TIG U5A yt SA ae L v N R M PWNC HS ANN 4 Gr R48 15 0K SN74LVC2GO8DCT al pa 100 PF GNDD GNDb J23 000 kle U5B D16 5J R50 620 BAT54T1G 3 A PWMOC LS ANA 4 R52 22 0K SN74LVC2G08DCT ANA 649 100 PF GNDD Insert Dead time 2us Yes Place jumper on J2x headers pins 2 3 No Place jumper on J2x headers pins 1 2 ke 2 freescale semiconductor Freescale Semiconductor RCSC 1 maje 1009 765 61 Roznov p R Czech republic Europe This document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission T Freescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Drawing Title Designer S12G BLDC Development Kit Drawn by Page Title lt DrawnBy gt PWM and Dead Time Unit Approved Size Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 5 of 9 1 43 3VD
20. 2G128 Controller Board User Guide Rev 1 0 20 Freescale Semiconductor Design Consideration Chapter 3 Design Consideration This chapter provides an additional information on functional blocks of the MC9S12G128 controller board 3 1 MC9S12G128 Features The MC9S12G Family is an automotive 16 bit microcontroller product line focused on low cost high performance and low pin count 2 This family is intended to bridge between high end 8 bit microcontrollers and high performance 16 bit microcontrollers such as the MC9S12XS Family The MC9S12G Family is targeted at generic automotive applications requiring CAN or LIN J2602 communication The MC9S12G128 MCU 100 LQFP features follows see Figure 3 1 e CPUI2VI core Memory 128 KB of Flash memory 4096 bytes of EEPROM 8192 bytes of RAM e Clock modules External oscillator Internal 1MHz RC oscillator PLL Connectivity MSCAN module SCI 3modules SPI 3modules 16 bit timer 8 channels e 8 bit PWM that can be configured as either 8 channel 8 bit PWM or 4 channel 16 bit PWM 10 bit ADC 16 channels e MCU Supply voltage from 3 13 V to 5 5 V Execution speed 50MHz The MC9S12G128 Controller Board is designed to use MCU PWM3 PWM5 PWM7 channels as power stage phase A phase B and phase C signals The PWMI channel is used primarily for proper timing of the power stage DC bus current and BLDC motor Back EMF ADC conversion MC9S12G128
21. 90 PM2 RXD2 EES PMs TXD2 400 76 4 po al 10 vopn 3 i 22pF YDDX VDDX1 PEOexTAL H ERL VSSXI m Ca sMHz PEI XTAL vODXE 98 npo C25 GT vss VODX3 37 asl 51 ii 4 Pee VDDX3 um 5 K Vasa 45 22pF VDDA 76 TEST N po VUDA 24 BKGD VSSA BKGD MODC FS TE J18 VRH Til RESET 8 PST ife 3 vss MC9S12G128 13 1000 OHM C27 swe 4700PF B35 1002 NDD GNDA R42 1 0K Dtt 3 3VD MCU o PCO L A 3 3VD_MCU HSMG C170 C31 TT 10UF R43 TND 1 0K p12 PCI c A A HSMG C170 R44 10 0K PC2 lo 0AUF GNDD SW3 B3S 1002 ae ENDD DNP Rig 0 R20 100 RADO ANA ANO RA 0 ANI RA 0 GNDA NA R2 0 R23 100 PAD ANA A AAA ANT DNP 2 gig 100 PF GNDA DNP RE 0 R28 100 PAD2 ANN ANA AN2 R29 0 l og Ban 100PF R30 0 GNDA A R31 0 R32 100 PADS ANA teann AN3 DNP a pei 100 PF GNDA DNP R3 0 R34 100 PAD4 NN ANA AN4 R5 0 og SUA 100PF R36 0 GNDA ANN Ry 0 R38 100 PADS ANA ANA ANS DNP R39 100 PAD AA TT AN IRESET GNDA R40 100 PAD AA ANT a cos 100 PF GNDA RAI 100 bad PADB AA ANB aco stoot TAST po 513075 0 3 3VD_MCU 2 SVD 100 PF CON 2X3 PLUG TH 100MIL kr cao S G1UF GNDA NDD Configure ADC signals used for BEMF and BLDC motor current sensing ANO AN1 populate R21 R24 AN2 AN3 populate R29 R30 AN4 AN5 populate R35 R36 o Freesc
22. A HS IN 5 __ gt PWMA_ HS_OUT PWMA LS IN um ee OPWMALES OUT jumper on J27 pins 1 2 me E ae nn usd jumper on J28 pins 1 2 MC74AC08DG U7C 9 9 gt PWMB HS OUT g gt PWMB_LS_OUT PWMB HS IN gt 10 ns PWMB LS IN gt 0y ry Freescale Semiconductor RCSC MC74AC32DG USC Pod 1 maje 1009 MC74AC08DG fr eesca le 765 61 Roznov p R Czech republic Europe semiconductor U7D This document contains information proprietary to Freescale Semiconductor and shall not be used for 12 12 ngineering design procurement or manufacture in whole or in part without the express written permission 11 3 11 T Freescale Semiconductor SVEEN 13 NG HS OUT PWMC_LS_IN 18 __ gt PWMC_LS_OUT ICAP Classification EGP FIUO X PUBI ee FAKE Designer Drawing Title MC74AC32DG O Designer S12G BLDC Development Kit Drawn by Page Title brambra Fault Logic Approved Size Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Thursday March 01 2012 Sheet 6 of 9 5 1 GNDD
23. Controller Board User Guide Rev 1 0 Freescale Semiconductor 21 Design Consideration dint K bytes lash wi CC i i y K RA Comparator O bit 8 16 ch VR DACO Converter 0 5K 4K bytes EEPROM with ECC Digital Analog RENO Eie Converter VDDR Voltage Regulator VSS Input 3 13V 5 5V PIO PT1 8 channel PT2 PT3 PT4 PT5 Debug Module PT6 3 comparators PT7 64 Byte Trace Buffer PWM PPO Clock Monitor PP1 P EXTAL COP Watchdog 8 bit 6 8 channel gez Low Power Pierce Pulse Width Modul pE XTAL Oscillator Real Time Interrupt ulse Width Modulator PP3 Auton Periodic Int PP4 Internal RC Oscillat PPS nterna scillator SPE RESET Interrupt Module TEST CPU12 V1 Single wire Background BKGD Debug Module PP7 CAN RXCAN PMO msCAN 2 0B TXCAN gt PM1 SCI2 RXD PM2 PAI7 0 z Asynchronous Serial IF___TXD PM3 7 01 3 5V IO Supply i VDDX1 VSSX1 A h Serial IF VDDX2 VSSX2 synchronous oera TXD PS1 VDDX3 VSSX3 xi i nie RXD PS2 m synchronous Seria TXD PS3 PB 7 0 enel Bs a SPIO gt Bau Da PS6 Synchronous Serial IF pati PS7 PC 7 0 SPI lt gt PJO ps PJ1 PJ2 a Synchronous Serial IF 33 lx gt PJ3 PD 7 0 e E SPI2 Bia PJ4 peal ae PJ6 sc La PJ7 Synchronous Serial IF Figure 3 1 812G Family Block Diagram MC9S12G128 Controller Board User Guide Rev 1 0 22 Freescale Semiconductor Design Consideration 3 2 PWM
24. DET_ALT gt 1 Select source of OC protection J29 l 2 MCU IRQ based software based Fault logic jumper on J26 pins 2 3 jumper on J27 open jumper on J28 open 3 HW based Fault logic using gate driver MC33972 EN signal to turn OFF MOSFETs jumper on 326 pins 1 2 nra FTO jumper on 327 pins 2 3 jumper on J28 open 4 HW based Fault logic using on board logic to turn OFF U7B MOSFETs HS H LS L 4 4 gt o Krag a o g Jumper on 226 pins 1 2 5 LHS 5 S jumper on J27 pins 1 PWMA HS IN PWMA LS IN vilis aix jumper on J28 pins 1 2 MC74ACS2DG UB H MC74ACO8DG ure a E 8 8 MB HS OUT MB LS OUT PWMB HS IN 20 vE PWMB LS IN L a 5 lio Freescale Semiconductor RCSC 4 MC74AC3206 USC 4 m je 1008 Danse 7 freescale Sens cana ur Ws document contains Information proprietary to Freescale Semiconductor and shall nat ba used for 12 12 fnginerhg design procurement or manufacture in whole or part wnt e expres ven permission A mn Mor 11 Ma Ls OUT Freescale Semiconductor DAC RE RD 13 dm PETS N 13 m u CAP Clasltoaton FOR FUO X PUBE Pa UA Designer Drawing THe MCT4AC32DG L Deine 12G BLDC Development Kit Drawn by Page Tila DrawnBy Fault Logic Approved Sze Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Thursday March 07 2012 IR EG I E I z i 7 Figure 3 3 Fault Management Hardware MC9S12G128 Controller Board User Guide
25. MC33937_SOUT ANO ANI N BEMF_A AN2 AN3 BEMF_B AN4 ANS M BEMF c ANG AN7 AN8 KWP2 HALLO ZCA KWP4 HALL1 ZCB KWP6 HALL2 ZCC 09 LEDs amp Ctrl LED9 G LEDI_Y LED10 G LED2 Y KWJ4 LED11_G LED3_Y KWJ5 KWJ6 ROTA LED4 G KWJ7 ROTB LED5 G ROTSW LED6 G una BRUN 12V 15V PWR OUT LED8 R 07 UNIS HALL Interface 09 LEDs amp Ctrl 03 Power Supply LIN CAN PC3 MC33905 CS VSUP PWR INIRS PC4 MC33905_SCLK 7 PC5 MC33905_MOSI Ciro Freescale Semiconductor RCSC Por ae freescale im I c33905_MUX_OUT 765 61 Roznov p R Czech republic Europe dcs ANT This document contains information proprietary to Freescale Semiconductor and shall not be used for cal ngineering design procurement or manufacture in whole or in part without the express written permission IRESET MC33905 RST T Freescale Semiconductor CAP G 6 ICAP Classification FCP FIUO X PUBI RAD L DZ Designer Drawing Title S Designer S12G BLDC Development Kit DENN L gS ANTE Drawn by Page Title T brambra System Connection Approved Size Document Number Rev 03 Power Supply LIN CAN lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 2 of 1
26. MC9S12G128 Controller Board User Guide Document Number MC9S12G128MCBUG 1 0 08 2012 N A 5 freescale Freescale Semiconductor Chapter 1 Introduction e ES E GKM AE ET ESS EEE 22 UMS Ite EEE EE 2 3 MG33937A Interlace J34 RE RE a 4 mall aensorinienate JPT Libia cR RR krr eee A R Re 0 T L ans eo de dri dc ded a es xd 49d ddr ded o ded deed dri Fd dca dea AE COMEC oe vtech astu n a ai ca Rc CICER CR CR ER aC DC lol de oes 2T USB Comec JG 522424 EEE EEE ET EE r 28 0 EEE ENE EE ERE NESET RE a EG Pea IM ES EEE NE EE EEE Leida 210 Headers JIS 4085 J16 JIT sicilia ida ELE Ce SUG EES eRe SES Chapter 3 Design Consideration 3 MC9512G128 PEER 3 2 PWM HS and LS Signal Split and Phase Dead Time Generation 49 Board Fault Management lt e 6 ea R E 34 Hall Sensor leae iio xac Kk ox doe ooi dubie d do de eee d opo RR aed Chapter 4 Electrical Characteristics Chapter 5 Board Set up Guide Chapter 6 References Chapter 7 Acronyms Chapter 8 MC9S12G128 Controller Board Schematic ee ee ee ee ee eee ee ee dE ee eT a eee eee re Board Architecture ee eee bbe Ge RE ET ER Board Jumper Configuration sx s lt ds iets RR RE ee debian ae Denel LEDS exc def bi ph ET DEE STIRO TITTI Freescale Semiconductor Freescale Semiconductor About This Book This document describes the MC9S12G128 Controller Board design which is targeted for development of motor control applications To locate any published updates
27. Rev 1 0 Freescale Semiconductor 25 Design Consideration 3 4 Hall Sensor Interface The Hall sensor interface is used for BLDC sensor based motor control applications The Hall sensors are used to determine the actual motor rotor sector The on board interface provides the 5V power supply voltage to supply the sensors The Hall interface inputs are designed to support an open collector as well as push pull Hall sensors outputs see Figure 3 4 A single pole RC low pass filter is present to reduce a signal noise For a detailed JP1 connector signal description see Table 2 3 5V ZCA NI e gt HALLO ZCA al gt e 47PF 3 3K R74 6 2K GNBD 5V 5V o J33 JP1 R75 000 gli 1 0K 2 R76 Oo lle e 2 27 ZCB RES Os INN 013 NA gt HALL1 ZCB CEE Le dX par 33k HALL SENSORS ADI 7 lt pr 5V ENDD ENDD J35 R79 000 1 0K R80 lle 27 ZOC T NI 2 NA gt HALL2 ZCC al a PER 47PF 3 3K gt R84 6 2K NDb Figure 3 4 Hall Sensor Interface The Figure 3 5 shows the Hall sensor signal alignment to BLDC motor Back EMF signal The Hall sensors detect the rotor flux so their actual state is not influenced by stator current The Hall effect outputs in BLDC motors divide the electrical revolution into three equal sections of 120 In this so called 120 configuration the Hall states 111
28. ale Semiconductor RCSC i ee fi 1 maje 1009 7 treescaie 785 61 Roznov p R ic E 765 61 Roznov p R Czech republic Europe his document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission Freescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Drawing Title bid S12G BLDC Development Kit Drawn by Page Title lt DrawnBy gt MCU Approved Size Document Number Rev lt Approver gt c SCH 27496 PDF SPF 27496 x Date Monday March 12 2012 Sheet 4 of 9 PWMA CTRLA PWMB CTRLB 3 3VD_MCU J20 o C38 000 pre male 0 1UF D13 E R451 0K BAT5S4T1G USA Meg A Ci x 1j ver n gt PWMA HS NA ETT R46 15 0K SN74LVC2G08DCT sal a pao 100 PF GNDD GNDD J22 000 calo U3B D15 5 R49 620 BAT54T1G 3 d gt PWMA LS NN ul R51 22 0K SN74LVC2G08DCT AN a 642 100 PF GNDD 3 3VD_MCU J24 o C44 000 pre rule 0 1UF D17 2 R531 0K BAT54T1G U4A A o SE AT gt PWMB HS AN h au R54 15 0K SN74LVC2G08DCT PE dicc 1645 100 PF ENDD ENDD J25 0
29. ame Description D3 5V 5 V Hall power supply D6 ISAFE MCZ33905 safe pin state ON SBC in safe mode D7 3V3 3 3 V board power supply D11 User LED1 D12 User LED2 D21 AT Phase A top switch signal ON High Level D22 UV DC bus undervoltage fault ON Fault D23 BT Phase B top switch signal ON High Level D24 OC DC bus overcurrent fault ON Fault D25 CT Phase C top switch signal ON High Level D26 HO ZA Hall 0 Zero cross Phase A signal ON High Level D27 AB Phase A bottom switch signal ON High Level D28 H1 ZB Hall 1 Zero cross Phase B signal ON High Level D29 BB Phase B bottom switch signal ON High Level D30 H2 ZC Hall 2 Zero cross Phase C signal ON High Level D31 CB Phase C bottom switch signal ON High Level MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 13 Introduction MC9S12G128 Controller Board User Guide Rev 1 0 14 Freescale Semiconductor Interface Description Chapter 2 Interface Description The following chapters summarize the on board connectors and header pin outs signal meanings and MCU pins assignments 2 1 Power Supply J1 The MC9S12G128 Controller Board can be supplied either by using the 2 1 mm DC power plug J1 or the UNI 3 connector J31 pin 19 The controller board provides 5 V for a Hall interface and 3 3 V for on board logic Both voltages are generated by the MC33905 SBC Proper operation is monitored by LEDs
30. cale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission SOUT TP T Freescale Semiconductor ee KL MCSS9STSQUT Su TEMP ICAP Classification FCP FIUO X PUBE 3 3K 3 3K Designer Drawing Title r i P i S or ee Designer S12G BLDC Development Kit Drawn by Page Title lt DrawnBy gt UNI 3 Interface Approved Size Document Number Rev GNDD GNDA lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 7 of 1 Isolation Barrier RS232 RX 7 RS232 TX gt VDD_USB 43 3VD MCU ano use IL i i 4 bup C59 Job C60 O4UF Ut i 0 1UF N Q Q a a gt Tyva voa 2 6 A ve VOB a a a 6 S f ADUM1201 VDD_USB edt ni T 0 1UF 1 4 4 5 TXD voco 27 ND USB L 4 RXD VCC R93 27 1 ha lt no xd RTS uspm H ANN s D udo TOSSE R94 27 PT he VDD USB T 2 2dom 3 2 E E vI D19 D20 ch ae NC 8 73 T T e x 4 DSR RESET Pa E Hsmv cizo N Hsmv c170 i Nc_24 ex 062 L5 he USB_TYPE_B x 10 pop 1000 OHM ce K 27 4 7uF 0 01UF AG osc E o o x 4 RI 28 T 23 OSCO CBUSO 17 NB US ES CBUSI 3V3OUT GNDEUSB 14 CBUS2 garg
31. er Board features follows MC9S12G128 microcontroller 100 LQFP package BDM interface for MCU code download and debugging MC33905 System basis chip power supply connectivity Motor control interface UNI 3 MC33937A predriver Hall sensors Connectivity interface LIN MC33905 CAN MC33905 USB interface LEDs Power on indicators Phase A B C PWM control signals Phase A B C zero cross Hall sensor outputs Fault monitoring SBC safe mode User application Rotary encoder switch for an application control On board PWM dead time generation MCU pins accessible via pin headers MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor Introduction 1 2 Board Architecture The MC9S12G128 Controller Board basic building blocks are depicted in Figure 1 1 The block color differentiates a block function e Blue MCU and application software download and the debug interface Green Motor control related hardware e Red Board power supply and connectivity Violet Application control VBAT USB Interface Rotary Encoder Figure 1 1 MC9S12G128 Controller Board Block Diagram The board is supplied by VBAT voltage in the range of 8 V to 18 V The MCZ33905 provides 5 V to Hall interface The MCU and on board logic are supplied by either 3 3 V or 5 V depending on the assembled SBC version The board is populated with the 3 3 V SBC ve
32. l Ne e A 4 0K MMSD914T1 I o 4 o 3 ovur Ta a El MN CON PLUG 4 220PF GND J10 Jn o lx GNDA J12 freescale semiconductor Freescale Semiconductor RCSC 1 maje 1009 765 61 Roznov p R Czech republic Europe his document contains information proprietary to Freescale Semiconductor and shall not be used for ngineering design procurement or manufacture in whole or in part without the express written permission reescale Semiconductor ICAP Classification FCP FIUO X PUBI Designer Drawing Title bid 12G BLDC Development Kit Drawn by Page Title lt DramnBy gt Power Supply LIN CAN Approved Size Document Number Rev lt Approver gt c SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sket 3 9 HDR 2X13 15 24 HDR 2X13 Ji6 PCO 1 2 PCI POZ 310014 PCS PC4 519913 PCS PCE T oo PCT PAD 809110 PADI PAD2 11190112 PADS LL PADi 1869 4 PADS PADS 15 o o 16 PAD PADS 17 xd os PADS PADO 19 G 20 PADIT PADI 21 55 22 PADIS PADI4 23 o o 24 PADIS 25 19012 de HDR 2X13 GNDA 17 3 3VD_MCU 3 3VD MCU HDR 2X13 3 3VA MCU os VODA L4 1000 OHM FEER VRH css P tour 034 C35 0 1UF 0 1UF NE GNDA GNDA GNDA
33. om Web Support http www freescale com support USA Europe or Locations Not Listed Freescale Semiconductor Inc Technical Information Center EL516 2100 East Elliot Road Tempe Arizona 85284 1 800 521 6274 or 1 480 768 2130 www freescale com support Europe Middle East and Africa Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen Germany 44 1296 380 456 English 46 8 52200080 English 49 89 92103 559 German 33 1 69 35 48 48 French www freescale com support Japan Freescale Semiconductor Japan Ltd Headquarters ARCO Tower 15F 1 8 1 Shimo Meguro Meguro ku Tokyo 153 0064 Japan 0120 191014 or 81 3 5437 9125 support japan freescale com Asia Pacific Freescale Semiconductor China Ltd Exchange Building 23F No 118 Jianguo Road Chaoyang District Beijing 100022 China 86 10 5879 8000 support asia freescale com Freescale Semiconductor Literature Distribution Center 1 800 441 2447 or 1 303 675 2140 Fax 1 303 675 2150 LDCForFreescaleSemiconductor hibbertgroup com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document Freescale Semiconductor reserves the right to make changes with
34. out further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters that may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Semiconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims
35. r stage 1 the phase top and bottom switches are controlled by the MC33937A pre driver The device is configured by the SPI see Table 2 2 Table 2 2 MC33937 Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 NC Not connected 2 NC Not connected 3 MC33937 EN PA4 Device enable Digital output 4 MC33937 OC Over current Digital input 5 MC33937 RST PC4 Reset Digital output 6 MC33937_INT PC5 Interrupt Digital input 7 MC33937_SOUT MISOO SPI Input data Digital input 8 MC33937_SCK SCKO SPI clock Digital output 9 MC33937_CS SSO Chip select Digital output 10 MC33937_SIN MOSIO SPI output data Digital output MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 17 Interface Description 2 4 Hall Sensor Interface JP1 When developing the sensor based BLDC application the Hall sensors are used to determine the actual motor rotor sector Connect the motor Hall sensors outputs to JP1 following the instructions in Table 2 3 and watch the signal levels by on board LEDs Table 1 2 Table 1 1 Table 2 3 HALL Signal Description Interface Pin Signal Name MCU Signal Description Direction 1 5Vdc 5 V sensor supply voltage 2 GND Ground 3 HALLO KWP2 HALLO sensor output Digital input 4 HALL1 KWP4 HALL1 sensor output Digital input 5 HALL2 KWP6 HALL 2 sensor output Digital input 6 NC Not connected
36. rd comparator placed pins 1 2 power stage MC33972 comparator placed pins 2 3 J32 HALL ZC PHASE A BLDC sensor control based on Placed pins 1 2 Hall sensors placed pins 1 2 Zero cross placed pins 2 3 J33 HALL ZC PHASE B BLDC sensor control based on Placed pins 1 2 Hall sensors placed pins 1 2 Zero cross placed pins 2 3 MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 11 Introduction Table 1 1 MC9S12G128 Board Configuration continued Jumper Selector Function Connection Placed pins 1 2 HALL ZC PHASE C BLDC sensor control based on J35 Hall sensors placed pins 1 2 Zero cross placed pins 2 3 J32 J33 J35 J21 J23 324 J25 J20 22 Hall Zero Cross PhCDT PhBDT PhADT LC Es SI 22 ur J26 J27 J28 J29 Faults Configuration 7 J18 me RESET D LE tes MC9S12G178CN BRD na det nb FREESCALE TR Do se 13 J4 nai oc 7 cerea Ha bo A gee MCZ33905 Ji NOS er S SBC Le LID o Y KE U Mo J6 J7 CAN Termination J8 LIN Master Slave Figure 1 3 MC9S12G128 Controller Board Jumper Position and Default Setting MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 12 1 4 Board LEDs Introduction The Table 1 2 displays the on board LEDs For on board LED locations see Figure 1 2 Table 1 2 on board LEDs LED Signal N
37. rsion by default The MCU generates one PWM signal for each phase An additional on board logic is used to split the PWM signals to control power stage top and bottom switches separately A PWM dead time is inserted by additional hardware if required The Fault logic triggers the DC bus undervoltage and DC bus overcurrent faults and turns OFF the power stage top and bottom switches The circuitry behaviour depends on the selected configuration For more info see Chapter 3 3 Board Fault Management MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 9 Introduction The user can control the application using the rotary switch USB interface RS232 CAN and LIN buses The BDM interface is present on board to enable the download and debugging of the MCU code For the on board block location see Figure 1 2 Fault Hall and PWM Dead Time Interface asas LEDs Circuitry 9 J35 W m A un TE EE ae ex q un QZ viz i U 13 Er T m 5 is PWM LEDs 3E a TEN IN se eam ott aie 78 C 170 21496 Fault Logic gj K gd ve gL k UNI 3 i Interface amp ucos126128CNTBRD FREESGALE 2012 n dar da JER p Le LIE 2 NUNT TE sen Se MCZ33937 Interface b REV A CAN LIN Power Supply Figure 1 2 MC9812G128 Controller Board Block Location MC9S12G128 Controller Board User Guide Rev 1 0 USB Interface Rotary Encoder Switch BDM MCZ33905 SBC 1
38. ut software MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 29 Electrical Characteristics MC9S12G128 Controller Board User Guide Rev 1 0 30 Freescale Semiconductor Board Set up Guide Chapter 5 Board Set up Guide The board is designed to be supplied either by the UNI 3 interface or by using the on board J1 connector power supply voltage from 8 V to 18 V When using board as a standalone EVB connect the power supply to J1 In case of board operation with the power stage it is recommended to supply board using UNI 3 interface The MC9S12G128 Controller Board blue board is designed for operation with the FSL MC33937A based 3 Phase low voltage power stage green board see Figure 5 1 The complete 3 phase BLDC Sensor Sensorless Development Kit can be ordered at http www freescale com AutoMCDevKits Figure 5 1 3 Phase BLDC Sensor Sensorless Development Kit MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 31 Board Set up Guide MC9S12G128 Controller Board User Guide Rev 1 0 32 Freescale Semiconductor References Chapter 6 References 1 3 phase Low Voltage Power Stage User Manual Rev 0 31 March 2009 http www freescale com AutoMCDevKits 2 MC9S12G Family Reference Manual MC9S12GRMVI Rev 1 06 8 November 2011 MC9S12G128 Controller Board User Guide Rev 1 0 Freescale Semiconductor 33 References MC9S12G128 Controller Board User Guide
39. wing Title Designer S12G BLDC Development Kit Drawn by Page Title lt DrawnBy gt Info Approved Size Document Number Rev lt Approver gt B SCH 27496 PDF SPF 27496 x Date Monday February 06 2012 Sheet 1 of 9 1 08 USB RS232 Interface 04 MCU RS232 RX RS232 TX 1 ro TXDO 08 USB RS232 Interface 05 PWM and Dead Time Unit 06 Fault Logic 07 UNIS HALL Interface 04 MCU PWM3 B PWMA PWMA HS _ 8 PWMA HS IN PWMA HS OUT 4 B PWM_AT PAO CTRLA PWMA_LS PWMA LS IN PWMA_LS_OUT PWM AB PWM5 E PWMB PWMB_ HS EB PWMB HS IN PWMB_ HS_OUT 4 PWM BT PAI CTRLB PWMB LS PWMB LS IN PWMB LS OUT PWM_BB PWM7 PWMC PWMC HS p 3 PWMC HS IN PWMC HS OUT B B PWM_CT PA2 CTRLC PWMC_LS PWMC LS IN PWMC LS OUT PWM CB 05 PWM and Dead Time Unit m BRAKE no FLT OUT FLTO DET DCBV FLTO OUT FLT1 DET DCBI FLT1 OUT FLT1 DET ALT MC33937 OC TEMP PAS B FLT_RST PA4 EN IN EN OUT gt MC33937_EN PAS 06 Fault Logic Mer mer MC33937 INT SS0 MC33937 CS SCKO MC33937_SCK MOSIO MC33937 SIN MISOO

MC9S12G128 Controller Board User Guide

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