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eTPU Debugger and Trace

1. Signal Pin Pin Signal TDI 1 2 GND TDO 3 4 GND TCK 5 6 GND EVTI 7 8 N C RESET 9 10 TMS JTAG VTREF 11 12 GND RDY 13 14 JCOMP This is a standard 14 pin double row two rows of seven pins connector pin to pin spacing 0 100 in Signals in brackets are not strong necessary for basic debugging but its recommended to take in consideration for future designs Connector for COLDFIRE Signal Pin Pin Signal N C 1 2 BKPT GND 3 4 DSCLK GND 5 6 N C RESET RSTI 7 8 DSI 1 8 5 0V 9 10 DSO GND 11 12 PST3 PST2 13 14 PST1 PSTO 15 16 DDATA3 DDATA2 17 18 DDATA1 DDATAO 19 20 GND N C 21 22 N C GND 23 24 PSTCLK CPUCLK 1 8 5 0V 25 26 TEA TA DTACK 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 37 JTAG Connector Support Compilers Language Compiler Company Option Comment C ETEC ASH WARE Inc ELF DWARF C ASM ETPUC ByteCraft Limited ELF DWARF C ASM CODEWARRIOR Freescale ELF DWARF Semiconductor Inc 3rd Party Tool Integrations CPU Tool Company Host ALL ADENEO Adeneo Embedded ALL X TOOLS X32 blue river software GmbH Windows ALL CODEWRIGHT Borland Software Windows Corporation ALL CODE CONFIDENCE Code Confidence Ltd Windows TOOLS ALL CODE CONFIDENCE Code Confidence Ltd Linux TOOLS ALL EASYCODE EASYCODE GmbH Windows ALL ECLIPSE Eclipse Foundation
2. 55xx POWER DEBUG II POWER TRACE Il AC DC Adapter P NEXUS Adapter 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 13 NEXUS Connector Configuration eTPU Debugger Specific Implementations eTPU operating modes The eTPU is event driven When no service request is pending the eTPU is in IDLE mode When the eTPU is halted by the debugger command Break while it is not processing a service request the debugger will display IDLE in the status line When IDLE the register set is invalid and will not be displayed in the Register window There is also no valid MPC microprogram counter i e instruction pointer in this state Therefore Data List will fail but Data List lt address gt or Data List lt function label gt can be always used Debugging the eTPU Before the eTPU debug session can be started the main core e200 or ColdFire has to initialize the eTPUs i e load the eTPU program and initiate a host service request Make sure that the eTPUs are not halted for debugging because this would prevent the main core from accessing the eTPUs This is the recommended method to start an eTPU debug session 1 Program main application to FLASH using main core if not already programmed Reset processor and begin debug session on main core SYStem Up 2 3 Begin eTPU debug session using SYStem Mode Attach 4 Load debug
3. Select operation mode Format lt mode gt SYStem Mode lt mode gt Down Attach Select target reset mode Down Attach NoDebug Go StandBy Up Disables the Debugger The state of the CPU remains unchanged Establishes connection to the eTPU Not applicable for eTPU 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 20 General SYStem Commands SYStem Option ByteWise Use byte addressing for eT PU memory space Format SYStem Option ByteWise ON OFF The eTPU addresses data and code memory in 32 bit words In the default setting OFF the debugger addresses the eTPU memories also in 32 bit words There are however instructions which can modify partitions of a 32 bit word byte and 24 bit operations In this case it might be more convenient to address the eTPU memories in byte units Set this option to ON to configure the debugger to use byte addressing This setting should only be changed before the debug session begins SYStem Option DUALPORT Implicitly use run time memory access Format SYStem Option DUALPORT ON OFF Forces all list dump and view windows to use the memory class E e g Data dump E 0x100 or to use the format option E e g Var View E var1 without being specified Use this option if you want all windows to be updated while the processor is executing code This setting has no effect if SYStem Option MemAccess is disabled 1989 2015
4. Format TrOnchip CONVert ON OFF The on chip breakpoints can only cover specific ranges If a range cannot be programmed into the breakpoint it will automatically be converted into a single address breakpoint when this option is active This is the default Otherwise an error message is generated TrOnchip CONVert ON Break Set 0x1000 0x17ff Write sets breakpoint at range Break Set 0x1001 Ox17ff Write 1000 17ff sets single breakpoint at address 1001 TrOnchip CONVert OFF sets breakpoint at range Break Set 0x1000 0x17ff Write 1000 17ff Break Set 0x1001 0x17f Write gives an error message TrOnchip EVTI Use EVTI signal to stop the program execution Format TrOnchip EVTI ON OFF Default OFF If enabled the debugger will use the EVTI signal to break program execution instead of sending a JTAG command This will speed up reaction time If the complex trigger unit is used to stop program execution it is recommended to enable this option to achieve a shorter delay If this option is disabled the debugger will drive EVTI permanently high NOTE Only enable this option if the EVTI pin of the processor is connected to the NEXUS connector This option has no effect if TrOnchip EVTEN is disabled in the PowerPC debugger 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 29 CPU specific TrOnchip Commands TrOnchip EXTernal External signals Format TrOnchip EXTernal lt i
5. Inc Windows ALL RHAPSODY IN MICROC IBM Corp Windows ALL RHAPSODY IN C IBM Corp Windows ALL CHRONVIEW Inchron GmbH Windows ALL LDRA TOOL SUITE LDRA Technology Inc Windows ALL UML DEBUGGER LieberLieber Software Windows GmbH ALL ATTOL TOOLS MicroMax Inc Windows ALL VISUAL BASIC Microsoft Corporation Windows INTERFACE ALL LABVIEW NATIONAL Windows INSTRUMENTS Corporation ALL CODE BLOCKS Open Source ALL C TEST Parasoft Windows ALL RAPITIME Rapita Systems Ltd Windows ALL DA C RistanCASE Windows ALL TRACEANALYZER Symtavision GmbH Windows 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 38 Support CPU Tool Company Host ALL SIMULINK The MathWorks Inc Windows ALL TA INSPECTOR Timing Architects GmbH Windows ALL UNDODB Undo Software Linux ALL VECTORCAST Vector Software Windows ALL WINDOWS CE PLATF Windows Windows BUILDER 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 39 Support Realtime Operation Systems No operation systems supported 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 40 Support Products Product Information OrderNo Code LA 1220 FLEXEXT MICTOR H H Text MICTOR Flex Extension Horizontal Horizontal 70 mm flex extension for MICTOR 38 pin connector horizontal horizontal LA 1221 FLEXEXT MICTOR H V MICTOR Flex Extension Horizontal Vertical 60 mm flex extension for MICTOR 38 pin connector horizontal vertical L
6. LOCK Lock and tristate the debug port Format SYStem LOCK ON OFF Default OFF If the system is locked no access to the debug port will be performed by the debugger While locked the debug connector of the debugger is tristated The main intention of the lock command is to give debug access to another tool The command has no effect for the simulator 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 19 General SYStem Commands SYStem MemAccess Run time memory access non intrusive Format lt mode gt SYStem MemAccess lt mode gt Denied CPU NEXUS This option declares if and how a non intrusive memory access can take place while the CPU is executing code Although the CPU is not halted run time memory access creates an additional load on the processor s internal data bus The run time memory access has to be activated for each window by using the memory class E e g Data dump E 0x100 or by using the format option E e g Var View E var1 It is also possible to activate this non intrusive memory access for all memory ranges displayed on the TRACE32 screen by setting SYStem Option DUALPORT ON Denied CPU NEXUS SYStem Mode Memory access is disabled while the CPU is executing code The debugger performs memory accesses via a dedicated CPU interface Memory access is done via the NEXUS interface Available for MPC55XX MPC56XX family for both the NEXUS and JTAG only debugger
7. OxO0000009 enable program trace for channel 0 and 4 NEXUS Register Display NEXUS trace control registers Format NEXUS Register This command opens a window which shows the NEXUS configuration and status registers of NPC core and other trace clients NEXUS RESet Reset NEXUS trace port settings Format NEXUS RESet Resets NEXUS trace port settings to default settings NEXUS STALL Stall the program execution Format NEXUS STALL OFF ON SYStem Option STALL ON OFF deprecated Stall the program execution whenever the on chip NEXUS FIFO threatens to overflow If this option is enabled the NEXUS port controller will stop the core s execution pipeline until all messaged in the on chip NEXUS FIFO are sent Enabling this command will affect delay the instruction execution timing of the CPU This system option which is a representation of a feature of the processor will remarkably reduce the amount FIFO OVERFLOW errors but can not avoid them completely 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 26 NEXUS specific SYStem Settings NEXUS state Display NEXUS port configuration window Format NEXUS state Display NEXUS trace configuration window 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 27 NEXUS specific SYStem Settings CPU specific TrOnchip Commands TrOnchip BusTrigger Trigger bus on debug event Format TrOnchip BusTrigger lt event lt ON OFF
8. a task a given number of times Example open a trace programming window to enter Trace Program time_watch the trigger program for the CTU trigger program OTME task_start 0x0900 ETPU1 event on eTPUI1 OTM task start OTME task_end 0x0000 ETPUL event on eTPU1 OTM task end EVENTCOUNTER taskcount 1000 task counter for 1000 events Seant Counter Increment taskcount GOTO intask IF task_start intask GOTO start IF task_end BREAK PROGRAM IF taskcount Go Example 2 Break if eTPU task execution time exceeds a maximum time Example open a trace programming window to enter Trace Program time_watch the trigger program for the CTU trigger program OTME task_start 0x0900 ETPU1 event on eTPU1 OTM task start OTME task_end 0x0000 ETPU1L event on eTPU1 OTM task end TIMECOUNTER tasktime 2 400ms timer 2 4 ms start GOTO intask if task_start intask Counter Increment tasktime Counter Restart tasktime IF task_end GOTO start IF task_end BREAK PROGRAM IF tasktime amp amp task_end Go 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 35 Complex Trigger Unit Keywords for the Complex Trigger Unit Input Event Meaning IN external input event INO or IN1 occurred CRWM TCODE_3C TCODE_CRWM channel register write message CSSM TCODE_3A TCODE_CSSM channel start service message CTEM TCODE_3B TCODE_CTEM channel trace enable message DRM TCODE_6 TCODE_D
9. and Trace 24 NEXUS specific SYStem Settings NEXUS OTM Enable ownership trace messages Format NEXUS OTM ON OFF SYStem Option OTM ON OFF deprecated Enables ownership trace messaging On the eTPU an OTM is generated each time a channel starts or ends and contains amongst others channel number and HSR ID The information of OTMs is displayed in the flow trace and also in trace chart views e g Trace CHART TASKSRV NEXUS PortMode Define MCKO frequency Format NEXUS PortMode lt divider gt SYStem Option MCKO lt divider gt deprecated lt divider gt 1 1 1 1 2 1 1 31 1 41 1 8 Set the frequency of MCKO relative to the core frequency The port mode setting must be the same for all cores e200 and eTPU NEXUS PortSize Define the width of MDO Format NEXUS PortSize lt portsize gt SYStem Option NEXUS lt portsize gt deprecated lt portsize gt MDO2 MDO4 MDO8 MDO12 MDO16 The width of MDO can only be set if the SYStem mode is DOWN The port size setting must be the same for all cores e200 and eTPU 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 25 NEXUS specific SYStem Settings NEXUS PTCE Program trace enable per channel Format NEXUS PTCE lt value gt SYStem Option PTCE lt va ue gt deprecated lt value gt bit mask ch31 ch30 ch29 ch1 ch0 Enables program trace for channels which have the regarding bit of the value set to one e g
10. breakpoints as default The debugger supports an unlimited number of software breakpoints When using software breakpoints MISC has to be disabled On a chip with more than one eTPU the SCM shared code memory is only visible if both eTPUs connected to the same SCM A and B are stopped Therefore using software breakpoints is not supported in all cases esp if special break conditions CBI HTWIN are enabled In systems with two eTPUs connected to the same SCM software breakpoints will be visible for both cores If both eTPUs run the same code on chip breakpoints should be used On chip Breakpoints Watchpoints An eTPU has two on chip break watchpoints They can be used to generate a debug event core halts for debugger generate a watchpoint hit trace message enable disable trace message generation when the event occurs The on chip break watchpoints can be configured for instruction address comparison instruction break watchpoint data address comparison optional with data value comparison In addition the break watchpoints can be enabled for one channel all channels or a certain set of channels See TrOnchip SCM for details Breakpoints Watchpoints on Service Request or channel register write The eTPU supports also debug events on service request starts and on channel register writes See TrOnchip Set for details Like the on chip break watchpoints they can be can be enabled for one channel all channels
11. eTPU Debugger and Trace 1989 2015 Lauterbach GmbH 5 Warning Target Design Requirement Recommendations General Locate the JTAG OnCE Nexus connector as close as possible to the processor to minimize the capacitive influence of the trace length and cross coupling of noise onto the BDM signals Ensure that the debugger signal HRESET is connected directly to the HRESET of the processor This will provide the ability for the debugger to drive and sense the status of HRESET The target design should only drive the HRESET with open collector open drain HRESET should not be tied to PORESET because the debugger drives the HRESET and DSCK to enable BDM operation 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 6 Target Design Requirement Recommendations Quick Start eTPU Debugger Starting up the debugger is done as follows NOTE Debugger for e200 or ColdFire has to be started and configured first 1 Set the CPU type to load the CPU specific settings SYStem CPU MPC5676R 2 Configure select target core See SYStem CONFIG CORE for details SYStem CONFIG CORE lt core index gt 1 3 Start debug session by attaching to the eTPU SYStem Mode Attach 4 Break eTPU and initialize program and data memory optional Break Data Set P 0x0000 Ox0BFF SLong OxXFFFFFFFF Data Set D 0x0000 0x02FF tLong OxDEADDEAD Go 5 Load the debug symbols The program code will be usually loaded by the master core Coldfire P
12. gt MODE Set data trace mode of nexus client Format NEXUS CLIENT1 MODE OFF Read Write ReadWrite Sets the data trace mode of the selected trace client Select the trace client using NEXUS CLIENT lt x gt SELECT before setting the trace mode 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 23 NEXUS specific SYStem Settings NEXUS CLIENT lt x gt SELECT Select a nexus client for data tracing Format lt clients NEXUS CLIENT1 SELECT lt client OFF CDC CDC2 Select the eTPU Coherent Dual Parameter Controller s trace client for data tracing CDC belongs to eTPU_A and aTPU_B CDC2 belongs to eTPU_C and eTPU_D NEXUS DTM Control for data trace messages Format NEXUS DTM OFF Read Write ReadWrite SYStem Option DTM OFF Read Write ReadWrite deprecated OFF default No data trace messages are output by NEXUS Read NEXUS outputs data trace messages for read accesses Write NEXUS outputs data trace messages for write accesses ReadWrite NEXUS outputs data trace messages for read and write accesses NEXUS OFF Switch the NEXUS trace port off Format NEXUS OFF If the debugger is used stand alone the trace port is disabled by the debugger NEXUS ON Switch the NEXUS trace port on Format NEXUS ON The NEXUS trace port is switched on All trace registers are configured by debugger 1989 2015 Lauterbach GmbH eTPU Debugger
13. or a certain set of channels The debugger uses watchpoints on service request starts and on channel register writes to generate a trigger signal TrOnchip BusTrigger or to stop the trace recording TrOnchip TraceTrigger 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 15 eTPU Debugger Specific Implementations Memory Classes The following memory classes are available Memory Class Description P Program Memory SCM D Data Memory SPRAM H Memory space of the main core HOST Address Spaces and Addressing Modes The eTPU cores have an address space which is independent of the main core e200 or ColdFire Also program and data address space is separated harvard architecture In opposite to the main core which uses byte addressing the eTPU uses addresses it s memory in 32 bit words The following table shows some examples eTPU address main core address eTPU_A B SCM MPC5XXxX A 0xC3FD0000 P 0x0000 ColdFire IPSBAR 0x1E0000 eTPU_A B SCM MPC5XXX A 0xC3FD0004 P 0x0001 ColdFire IPSBAR 0x1E00004 eTPU_C SCM MPC5XXX A 0xC3E30000 P 0x0000 ETPU_A B SPRAM MPC5XXxX A 0xC3FC8000 D 0x0000 ColdFire IPSBAR 0x1D8000 ETPU_A B SPRAM MPC5XXxX A 0xC3FC8004 D 0x0001 ColdFire IPSBAR 0x1D8004 ETPU_C SPRAM MPC5XXxX A 0xC3E28000 D 0x0000 If two eTPUs share one SCM e g eTPU_a and eTPU_B SCM is only accessible if both eTPUs are stopped 1989 2015 Lauterbach GmbH e
14. symbols for all main and eTPU cores Data LOAD EIf Note The eTPUs have their own debug symbols The source file of the main core does not include debug symbols of the eTPUs 5 To debug a service request or function set a Breakpoint or enable a debug event on a service request When another eTPU uses the same SCM i is recommended to enable the halt on twin engine debug event on the other eTPU See TrOnchip HTWIN 6 Make sure that all eTPU debuggers are in state running green filed displaying running in the status bar 7 Run application on main core Go 8 The main core will initialize the eTPUs The eTPU should halt for the debugger when the set breakpoint or service request s debug event occurs While an eTPU is halted for the debugger it will not process any pending service requests Some target applications wait for a response from an eTPU and in some cases it was seen that a halted eTPU caused a processor reset e g by watchdog in this case Make sure that the main core s application can handle a halted eTPU e g by deactivating the watchdog On processors with eTPU2 the eTPU watchdog must be disabled for debugging 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 14 eTPU Debugger Specific Implementations Breakpoints and Watchpoints There are two types of breakpoints available Software breakpoints SW BP and on chip breakpoints HW BP Software Breakpoints The debugger will use software
15. A 1222 FLEXEXT MICTOR V V MICTOR Flex Extension Vertical Vertical 55 mm flex extension for MICTOR 38 pin connector vertical vertical LA 1223 FLEXEXT 100MIL SHRO Flex Extension 2 54mm shrouded hor hor 75 mm flex extension for 2 54 mm connector with shrouded post stribes horizontal horizontal LA 1224 FLEXEXT 100MIL Flex Extension 2 54mm horizontal horizontal 75 mm flex extension for 2 54 mm connector horizontal horizontal LA 1225 FLEXEXT SAM FTE CLE Flex Extension for BlackOak 64 pin 32 pin 55 mm flex extension SAMTEC FTE CLE only for BlackOak 64 pin 32 pin LA 7856 LA 7871 LA 7877 LA 7883 LA 1226 FLEXEXT SAM QTH QSH Flex Extension for Tricore with SAMTEC QTH 55 mm flex extension SAMTEC QTH QSH only for Tricore with SAMTEC QTH connector LA 7928 LA 1227 FLEXEXT YAM NDP NDS Flex Extension Yamaichi NDP NDS 70 mm flex extension Yamaichi NDP NDS LA 1370 Mictor Flex Extension MICTOR FLEXEXT 110 mm flex extension for Mictor 38pin connector LA 1371 Mictor Flex Extension Long MICTOR FLEXEXT L 200 mm flex extension for Mictor 38pin connector eTPU Debugger and Trace 1989 2015 Lauterbach GmbH 41 Products Order Information Order No Code Text LA 1220 FLEXEXT MICTOR H H MICTOR Flex Extension Horizontal Horizontal LA 1221 FLEXEXT MICTOR H V MICTOR Flex Extension Horizontat Vertical LA 1222 FLEXEXT MICTOR V V MICTOR Flex Extension Vertical Vertical
16. H Address ranged with MAP UPDATEONCE will read the specified address range only once after the core stopped at a breakpoint or manual break MAP CONST will read the specified address range only once per SYStem Mode command e g SYStem Up eTPU Debugger and Trace 1989 2015 Lauterbach GmbH 9 FAQ Setting a Software Breakpoint fails What can be the reasons why setting a software breakpoint fails Setting a software breakpoint can fail when the target HW is not able to implement the wanted breakpoint Possible reasons The wanted breakpoint needs special features that are only possible to realize by the trigger unit inside the controller Example Read write and access Read Write breakpoints type in Break Set window Breakpoints with checking in real time for data values Data Breakpoints with special features action like TriggerTrace TraceEnable TraceOn TraceOFF TRACE32 can not change the memory Example ROM and Flash when no preparation with FLASH Create FLASH TARGET and FLASH AUTO was made All type of memory if the memory device is missing the necessary control signals like WriteEnable or settings of registers and SpecialFunctionRegisters SFR Contrary settings in TRACE32 Like MAP BOnchip for this memory range Break SELect lt breakpoint type gt Onchip HARD is only available for ICE and FIRE RTOS and MMU If the memory can be changed by Data Set but the breakpoint doesn t work it m
17. LA 1223 FLEXEXT 100MIL SHRO Flex Extension 2 54mm shrouded hor hor LA 1224 FLEXEXT 100MIL Flex Extension 2 54mm horizontal horizontal LA 1225 FLEXEXT SAM FTE CLE Flex Extension for BlackOak 64 pin 32 pin LA 1226 FLEXEXT SAM QTH QSH Flex Extension for Tricore with SAMTEC QTH LA 1227 FLEXEXT YAM NDP NDS Flex Extension Yamaichi NDP NDS LA 1370 MICTOR FLEXEXT Mictor Flex Extension LA 1371 MICTOR FLEXEXT L Mictor Flex Extension Long 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 42 Products
18. Lauterbach GmbH eTPU Debugger and Trace 21 General SYStem Commands CPU specific SYStem Commands SYStem Option FreezeCLKS Freeze eTPU clocks if eTPU halted Format SYStem Option FreezeCLKS ON OFF Stop TCR clocks Controls whether the TCR clocks from the eTPU stop running when the eTPU is halted for the debugger SYStem Option FreezePINS Freeze pins if eT PU is halted Format SYStem Option FreezePins ON OFF Stop pins in debug mode Controls whether the eTPU pins are sampled when the eTPU is halted for the debugger When set to ON the pins are not sampled during debug mode The pins are sampled during normal single steps 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 22 CPU specific SYStem Commands NEXUS specific SYStem Settings Note The following processors do not include a NEXUS trace module tracing not possible MPC563xM SPC563M Monaco MPC564xA SPC564A Andorra eTPU in ColdFire processors NEXUS BTM Control for branch trace messages Format NEXUS BTM ON OFF SYStem Option BTM ON OFF deprecated Control for the NEXUS branch trace messages NEXUS CHAN Enable CHAN register write trace messages Format NEXUS CHAN ON OFF SYStem Option CHAN ON OFF deprecated Control for the NEXUS channel register write trace messages CHAN register write tracing requires the channel being serviced to have program trace enabled NEXUS CLIENT lt x
19. RM data read message DRSM TCODE_E TCODE_DRSM data read sync message DSM TCODE_0 TCODE_DSM debug status message DWM TCODE_5 TCODE_DWM data write message DWSM TCODE_D TCODE_DWSM data write sync message EM TCODE_8 TCODE_EM error message EM_0 TCODE_8_0 error message 0 OTM loss EM_1 TCODE_8_1 error message 1 BTM loss EM_2 TCODE_8_2 error message 2 DTM loss EM_6 TCODE_8 6 error message 6 WHM loss EM_7 TCODE_8_7 error message 7 BTM DTM OTM loss EM_8 TCODE_8_8 error message 8 BTM DTM OTM WHM loss EM_18 TCODE_8_18 error message 18 DSM loss EM_19 TCODE_8_19 error message 19 BTM DSM DTM OTM loss EM_1A TCODE_8_1A error message 1A BTM DSM DTM OTM WHM loss IHM TCODE_1C TCODE_IHM hardware event message IHSM TCODE_1D TCODE_IHSM hardware event sync message OTM TCODE_2 TCODE_OTM ownership trace message PTCM TCODE_21 TCODE_PTCM repeat branch message RFM TCODE_1B TCODE_RFM resource full message WHM TCODE_F TCODE_WHM watchpoint hit message For not CPU specific keywords see non declarable input variables in ICE FIRE Analyzer Trigger Unit Programming Guide analyzer_prog pdf 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 36 Complex Trigger Unit JTAG Connector Mechanical Description JTAG Connector MPC55XX OnCE
20. TPU Debugger and Trace 16 eTPU Debugger Specific Implementations General SYStem Commands SYStem CONFIG Configure debugger according to target topology Format SYStem CONFIG lt mode gt SYStem MultiCore lt mode gt deprecated For the description of SYStem CONFIG commands refer to the debugger manual for the main core in SYStem CONFIG in Qorivva MPC5xxx SPC5xx Debugger and NEXUS Trace debugger_mpc5500 pdf This setting is only available for CPUs with JTAG as debug port not available for BDM SYStem CONFIG CORE Assign core to TRACE32 instance Format SYStem CONFIG CORE lt core index gt lt chip index gt SYStem MutiCore Core lt core index gt deprecated This command is used to assign a specific core to a TRACE32 instance Please make sure that the host debuggers CPU selection is appropriate before this command is called If this command is called while a CPU without eTPU is selected the command will fail The valid parameters for lt core id gt are given by debugger implementation Architecture eTPU Core ID MPC5XXX SPC56XX 2 eTPU_A 3 eTPU_B with one e200 core MPC5XXxX with two e200 cores 3 eTPU_A 4 eTPU_B 5 eTPU_C ColdFire 2 SYStem CPU Select the CPU type Format SYStem CPU lt cpu gt lt Cpu gt MPC5554 MCF5232 Selects the CPU type 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 17 General SYStem Commands SYSte
21. US PTCE Program trace enable per channel 26 NEXUS Register Display NEXUS trace control registers 26 NEXUS RESet Reset NEXUS trace port settings 26 NEXUS STALL Stall the program execution 26 NEXUS state Display NEXUS port configuration window 27 CPU specific TrOnchip COMMANAS cccesccecseeeeeeeeeesneeeeensneeesneesenseeeesseneensseasseeneenaneees 28 TrOnchip BusTrigger Trigger bus on debug event 28 TrOnchip CBI Halt on client breakpoint input 28 TrOnchip CBT Select client breakpoint timing condition 28 TrOnchip CONVert Adjust range breakpoint in on chip resource 29 TrOnchip EVTI Use EVTI signal to stop the program execution 29 TrOnchip EXTernal External signals 30 TrOnchip HTWIN Halt on twin engine breakpoint 30 TrOnchip RESet Reset on chip trigger settings 30 TrOnchip SCM Select channels for that breakpoints are effective 30 TrOnchip Set Break on debug event 31 TrOnchip TEnable Set filter for the trace 31 TrOnchip TOFF Switch the sampling to the trace to OFF 32 TrOnchip TON Switch the sampling to the trace to ON 32 TrOnchip TraceTrigger Trigger trace on debug event 32 TrOnchip VarCONVert Adjust complex breakpoint in on chip resource 33 TrOnchip view Display on chip trigger window 33 MUNIN WE UE gcse ack Scag nec ecrensthecet hase teen eee ge ewe nasen ats ntooeicanan obaiecbameeuonceemnenss 34 Usage 34 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 2 Complex Trigger Examples for eTPU 35 Keywords for the Complex Trigge
22. des 16 General SY Stent Commands iscsi sled Asien 17 SYStem CONFIG Configure debugger according to target topology 17 SYStem CONFIG CORE Assign core to TRACE32 instance 17 SYStem CPU Select the CPU type 17 SYStem CpuAccess Run time memory access intrusive 18 SYStem JtagClock Select the debug clock frequency 18 SYStem LOCK Lock and tristate the debug port 19 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 1 SYStem MemAccess Run time memory access non intrusive 20 SYStem Mode Select operation mode 20 SYStem Option ByteWise Use byte addressing for eTPU memory space 21 SYStem Option DUALPORT Implicitly use run time memory access 21 CPU specific SYStem Commands ssceissccsscasicceisccat iscsi vcs ananin 22 SYStem Option FreezeCLKS Freeze eTPU clocks if eTPU halted 22 SYStem Option FreezePINS Freeze pins if eTPU is halted 22 NEXUS specific SYStem Settings 2 lt ccssrsssnccorssscnssnnne renee senssnenueaeeentnecsnseeoretecstanareeossene 23 NEXUS BTM Control for branch trace messages 23 NEXUS CHAN Enable CHAN register write trace messages 23 NEXUS CLIENT lt x gt MODE Set data trace mode of nexus client 23 NEXUS CLIENT lt x gt SELECT Select a nexus client for data tracing 24 NEXUS DTM Control for data trace messages 24 NEXUS OFF Switch the NEXUS trace port off 24 NEXUS ON Switch the NEXUS trace port on 24 NEXUS OTM Enable ownership trace messages 25 NEXUS PortMode Define MCKO frequency 25 NEXUS PortSize Define the width of MDO 25 NEX
23. eTPU Debugger and Trace TRACE32 Online Help TRACE32 Directory TRACE32 Index TRAGES2 DOCUMONIS isiin aaa a E tees evaded uae Es PCB I CIRCUIE DE DUGG OR sesi E E E j Processor Architecture Manuals sriasunnnsssannnennniisinnarrrnanunennnniannn ennan annan BTE ci E E E E am ETPU Debugger and Trace cceseeecccceseeeeeeeeeseeeeeeeesneeeeeeenneeeseeensneenseseeseeeeeeenseeaeeeeenseeneeeeenas 1 General Note issiria ieee diene a ieee 4 Brief Overview of Documents for New USersS sscccsseeeeeesseeeseeeeeeeeneesseeeeenseeesseenseneeeees 4 TOON nia a a ncn tesa abameatawasanersitancaw eaauumortuensuteeanatcou ens 5 Target Design Requirement Recommendations _ s sccceseceseeeeeeeseeesseeeeeeeeeeeeneeneneens 6 General 6 Quick Start eTPU Debugger cisincciiccsicssctececcticcvrieirecianiecueis asenaan aa 7 TROUDIGSHOGUING sscsnissrosss eri eee en ee Aeneas 8 FID cciccasesonssnitaui s eassnaina enon icin enman taisa gone cans winnie ante iin be sainainan apane ban natn aa ono daman nas nae paasiaateie 9 MON TTACUCAEUUN css ces eaaa aaa aaa aaaea 12 System Overview 12 eTPU Debugger Specific Implementations s cccssecceeeeeesteeeeeeeeeeseeeseseeeeeeeesesneeneesees 14 eTPU operating modes 14 Debugging the eTPU 14 Breakpoints and Watchpoints 15 Software Breakpoints 15 On chip Breakpoints Watchpoints 15 Breakpoints Watchpoints on Service Request or channel register write 1S Memory Classes 16 Address Spaces and Addressing Mo
24. gt lt event gt CRW Channel register write HSR Host service request LINK Link service request MRL Match recognition request TDL Transition detect request Enables or disables events on which a bus trigger signal will be generated Enables or disables events on which the trace will be triggered NOTE The eTPU implementation for the special events CRW HSR LINK MRL and TDL allows configuring each event independently to generate a watchpoint or a breakpoint It is however not possible to generate a watchpoint and a breakpoint at the same time for the same event See TrOnchip Set for details TrOnchip CBI Halt on client breakpoint input Format TrOnchip CBI ON OFF Enables or disables the Halt on Client breakpoint break condition If enabled the eTPU will halt and run synchronized to the master core e g PowerPC TrOnchip CBT Select client breakpoint timing condition Format TrOnchip CBT ON OFF With this setting you can select how the eTPU should react on a client breakpoint input twin engine breakpoint If this setting is OFF default the eTPU will stop on completion of the current micro cycle If ON it will stop on completion of the current instruction thread i e the eTPU only stop when it is in IDLE mode 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 28 CPU specific TrOnchip Commands TrOnchip CONVert Adjust range breakpoint in on chip resource
25. he same folder for instructions Casting trick Stop inside a function where this variable is used Show the address of that variable in a window Variable View e amp event_ref_count Right click on the address and select Show Constant from the pulldown This will open another window that shows the same variable as typecast from a fixed address which will remain valid even when the core runs Register GOTO command Select the scope AND channel base with Register GOTO e g Regis ter GOTO My_eTPU_FUNC lt CHBASE gt The second parameter is the value of CHBASE for the channel in which you expect the code to run It is possible to use the host memory access class H to extract this information from the PowerPC side Show the local variable with Variable View e event_ref_count Note Stopping the core will revert to normal display of variables 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 11 FAQ Configuration System Overview HUB 100 MBit Ethernet PC or Workstation MPC 55xx eTPU A eTPU B Ethernet Cable POWER TRACE ETHERNET AC DC Adapter NEXUS Adapter 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 12 NEXUS Connector Configuration HUB PC or Workstation 1 GBit Ethernet MPC eTPU A eTPU B
26. hitecture supported by your debug cable To access the manual for your processor architecture proceed as follows Choose Help menu gt Processor Architecture Manual RTOS Debugger rtos_ lt x gt pdf TRACE32 PowerView can be extended for operating system aware debugging The appropriate RTOS manual informs you how to enable the OS aware debugging 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 4 General Note Warning Signal Level MPC55XX The debugger drives the output pins of the JTAG OnCE connector with the same level as detected on the VCCS pin If the IO pins of the processor are 3 3 V compatible then the VCCS should be connected to 3 3 V ESD Protection NOTE To prevent debugger and target from damage it is recommended to connect or disconnect the debug cable only while the target power is OFF Recommendation for the software start 1 N Oo OO PF O Power down 1 2 3 4 Disconnect the debug cable from the target while the target power is off Connect the host system the TRACE32 hardware and the debug cable Power ON the TRACE32 hardware Start the TRACE32 software to load the debugger firmware Connect the debug cable to the target Switch the target power ON Configure your debugger e g via a start up script Switch off the target power Disconnect the debug cable from the target Close the TRACE32 software Power OFF the TRACE32 hardware
27. ight be a problem of using an MMU on target when setting the breakpoint to a symbolic address that is different than the writable and intended memory location eTPU Halt eTPU when e200 halts without using eTPU debugger Can I halt and start the eTPU synchronized to the e200 core without using the eTPU debugger When the eTPU debugger is used synchronized debugging is enabled using the command Without eTPU debugger run control can be synchronized to the e200 core by enabling DC DBE and DC CBI in the NDEDI block The DC register is accessible through the NEXUS Register window of the e200 debugger Commands for MPC5746R 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 10 FAQ eTPU View channel base relative variables Some variables can not be displayed with run time memory access i e while the eTPU is running even if the variable is declared static How can this variables displayed eTPU variables can be bound to a context i e even static sariables can have an address which is relative to the channel base address While the eTPU runs the current context can not be determined so the debugger can not display these variables There are three ways to configure the debugger to displays those types of variable Generate static copies of the variables for each channel There is a ready to use script available in the folder demo etpu etc chan nelvars Please refer to readme txt in t
28. m CpuAccess Run time memory access intrusive Format SYStem CpuAccess lt mode gt lt mode gt Enable Denied Nonstop Enable In order to perform a memory read or write while the CPU is executing the program the debugger stops the program execution shortly Each short stop takes 1 100 ms depending on the speed of the debug interface and on the size of the read write accesses required Denied No memory read or write is possible while the CPU is executing the program Nonstop Nonstop ensures that the program execution can not be stopped and that the debugger doesn t affect the real time behavior of the CPU Nonstop reduces the functionality of the debugger to run time access to memory and variables trace display The debugger inhibits the following to stop the program execution all features of the debugger that are intrusive e g spot breakpoints per formance analysis via StopAndGo conditional breakpoints etc SYStem JtagClock Select the debug clock frequency Format SYStem JtagClock lt frequency gt SYStem BdmClock lt frequency gt lt rate gt 1 000 000 50 000 000 Default 4 MHz NOTE If possible use the same JTAG clock frequency for all cores debugged with the same debug interface MPC55XX the max allowed JTAG clock frequency is 1 4th of the core frequency 1989 2015 Lauterbach GmbH eTPU Debugger and Trace a General SYStem Commands SYStem
29. nput gt lt input OFF INO IN1 Enables selects a external input to trigger the trace The inputs are locates at the TRACE32 Nexus Adapter TrOnchip HTWIN Halt on twin engine breakpoint Format TrOnchip HTWIN ON OFF Enables or disables the Halt on Twin Engine breakpoint If enabled the eTPU will halt and run synchronized to the eTPU connected to the same SCM TrOnchip RESet Reset on chip trigger settings Format TrOnchip RESet Resets the trigger system to the default state TrOnchip SCM Select channels for that breakpoints are effective Format TrOnchip SCM lt value bitmask gt lt value A value or bit mask to specify service channels bitmask gt On chip instruction and data address breakpoints watchpoints by default match for any service channel If the SCM value is different from Oxxx these breakpoints watchpoints will only be effective for those channels that match to the used value bit mask 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 30 CPU specific TrOnchip Commands TrOnchip Set Break on debug event Format TrOnchip Set lt event gt lt ON OFF gt TrOnchip Set SCM lt value bitmask gt SCM Service channel number mask value or bitmask are allowed lt event gt CRW Channel register write HSR Host service request LINK Link service request MRL Match recognition request TDL Transition detect request lt value A value or bit mask to
30. owerPC Data LOAD E1f app elf NoCODE NoRegister 6 Set up breakpoint s and run master CPU afterwards Break Set func_increment Onchip 7 Or set a debug event on a service request TrOnchip Set HSR ON 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 7 Quick Start eTPU Debugger Troubleshooting No information available 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 8 Troubleshooting FAQ Debugging via VPN The debugger is accessed via Internet VPN and the performance is very slow What can be done to improve debug performance The main cause for bad debug performance via Internet or VPN are low data throughput and high latency The ways to improve performance by the debugger are limited in practice scripts use SCREEN OFF at the beginning of the script and SCREEN ON at the end SCREEN OFF will turn off screen updates Please note that if your program stops e g on error without executing SCREEN OFF some windows will not be updated SYStem POLLING SLOW will set a lower frequency for target state checks e g power reset jtag state It will take longer for the debugger to recognize that the core stopped on a breakpoint SETUP URATE 1 s will set the default update frequency of Data List Data dump Variable windows to 1 second the slowest possible setting prevent unneeded memory accesses using MAPUPDATEONCE address range for RAM and MAPCONST address range for ROM FLAS
31. r Unit 36 JTAG COMMGCIOR sionnsair A 37 Mechanical Description 37 JTAG Connector MPC55XX OnCE 37 Connector for COLDFIRE 37 MUONS sicriu aa aaa 38 Compilers 38 3rd Party Tool Integrations 38 Realtime Operation Systems 40 aneno a E E EE A EE A EA EE N E E E E E E EE AE E T 41 Product Information 41 Order Information 42 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 3 eTPU Debugger and Trace Version 06 Nov 2015 30 Jun 14 TrBus Out and TrBus Set were moved to general_ref_t pdf General Note This documentation describes the processor specific settings and features for TRACE32 ICD for the eTPU core If some of the described functions options signals or connections in this Processor Architecture Manual are only valid for a single CPU or for specific families the name s of the family ies is added in brackets Brief Overview of Documents for New Users Architecture independent information Debugger Basics Training training_debugger pdf Get familiar with the basic features of a TRACE32 debugger T32Start app_t32start pdf T32Start assists you in starting TRACE32 PowerView instances for different configurations of the debugger T32Start is only available for Windows General Commands general_ref_ lt x gt pdf Alphabetic list of debug commands Architecture specific information Processor Architecture Manuals These manuals describe commands that are specific for the processor arc
32. specify service channels bitmask gt Enables or disables events on which the eTPU core will be halted If the SCM value is different from Oxxx then the events will occur only if the current service channel number matches the SCM setting Please refer to the eTPU users manual for more information NOTE The eTPU implementation for the special events CRW HSR LINK MRL and TDL allows configuring each event independently to generate a watchpoint or a breakpoint It is however not possible to generate a watchpoint and a breakpoint at the same time for the same event For example Tronchip Set HSR ON breakpoint on HSR can not be used together with Tronchip TraceTrigger HSR ON trace trigger on HSR or TrOnchip BusTrigger HSR ON bus trigger on HSR TraceTrigger and BusTrigger events can be enabled at the same time because both configure for watchpoints If both breakpoint and watchpoint on a special event are enabled the resulting action is undefined TrOnchip TEnable Set filter for the trace Format TrOnchip TEnable lt par gt Obsolete command Refer to the Break Set command to set trace filters 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 31 CPU specific TrOnchip Commands TrOnchip TOFF Switch the sampling to the trace to OFF Format TrOnchip TOFF Obsolete command Refer to the Break Set command to set trace filters TrOnchip TON Switch the sampling to the
33. t TrOnchip view Open TrOnchip window 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 33 CPU specific TrOnchip Commands Complex Trigger Unit Usage The Complex Trigger Unit for eTPU is only available for the NEXUS class2 3 debugger It is only supported for NEXUS port sizes MDO8 MDO12 and MDO16 The Complex Trigger Unit for eTPU can not be programmed through the Analyzer Program dialog in the eTPU debugger Use the dialog of the PowerPC debugger instead In order to declare an event for a eTPU NEXUS message add the option lt source gt to the event Example OTME task_count1 0x0900 ETPU1 OTME task_count2 0x0100 ETPU2 Complex Trigger programs can handle PowerPC and eTPU events at the same time It is possible to e g start tracing on a PowerPC action and stop at an eTPU action NOTE For all events based on NEXUS trace messages please make sure that the corresponding message type in enabled in the eTPU SYStem window e g OTMEs need owner trace messages enabled See NEXUS specific SYStem Settings for details 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 34 Complex Trigger Unit Complex Trigger Examples for eTPU Here are some examples on eTPU specific complex trigger programs Please see Trace Filtering and Triggering with Debug Events debugger_mpc5500 pdf for a detailed description and more examples on general complex trigger features Example 1 Break if eTPU executed
34. trace to ON Format TrOnchip TON EXT Break Obsolete command Refer to the Break Set command to set trace filters TrOnchip TraceTrigger Trigger trace on debug event Format TrOnchip TraceTrigger lt event lt ON OFF gt lt event gt CRW Channel register write HSR Host service request LINK Link service request MRL Match recognition request TDL Transition detect request Enables or disables events on which the trace will be triggered NOTE The eTPU implementation for the special events CRW HSR LINK MRL and TDL allows configuring each event independently to generate a watchpoint or a breakpoint It is however not possible to generate a watchpoint and a breakpoint at the same time for the same event See TrOnchip Set for details 1989 2015 Lauterbach GmbH eTPU Debugger and Trace 32 CPU specific TrOnchip Commands TrOnchip VarCONVert Adjust complex breakpoint in on chip resource Format TrOnchip VarCONVert ON OFF The on chip breakpoints can only cover specific ranges If you want to set a marker or breakpoint to a complex variable the on chip break resources of the CPU may be not powerful enough to cover the whole structure If the option TrOnchip VarCONVert is ON the breakpoint will automatically be converted into a single address breakpoint This is the default setting Otherwise an error message is generated TrOnchip view Display on chip trigger window Forma

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