EVBUM2186 - KNX Evaluation Board User`s Manual
Contents
1. TXD RXD TUART UART Interface Baudrate Baudrate Depending on Configuration Input Pins see Interface Mode page 16 Tolerance is equal to tolerance of Xtal oscillator tolerance 19 200 38 400 Veus VeusH Veus gt A teus FILTER gt AE t lt VBUS gt Comments lt VBUS gt is an internal signal which can be verified with the Internal State Service Figure 4 Bus Voltage Undervoltage Threshold http onsemi com 5 NCN51205GEVB Comments lt VDD2 gt is an internal signal which can be verified with the System State Service Figure 5 VDD2 Undervoltage Threshold t lt V20V gt Comments lt V20V gt is an internal signal which can be verified with the System State Service Figure 6 V20V Undervoltage Threshold levels cs Ws WW MQG Ar SXVQq w3 _ D S MEE S SS i Uso set tsp PE I E S _HIGH I EC how lt S S lt te SET y lt AS lt sn tsck tes HoLD Figure 7 SPI Bus Timing Diagram http onsemi com 6 NCN51205GEVB PP Analog State Nomal t E Comments lt TW gt is an internal signal which can be verified with the System State Service No SPI UART communication possible when RESETB is low Its assumed all voltage supplies are within their operating condition Figure 8 Temperature Monitoring Levels ee 2 s i ANN2. 1 trrea_HoLg Cn Vt i TREQ_SET 1 j trrea_Low trREQ_HIGH Figure 9 TREQ Timing Diagram http onsemi com 7 NCN51205GEVB APPLICATION SCHEMATIC gt RESETb gt SAVEb gt XCLK lt gt SCKUC2 gt SDOTXD lt 7 SDVRXD lt gt CSBUCI 1HEO lt 7 MODE1 gt ARXD lt JATxD V O 2 r o LZ 1 1 200 029 So jo Oz DILZAOZSOH SN I s a eat LX pau val za LAWS EDO H eld y S o tal hasas moon dt ay tiat O o Hr amp a amp OF E i aE NCN5120 3 R8 Ou 1R D13 NSR0520V2T1G gt L1 22 5 Oj R TIWCKEE AAN lb e 23 n T l 5 uj E 5 eL BS e tZ 111200 029 i gt Pe i s 8 aa gt g H g w i gt a al E 2lo b EOG EOS Eos EOS E g E S81v0rVWS A CON1 243 211 2x RT 01T 1 0B LF py 1 Figure 10 Schematic of NCN5120 Development Board Part 1 http onsemi com 8 620 016 211 21 NCN51205GEVB APPLICATION SCHEMATIC I P3 3 UCBOCLK UCAOSTE 5 lle zsasa o a tLeezsasa Ye a J4 tLe ezsasa tLe ezsasa R11 620 008 211 21 z D MCIPTG33K V a Lu l CENI CM ll Q 0610 DWSH N a 5 za A E E 0L9 9NSH a Lu pu ER s Ih Q gt 0610 DWSH Vuc 3 3V 620 00
3. 26 V Vpp2 3 3 V Ipp2 40 mA Vin 26 V Vpp2 3 3 V Ipp2 35 mA loopy lt 4 mA Vpus gt 25 V 20 V Rising 20 V Falling Pin 1 3 5 and 7 J3 only valid if R12 R17 R22 and or R25 are mounted and Q1 Q2 Q3 and or Q4 are not mounted lol 5 mA x o e v 0 4 V http onsemi com 4 Table 4 AC PARAMETERS The AC parameters are given for a development board operating within the Recommended Operating Conditions unless otherwise specified Symbol Pin s Parameter NCN51205GEVB Remark Test Conditions Min Typ Max Unit Power Supply teus FILTER VBUS1 VBUS1 Filter Time Figure x3 2 ms MASTER Serial Peripheral Interface MASTER SPI tsck_HIGH tsck_Low SDI_SET SDI tsDI_HOLD tcs HIGH tcs HOLD tTREQ_LOW tTREQ_HIGH tTREQ_SET SPI Clock Period SPI Clock High Time SPI Clock Low Time SPI Data Input Setup Time SPI Data Input Hold Time SPI Data Output Valid Time SPI Chip Select High Time SPI Chip Select Setup Time SPI Chip Select Hold Time TREQ Low Time TREQ High Time TREQ Setup Time TREQ Hold Time SPI Baudrate Depending on Configuration Input Bits see Interface Mode page 16 Tolerance is Equal to Xtal Oscillator Tolerance Figure 7 C 20 pF Figure 7 Figure 7 Figure 7 Universal Asynchronous Receiver Transmitter UART eae s eel IRA EOS EE S EIA EE EA 0 5 x tsck
4. C16 C1005X5R0J105M RAE 120 15 20 20 Ceramic Multilayer a lo o 10 Ceramic Multilayer 20 Aluminum Electrolytic 10 Ceramic Multilayer 5 Ceramic Multilayer 20 Ceramic Multilayer 20 20 Ceramic Multilayer Multi Ceramic Multilayer 10 Ceramic Multilayer Ceramic Multilayer C17 C1005C0G1H120J 12 pF 5 Ceramic Multilayer a SS16T3G ON Semiconductor ON Semiconductor ON Semiconductor SOD 523 ON Semiconductor SOD 123FL ON Semiconductor SOD 523 Wurth Elektronik 2 mm pitch Wurth Elektronik 2 mm pitch 1SMA40AT3G D3 D13 NSR0520V2T1G Note 2 SMF5 0AT1G D5 a D7 ESD5Z3 3T1G RT 01T 1 0B LI Note 2 620 008 211 21 620 016 211 21 620 008 211 21 Wurth Elektronik 2 mm pitch J5 J6 J7 620 002 111 21 Wurth Elektronik 2 mm pitch J8 L1 L2 DA54NP 221K 220 uH Coils Electronic See Datasheet LED1 HSMG C190 Avago 1 6 x 0 8 LED2 Technologies LED3 ON Semiconductor SOT 23 Harwin See datasheet 10 Thick Film Yageo 1218 0 0625 W Thick Film RC0402JR xx0RL og RC0402JR xx33KL RC0402JR xx1RL R9 RC0402JR xx180KL R11 RC0402JR xx47KL Note 2 R12 R17 RC0402JR xx0RL R22 R25 Note 2 0 0625 W Thick Film 0 0625 W Thick Film 0 0625 W Thick Film 0 0625 W Thick Film R13 RC0402JR xx0RL Note 2 R15 R18 RC0402JR xx1KL R23 R26 R16 R19 RC0402JR xx1ML R24 R27 0 0625 W
5. 8 bitUART Mode 38 400 bps UART Mode 38 400 8 bitUART Mode 38 400 bps CSB out SPI Master 125 kbps SPI Master 500 kbps Master 500 SPI Master 500 kbps SCK out NOTE X Don t Care http onsemi com 17 NCN51205GEVB 7 Application Layer Presentation Layer Session Layer Host Controller Transport Layer Network Layer Logic Link Control Data Link Layer Media Access Control Physical Layer Figure 19 OSI Model Reference NCN5120 http onsemi com 18 NCN51205GEVB BOARD DIMENSIONS 64 5 39 0 32 4 36 2 2 8 19 7 61 7 Above dimensions are in mm Height C8 11 mm Height J1 7 mm pins only Height J2 J3 J4 6 mm Height L1 and L2 bottom side of PCB 4 8 mm The product described herein may be covered by one or more US patents pending ON Semiconductor and Q are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any pr
6. USE conncetor J2 The KNX_TXD and an ESD safe area this should not be an issue or KNX_RXD give a direct connection to the TXD by replacing this 5 V ESD diode with a higher and RXD pin of NCN5120 Because the MODE1 voltage version see the SMFxxA datasheet for MODE2 and TREQ pin have an internal pull other versions www onsemi com down one does not even need to connect these pins for UART mode For Analog Mode one can 8 Is it possible to test all interfaces UART SPI use J6 to make the TREQ pin high Analog Mode with KNX REVS Yes the KNX REVS board can be used with all possible interfaces One has to be careful however when using the Analog Mode In the Analog Mode the digital of NCN5120 is bypassed If the microcontroller would force the RXD pin pin 29 of NCN5120 low NCN5120 would pull the KNX bus low which could lead to issues Table 6 INTERFACE SELECTION 10 I m trying to sink more than 13 mA from the KNX bus with KNX REVS but I m having issues with the voltage regulators whenever I m going above 16 mA What could be the issue To be able to take more than 13 mA from the KNX bus one needs to pull the FANIN WAKE pin of NCNS5120 low This can be done by shorting J5 add jumper See NCN5120 datasheet for more info on the FANIN WAKE pin 9 S bitUART Mode 38 400 bps UART Mode 38 400 S bitUART Mode 38 400 bps 8 8 bitUART Mode 19 200 bps UART Mode 19 200 8 bitUART Mode 19 200 bps 8
7. a library for the microcontroller to complete the data link layer By no means will ON Semiconductor provide any of the higher layer stacks Network Layer Transport Layer Sufficient 3rd party companies are available which have certified higher layer stacks FAQs 1 Is this development board KNX Certified No only NCN5120 is KNX Certified The development board may only be used for evaluation of NCN5120 It is not allowed to use the development board in a final product or to sell it as a KNX Certified product Contact ON Semiconductor if you want to use the development board as a final product 2 What 3rd party companies do you recommend for the higher layer stacks ON Semiconductor does not recommend any 31d party company in particular Several 3 party companies have KNX Certified stacks and it s always advised to use one of these stacks Some companies have experience with NCN5120 Contact ON Semiconductor for more information 3 Can we freely reuse the schematic and layout of this development board It is allowed to reuse the schematic components and layout of the NCN5120 development board for your own application Because the operating conditions of your design are not known by ON Semiconductor one must always fully verify the design even if it s based on this development board Contact ON Semiconductor if additional information is required 4 Can we request ON Semiconductor to supply the higher layer stacks By
8. 2 111 21 BSL_RXD 620 002 111 21 b N Lu e Figure 11 Schematic of NCN5120 Development Board Part 2 DAV ssava IWN LSY MOL SWL WIO LIGL LOL X198 L L td Y 1OV HInOS UY Pd ZBLS bd P3 4 UCAOTXD UCAOSIMO P3 5 UCAORXD UCAOSOMI XOUT P2 7 CA7 Dvcc XIN P2 6 CA6 P3 6 P37 TBO 1 TB1 2 TB2 3 TBO P4 4 TB1 TOSOEDMINOSOBDNVE Ed VOSOSOMOWISOSSN Ed WIDOVON ALSOBSNM0 Ed SVWO OSOU S Td ZVL WO ed LVL 0VO EZd PYOIOVL LNOWOe Zd EVIMIONIVLZd ZWI TOV 0 Zd gVlU Ld http onsemi com 9 MSP430F2370IRHAx TREQ MODE2 lt MODE1 lt lt Gak lt gt SDOTXD gt SDVRXD J SCK UC2 NCN51205GEVB 1042Mpuosswes NO GAJY XNY 0 ex Figure 12 Top Layer of NCN5120 Development Board EVIA_2V_0SI2MIM Figure 13 Bottom Layer of NCN5120 Development Board http onsemi com 10 NCN51205GEVB Figure 15 Inner Layer 2 of NCN5120 Development Board http onsemi com 11 NCN51205GEVB Figure 16 Top Silkscreen of NCN5120 Development Board Figure 17 Bottom Silkscreen of NCN5120 Development Board http onsemi com 12 NCN51205GEVB Table 5 BILL OF MATERIALS Note 1 Reference Part Number C1 C2 C1005COG1H100D 10 pF C3 C4 C7 C1005X5R0J104M 100 nF B41145A7107M000 100 a C1608X5R1H105K ter C10 C1005COG1H100D Note 2 C14 C1005X5R1H222K 2 2 6 3 V Note 2 y Ceramic Multilayer C15
9. NCN51205GEVB KNX Evaluation Board Users Manual Introduction The NCN5120 Development Board is the ideal solution for developing your KNX application with the ON Semiconductor KNX transceiver NCN5120 The development board contains the NCN5120 KNX Transceiver which handles the transmission and reception of data on the bus It will also generate all necessary voltages to power the board and external loads It also contains a microcontroller with debug interface for custom firmware development Up to 8 external switches can be monitored and up to 4 external loads can be controlled A voltage between 3 3 V and 21 V is available to drive the external loads The NCN5120 Development Board assures safe coupling to and decoupling from the KNX bus Bus monitoring warns the external microcontroller for loss of power so that critical data can be stored in time Figure 1 NCN5120 Development Board Semiconductor Components Industries LLC 2013 May 2013 Rev 0 ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Key Features e 9 600 baud KNX Communication Speed e Supervision of KNX Bus Voltage e High Efficient 3 3 V to 21 V Selectable DC DC Converter to Drive External Loads e Monitoring of Power Regulators No Additional Power Supply Required e Buffering of Sent Data Frames Extended Frames Supported Selectable UART or SPI Interface to Host Controller Selectable UART and SPI Baud Rate to Host Controller Optio
10. Thick Film 0 0625 W 15 Thick Film 0 0625 W 15 Thick Film 2N7002L D3082F05 RC1218JK xx22RL 22 Q 1 All devices are Pb Free 2 Not mounted http onsemi com 13 NCN51205GEVB Table 5 BILL OF MATERIALS continued Note 1 R20 R28 RC0402JR xx1KL 1 kQ 0 0625 W 15 Thick Film Yageo 0402 R29 R21 RC0402JR xx100KL w kQ I 0625 W r Thick Film Yageo 0402 U1 NCN5120 ON Semiconductor QFN 40 U2 MSP430F2370RHAX RHAx Texas Instruments Instruments VOFN 40 40 T PF es s ss s aaa a 2 1 All devices are Pb Free 2 Not mounted http onsemi com 14 NCN51205GEVB FUNCTIONAL DESCRIPTION Because the NCN5120 Development Board contains the NCN5120 KNX Transceiver KNX Certified no details on KNX will be given in this document Detailed information on the Certified KNX Transceiver NCN5120 can be found in the NCN5120 datasheet www onsemi com Detailed information on the KNX Bus can be found on the KNX website and in the KNX standards www knx org KNX Bus Connection Connection to the KNX bus is done by means of J1 A standard Wago connector type 243 211 can be used for this see Figure 18 A reverse protection diode D1 Figure 11 is foreseen mandatory as also a Transient Voltage Suppressor D2 Figure 11 S Figure 18 KNX Bus Connector Adjustable DC DC Converter NCN5120 provides the power for the complete reference design It has also a second pow
11. er supply which can be used to drive external loads The voltage is programmable between 3 3V and 21V by means of an external resistor divider R6 and R9 see Figure 11 The voltage divider can be calculated as next _ Ro X Ryppem Vpp2 3 3 6 Ro Rypp2u 3 3 Rvpp2m is between 60 kQ and 140 KQ typical 100 KQ The DC value of the KNX bus should be higher than Vpp2 Be aware that when changing the Vpp2 voltage D9 D12 see Figure 11 need to be replaced Check the SMFxxA product family for possible replacements www onsemi com Although Vpp2 is capable of delivering 100 mA the maximum current capability will not always be usable One needs to make sure that the KNX bus power consumption stays within the KNX specification The maximum allowed current for Vpp2 can be calculated as next Vus X Isus gt 2 x 0 033 Vpp2 X Ipp2 eq 2 Igus is limited by NCN5120 If JS is open Ipus can maximum be 12 5 mA If J5 is shorted Igys can maximum be 25 mA Ipus will however also be limited by the KNX standard Minimum Vgpus is 20 V see KNX standard eq 1 Above formula gives only an estimation and will mainly depend on the firmware loaded on the microcontroller U2 see Figure 11 One must always verify that the KNX bus loading is in line with the KNX Specification under all operating conditions Xtal Oscillator A crystal of 16 MHz Y1 see Figure 11 is foreseen on the development board This clock signal is als
12. heet on how to do this The external outputs are driven by means of low side drivers Q1 Q4 see Figure 11 A gate resistor is foreseen for slope control R15 R18 R23 and R26 of Figure 11 J3 is routed in such a way that the load can easily be connected between the output low side driver and Vpp2 Q1 Q4 can be used over the complete Vpp2 voltage range ESD diodes D9 D12 need to be replaced if Vpp2 is increased see also Adjustable DC DC Converter Push Button and LED s One push button SW1 and 3 LED s LED1 LED3 are foreseen on the reference design These are freely usable http onsemi com 15 NCN51205GEVB Jumpers Several jumpers are located on the board J5 J8 JS can be used to set the Fan In Mount the jumper for the highest Fan In setting J6 is required when one wants to force NCN5120 in Analog Mode make sure microcontroller is in reset to avoid conflicts J7 can be used to disconnect the microcontroller from the fixed DC DC converter of NCN5120 Be aware that if the microcontroller is not powered NCN5120 could start powering the microcontroller over the IO pins It s advised to always short J7 J8 can be used to disconnect the RESETB signal from the RST pin of the microcontroller Microcontroller Debug Interface J4 is the microcontroller debug interface See the microcontroller datasheet for more info on how to use this interface Interface Mode The device can communicate wi
13. igure NO TAG VBus_Hyst Undervoltage Hysteresis 0 6 V KNX Bus Coupler raton J5 shorted 26 60 mA Fixed DC DC Converter Vpp1 J2 1 Output Voltage 3 13 3 3 3 47 V Output Voltage Ripple Vpus 26 V Ipp1 40 mA 40 mV Overcurrent Threshold 100 200 mA Power Efficiency Vin 26 V Ippi 35 mA 90 http onsemi com 3 NCN51205GEVB Table 3 DC PARAMETERS continued The DC parameters are given for a development board operating within the Recommended Operating Conditions unless otherwise specified Convention currents flowing in the circuit are defined as positive Con nector Symbol Pin s Parameter Remark Test Conditions Min Typ Max Unit Adjustable DC DC Converter VDD2H Vpp2L VDD2 rip lDD2_lim NVDD2 20 V Regulator l20V_Lim V20VH V ovL V20V_hys Digital Inputs J2 Digital Outputs 1 3 5 7 9 11 13 15 1 3 5 7 Output Voltage Undervoltage Release Level Veus gt Vpp2 Vppe Rising Figure NO TAG Undervoltage Trigger Level Vppe Faling Figure NO TAG Output Voltage Ripple Overcurrent Threshold Power Efficiency 20 V Output Voltage 20 V Output Current Limitation 20 V Undervoltage Release Level 20 V Undervoltage Trigger Level Overcurrent Threshold Logic Low Threshold Logic High Threshold Logic Low Output Level Logic High Output Level Logic Low Level Open Drain Veus
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15. nal CRC on UART to the Host Optional MARKER Character to the Host Optional Direct Coupling of RxD and TxD to Host Analog Mode Auto Polling Optional e Temperature Monitoring e Contains Freely Programmable Microcontroller for Custom Applications e Monitoring of 8 External Switches e Controlling of 4 External High Voltage Loads e g LED s e One Freely Usable Push Button e 3 Freely Usable LED s e Operating Temperature Range 25 C to 85 C Publication Order Number EVBUM2186 D NCN51205GEVB BLOCK DIAGRAM Connector J4 RESETb SAVEb MSP430 Interface UART or SPI Low Side Drive ESD Protection Cc 2 O B 2 a jo 5 L A oc Connector J3 3 LED Switch LED1 2 3 SW1 Figure 2 NCN5120 Development Board Block Diagram CONNECTOR DESCRIPTION Table 1 CONNECTOR LIST AND DESCRIPTION KNX Bus Connection Power Supply and UART Connection External Switch Inputs and External Outputs Microcontroller Debug Interface TYPICAL APPLICATION Y Ni gt JA 4 Push Buttons amp with each one blue LED 4 F Figure 3 Typical Application http onsemi com 2 NCN51205GEVB ELECTRICAL SPECIFICATION Recommend Operation Conditions Operating ranges define the limits for functional outside these operating ranges is not guaranteed Operating operation and parametric characteristics of the development outside the recommended operating ranges for exte
16. nded board Note that the functionality of the development board periods of time may affect device reliability Table 2 OPERATING RANGES Symbol Parameter Vpus Voltage on Positive Pin of J1 Note 1 VbiG1 Input Voltage on J4 and J3 Pins 9 11 13 and 15 and J2 Pin 8 VpiG2 Input Voltage on J3 Pins 1 3 5 and 7 Note 2 Vpp1 Output Voltage on J2 Pin 1 Vppe2 Output Voltage on J3 Pins 2 4 6 and 8 and J2 Pins 3 and 7 Note 3 Voov Output Voltage on J2 Pin 5 Ta Ambient Temperature Voltage indicates DC value With equalization pulse bus voltage must be between 11 V and 45 V Higher voltages are possible See Adjustable DC DC Converter page 15 for more details Only valid if R12 R17 R22 and R25 are not mounted See Adjustable DC DC Converter page 15 for the limitations DN o Table 3 DC PARAMETERS The DC parameters are given for a development board operating within the Recommended Operating Conditions unless otherwise specified Convention currents flowing in the circuit are defined as positive Con Remark Test Symbol nector Pin s Parameter Conditions Min Typ Power Supply Bus DC Voltage Excluding Active and Equalization Pulse Bus Current Consumption Normal Operating Mode No External Load DC1 and DC2 Enabled Continuous Transmission of 0 on the KNX Bus by another KNX Device Undervoltage Release Level Veys Rising Figure NO TAG Undervoltage Trigger Level Vpus Falling F
17. no means will ON Semiconductor provide any higher layer stacks Certified higher layer stacks can be provided by 3 party companies see also Firmware 5 How much load can the outputs drive The maximum allow load can be calculated with the formula as given in Adjustable DC DC Converter page x13 Ipp2 defines the maximum load the outputs can drive in total http onsemi com 6 NCN51205GEVB 9 Is it possible to bypass the microcontroller on the 6 What is the usage of ARXD and ATXD KNX REV5 board and connect NCN5120 directly Figure 11 with our microcontroller board These pins have no meaning and cannot be used Although the board is not designed for this this is 7 Pve tried all possible R6 and R combinations but possible One could connect NCN5 120 directly to I m not capable of setting Vpp2 above 6 V How your microcontroller board by soldering some docsihisicome wires on the KNX REVS board It is however As can be seen in Figure 10 Vpp2 5 V is advised to remove the microcontroller from the l connected to an ESD protection diode D14 This KNX REVS board or to put the microcontroller m is a 5 V ESD protection diode Whenever one tries reset short pins 8 and 7 of J4 see Figure 10 i to set Vpp2 above 5 V this ESD diode will trigger In case one wants to use the UART interface 9 bit and limit the Vpp2 voltage to about 6 V UART 19 200 bps or Analog Mode one could This issue can be solved by or removing D14 in EVED
18. o supplied to the microcontroller See the NCN5120 datasheet www onsemi com for more details on this signal RESETB and SAVEB The KNX transceiver NCN5120 controls the reset state of the microcontroller by means of the RESETB signal An additional signal SAVEB can be monitored by the microcontroller to detect possible issues See NCN5120 datasheet for more details on these two signals Voltage Supervisors NCN5120 has different voltage supervisors Please check the NCN5120 datasheet for more details Temperature Monitor NCNS5120 produces an over temperature warning TW and a thermal shutdown warning TSD Please check the NCN5120 datasheet for more details External lO The development board has the possibility to monitor up to 8 inputs pin 1 3 5 7 9 11 13 and 15 of J3 and control up to 4 outputs pin 1 3 5 and 7 of J3 Notice that 4 of the inputs are shared with 4 of the outputs pin 1 3 5 and 7 of J3 By default the board has 4 inputs pin 9 11 13 and 15 of J3 and 4 outputs pin 1 3 5 and 7 of J3 To use the additional 4 inputs Q1 Q4 need to be removed and R12 R17 R22 and R25 need to be mounted The input pins are 3 3 V compliant and ESD protected D5 D8 Figure 11 J3 is connected in such a way that an easy connection between the input and ground is possible pin 9 11 13 and 15 of J3 The microcontroller U2 see Figure 11 should be configured with an internal pull up see microcontroller datas
19. oduct or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to a
20. th the host controller by means of a UART interface or an SPI interface The selection of the interface is done by the pins MODE1 MODE2 TREO SCK UC2 and CSB UC1 which are connected to the microcontroller see Figure 11 More details on the different interfaces can be found back in Table 6 and the NCN5120 datasheet Digital Description The implementation of the Data Link Layer as specified in the KNX standard is divided in two parts All functions related to communication with the Physical Layer and most of the Data Link Layer services are inside NCN5120 the rest of the functions and the upper communication layers are implemented into the microcontroller see Figure 11 and Figure 19 The host controller is responsible for handling e Checksum e Parity e Addressing e Length The NCN5120 is responsible for handling e Checksum e Parity e Acknowledge e Repetition e Timing Services All services can be found back in the NCN5120 datasheet www onsemi com Firmware No special firmware is provided with the development board There will be some basic firmware flashed on the microcontroller U2 Figure 11 but this is only used to verify the development board before shipment The user has the possibility to develop his own firmware but help on programming the microcontroller will not be provided my ON Semiconductor NCN5120 contains the physical layer and a part of the data link layer see Figure 19 ON Semiconductor can provide
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