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User Manual - Hytec Electronics Ltd

1. a i Page 7 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 4 USB device The SIS3150USB device USB peripheral is hotplugging The SIS3150USB device in combination with the drivers Win2K XP future option LINUX supports access to following spaces SIS3150 USB register space SIS3150 TS BUS internal TigerSHARC Bus VME Bus 4 1 SIS3150 USB Register space The driver offers the following calls int sis3150Usb_Register_Single_Read HANDLE usbDevice ULONG addr ULONG data int sis3150Usb_Register_Dma_Read HANDLE usbDevice ULONG addr ULONG dmabufs ULONG reg_nof_data ULONG got_nof_data int sis3150Usb_Register_Single_Write HANDLE usbDevice ULONG addr ULONG data int sis3150Usb_Register_Dma_Write HANDLE usbDevice ULONG addr ULONG dmabufs ULONG req_nof_data ULONG put_nof_data Page 8 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 4 1 1 USB Register Space Address Map Offset R W Function Register 0x0 R W USB Control Status register 0x1 R___ Module Id and firmware revision register 0x2 R W USB TS Link Connect Register 0x3 R W_ USB LE
2. Page 57 of 68 5 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 14 9 Switch S80 Selection of VME Slave Address Mode and selection of Reset features 12 3 45 6 7 8 o i Oo BERR OFF S80 1 Enable VME Slave A32 Addressing S80 2 reserved S80 3 Enable VME Slave Geographical Addressing S80 4 reserved S80 5 Enable ON or Disable OFF FPGA Watchdog S80 6 reserved VME SYSRESET Output S80 7 reserved VME SYSRESET Output S80 8 connect ON VME SYSRESET to SIS3150 Reset Page 58 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 14 10 Switch S610 and S620 Selection of TigerSHARC Controls SIS3150 Default setting OFF S610 1 ON TSx_CONTRLIMPO S610 2 OFF TSx_CONTRLIMPI S610 3 OFF TSx_CONTRLIMP2 S610 4 OFF TSx_DS0 S610 5 OFF TSx_DS1 S610 6 OFF TSx_DS2 S610 7 ON TSI_BM_L S610 8 ON TS2_BM_L TSx_CONTRLIMP 2 O TSx_DS2 0 TS1_BM_L TS2_BM_L 620 1 ON TSx_LCLKRATO 620 2 ON TSx_LCLKRATI 620 3 OFF TSx_LCLKRAT2 620 4 OFF TSx_BMS_L S620 5 ON TS1_TMROE S620 6 ON TS2_TMROE 620 7 ON TS1_L2DIR S620 8 ON TS2_L2DIR S620 EB 1 2 3 4 5678 S610 aa TS 1 boot strap on IRQs disabled TS2 boot strap on IRQs disabled Control Impedance Selection Digital Drive Strength Selection Interrupt Enabl
3. VME IRQ enable IRQ_Update Kg Source 7 Clear Status FLAG Source 7 Enable 7 5 2 5 1 Interrupt sources A short explanation of the implemented interrupt sources is given in the following subsections IRQ Source 0 IRQ Source 1 IRQ Source 2 IRQ Source 3 IRQ Source 4 IRQ Source 5 IRQ Source 6 IRQ Source 7 A high to low transition of the TS1_FLAGO will set the Status Flag 0 A high to low transition of the TSI_FLAGI will set the Status Flag 1 A high to low transition of the TS2_FLAGO will set the Status Flag 2 A high to low transition of the TS2_FLAGI will set the Status Flag 3 no source reserved for CMC1 IRQO no source reserved for CMC1 IRQ1 no source reserved for CMC2 IRQO no source reserved for CMC2 IRQ1 N Clear IRQ ROAK case internal VME_IRQ AN D MUX VME IRQ IRQ RORA case Page 27 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 5 2 6 LEMO Out Select Register write read define SIS3150_LEMO_OUT_S EL ECT_REG 0x10 This register allows you to select the source s that are driving the LEMO outputs on the SIS3150 board Bit meaning Function 31 reserved No 30 reserved No 29 VME Slave Lemo Out 2 1 VME Slave Control B
4. n 2 22a E 50 13 Front Pane Elements caca ai tati 51 13 17 USBI USB2 O Distin ction vesical iaa 51 TAS JUMpers connectorS a na A A aa eats 32 14 1 J10 16 MHZ VME Sysel ck coria ticas 53 14 2 J770 and J771 Termination of LEMO Input 1 and 2 eeseeseessessensesnensessoesennnesnnnennnenenennensnnnonnennn 53 14 3 JP570 SIS3150 FPGA JTAG source uueeenseeesnneeesennnnnsnnnnnnnennnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnensnnnnnennnnnnnnn 54 14 4 JP580 CMC FPGA JTAG SOU CE nrnna a a e a r rE 54 145 Jumper JP_CMC1 and JP_CMC2 cenensennsenssnnsnnnensnnsnnnnnnnnnnennnennnnnen nen nennennnennsennen nenne 55 14 6 CON570 SIS3150 JTAG connector 0 cc ceeccccecssscecesscececssececsececesssececesseeceesseeecessueeccsssseceesteeeesetaeees 56 14 7 CON580 CMC JTAG connector ccccccccccccccccccccccccccccccccccccccscecscscscscecscscecscseecesecececesecececececeeeeeseceseeeeees 56 14 8 TS_JTAG TigerSHARCs JTAG Test Access Port COMNCCtOM c ccesccesecececeeeeseeeeeeeeeeaeeeseeeeeeenees 57 J P Ro MESEN WICH EST e E A EA a S AEA AE RN 58 14 10 SWitch S610 and SO20 ci a cones a a a a a hates aa a a 59 15 SIS3150 Top Assembly Drawing ensassuuuenusnsunsssk unable 60 19 CONEA PES a a AE SS 61 A o he cca cha cate O LO 62 17 1 AAA E 62 17 1 1 Transfer Write ACCESS ccccececscccccecsessssssescescecsseessesccecsesseessescessessessescesesenssessesececsesseessesssescecsees 62 17 1 2 Transfer Read ACC SS
5. AS la 0 USB Device Check use USB Devices Ezusb 0 Global Write Access Mode Address Offset il a ee ue A32 032 20000000 Wri oo j DMA Length bytes Write Value 100 4 DMA written bytes 0 WRITE RETURN CODE device vendor product Ser No Ezusb 0 0x1657 0x3150 0x0001 E COUNT LOOP Loops Done 101 10000 10000 Global Read Access Mode Address Offset Read estas 2 nes A32 D32 3 20000000 Read Value Gora Gontrolestings DMA request bytes Last Read Value PRINT ON HOLD ON ERROR On On E o B or Loops D 100 301 COUNT LOOP ops Done DMA read bytes 0 READ RETURN CODE Loop Timer 200 STATUS LED Note The SIS3150 USB base program checks for USB devices in a cyclic manner as long as the USB Device check slide bar is set to On The scan resets the user LED on the SIS3150 in case it was set switched on with a control write Page 43 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 10 Labview Windows Interface The SIS3150USB Labview interface uses the same DLL as the standard Windows driver At this point in time the VIs are limited to one SIS3150USB interface The handle for this interface is passed to the VME access VIs as a global variable Copy the winlabview directory to your c drive M5 3150winlabview Datei Bearbeiten Ansicht Favoriten Extras aria r y wi P Suchen E Ordner IS E x 1
6. 26 reserved 25 reserved 24 reserved 23 READ_FIFO_DISABLE 0 VME read data will be pushed into FIFO 1 VME read data will be stored in register only 22 READ_FIFO_CLR_DISABLE 0 VME read FIFO will be cleared at the beginning 1 VME read FIFO will not be cleared at the beginning 21 WORD_COUNT_CLR_DISABLE 0 clear word count on each sequencer read 1 leave word count uncleared 20 VME ADDR_INC_DISABLE DMA 19 HOLD_VME_MASTER 18 DMA_CYCLE 17 SINGLE_CYCLE 16 VME_CYCLE not INTERNAL_CYCLE for VME_CYCLE for Internal CYCLE 15 reserved 14 DMA_MODE Bit 1 13 DMA_MODE Bit 0 12 DMA read 11 reserved 10 VME AS HOLD 9 VME DS1 Veto 8 VME DSO Veto 15 VME_IACK 14 VME_WRITE 13 VME_AMS 12 VME_AM4 11 VME_AM3 10 VME_AM2 9 VME_AMI 8 VME_AMO Page 38 of 68 VUC3150 VME64x VME to USB2 0 Version 1 23 Controller More detailed description of bits 19 16 ADDR_19 ADDR_18 ADDR_17 ADDR_16 HOLD_VME_ DMA_CYCLE SINGLE_CYCLE INTERN MASTER CYCLE x x x 1 internal Cycle 0 0 0 0 release VME MASTER_SHIP 1 0 0 0 VME Arbitration only and hold VME MASTER_SHIP 0 0 1 0 VME Single Cycle with Arbitration and release VME MASTER_SHIP 1 0 1 0 VME Single Cycle with Arbitration and hold VME MASTER_ SHIP 0 1 x 0 VME DMA Cycle with Arbitration and release VME MASTER_SHIP 1 1 x 0 VME DMA Cycle with Arbitration and hold VME MASTER_SHIP Page 39 of 68 VUC3150US
7. EI Ordner O sis3150vis E 3 siscd_170105 O 515330x E O sis3150usb Doc A sis3150usb_vme_win dil E 3 Driver a E O windows E O sis3150usb_vme_applications E O 3 1S0winlabview O sis3150vis gt 2 Objekte e Freier Speicherplatz 655 GB 56 0 KB Lokales Intranet L The DLL is assumed to be in c sis3150winlabview sis3150usb_vme_win dll I Call Library Function Library Name or Path Eee Browse Function Name sis3150Usb_Yme_Single_Wwrite r Reentrant error Calling Conventions E X 7 Parameter return type El Base address ii Type Numeric Add a Parameter Before uszy Data Type Unsigned 32 bit Integer Add a Parameter After Delete this Parameter Function Prototype nsigned long sis3150Usb_Yme_Single_Write unsigned long handle unsigned long addr unsigned long am unsigned long size unsigned long data Cancel Help Page 44 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 10 1 closedriver The closedriver VI is used to close the instance of the driver after powering off the VME crate eg Without closing the driver you will get a new device with every power cycle Ezusb 0 Ezusb 1 Ezusb 2 Ezusb 3 After Ezusb 3 you would have to restart Labview to start at Ezusb 0 again Please not that the closedriver VI needs the last valid handle as input parameter i e you can not use the global handle
8. It is implemented via a selective J K register a specific function is enabled by writing a 1 into the set enable bit the function is disabled by writing a 1 into the clear disable bit which location is 16 bit higher in the register An undefined toggle status will result from setting both the enable and disable bits for a specific function at the same time On read access the same register represents the status register Bit write Function read Function 31 Clear reserved control bit 15 0 24 0 23 Status LEMO In 2 Latch 22 Status LEMO In 1 Latch 21 Clear USB LEMO Out 2 Status LEMO In 2 20 Clear USB LEMO Out 1 Status LEMO In 1 19 Clear USB LEMO Out control bit 0 18 Clear USB XILINX JTAG Control bit CMC reset pulse active 21ms 17 switch off user LED U2 0 16 switch off user LED U1 CMC 1 detect 15 Set reserved control bit 15 Status reserved control bit 15 6 S 5 5 Set USB LEMO Out 2 Status USB LEMO Out 2 Bit 4 Set USB LEMO Out 1 Status USB LEMO Out 1 Bit 3 Set USB LEMO Out control bit Status USB LEMO Out control bit 2 Set USB XILINX JTAG Control bit Status USB XILINX JTAG Control bit 1 switch on user LED U2 Status User LED U2 0 switch on user LED U1 Status User LED U1 1 LED on 0 LED off denotes power up default setting i e the power up reading of the register is 0x0 the LEDs could be also set from VME
9. cccccescsscscccccsesssssssccscsesseessesccscsessessssscecessseusessscsceessssessscesessessesscescessees 63 17 1 3 Block transfer Read Direct VME Bus ACCESS 00 cccccccessssssccsccecsessssscsscescesssssesscescessssessceseeeees 65 1 7 2 GOSSALY E bass sedetat SE 66 18 Tide a lod ADE 67 Page 4 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 1 Introduction The SIS3150 9921 USB2 0 to VME interface is a combination of two cards The actual VME master slave card is the SIS3150 dual CMC carrier board which can be equipped with up to 2 TigerSHARC Digital Signal Processors DSPs The SIS9921 is the interfacing CMC card which has the Cypress Semiconductor CY7C68013 USB2 0 controller chip While a USB to VME interface is slow for single cycle VME transactions typically 100 us compared to a PCI to VME interface SIS1100 3100 typically 5 us you can reach block transfer speeds in the 30 MByte s ballpark what is similar to many Tundra Universe II based SBC s On the SIS3150 9921 single cycle performance can be enhanced in two ways e pipelining of several cycles e execution of VME transactions under control of the TigerSHARC DSP Especially with the 2 approach the USB2 0 to VME interface allows for the implementation of very demanding hard realtime applications in combination with the ease of use with your laptop computer The use of the 2 CMC site of the SIS3150 for a frontend card like the SIS9300 4 cha
10. 1 0 19 Clear reserved control bit 3 0 18 Clear reserved control bit 2 CMC reset pulse active 21ms 17 switch off user LED U2 CMC2 detect 16 switch off user LED U1 CMC 1 detect 15 Set reserved control bit 15 Status reserved control bit 15 6 E ss 5 Set VME Slave LEMO Out 2 Status VME Slave LEMO Out 2 Bit 4 Set VME Slave LEMO Out 1 Status VME Slave LEMO Out 1 Bit 3 Set reserved control bit 3 Status reserved control bit 3 2 Set reserved control bit 2 Status reserved control bit 2 1 switch on user LED U2 Status User LED U2 0 switch on user LED U1 Status User LED U1 1 LED on 0 LED off denotes power up default setting i e the power up reading of the register is 0x0 the LEDs can be set from the USB side also see USB LEMO Out Select Register Page 23 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 5 2 2 Module Id and Firmware Revision Register 0x4 read define SIS3150_MODID 0x4 read only D32 This register reflects the module identification of the SIS3150 and its minor and major firmware revision levels The major revision level will be used to distinguish between substantial design differences and experiment specific designs while the minor revision level will be used to mark user specific adaptations Bit Function Re
11. 22 Clear VME REQUESTER TYPE BIT 0 21 Clear VME_REQ LEVEL BIT1 0 20 Clear VME_REQ LEVEL BITO 0 19 no function 0 18 no function 0 17 Clear VME_SYSRESET bit 0 16 no function Status VME System Controller 3 15 Set SYSTEM VME BERR TIMER BIT1 Status SYSTEM VME BERR TIMER BIT1 14 Set SYSTEM VME BERR TIMER BITO Status SYSTEM VME BERR TIMER BITO 13 Set LONG TIMER BIT1 Status LONG TIMER BIT1 12 Set LONG TIMER BITO Status LONG TIMER BITO 11 no function 0 10 no function 0 9 no function 0 8 no function 0 7 no function 0 6 Set VME REQUESTER TYPE BIT Status VME REQUESTER TYPE BIT 5 Set VME_REQ LEVEL BIT1 Status VME_REQ LEVEL BIT1 4 Set VME_REQ LEVEL BITO Status VME_REQ LEVEL BITO 3 no function 0 2 no function 0 1 Set VME_SYSRESET bit 4 Status VME_SYSRESET bit 0 no function 0 The power up value is 0x00000000 Notes 3 is set if Jumper J10 1 2 is inserted or if VME System Controller Enable bit is set 4 if Switch S80 7 is ON and VME_SYSRESET bit is set then VME_SYSRESET is issued Page 14 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller Explanation function of bit combinations SYSTEM VME BERR TIMER BIT1 SYSTEM VME BERR TIMER BITO VME Bus Error after 0 0 1 25 us 0 1 6 25 us 1 0 12 5 us 1 1 100 us default Note The default value of 1 25 us will be fine with most of VME slaves on the market there are peculiar cards which will respond to a VME cycle
12. 6 13 Major Revision Bit 5 12 Major Revision Bit 4 11 Major Revision Bit 3 10 Major Revision Bit 2 9 Major Revision Bit 1 8 Major Revision Bit 0 7 Minor Revision Bit 7 6 Minor Revision Bit 6 5 Minor Revision Bit 5 4 Minor Revision Bit 4 3 Minor Revision Bit 3 2 Minor Revision Bit 2 1 Minor Revision Bit 1 0 Minor Revision Bit 0 Major revision number Application user 0x20 Generic SIS3150USB design Page 11 of 68 VUC3150USB VME64x VME to USB2 0 Controller Version 1 23 4 2 3 USB TS Link Connect Register write read define SIS3150USB_TS_LINK_CONN TS Link Breaker Enable Register See chapter TS LINKs not all bits ECT_REG 0x2 Bit meaning Function 31 no 0 12 no 0 11 no 0 10 no 0 9 TS1 Link3 lt gt TS2 Link2 Set clear 0 not connected 1 connected 8 TS1 Link2 lt gt TS2 Link3 Set clear 0 not connected 1 connected 7 TS2 Link3 lt gt internal TSx Link3 0 always disabled reserved 6 TS2 Link2 lt gt internal TSx Link2 0 always disabled reserved 5 TS2 Link1 lt gt internal TSx Link1 0 always disabled reserved 4 TS2 Link0 lt gt internal TSx Link0 0 always disabled reserved 3 TS1 Link3 lt gt internal TSx Link3 0 always disabled reserved 2 TS1 Link2 lt gt internal TSx Link2 0 always disabled reserved 1 TS1 Link1 gt internal TSx Li
13. Blocks 6Mbit each 2Mbit INTERNAL SPACE INTERNAL MEMORY BLOCK 0 RESERVED INTERNAL MEMORY BLOCK 1 RESERVED INTERNAL MEMORY BLOCK2 RESERVED INTERNAL REGISTERS UREGS RESERVED 0x0000 0x0000 0x0008 0x0008 0x0010 0x0010 0x0018 0x0018 0x003F 0000 FFFF 0000 FFFF 0000 FFFF 0000 FFFF FFFF GLOBAL SPACE INTERNAL SPACE Multiprocessor Space External Space RESERVED BROADCAST PROCESSOR IDO PROCESSOR ID 1 PROCESSOR ID 2 PROCESSOR ID 3 PROCESSOR ID 4 PROCESSOR ID 5 PROCESSOR ID 6 PROCESSOR ID 7 SDRAM CMC Site 1 MEMORY BANK 0 CMC Site 2 MEMORY BANK1 HOST 0x0000 0x003F 0x01C0 0x0200 0x0240 0x0280 0x02C0 0x0300 0x0340 0x0380 0x03C0 0x0400 0x0800 0x0C00 0x1000 OxFFFF 0000 FFFF 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 FFFF Page 31 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller Page 32 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 6 2 TS Hardware Interrupts Each DSP supports four external hardware Interrupts IRQ3 0 The sources of the eight IRQs TS1_IRQ3 0 and TS2_IRQ3 0 are defined by the SIS3150 FPGA design The SIS3150 Firmware versions 31500101 and 3150010
14. IEEE 1386 DSP Digital Signal Processor SBC Single Board Computer Page 66 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 18 Index 16 MHz 53 source 4 27 A32 47 IRQ mode 25 address map 21 22 ROAK 25 VME 22 RORA 25 address space 18 20 J1 20 AM 46 J10 53 applications 6 J770 53 arbitration J771 53 timeout 15 J90 56 backplane 20 JP570 54 BERR JP580 54 timeout 15 JTAG 54 56 block diagram 7 jumpers 52 bus error 15 L2 51 bus request level 15 L4 51 closedriver 45 Labview 44 CMC 5 66 LCLKRAT 59 CON500 54 LED CON570 56 error 46 CONS580 56 user 12 13 14 23 28 43 connector types 61 user 1 10 CVI 43 user 2 10 CY7C68013 5 LEMO D32 47 In 1 10 DLL 44 In 2 10 DO8 25 Out 1 10 Driver Out 2 10 Windows 40 LEMO input 53 DSP 66 LINUX 49 FindAll_SIS3150USB_Devices 45 lsusb 49 firmware 56 master 5 front panel elements 51 mastership 15 Front Panel Layout 18 20 mode functionality 6 FIFO 48 FX2 51 PCI to VME interface 50 GA 20 PROM 54 56 GND 56 57 realtime 5 got_num_words 48 register handle 45 control 11 24 handle gbl 45 firmware revision 11 24 input interrupt configuration 25 LEMO 53 interrupt control 16 25 installation 40 interrupt sources 27 interrupter mode 25 interrupter type 25 introduction 5 IRQ almost full 27 clock shadow 26 27 FIFO almost full 26 FIFO threshold 26 LNE 26 27 overfl
15. SIS3150 Please note that errors during this process can render a module temporarily in non working condition JP570 has 3 pins The first pin of the jumper fields is marked by a square pin on the solder side and an extra frame on the silk screen of the component side Depending on whether pins and 2 or 2 and 3 are closed the JTAG source is defined as listed below JP570 ai 1 2 closed JTAG connector CON 570 JP570 2 3 closed VME 14 4 JP580 CMC FPGA JTAG source Firmware can be loaded to the XC18V04 serial PROM on the CMC s via a JTAG download cable XILINX JTAG PC4 e g or via the VME interface of the SIS3150 Please note that errors during this process can render a module temporarily in non working condition JP580 has 3 pins The first pin of the jumper fields is marked by a square pin on the solder side and an extra frame on the silk screen of the component side Depending on whether pins 1 and 2 or 2 and 3 are closed the JTAG source is defined as listed below JP580 el 1 2 closed JTAG connector CON 580 JP580 ee 2 3 closed VME Page 54 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 14 5 Jumper JP_CMC1 and JP_CMC2 This jumper s JP_CMC1 JP_CMC2 closes the CMC JTAG lines TDI and TDO of the installed CMC 1 CMC2 card JP_CMC2 open if CMC2 card is installed JP_CMC2 close if no CMC2 card is installed ope
16. Slave side see USB LEMO Out Select Register LEMO In 1 2 Latch is set on the leading edge of LEMO In 1 2 gt 16ns and is cleared on read access if it was set USB LEMO Out Control bit 0 USB LEMO Out Control bit 1 USB XILINX JTAG Control bit 0 USB XILINX JTAG Control bit 1 VME Slave LEMO Out control USB LEMO Out control VME Slave XILINX JTAG control USB XILINX JTAG control Page 10 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 4 2 2 Module Id and Firmware Revision Register read defin SIS3150USB_MODID_VERSION This register reflects the module identification of the SIS3150 SIS3150USB and its minor and major firmware revision levels The major revision level will be used to distinguish between substantial design differences and experiment specific designs while the minor revision level will be used to mark user specific adaptations Bit Function Reading 31 Module Id Bit 15 30 Module Id Bit 14 3 29 Module Id Bit 13 28 Module Id Bit 12 27 Module Id Bit 11 26 Module Id Bit 10 1 25 Module Id Bit 9 24 Module Id Bit 8 23 Module Id Bit 7 22 Module Id Bit 6 5 21 Module Id Bit 5 20 Module Id Bit 4 19 Module Id Bit 3 18 Module Id Bit 2 0 17 Module Id Bit 1 16 Module Id Bit 0 15 Major Revision Bit 7 14 Major Revision Bit
17. on the accompanying CDROM will be required for in field JTAG firmware upgrades through the JTAG connector The JTAG connector is a 9 pin single row 1 10 inch header the pin assignment on the connector can be found in the table below Pin Short hand Description 1 VCC Supply voltage 2 GND Ground 3 nc not connected cut to avoid polarity mismatch 4 TCK test clock 5 nc not connected 6 TDO test data out 7 TDI test data in 8 nc not connected 9 TMS test modus Note disable watchdog on CMC card s for firmware upgrade close Jumper JP_CMC1 or JP_CMC2 of no CMC card is installed Page 56 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 14 8 TS_JTAG TigerSHARCs JTAG Test Access Port connector Short hand Pin Pin Short hand Description GND 1 2 EMU Emulation output low activ GND 3 4 GND Ground GND 5 6 TMS Test Mode Select input GND 7 8 TCK Test Clock input GND 9 10 TRST Test Reset input low activ GND 11 12 TDI Test Data Input input GND 13 14 TDO Test Data Output output Note when the emulator is not connected to this connector place jumper 5 6 TMS 7 8 TCK 9 10 TRST and 11 12 TDD as shown below These jumpers hold the JTAG signals in the correct state to allow the DSP s to run free Er Q ZzZ 2 3S3 a 8 o O ELO O un oO Oo E
18. ses os Asst eases e ne a asee saaa ir ase steed 20 5 1 1 VME Slave Address map of SIS3150 e eent arenan eeen e reaa eee esey en OA eNe ieat ETSE 21 5 2 Register descripto ns a ii ni 23 5 2 1 Control Status Register 0x write read 0 eeececeeceesceceseeeesceceereesneeceseeeeaceceseeceaaeceeeeeaeeceeesenaeess 23 5 2 2 Module Id and Firmware Revision Register 0x4 read ecceecceesseesceeeceeeeeeeceaeceeeeseceaeeneeeneeees 24 5 2 3 Interrupt configuration register OX8 0 0 ce ceescssescceseeseeecesecseesecueeecsseeceaecaeesecsecaeesesneveeeaeeseenees 25 5 2 4 TRO Mode ri 25 5 2 5 Interrupt Control Status register OXC nueenersensesnensesnensernnesennennennnnonnennnennnennenennonsensennonnnennon 26 5 2 6 LEMO Out Select Register write read ssssesseesereeeseessssteerssesrtstreessesersteseesessreeessesersesersesset 28 21 XILINX JTAG TEST teisteis erei ei AEE E Ea EE EA SE 29 5 2 8 XILINX JTAG DATA IN TESISter ien 20 200 aeaa E EOE E EE RENE E EEA E SESE 29 5 2 9 XILINX JTAG CONTROL registeren enkar erar Bess EAA E E EES 29 5 3 Common Bus deSCriptrom kseronina ea eA E EEEa Eo E EA ESERE EErEE EAEE a AEREA 30 5 3 1 CMO Site iis ata aa e aE E AA E EE AA EE E ES a 30 5 3 2 Tiger SHARC ann epe eae atada cir ia 30 5 3 3 SDRAM e ereraa cia e eee a teschabes tap aA E a AE E a E EA EA Eei E a 30 02 E A oes Son A Na Lara ean dea adh A E N E sak oak om lei 31 6 1 TigerSHARC global Memory Map uensessersersersersesnnnesnenenne
19. will copy the required files to your c disk drive 9 1 2 Installation under XP As soon as a SIS3150USB is detected on a USB port for the first time you will be prompted by the hardware assistant under Windows XP while the driver will just be installed under Windows 2000 You will not want to connect to Windows Update Page 40 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 mune mir Roem mace N Assistent f r das Suchen neuer Hardware Willkommen Es wird nach aktueller und aktualisierter Software auf dem Computer auf der Hardwareinstallations CD oder auf der Windows Update website mit Ihrer Erlaubnis gesucht Datenschutzrichtlinie anzeigen Soll eine Verbindung mit Windows Update hergestellt werden um nach Software zu suchen Ja nur diese eine Mal Ja und jedes Mal wenn ein Ger t angeschlossen wird Nein diesmal nicht Klicken Sie auf weiter um den Vorgang fortzusetzen lt Zur ck Abbrechen In the next step you select automatic installation Assistent f r das Suchen neuer Hardware Mit diesem Assistenten k nnen Sie Software f r die folgende Hardwarekomponente installieren Cypress EZ USB FX2 68613 5153150 USB YME Controller 15 12 2004 Falls die Hardwarekomponente mit einer CD N oder Diskette geliefert wurde legen Sie diese gt jetzt ein Wie mochten Sie vorgehen Software automatisch installieren empfohlen
20. 00 TS2 0x0400 0000 SDRAM OxO7FF FFFF Page 21 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 5 1 1 1 VME Register Space The implemented VME registers are listed in the table below Offset R W Mode Function Register 0x0 R W D32 Control Status register 0x4 R D32 Module Id and firmware revision register 0x8 R W D32 Interrupt configuration register OxC R W D32 Interrupt control status register 0x10 R W D32 LEMO out selec register 0x20 R W XILINX JTAG_TEST JTAG_DATA_IN 0x24 W XILINX JTAG_CONTROL future use R W One wire Id register 0x400 KA D32 Key reset all 0x404 KA D32 Key CMC1 and CMC2 Hardware Reset pulse 20ms 0x408 KA D32 Key CMC1 Logic Reset 0x40C KA D32 Key CMC2 Logic Reset 0x410 KA D32 Key TigerSHARCs Reset pulse 2us The shorthand KA stands for key address Write access with arbitrary data to a key address initiates the specified function 5 1 1 2 Common Bus Address Space The common bus resources are addressed through VME as listed below Offset R W Mode Function Register 0x080 0000 to R W D32 Flashprom not yet implemented 0x09F FFFC 4Mbit gt 512Kbyte access only with D7 DO gt 2Mbyte space 0x100 0000 to R W D32 CMC Site 1 0x17F FFFC BLT32 MBLT64 0x180 0000 to R W D32 CMC Site 2 Ox 1 FF FFFC BLT32 MBLT64 0x200 0000 to R W_ D32 BLT32 MBLT64 TigerSHARC TS1 Ox2FF FFFC 0x300 0000 to R W D
21. 2 supports the following assignments TSIIRQO CMC Site 1 CMC_TS1_IRQ_REO TSIIRQI CMC Site 2 CMC_TS1_IRQ_REO TSIIRQ USB Key Address TS1_IRQ3 leading edge NIM Input 1 TS2_IRQO CMC Site 1 CMC_TS1_IRQ_ REQ TS2_IRQ1 CMC Site 2 CMC_TS1_IRQ_ REQ TS2IRQ2 USB Key Address TS2_IRQ3 leading edge NIM Input 1 Page 33 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 6 3 TS Links The TigerSHARC link ports provide an optional high speed communications channel that is useful for implementing point to point communication without using the common data bus The DSP s core can write directly to a link port s transmit register and read from a receive register or the DMA controller can perform DMA transfers through the link port DMA channels Each TigerSHARC has four Link Ports TS1_LO TSI_L3 TS2_L0 TS2_L3 Each CMC side has two Link Ports The SIS3150 FPGA has four Link Ports also The SIS3150 onboard breakers open or close the connection s between these different Link Ports Following ten point to point connections are possible TSILO lt internal TSxLO connected with CMC Site 1 and SIS3150 FPGA TSILI lt internal TSxL1 connected with CMC Site 2 and SIS3150 FPGA TS1L2 lt internal TSxL2 connected with CMC Site 1 and SIS3150 FPGA TSIL3 lt internal TSxL3 connected with CMC Site 2 and SIS3150 FPGA TS2LO lt gt internal TSxLO connected with CMC Site 1 a
22. 32 BLT32 MBLT64 TigerSHARC TS2 Ox3FF FFFC 0x400 0000 to R W D32 BLT32 MBLT64 SDRAM Ox7FF FFFC Note Access to the SDRAM is only allowed after the SDRAM Controller of the TigerSHARC TS1 is configured and enabled Page 22 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 5 2 Register description The function of the individual registers is described in detail in this section The first line after the subsection header in Courier font like define SIS3150_CONTROL_STATUS refers to the sis3150 h header file 5 2 1 defin SIS3150_CONTROL_STATUS read write D32 Control Status Register 0Ox write read 0x0 read write D32 The control register is in charge of the control of some basic properties of the SIS3150 board like enabling test pulse generators It is implemented via a selective J K register a specific function is enabled by writing a 1 into the set enable bit the function is disabled by writing a 1 into the clear disable bit which location is 16 bit higher in the register An undefined toggle status will result from setting both the enable and disable bits for a specific function at the same time On read access the same register represents the status register Bit write Function read Function 31 Clear reserved control bit 15 0 22 2 21 Clear VME Slave LEMO Out 2 de 20 Clear VME Slave LEMO Out
23. B Version 1 23 VME64x VME to USB2 0 Controller 9 Windows Driver 9 1 Installation 9 1 1 Setup Installation Scripts The setup installation scripts can be found on the SISCDROM as shown below 1 setup_w2k Datei Bearbeiten Ansicht Favoriten Extras Q zr ck v Y yo Suchen Ordner EE Adresse siscd_170105 sis3150usb Driver Windows sis3150usb_windows sis3150usb_vme_win_utils setup_w2k Ordner E siscd_170105 E ezusb ce 28 11 2001 17 31 515330x ezusbw2k Setup Informationen 28 11 2001 17 31 sis3150usb E readme Textdokument 07 12 2004 15 30 Doc Elsetup_winzk Stapelverarbeitung 15 12 2004 10 21 Driver E sis3150usb_setup_8051 bix BIX Datei 07 12 2004 17 19 E a Windows E sis3150usb_vme_win LIB Datei 17 12 2004 08 11 3 sis3150usb_vme_applications sis3150usb_vme_win dll Programmbibliothek 17 12 2004 08 11 E sis3150usb_windows sis3150usb_vme_win h C Source File 15 12 2004 09 35 B sis3150usb_vme_win_utils Cd sis3150usb_win Setup Informationen 15 12 2004 10 24 ok We E sis_ezusb Systemdatei 28 11 2001 17 31 setup_xp sis3150usb_calls sis3150usb_lib sis3638xx sis11003100 10 Objekte e Freier Speicherplatz 655 GB 180 KB E Lokales Intranet Run the setup_win2k or setup_winxp script in the corresponding directory The batch files
24. CMC1_BASE 0x01000000 define SIS3150_CMC2_BASE 0x01800000 define SIS3150_TS1_BASE 0x02000000 define SIS3150_TS2_BASE 0x03000000 define SIS3150_SDRAM_BASE 0x04000000 refers to the sis3150 h header file 5 3 1 CMC Site Only the data bits 35 0 of the common 64 bit data bus are connected to the CMC Sites 5 3 2 TigerSHARC After Reset also Power Up Reset the TigerSHARC s External Data Port is configured in 32 bit Bus Width Mode Therefore at first the TS_REG_SYSCON has to be programmed 5 3 3 SDRAM Supported 32 bit and 64 bit access to SDRAM Note Access to the SDRAM is only allowed after the SDRAM Controller of the TigerSHARC TS1 is configured and enabled Page 30 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 6 TigerSHARC The two TigerSHARCs the two CMC Sites and the SIS3150 FPGA VME interface use a common bus 32 bit address and 64 bit data on the SIS3150 Additional a 64 Mbyte SDRAM and a 512 Kbyte 8 bit Flashprom not yet supported are connected also to the common bus Each TigerSHARC has access to the CMC Sites to the other TigerSHARC to the SDRAM and to the Flashprom not yet supported The TigerSHARC TS1 has the processor ID 0 and the TigerSHARC TS2 has the pocessor ID 1 6 1 TigerSHARC global Memory Map The TigerSHARC DSP has an internal a multiprocessor space and an external space The internal space inside the DSP consisting of a set of registers and three Memory
25. D 0000 0000 Bus 002 Device 001 ID 0000 0000 Bus 001 Device 004 ID 413c 3200 Dell Computer Corp Bus 001 Device 003 ID 413c 2003 Dell Computer Corp Bus 001 Device 001 ID 0000 0000 Torsten home lxuser 4 Page 49 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 12 VME Readout Speed While the nature of USB results in VME single cycle execution times in the order of 100 us compared to 5 us on a SIS1100 3100 PCI to VME interface you will reach decent block transfer performance as illustrated in the screendump below data as measured on a USB2 0 port of a 3 2 GHz P IV Siemens Fujitsu Scenic PC ex C sis3150usb_vme_applicationsWisualC_applications speed_test_vme Release speed_test olx ume_A32MBLT64_read 33 989 MByte sec loop counter 47 Delay for two seconds vme_A32D32_write 9 376 KByte sec cycle repetition time vme_A32D32_read 9 412 KByte sec cycle repetition time vme_A32DMA_D32_ write 7 297 MByte sec vme_A32BLT32_ write 18 962 MByte sec uvme_A32MBLT64_write 25 328 MByte sec uvme_A32DMA_D32_ read 7 158 MByte sec vme_A32BLT32_read 21 141 MByte sec vme_A32MBLT64_read 33 989 MByte sec loop counter 48 Delay for two seconds Single cycle execution times well below 1 us can be accomplished with execution under control of the TigherSHARC 12 1 Performance speed test The readout speed on a particular PC can be measured with a VME memory Chrislin e g or a VM
26. D32 This register is used in the firmware upgrade process over VME only A TCK is generated upon a write cycle to the register Bit write Function 31 none 4 none 3 none 2 none 1 TMS 0 TDI 5 2 8 XILINX JTAG_DATA_IN register define SIS3150_JTAG_DATA_IN 0x20 read D32 XJ This register is used in the firmware upgrade process over VME only It is at the same address as the JTAG_TEST register and is used in read access It operates as a shift register for TDO The contents of the register is shifted to the right by one bit with every positive edge of TCK and the status of TDO is transferred to Bit 30 Bit 31 reflects the current value of TDO during a read access 5 2 9 XILINX JTAG_CONTROL register define SIS3150_JTAG_CONTROL 0x24 write only D32 This register is used in the firmware upgrade process over VME only Bit Function write 31 31 none 4 4 none 3 3 none 2 2 none 1 MUX_CMC_JTAG 0 SIS3150 JTAG control 1 CMC Sites JTAG control 0 JTAG_OUT_EN 0 Disable JTAG output 1 Enable JTAG output Page 29 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 5 3 Common Bus description The function of the individual registers is described in detail in this section The first line after the subsection header in Courier font like define SIS3150_
27. E slave with memory SIS330x ADC e g with the Visual C program speed_test_vme Page 50 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 13 Front Panel Elements The SIS3150USB has 12 front panel LEDs 2 LEMO 00 input 2 LEMO 00 ouput connectors and a type A USB connector 13 1 USB1 USB2 0 Distinction After power up LEDs L2 and L4 are on unless a user program driver has initialized the USB controller on board of the SIS3150 right away The SIS3150 runs in USB1 mode if L2 is on and in USB2 0 mode if L2 is off after download of the FX2 setup file flagged by L4 off Note LED L4 is used to indicate USB activity also Page 51 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 14 Jumpers connectors The SIS3150 has two rotary switches three 8 bit switches seven jumper fields and three JTAG connector Rotary Switch Function SW2 Selection of VME Slave Address A31 A28 SWI1 Selection of VME Slave Address A27 refer to section 5 1 8 bit Switch Function S80 Selection of VME Slave Address Mode and selection of Reset features S610 Selection of TigerSHARC Controls S620 Selection of TigerSHARC Controls Jumper field Function J10 VME System Controller 16 MHz Sysclock JP570 SIS3150 FPGA JTAG source JP580 CMC FPGA JTAG source JP_CMC1 CMC1 FPGA JTAG TDI TDO chain control JP_CMC2 CMC2 FPGA JTAG TD
28. Flag 2 1 TS2 Flag 2 is ored to LEMO OUT 1 5 TS2 Flag 1 1 TS2 Flag 1 is ored to LEMO OUT 1 4 reserved no 3 reserved no 2 TS1 Flag 2 1 TS1 Flag 2 is ored to LEMO OUT 1 1 TS1 Flag 1 1 TS1 Flag 1 is ored to LEMO OUT 1 0 reserved no denotes power up default setting i e the power up reading of the register is 0x10001000 USB Lemo Out Bits are selected Note TS Flags are low active Page 13 of 68 VUC3150USB VME64x VME to USB2 0 Controller Version 1 23 4 2 5 USB VME Master Status Control register read write define SIS3150USB_VME_MASTER_CONTROL_STATUS 0x10 The control register is in charge of the control of most of the basic properties of the SIS3150 board in write access It is implemented via a selective J K register a specific function is enabled by writing a 1 into the set enable bit the function is disabled by writing a 1 into the clear disable bit which location is 16 bit higher in the register An undefined toggle status will result from setting both the enable and disable bits for a specific function at the same time Bit Write Function Read Function 31 Clear SYSTEM VME BERR TIMER BIT1 0 30 Clear SYSTEM VME BERR TIMER BITO 0 29 Clear LONG TIMER BIT1 0 28 Clear LONG TIMER BITO 0 27 no function 0 26 no function 0 25 no function 0 24 no function 0 23 no function 0
29. I TDO chain control J770 LEMO NIM Input 1 terminated with 50 Ohm to GND if closed J771 LEMO NIM Input 2 terminated with 50 Ohm to GND if closed JTAG connector Function CON570 SIS3150 FPGA JTAG connector CONS580 CMC FPGA JTAG connector TS_JTAG TigerSHARC JTAG connector Refer to the top layer assembly drawing see section 15 for jumper connector locations Page 52 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 14 1 J10 16 MHz VME Sysclock The 16 MHz VME Sysclock can be enabled disabled with jumper J10 J10 16 MHz VME Sysclock closed on open off Note a VME display like the VDIS e g can be used to check whether another master in a multi master VME setup generates Sysclock 14 2 J770 and J771 Termination of LEMO Input 1 and 2 The 50 2 input termination of the 2 NIM front panel inputs can be switched on off with the two jumpers J770 and J771 J770 Termination LEMO Input 1 closed terminated open unterminated J771 Termination LEMO Input 2 closed __ terminated open unterminated Schematic of the relevant section of the PCB Page 53 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 14 3 JP570 SIS3150 FPGA JTAG source SIS3150 Firmware can be loaded to the XC18V04 serial PROM via a JTAG download cable XILINX JTAG PC4 e g or via the VME interface of the
30. MO Out Select Register 0x10 R W USB VME Master Status Control register 0x11 R USB VME Master Cycle Status Register 0x12 R USB VME Interrupt Status Register 0x20 R W USB XILINX JTAG_TEST JTAG_DATA_IN 0x21 W USB XILINX JTAG_CONTROL 0x40 R W Test Register 32 bit read write register 0x100 KA Key reset all 0x101 KA Key CMC1 Hardware Reset pulse 20ms 0x102 KA Key CMCI1 Logic Reset 0x103 KA Key TigerSHARCs Reset pulse Zus 0x110 KA Key TigerSHARCs TS1 IRQ2 Request 0x111 KA Key TigerSHARCs TS2 IRQ2 Request 0x 10000000 R USB Address Data Test space ss Read Data Read Address Ox 1 FFFFFF 0x20000000 R USB Speed Test space Read Data Speed Counter OxFFFFFFF The Speed Counter increments every 16ns 62 5 MHz The shorthand KA stands for key address Write access with arbitrary data to a key address initiates the specified function Page 9 of 68 VUC3150USB VME64x VME to USB2 0 Controller Version 1 23 4 2 USB Register description The function of the individual registers is described in detail in this section The first line after the subsection header in Courier font like define SIS3150_CONTROL_STATUS 0x0 refers to the sis3150usb h header file 4 2 1 defin USB Control Status Register write read SIS3150USB_CONTROL_STATUS 0x0 The control register is in charge of the control of some basic properties of the SIS3150 board like enabling test pulse generators
31. Software von einer Liste oder bestimmten Quelle installieren f r fortgeschrittene Benutzer Klicken Sie auf Weiter um den Vorgang fortzusetzen lt Zur ck Abbrechen The SIS3150 USB driver did not undergo the Windows Logo Test but you will want to continue installation anyway Page 41 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller Assistent fiir das Suchen neuer Hardware Die Software wird installiert ee Y fad Cypress EZ USB FX2 68613 SIS3150 USB VME Controller 15 12 2004 Hardwareinstallation a Die Software die f r diese Hardware installiert wird Cypress EZ USB FX2 68613 5153150 USB YME Controller 15 12 2004 hat den Windows Logo Test nicht bestanden der die Kompatibilit t mit Windows XP berpr ft Warum ist dieser Test wichtig Das Fortsetzen der Installation dieser Software kann die korrekte Funktion des Systems direkt oder in Zukunft beeintr chtigen Microsoft empfiehlt strengstens die Installation jetzt abzubrechen und sich mit dem Hardwarehersteller f r Software die den Windows Logo Test bestanden hat in Verbindung zu setzen Installation fortsetzen Installation abbrechen In the last step you finish installation Fertigstellen des Assistenten Die Software f r die folgende Hardware wurde installiert Cypress EZ USB FX2 68613 5153150 USB YME gt Controller 15 12 2004 Klicken Sie auf Fertig
32. VME64x VME to USB2 0 Controller 5 2 5 Interrupt Control Status register OxC define SIS3150_IRO_CONTROL OxC read write D32 The interrupt sources are enabled with the interrupt control register The interrupt source is cleared in the interrupt service routine The status internal IRQ flag can be used for tests without activating VME interrupt generation It is set whenever an interrupt would be generated if interrupting would be enabled in the interrupt configuration register fourth condition is reserved for future use Bit Function w r Default 31 1 Shot IRQ UPDATE Status IRQ source 7 CMC2_VME_IRQI reserved 0 30 unused Status IRQ source 6 CMC2_VME_IRQO reserved 0 29 unused Status IRQ source 5 CMC1_VME_IRQI reserved 0 28 unused Status IRQ source 4 CMC1_VME_IRQO reserved 0 27 unused Status IRQ source 3 TS2_VME_IRQI sensitive 0 26 unused Status IRQ source 2 TS2_VME_IRQO sensitive 0 25 unused Status IRQ source 1 TSI_VME_IRQI sensitive 0 24 unused Status IRQ source 0 TSI_VME_IRQO sensitive 0 23 Clear IRQ source 7 Status flag source 7 0 22 Clear IRQ source 6 Status flag source 6 0 21 Clear IRQ source 5 Status flag source 5 0 20 Clear IRQ source 4 Status flag source 4 0 19 Clear IRQ source 3 Status flag source 3 0 18 Clear IRQ source 2 Status flag source 2 0 17 Clear IRQ source 1 Status f
33. VUC3150 Version 1 23 VME64x VME to USB2 0 Controller VUC3150 VME64x VME to USB2 0 Controller with optional TigerSHARC s User Manual HYTEC ELECTRONICS LTD 5 Cradock Road Reading Berkshire RG2 OJT England Phone 44 0 118 9757770 Fax 44 0 118 9757566 Email sales hytec electronics co uk Web www hytec electronics co uk Copyright 2006 Hytec Electronics Ltd All rights reserved Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Page 1 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller Revision Table Revision Date Modification 0 01 25 12 04 Generation 1 00 14 01 01 First official release 1 01 09 02 05 S80 610 and 620 added 1 10 10 03 05 Block diagram USB resource access VME addressing 1 10a 10 05 05 Minor corrections 1 20 02 06 05 Firmware rev 0x2004 VME side LEMO out select register 1 21 26 10 05 lsusb screen shot with 3150 db entry 1 22 19 12 05 1 TS as option also 1 23 26 12 05 closedriver VI touch up Page 2 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 1 Table of contents L Table Gr contents O BE ae Ren 3 Li Intraduchon sa een 5 2 Funcional iii da 6 2 1 Appl Cations ii id ap A o dE ia bit 6 3 Block O e e ad da al
34. ading 31 Module Id Bit 15 30 Module Id Bit 14 3 29 Module Id Bit 13 28 Module Id Bit 12 27 Module Id Bit 11 26 Module Id Bit 10 1 23 Module Id Bit 9 24 Module Id Bit 8 23 Module Id Bit 7 22 Module Id Bit 6 5 21 Module Id Bit 5 20 Module Id Bit 4 19 Module Id Bit 3 18 Module Id Bit 2 0 17 Module Id Bit 1 16 Module Id Bit 0 15 Major Revision Bit 7 14 Major Revision Bit 6 13 Major Revision Bit 5 12 Major Revision Bit 4 11 Major Revision Bit 3 10 Major Revision Bit 2 9 Major Revision Bit 1 8 Major Revision Bit 0 7 Minor Revision Bit 7 6 Minor Revision Bit 6 5 Minor Revision Bit 5 4 Minor Revision Bit 4 3 Minor Revision Bit 3 2 Minor Revision Bit 2 1 Minor Revision Bit 1 0 Minor Revision Bit 0 5 2 2 1 Major revision numbers Find below a table with major revision numbers used reserved to date Major revision number Application user 0x01 Generic SIS3150 CMC SIS9920_ETH design Page 24 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 5 2 3 Interrupt configuration register 0x8 define SIS3150_IRQ_CONFIG 0x8 read write D32 In conjunction with the interrupt control register this read write register controls the VME interrupt behaviour of the SIS3150 Eight interrupt sources are foreseen for the time being four of them are associated with an interrupt condition the others are reserved for future use The inter
35. ao 7 As USD IE io ee ea 8 4 1 SIS3150 USB Register Pater iii paa 8 4 1 1 USB Register Space Address Mapress ee eaa Pona are e EE E EE e RE pn aa ia 9 42 USB Resister description ur 208m a A At 10 4 2 1 USB Control Status Register write read cecccesccesecsceeseeeseeeeeeeeceeceseeeeeeeceseenseeeseenseeeaeenaeeneeeas 10 4 2 2 Module Id and Firmware Revision Register read u2200220022nnsennennnensnnnnnnnennnen nennen 11 4 2 3 USB TS Link Connect Register write read 20022002nennennsennennnennnennnnnnnennn nennen nennen 12 4 2 4 USB LEMO Out Select Register write read u22002242sennenenennnnsnnnnennnennnnnennen nennen 13 4 2 5 USB VME Master Status Control register read write ccnseessesnsnssensnensnnnsnennnnnnnnennnennennennnen 14 4 2 6 USB VME Master Cycle Status read eeecesscesseeceseceenceceeeesseecseeeenceceseeeeneeceeeeeneecesreeeaeeess 16 4 2 7 USB VME Interrupt Status Register read ersessusseenesennesnensesnennennnennnennenennonsennnenensennn 16 4 2 8 XILINX JTAG TEST TOD Tico onto sibs aE raro ibarra estes 17 4 2 9 XILINX JTAG DATA IN fegi ste ereo uses ee tsEna ia 17 4 2 10 XILINX ITAG_ CONTROL resisters e eeror iei eoe ara Aora erea abe in 17 4 3 TS BUS intern l TigerSHARG Bus ae 28a r E a aE E E este 18 ASA MME B S A tastes aaae er e E a E Ea EE ae OE Ee a IEEE a Ra ESEA E E ORES SETE Tpi 18 Ye VME Sla tb 20 5 1 VME Slave Address Marti
36. e Selection after Reset Interrupt Enable Selection after Reset TSx_LCLKRATO02 0 LCLK Ratio TSx_BMS_L LCLKRAT2 0 Ratio CLK x 4 62 5 x 4 250 MHz TSx boot strap on boot from EPROM off reserved off reserved off reserved off reserved EPROM boot Selection LCLKRAT2 0 Ratio 000 2 001 2 5 010 3 011 3 5 100 4 101 5 110 111 6 Reserved Page 59 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 15 SIS3150 Top Assembly Drawing is ct Sl a mi cono 2 ee re EN ae m ADP3339 1 8 cp IA Im E Ss feels cnzei mm j aas SpYongs mmM lA OSLESIS g e _ ye 002 E0 Haus sis O mi 1d e m C a gt a a N D RE ES wc 2 v N A DORODNAROOON OOAD anaon SSL 5 8 ac321 a Ina 151 122 iil F220 T ge LT i ES Page 60 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 16 Connector types The VME connectors and the front panel connectors used on the SIS3350are Connector Purpose Part Number 160 pin zabcd VME PI P2 Harting 02 01 160 2101 90 PCB LEMO Digitial I O connectors LEMO EPL 00 250 NTN Page 61 of 68 VUC3150USB VME64x VME to USB2 0 Controller Version 1 23 17 Appendix 17 1 Protocol 17 1 1 Transfer Write Access Request f
37. ersion 1 23 VME64x VME to USB2 0 Controller 8 Tiger SHARC Host Space The TS Host Space is defined from address 0x1000 0000 to Oxffff ffff 8 1 TigerSHARC VME Master Space The TS VME Space is defined from 0x1000 0000 to Ox 1 fff ffff Access is D64 always A command is initiated by D64 write cycle The lower 32 data bits D31 0 hold the write datum don t care on read the upper 32 data bits D63 32 hold the VME address The TS address A27 A1 holds the address modifier for the cycle and so on Example VME write volatile unsigned long long var_long64_data volatile unsigned long long vme_space_long64_pointer vme_space_long64_pointer unsigned long long host_start_addr vme_space_mode write var_long64_data __builtin_compose_64u vme_space_address vme_space_data D63 32 D31 0 vme_space_long64_pointer var_long64_data read var_long64_data vme_space_long64_pointer D63 32 holds the status register D31 0 holds the read datum fora single cycle read Data are passed over a link to the TS during a DMA Page 37 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller The function of the individual bits is given in the table below TS Addr Write Function Bit 27 Force VME AS Single cycle during DMA with constant Vme Addresses
38. eserved S80 S80 1 S80 3 Description EN_A32 EN_GEO OFF OFF non A32 addressing reserved for future use OFF ON non A32 addressing reserved for future use ON OFF A32 addressing address compared with SW1 SW2 ON ON A32 addressing address compared with geographical address The table below illustrates the possible base address settings if S80 1 ON S80 3 Bits 31 130 29 28 27 OFF Sw2 SW1 IAIN I l oO ON lt z lt lt lt i lt gt gt gt OIOIOIOIO if SW1 between 0 and 7 then address selectection if A27 0 if SW1 between 8 and F then address selectection if A27 1 Shorthand Explanation SW2 SW1 Setting of rotary switch SW2 or SW1 respective don t care y GAO GA4 _ Geographical address bit as defined by the VME64x P backplane Example S80 1 ON and S80 3 OFF SW2 2 and SW1 0 or 1 gt VME Base Address 0x 2000 0000 or SW2 9 and SW1 8 or9 F gt VME Base Address 0x 9800 0000 Page 20 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 5 1 1 VME Slave Address map of SIS3150 VME Slave Space REGISTER 0x0000 0000 KEY ADDRESSES 0x0000 OFFF RESERVED 0x0080 0000 FLASHPROM 0x009F FFFF RESERVED 0x0100 0000 CMC Site 1 as 0x0180 0000 O CMC Site 2 19 o 09 0x0200 0000 4 a E TS1 fe E 5 0x0300 00
39. est 10 AUTO ADDRESS INCREMENT DISABLE FIFO Access Address Increment offset 5 VME Data Size BYTE WORD SWAP LIST Mode TS BUS SGL FLAG Ki TS BUS D64 access 0 read l write 0 auto address increment l no address increment address increment by 1 VME Byte address increment by 2 VME 16 bit Word address increment by 4 VME 32 bit Word address increment by 8 00 reserved Ol reserved 10 reserved 11 reserved 0 no List Mode 1 List Mode 0 D32 cycles on TS Bus 1 D64 cycles on TS Bus address and length must be 8 byte aligned Page 64 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 17 1 3 Block transfer Read Direct VME Bus Access CTL 0x20 REQ and BT CTL 0x22 CONF and BT arbitrary WR and BT CTL 0x81 END and EOT arbitrary WR and BT Request from PCI Confirmation from SIS3100 Bit 31 Bit 0 Bit 31 Bit 0 SC_PROT CTL 0x20 SP 01 BE OF address modifier with CTL AM 1 only address A63 32 with CTL A64 1 only Start address A31 0 4 Byte aligned BC byte count 4 er steps 4 8 SC_PROT CTL 0x22 SP 01 datum 1 datum 2 datum n SC_PROT CTL 0x81 SP 01 or in error case SC_PROT CTL 0x23 SP 01 EC Page 65 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 17 2 Glossary Term Explanation CMC Common Mezzanine Card
40. from a failed call to the FindAll_SIS3150USB_ Devices VI to close the driver 10 2 FindAll_SIS3150USB_Devices This VI scans for SIS3150USB devices reports the number of found devices lists the first device opens a handle to the first device and downloads the code the Cypress FX USB controller chip Serial number and firmware revision of the first device are reported also The error and FX Download Error LEDs stay off upon successful completion FindAll_SIS3150USB_Devices vi 10 3 handle gbl This handle holds the global variable handle that is used for VME access through the first found interface in the VME calls Page 45 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 10 4 vme_read This VI allows the execution of VME single read cycles Input parameter are address AM address modifier and size 4 bytes 2 bytes or 1 byte Successful execution is flagged by a O error code with the error LED off gt vme_read vi 10 5 vme_write This VI is the single write counterpart to vme_read with the same parameter set Page 46 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 10 6 vme_a32d32_read This VI is the A32 D32 version of the more general vme_read VI AM and size are fixed 10 7 vme_a32d32_write This VI is the A32 D32 version of the more general vme_write VI AM and size are fixed i gt vme_a32d32_write vi Page 47 of 68 VUC3150USB Vers
41. ion 1 23 VME64x VME to USB2 0 Controller 10 8 vme_dma_read This VI is the block transfer VME read cycle VI An array with size elements is initialized to the inivalue and req_num_data words are read from the specified address Address increment is switched of with fifo_mode 1 got_num_words displays the number of retrieved words and 4 array elements are displayed in destU32array You can request a large number of words and check got_num_words for the actual word count after a bus error after reading data from a SIS3820 multiscaler in FIFO mode e g Page 48 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 11 LINUX LINUX support for the SIS3150USB will be provided at a later point in time 11 1 lsusb The SIS3150USB will be seen as shown below linuxmki home ume lsusb Bus 002 Device 002 ID 1657 3150 Bus 002 Device 001 ID 0000 0000 Bus 001 Device 002 ID 045e 0040 Microsoft Corp Wheel Mouse Optical Bus 001 Device 001 ID 0000 0000 linuxmki home une J Entry of the SIS GmbH USB vendor Id and the SIS3150 into later versions of the usb ids file was arranged and confirmed On a SUSE 10 0 distribution kernel 2 6 13 15 smp e g you will get output in the form shwon below Torsten home lxuser lsusb Bus 005 Device 004 ID 1657 3150 Struck Innovative Systeme GmbH 5153150 USBZ 0 to VME interface Bus 005 Device 001 ID 0000 0000 Bus 004 Device 001 ID 0000 0000 Bus 003 Device 001 I
42. it LEMO Out 2 is ored to LEMO OUT 2 28 USB Lemo Out 2 1 USB Control Bit LEMO Out 2 is ored to LEMO OUT 2 27 reserved No 26 reserved No 25 reserved No 24 CMC 1 Trigger 1 CMC 1 Trigger is ored to LEMO OUT 2 23 reserved No 22 TS2 Flag 2 1 TS2 Flag 2 is ored to LEMO OUT 2 21 TS2 Flag 1 1 TS2 Flag 1 is ored to LEMO OUT 2 20 reserved No 19 reserved No 18 TSI Flag 2 1 TS1 Flag 2 is ored to LEMO OUT 2 17 TSI Flag 1 1 TS1 Flag 1 is ored to LEMO OUT 2 16 reserved No Bit meaning Function 15 reserved No 14 reserved No 13 VME Slave Lemo Out 1 1 VME Slave Control Bit LEMO Out 1 is ored to LEMO OUT 1 12 USB Lemo Out I 1 USB Control Bit LEMO Out 1 is ored to LEMO OUT 1 11 reserved No 10 reserved No 9 reserved No 8 CMC 1 Trigger 1 CMC 1 Trigger is ored to LEMO OUT 1 7 reserved No 6 TS2 Flag 2 1 TS2 Flag 2 is ored to LEMO OUT 1 5 TS2 Flag 1 1 TS2 Flag 1 is ored to LEMO OUT 1 4 reserved No 3 reserved No 2 TS1 Flag 2 1 TS1 Flag 2 is ored to LEMO OUT 1 1 TS1 Flag 1 1 TS1 Flag 1 is ored to LEMO OUT 1 0 reserved No denotes power up default setting i e the power up reading of the register is 0x10001000 USB Lemo Out Bits are selected Note TS Flags are low active Page 28 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 5 2 7 XILINX JTAG_TEST register define SIS3150_JTAG_TEST 0x20 write
43. lag source 1 0 16 Clear IRQ source 0 Status flag source 0 0 15 Disable IRQ source 7 Status VME IRQ 0 14 Disable IRQ source 6 Status internal IRQ 0 13 Disable IRQ source 5 0 0 12 Disable IRQ source 4 0 0 11 Disable IRQ source 3 0 0 10 Disable IRQ source 2 0 0 9 Disable IRQ source 1 0 0 8 Disable IRQ source 0 0 0 7 Enable IRQ source 7 Status enable source 7 read as 1 if enabled O if disabled 0 6 Enable IRQ source 6 Status enable source 6 read as 1 if enabled O if disabled 5 Enable IRQ source 5 Status enable source 5 read as 1 if enabled O if disabled 0 4 Enable IRQ source 4 Status enable source 4 read as 1 if enabled O if disabled 0 3 Enable IRQ source 3 Status enable source 3 read as 1 if enabled O if disabled 0 2 Enable IRQ source 2 Status enable source 2 read as 1 if enabled O if disabled 0 1 Enable IRQ source 1 Status enable source 1 read as 1 if enabled O if disabled 0 0 Enable IRQ source 0 Status enable source 0 read as 1 if enabled O if disabled 0 The power up default value reads 0x00000000 Note The clear IRQ source bits are relevant for edge sensitive IRQs only Page 26 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller The generation of the status flags the IRQ flags and the actual IRQ is illustrated with the schematic below IRQ ACK cycle N Pu Source 0 Status FLAG Source 0 Status IRQ Clear Enable 0 Source 0
44. much slower however also The bus error code is 0x211 LONG TIMER BIT1 LONG TIMER BITO LONG Timeout after 0 0 1 ms default 0 1 10 ms 1 0 50 ms 1 1 200 ms LONG Timeout arbitration timeout no reply from current VME master or VME bus mastership not granted The arbitration timeout error code is 0x214 VME_REQ LEVEL BITI VME_REQ_ LEVEL BITO VME Bus Request Level 0 0 BR3 highest Level default 0 1 BR2 1 0 BRI 1 1 BRO VME REQUESTER TYPE BIT VME Bus Requester Type 0 Release on Request default 1 Release when Done Page 15 of 68 VUC315 0USB Version 1 23 VME64x VME to USB2 0 Controller 4 2 6 USB VME Master Cycle Status read define SIS3150USB_VME_MASTER_CYCLE_STATUS 0x11 This register contains Status Information of the last VME Cycle In special cases the driver reads this Status Information register D31 D16 D15 DO VME Cycle Error Register VME Transfer Byte Count Register VME Cycle Error Codes 0x110 USB Protocol Error invalid parameter 0x111 USB Protocol Error USB 0x112 USB Protocol Error USB 0x113 USB Protocol Error USB 0x211 VME Buserror 0x214 VME Arbitration Timeout write error read error read length error 4 2 7 USB VME Interrupt Status Register read define SIS3150USB_VME_INTERRUPT_STATUS 0x12 This register contains Status Information of
45. n if CMC1 card is installed JP_CMC1 close if no CMC1 card is installed JP_CMC1 RB Page 55 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 14 6 CON570 SIS3150 JTAG connector The SIS3150 on board logic can load its firmware from a serial PROMs The firmware can be upgraded through VME future option or the JTAG connector A list of firmware designs can be found under http www struck de sis3 150firm htm Hardware like the XILINX HW JTAG PC in connection with the appropriate software the XILINX WebPACK is furnished on the accompanying CDROM will be required for in field JTAG firmware upgrades through the JTAG connector The JTAG connector is a 9 pin single row 1 10 inch header the pin assignment on the connector can be found in the table below Pin Short hand Description 1 VCC Supply voltage 2 GND Ground 3 nc not connected cut to avoid polarity mismatch 4 TCK test clock 5 nc not connected 6 TDO test data out 7 TDI test data in 8 nc not connected 9 TMS test modus Note put S80 5 in OFF position to disable watchdog for firmware upgrade 14 7 CON580 CMC JTAG connector The CMC on board logic can load its firmware from a serial PROMs The firmware can be upgraded through VME future option or the JTAG connector Hardware like the XILINX HW JTAG PC in connection with the appropriate software the XILINX WebPACK is furnished
46. nd SIS3150 FPGA TS2L1 lt internal TSxL1 connected with CMC Site 2 and SIS3150 FPGA TS2L2 lt internal TSxL2 connected with CMC Site 1 and SIS3150 FPGA TS2L3 lt internal TSxL3 connected with CMC Site 2 and SIS3150 FPGA TigerSHARC to TigerSHARC point to point connections TSIL2 gt TS2L3 TSIL3 lt gt TS2L2 In SIS3150 Firmware versions 31500101 and 31500102 the point to point connections are set by design In future Firmware versions it will be programmable by VME Slave register access The following point to point connections are closed together TS1LO lt gt internal TSxLO connected with CMC Site 1 TS1L1 lt internal TSxL1 connected with CMC Site 2 TS1L2 lt internal TSxL2 connected with CMC Site 1 TS1L3 lt gt internal TSxL3 connected with CMC Site 2 Page 34 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 7 TigerSHARC Internal Space Address Translation Table VME TigerSHARC 7 1 TigerSHARC TS1 Memory Space VME offset TS1 Memory Space TS1 offset TS2 offset 0x02000000 Block 0 0x00000000 0x02400000 to to to Ox0200fffc re ee Ox00003ffE 0x02403fff program code data 0x02010000 Block 0 0x00004000 0x02404000 to to to 0x0203fffc ue ee eee Ox0000ffff Ox0240ffff free user buffer 0x02200000 Block 1 0x00080000 0x02480000 to to to 0x0220fffc Dre 0x00083f ff 0x02483f ff program code data 0x02210000 Block 1 0x00084000 0x02484000 to t
47. nk1 1 always enabled connected with SIS3150 FPGA TS VME Master DMA 0 TS1 Link0 lt gt internal TSx Link0 1 always enabled connected with CMC1 Link 1 Page 12 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 4 2 4 USB LEMO Out Select Register write read define SIS3150USB_LEMO_OUT_SELECT_REG 0x3 Bit meaning Function 31 reserved no 30 reserved no 29 VME Slave Lemo Out 2 1 VME Slave Control Bit LEMO Out 2 is ored to LEMO OUT 2 28 USB Lemo Out 2 1 USB Control Bit LEMO Out 2 is ored to LEMO OUT 2 27 reserved no 26 reserved no 25 reserved no 24 CMC 1 Trigger 1 CMC 1 Trigger is ored to LEMO OUT 2 23 reserved no 22 TS2 Flag 2 1 TS2 Flag 2 is ored to LEMO OUT 2 21 TS2 Flag 1 1 TS2 Flag 1 is ored to LEMO OUT 2 20 reserved no 19 reserved no 18 TS1 Flag 1 TS1 Flag 2 is ored to LEMO OUT 2 17 TS1 Flag 1 1 TS1 Flag 1 is ored to LEMO OUT 2 16 reserved no Bit meaning Function 15 reserved no 14 reserved no 13 VME Slave Lemo Out 1 1 VME Slave Control Bit LEMO Out 1 is ored to LEMO OUT 1 12 USB Lemo Out I 1 USB Control Bit LEMO Out 1 is ored to LEMO OUT 1 11 reserved no 10 reserved no 9 reserved no 8 CMC 1 Trigger 1 CMC 1 Trigger is ored to LEMO OUT 1 7 reserved no 6 TS2
48. nnel 100 MHz 14 bit digitizer board allows you to build efficient systems with and without making use of the VME bus A 4 channel ADC digitizer system of that type in a rackmount box is shown below Page 5 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 2 Functionality The SIS3150USB interfaces the popular Universal Serial Bus USB to the VMEbus The modules functionality comprises USB2 0 and USB1 1 compliance VME master A16 A24 A32 D8 D16 D32 BLT32 MBLT64 VME slave A32 D32 BLT32 MBLT64 1 or 2 TS101 TigerSHARC DSP s as option 2 digital front panel inputs 2outputs 64 MB SDRAM memory 1 available CMC site P2 access to lower CMC site e 12 front panel LEDs 2 1 Applications The SIS3150 USB2 0 to VME interface is a good choice whenever a single cycle read write performance is not of top importance b good single cycle performance is required but single cycle transactions can be handled under control of the TigerSHARC DSP s Applications comprise but are not limited to e test benches e module acceptance testing e hard realtime readout systems e histogramming systems e data destination for other VME masters existing readout systems Page 6 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 3 Block Diagram Find below a block diagram of the SIS3150USB to illustrate the data paths Used for USB CMC1 SIS9300 e g
49. nsensnnnonsensnnsonnnenenesnonsensonsonsnennnnnnnon 31 6 2 TS Hardware IMterru pts incre ada 33 63 IS Tek fs e tt 34 7 TigerSHARC Internal Space Address Translation Table VME TigerSHARC 35 7 1 TigerSHARC TS1 Memory Sp tere peton aneao e AE AE SEE EEn e EEA LE Ea E Ee 35 72 TigerSHARC TS2 Memory Sp tere geeen ne E E eE E Ee E EA EE EE AEE 36 13 SDRAM Memory Space sintio eric crearlo E EENES ESEE ES EE eee seins EEE E res ee 36 8 Tiger SHARC Host Space auseinander as Bis pen 37 8 1 TisersSHARE YME M ster Sp te neac e ao e ae pi 37 9 Windows Driver nn EE E A ees 40 9 1 A RT 40 9 1 1 Setup Iristallati n Split 40 9 1 2 Installation Under XA dit 40 9 2 SIS3ISQUSB base Program ice ee use ah ii it 43 Page 3 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 10 Labview Windows Interface ococccononnoononnnnncnnononnonanononocnononnnnonononcncononnnnn no nnncncononnnns 44 10 1 NN 45 10 2 FindAll_SIS3150USB_Devices 0 ieee cccecsesssssccsccecsessessescesceesssessececesseesssesesceesseseseseecesesestesess 45 10 3 NN 45 104 O ESO CPR eS 46 LOD Wim Write e hee eats obec a a rare east 46 10 6 E 1S o A es ee A ce en 47 A 283232 Write aes csd chick ee EE Tec oa tee ds aus ee 47 10 8 WIM SOMA read nent iae AT 48 IR TINO ee ee aa eine 49 114 E e TS o EEE EEEE and ae nis Re Bee en rennen 49 12 VME Readout Speed iss ea in abs se 50 12 1 Perform nce speed test
50. nt EXPORT sis3150Usb_Vme_Dma_Write HANDLE usbDevice ULONG addr ULONG am ULONG size ULONG fifo_mode ULONG dmabufs ULONG req_nof_data ULONG put_nof_data Page 18 of 68 VUC3150 VME64x VME to USB2 0 Controller Version 1 23 Not all combinations of the parameters are possible and allowed All supported VME cycles are defined in the include file s1s3150usb_vme_win_utils sis3150usb_calls sis3150usb_vme_calls h Examples int vme_A32D32_read HANDLE hXDev U INtSZt vme_adr u_int32_t vme_data lwords int vme_A32MBLT64_read HANDLE hxXDev u_int32_t vme_adr u_int32_t vme_data u_int32_t req_num_of UTRERA t got_no_of_lwords LA Page 19 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 5 VME Slave 5 1 VME Slave Addressing The SIS3150 module occupies an address space of Ox 7FF FFFF Bytes i e 128 MBytes The SIS3150 firmware addressing concept is a pragmatic approach to combine standard rotary switch style settings with the use of VME64x backplane geographical addressing functionality The base address is defined by the selected addressing mode which is defined by DIP Switch S80 1 2 3 4 and possibly rotary switch SW2 and SW1 in non geographical mode 12 3 45 6 7 8 a S80 1 ON A32 addressing enabled EENEENE S80 2 OFF reserved S80 3 OFF VME address compared with SW2 SW1 QEF S80 4 OFF r
51. o to 0x0223fffc TARL Worda EDY 0x0008f fff 0x0248ffff free user buffer 0x02400000 Block 2 0x00100000 0x02500000 ES 16 KLWord 64 KByte EO to 0x0240fffc program code data 0x00103fff 0x02503fff 0x02410000 Block 2 0x00104000 0x02504000 48 KLWord 192 KByte gt 0x0243fffc free user buffer Ox0010ffff Ox0250f fff Page 35 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 7 2 TigerSHARC TS2 Memory Space VME offset TS2 Memory Space TS1 offset TS2 offset 0x03000000 Block 0 0x02000000 0x00000000 Eo 16 KLWord 64 KByte ES O 0x0300fffc program eode data 0x02003fff 0x00003fff 0x03010000 Block 0 0x02004000 0x00004000 ax 48 KLWord 192 KByte ES ime 0x0303fffc fied aser buffer Ox0200ffffF OXO000 f 0x03200000 Block 1 0x02080000 0x00080000 To 16 KLWord 64 KByte nn en 0x0320fffc aa cone dats 0x02083fff 0x000 0x03210000 Block 1 0x02084000 0x00084000 EO 48 KLWord 192 KByte ES to 0x0323fffc ERR OR Ox0208ffff Ox0008ffff 0x03400000 Block 2 0x02100000 0x00000000 FO 16 KLWord 64 KByte to ES 0x0340fffc pioetan Code data 0x02103fff 0x00003fff 0x03410000 Block 2 0x02104000 0x00004000 59 48 KLWord 192 KByte ee to 0x0343fffc N 0Ox0210f f 0x0000ffff 7 3 SDRAM Memory Space VME offset Buffer TS1 offset TS2 offset 0x04000000 0x04000000 0x04000000 ee 64Mbyte SDRAM Eo Yo 007fffffc OxO4FFFFFF OxO4FFFFFF Page 36 of 68 VUC3150 V
52. ow 26 source 27 source 0 27 interrupt control status 26 JTAG_CONTROL 17 29 30 JTAG_DATA_ IN 17 29 JTAG_TEST 17 29 LEMO out select 28 module Id 11 24 protocol status 63 USB control 10 USB status 10 register space USB 8 release on request 15 when done 15 Page 67 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller req_num_data 48 request level 15 requester 15 ROAK 25 RORA 25 rotary switch 20 RTE 43 S610 59 S620 59 S80 58 SBC 66 SIS3150base 43 SIS330x 50 slave 20 speed 50 SUSE 49 SW3 20 SW4 20 Sysclock 53 TCK 56 57 TDI 17 29 56 57 TDO 56 57 termination 53 TigherSHARC 50 timeout arbitration 15 BERR 15 TMS 17 29 56 57 TS host space 37 links 34 VME addressing 31 VME master space 37 TS hardware interrupts 33 TS_JTAG 57 TS BUS 8 Tundra 5 USB 6 address map 9 device 8 register space 8 vendor Id 49 usb ids 49 USB1 51 USB2 0 51 user LED 23 VCC 56 57 VME 5 8 address 37 address map 22 base address 20 connector 61 readout speed 50 slave 20 slave address map 21 VME addressing 31 vme_a32d32_read 47 vme_a32d32_write 47 vme_dma_read 48 vme_read 46 vme_write 46 VME64x 20 Windows Driver 40 XC18V04 54 Page 68 of 68
53. rom USB Bit 31 Bit 0 REQUEST SPACE CTRL Header OxAAAA 3 0 11 0 Address modifier VME only BC byte count max 32768 VME Byte Address Start address A31 0 Register and TS BUS LWORD Address Datum 1 Datum 2 In case of no Error In case of Error Bit 31 Confirmation from SIS3150 to USB Bit 0 No Confirmation Read Request Length 0 PKTEND generated CONFIRM STATUS BC Header 7 0 byte count max 32768 OxEE a 15 0 Page 62 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 17 1 2 Transfer Read Access Request from USB Confirmation from SIS3150 to USB Bit 31 Bit 0 Bit 31 Bit 0 REQUEST SPACE CTRL Header OxAAAA 3 0 11 0 Address modifier BC VME only byte count max 32768 Start address A31 0 VME Byte Address else LWORD Address address 2 list address 3 address n datum 1 datum 2 datum n The protocol status register has to be read if the received number Got Nof Bytes does not match the number of requested Bytes Requested Nof Bytes Page 63 of 68 VUC3150USB VME64x VME to USB2 0 Controller Version 1 23 Definition of SP 3 0 SP 3 0 Space 0 reserved 1 Register Space 2 TS BUS Space 3 reserved 4 VME Space 5 15 reserved Definition of CTRL 11 0 11 WR write requ
54. rupter type is DO8 5 2 4 IRQ mode In RORA release on register access mode the interrupt will be pending until the IRQ source is cleared by specific access to the corresponding disable VME IRQ source bit After the interrupt is serviced the source has to be activated with the enable VME IRQ source bit again In ROAK release on acknowledge mode the interrupt condition will be cleared and the IRQ source disabled as soon as the interrupt is acknowledged by the CPU After the interrupt is serviced the source has to be activated with the enable VME IRQ source bit again Bit Function Default 31 0 BE 0 16 0 15 0 14 0 13 0 12 RORA ROAK Mode 0 RORA 1 ROAK 0 11 VME IRQ Enable 0 IRQ disabled 1 IRQ enabled 0 10 VME IRQ Level Bit 2 0 9 VME IRQLevel Bit 1 0 8 VME IRQ Level Bit 0 0 7 IRQ Vector Bit 7 placed on D7 during VME IRQ ACK cycle 0 6 IRQ Vector Bit 6 placed on D6 during VME IRQ ACK cycle 0 5 IRQ Vector Bit 5 placed on D5 during VME IRQ ACK cycle 0 4 IRQ Vector Bit 4 placed on D4 during VME IRQ ACK cycle 0 3 IRQ Vector Bit 3 placed on D3 during VME IRQ ACK cycle 0 2 IRQ Vector Bit 2 placed on D2 during VME IRQ ACK cycle 0 1 IRQ Vector Bit 1 placed on D1 during VME IRQ ACK cycle 0 0 IRQ Vector Bit 0 placed on DO during VME IRQ ACK cycle 0 The power up default value reads 0x00000000 Page 25 of 68 VUC3150USB Version 1 23
55. stellen um den Yorgang abzuschlie en lt Zur ck Fertig stellen Abbrechen Page 42 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 9 2 SIS3150USB base program The SIS3150USB base program is a convenient tool to execute VME cycles with the USB to VME interface It has a graphical user interface and is based on National Instruments Labwindows CVI development environment The program with the CVI runtime engine RTE can be installed by running the setup executable in the cvidistkit directory vum eee av seny ep O E Se vee A A amp cvidistkit sis3150_usb_base Datei Bearbeiten Ansicht Favoriten Extras Q aa z y wi yo Suchen IE gt Ordner EE siscd_170105 Dis 1 999 KB WinZip File 14 01 2005 09 50 515330x Fi i 1 460 KB Anwendung 14 01 2005 09 50 sis3150usb Fi it 1 470 KB Anwendung 14 01 2005 09 50 D Doc 68KB Anwendung 14 01 2005 09 50 5 a Driver 1KB Konfigurationseinst 14 01 2005 09 50 D Windows 195153150 USB Base 2 300KB Windows Installer P 14 01 2005 09 50 sis3150usb_vme_applications 3150winlabview El cvi_applications E sis3150_usb_base 5 cvibuild sis3150_usb_base O cvidistkit sis3150_usb_base gt 4 6 Objekte e Freier Speicherplatz 655 GB 7 12 MB 3 Lokales Intranet The user interface of the program is shown below E
56. ter is used in the firmware upgrade process over VME only Bit Function write 31 31 none 4 4 none 3 3 none 2 2 none 1 MUX_CMC_JTAG 0 SIS3150 JTAG control 1 CMC Sites JTAG control 0 JTAG_OUT_EN 0 Disable JTAG output 1 Enable JTAG output Page 17 of 68 VUC3150USB Version 1 23 VME64x VME to USB2 0 Controller 4 3 TS BUS internal TigerSHARC Bus The driver offers the following calls int EXPORT sis3150Usb_TsBus_Single_Read HANDLE usbDevice ULONG addr ULONG data int EXPORT sis3150Usb_TsBus_Dma_Read HANDLE usbDevice ULONG addr ULONG dmabufs ULONG reg_nof_data ULONG got_nof_data int EXPORT sis3150Usb_TsBus_Single_Write HANDLE usbDevice ULONG addr ULONG data int EXPORT sis3150Usb_TsBus_Dma_Write HANDLE usbDevice ULONG addr ULONG dmabufs ULONG req_nof_data ULONG put_nof_data 4 4 VME Bus The driver offers the following calls int EXPORT sis3150Usb_Vme_Single_Read HANDLE usbDevice ULONG addr ULONG am ULONG size ULONG data int EXPORT sis3150Usb_Vme_Dma_Read ANDLE usbDevice ULONG addr ULONG am ULONG size ULONG fifo_mode ULONG dmabufs ULONG req_nof_data ULONG got_nof_data int EXPORT sis3150Usb_Vme_Single_Write HANDLE usbDevice ULONG addr ULONG am ULONG size ULONG data i
57. the last VME Cycle In special cases the driver reads this Status Information register This register reflects the status of the VME IRQ lines Bit Function Reading 31 0 8 0 7 Status VME IRQ 7 on VME BUS 6 Status VME IRQ 6 on VME BUS 5 Status VME IRQ 5 on VME BUS 4 Status VME IRQ 4 on VME BUS 3 Status VME IRQ 3 on VME BUS 2 Status VME IRQ 2 on VME BUS 1 Status VME IRQ 1 on VME BUS 0 0 Page 16 of 68 VUC3150 Version 1 23 VME64x VME to USB2 0 Controller 4 2 8 XILINX JTAG_TEST register define SIS3150_JTAG_TEST 0x20 write D32 ay This register is used in the firmware upgrade process over VME only A TCK is generated upon a write cycle to the register Bit write Function 31 none 4 none 3 none 2 none 1 TMS 0 TDI 4 2 9 XILINX JTAG_DATA_IN register define SIS3150_JTAG_DATA_IN 0x20 read D32 This register is used in the firmware upgrade process over VME only It is at the same address as the JTAG_TEST register and is used in read access It operates as a shift register for TDO The contents of the register is shifted to the right by one bit with every positive edge of TCK and the status of TDO is transferred to Bit 30 Bit 31 reflects the current value of TDO during a read access 4 2 10 XILINX JTAG_CONTROL register define SIS3150_JTAG_CONTROL 0x24 write only D32 This regis

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