M16C/26 Using the DMAC with a Forward Source
Contents
1. unsigned const char ptr string unsigned const char data 0123456789 RRR KR RR KK kk IK RK k kk kk IK k kk K kk k kk RR k k I RR KK RK KK RK k Name main Parameters None Returns None Description Initializes the system and then loops forever FR X k X k I I I I RR A KA X KA X RR KK RK KK KK void main ptr string data 0 mcu init initialize mcu to full Xin system clock 20 MHz in MSV30262 board uart_init initialize UARTO and pre load first character in transmit buffer DMA init initialize DMA registers dmae dmOcon 1 enable DMA transfers asm fset I enable interrupts te u0cl 1 enable UARTO transmit while 1 loop forever RRR KR RR KK kk k kk RK K kk k kk I IR k kk K kk k kk RK I OR RK KK RK KK KK k Name DMA init Parameters None Returns None Description Initializes DMA for transfer from forward source to fixed destinations Set DMACO for 10 byte transfers from memory to UARTO transmit buffer Fe IK KI X kk I X kk k kk k kk k kk I kk I IA I K kk k kk IA I I I I IRI RK KE REU05B0036 0100Z June 2003 Page 5 of 7 M16C 26 u E N ESAS Using the DMAC with a Forward Source void DMA init void dm0sl 0x0a DMAO trigger select UARTO transmit 00001010 II DSELO the four bits DSEL3 DSELO the DMA Cr DSEL1 request cause set for UARTO transmit PLISA n DESEL2 RM zas2. flag I flag nor the interrupt priority level affects the DMA transfers 3 0 DMAC with Forward Source Fixed Destination Description In the forward source counting address fixed destination address mode the DMAC controller will transfer bytes or words from an incrementing source address increments after each transfer to a fixed destination address The transfers can be either bytes or words Loading a value into the transfer count register controls the number of automated transfers Transfers will continue to occur each time the DMAC trigger event occurs until the transfer register underflows Therefore the number loaded into the register should be 1 less than the number of transfers desired A control register bit determines whether each transfer is a byte or word of data When the DMAC controller is configured to perform a single transfer cycle the DMAC becomes disabled after the transfer register underflows In repeat mode the Source Pointer register and the Transfer Counter register are reloaded with their initial values after the Transfer Counter register underflows and the DMAC remains active Therefore in repeat mode transfers will occur each time a trigger event occurs until the DMA enable bit is set inactive 0 REU05B0036 0100Z June 2003 Page 1 of 7 M16C 26 u E N ESAS Using the DMAC with a Forward Source 4 0 Configuring the DMAC for Forward Source Fixed Destination To configure a DMAC channel the following choic
3. 0 Single transfer DMASL omast select bit 1 Repeat transfer o o DMAS DMA request bit Note 1 A DMA not requested 0 0 DMA reguested Note 2 DMAE DMA enable bit Disabled Enabled Source address direction 9 Fixed select bit Note 3 1 Forward DAD Destination address direction select bit Note 3 i ad Nothing is assigned In an attempt to write to these bits write 0 The value if read tums out tobe O Note 1 DMA request can be cleared by resetting the bit Note 2 This bit can only be set to 0 Note 3 Source address direction select bit and destination address direction select bit cannot be set to 1 simultaneously Figure 2 DMA Control Registers REU05B0036 0100Z June 2003 Page 3 of 7 M16C 26 u E N ESAS Using the DMAC with a Forward Source 5 0 Reference Renesas Technology Corporation Semiconductor Home Page http www renesas com E mail Support support _apl renesas com Data Sheets M16C 26 datasheets M30262eds pdf User s Manual M16C 20 60 C Language Programming Manual 6020c pdf M16C 20 60 Software Manual 6020software pdf e Application Note Writing interrupt handlers in C for the M16C e MSV30262 SKP or MSV Mini26 SKP Quick start guide e MSV30262 SKP or MSV Mini26 SKP Users Manual e MDECE30262 or MSV Mini26 SKP Schematic 6 0 Software Code The example program was written to run on the MSV3062 Starter Kit but could be modified to implement in a user application
4. The program is written in C and compiled using the KNC30 compiler The program demonstrates using the DMAO channel to transfer data from a memory buffer to the UARTO transmit buffer The program performs a single transfer of 10 bytes to UARTO At the completion of the transfer a DMAO interrupt request is generated UARTO on the starter kit board is connected to a 9 pin D sub connector that can be used to connect to a PC running a terminal program such as HyperTerminal With the program running the data contained in the DATA array will be sent to the terminal program and appear on the PC screen To run program perform the following steps 1 Load program dma fs x30 using KD30 2 Setup COM port of PC and configure HyperTerminal to operate at 9600 BAUD 1 Stop Bit and No Parity Connect serial cable from COM port of PC to UARTO of starter kit board 3 Execute program by pressing GO button on KD30 and 0123456789 will be displayed in the HyperTerminal program window REU05B0036 0100Z June 2003 Page 4 of 7 M16C 26 u E N ESAS Using the DMAC with a Forward Source RRR KR kok KKK k kk RR KR k kk K kk k kk RE kk kk RI IR RK KR OK KK KK X File Name dma fwd src c a Content DMAC from a memory buffer to UART transmit buffer SLog 2 include sfr262 h SFR register definition pragma Interrupt dmal isr prototypes void mcu_init void void uart_init void void DMA init void
5. RENESAS APPLICATION NOTE M16C 26 Using the DMAC with a Forward Source 1 0 Abstract The following article introduces and shows an example of how to use the DMAC function of the M16C 26 with a forward counting source address and fixed destination address 2 0 Introduction The Renesas M30262 is a 16 bit MCU based on the M16C 60 series CPU core The MCU features include up to 64K bytes of Flash ROM 2K bytes of RAM and 4K bytes of virtual EEPROM The peripheral set includes 10 bit A D UARTs Timers DMA and GPIO The MCU has two DMAC Direct Memory Access Controller channels that allow data to be transferred from a source memory location to a destination memory location without using the CPU The DMAC utilizes the same internal address and data busses as the CPU yet is given a higher priority to the data bus than the CPU This method of DMAC and CPU bus arbitration is termed cycle stealing Each DMAC controller is capable of transferring data to or from a fixed address to any other address within the 1Mbyte address space The DMAC controllers can automatically transfer 128k bytes of data using word 16 bit transfers or 64k bytes of data using byte 8 bit transfers The source or destination address can also be auto incremented DMAC transfers can be initiated by an interrupt request signal or by manually writing to the software DMA request bit When requests are initiated by an interrupt request signal neither the interrupt enable
6. Sos S DSEL3 55 not used set to 0 not used set to 0 a DMS DMA reguest cause expansion bit to normal DSR set to 1 to generate DMA reguest if software trigger selected dmOcon 0X11 DMAO single transfer 8 bit mode forward source fixed destination 00001011 INN eea DMBIT transfer unit bit select bit 1 8 bits NO i DMASL repeat transfer mode 0 single transfer EE ssc ease DMAS DMA request bit can only be set to 0 DMAE DMA enable bit 0 disabled DSD source address direction 1 forward o no on oh m DAD destination address direction 0 fixed m not used set to 0 not used set to 0 dar0 unsigned long amp u0tb set destination register to address of uartO transmit buffer sar0 unsigned long ptr_string set source register to address of beginning of data buffer tor0 0x9 set transfer counter for 10 transfers number of transfers 1 dm0ic 0x04 set interrupt priority for DMAO interrupt to 4 RRR KR KKK KKK k kk k kk k kk k kk k kk IR k kk k kk I RR k k I IR RR k KK OK KK kk Name dma0 isr Parameters None Returns None Description This service routine is entered after the completion of the DMA transfer Kk kk k X kk X kk X X kk k kk k kk k kk k kk k kk k kk kk K kk k k X k X KX I X k k k kk void dma0_isr void REU05B0036 0100Z June 2003 Page 6 of 7 M16C 26 u E N ESAS Using t
7. Z June 2003 Page 7 of 7 Keep safety first in your circuit designs Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable but there is always the possibility that trouble may occur with them Trouble with semiconductors may lead to personal injury fire or property damage Remember to give due consideration to safety when making your circuit designs with appropriate measures such as i placement of substitutive auxiliary circuits ii use of nonflammable material or iii prevention against any malfunction or mishap Notes regarding these materials These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer s application they do not convey any license under any intellectual property rights or any other rights belonging to Renesas Technology Corporation or a third party Renesas Technology Corporation assumes no responsibility for any damage or infringement of any third party s rights originating in the use of any product data diagrams charts programs algorithms or circuit application examples contained in these materials All information contained in these materials including product data diagrams charts programs and algorithms represents information on products at the time of publication of these materials and are subject to change by Renesas Technology Corporation wi
8. es must be configured the configuration for this example are shown in parentheses Select the DMA request cause by setting DMOSL register to Ox0a UARTO receive interrupt request Select fixed or forward source forward source by setting bit 4 of DMCON register to 1 Select fixed or forward destination fixed destination by setting bit 5 of DMOCON register to 0 Select 8 or 16 bit transfers 8 bit transfers by setting bit O of DMOCON register to 1 Select a single transfer single transfer by setting bit 1 of DMOCON register to 0 Select the source address for the transfer Buffer address in RAM by specifying SARO Select the destination address UARTO transmit buffer address for the transfer by specifying DARO ON O 9 R O N 7 Select the number of bytes to be transferred 10 by writing 9 in the Transfer Counter register The registers that are used to configure and control the DMAC channels are shown in Figure 1 and Figure 2 DMAO request cause select register b7 b6 6 M ba 2 bt m Symbol Address When reset PY A DMOSL 03B816 0016 DMA request cause select bit Falling edge of INTO pin Software trigger Timer AO Timer A1 Timer A2 Timer A3 Timer A4 DMS 0 two edges of INTO pin DMS 1 UART2 transmit UART2 racaive A D conversion UART1 transmit Nothing is assigned In an attempt to write to these bits write 0 The value if read tums out tobe O DMA request cause 0 Normal expansion select b
9. he DMAC with a Forward Source RRR KKK k k k k kk k kok RK kok k I IR k kk k kk k kk I K kk k kk IA IR KI X k IR kk kkk I Name uart init Parameters None Returns None Description Initializes uart Fe IKK X kk k kk X kk k kk kok k kk k kk k k kk k kk I kk k kk k k I IR I RK OK KK void uart init void int dummy Configure Uart0 for 9600 baud 8 data bits 1 stop bit no parity uOmr 0x05 set mode register u0c0 0x10 set control register uObrg 0x81 set bit rate generator 20Mhz 16 9600 1 u0tb 0x20 Place data in the transmit buffer so when the transmit enable bit is set later on this first byte will be sent out and cause a UART transmit interrupt to occurs triggering the DMAC sOtic 0x00 Disable UARTO receive interrupt RRR KKK k kk k kk k kok k kk kok k kk k kk k K kk k kk I IR k kk I IR I I RI RK k Name mcu init Parameters None Returns None Description Initializes mcu for full Xin system clock 20 MHz in MSV30262 board Kk kk X kk k kk kk I k kk k kk k kk k kk k kk kk K kk k k k I Kk A kA k k X k kk void mcu init void Initialize mcu for sull speed 20MHz operation pred 1 Unlock CMO and CM1 cm0 0x08 Enable divider selected by CM1 cml 0x20 Select no division high Xin drive cm2 0x0 disable stop detection main clock Xin pred 0 Lock the System Clock Control Register REU05B0036 0100
10. it 1 Expanded cause Software DMA If software trigger is selected a reguest bit DMA request is generated by setting this bit to 1 When read the value of this bit is always 0 Timer BO DMS 0 Timer B1 DMS 0 Timer B2 DMS 0 UARTO transmit UARTO receive Figure 1 DMAO Request Cause Select Register REU05B0036 0100Z June 2003 Page 2 of 7 M16C 26 u EN ESAS Using the DMAC with a Forward Source DMA1 request cause select register b7 b6 b5 b4 b3 bz bt bO Symbol Address When reset IY XIII DM1SL 03BA16 0016 DMA reguest cause bat b1 bo select bit 0000 Falling edge of INT1 pin M 0001 Software trigger 0010 Timer A0 Timer A1 Timer A2 agen Timer A3 DMS 0 Timer A4 DMS 0 Timer BO DMS 0 two edges of INT1 DMS 1 Timer B1 E Timer B2 UARTO transmit UARTO racaive UART2 transmit DSEL3 UART2 recaivalACK2 A D conversion UART1 receive Nothing is assigned In an attempt to write to these bits write 0 The value if read tums out to be 0 DMA request cause 0 Normal expansion select bit 1 Expanded cause Software DMA If software trigger is selected a request bit DMA request is generated by setting this bitto 1 When read the value of this bit is always 0 DMAi control register by bB bW b4 b3 be bi bO Symbol Address When reset A Titi DMICON i 0 1 002C16 003C16 00000X002 DMBIT Transfer unit bit select bit 0 16 bits 1 8bits Repeat transfer mode
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