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Generic User Manual for the FDDI Adapter BIT Application

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1. 2 Edit the Makefile in the BSP directory tornado target config svme1 78 Find the line MACH EXTRA and replace with MACH EXTRA lib ccFddiX o lib ccFdBit a 3 Rebuild all VxWorks images To Build the FDDI Software Driver and BIT Application into the VxWorks Kernel 1 Copy ccFdBit a to your BSP library directory tornado target config svme1 78 lib 2 Copy ccFddia from your driver distribution to your BSP library directory tornado target config svme1 78 lib 3 Edit the Makefile in the BSP directory tornado target config svme1 78 Find the line MACH EXTRA and replace with MACH EXTRA lib ccFddi a lib ccFdBit a 4 Add the following code fragment to config h before define DEFAULT BOOT LINE Hdefine INCLUDE FDDI Hifdef INCLUDE FDDI define NETIF USR DECL IMPORT int ccfddiattach define NETIF USR_ENTRIES fddi N ccfddiattach Y Unit 0 Receive buffers 0 use default Transmit buffers 0 use default endif INCLUDE FDDI 5 Rebuild all VxWorks images To Load the BIT Application Separately From the VxWorks shell type ld lt ccFdBit a The BIT Application may be operated without the FDDI Software Driver installed Depending on the release version in use the following message might be displayed on loading the BIT Application CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 3 of 20 3 4 Undefined
2. i e all tests with this flag set will be repeated continually The stop on error flag would normally be used in conjunction with this To abort continuous testing use the Control C interrupt mechanism If the driver was suspended for testing then use ccfddiResumeDriver to resume normal driver operation The cc test message style determines how much output is displayed to the screen as described in paragraph 4 2 1 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 6 of 20 4 3 2 4 3 3 cc test result type typedef struct cc run status type run status int result code cc test result type This structure captures the outcome of a particular test Test result codes are listed in Section 6 cc tests type typedef struct int cc test message style type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc test option type cc tests type loopback mode init messages style prom check timer and hardware irq formac register ram check over mdr ram over dma engine memory data transfer rate plc 1 test plc 2 test bypass test wrap around check formac loopback send and receive l
3. 171 Rondebosch 7701 South Africa Voice and Electronic Contacts Tel 27 0 21 683 5490 Fax 27 0 21 683 5435 Email info ccii co za Email support 2ccii co za URL http www ccii co za Product Support Support on C I Systems products is available telephonically between Monday and Friday from 09 00 to 17 00 CAT Central African Time CAT GMT 2 CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Issue 1 2 Page 20 of 20
4. As such the FDDI VxWorks BIT Application binaries are provided with explicit installation instructions The FDDI VxWorks BIT Application tests the low level integrity of the FDDI hardware The FDDI adapters attach computers to 100 Mbit s FDDI networks using fibre optic cable The BIT Application consists of the following files ccFdBita FDDI BIT object file ccFdBit h Header file for user applications ccFddiX o Stub to allow BIT Application to be linked into kernel without FDDI driver BitDemo c Sample BIT Application Release txt Release notes and revision history Please check this file for information on the latest updates Currently supports Dy4 SVME178 Radstone PPC Power 4B and MVME 5100 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 1 of 20 2 Applicable and Reference Documents 2 1 Applicable Documents 2 1 1 DI IPSC 81443 Data Item Description for a Software User Manual 2 1 2 CCII FDDI 6 MAN 008 Installation Guide for the FDDI Adapter 2 1 3 VxWorks 5 3 1 Programmer s Guide edition 1 2 2 Reference Documents None CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 2 of 20 3 1 3 2 3 3 Installation Procedure This paragraph describes the installation instructions for the FDDI VxWorks BIT Application To Build the BIT Application into the VxWorks Kernel 1 Copy ccFddiX o and ccFdBita to your Berkley Sockets Devices BSP library directory tornado target config svme1 78 lib
5. ete 11 5 6 2 l st GoVerage ossa pias chewed ad all EL eae iat ese ad 11 5 7 Bem cnm ME EP 11 alo Description i tte eRe eet cus PETI ut ee ee PE Mand PIENE quse p ETE oF 11 57 27 CLestGOVerage iussus te rer ce E Debo whl ain Reb ALAS apa BOCA FEAT REDE 12 5 8 PEG 2 Port B TeSt 5 te rte runt oe Lea iut A cela aa MIN UAE PIS qua 12 58 Description puc Davai eked rk c hada We kee rk e bI DW ede bh ale boda ESTERE RR 12 5 82 Lest GOVerage iyoran Ak ico beris eMe nonet eiie Sak ee sce Eee a ETA SLS 12 Contents CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page iv of vi 5 9 Bypass Test oes pair a ieee A ei Gee A A VE A AA ER 12 59 1 DESENPUON vesscluessUescPiEkFRSUERNSCFCSESPNSEFSUEREICDE EGER EG E RD CHR OR I 12 5 9 2 Lest GoVerag6 oic pol vERCSEIQ CHAIR ERI EM RA EDS AQ Medus iari t 12 5 10 Wrap Around Check se aces viste us RACER UNUM MS MR EI NP Ra HRS Ea ent saan 12 5 10 1 Description enisi ERI DE A A DE Ra CRM D Ru E RC RS SES DE EROR SE 12 5 10 2 Test Coverage o 12 511 FORMAC Loopback in ia 22 tid kee xe Sees AS SRR al edad nu 12 S11 Descrptlom facet ede hed a te BA Ce hed eed a Aol 12 5 11 2 Test Coverage iii cee eh ba ee ede et ed lel bee eo he be da de bd 12 5 12 Send and Receive Long Frames o o oococococ hh 13 5 12 1 DESCHPUON ii e le Gael g ae a e pa eee pe 13 5 2 2 Test COVerage disse a Yam Greate ed le abere e od Ye 13 5 13 Send and Master Access Loop ooooococcccc he
6. present the user will hear the sound of the switch clicking on and off This test never returns a failed result 5 9 2 Test Coverage This test covers functionality of the block labelled OBS in Figure 2 5 10 Wrap Around Check 5 10 1 Description This test checks if the FORMAC receives frames correctly when the queues wrap in buffer memory Short frames 20 Bytes are sent and received in loopback It also checks DMA transfer 5 10 2 Test Coverage This test covers functionality of the blocks labelled BMU BIU and MAC in Figure 2 5 11 FORMAC Loopback 5 11 1 Description This test verifies that the FORMAC can send and receive data without using DMA master access Various levels of loopback are performed after MAC after PLC 1 after PDT R 1 after Transceiver and Connector 1 after PLC 1 and 2 after PDT R 2 and after Transceiver and Connector 2 This test requires wrap plugs to be installed as shown in Figure 1 5 11 2 Test Coverage This test covers functionality of the following blocks from Figure 2 ASIC SUPERNET 3 FDDI Controller PLC S Transceiver and Connector 1 Transceiver and Connector 2 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 12 of 20 5 12 Send and Receive Long Frames 5 12 1 Description This test sends and receives long frames using the synchronous and asynchronous transmit queues Long frames various lengths up to 4 400 Bytes are sent and received in loopback D
7. 48 249 250 2 2 255 6 242 FM_SWPXS 5 TIM sw ME 27 meon 28 mon OOO m9 moa O FM MARR 25 HMMMARW m5 MR 07 0 1 7 1 4 FM RPXSF 7 4 41 4 4 4 4 47 4 4 5 51 5 5 5 FM PHRI1 FM PRI2 SN2 FM TNEG CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page 16 of 20 269 270 FM ECNTR 273 FM_TMSYNC SN3 FM_ST1U SN3 FM ST1L SN3 FM ST2U SN3 FM ST2L SN3 FM ST3U SN3 FM ST3L SN3 FM IMSK1U SN3 FM IMSK1L SN3 FM IMSK2U SN3 FM IMSK2L SN3 FM IMSK3U SN3 FM IMSK3L SN3 FM IVR SN3 FM IMR SN3 FM SAID SN3 FM LAIM SN3 FM SAGP SN3 FM STMCHN SN3 FM FSCNTR SN3 IFCP 3 Interrupt already set IRQ occured but AF BIST DONE ST3 not set IRQ occured but BIST DONE AFSTAT not set CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page 17 of 20 Flash Protection violation PL LC LENGTH PLC Other Errors bit sign PL RCV VECTOR 609 Compare error during DMA write 660 POL Error in CTRL register tests 3 663 PCI Error in Power Management Capability tests PCI diag_bmu Descriptor is not given back PCI VPD transfer does not complete PCI VPD write error CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page 18 of 20 Code Description 672 PCI Voltage sensor value out of the limits 673 PCI Voltage sensor defective PCI Temperature sensor value
8. Cl Systems Document No Document Issue Issue Date Print Date File Name Distribution List No CT Systems CCII Systems Pty Ltd Registration No 1990 005058 07 Communications Computer Intelligence 2 Integration 2 Generic User Manual for the FDDI Adapter VxWorks BIT Application CCII FDDI 6 MAN 003 2009 08 20 2009 08 20 PAFDDNTECHIMANICFDMANO3 WPD DN 0090 C I Systems The copyright of this document is the property of C2l Systems The document is issued for the sole purpose for which it is supplied on the express terms that it may not be copied in whole or part used by or disclosed to others except as authorised in writing by Cl Systems Document prepared by C I Systems Cape Town Signature Sheet Completed by 0p X Keup Accepted by l Project Manager Board Level Products C l Systems lag DE Comm Accepted by K Keucer Aka Ey CON SER AssUrance acoa ot eo Systems 2009 08 20 Issue 1 2 Page ii of vi CCII FDDI 6 MAN 003 CFDMANO3 WPD Signature Sheet Completed by Project Engineer Board Level Products C l Systems Accepted by Project Manager Board Level Products C212 Systems Quality Assurance C l Systems CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page ii of vi Amendment History 1 0 Initial version based on Dy4 document 2000 11 28 1 Correct documentation errors in Figure 2 and in Sectio
9. Data Structures isare a ana a hme 6 43 1 e6c test optior type vieiras e I44sLpbehe4 Eia A eds 6 4 3 2 CC test result types s aaner Seeded ir ds Rhea a ded 7 4 3 3 cc tests TYDE iei RAN 7 4 3 4 Application Example 4 2545 rara lada Shea udeltecfenebixedsuaiei tiet ess wig 8 Test DescripllOliS es cima no arto Db eint wk tni tai TEDE 10 5 1 PROM Check rte es ter EPA NR EN ERES A RM e eas ted 8 MEANS Qs 10 54 Description 3 bes lr xr Peake RUE RE ea PR UR DE Pees PR URS NET DA 10 53 2 Test Coverage i o ee A encre ER tea he Sog EU E ave ley RS 10 5 2 Timer and Hardware Interrupt Request IRQ oooocccccccccooc eh 10 524 Description e or eee eis she ot ease e cde ERE AE Ei NEN uU dus 10 52 2 Fest Coverage 14s y e ERE HUE Rp IUE I Reni LEE GU RUIT EL eU Eds 10 5 3 FORMAC Register zaren onna ENa a hmm 11 Si DESCHPUOM evo as EA Ane aaa ee DEDE EEE A tires 11 5 9 2 TestCoverage was biai ipaam a a A ead ee Ra E ape eda ETA aed EA 11 5 4 RAM Check Over MDR 000 cece teen eee 11 5 41 Descriptio taco a ev ee Bde ends hon dae tE 11 5 4 2 Test Coverage o 11 5 5 Random Access Memory Over Direct Memory Access Engine 0 0c cece eee 11 5S4 Descriptio sc cit A m emt ne Bae oh het ve eek een gh 11 5 5 2 Test Coverage siu sRaeqeieixrwpUhbi AER otag adie ead 11 5 6 Memory Data Transter Rate secti rren aCe teee neta deed hi E reis 11 bios Description ouis ud eUam Di wheat teases tad deleted eee wheal
10. E been 20 CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page v of vi Abbreviations and Acronyms API Application Program Interface ASIC Application Specific Integrated Circuit BIT Built in Test BIST Built in Self Test BIU Bus Interface Unit BMU Buffer Management Unit BSP Board Support Package CLS Cache Line Size DAS Dual Attached Station DMA Direct Memory Access FDDI Fibre Distributed Data Interface FORMAC Fibre Optic Ring Media Access Controller FPROM Flash Programmable Read only Memory HCC Host Carrier Card HPI Host Processor Interface IRQ Interrupt Request LED Light Emitting Diode MAC Media Access Control Mbit s Megabits per Second MDR Memory Data Register MWI Memory Write and Invalidate OBS Optical Bypass Switch PCI Peripheral Component Interconnect PDR Physical Data Receiver PDT Physical Data Transmitter PLC Physical Layer Controller PLC S Physical Layer Controller with Scrambler PMC Peripheral Component Interconnect Mezzanine Card PROM Programmable Read only Memory RAM Random Access Memory VME Versa Module Eurocard CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page vi of vi 1 Scope 1 1 Identification This document is the user manual for the C I Systems Fibre Distributed Data Interface FDDI Adapter VxWorks Built in Test BIT Application 1 2 System Overview The FDDI VxWorks BIT Application was developed specifically to be ported to operate on a variety of Host Carrier Cards HCCs
11. MA transfer is tested as well This test requires wrap plugs to be installed as shown in Figure 1 5 12 2 Test Coverage This test covers functionality of the following blocks from Figure 2 ASIC SUPERNET 3 FDDI Controller PLC S Transceiver and Connector 1 5 13 Send and Master Access Loop 5 13 1 Description This test shall prove that the FORMAC can send and receive data using DMA master access Various levels of loopback are performed after MAC after PLC 1 after PDT R 1 after Transceiver and Connector 1 after PLC 1 and 2 after PDT R 2 and after Transceiver and Connector 2 This test requires wrap plugs to be installed as shown in Figure 1 5 13 2 Test Coverage This test covers functionality of the following blocks from Figure 2 ASIC SUPERNET 3 FDDI Controller PLC S Transceiver and Connector 1 Transceiver and Connector 2 5 14 FORMAC Ring Op Status 5 14 1 Description This test checks that the Ring Op interrupt occurs in the FORMAC 5 14 2 Test Coverage This test covers partial functionality of the blocks labelled BIU and MAC in Figure 2 5 15 Configuration Registers Check 5 15 1 Description This test checks the configuration registers 5 15 2 Test Coverage This test covers functionality of the blocks labelled BIU and Configuration Registers in Figure 2 5 16 Special Card Check 5 16 1 Description This runs the parity mode tests checks all timers in test mode checks whether writes can be made
12. et of startup tests If post tests is NULL a default set of tests appropriate to startup will be executed i e no loopback or Light Emitting Diode LED tests The structure that defines this is called cc default post tests If post results is NULL results will be written to the location cc default post results The function returns TRUE if any of the tests return an error int ccfddiTest cc tests type tests cc tests report type results This function runs a set of tests as specified in tests and places the results in results The function returns TRUE if any of the tests return an error int cctddiShowTestResults cc tests report type results This function displays the test results in results as shown in the following example PROM Check PASSED Timer and Hardware IRQ PASSED FORMAC Register Check PASSED RAM Check over MDR PASSED RAM Check over DMA Engine PASSED Memory Data Transfer Rate PASSED PLC 1 Test PASSED PLC 2 Test FAILED Code 550 Bypass Test SKIPPED Wrap Around Check PASSED FORMAC Loopback Check FAILED Code 191 Send and Receive Long Frames PASSED Send and Master Access Loop FAILED Code 191 FORMAC Ring Op Status PASSED Configuration Registers Check PASSED Special Card Check PASSED ASIC Check PASSED LED Test PASSED The function returns TRUE if any of the tests reported a failure CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 5 of 20 4 2 BIT Data Types 4 2 1 cc test message style ty
13. he 13 313 1 D scription Sumo Lib bea A bait Sede ree LUNES 13 5 19 2 Test Coverage Lilia Lb Ried de 13 5 14 FORMAC Ring Op Status o ooccoocococo herr 13 5 144 Description yis zu ilwerieef etieul4bewelieehbeNEDPERILBUBC E eB WI e LIEB Et 13 5 14 2 Test Coverage o 13 5 15 Configuration Registers Check 0 00 cette teeta 13 5 15 1 DescriptiOn ned ed art ii ad 13 5 15 2 Test GoVelage e edet pt add did tia feas sonia esum e 13 5 16 Special Card Check ise egre dte YES ed doa Ae ame aL ae o eje aea a Ce doe 13 STET DESCHIPUON 225 22 a A A at A eis 13 5 1622 T st Coverage iio A aed dod re A ed a ed e a 14 DNA ASIG Check PPP PL Cm 14 5 17 41 Description adivina airada tada eee 14 517 27 Test Coverage reten reta hann gasa daa tate ia iud 14 5 18 LEDTES 4 2 ek iike Ite RARE kaa nae ARE ERA AAA AAA 14 518 1 Description s etarra rta erat dada att 14 5 18 2 Test Coverage 0 6 ccc tenet etn eee 14 6 Test Result CodeS 55 9 A GS Oe ROE Oe EO EGA PRE AO EGE Oe LOBE 15 Ts GOmtact DetalS creien eoo be E dba dg i wei a Id E LIS 20 7 1 Contact Person A iroh rai e TE eda din bet edet c a e CA 20 7 2 Physical Address 2 lord det eeu Lea uei heh x LU Pi X daebdd eheau gei he 20 7 3 Postal Address reato deaur rado LU Wy eb pei xau ehe eR Ri dus 20 7 4 Voice and Electronic Contacts sssaaa aaaea hr ees 20 7 5 Prod ctSuppolt 13 nato ET Purse racks EIS RE GU PS Y ane RID Be ene aan PR A
14. igure 2 5 2 Timer and Hardware Interrupt Request IRQ 5 2 1 Description This tests whether the timer can be used correctly whether it times out and whether the timer interrupt occurs correctly 5 2 2 Test Coverage This test covers partial functionality of the blocks labelled BIU and MAC in Figure 2 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 10 of 20 5 3 FORMAC Register 5 3 1 Description This checks the Fibre Optic Ring Media Access Controller FORMAC and programmable registers The test uses all read only and read write registers It also tests the initialisation of counters and other registers In addition it executes a test on the Address Filter Function of the SUPERNET 3 chipset 5 3 2 Test Coverage The test covers partial functionality of the blocks labelled Control Register File and MAC in Figure 2 5 4 RAM Check Over MDR 5 4 1 Description This reads from and writes to Random Access Memory RAM on the FDDI Adapter using the Memory Data Register MDR and verifies the data 5 4 2 Test Coverage This test covers functionality of the block labelled Buffer Memory in Figure 2 5 5 Random Access Memory Over Direct Memory Access Engine 5 5 1 Description This reads from and writes to RAM on the FDDI Adapter using Direct Memory Access DMA master transfers 5 5 2 Test Coverage This test covers functionality of the block labelled Buffer Memory in Fig
15. n 5 7 2002 10 22 1 2 Improve document naming consistency Ep po o0 E Ji 0 s Ro lo 0j ERE CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page iii of vi SCOPE AI e a 1 1 1 AMC a eae wd 1 1 2 System Overview ooo 1 Applicable and Reference Documents 00000 nen eee teenies 2 2 1 Applicable Documents tii A el GA HR We Rn RU LA id 2 2 2 Reference Documents or een re ere ee hh hr 2 Installation PIOCBdUIG cook EY Y eee he eh estes bees he R bees pees bees hess 3 3 1 To Build the BIT Application into the VxWorks Kernel we eae 3 3 2 To Build the FDDI Software Driver and BIT Application into the VxWorks Kernel 3 3 3 To Load the BIT Application Separately 0 000 3 3 4 Platform Specific Variations Sans NE Das tee ER sea ES 4 Application Program Interface API 0 0 0 es 5 4 1 BIT PUNCHONS A e Coil A el dH eR AAA M bt 5 4 1 1 int ccfddilnitBIT cc test message style type init messages style 5 4 1 2 int ccfddiPOST cc tests type post tests cc tests report type post results 5 4 1 3 int ccfddiTest cc tests type tests cc tests report type resultS 5 4 1 4 int ccfddiShowTestResults cc tests report type results llli isle 5 4 2 BIT Data Types oreet rite mee Yeh pd ee ER eere Ye p eene coe e a eere qt 6 4 2 1 cc test message style type keen eae 6 4 2 2 cc run status type 6 4 3 BIT
16. ong frames send and master access loop formac ring op status configuration registers check Special card check asic check led test This structure controls the execution of all the tests If 1oopback mode is TRUE then the user must install wrap plugs on both ports before testing as shown in Figure 1 So Figure 1 Loopback Wrap Plugs CCII FDDI 6 MAN 003 CFDMANO3 WPD 2009 08 20 Issue 1 2 Page 7 of 20 The 1oopback mode flag affects the following tests PLC 1 Test PLC 2 Test FORMAC Loopback Send and Receive Long Frames Send and Master Access Loop oc RON The init messages style member specifies the amount of text displayed during initialisation of the BIT Application when calling cc ddiPOST cc tests report type typedef struct cc_test_result_type prom check cc test result type timer and hardware irq cc test result type formac register cc test result type ram check over mdr cc test result type ram over dma engine cc test result type memory data transfer rate cc test result type plc 1 test cc test result type plc 2 test cc test result type bypass test cc test result type wrap around check cc test result type formac loopback cc test result type send and receive long frames cc test result type send and master access loop co test result type formaoc ring op status cc test result type configuration registers check cc test
17. out of the limits PCI Temperature sensor defective PCI 12C transfer does not complete PCI FPROM VPD ROM size does not match lC EEPROM size Check Timer 82C54 801 Timer 82C54 does not decrement 802 Timer IRQ does not occur 803 IRQ is pending 804 Hardware Timer IRQ does not occur 675 676 677 805 Timer clock was not correct 810 899 check token status PCI STF or EOF not set in loopback test PCI MSVALID is not set in loopback test PCI Memory status receive abort in loopback test PCI Received frame not valid in loopback test PCI E Indicator set in loopback test 904 PCI FORMAC rx len unequal descriptor len in loopback test 905 PCI length error in loopback test PCI Wrong FC found in loopback test PCI C Indicator set in loopback test 908 PCI Cannot get dummy RxD in loopback test PCI Stop Master test failed during loopback test 910 PCI Token Counter does not increment in loopback test 998 Data header or body defective in loopback test 999 Illegal size in loopback test 901 902 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 19 of 20 7 1 7 2 7 3 7 4 7 5 Contact Details Contact Person Direct all correspondence and or support queries to the Project Manager at C I Systems Physical Address C212 Systems Unit 3 Rosmead Place Rosmead Centre 67 Rosmead Avenue Kenilworth Cape Town 7708 South Africa Postal Address Cl Systems P O Box
18. pe typedef enum cc quiet 0 CE dots Li cc detailed 2 cc test message style type Thistypeisusedinthece test option type structure to control the amount of text displayed during execution of a particular test The cc quiet option is used when no output is desired The cc dots option prints a series of dots to indicate test progress The cc detailed option displays information which may be helpful in diagnosing faults 4 2 2 cc run status type typedef enum cc skipped 0 cc failed 1 cc passed 2 cc run status type This type is used in the cc test result type structure to indicate the outcome of a particular test 4 3 BIT Data Structures 4 3 1 cc test option type typedef struct int do test Set this to run test otherwise test is skipped int stop on error If this is set no more tests will be run if there is an fail int loop forever Tests with this bit set will be run continuously cc test message style type test message style Determines appearance of test messages cc test option type This structure controls the execution of a particular test If the do test flag is set to TRUE the test executed otherwise it is skipped If the stop on error flag is set to TRUE for a test and the test returns an error then testing terminates immediately no further tests are run Ifthe loop forever flag is set to TRUE for any test then testing continues indefinitely
19. result type special card check cc test result type asic check cc test result type led test cc tests report type This structure captures the outcome of all tests 4 3 4 Application Example The following source file is a simple demonstration of how to execute the BIT functions include ccFdBit h cc tests type tests FALSE Loopback NOT connected cc detailed do test stop on error loop forever test message style RUE FALSE FALSE cc detailed prom check RUE FALSE FALSE cc detailed timer and hardware irq RUE FALSE FALSE cc detailed formac register RUE FALSE FALSE cc detailed ram check over mdr RUE FALSE FALSE cc detailed ram over dma engine RUE FALSE FALSE cc detailed memory data transfer rate RUE FALSE FALSE cc dots plo 1 test RUE FALSE FALSE cc dots plo 2 test FALSE FALSE FALSE cc detailed bypass test RUE FALSE FALSE cc detailed wrap around check RUE FALSE FALSE cc detailed formac loopback RUE FALSE FALSE cc detailed send and receive long frames RUE FALSE FALSE cc detailed send and master access loop RUE FALSE FALSE cc detailed formac ring op status RUE FALSE FALSE cc detailed configuration regis
20. symbols ccfddiResumeDriver ccfddiSuspendDriver Warning object module may not be usable because of undefined symbols This is normal and will not affect operation of the software Platform Specific Variations This manual assumes that the executable is named ccFdBit a In order to prevent confusion platform specific variations are released with a unique filename as listed below The user should simply rename this file to ccFdBit a before using it although the platform specific filename may be used asis if desired This manual however refers to the file as ccFdBit a Dy4 178 ccFdBitSVME178vxxxx a RAD PPC ccFdBitRadPPCvxxxx a POWER 4B ccFdBitP4Bvxxxx a MVME5100 ccFdBitMVME5100vxxxx a Where xxxx represents the current version number of the release CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 4 of 20 4 1 4 1 1 Application Program Interface API All function prototypes data types and structures described in this section are defined in the header file ccFdBit h BIT Functions int ccfddilnitBIT cc test message style type init messages style This function is used to initialise the BIT Application The argument specifies the amount of text displayed during initialisation of the BIT Application The function returns TRUE if initialisation is unsuccessful int ccfddiPOST cc tests type post tests cc tests report type post results This function is used to initialise the BIT Application and run a s
21. ters check RUE FALSE FALSE cc quiet special card check RUE FALSE FALSE cc quiet asic check RUE FALSE FALSE cc quiet led test 1 cc tests report type results int BitDemo void CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 8 of 20 ccfddiInitBIT cc detailed ccfddiTest amp tests amp results return ccfddiShowTestResults amp results CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 9 of 20 5 Test Descriptions PLC S FPROM Bre gt PDT 2 Transcelver amp 5 p B PDR 2 Connector 2 a 2 ASC PDT 1 Transceiver amp gt pedcs ea Control po MAC PLC I DETTE Connector 1 O gt Reg ster File PDR 1 A E Configuration SUPERNET 3 FDDI Controller a Regis ers 8 Buffer Manage 2 ment Unit BMU 3 Host Processor Buffer Mernory Inerface HPI Control Lines Data Path OBS LEDs Figure 2 FDDI Adapter Block Diagram 5 1 PROM Check 5 1 1 Description This reads the contents of the Programmable Read only Memory PROM to an array and does a compare against the first three bytes of the Media Access Control MAC address This is done to make sure the MAC address falls within reasonable bounds The MAC address is displayed if the cc detailed mode is selected 5 1 2 Test Coverage This test covers functionality of the block labelled FPROM in F
22. to I O space tests descriptor bits and checks the Bank 0 special registers CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 13 of 20 5 16 2 Test Coverage This test covers functionality of the blocks labelled BIU BMU HPI and part of MAC in Figure 2 5 17 ASIC Check 5 17 1 Description This checks ASIC functions as well as the DMA engine with all possible alignments 5 17 2 Test Coverage This test covers functionality of the blocks labelled BIU BMU HPI and Buffer Memory in Figure 2 5 18 LED Test 5 18 1 Description The three adapter LEDs are turned on in all eight combinations for one second each The user must verify that these display correctly This test never returns a failed result 5 18 2 Test Coverage This test covers functionality of the blocks labelled BIU and LEDs in Figure 2 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 14 of 20 6 Test Result Codes Mapped POS 106 register defective Cannot switch LED 2 DAS on Cannot switch LED 2 DAS off CSR A defective IRQ check enabled CSR_A defective IRQ Terminal count enabled Cannot switch LED 0 off and LED 1 off Cannot switch LED 2 DAS on Cannot switch LED 2 DAS off Timeout timer data pathin 1 CCII FDDI 6 MAN 003 2009 08 20 CFDMANO3 WPD Page 15 of 20 209 FM LAGM 0 2 2 2 226 FM_EARV 2 2 2 2 225 230 FM_EAA2 23 2 2 245 246 2 2
23. ure 2 5 6 Memory Data Transfer Rate 5 6 1 Description This test measures raw master access speed and prints the values to the console The speed is measured with differing Cache Line Size CLS byte aligned or misaligned and in different Memory Write and Invalidate MWI modes 5 6 2 Test Coverage Although not strictly a test this will exercise functionality of the Bus Interface Unit BIU and Host Processor Interfaces HPI of the Application Specific Integrated Circuit ASIC 5 7 PLC 1 Port A Test 5 7 1 Description This tests the IRQ executes the Physical Layer Controller PLC Built in Self Test BIST for Port A does bit signalling loops initialises timer checks the read only and read write registers This test requires wrap plugs to be installed as shown in Figure 1 CCII FDDI 6 MAN 003 2009 08 20 Issue 1 2 CFDMANO3 WPD Page 11 of 20 5 7 2 Test Coverage This test covers functionality of the block labelled PLC 1 in Figure 2 5 8 PLC 2 Port B Test 5 8 1 Description This tests the IRQ executes the PLC BIST for Port B does bit signalling loops initialises timer checks the read only and read write registers This test requires wrap plugs to be installed as shown in Figure 1 5 8 2 Test Coverage This test covers functionality of the block labelled PLC 2 in Figure 2 5 9 Bypass Test 5 9 1 Description This tests whether the optical bypass is present or not If the optical bypass is

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