datasheet 1
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1. pin D Sub 1 COM to 1 COM 2m 05P000 01 25 mounting screw sets to fix PMC XMC modules on carrier boards Software Linux This product is designed to work under Linux See below for all available separate software packages 10EM09 91 General Linux BSP for A17 EM9 EM9A EK9 F50C FSOP and XM50 13MD05 90 MDIS5 System and Device Driver Package MEN for Linux This software package includes most standard device drivers available from MEN 13Z014 90 Linux device driver MEN for PCI to VME bridge on A12 A13 A14 A15 A17 A19 A20 A21B A21C and B11 Software VxWorks This product is designed to work under VxWorks For details regarding supported unsupported board functions please refer to the corresponding software data sheets 10EM09 60 VxWorks 6 4 6 5 BSP MEN for A17 EK9 EM9 EM9A F50C F50P and XM50 10EM09 61 VxWorks 6 9 BSP MEN for A17 EK9 EM9 EM9A F50C F50P and XM50 13Z017 06 MDISS low level driver sources MEN for 16Z034_GPIO 16Z037_GPIO and 16Z127_GPIO Software Firmware BIOS MENMON is MEN s firmware BIOS for PowerPC platforms 14A017 00 MENMON Firmware MEN for A17 object code For operating systems not mentioned here contact MEN sales Documentation Compare Chart 6U VMEbus CPU and I O cards Download 20A017 00 A17 User Manual 20A017 ER A17 Errata A17 Data Sheet 2013 02 06 Page 6 Contact Information Germany France USA MEN Mikro Elektronik GmbH MEN Mikro Elektronik SAS MEN Micro Inc Neuwied2. A17 6U MPC8S548 VMEbus 2eSST CPU Board PowerPC MPC8548 or MPC8543 up to 1 5 GHz 1 slot 2eSST VMEbus master and slave Up to 2 GB ECC DDR2 RAM Flash Disk FRAM 2 Gb Ethernet 2 COMs at front 2 Gb Ethernet via PO 2 PMC slots 1 slot also XMC FPGA for individual I O functions MENMON BIOS for PowerPC cards 40 to 85 C screened The A17 is an advanced PowerPC based single board computer for embedded applications and can act as a master or a slave in a legacy VMEbus environment Using the TSI148 bridge controller the CPU card provides 2eSST performance levels while maintaining backwards compatibility with older standards such as VME64 and VME32 The 2eSST protocol is based on synchronous data transfer and thus doubles the theoretical VME transaction bandwidth to transfer rates of up to 320 MB s The A17 is controlled by an MPC8548 or optionally an MPC8543 PowerPC processor alternatively with encryption unit with clock frequencies between 800 MHz and 1 5 GHz The SBC is equipped with ECC controlled DDR2 RAM for data storage with a Flash disk for program storage as well as with non volatile FRAM The board provides front panel access for two Gigabit Ethernet and two COM interfaces via four RJ45 A17 Data Sheet 2013 02 06 connectors Another two Gigabit Ethernet channels are available at the optional PO rear connector to support Ethernet on the backplane complying with ANSI VITA 31 1 2003 The two PMC slots o
3. V 12 V 5 5 only provided for PMCs that need 12 V Oo fea ea eal Dimensions standard double Eurocard 233 3 mm x 160 mm Weight 490 g incl heat sink without XMC PMC modules Temperature range operation a 40 85 C screened o Airflow min 10 m3 h Temperature range storage 40 85 C Relative humidity operation max 95 non condensing Relative humidity storage max 95 non condensing Altitude 300 m to 3 000 m Shock 15 g 11 ms Bump 10 g 16 ms Vibration sinusoidal 1 g 10 150 Hz Conformal coating on request 220 017 h 40 C according to IEC TR 62380 RDF 2000 PCB manufactured with a flammability rating of 94V 0 by UL recognized manufacturers Conforming to EN 55022 radio disturbance IEC1000 4 2 ESD and IEC1000 4 4 burst MENMON Linux VxWorks QNX on request support of the FPU is currently not provided by QNX OS 9 on request For more information on supported operating system versions and drivers see Downloads Page 4 Configuration amp Options Standard Configurations Article No CPU Type Clock System RAM Flash Disk FRAM PO Ethernet Operation Temperature 01A017 00 MPC8548 1 33 GHz 1 GB ECC 2 GB 128 KB No 40 85 C Options CPU Several PowerQUICC III types with different clock frequencies MPC8548 or MPC8548E o 1 GHz 1 2 GHz 1 33 GHz or 1 5 GHz MPC8543 or MPC8543E o 800 MHz or 1 GHz Memory m System RAM o 512 MB 1 GB or 2 GB o With o
4. ch product for the applicable use case and has to be agreed upon in writing by MEN and the customer Should the customer purchase or use MEN products for any unintended or unauthorized application the customer shall indemnify and hold MEN and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim or personal injury or death associated with such unintended or unauthorized use even if such claim alleges that MEN was negligent regarding the design or manufacture of the part In no case is MEN liable for the correct function of the technical installation where MEN products are a part of Copyright 2015 MEN Mikro Elektronik GmbH All rights reserved A17 Data Sheet 2013 02 06 Page 7
5. er Stra e 3 7 18 rue Ren Cassin 860 Penllyn Blue Bell Pike 90411 Nuremberg ZA de la Chatelaine Blue Bell PA 19422 Phone 49 911 99 33 5 0 74240 Gaillard Phone 215 542 9575 Fax 49 911 99 33 5 901 Phone 33 0 450 955 312 Fax 215 542 9577 Fax 33 0 450 955 211 info men de info men france fr sales menmicro com www men de www men france fr www menmicro com The date of issue stated in this data sheet refers to the Technical Data only Changes in ordering information given herein do not affect the date of issue All brand or product names are trademarks or registered trademarks of their respective holders MEN is not responsible for the results of any actions taken on the basis of information in the publication nor for any error in or omission from the publication MEN expressly disclaims all and any liability and responsibility to any person whether a reader of the publication or not in respect of anything and of the consequences of anything done or omitted to be done by any such person in reliance whether wholly or partially on the whole or any part of the contents of the publication The correct function of MEN products in mission critical and life critical applications is limited to the environmental specification given for each product in the technical user manual The correct function of MEN products under extended environmental conditions is limited to the individual requirement specification and subsequent validation documents for ea
6. n the A17 support PMC modules working with 32 bit 33 MHz up to 64 bit 66 MHz One of the mezzanine slots supports rear I O and can also be used for XMC modules with a PCI Express x1 x2 or x4 link The second PMC only slot is connected to the onboard FPGA and can thus act as the physical layer for additional functions implemented in the FPGA The PMC XMC slots allow flexible extension to the A17 adding functions such as graphics mass storage further Ethernet or a simple FPGA backed physical layer Even more I O functions such as graphics touch CAN binary I O etc can be realized as IP cores in FPGA for the needs of the individual application The A17 comes with MENMON support This firmware BIOS can be used for bootstrapping operating systems from disk Flash or network for hardware testing or for debugging applications without running any operating system men Page 1 Diagram EEPROM Boot Flash FRAM RTC Watchdog Ethernet Q 1000Base T PPWAPE Ethernet MPC8548 or 1000Base T lt P MPC8543 Ethernet 1000Base T Ethernet 1000Base T RS232 COM1 Qe RS232 COM2 PCI to VMEbus Bridge A17 Data Sheet 2013 02 06 hee ik ert gt Front connector Q Rear I O connector i Options Page 2 Technical Data CPU PowerPC PowerQUICC Ill MPC8548 MPC8548E MPC8543 or MPC8543E o 800 MHz up to 1 5 GHz o Please see Standard Configurations for available standard versions o e500 Powe
7. r without ECC Flash Disk o 0 GB up to 4 GB and more if components are available FRAM o 0 KB or 128 KB 1 0 Ethernet o Two additional Gigabit Ethernet channels on VMEbus PO rear connector for ANSI VITA 31 1 2003 support only with MPC8548 a Only two channels at front instead of four with MPC8543 PCI Express links one x8 link o Reduces operation temperature range because of higher DDR SDRAM clock FPGA The onboard FPGA offers the possibility to add customized I O functionality FPGA Altera Cyclone Il EP2C35 o 33 216 logic elements o 483 840 total RAM bits Connection o Total available pin count 31 pins o Functions available via PMC slot 1 connector Pn4 m You can find more information on our web page User I O in FPGA VMEbus Single 5V supply for operation in VME32 systems Please note that some of these options may only be available for large volumes Please ask our sales staff for more information A17 Data Sheet 2013 02 06 Page 5 Ordering Information Standard A17 Models 01A017 00 MPC8548 1 33 GHz 1 GB DDR2 DRAM 2 GB Flash disk 128 KB FRAM PO not mounted 40 85 C screened Systems amp Card Cages MEN delivers turn key systems completely installed hardware operating system accessories wired and tested Different rack sizes power supplies and backplanes on request For details please contact your local sales representative Miscellaneous Accessories 05F006 00 RS232 interface cable RJ45 to 9
8. rPC core with MMU and double precision embedded scalar and vector floating point APU o Integrated Northbridge and Southbridge Memory 2x32 KB L1 data and instruction cache 512 KB 256 KB L2 cache integrated in MPC8548 MPC8543 Up to 2 GB SDRAM system memory o Soldered o DDR2 with or without ECC o Up to 300 MHz memory bus frequency depending on CPU Up to 4 GB soldered Flash disk SSD solid state disk o Higher capacity possible if components are available o FPGA controlled 16 MB boot Flash 128 KB non volatile FRAM Serial EEPROM 8 kbits for factory settings Mass Storage Up to 4 GB soldered ATA Flash disk SSD solid state disk o Higher capacity possible when components are available o FPGA controlled 1 0 Ethernet o Up to four 10 100 1000Base T Ethernet channels Two RJ45 connectors at front panel o Two front LEDs per channel to signal LAN Link and Activity o Two channels accessible via rear I O on connector PO complying with ANSI VITA 31 1 2003 option Two RS232 UARTs COM1 2 o Two RJ45 connectors at front panel o Data rates up to 115 2 kbit s o 16 byte transmit receive buffer o Handshake lines CTS RTS GPIO o 31 GPIO lines o FPGA controlled a Connection via PMC1 board to board connector J4 o Front Connections Two Ethernet RJ45 m COM1 COM2 RJ45 XMC PMC 0 and PMC 1 Rear I O m Two 10 100 1000Base T Ethernet on PO option Mezzanine rear I O PMC 0 on P2 Mezzanine Slots Two slots total one slot u
9. sable for PMC or XMC One XMC slot o Compliant with XMC standard VITA 42 3 2006 o PCI Express links one x1 or one x2 or one x4 Two PMC slots o Compliant with PMC standard IEEE 1386 1 o Up to 64 bit 64 MHz 3 3 V V I O o PMC I O module PIM support through J4 complying with VITA 35 PMC 0 Miscellaneous Real time clock with battery backup Temperature sensor power supervision and watchdog Reset button in ejector handle One power good LED three user configurable LEDs at front Local PCI Bus 64 bit 66 MHz 3 3 V V I O Compliant with PCI Specification 2 2 A17 Data Sheet 2013 02 06 Page 3 Technical Data VMEbus Electrical Specifications Mechanical Specifications Environmental Specifications MTBF Safety EMC BIOS Software Support A17 Data Sheet 2013 02 06 TS1148 controller Compliant with VME64 Specification Supports VME32 VME64 2eVME and 2eSST VITA 1 5 o Optional single 5V supply for operation in VME32 systems Slot 1 function with auto detection Master o D08 D16 D32 D64 A16 A24 A32 A64 BLT MBLT RMW Slave o DO08 D16 D32 D64 A16 A24 A32 A64 BLT MBLT DMA Mailbox functionality Bus timer Location Monitor Interrupter DO8 O 1 7 1 ROAK Interrupt handler DO8 O IH 7 1 Single level 3 fair requester Single level 3 arbiter Supply voltage power consumption 5 V 3 5 approx 2 2 A 3 3 V 3 5 approx 1 1 A 12 V 5 5 only provided for PMCs that need 12
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