Glomation GECM-9G25 User`s Manual
Contents
1. Glomation Embedded CPU Module GECM 9G25 User s Manual GECM 9G25 35 User s Manual Table of Contents Chapter 1 Introducing the GECM 9G25 CPU Module oooooonnnnnccccononcnnnonocononononccnnnnnnnnnnnnnnnnnnnos 4 GEC M I ONCE Wisin A eae eee 4 Advanced Feature kenne E E a E T S 4 Chapter 2 GECM 9G25 Function BLOCKS lssserosit dico ea e a RERE 6 SS a e aa 6 DDR RAN actos ters testis E S A E toncaseahadecte ae 7 PLASE An 7 COCKE CIOU y cge opena o EEE as EA A PA 7 LET nr ies 8 Power Supply ani aos 8 SODIMM 200 Tite mace rca rector Mab nccotetonts 9 Solis Me eT er TTT gt eee A 11 Chapter 3 Software DescriptiOD occccccnnnnnnncnnncccnncnnnncancccncnaianncnncc O a ccccccccccincacanccr 13 OLS Wid ch see ee eee net Terr cere Se ch Y AAA 13 Data Storage On Gre C MiG o cd e 13 GECM9623 CNU Cola e a E eo E RE 13 A te O A AA E etn ment rr tet 13 U Boot Boone LM rio IN aE stunts cau a dane diia 13 Loading Linux Kernel and root File System 2 0 Nioo Zicccccseeessssccccccesessseeescccccssecsssseesceeees 14 Chapter 4 Development Tools BO o GWenecccccccccessssescccccesecssssacecceceeeasseesceeaeaeas 17 Version 0 2 Page 2 of 17 27 Feb 14 GECM 9G25 35 User s Manual List of Tables TABI Ws TAO WC SOU 8 Table 2 Jt SODIMM 200 Card Bd ce Connec to nw ie nae ei nr 9 Table 5 NAND PEASH Storage Maps anes 13 Version 0 2 Page 3 of 17 27 Feb 14 GECM 9G25 35 User2. _ RFU 45 46 RFU RFU RFU 47 48 RU RFU RFU 49 50 RFU RFU a S5 52 GND _ REU 53 54 RFU RFU RU 55 56 RFU RFU a PEU 57 58 RFU RFU _ RFU 59 60 RFU RFU NAND FLASH Power Domain 61 62 NAND FLASH Power Domain VDDNF GPIOD NANDOE 63 64 NANDWE GPIOD PDI_ GPIOD A21 NANDALE 65 66 A22 NANDCLE GPIOD PD3 GPIOD NCS3 67 68 NWAIT GPOD PDS GPIOD D16 TO 70 D7 GPIOD PDT GPIOD Di8 n 72 DI9 GPIOD PDO GND GPOD D0______ 75 76 DAN GPIOD PDI GPOD D2_______ 77 78 D3 GPIOD PDIZ GPIOD D24 7 80 D25 A20 GPIOD PDIS GPIOD D26 A23 81 82 D27 A24 GPIOD PDIT GPIOD D28 A25_ 83 84 D29 NCS2_ GPIOD PDIO GPIOD D30 NCS4 85 86 D3I NCS5_ GPIOD PD2 POWER INPUT 87 88 POWERINPUT VDDIOPO Page 9 of 17 27 Feb 14 GECM 9G25 35 User s Manual PAO GPIO A TXDO SPII NPCS1 89 90 RXDO SPIO NPCS2 GPIOA PAL PA2 GPIO A MCII_DAI EO_ET 91 92 CTSO MCII_DA2E GPIOA PA3 AA AA PS PAZ GPIO A SCKO MCIH_DA3 93 94 GND IA Fe a PLP PAII GPIO A SPIO_MISO MCH_ 95 SPIO_MOSI MCI_ GPIOA PAI2 re A NS LL epee A AA A PARA AAA A CK ee E GND _ 100 TXD2 SPIO NPCSI GPIOA PA7_ PAS GPIO A RCD2 SPH_NPCSO 101 102 TIOAO SPII_MISO GPIOA PA21 PA22 GPIO A TIOA1 SPII_MOS1 103 104 TIOA2 SPII_SPCK GPIOA PA23_ PA31 GPIO A TWCKO SPI1_NPC 105 106 TWDO SPI
3. ARM core operates from a 1V supply while the I O operates at 3 3V The low power consumption makes it an idea platform for battery operated applications Version 0 2 Page 4 of 17 27 Feb 14 GECM 9G25 35 User s Manual The list below summarizes the features of the GECM 9G235 400MHz Processor Core ARM926EJ S with MMU 128 MB DDR2RAM 256MB 1GB NAND FLASH 1 10 100 Mbps Ethernet MAC 12 channel 10 bit Analog to Digital Converter ADC 4 Universal Asynchronous Receiver Transmitters UARTs 2 USB Host Port 1 USB Device Port Real Time Clock Watchdog Timer Hardware Debug Interface SD MMC Socket RC Port SPI Port Version 0 2 Page 5 of 17 27 Feb 14 GECM 9G25 35 User s Manual Chapter 2 GECM 9G25 Function Blocks The GECM 9G725 is designed as the heart of the system It connects to the application specific carrier board through the SODIMM 200 interface It consists of the processor and external memory and the board itself servers as a minimal CPU sub system The signals of a full suite of peripheral functions such as USB SD MMC I2C I2S Ethernet etc are routed to the SODIMM connector to be passed to the application specific carrier board The following diagram shows the board architecture NAND Flash AT91SAM9G25 SoDIMM 200 Figure 1 GECM 9G25 Block Diagram AT91SAM9G25 The GECM 9G25 CPU Module uses the Atmel AT91SAM9G25 as the core processor on the computer module The top level features of AT91SAM9
4. G23 processor are the following e ARMQ926EJ S RISC Core Processor e 400 MHz 400 MIPS Performance e 16Kbyte Instruction Cache Version 0 2 Page 6 of 17 27 Feb 14 GECM 9G25 35 User s Manual e 16Kbyte Data Cache e Linux and Windows CE enabled MMU e 133 MHz System Bus e 32 bit External Bus Interface Supporting 8 banks DDR2 LPDDR SDR LPSDR Static Memory e MLC SLC NAND Controller with up to 24bit Programmable Multi bit Error Correcting Code PMECC e Serial EEPROM Interface e 10 100 Mbps Ethernet MAC e USB High Speed Host Port USB Full Speed Host Port USB High Speed Device Port e Two High Speed Memory Card Hosts e 4UART e Two port USB Host High Speed amp Full Speed e 12 channel 10 bit ADC e 2 Master Slave SPI Port e Serial Audio Interface e JTAG Interface More detailed information regarding the AT91SAM9G25 processor can be found at www atmel com DDR2 RAM The GECM 9G25 is equipped with 128MByte of DDR2RAM double data rate synchronous dynamic memory With the system clock running at 133MHz it can achieve a maximum transfer rate of 1066 MB S FLASH The GECM 9G25 is shipped with 256 Mbytes of NAND FLASH memory The GECM 9G25 can be also ordered with optional 512MB 1GB NAND FLASH Clock Circuitry The GECM 9G25 CPU Module includes tow clock sources 32 768KHz crystal for RTC and 12MHz crystal for main system clock Version 0 2 Page 7 of 17 27 Feb 14 GECM 9G25 35 User s Manual Reset Circu
5. GPIOC LCDPWM_ 159 _ 160 LCDVSYNC____ GPIOC PC27 GND o GT 162 LCDHSYNC GPIOC _ PC28 PC29 GPIOC LCDDEN 163 _ 164 EILMDC GPIOC_ PC30 PC31 GPIOC ELMDIO 165 16 SELCONFIG VDDANA POWERINPUT________ 167 168 POWERINPUT VDDANA PBO GPIOB E0 RXO 169 170 EO RXI GPIOB PBI PB2 GPIOB E0 RXER 171 172 EORXDv______ GPIOB PB3 PB4 GPIOB E0 TXCK_ 173 174 E0 MDIO GPOB PBS PB6 GPIOB E0 MDC 175 176 E0 TXEN GPIOB PB7 PBS GPIOB E0 TXER_____ 177 178 GNDANA PB9 GPIOB E0 TXO 19 180 PB11 GPIOB EO TX2 181 182 E0 TX3 GPIOB PBI2 PB13 GPIOB EORX2_______ 183 184 Version 0 2 Page 10 of 17 27 Feb 14 GECM 9G25 35 User s Manual GPIOB E0 RXCK_ 185 186 E0O CRS GPIOB PBI6 GPIOB E0 COL 187 188 GNDANA GPIOB IRQ 189 190 A D Voltage Reference POWR_REF E TI a g PEDO ETHOTX 9B EDI ETHOTX 9S TH LED ETHORX ayay ws AWDDr ETHORX ___ _______ w9 20 ______ GNDETH Please note the PDO PD13 are used by the GECM 9G25 35 module for on board NAND FLASH The on board NAND FLASH can be disabled by disconnecting the NAND CE signal so the NAND control signals can be used on the carrier board The PB18 and PD21 are used by the GECM 9G25 35 for the on board LED They can be reclaimed by removing the LEDs on the GECM 9G25 35 board Connector The GECM 9G25 CPU Module uses SODIMM card edge con
6. I_NPCS3 GPIO A PA30 E eo ES GND 07 108 MCO DAO GPIOA PAIS PA16 GPIO A MCIO CDA 109 110 MCIO CK GPIOA PAIT PAIS GPIO A MCIO DAI MI 112 MCIOLDA2 GPOA PAl9 PA20 GPIOA MCIO DA3 J13 ia _ MJ GND _ PAS GPIO A TXDI CANTX1 115 116 RXDI CANRXI GPIO A PA6 PALO GPIO A DTXD CANTXO 117 118 DRXD CANRX0 GPIOA_ PA9 GND o 20 TCLKOTK GPIOA PA24 PA25 GPIO A TCLKI TF 121 122 TCLK2 TD GPIOA PA26 PA27 GPIO A TIOBORD 123 124 TIOBIRK GPIOA PA28 PA29 GPIO A TIOB2 RE _____ 125 P6 GND VDDOIPI POWERINPUT_________ 127 128 POWERINPUT__________ VDDIOPI PCO GPIO C LCDDATO ISI DO 129 130 LCDDATI GPIOC PCL PC2 GPIO C LCDDAT2 1S1D2 131 132 LCDDAT3 GPIOC PC3 PC4 GPIOC LCDDAT4 133 134 LCDDATS GPIOC Pcs GND po BS 36 LCDDATO GPIOC PCO PCT GPIOC LCDDAT7 137 138 LCDDAT8_ GPIOC PCS PCO GPIOC LCDDAT9 139 140 LCDDATIO GPIOC PCIO PC11 GPIOC LCDDATU m a2 GND PC12 GPIOC LCDDATI2 143 144 LCDDAT13 GPIOC _ PCI3 PC14 GPIOC LCDDATI4 145 146 LCDDATIS GPIOC PCIS GND a o AT 48 LCDDATIO GPIOC Pci6 PC17 GPIOC LCDDATI7 149 150 LCDDAT18 GPIOC PCI8_ PC19 GPIOC LCDDAY19 151 152 LCDDAT20 GPIOC PC20 PC21 GPIOC LCDDAT21 153 S44 tT D PC22 GPIOC LCDDAT22 155 156 LCDDAT23 GPIOC PC23_ PC24 GPIOC LCDDSIP 157 fiss GPO PC25 PC26
7. Module uses SODIMM card edge connector to interface the application specific carrier board The pin out of the SODIMM connector is listed in the following table Table 2 J1 SODIMM 200 Card Edge Connector Function Type x5 pad and name SODIMM 200 x5padandname Type Function VCC 3V3 VCC 3V3 GND USBC_DP USBC_DM GND USBB_DM USBB_DP GND DIBP DIBN GBN USBA_DM USBA_DP GND RFU RFU RFU RFU RFU GND RFU RFU RFU RFU GND RFU RFU RFU RFU VDDNF PDO PD2 PD4 PD6 PD8 GND PD10 PD12 PD14 PD16 PD18 PD20 VDDIOPO Version 0 2 Front Side pA B BackSide Power Input 1 2 PowerInput VCC 33 Power Input 23 4 PowerInput VCC 33 5 6 PowerInput VBAT gt O USBDataPositive 7 8 ______ SYSC JTAGSEL VO USB Data Negative 9 10 ___________ SYSC_ WKUP_ uf R SyYsc SHDN O USB Data Negative 13 14 _________ SYSC_ BMS USB Data Positive 15 16 ___________ SYSC NRST aa 7 fis a SYSC__ NTRST_ 9 20 RSTITAG TOE a 2 RSTITAG TCK__ AA B 24 RRSTITAG TMS USB Data Negative 25 26 __________ RSTITAG TDO O USBDataPositive 27 28 _________ RSTITAG RTCK EA 29 30 PowerEnable Input PWRLEN RFU 31 32 REU RFU RFU 33 34 RFU RFU _ RFU 35 36 RU_ gt _____ ___ REU ___ RFU 37 38 RrU gt _____ _ RRU RFU 39 40 RFU RFU IA al ae PGND RFU 483 44 RU RFU
8. e erased first before new kernel image can be stored The following command will erase the NAND FLASH sectors reserved for Linux kernel nand erase 0x200000 0x200000 The use the flowing command to store the kernel image from SDRAM to NAND FLASH nand write jffs2 0x22000000 0x200000 0x200000 The following commands can be used to load root file system into the FLASH memory nand erase 0x800000 available _nand_flash_memory_size EECP UXZ21000000 coobts Lm9g nand write jffs2 0x21000000 0x800000 filesize Version 0 2 Page 15 of 17 27 Feb 14 GECM 9G25 35 User s Manual Please be noted that the image 1s first loaded into the SDRAM and then stored into the FLASH memory The image size can not exceed the available SDRAM on the board After the kernel and root file system have been updated the board can be simply reboot by recycle the power Version 0 2 Page 16 of 17 27 Feb 14 GECM 9G25 35 User s Manual Chapter 4 Development Tools Glomation provides a pre configured VMWare image based Linux Debian distribution that includes cross development tool chain Eclipse IDE sample project and sample program The user and password pairs for the VMWare image are root root and user user The VMWare image is available in the support page at Glomation website http www glomationinc com support html Version 0 2 Page 17 of 17 27 Feb 14
9. itry The reset sources for the GECM 9G2 are e Power on reset e Push button reset from carrier board e JTAG reset from an in circuit emulator option JTAG interface on carrier board Power Supply The GECM 9G25 CPU Module contains its own power supply generation circuit to generate necessary power source for the processor and main memory Additional power source for other peripheral functions should be provided by carrier board to the CPU module through the SODIMM interface The following table lists the power source and functionality Table 1 Power Sources Nominal Name Powers Source VDDNF NAND Flash and D16 D32 Derived from 3 3V From Multiplex SMC Data Lines SODIMM connector Output to the SODIMM as VDDNF for carrier board voltage shifter 1f needed 3 3 V VDDIOPI Partial Peripheral I O lines From SODIMM connector 3 0V VDDBU The Slow Clock Oscillator From SODIMM connector the 32KHz RC the Internal 12MHz RC and Part of the System Controller 3 3V VDDUTMII The USB Device and Host From SODIMM connector UTMII Interface 3 3V VDDOSC The Main Oscillator Cell From SODIMM connector Converter Interface UHPHS UTMI Core UHPHS UTM interface 1 0V VDDPLLA The PLLA Cell From SODIMM connector 1 0V VDDCORE CPU Core Power Supply On board Power Supply 3 0V 3 3V ADVREF ADC Reference voltage From SODIMM connector Version 0 2 Page 8 of 17 27 Feb 14 GECM 9G25 35 User s Manual SODIMM 200 Interface The GECM 9G25 CPU
10. nector to interface the carrier board The board dimensions is shown below Version 0 2 Page 11 of 17 27 Feb 14 GECM 9G25 35 User s Manual Front m 67 60 mm nom 31 75 mm Voltage Ke 2 mm Ir com 4 4 ene 1 00 mm 0 60 mm key position Figure 1 SODIMM 200 Dimensions Version 0 2 Page 12 of 17 27 Feb 14 GECM 9G25 35 User s Manual Chapter 3 Software Description Overview This chapter provides information regarding the software that is shipped with the GECM 9G25 Board The software included with the board 1s U Boot boot loader Linux kernel 2 6 39 and an embedded root file system Data Storage on GECM 9G25 The default configuration of the GECM 9G25 CPU Module uses on board NAND FLASH for all data storage requirements including boot strap code boot loader Linux kernel and Linux file system The following table is the factory default storage map on the NAND FLASH Table 3 NAND FLASH Storage Map Start Address Ss Usage 0x00000000 0x20000 0x00040000 0x40000 0x000C0000 0x20000 U Boot primary environment storage range 0x000E0000 0x20000 U Boot secondary environment storage range 0x00200000 0x300000 Linux kernel 0x00800000 Root file system GECM 9G25 Linux Code The GECM 9G23 is shipped with Linux 2 6 39 kernel pre installed This software is programmed into the system FLASH located on the board prior to shipment The Linux kernel is configured with most of the device drive
11. rs included for the GECM 9G23 board U boot U Boot provides a simple interface for loading operating systems and applications onto the GECM 9G23 board U Boot uses a serial console for its input and output The default serial port setting is 115200 8 N 1 It also supports the built in Ethernet port and general flash programming The board is shipped with U Boot pre installed Please refer to U Boot user s manual regarding detailed information of U Boot U Boot Booting Linux The following shows the default U Boot setup for booting Linux Version 0 2 Page 13 of 17 27 Feb 14 GECM 9G25 35 User s Manual U Bootl gt orinteny bootargs mem 128M console ttyS0 115200 mtdparts atmel_nand 8M bootstrap uboot kernel ro rootfs root dev mtdblockl rw rootfstype ubifs ubi mtd 1 root ubi0 rootfs bootdelay 1 baudrate 115200 ethaddr 00 0e 20 02 0as 5b Tpadare L1924 168042400 serverip 192 168 0 102 Nnecmask 2Z55 255 250 96 0 stdin serial stdout serial stderr serial ethact macbU Environment size 353 131067 bytes U BOGE gt The boot cma setting of the U Boot reads the Linux kernel from NAND FLASH at address 0x200000 to SDRAM at address 0x22000000 and start executing the kernel code at the same memory address The NAND FLASH from 0x800000 and up is used for Linux root file system The U Boot passes the MTD device partition setting to the Linux kernel via the bootargs environment variable Loading Linux Kernel and root File S
12. s Manual Chapter 1 Introducing the GECM 9G25 CPU Module GECM 9G25 Overview The GECM 9G23 is a low cost compact sized CPU Module based on Atmel AT9ISAM9G25 processor It integrates all the core components and is mounted onto an application specific carrier board using the standard SODIMM form factor This approach allows the customer to design a customer carrier board that meets the customer s I O dimensional and connector requirements without having to go through complicated design process of the processor memory and standard I O functionality This approach can significantly reduce the development time and simplifying the process of developing a complete customer product With a large peripheral set targeted to a variety of applications the GECM 9G25 is well suited for industrial controls digital media servers audio jukeboxes thin clients set top boxes point of sale terminals biometric security systems and GPS devices Figure 1 GECM 9G25 CPU Module Advanced Features The heart of the GECM 9G25 is the AT91SAM9G23 which is the one in a series of ARM926EJ S based processors The AT91SAM9G23 microcontroller features DSP Instruction Extensions ARM Jazelle Technology for Java Acceleration It has separate 32 Kbyte instruction and data caches with write buffer The ARM926EJ S on the AT91SAM9G25 functions with a maximum operating clock rate of 400MHz and a power usage between 20mW and 80mW dependent upon clock speed The
13. ystem The U Boot boot loader provides many ways to load Linux kernel and file system into FLASH memory The loading by Ethernet network 1s shown here User can consult U Boot manual for other methods of loading data After power on the GECM 9G25 board stop the U boot auto execution by press any key The following message should be shown on the terminal console on the host PC connected to the GECM 9G25 board Version 0 2 Page 14 of 17 27 Feb 14 GECM 9G25 35 User s Manual RomBOOT Start ATSOTBOCESELAD Init DDR ba_offset Oxb Done BOaeGinG L Waee nOs Enumerate all roms Rom 0x0 Oxa3 0x0 0x0 0x3 0x21 0x88 0x63 0x2d Done 0x1 l wire chips found Board name SAM9x5 EK BO Vendor name FLEX si x40 0002 3 gt rev 0x9401 Downloading image chip id Oxecda Copy 0x50000 bytes from 0x40000 to 0x26f00000 Done U BOOE 2010 06 Coun 23 AUL 1620554 DRAM 128 MiB NAND 256 MiB The network address and server address must be set before network transfer can take place The following commands will set the SBC IP address and server IP address Set 1paddr KxXK KKK KKK XXX set serverip XxXXX XXX XXX XXX The server IP is the IP address where a TFTP server must be run To load Linux kernel type in the following command tftp 0x22000000 ulmage The U Boot will load ulmage file from the TFTP server whose IP address is specified by the serverip environment variable The NAND FLASH sectors must b
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